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Chapter 1

P-N Diode
1.
1p

Figure 1.1 shows the structure of a p-n junction. With p has been
noted:
Metallurgical
junction
A

n ND

p NA

Figure 1.1

a.) the concentration of the acceptor atoms


b.) the concentration of the donor atoms
c.)
the concentration of the electrons
d.) the concentration of the holes
Correct answer d.)
2.
1p

Figure 1.1 shows the structure of a p-n junction. With n has been
noted:
Metallurgical
junction
A

n ND

p NA

Figure 1.1

a.) the concentration of the acceptor atoms


b.) the concentration of the donor atoms
c.)
the concentration of the electrons
d.) the concentration of the holes
Correct answer c.)
3.
1p

Figure 1.1 shows the structure of a p-n junction. With NA has


been noted:

Analog Electronics - Tests


Metallurgical
junction
A

n ND

p NA

Figure 1.1

a.) the concentration of the acceptor atoms


b.) the concentration of the donor atoms
c.)
the concentration of the electrons
d.) the concentration of the holes
Correct answer a.)
4.
1p

Figure 1.1 shows the structure of a p-n junction. With ND has


been noted:
Metallurgical
junction
A

n ND

p NA

Figure 1.1

a.) the concentration of the acceptor atoms


b.) the concentration of the donor atoms
c.)
the concentration of the electrons
d.) the concentration of the holes
Correct answer b.)
5.
1p

Figure 1.2 shows the symbol of a p-n diode. With A has been
noted:

Figure 1.2

a.) anode
b.) cathode
c.)
total instantaneous value of the drop voltage across the diode
d.) total instantaneous value of the current flowing through the diode
Correct answer a.)
6.
1p

Figure 1.2 shows the symbol of a p-n diode. With C has been
noted:

Analog Electronics - Tests

Figure 1.2

a.) anode
b.) cathode
c.)
total instantaneous value of the drop voltage across the diode
d.) total instantaneous value of the current flowing through the diode
Correct answer b.)
7.
1p

Figure 1.2 shows the symbol of a p-n diode. With vA has been
noted:

Figure 1.2

a.) anode
b.) cathode
c.)
total instantaneous value of the drop voltage across the diode
d.) total instantaneous value of the current flowing through the diode
Correct answer c.)
8.
1p

Figure 1.2 shows the symbol of a p-n diode. With iA has been
noted:

Figure 1.2

a.) anode
b.) cathode
c.)
total instantaneous value of the drop voltage across the diode
d.) total instantaneous value of the current flowing through the diode
Correct answer d.)
9.
3p

Diode effect means:


a.)
b.)

in normal operation- practically -the current through the diode


flows only from cathode to anode
in normal operation- practically -the current through the diode
flows only from anode to cathode
3

Analog Electronics - Tests

c.)

in normal operation - practically - meaning diode current is dictated


by the external circuit of the diode
d.) in normal operation, - practically - the diode current flows
sometimes from the anode to the cathode and other times from the
cathode to the anode
Correct answer b.)
10.
1p

Figure 1.3 shows a "p-n" junction at thermal equilibrium. With 1


has been noted:
E
p

1.

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

2.

3.

Figure 1.3

a.) P neutral region


b.) N neutral region
c.)
transition region
d.) internal electric field
Correct answer a.)
11.
1p

Figure 1.3 shows a "p-n" junction at thermal equilibrium. With 2


has been noted:
E
p

1.

a.) P neutral region


b.) N neutral region
c.)
transition region
d.) internal electric field
Correct answer c.)
12.
1p

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

2.

3.

Figure 1.3

Figure 1.3 shows a "p-n" junction at thermal equilibrium. With 3


has been noted:
4

Analog Electronics - Tests


E
p

1.

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

2.

3.

Figure 1.3

a.) P neutral region


b.) N neutral region
c.)
transition region
d.) internal electric field
Correct answer b.)
14.
2p

Figure 1.4 shows a "p-n" junction at thermal equilibrium. Transition


region responsible for the appearance of diode-effect occurs around
the metallurgical junction as a result of:
E
p

P neutral
region

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

Transition
region
Figure 1.4

N neutral
region

a.) the diffusion of the atoms


b.) the diffusion of the electrons (only)
c.)
the diffusion of the holes (only)
d.) the diffusion of the electrons and holes
Correct answer d.)
15.
3p

Figure 1.4 shows a "p-n" junction at thermal equilibrium. Transition


region responsible for the appearance of diode-effect occurs around
the metallurgical junction as a result of the diffusion of the electrons
and holes. The diffusion phenomenon is caused by:
E
p

P neutral
region

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

Transition
region
Figure 1.4

N neutral
region

Analog Electronics - Tests

a.)

concentration gradient of the acceptor


neutral region and transition region
b.) concentration gradient of the acceptor
neutral region and transition region
c.)
concentration gradient of the acceptor
neutral region and n neutral region
d.) concentration gradient of donors
surrounding the metallurgical junction
Correct answer d.)
16.
3p

and donor atoms of the p


and donor atoms of the n
and donor atoms of the p
and the acceptor atoms

Figure 1.4 shows a "p-n" junction at thermal equilibrium. Transition


region responsible for the appearance of diode-effect occurs around
the metallurgical junction as a result of the diffusion of the electrons
and holes. The diffusion phenomenon is caused by concentration
gradient of donors and the acceptor atoms surrounding the
metallurgical junction. As a result of this phenomenon, in the
structure fixed charges appear. They are represented by:
E
p

P neutral
region

+
+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

+
+
+
+
+
+

Transition
region
Figure 1.4

N neutral
region

a.) ions trapped in crystalline network


b.) electrons
c.)
holes
d.) lattice structure
Correct answer a.)
17.
2p

The internal electric field existing in the transition region is due to:
a.) ions trapped in crystalline network
b.) electrons
c.)
holes
d.) lattice structure
Correct answer a.)

18.
2p

At reverse bias, the internal potential barrier is:

Analog Electronics - Tests

a.) increased
b.) decreased
c.)
unaffected
d.) sometimes increased, sometimes decreased
Correct answer a.)
19.
2p

At forward bias, the internal potential barrier is:


a.) increased
b.) decreased
c.)
unaffected
d.) sometimes increased, sometimes decreased
Correct answer b.)

20.
2p

From a formal point of view, the diode is fully described by:


a.) one characteristic equation
b.) two characteristic equations
c.)
a number of equations depending by the topology of the circuit
d.) a number of equations depending by the operating regime
Correct answer a.)

21.
3p

From a formal point of view, a diode operating in quasi-static large


signal regime is fully described by an equation of the type:
a.)

di
dn i
dv
dmvA
E i A , A ,K, nA , v A , A ,K,
, 1 ,K, p = 0
m
dt
dt
dt
dt

b.)
c.)

E (i A , v A ) = 0
ia = g a v a

d.)

di
dn i
dv
d m vA
E i A , A ,K, nA , v A , A ,K,
dt
dt
dt
dt m

=0

Correct answer a.)


22.
3p

From a formal point of view, a diode operating in quasi-static small


signal regime is fully described by an equation of the type::
a.)
b.)
c.)

di
dn i
dv
dmvA
E i A , A ,K, nA , v A , A ,K,
, 1 ,K, p = 0
m
dt
dt
dt
dt

E (i A , v A ) = 0

ia = g a va

Analog Electronics - Tests

d.)

di
dn i
dv
d m vA
E i A , A ,K, nA , v A , A ,K,
dt
dt
dt
dt m

=0

Correct answer c.)


23.
2p

The I-V characteristic of an ideal diode is:


a.)

e
i A = I S exp T
v A

b.)

v
i A = I S exp A
e T

v
i A = I S exp A
e T
e
i A = I S exp T
v A


+ 1

c.)
d.)


+ 1

Correct answer b.)


24.
2p

The I-V characteristic of an ideal diode is:


v
i A = I S exp A
e T

where:
eT =

kT
q

At room temperature:
a.) eT2.5 mV
b.) eT25 mV
c.)
eT250 mV
d.) eT2.5 V
Correct answer b.)
25.
1p

Figure 1.5 represents the static characteristic of a diode.

Analog Electronics - Tests

VBR

iA
2.

4.
vA

IS

3.

1.

Figure 1.5

IS is:
a.) half-wave rectified average current
b.) peak value of the current
c.)
saturation current
d.) full-wave rectified average current
Correct answer b.)
26.
1p

Figure 1.5 represents the static characteristic of a diode. V is:


VBR

iA
2.

4.

IS

vA
3.

1.

Figure 1.5

a.) breakdown voltage


b.) built-in voltage
c.)
half-wave rectified average voltage
d.) full-wave rectified average voltage
Correct answer b.)
27.
1p

Figure 1.5 represents the static characteristic of a diode. VBR is:

Analog Electronics - Tests

VBR

iA
2.

4.
vA

IS

3.

1.

Figure 1.5

a.) breakdown voltage


b.) built-in voltage
c.)
half-wave rectified average voltage
d.) full-wave rectified average voltage
Correct answer a.)
28.
1p

Figure 1.5 represents the static characteristic of a diode. With the


"1" was noted:
VBR

iA
2.

4.

IS

vA
3.

1.

Figure 1.5

a.) breakdown region


b.) cut-off region reverse bias
c.)
cut-off region forward bias
d.) conduction region
Correct answer a.)
29.
1p

Figure 1.5 represents the static characteristic of a diode. With the


"2" was noted:

10

Analog Electronics - Tests

VBR

iA
2.

4.
vA

IS

3.

1.

Figure 1.5

a.) breakdown region


b.) cut-off region reverse bias
c.)
cut-off region forward bias
d.) conduction region
Correct answer b.)
30.
1p

Figure 1.5 represents the static characteristic of a diode. With the


"3" was noted:
VBR

iA
2.

4.

IS

vA
3.

1.

Figure 1.5

a.) breakdown region


b.) cut-off region reverse bias
c.)
cut-off region forward bias
d.) conduction region
Correct answer c.)
31.
1p

Figure 1.5 represents the static characteristic of a diode. With the


"4" was noted:

11

Analog Electronics - Tests


iA

VBR

2.

4.

IS

vA
3.

1.

Figure 1.5

a.) breakdown region


b.) cut-off region reverse bias
c.)
cut-off region forward bias
d.) conduction region
Correct answer d.)
32.
2p

Figure 1.6 shows a possible linearization of the characteristic in


Figure 1.5 and it is called zero order model (Mathematically
idealized diode).
VBR

iA

iA
2.

4.

IS

vA
3.

Zero order model

Real Characteristic

1.

vA

Figure 1.5

Figure 1.6

Under this approximation the equivalent circuit of the diode is:


a.)

b.)

c.)

12

Analog Electronics - Tests

d.)

Correct answer d.)


33.
2p

Figure 1.6 shows a possible linearization of the characteristic in


Figure 1.5 and it is called zero order model (Mathematically
idealized diode). According to this approximation, a diode operating
in conduction region behaves as:
VBR

iA

iA
2.

4.
vA

IS

3.

Zero order model

Real Characteristic

1.

vA

Figure 1.5

Figure 1.6

a.) a resistor
b.) an open circuit
c.)
an short circuit
d.) a switch
Correct answer c.)
34.
2p

Figure 1.6 shows a possible linearization of the characteristic in


Figure 1.5 and it is called zero order model (Mathematically
idealized diode). According to this approximation, a diode operating
in cut-off region behaves as
VBR

iA

iA
2.

4.

IS

vA
3.

Zero order model

Real Characteristic

1.

vA

Figure 1.5

Figure 1.6

a.) a resistor
b.) an open circuit
c.)
an short circuit
d.) a switch
Correct answer a.)
35.

Avalanche multiplication occurs at:


13

Analog Electronics - Tests

3p

36.
3p

a.) high voltages in case of weakly doped junctions


b.) low voltages in case of weakly doped junctions
c.)
high voltages in case of strong doped junctions
d.) low voltages in case of strong doped junctions
Correct answer a.)
Tunneling occurs at:
a.) high voltages in case of weakly doped junctions
b.) low voltages in case of weakly doped junctions
c.)
high voltages in case of strong doped junctions
d.) low voltages in case of strong doped junctions
Correct answer d.)

37.
2p

Figure 1.7 shows the static characteristic of a Zener diode. It must


operates:
iZ
IZM

IZm
VZ

vZ

Figure 1.7

a.) in breakdown region


b.) in cut-off region reverse bias
c.)
in cut-off region forward bias
d.) conduction region
Correct answer a.)
38.
2p

Figure 1.7 shows the static characteristic of a Zener diode. The


current flowing through the diode must satisfy the condition:
iZ
IZM

IZm
VZ

a.)

Figure 1.7

I Z m i Z IZ M
14

vZ

Analog Electronics - Tests

b.)

I Zm i Z I Z M

c.)

I Zm i Z I Z M

d.)

I Zm i Z I Z M

Correct answer b.)


39.
2p

In real situations there are certain limitations to avoid the destruction


of a rectifier diode. The most common limitations are:
a.) IFM and VBR
b.) IZM and VZ
c.)
IFM and VZ
d.) IZM and VBR
Correct answer a.)

40.
2p

In real situations there are certain limitations to avoid the destruction


of a Zener diode. The most common limitations are:
a.) IFM and VBR
b.) IZM and VZ
c.)
IFM and VZ
d.) IZM and VBR
Correct answer b.)

41.
4p

The value of the current IA flowing through the diode is (see figure
1.8):

a.)
I A 4 mA
b.)
I A 4 mA
c.)
I A 0 mA
d.)
I A 2 mA
Correct answer c.)
42.
4p

Figure 1.8

The value of the drop voltage VA across the diode is (see figure 1.8):

15

Analog Electronics - Tests

Figure 1.8

VA = 10 V
VA = 8 V
VA = 8 V
VA = 10 V
Correct answer b.)

a.)
b.)
c.)
d.)

43.
3p

Small signal condition for a semiconductor diode is satisfied if:

a.) the signal across the diode is less than 2.5 mV


b.) the signal across the diode is less than 10 mV
c.)
the signal across the diode is less than 25 mV
d.) the signal across the diode is less than 100 mV
Correct answer b.)
44.
3p

45.
3p

Small signal conductance of semiconductor diode has the value:


g a [mS] = 25 I A [mA ]
a.)
g a [mS] = 2.5 I A [mA ]
b.)
g a [mS] = 4 I A [mA ]
c.)
g a [mS] = 40 I A [mA ]
d.)
Correct answer d.)

The mathematical model of a semiconductor diode that operates


under quasi-static small signal regime is:
ia = g a v a
a.)

b.)

v
i A = I S exp A
e T

c.)

ia = g a va 1

d.)

v
i A = IS exp A
e T

Correct answer a.)

16

Analog Electronics - Tests

46.
3p

Equivalent circuit of a semiconductor diode that works under quasistatic small signal regime is:

a.)

b.)

c.)

d.)
Correct answer b.)

17

Analog Electronics - Tests

18

Analog Electronics - Tests

Chapter 2
Rectifiers
1.
1p

Figure 2.1 shows:

a.) a half wave rectifier


b.) a full wave rectifier
c.)
a bridge rectifier
d.) a peak rectifier
Correct answer a.)
2.
1p

Figure 2.1

Figure 2.1 shows a half wave rectifier. With Tr was noted:

Figure 2.1

a.) the load resistor


b.) the non-linear element, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer c.)
19

Analog Electronics - Tests

3.
1p

Figure 2.1 shows a half wave rectifier. With RL was noted:

Figure 2.1

a.) the load resistor


b.) the non-linear element, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer d.)
4.
1p

Figure 2.1 shows a half wave rectifier. With D was noted:

Figure 2.1

a.) the load resistor


b.) the non-linear element, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer b.)
5.
1p

Figure 2.1 shows a half wave rectifier. With Vp was noted:

20

Analog Electronics - Tests

a.)

Figure 2.1

the amplitude value of the AC voltage applied across the primary of


the power transformer
b.) the effective value of the AC voltage applied across the primary of
the power transformer
c.)
the instantaneous value of the AC voltage applied across the
primary of the power transformer
d.) the total value of the voltage applied across the primary of the
power transformer
Correct answer a.)
6.
1p

Figure 2.1 shows a half wave rectifier. With Vs was noted:

Figure 2.1

a.)

the amplitude value of the AC voltage drop across the secondary of


the power transformer
b.) the effective value of the AC voltage drop across the secondary of
the power transformer
c.)
the instantaneous value of the AC voltage drop across the
secondary of the power transformer
d.) the total value of the voltage drop across the secondary of the
power transformer
Correct answer a.)
7.
1p

Figure 2.1 shows a half wave rectifier. With vL was noted:

21

Analog Electronics - Tests

a.)
b.)
c.)

Figure 2.1

the amplitude value of the AC voltage drop across the load resistor
the effective value of the AC voltage drop across the load resistor
the instantaneous value of the AC voltage drop across the load
resistor
d.) the total value of the voltage drop across the load resistor
Correct answer c.)
8.
1p

Figure 2.1 shows a half wave rectifier. With iL was noted:

Figure 2.1

a.) the amplitude value of the AC load current


b.) the effective value of the AC load current
c.)
the instantaneous value of the AC load current
d.) the total value of the load current
Correct answer d.)
9.
1p

See figure 2.1. Diode D is conducting:

Figure 2.1

22

Analog Electronics - Tests

a.) on the positive half wave


b.) on the negative half wave
c.)
a relatively small time interval of the positive half wave
d.) a relatively small time interval of the negative half wave
Correct answer a.)
10.
2p

Figure 2.2 shows the wave forms of a:


Vs

t
vL
Vs
VL

Figure 2.2

a.) half wave rectifier


b.) full wave rectifier
c.)
bridge rectifier
d.) peak rectifier
Correct answer a.)
11.
4p

See figure2.1. The DC component of the drop voltage across the load
resistor is:

Figure 2.1

a.)
b.)
c.)

2V
VL = s

Vs
VL =
2
V
VL = s

23

Analog Electronics - Tests

Vs

Correct answer c.)


d.)

12.
1p

VL = 2

Figure 2.3 shows:

a.) a half wave rectifier


b.) a full wave rectifier
c.)
a bridge rectifier
d.) a peak rectifier
Correct answer b.)
13.
1p

Figure 2.3

Figure 2.3 shows a full wave rectifier. With Tr was noted:

Figure 2.3

a.) the load resistor


b.) the non-linear element, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer c.)
14.
1p

Figure 2.3 shows a full wave rectifier. With RL was noted:

24

Analog Electronics - Tests

Figure 2.3

a.) the load resistor


b.) the non-linear element, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer a.)
15.
1p

Figure 2.3 shows a full wave rectifier. With D1 and D2 were


noted:

Figure 2.3

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer b.)
16.
1p

Figure 2.3 shows a full wave rectifier. With Vp was noted:

a.)

Figure 2.3

the amplitude value of the AC voltage applied across the primary of


the power transformer
25

Analog Electronics - Tests

b.)

the effective value of the AC voltage applied across the primary of


the power transformer
c.)
the instantaneous value of the AC voltage applied across the
primary of the power transformer
d.) the total value of the voltage applied across the primary of the
power transformer
Correct answer a.)
17.
1p

Figure 2.3 shows a full wave rectifier. With Vs was noted:

a.)

Figure 2.3

the amplitude value of the AC voltage drop across the secondary of


the power transformer
b.) the effective value of the AC voltage drop across the secondary of
the power transformer
c.)
the instantaneous value of the AC voltage drop across the
secondary of the power transformer
d.) the total value of the voltage drop across the secondary of the
power transformer
Correct answer a.)
18.
1p

Figure 2.3 shows a full wave rectifier. With vL was noted:

a.)
b.)
c.)

Figure 2.3

the amplitude value of the AC voltage drop across the load resistor
the effective value of the AC voltage drop across the load resistor
the instantaneous value of the AC voltage drop across the load
resistor
26

Analog Electronics - Tests

d.) the total value of the voltage drop across the load resistor
Correct answer d.)
19.
1p

Figure 2.3 shows a full wave rectifier. With iL was noted:

Figure 2.3

a.) the amplitude value of the AC load current


b.) the effective value of the AC load current
c.)
the instantaneous value of the AC load current
d.) the total value of the load current
Correct answer d.)
20.
2p

Figure 2.3 shows a full wave rectifier. In normal operation:

a.)
b.)

Figure 2.3

on the positive half wave D1 and D2 diodes operate in on state


on the positive half wave D1 diode operates in on state and D2
diode operates in off state
c.)
on the positive half wave D2 diode operates in on state and D1
diode operates in off state
d.) on the positive half wave D1 and D2 diodes operate in off state
Correct answer b.)
21.
2p

Figure 2.3 shows a full wave rectifier. In normal operation:

27

Analog Electronics - Tests

Figure 2.3

a.)
b.)

on the negative half wave D1 and D2 diodes operate in on state


on the negative half wave D1 diode operates in on state and D2
diode operates in off state
c.)
on the negative half wave D2 diode operates in on state and D1
diode operates in off state
d.) on the negative half wave D1 and D2 diodes operate in off state
Correct answer c.)
22.
2p

Figure 2.4 shows the wave forms of a:


Vs

t
vL
Vs
VL

Figure 2.4

a.) half wave rectifier


b.) full wave rectifier
c.)
clipping circuit
d.) peak rectifier
Correct answer b.)
23.
4p

See figure2.3. The DC component of the voltage drop across the load
resistor is:

Figure 2.3

28

Analog Electronics - Tests

2Vs

V
b.)
VL = s
2
V
c.)
VL = s

V
d.)
VL = 2 s

Correct answer a.)


a.)

24.
1p

VL =

Figure 2.5 shows:

Figure 2.5

a.) a half wave rectifier


b.) a full wave rectifier
c.)
a bridge rectifier
d.) a peak rectifier
Correct answer c.)
25
1p

Figure 2.5 shows a bridge rectifier. With Tr was noted:

a.)
b.)
c.)
d.)

Figure 2.5

the load resistor


the non-linear elements, providing the effect of recovery
the power transformer
the filtering element
29

Analog Electronics - Tests

Correct answer c.)


26.
1p

Figure 2.5 shows a bridge rectifier. With RL was noted:

Figure 2.5

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer a.)
27.
1p

Figure 2.5 shows a bridge rectifier. With D1, D2, D3 and D4 was
noted:

Figure 2.5

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer a.)
28.
1p

Figure 2.5 shows a bridge rectifier. With Vp was noted:

30

Analog Electronics - Tests

a.)

Figure 2.5

the amplitude value of the AC voltage applied across the primary of


the power transformer
b.) the effective value of the AC voltage applied across the primary of
the power transformer
c.)
the instantaneous value of the AC voltage applied across the
primary of the power transformer
d.) the total value of the voltage applied across the primary of the
power transformer
Correct answer a.)
29.
1p

Figure 2.5 shows a bridge rectifier. With Vs was noted:

a.)

Figure 2.5

the amplitude value of the AC voltage drop across the secondary of


the power transformer
b.) the effective value of the AC voltage drop across the secondary of
the power transformer
c.)
the instantaneous value of the AC voltage drop across the
secondary of the power transformer
d.) the total value of the voltage drop across the secondary of the
power transformer
Correct answer b.)
30.
2p

Figure 2.5 shows a bridge rectifier. In normal operation:

31

Analog Electronics - Tests

a.)

Figure 2.5

on the positive half wave D1, D2, D3, and D4, diodes operate in on
state
b.) on the positive half wave D1 and D3 diodes operate in on state
and D2 and D4 diodes operates in off state
c.)
on the positive half wave D2 and D4 diodes operate in on state
and D1 and D3 diodes operate in off state
d.) on the positive half wave D1, D2, D3, and D4 diodes operate in off
state
Correct answer b.)
31.
2p

Figure 2.5 shows a bridge rectifier. In normal operation:

a.)

Figure 2.5

on the negative half wave D1, D2, D3, and D4, diodes operate in
on state
b.) on the negative half wave D1 and D3 diodes operate in on state
and D2 and D4 diodes operates in off state
c.)
on the negative half wave D2 and D4 diodes operate in on state
and D1 and D3 diodes operate in off state
d.) on the negative half wave D1, D2, D3, and D4 diodes operate in off
state
Correct answer c.)
32.
4p

See figure2.5. The DC component of the voltage drop across the load
resistor is:

32

Analog Electronics - Tests

Figure 2.5

2Vs
a.)
VL =

Vs
b.)
VL =
2
V
c.)
VL = s

V
VL = 2 s
d.)

Correct answer a.)

33.
1p

Figure 2.6 shows::

a.) a half wave rectifier


b.) a full wave rectifier
c.)
a bridge rectifier
d.) a peak rectifier
Correct answer d.)
34.
1p

Figure 2.6

Figure 2.6 shows a peak rectifier. With Tr was noted:

33

Analog Electronics - Tests

Figure 2.6

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer c.)
35.
1p

Figure 2.6 shows a peak rectifier. With RL was noted:

Figure 2.6

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer a.)
36.
1p

Figure 2.6 shows a peak rectifier. With D was noted:

a.)
b.)
c.)
d.)

Figure 2.6

the load resistor


the non-linear elements, providing the effect of recovery
the power transformer
the filtering element
34

Analog Electronics - Tests

Correct answer b.)


37.
1p

Figure 2.6 shows a peak rectifier. With C was noted:

Figure 2.6

a.) the load resistor


b.) the non-linear elements, providing the effect of recovery
c.)
the power transformer
d.) the filtering element
Correct answer d.)
38.
1p

Figure 2.6 shows a peak rectifier. With Vp was noted:

Figure 2.6

a.)

the amplitude value of the AC voltage applied across the primary of


the power transformer
b.) the effective value of the AC voltage applied across the primary of
the power transformer
c.)
the instantaneous value of the AC voltage applied across the
primary of the power transformer
d.) the total value of the voltage applied across the primary of the
power transformer
Correct answer a.)
39.
1p

Figure 2.6 shows a peak rectifier. With Vs was noted:

35

Analog Electronics - Tests

Figure 2.6

a.)

the amplitude value of the AC voltage drop across the secondary of


the power transformer
b.) the effective value of the AC voltage drop across the secondary of
the power transformer
c.)
the instantaneous value of the AC voltage drop across the
secondary of the power transformer
d.) the total value of the voltage drop across the secondary of the
power transformer
Correct answer b.)
40.
1p

Figure 2.6 shows a peak rectifier. With vL was noted:

a.)
b.)
c.)

Figure 2.6

the amplitude value of the AC voltage drop across the load resistor
the effective value of the AC voltage drop across the load resistor
the instantaneous value of the AC voltage drop across the load
resistor
d.) the total value of the voltage drop across the load resistor
Correct answer d.)
41.
1p

Figure 2.6 shows a peak rectifier. With iL was noted:

a.)

Figure 2.6

the amplitude value of the AC load current


36

Analog Electronics - Tests

b.) the effective value of the AC load current


c.)
the instantaneous value of the AC load current
d.) the total value of the load current
Correct answer d.)
42.
1p

See figure 2.6. Diode D is conducting:

Figure 2.6

a.) on the positive half wave


b.) on the negative half wave
c.)
a relatively small time interval of the positive half wave
d.) a relatively small time interval of the negative half wave
Correct answer c.)
43.
2p

Figure 2.7 shows the wave forms of a:


V

Vs

VL

Vl

T
Figure 2.7

a.) half wave rectifier


b.) full wave rectifier
c.)
clipping circuit
d.) peak rectifier
Correct answer d.)
44.
4p

See figure2.6. The DC component of the voltage drop across the load
resistor:

37

Analog Electronics - Tests

Figure 2.6

a.) increases with increase in load current


b.) decreases with increase in load current
c.)
does not depend on the current value of the load
d.) decreases with decrease in load current
Correct answer b.)
45.
4p

See figure2.6. The AC component of the voltage drop across the load
resistor:

Figure 2.6

a.) increases with increase in load current


b.) decreases with increase in load current
c.)
does not depend on the current value of the load
d.) increases with decrease in load current
Correct answer a.)

38

Analog Electronics - Tests

Chapter 3
Bipolar Junction Transistor

1.
3p

Consider a pnp or a npn structure. According to general


definition of a Bipolar Junction Transistor, this type of structure
behaves like a Bipolar Junction Transistor if:
a.) the base is very narrow (only)
b.) the emitter is heavily doped (only)
c.) the base is very narrow and the emitter is heavily doped
d.) the base is very narrow or the emitter is heavily doped
Correct answer c.)

2.
2p

The emitter of a Bipolar Junction Transistor:

a.)

is intended to "collect" mainstream carriers flowing through the


structure
b.) is intended to "control" mainstream carriers flowing through the
structure
c.) is intended to "generate" mainstream carriers flowing through the
structure
d.) has no role
Correct answer c.)
3.
2p

The collector of a Bipolar Junction Transistor:

a.)

is intended to "collect" mainstream carriers flowing through the


structure
b.) is intended to "control" mainstream carriers flowing through the
structure
c.) is intended to "generate" mainstream carriers flowing through the
structure
d.) has no role
Correct answer c.)
39

Analog Electronics - Tests

4.
2p

The base of a Bipolar Junction Transistor:

5.
1p

Figure 3.1 shows:

a.)

is intended to "collect" mainstream carriers flowing through the


structure
b.) is intended to "control" mainstream carriers flowing through the
structure
c.) is intended to "generate" mainstream carriers flowing through the
structure
d.) has no role
Correct answer b.)

B
E
Figure 3.1

a.) a n channel field effect transistor


b.) a p channel field effect transistor
c.) a pnp bipolar junction transistor
d.) a npn bipolar junction transistor
Correct answer d.)
6.
1p

Figure 3.2 shows:


C

B
E
Figure 3.2

a.) a n channel field effect transistor


b.) a p channel field effect transistor
c.) a pnp bipolar junction transistor
d.) a npn bipolar junction transistor
Correct answer c.)
40

Analog Electronics - Tests

7.
2p

A bipolar junction transistor operating in cut-off mode behaves as:

a.) a current controlled source


b.) a short circuit
c.) an open circuit
d.) a switch
Correct answer c.)
8.
2p

A bipolar junction transistor operating in saturation mode behaves


as:
a.) a current controlled source
b.) a short circuit
c.) an open circuit
d.) a switch
Correct answer b.)

9.
2p

A bipolar junction transistor operating in active mode behaves as:

a.) a current controlled source


b.) a short circuit
c.) an open circuit
d.) a switch
Correct answer a.)
10.
3p

An approximate mathematical model of a bipolar junction transistor


operating in cut-off mode is:
a.) i C 0 and i B 0
b.) v BC 0 and v BE 0
c.) i C i B and v BE V

d.)

iC i E and v BE V

Correct answer a.)


11.
3p

An approximate mathematical model of a bipolar junction transistor


operating in saturation mode is:
a.) i C 0 and i B 0
b.) v BC 0 and v BE 0
c.) i C i B and v BE V

d.)

iC i E and v BE V
41

Analog Electronics - Tests

Correct answer b.)


12.
2p

If a bipolar junction transistor operates in active mode:

a.) emitter-base junction is on and collector-base junction is off


b.) emitter-base junction is off and collector-base junction is on
c.) emitter-base junction is off and collector-base junction is off
d.) emitter-base junction is on and collector-base junction is on
Correct answer a.)
13.
2p

14.
2p

15.
2p

If a bipolar junction transistor operates in saturation mode:

a.) emitter-base junction is on and collector-base junction is off


b.) emitter-base junction is off and collector-base junction is on
c.) emitter-base junction is off and collector-base junction is off
d.) emitter-base junction is on and collector-base junction is on
Correct answer d.)
If a bipolar junction transistor operates in cut-off mode:

a.) emitter-base junction is on and collector-base junction is off


b.) emitter-base junction is off and collector-base junction is on
c.) emitter-base junction is off and collector-base junction is off
d.) emitter-base junction is on and collector-base junction is on
Correct answer c.)
If a bipolar junction transistor operates in reverse active mode:

a.) emitter-base junction is on and collector-base junction is off


b.) emitter-base junction is off and collector-base junction is on
c.) emitter-base junction is off and collector-base junction is off
d.) emitter-base junction is on and collector-base junction is on
Correct answer b.)
16.
1p

A bipolar junction transistor works as a simple transistor amplifier


if:
a.) it operates in active mode
b.) it operates in saturation mode
c.) it operates in cut-off mode
d.) it operates in reverse active mode
Correct answer a.)
42

Analog Electronics - Tests

17.
3p

If a transistor operates in active mode emitter-base junction is on


and collector-base junction is off. In this situation the so called
transistor effect occurs. It means:
a.) that a current of relatively high value is flowing through the emitter
junction
b.) that a current of relatively small value is flowing through the
emitter junction
c.) that a current of relatively high value is flowing through the
collector junction
d.) that a current of relatively small value is flowing through the
collector junction
Correct answer c.)

18.
3p

If a transistor operates in active mode the so called transistor


effect occurs. It means that a current of relatively high value is
flowing through the collector junction which is in off state. The
explanation lies in the fact that:
a.) there is a tunneling effect into the base
b.) there is a tunneling effect into the emitter
c.) the base is very narrow and so the mobile carriers injected by the
emitter into the base may reach the collector layer
d.) there is a tunneling effect into the collector
Correct answer c.)

19.
1p

Figure 3.3 shows:


iC
iB

vCE
Input

vB E
Figure 3.3

a.) common emitter connection


b.) common base connection
c.) common collector connection
d.) common drain connection
Correct answer a.)
20.
1p

Figure 3.4 shows:


43

Output

Analog Electronics - Tests


iE
iB

vE C Output
Input

vB C
Figure 3.4

a.) common emitter connection


b.) common base connection
c.) common collector connection
d.) common drain connection
Correct answer c.)
21.
1p

Figure 3.5 shows:


iC

iE

Input

vEB

vCB Output

Figure 3.5

a.) common emitter connection


b.) common base connection
c.) common collector connection
d.) common drain connection
Correct answer b.)
22.
2p

In common emitter connection:

a.)

b.)

c.)

input signals are:


* base-emitter voltage
* base current
output signals are:
* collector-emitter voltage
* collector current
input signals are:
* base-collector voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
input signals are:
* emitter-base voltage
44

Analog Electronics - Tests

* emitter current
output signals are:
* collector-base voltage
* collector current
d.) input signals are:
* base-emitter voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
Correct answer a.)
23.
2p

In common collector connection:

24.

In common base connection:

a.)

input signals are:


* base-emitter voltage
* base current
output signals are:
* collector-emitter voltage
* collector current
b.) input signals are:
* base-collector voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
c.) input signals are:
* emitter-base voltage
* emitter current
output signals are:
* collector-base voltage
* collector current
d.) input signals are:
* base-emitter voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
Correct answer b.)

45

Analog Electronics - Tests

2p

a.)

input signals are:


* base-emitter voltage
* base current
output signals are:
* collector-emitter voltage
* collector current
b.) input signals are:
* base-collector voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
c.) input signals are:
* emitter-base voltage
* emitter current
output signals are:
* collector-base voltage
* collector current
d.) input signals are:
* base-emitter voltage
* base current
output signals are:
* emitter-collector voltage
* emitter current
Correct answer c.)
25.
3p

Under quasi-static large signal regime, the bipolar junction


transistor is fully described by two and only two equations, called
static characteristic equations, or in short, static characteristics.
Typically these are:
a.) i C = iC (v CB , i B ) and i B = i B (v BE , v CE )
b.) iC = i C (v CE , i B ) and i B = i B (v BC , v CE )
c.) iC = i C (v CE , i B ) and i B = i B (v BE , v CE )
d.) iC = i C (i C , i B ) and i B = i B (v BE , v CE )
Correct answer c.)

26.
3p

The output static characteristic is:

46

Analog Electronics - Tests

a.)

iC = i C (vCE ) i B = const.

b.)

iC = i C (i B ) v CE = const.

c.)

i B = i B (v BE ) v CE =const .

d.)

i B = i B (v CE ) v BE =const.

Correct answer b.)


27.
3p

The input static characteristic is:


a.)

iC = i C (v CE ) i B = const.

b.)

iC = i C (i B ) v CE = const .

c.)

i B = i B (v BE ) v CE =const.

d.)

i B = i B (v CE ) v BE =const .

Correct answer c.)


28.
1p

Figure 3.6 shows the output static characteristic 1is denoted:


iC
iB4

vCB=0

iB3
3

iB2
iB1

vCE

a.) active region


b.) saturation region
c.) cut-off region
d.) reverse active region
Correct answer b.)

29.
1p

Figure 3.6

Figure 3.6 shows the output static characteristic 2is denoted:

47

Analog Electronics - Tests


iC
vCB=0

iB4

iB3
3

iB2
iB1

vCE

Figure 3.6

a.) active region


b.) saturation region
c.) cut-off region
d.) reverse active region
Correct answer c.)

30.
1p

Figure 3.6 shows the output static characteristic 3is denoted:


iC
vCB=0

iB4

iB3
3

iB2
iB1

vCE

Figure 3.6

a.) active region


b.) saturation region
c.) cut-off region
d.) reverse active region
Correct answer a.)

31.

Figure 3.7 shows:


iB
vCE1
vCE2>vCE1

vBE

Figure 3.7

48

Analog Electronics - Tests

a.) the output static characteristic


b.) the input static characteristic
c.) the transfer static characteristic
d.) the transfer dynamic characteristic
Correct answer b.)

32.
3p

Equivalent circuit of a transistor that operates in cut-off mode is


shown in figure noted:
C
a.) B
vBE

vCE

b.)

iB

iC

c.)

iB

C
FiB

v BE
E

d.)

iB

C
FiB

IS/F
E

Correct answer a.)


33.
3p

Equivalent circuit of a transistor that operates in saturation mode is


shown in figure noted:
C
a.) B
vBE

vCE

b.)

iB

iC

c.)

B
v BE

iB

C
FiB

49

Analog Electronics - Tests

d.)

iB

IS/F

C
FiB

Correct answer b.)


34.
3p

The so called zero order model of bipolar junction transistor


operating in active mode (large signal quasi-static regime) is:
a.) v BE const . and iC iE
b.) v BE V and i C i B
c.)

d.)

iB =
v BE

v
v
IS
exp BE and i C = I S exp BE
F
e
T
eT
V and i B i C

Correct answer a.)


35.
3p

The so called first order model of bipolar junction transistor


operating in active mode (large signal quasi-static regime) is:
a.) v BE const . and iC iE
b.) v BE V and i C i B
c.)
d.)

iB =
v BE

v
v
IS
exp BE and i C = I S exp BE
F
eT
eT
V and i B i C

Correct answer b.)


36.
3p

The so called second order model of bipolar junction transistor


operating in active mode (large signal quasi-static regime) is:
a.) v BE const . and iC iE
b.) v BE V and i C i B
c.)
d.)

iB =
v BE

v
v
IS
exp BE and i C = I S exp BE
F
eT
eT
V and i B i C

Correct answer c.)


37.
3p

Assume a bipolar junction transistor operating under quasi-static


large signal regime in active region. The equivalent circuit of such a
50

Analog Electronics - Tests

transistor related to first order model is:


C
a.) B
vBE

vCE

b.)

iB

iC

c.)

iB

C
FiB

v BE
E

d.)

iB

C
FiB

IS/F
E

Correct answer c.)


38.
3p

Assume a bipolar junction transistor operating under quasi-static


large signal regime in active region. The equivalent circuit of such a
transistor related to second order model is:
C
a.) B
vBE

vCE

b.)

iB

iC

c.)

iB

C
FiB

v BE
E

d.)

B
IS/F

iB

C
FiB

Correct answer d.)


39.
3p

See figure 3.8. 1 is denoted:

51

Analog Electronics - Tests


iC

2.

1.
IB=0
vCE

a.) primer breakdown


b.) secondary breakdown
c.) thermal runaway
d.) tunneling phenomenon
Correct answer a.)

40.
3p

Figure 3.8

See figure 3.8. 2 is denoted:


iC

2.

1.
IB=0
vCE

a.) primer breakdown


b.) secondary breakdown
c.) thermal runaway
d.) tunneling phenomenon
Correct answer b.)

41.
3p

Figure 3.8

Due to thermal runaway phenomenon:


a.) iC increases uncontrollably when ambient temperature increases
b.) iC decreases uncontrollably when ambient temperature increases
c.) iC increases uncontrollably when ambient temperature decreases
d.) iC decreases uncontrollably when ambient temperature decreases
Correct answer a.)

42.
3p

Due to thermal runaway phenomenon iC increases uncontrollably


when ambient temperature increases: The explanation is that a
regenerative phenomenon can occur in the structure. That means:
a.) decreasing of ambient temperature leads to increasing of junction
temperature. Increasing of junction temperature leads to increasing
52

Analog Electronics - Tests

of collector current. On the other hand, increasing of collector


current leads to increasing of junction temperature. In these
conditions a regenerative phenomenon occurs in the structure.
b.) increasing of ambient temperature leads to increasing of junction
temperature. Increasing of junction temperature leads to increasing
of collector current. On the other hand, increasing of collector
current leads to increasing of junction temperature. In these
conditions a regenerative phenomenon occurs in the structure.
c.) decreasing of ambient temperature leads to decreasing of junction
temperature. Decreasing of junction temperature leads to increasing
of collector current. On the other hand, increasing of collector
current leads to increasing of junction temperature. In these
conditions a regenerative phenomenon occurs in the structure.
d.) increasing of ambient temperature leads to decreasing of junction
temperature. Decreasing of junction temperature leads to increasing
of collector current. On the other hand, increasing of collector
current leads to increasing of junction temperature. In these
conditions a regenerative phenomenon occurs in the structure.
Correct answer b.)

43.
3p

The voltage drop across the base-emitter junction varies with


temperature difference about:
a.) 1-1.5 mV/oC
b.) 2-2.5 mV/oC
c.) 10-15 mV/o C
d.) 20-25 mV/o C
Correct answer b.)

44.
1p

The operating limitations of a bipolar junction transistor are


presented in figure 3.9. With 1 was denoted:
4

iC

2
1
Cut-off
region
Saturation
region
3

a.)

Figure 3.9

vCE

maximum value of the voltage collector-emitter


53

Analog Electronics - Tests

b.) maximum value of the collector current


c.) maximum value of the power dissipation
d.) safe area
Correct answer b.)

45.
1p

The operating limitations of a bipolar junction transistor are


presented in figure 3.9. With 2 was denoted:
4

iC

2
1
Cut-off
region
Saturation
region
3

vCE

Figure 3.9

a.) maximum value of the voltage collector-emitter


b.) maximum value of the collector current
c.) maximum value of the power dissipation
d.) safe area
Correct answer c.)

46.
1p

The operating limitations of a bipolar junction transistor are


presented in figure 3.9. With 3 was denoted:
4

iC

2
1
Cut-off
region
Saturation
region
3
Figure 3.9

vCE

a.) maximum value of the voltage collector-emitter


b.) maximum value of the collector current
c.) maximum value of the power dissipation
d.) safe area
Correct answer a.)
54

Analog Electronics - Tests

47.
1p

The operating limitations of a bipolar junction transistor are


presented in figure 3.9. With 4 was denoted:
4

iC

2
1
Cut-off
region
Saturation
region
3

vCE

Figure 3.9

a.) maximum value of the voltage collector-emitter


b.) maximum value of the collector current
c.) maximum value of the power dissipation
d.) safe area
Correct answer d.)

48.
3p

A possible mathematic model for a bipolar junction transistor


operating under quasi-static small signal regime is:
a.) i C i B and v BE V
b.)

v
v
I
i C = I S exp BE and i B = S exp BE
F
eT
eT
c.)
1
v
ic =
v be and i b = be
gm
r
d.)
v
i c = g m v be and i b = be
r
Correct answer d.)
49.
3p

di C
I
C . The value is:
dv BE e T
a.) gm[mS]=2.5IC[mA]
b.) gm[mS]=4IC[mA]
c.) gm[mS]=25IC[mA]
d.) gm[mS]=40IC[mA]
Correct answer d.)

Assume that g m =

55

Analog Electronics - Tests

50.
3p

The relationship between g m (trans-conductance) and r (input


resistance) is:
a.) g m r =
b.) g m = r
c.) r = g m
d.) g m
=
r
Correct answer a.)

51.
3p

The bias circuits of the bipolar transistor are designed to:

52.
4p

a.)
b.)

stabilize the quiescent point only for the effects of temperature


stabilize the quiescent point only for the effects scattering
parameters
c.) stabilize the quiescent point for the effects of temperature or for the
effects scattering parameters
d.) stabilize the quiescent point for the effects of temperature and for
the effects scattering parameters
Correct answer a.)
Figure 3.10 shows a simple bias circuit.

Figure 3.10

The equivalent circuit (for quasi-static regime) of this circuit is:


a.)

56

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer d.)


53.
4p

Figure 3.10 shows a simple bias circuit. The value of IC is given by:

a.)

E C VBE
RC
b.)
E + VBE
IC = C
RC
c.)
E C VBE
IC =
RB
d.)
E + VBE
IC = C
RB
Correct answer c.)

54.
4p

IC =

Figure 3.11 shows a typical bias circuit. RE is used for thermal


stability. The mechanism by which this is accomplished is:

Figure 3.11

57

Analog Electronics - Tests

a)

T IC VRE VE VBE IC

b)

T IC VRE VE VBE IC

c)

T IC VRE VE VBE IC

d)

T IC VRE VE VBE IC

where:
VRE
- drop voltage across RE;
VE
- emitter voltage.
Correct answer a.)
55.
4p

Figure 3.11 shows a typical bias circuit.

Figure 3.11

The equivalent circuit is:


a)

b)

58

Analog Electronics - Tests

c)

d)

Correct answer a.)


56.
4p

Figure 3.11 shows a typical bias circuit. Figure 3.12 shows the
equivalent circuit. According to Kirchhoffs theorems one obtains:

Figure 3.11

Figure 3.12

a) I=I1+IB
I2 =I1+IB
IB+IB=IE
EC=IBRC+VCE+IERE
-VBE=-VCE-IBRC+I1RB1
VBE=I2RB2-IERE
b) I=I1+IB
I1 =I2+IB
IB+IB=IE
EC=IBRC+VCE+IBRE
-VBE=-VCE-IBRC+I1RB1
59

Analog Electronics - Tests

VBE=I2RB2-IERE
c) I=I1+IB
I1=I2+IB
IB+IB=IE
EC=IBRC+VBE+IERE
-VBE=-VCE-IBRC+I1RB1
VBE=I2RB2-IERE
d) I=I1+IB
I1=I2+IB
IB+IB=IE
EC=IBRC+VCE+IERE
-VBE=-VCE-IBRC+I1RB1
VBE=I2RB2-IERE
Correct answer d.)
57.
4p

Figure 3.11 shows a typical bias circuit.

Figure 3.11

Appling Thevenin rule, the circuit may be redrawn as:


a)

60

Analog Electronics - Tests

b)

c)

d)

R B2
R B1 + R B2
Correct answer b.)

where: E B = E C

58.
4p

and

RB =

R B1 R B 2
R B1 + R B 2

Figure 3.11 shows a typical bias circuit. Figure 3.13 shows the same
circuit redrawn according to Thevenin rule.

Figure 3.11

Figure 3.13

The equivalent circuit is:

61

Analog Electronics - Tests

a)

b)

c)

d)

Correct answer c.)


59.
4p

Figure 3.11 shows a typical bias circuit. Figure 3.13 shows the same
circuit redrawn according to Thevenin rule. The equivalent circuit of
this circuit is presented in figure 3.14. According to Kirchhoffs
theorems one obtains:

62

Analog Electronics - Tests

a)

Figure 3.14

IE=IE+IB
EC=IBIC+VCE+IE
EB-VBE=REIE+RBIB

b) IE=IB+IC
EC=IBIC+VCE+IE
EB-VBE=REIE+RBIB
c)

IE=IB+IB
EC=IBIC+VCE+IE
EB-VBE=REIE+RBIB

d)

IE=IB+IB
EC=IBIC+VBE+IE
EB-VBE=REIE+RBIB

R B2
R B1 + R B2
Correct answer c.)

where: E B = E C

60.
4p

and

RB =

R B1 R B 2
R B1 + R B 2

Figure 3.11 shows a typical bias circuit. The value of IC is given


by:

a)

(E B VBE )
IC =
R B + ( + 1)R E

Figure 3.11

63

Analog Electronics - Tests

b)
c)
d)

(E C VBE )
R B + ( + 1)R E
(E B VBE )
IC =
R E + ( + 1)R B
IC =

IC =

(E B VCE )
R B + ( + 1)R E

Correct answer a.)


61.
3p

One of the mathematical models for quasi-static small signal regime


of a bipolar transistor is:
a) i C i B and v BE V

b)

v
v
I
i C = I S exp BE and i B = S exp BE
e

F
T
eT
c)
1
v
ic =
v be and i b = be
gm
r
d)
v
i c = i b and i b = be
r
Correct answer d.)
62.
2p

One of the mathematical models for quasi-static small signal regime


of a bipolar transistor is:
v
i c = i b and i b = be
r
According to this mathematical model the equivalent is:
a)

b)

c)

64

Analog Electronics - Tests

d)

Correct answer a.)


63.
2p

One of the mathematical models for quasi-static small signal regime


of a bipolar transistor is:
v
ic = g m v be and i b = be
r
According to this mathematical model the equivalent is:
a)

b)

c)

d)

Correct answer b.)

65

Analog Electronics - Tests

66

Analog Electronics - Tests

Chapter 4
Bipolar Junction Transistor
Fundamental Circuits

1.
1p

Schematic diagram of a common emitter stage is shown in figure:

a.)

b.)

c.)

d.)

Correct answer a.)


2.
1p

Schematic diagram of a common collector stage is shown in figure:

67

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer b.)


3.
1p

Schematic diagram of a common base stage is shown in figure:

a.)

b.)

68

Analog Electronics - Tests

c.)

d.)

Correct answer c.)


4.
2p

Schematic diagram of a common emitter stage is shown in figure 4.1


Bipolar junction transistor T is operating in cut-off region if:

a.)
vIN<V
b.) V<vIN<VBEsat
c.)
vINvBEsat
d.) vIN>>vBEsat
Correct answer a.)
5.
2p

Figure 4.1

Schematic diagram of a common emitter stage is shown in figure 4.1


Bipolar junction transistor T is operating in active region if:

a.)
vIN<V
b.) V<vIN<VBEsat
c.)
vINvBEsat
d.) vIN>>vBEsat
Correct answer b.)

Figure 4.1

69

Analog Electronics - Tests

6.
2p

Schematic diagram of a common emitter stage is shown in figure 4.1


Bipolar junction transistor T is operating in saturation region if:

Figure 4.1

a.)
vIN<V
b.) V<vIN<VBEsat
c.)
vINvBEsat
d.) vIN>>vBEsat
Correct answer b.)
7.
2p

Schematic diagram of a common collector stage is shown in figure


4.2. Bipolar junction transistor T is operating in cut-off region if:

a.)

vIN ( , V )

Figure 4.2

b.)

v IN V , E C )

c.)
d.)

v IN = E C
v IN ( , V )

Correct answer a.)


8.
2p

Schematic diagram of a common collector stage is shown in figure


4.2. Bipolar junction transistor T is operating in active region if:

a.)

vIN ( , V )

Figure 4.2

70

Analog Electronics - Tests

b.)

v IN V , E C )

c.)
d.)

v IN = E C
v IN ( , V )

Correct answer b.)


9.
2p

Schematic diagram of a common collector stage is shown in figure


4.2. Bipolar junction transistor T is operating in saturation region
if:

a.)

vIN ( , V )

Figure 4.2

b.)

v IN V , E C )

c.)
d.)

v IN = E C
v IN ( , V )

Correct answer c.)


10.
2p

Schematic diagram of a common base stage is shown in figure 4.3.


Bipolar junction transistor T is operating in cut-off region if:

a.)
b.)
c.)

v IN v BEsat
v IN ( v BEsat , V )

Figure 4.3

v IN V , + )

d.)
v IN [ v BEsat , + )
Correct answer c.)
11.
2p

Schematic diagram of a common base stage is shown in figure 4.3.


Bipolar junction transistor T is operating in active region if:
71

Analog Electronics - Tests

a.)
b.)
c.)

v IN v BEsat
v IN ( v BEsat , V )

Figure 4.3

v IN V , + )

d.)
v IN [ v BEsat , + )
Correct answer b.)
12.
2p

Schematic diagram of a common base stage is shown in figure 4.3.


Bipolar junction transistor T is operating in saturation region if:

a.)
b.)
c.)

v IN v BEsat
v IN ( v BEsat , V )

Figure 4.3

v IN V , + )

d.)
v IN [ v BEsat , + )
Correct answer a.)
13.
2p

Schematic diagram of a common emitter stage is shown in figure 4.1.

Figure 4.1

Bipolar junction transistor T is operating in cut-off region if vIN<V


In these circumstances, the equivalent circuit (quasi-static large
signal regime) is:

72

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer a.)


14.
3p

Schematic diagram of a common collector stage is shown in figure


4.2.

Figure 4.2

Bipolar junction transistor, T is operating in cut-off region if


v IN ( , V ) . In these circumstances, the equivalent circuit (quasistatic large signal regime) is:
a.)

73

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer b.)


15.
3p

Schematic diagram of a common base stage is shown in figure 4.3.

Figure 4.3

Bipolar junction transistor, T is operating in cut-off region if


v IN V ,+ ). In these circumstances, the equivalent circuit (quasi-

static large signal regime) is:


a.)

b.)

c.)

74

Analog Electronics - Tests

d.)

Correct answer c.)


16.
2p

Schematic diagram of a common emitter stage is shown in figure 4.1.

Figure 4.1

Bipolar junction transistor, T is operating in active region if


V<vIN<VBEsat. In these circumstances, the equivalent circuit (quasistatic large signal regime) is:
a.)

b.)

c.)

d.)

Correct answer a.)


75

Analog Electronics - Tests

17.
2p

Schematic diagram of a common collector stage is shown in figure


4.2.

Figure 4.2

Bipolar junction transistor, T is operating in active region if


vIN [ V , EC). In these circumstances, the equivalent circuit (quasistatic large signal regime) is:
a.)

b.)

c.)

d.)

Correct answer b.)


18.
2p

Schematic diagram of a base collector stage is shown in figure 4.3.

76

Analog Electronics - Tests

Figure 4.3

Bipolar junction transistor, T is operating in active region if


v IN ( v BEsat , V ) . In these circumstances, the equivalent circuit
(quasi-static large signal regime) is:
a.)

b.)

c.)

d.)

Correct answer c.)


19.
2p

Schematic diagram of a common emitter stage is shown in figure 4.1.

77

Analog Electronics - Tests


Figure 4.1

Bipolar junction transistor, T is operating in saturation region if


vINvBEsat. In these circumstances, the equivalent circuit (quasi-static
large signal regime) is
a.)

b.)

c.)

d.)

Correct answer a.)


20.
2p

Schematic diagram of a common collector stage is shown in figure


4.2.

Figure 4.2

Bipolar junction transistor, T is operating in saturation region if


vIN=EC. In these circumstances, the equivalent circuit (quasi-static
large signal regime) is:

78

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer b.)


21.
2p

Schematic diagram of a common base stage is shown in figure 4.3.

Figure 4.3

Bipolar junction transistor, T is operating in saturation region if


v IN v BEsat . In these circumstances, the equivalent circuit (quasistatic large signal regime) is:
a.)

79

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer c.)


22.
4p

Schematic diagram of a common emitter stage is shown in figure 4.1.


If the bipolar junction transistor T is operating in cut-off region,
the output voltage is:

a.)
b.)

vO=EC
v O v CEsat

c.)
d.)

vO=0
v O v BE sat

Figure 4.1

Correct answer a.)


23.
4p

Schematic diagram of a common collector stage is shown in figure


4.2. If the bipolar junction transistor T is operating in cut-off
region, the output voltage is:

80

Analog Electronics - Tests

Figure 4.2

a.)
b.)

vO=EC
v O v CEsat

c.)
d.)

vO=0
v O v BEsat

Correct answer c.)


24.
4p

Schematic diagram of a common base stage is shown in figure 4.3. If


the bipolar junction transistor T is operating in cut-off region, the
output voltage is:

a.)
b.)
c.)
d.)

vO=EC
v O v CE sat
vO=0
v O v BEsat

Figure 4.3

Correct answer a.)


25.
4p

Schematic diagram of a common emitter stage is shown in figure 4.1.


If the bipolar junction transistor T is operating in active region, the
output voltage is:

a.)

Figure 4.1

v
v O = E C R C IS exp IN
eT
81

Analog Electronics - Tests

b.)
c.)
d.)

vO=vIN-vBE
vO 0
v O = E C ISR C exp

v IN
eT

Correct answer d.)


26.
4p

Schematic diagram of a common collector stage is shown in figure


4.2. If the bipolar junction transistor T is operating in active
region, the output voltage is:

Figure 4.2

a.)

v
v O = E C R C IS exp IN
eT
b.) vO=vIN-vBE
c.)
vO 0
d.)
v
v O = E C ISR C exp IN
eT
Correct answer b.)
27.
4p

Schematic diagram of a common base stage is shown in figure 4.3. If


the bipolar junction transistor T is operating in active region, the
output voltage is:

Figure 4.3

a.)
b.)
c.)

v
v O = E C R C IS exp IN
eT
vO=vIN-vBE
vO 0

82

Analog Electronics - Tests

d.)

v O = E C ISR C exp

v IN
eT

Correct answer a.)


28.
4p

Schematic diagram of a common emitter stage is shown in figure 4.1.


If the bipolar junction transistor T is operating in saturation
region, the output voltage is:

Figure 4.1

a.)
vO=vCEsat
b.) vO=EC-vCEsat
c.)
vO=EC
d.) vO=EC-vBEsat
Correct answer a.)
29.
4p

Schematic diagram of a common collector stage is shown in figure


4.2. If the bipolar junction transistor T is operating in saturation
region, the output voltage is:

Figure 4.2

a.)
vO=vCEsat
b.) vO=EC-vCEsat
c.)
vO=EC
d.) vO=EC-vBEsat
Correct answer b.)
30.
4p

Schematic diagram of a common base stage is shown in figure 4.3. If


the bipolar junction transistor T is operating in saturation region,
the output voltage is:

83

Analog Electronics - Tests

Figure 4.3

a.)
vO=vCEsat
b.) vO=EC-vCEsat
c.)
vO 0
d.) vO=EC-vBEsat
Correct answer c.)
31.
3p

The transfer characteristic of a common emitter stage is shown in


figure:
vO
a.)
EC

vBEsat

vCEsat
0.5V 1V

b.)

vIN

vO
EC-vCEsat.

c.)

EC

vIN

vO
EC

-vBEsat

- V

vIN

84

Analog Electronics - Tests

d.)

vO
EC-vCEsat.

EC

vIN

Correct answer a.)


32.
3p

The transfer characteristic of a common collector stage is shown in


figure:
vO
a.)
EC

vBEsat

vCEsat
0.5V 1V

b.)

vIN

vO
EC-vCEsat.

c.)

EC

vIN

vO
EC

-vBEsat

d.)

vIN

- V

vO
EC-vCEsat.

EC

vIN

Correct answer b.)


85

Analog Electronics - Tests

33.
3p

The transfer characteristic of a common base stage is shown in


figure:
vO
a.)
EC

vBEsat

vCEsat
0.5V 1V

b.)

vIN

vO
EC-vCEsat.

c.)

EC

vIN

vO
EC

-vBEsat

d.)

vIN

- V

vO
EC-vCEsat.

EC

vIN

Correct answer c.)


34
4p

The common emitter amplifier is presented in figure:

86

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer a.)


35
4p

The common collector amplifier is presented in figure:

a.)

87

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer b)
36
4p

The common base amplifier is presented in figure:

a.)

b.)

88

Analog Electronics - Tests

c.)

d.)

Correct answer d.)


38
3p

Figure 4.4 shows a common-emitter amplifier.

Figure 4.4

The equivalent circuit (quasi-static small signal regime) is:


a.)

b.)

89

Analog Electronics - Tests

c.)

d.)

Correct answer a.)


39
3p

Figure 4.5 shows a common collector amplifier.

Figure 4.5

The equivalent circuit (quasi-static small signal regime) is:


a.)

b.)

c.)

d.)

Correct answer b.)


90

Analog Electronics - Tests

40
3p

Figure 4.6 shows a common base amplifier. The equivalent circuit


(quasi-static small signal regime) is:

Figure 4.6

a.)

b.)

c.)

d.)

Correct answer c.)


41
1p

Figure 4.4 shows a common emitter amplifier. Resistors RB1 and RB2
are designed to:

Figure 4.4

91

Analog Electronics - Tests

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer a.)
42
1p

Figure 4.4 shows a common emitter amplifier. Resistor RE is


designed to:

Figure 4.4

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer b.)
43
1p

Figure 4.4 shows a common emitter amplifier. Resistor RC is


designed to:

Figure 4.4

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer c.)
44
1p

Figure 4.4 shows a common emitter amplifier. Capacitor C1 is


designed to:
92

Analog Electronics - Tests

Figure 4.4

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
45
1p

Figure 4.4 shows a common emitter amplifier. Capacitor C2 is


designed to:

Figure 4.4

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
46
1p

Figure 4.4 shows a common emitter amplifier. Capacitor CE is


designed to:

Figure 4.4

93

Analog Electronics - Tests

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer d.)
47
1p

Figure 4.5 shows a common collector amplifier. Resistors RB1 and RB2
are designed to:

Figure 4.5

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer a.)
48
1p

Figure 4.5 shows a common collector amplifier. Resistor RE is


designed to:

Figure 4.5

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer c.)
49
1p

Figure 4.5 shows a common collector amplifier. Capacitor C1 is


designed to:
94

Analog Electronics - Tests

Figure 4.5

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
50
1p

Figure 4.5 shows a common collector amplifier. Capacitor C2 is


designed to:

Figure 4.5

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
51
1p

Figure 4.6 shows a common base amplifier. Resistors RB1 and RB2 are
designed to:

a.)

assure the base potential

Figure 4.6

95

Analog Electronics - Tests

b.) assure the thermal stability


c.)
be load
d.) assure the base potential and the thermal stability
Correct answer a.)
52
1p

Figure 4.6 shows a common base amplifier. Resistor RE is designed


to:

Figure 4.6

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer b.)
53
1p

Figure 4.6 shows a common base amplifier. Resistor RC is designed


to:

Figure 4.6

a.)
assure the base potential
b.) assure the thermal stability
c.)
be load
d.) assure the base potential and the thermal stability
Correct answer c.)
54
1p

Figure 4.6 shows a common base amplifier. Condenser C1 is designed


to:

96

Analog Electronics - Tests

Figure 4.6

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
55
1p

Figure 4.6 shows a common base amplifier. Condenser C2 is designed


to:

Figure 4.6

a.)
assure the base potential
b.) assure the thermal stability
c.)
be a coupling capacitor
d.) be a decoupling capacitor
Correct answer c.)
56
1p

Figure 4.6 shows a common base amplifier. Condenser CB is designed


to:

Figure 4.6

a.)
b.)
c.)

assure the base potential


assure the thermal stability
be a coupling capacitor
97

Analog Electronics - Tests

d.) be a decoupling capacitor


Correct answer d.)
60.
4p

Figure 4.4 shows a common emitter amplifier. Kipping in mind that


V
A V = o , the voltage gain is:
Vin

Figure 4.4

a.)
A v = g R C
b.)
A v = g m R C
c.)
Av 1
d.)
Av = gmR C
Correct answer a.)
61.
4p

Figure 4.5 shows a common collector amplifier. Kipping in mind that


V
A V = o , the voltage gain is:
Vin

a.)
A v = g R C
b.)
A v = g m R C
c.)
Av 1
d.)
Av = gmR C
Correct answer c.)

Figure 4.5

98

Analog Electronics - Tests

62.
4p

Figure 4.6 shows a common collector amplifier. Kipping in mind that


V
A V = o , the voltage gain is:
Vin

a.)
A v = g R C
b.)
A v = g m R C
c.)
Av 1
d.)
Av = gmR C
Correct answer d.)
63.
4p

Figure 4.6

Figure 4.4 shows a common emitter amplifier. Kipping in mind that


V
R in = in , the input resistance is:
Iin

a.)
b.)
c.)

Figure 4.4

r
r
R in = R E m m
+1
R in = R E

r
r

+1

R in = R B [ r + ( + 1)R E ] R B R E R E

d.)

R in = R B r r
Correct answer d.)
99

Analog Electronics - Tests

64.
4p

Figure 4.5 shows a common collector amplifier. Kipping in mind that


V
R in = in , the input resistance is:
Iin

a.)
b.)
c.)

Figure 4.5

r
r
R in = R E m m
+1
R in = R E

r
r

+1

R in = R B [ r + ( + 1)R E ] R B R E R E

d.)

R in = R B r r
Correct answer c.)

65.
4p

Figure 4.6 shows a common base amplifier. Kipping in mind that


V
R in = in , the input resistance is:
Iin

a.)
b.)

Figure 4.6

R in = R E

rm
r
m
+1

R in = R E

r
r

+1

c.)

R in = R B [ r + ( + 1)R E ] R B R E R E

d.)

R in = R B r r
100

Analog Electronics - Tests

Correct answer a.)


66.
4p

Figure 4.7 shows a common emitter amplifier. The output generator


is necessary in order to estimate the output resistance. The equivalent
circuit (quasi-static small signal regime) is:

a.)

Figure 4.7

b.)

c.)

d.)

Correct answer a.)


67.
4p

Figure 4.8 shows a common collector amplifier. The output generator


is necessary in order to estimate the output resistance. The equivalent
circuit (quasi-static small signal regime) is:

101

Analog Electronics - Tests

Figure 4.8

a.)

b.)

c.)

d.)

Correct answer b.)


68.
4p

Figure 4.9 shows a common base amplifier. The equivalent circuit


(quasi-static small signal regime) necessary in order to estimate the
output resistance is:

a.)

Figure 4.9

102

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer a.)


69.
3p

The output resistance of a common collector amplifier is


a.)

R o = R B [ r + ( + 1)R E ] R B R E R E

b.)

R o = R B r r

c.)

Ro = RE

r
r

+1

d.)
Ro = RC
Correct answer c.)

70
3p

The output resistance of a common emitter amplifier is


a.)

R o = R B [ r + ( + 1)R E ] R B R E R E

b.)

R o = R B r r

c.)

Ro = RE

r
r

+1

Ro = RC
Correct answer d.)
d.)

71
3p

The output resistance of a common base amplifier is


a.)

R o = R B [ r + ( + 1)R E ] R B R E R E

b.)

R o = R B r r
103

Analog Electronics - Tests

c.)

Ro = R E

r
r

+1

Ro = RC
Correct answer d.)
d.)

104

Analog Electronics - Tests

Chapter 5
Junction Field Effect Transistor

1
2p

Basic structure of a junction field effect transistor is shown in figure:


a.)

p++

SiO2
n

n++
channel

b.)

B
SG

SiO2
n ++

n ++
channel
p

c.)

B
SG

p-n
junction
n

p-n
junction
n

D
channel
p

G
S

105

Analog Electronics - Tests

d.)

n ++

SiO2
n

n++
channel

Correct answer c.)


2.
1p

B
S

Figure 5.1 shows the basic structure of a junction field effect


transistor. With S is denoted:
G

p-n
junction
n

p-n
junction
n

D
channel
p

G
S
Figure
5.1

a.)
Source
b.) Drain
c.)
Grill
d.)
Bulk
Correct answer a.)

3.
1p

Figure 5.1 shows the basic structure of a junction field effect


transistor. With G is denoted:
G

p-n
junction
n

p-n
junction
n

D
channel
p

G
S
Figure
5.1

a.)
Source
b.) Drain
c.)
Grill
d.)
Bulk
Correct answer c.)
106

Analog Electronics - Tests

4.
1p

Figure 5.1 shows the basic structure of a junction field effect


transistor. With G is denoted:
G

p-n
junction
n

p-n
junction
n

D
channel
p

a.)
Source
b.) Drain
c.)
Grill
d.)
Bulk
Correct answer c.)

5.
1p

S
Figure
5.1

The symbol of a n channel junction field effect transistor is:


a.)
b.)
c.)
d.)

Correct answer d.)


6.
1p

The symbol of a p channel junction field effect transistor is:


a.)
b.)

107

Analog Electronics - Tests

c.)
d.)

Correct answer c.)


7.
2p

The main current of a junction field effect transistor is flowing


between:
a.)
grill and drain
b.) source and drain
c.)
source and grill
d.)
grill and drain
Correct answer b.)

8.
2p

The main current of a p channel junction field effect transistor is


flowing between source and drain. It is composed of:
a.)
electrons
b.) holes
c.)
positive ions
d.)
negative ions
Correct answer b.)

9.
2p

The main current of a n channel junction field effect transistor is


flowing between source and drain. It is composed of:
a.)
electrons
b.) holes
c.)
positive ions
d.)
negative ions
Correct answer a.)

10.
2p

The main current of a n channel junction field effect transistor is


flowing between source and drain. It is composed of electrons. In
their course, these electrons pass through a region called channel.
The resistance of the channel is controlled by the grill. This control
may be realized if:
a.)
grill-channel junction is operating in off mode
b.) grill-channel junction is operating in on mode
c.)
drain-source junction is operating in off mode
d.)
drain-source junction is operating in on mode
Correct answer a.)
108

Analog Electronics - Tests

11.
3p

The main current of a n channel junction field effect transistor is


flowing between source and drain. It is composed of electrons. In
their course, these electrons pass through a region called channel.
The resistance of the channel is controlled by the grill. This control
may be realized if grill-channel junction is operating in off mode.
The control mechanism is:
a.)
gate voltage changes the space charge region size geometry of
the channel is changed channel resistance is modified channel
current is controlled
b.) gate voltage changes the space charge region size channel
resistance is modified geometry of the channel is changed
channel current is controlled
c.)
geometry of the channel is changed gate voltage changes the
space charge region size channel resistance is modified
channel current is controlled
d.)
channel resistance is modified gate voltage changes the space
charge region size geometry of the channel is changed
channel current is controlled
Correct answer a.)

12.
1p

Common source connection of a junction field effect transistor is


presented in figure:
a.)

b.)

c.)
d.)

Correct answer a.)


13.
1p

Common drain connection of a junction field effect transistor is


presented in figure:

109

Analog Electronics - Tests

a.)

b.)

c.)
d.)

Correct answer c.)


14.
1p

Common grill connection of a junction field effect transistor is


presented in figure:
a.)

b.)

c.)
d.)

Correct answer b.)


15.
3p

In common source connection


a.)

b.)

input signals are:


* grill-source voltage
* grill current
output signals are:
* drain-source voltage
* drain current
input signals are:
* grill-drain voltage
110

Analog Electronics - Tests

* grill current
output signals are:
* source-drain voltage
* source current
c.)
input signals are:
* source-grill voltage
* source current
output signals are:
* drain-grill voltage
* drain current
d.)
input signals are:
* grill-source voltage
* grill current
output signals are:
* source-drain voltage
* source current
Correct answer a.)

16.
3p

In common grill connection


a.)

b.)

c.)

d.)

input signals are:


* grill-source voltage
* grill current
output signals are:
* drain-source voltage
* drain current
input signals are:
* grill-drain voltage
* grill current
output signals are:
* source-drain voltage
* source current
input signals are:
* source-grill voltage
* source current
output signals are:
* drain-grill voltage
* drain current
input signals are:
* grill-source voltage
* grill current
111

Analog Electronics - Tests

output signals are:


* source-drain voltage
* source current
Correct answer c.)

17.
3p

In common drain connection


a.)

input signals are:


* grill-source voltage
* grill current
output signals are:
* drain-source voltage
* drain current
b.) input signals are:
* grill-drain voltage
* grill current
output signals are:
* source-drain voltage
* source current
c.)
input signals are:
* source-grill voltage
* source current
output signals are:
* drain-grill voltage
* drain current
d.)
input signals are:
* grill-source voltage
* grill current
output signals are:
* source-drain voltage
* source current
Correct answer b.)

18.
3p

Typically, a field effect transistor is described by two equations of the


form:
a.)
iG=iG(vGS,vDS) and
iD=iD(vGS,vDS)
b.) iG=iG(vGD,vDS) and
iD=iD(vGS,vDS)
c.)
iG=iG(vGS,vDS) and
iD=iD(vGD,vDS)
d.)
iG=iG(vGD,vDS) and
iD=iD(vGD,vDS)
Correct answer a.)

112

Analog Electronics - Tests

9.
2p

The grill current of a JFET is:


a.)

v
i G = I DSS 1 GS
VT

b.)

v
i G = I DSS 1 GS
VT

c.)
iG 0
d.)
v
i G = DS
rDS
Correct answer c.)

20.
1p

Figure 5.2 shows the output characteristic of a junction field effect


transistor. With I is denoted:
iD

vGS-vT

III.
II.

vGS=0.1V

I.

vGS=-2V
vGS=-4V

vGS=0V

vGS=V T

vDS

Figure 5.2

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer a.)

21.
1p

Figure 5.2 shows the output characteristic of a junction field effect


transistor. With II is denoted:
iD

vGS-vT

III.

vGS=0.1V

II.

vGS=0V
I.

vGS=-2V
vGS=-4V
vGS=V T

Figure 5.2

a.)
b.)

cut-off region
linear region
113

vDS

Analog Electronics - Tests

c.)
saturation region
d.) knee region
Correct answer b.)

22.
1p

Figure 5.2 shows the output characteristic of a junction field effect


transistor. With III is denoted:
iD

vGS-vT

III.
II.

vGS=0.1V

I.

vGS=-2V
vGS=-4V

vGS=0V

vGS=V T

Figure 5.2

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer c.)

23.
2p

24.
2p

A JFET working in linear region operates as:


a.)
controlled resistance
b.) current control current source
c.)
current control voltage source
d.) open circuit
Correct answer a.)

A JFET working in cut-off region operates as:


a.)
controlled resistance
b.) current control current source
c.)
current control voltage source
d.) open circuit
Correct answer d.)

25.
2p

A JFET working in saturation region operates as:


a.)
b.)
c.)
d.)

controlled resistance
current control current source
current control voltage source
open circuit
114

vDS

Analog Electronics - Tests

Correct answer c.)


26.
3p

Output characteristic of a n channel JFET is:


a.)

iD

vGS-vT
Saturation region
vGS=4V

Linear
Region

vGS=2V

Cut-off
region

vGS=0V
vGS=-4V
vGS=V T

b.)

iD

vDS

vGS-vT
Saturation region
vGS=8V

Linear
region

vGS=6V

Cut-off
region

vGS=4V
vGS=2V
v GS=V T

c.)

iD

Saturation region
Linear
region

vGS=0.1V
vGS=0V

Cut-off
region

vGS=-2V
vGS=-4V
vGS=V T

d.)

vDS

vGS-vT

vDS

iC
v CB=0

iB4

Active region

Saturation
region

iB3
iB2

Cut o ff
region

iB1

v CE

Correct answer c.)


27.
3p

Input characteristic of a n channel JFET is:


a.)

VT

vGS
1V

115

Analog Electronics - Tests

b.)

iD

VT

c.)

v GS

iD

IDSS
VT

d.)

vGS

iB
vCE1
vCE2>vCE1

vBE

Correct answer a.)


28.
3p

A possible mathematic model of a JFET operating in cut-off region


(quasi-static large signal regime) is:
a.)
iG=0
and
iD=0
2
b.)
v
iG=0
and
i D = IDSS 1 GS

c.)
d.)

iG=0
v
i C = IS exp BE
eT

VT

and


v
i D = G o 1 GS
VT

and

iB =

v
IS
exp BE
F
eT

v DS

Correct answer a.)


29
3p

A possible mathematic model of a JFET operating in saturation


region (quasi-static large signal regime) is:
a.)
iG=0
and
iD=0
2
b.)
v
iG=0
and
i D = IDSS 1 GS

116

VT

Analog Electronics - Tests

c.)
d.)

iG=0

and

v
i C = IS exp BE
eT

and

v 2
i D = G o 1 GS v DS
VT

iB =

v
IS
exp BE
F
eT

Correct answer b.)


30.
3p

A possible mathematic model of a JFET operating in linear region


(quasi-static large signal regime) is:
a.)
iG=0
and
iD=0
2
b.)
v
iG=0
and
i D = IDSS 1 GS

c.)
d.)

iG=0

and

v
i C = IS exp BE
eT

and

VT

v 2
i D = G o 1 GS v DS
VT

iB =

v
IS
exp BE
F
eT

Correct answer c.)


31.
3p

The equivalent circuit of a JFET operating in linear region (quasistatic large signal regime) is:
a.)

b.)

c.)

d.)

Correct answer b.)


32.

The equivalent circuit of a JFET operating in saturation region


117

Analog Electronics - Tests

3p

(quasi-static large signal regime) is:


a.)

b.)

c.)

d.)

Correct answer c.)


33.
3p

The equivalent circuit of a JFET operating in cut-off region (quasistatic large signal regime) is:
a.)

b.)

c.)

d.)

Correct answer d.)


34.
3p

Static characteristics in figure 5.3, highlight the breakdown phenomenon


of a channel into a junction field effect transistor.
118

Analog Electronics - Tests

Figure 5.3

a.)

Channel breakdown appears at high voltage applied between drain


and source, due to avalanche multiplication
b.) Channel breakdown appears at low voltage applied between drain
and source, due to avalanche multiplication
c.)
Channel breakdown appears at high voltage applied between drain
and source, due to tunneling phenomenon
d.) Channel breakdown appears at low voltage applied between drain
and source, due to tunneling phenomenon
Correct answer a.)

35.
3p

Assume a junction field effect transistor. If the temperature increases


(see figure 5.4):
iD
T2>T1

T1

IDSS1
IDSS2

T2

Z
IZ
VT2 VT1

VGZ

vGS

Figure 5.4

a.)
IDSS increases and VT decreases
b.) IDSS decreases and VT increases
c.)
both IDSS and VT decrease
d.) both IDSS and VT increase
Correct answer c.)

36.
3p

Assume a junction field effect transistor. If the temperature increases


(see figure 5.4):
iD
T2>T1

T1

IDSS1
IDSS2

T2

Z
IZ
VT2 VT1

VGZ

Figure 5.4

119

vGS

Analog Electronics - Tests

a.)
iD decreases if iD>IZ
b.) iD increases if iD>IZ
c.)
iD decreases if iD<IZ;
d.) d) temperature has no effect on iD
Correct answer a.)

37.
4p

For a junction field effect transistor the thermal run-away problem


(see figure 5.4)
iD
T1
T2>T1

IDSS1
IDSS2

T2

Z
IZ
VT2 VT1

VGZ

vGS

Figure 5.4

a.)
is solved using the a resistor for thermal stability
b.) does not exist
c.)
does not exist if ID<IZ
d.) does not exist if ID>IZ
Correct answer d.)

38.
3p

A possible mathematic model of a JFET operating in saturation


region (quasi-static small signal regime) is:
a.)
id=0
and
id=gmvds
b.) ig=0
and
id=gmvgs
c.)
id=0
and
id=gmvds
d.) ig=0
and
id=gmvgs
where:
ig
grill current (AC instantaneous value)
id
drain current (AC instantaneous value)
vgs
grill-source voltage (AC instantaneous value)
vds
drain-source voltage (AC instantaneous value)
gm =

2I D
VGS VT

Correct answer d.)


39.
3p

The trans-conductance of an JFET is:


a.)

gm =

2Id
VGS VT

120

Analog Electronics - Tests

b.)
c.)
d.)

gm =

2I D
Vgs VT

gm =

2i D
v GS VT QP

gm =

2Id
Vgs VT

Correct answer c.)


40.
3p

Consider the mathematical model:


ig=0
id=gmvgs
The equivalent circuit associated is:
a.)

b.)

c.)

d.)

Correct answer a.)


41.
2p

The bias circuit of a junction field effect transistor must solve:


a.)

reverse bias of channel-gate junction and bias point stability due to


scattering parameters
b.) reverse bias of channel-gate junction or bias point stability due to
scattering parameters
c.)
reverse bias of channel-gate junction
d.) bias point stability due to scattering parameters
Correct answer a.)
121

Analog Electronics - Tests

42.
3p

The so called self bias circuit of a junction field effect transistor is:
a.)

b.)

c.)

d.)

Correct answer c.)


43.
3p

Figure 5.5 shows the so called self bias circuit of a junction field
effect transistor. The equivalent circuit associated is:

a.)

Figure 5.5

122

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer b.)


44.
4p

Figure 5.6 shows the equivalent circuit associated with the diagram
circuit presented in figure 5.5. VGS (drop voltage between grill and
source) is:

Figure 5.5

Figure 5.6

a.)
VGS=RSID
b.) VGS=-RGID
c.)
VGS=-RSID
d.) VGS=-RGIG
Correct answer c.)

45.
2p

Figure 5.7 shows a schematic diagram of a common source stage. The


transistor is operating in cut-off region if:

123

Analog Electronics - Tests

Figure 5.7

a.)
vIN<VT
b.) vIN>VT :
c.)
vIN>VT :
d.) vIN>VT :
Correct answer a.)

46.
2p

vDS>vDSsat
vDS<vDSsat
vDS<vDSsat

Figure 5.7 shows a schematic diagram of a common source stage. The


transistor is operating in saturation region if:

a.)
vIN<VT
b.) vIN>VT :
c.)
vIN>VT :
d.) vIN>VT :
Correct answer b.)

47.
2p

and
and
or

Figure 5.7

and
and
or

vDS>vDSsat
vDS<vDSsat
vDS<vDSsat

Figure 5.7 shows a schematic diagram of a common source stage. The


transistor is operating in linear region if:

a.)
b.)
c.)

vIN<VT
vIN>VT :
vIN>VT :

Figure 5.7

and
and

vDS>vDSsat
vDS<vDSsat
124

Analog Electronics - Tests

d.) vIN>VT :
Correct answer c.)

48.
2p

or

vDS<vDSsat

Figure 5.7 shows a schematic diagram of a common source stage.


Assume that the transistor is operating in cut-off region. The
equivalent circuit is:

Figure 5.7

a.)

b.)

c.)

d.)

Correct answer a.)


125

Analog Electronics - Tests

49.
2p

Figure 5.7 shows a schematic diagram of a common source stage.


Assume that the transistor is operating in saturation region. The
equivalent circuit is:

a.)

Figure 5.7

b.)

c.)

d.)

Correct answer b.)


50.

Figure 5.7 shows a schematic diagram of a common source stage.


126

Analog Electronics - Tests

2p

Assume that the transistor is operating in linear region. The


equivalent circuit is:

a.)

Figure 5.7

b.)

c.)

d.)

Correct answer c.)


51.
4p

Figure 5.7 shows a schematic diagram of a common source stage.


Assume that the transistor is operating in linear region. The output
voltage is:
127

Analog Electronics - Tests

Figure 5.7

a.)
b.)
c.)

vO=ED
v
vO=ED- R D I DSS 1 GS
VT

R
vO= E D
R + RD

d.)

v
vO=ED+ R D I DSS 1 GS
VT

Correct answer c.)

52.
2p

Figure 5.7 shows a schematic diagram of a common source stage.


Assume that the transistor is operating in saturation region. The
output voltage is:

Figure 5.7

a.)
b.)
c.)
d.)

vO=ED
v
vO=ED- R D I DSS 1 GS
VT

R
vO= E D
R + RD

v
vO=ED+ R D I DSS 1 GS
VT

Correct answer b.)

128

Analog Electronics - Tests

53.
2p

Figure 5.7 shows a schematic diagram of a common source stage.


Assume that the transistor is operating in cut-off region. The
output voltage is:

a.)
b.)
c.)
d.)

Figure 5.7

vO=ED

v
vO=ED- R D I DSS 1 GS
VT

R
vO= E D
R + RD

v
vO=ED+ R D I DSS 1 GS
VT

Correct answer a.)

54.
2p

The circuit diagram of a common source amplifier is presented in


figure:
a.)

b.)

129

Analog Electronics - Tests

c.)

d.)

Correct answer c.)


55.
1p

The circuit diagram of a common source amplifier is presented in


figure 5.8. RG is:

a.)
part of a self bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer a.)

56.
1p

Figure 5.8

The circuit diagram of a common source amplifier is presented in


figure 5.8. RS is:

Figure 5.8

130

Analog Electronics - Tests

a.)
part of a self bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer a.)

57.
1p

The circuit diagram of a common source amplifier is presented in


figure 5.8. RD is:

Figure 5.8

a.)
part of a self bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer b.)

58.
1p

The circuit diagram of a common source amplifier is presented in


figure 5.8. C1 is:

Figure 5.8

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer c.)

59.
1p

The circuit diagram of a common source amplifier is presented in


figure 5.8. C2 is:

131

Analog Electronics - Tests

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer c.)

60.
1p

The circuit diagram of a common source amplifier is presented in


figure 5.8. CS is:

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer d.)

61.
3p

Figure 5.8

Figure 5.8

The circuit diagram of a common source amplifier is presented in


figure 5.8. The voltage gain A V = Vo i:
Vin

a.)
b.)

Av=gmRD
Av=-gmRD

Figure 5.8

132

Analog Electronics - Tests

c.)
Av=gmRS
d.) Av=-gmRS
Correct answer b.)

62.
3p

The circuit diagram of a common source amplifier is presented in


figure 5.8. The equivalent circuit (quasi-static small signal regime) is:

a.)

Figure 5.8

b.)

c.)

d.)

Correct answer c.)


63.
3p

The circuit diagram of a common source amplifier is presented in


figure 5.8. The input resistance (quasi-static small signal regime) is:

133

Analog Electronics - Tests

a.)
Rin=RG
b.) Rin=RS
c.)
Rin=RG
d.) Rin=RS
Correct answer a.)

64.
3p

Figure 5.8

The circuit diagram of a common source amplifier is presented in


figure 5.8. The output resistance (quasi-static small signal regime) is:

a.)
Ro=RD
b.) Ro=RD
c.)
Ro=RS
d.) Ro=RS
Correct answer a.)

Figure 5.8

134

Analog Electronics - Tests

Chapter 6
Metal Oxide Semiconductor Field Effect Transistor
1.
2p

Basic structure of a D metal oxide semiconductor field effect


transistor is shown in figure:
S
G
D
a.)
SiO2
n

p++

n++
canal

b.)

B
SG

SiO2
n++

n++
canal
p

c.)

B
SG

jonciune
p-n
n

jonciune
p-n

D
canal
p

d.)

n++

G
S
G

SiO2
n

n++
canal

Correct answer c.)

B
S

135

Analog Electronics - Tests

2.
2p

Basic structure of an E metal oxide semiconductor field effect


transistor is shown in figure:
S
G
D
a.)
SiO2
n

p++

n++
canal

b.)

B
SG

SiO2
n++

n++
canal
p

c.)

B
SG

jonciune
p-n
n

jonciune
p-n

D
canal
p

d.)

n++

G
S
G

SiO 2
n

n++
canal

Correct answer b.)


3.
1p

B
S

Figure 6.1 shows the basic structure of a D metal oxide


semiconductor field effect transistor. With S is denoted:
S

SiO2
n

++

++

n
canal

B
S
Figure
6.1

136

Analog Electronics - Tests

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer a.)

4.
1p

Figure 6.1 shows the basic structure of a D metal oxide


semiconductor field effect transistor. With G is denoted:
S

n++

SiO 2
n

n++
canal

B
S
Figure
6.1

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer c.)

5.
1p

Figure 6.1 shows the basic structure of a D metal oxide


semiconductor field effect transistor. With D is denoted:
S

n++

SiO 2
n

n++
canal

B
S
Figure
6.1

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer b.)

6.
1p

Figure 6.1 shows the basic structure of a D metal oxide


semiconductor field effect transistor. With B is denoted:

137

Analog Electronics - Tests


S

SiO2
n

n++

n++
canal

B
S
Figure
6.1

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer d.)

7.
1p

Figure 6.1 shows the basic structure of an E metal oxide


semiconductor field effect transistor. With B is denoted:
S

SiO2
++

++

n
canal
p

B
S
Figure
6.2

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer d.)

8.
1p

Figure 6.1 shows the basic structure of an E metal oxide


semiconductor field effect transistor. With S is denoted:
S

SiO2
n

++

++

n
canal

a.)
b.)

source
drain

S
Figure
6.1

138

Analog Electronics - Tests

c.)
grill
d.) bulk
Correct answer a.)

9.
1p

Figure 6.1 shows the basic structure of an E metal oxide


semiconductor field effect transistor. With G is denoted:
S

n++

SiO 2
n

n++
canal

B
S
Figure
6.1

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer c.)

10.
1p

Figure 6.1 shows the basic structure of an E metal oxide


semiconductor field effect transistor. With D is denoted:
S

n++

SiO 2
n

n++
canal

B
S
Figure
6.1

a.)
source
b.) drain
c.)
grill
d.) bulk
Correct answer b.)

11
1p

The symbol of an E metal oxide semiconductor field effect


transistor (n-channel) is:
a.)

139

Analog Electronics - Tests

b.)
c.)
d.)

Correct answer c.)


12
1p

The symbol of an E metal oxide semiconductor field effect


transistor (p-channel) is:
a.)
b.)
c.)
d.)

Correct answer d.)


13
1p

The symbol of an D metal oxide semiconductor field effect


transistor (n-channel) is:
a.)
b.)
c.)
d.)

Correct answer a.)


14
1p

The symbol of an D metal oxide semiconductor field effect


transistor (p-channel) is:
a.)

140

Analog Electronics - Tests

b.)
c.)
d.)

Correct answer b.)


15.
2p

In a MOSFET, the channel is located:


a.)
at the interface Si-SiO2
b.) inside the structure
c.)
near the drain
d.) near the source
Correct answer a.)

16.
1p

In terms of technology, a metal oxide semiconductor field effect


transistors can be made:
a.)
p channel only
b.) n channel only
c.)
both p channel and n channel
d.) using pnp structures
Correct answer c.)

17.
2p

The main current of a metal oxide semiconductor field effect


transistors is flowing between:
a.)
grill and drain
b.) source and drain
c.)
source and grill
d.) grill and drain
Correct answer b.)

18.
2p

The main current of a metal oxide semiconductor field effect


transistor (n channel) is flowing between source and drain. It is
composed of:
a.)
electrons
b.) holes
c.)
positive ions
d.) negative ions
Correct answer a.)
141

Analog Electronics - Tests

19.
2p

The main current of a metal oxide semiconductor field effect


transistor (p channel) is flowing between source and drain. It is
composed of:
a.)
electrons
b.) holes
c.)
positive ions
d.) negative ions
Correct answer b.)

20
3p

The main current of a n channel metal oxide semiconductor field


effect transistor is flowing between source and drain. It is composed
of electrons. In their course, these electrons pass through a region
called channel. The resistance of the channel is controlled by the
grill. This control may be realized:
a.)
modifying the holes concentration into the channel
b.) modifying the positive ions concentration into the channel
c.)
modifying the electrons concentration into the channel
d.) modifying the negative ions concentration into the channel
Correct answer c.)

21.
1p

Common source connection of a D metal oxide semiconductor field


effect transistor is presented in figure:
a.)

b.)

c.)

d.)

Correct answer a.)


22
1p

Common drain connection of a D metal oxide semiconductor field


effect transistor is presented in figure:
142

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer c.)


23.
1p

Common grill connection of a D metal oxide semiconductor field


effect transistor is presented in figure:
a.)

b.)

c.)

d.)

Correct answer b.)


24.
1p

Common source connection of an E metal oxide semiconductor


field effect transistor is presented in figure:
a.)

143

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer a.)


25.
1p

Common drain connection of an E metal oxide semiconductor field


effect transistor is presented in figure:
a.)

b.)

c.)

d.)

Correct answer c.)


26.
1p

Common grill connection of an E metal oxide semiconductor field


effect transistor is presented in figure:
a.)

b.)

144

Analog Electronics - Tests

c.)

d.)

Correct answer b.)


27.
2p

The grill current of a MOSFET is:


a.)

iG =

(v GS VT )2
2

b.)

v
i G = I DSS 1 + GS
VT

c.)
iG 0
d.)
v
i G = DS
rDS
Correct answer c.)

28.
1p

Figure 6.3 shows the output characteristic of D-MOSFET. With I


was denoted:
iD

vGS-vT

III.

vGS=4V

II.

vGS=2V
I.

vGS=0V
vGS=-4V
vGS=V T

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer a.)

29.
1p

vDS

Figure 6.3

Figure 6.3 shows the output characteristic of D-MOSFET. With II


was denoted:
145

Analog Electronics - Tests


iD

vGS-vT

III.

vGS=4V

II.

vGS=2V
I.

vGS=0V
vGS=-4V
vGS=V T

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer b.)

30.
1p

vDS

Figure 6.3

Figure 6.3 shows the output characteristic of D-MOSFET. With III


was denoted:
iD

vGS-vT

III.

vGS=4V

II.

vGS=2V
I.

vGS=0V
vGS=-4V
vGS=V T

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer c.)

31.
1p

vDS

Figure 6.3

Figure 6.4 shows the output characteristic of E-MOSFET. With I


was denoted:
iD

vGS-vT

III.

vGS=8V

II.

vGS=6V
I.

vGS=4V
vGS=2V
vGS=V T

146

vDS

Analog Electronics - Tests


Figure 6.4

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer a.)

32.
1p

Figure 6.4 shows the output characteristic of E-MOSFET. With II


was denoted:
iD

vGS-vT

III.

vGS=8V

II.

vGS=6V
I.

vGS=4V
vGS=2V
vGS=V T

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer b.)

33.
1p

vDS

Figure 6.4

Figure 6.4 shows the output characteristic of E-MOSFET. With III


was denoted:
iD

vGS-vT

III.

vGS=8V

II.

vGS=6V
I.

vGS=4V
vGS=2V
vGS=V T

Figure 6.4

a.)
cut-off region
b.) linear region
c.)
saturation region
d.) knee region
Correct answer c.)

34.
2p

A MOSFET operating in linear region behaves like:


147

vDS

Analog Electronics - Tests

a.)
controlled resistance
b.) current control current source
c.)
current control voltage source
d.) open circuit
Correct answer a.)

35.
2p

A MOSFET operating in cut-off region behaves like:

36.
2p

A MOSFET operating in saturation region behaves like:

a.)
controlled resistance
b.) current control current source
c.)
current control voltage source
d.) open circuit
Correct answer d.)

a.)
controlled resistance
b.) current control current source
c.)
current control voltage source
d.) open circuit
Correct answer c.)

37.
3p

The output characteristic of a D MOSFET (n channel) is


presented in figure:
i
a.)
v -v
Saturation
D

GS

region
vGS=4V

Linear
region

vGS=2V

Cut-off
region

vGS=0V
vGS=-4V
vGS=V T

b.)

iD
Saturation
region

vDS

vGS-vT

vGS=8V

Linear
region

vGS=6V

Cut-off
region

vGS=4V
vGS=2V
v GS=V T

c.)

iD
Saturation
region
Linear
region
Cut-off
region

vDS

vGS-vT

vGS=0.1V
vGS=0V
vGS=-2V
vGS=-4V
vGS=V T

148

vDS

Analog Electronics - Tests

d.)

iC
v CB=0

Active region

Saturation
region

iB4
iB3
iB2

Cut-off
region

iB1

v CE

Correct answer a.)


38.
3p

The output characteristic of an E MOSFET (n channel) is


presented in figure:
i
a.)
v -v
Saturation
D

GS

region
vGS=4V

Linear
region

vGS=2V

Cut-off
region

vGS=0V
vGS=-4V
vGS=V T

b.)

iD

vDS

vGS-vT

Saturation
region

vGS=8V

Linear
region

vGS=6V

Cut-off
region

vGS=4V
vGS=2V
v GS=V T

c.)

iD
Saturation
region

vGS=0.1V

Linear
region

vGS=0V

Cut-off
region

vGS=-2V
vGS=-4V
vGS=V T

d.)

vDS

vGS-vT

vDS

iC
v CB=0

Active region

Saturation
region

iB4
iB3
iB2

Cut-off
region

iB1

v CE

Correct answer b.)


39.
3p

The input characteristic of a D MOSFET (n channel) is


presented in figure:

149

Analog Electronics - Tests

a.)

iD

IDSS

VT

b.)

1V

vGS

iD

VT

c.)

v GS

iD

IDSS
VT

d.)

vGS

iB
vCE1
vCE2>vCE1

vBE

Correct answer c.)


40.
3p

The input characteristic of an E MOSFET (n channel) is


presented in figure:
i
a.)
D

IDSS

VT

b.)

VT

c.)

1V

vGS

iD

v GS

iD

IDSS
VT

vGS

150

Analog Electronics - Tests

d.)

iB
vCE1
vCE2>vCE1

vBE

Correct answer b.)


41.
3p

A possible mathematic model of a MOSFET operating in cut-off


region (quasi-static large signal regime) is:
a.)
iG=0
and
iD=0

b.) iG=0
2
and
iD =

c.)
d.)

iG=0
v
i C = IS exp BE
eT

(v GS VT )

and


v
i D = G o 1 GS
VT

and

iB =

v
IS
exp BE
F
eT

v DS

Correct answer a.)


42.
3p

A possible mathematic model of a MOSFET operating in saturation


region (quasi-static large signal regime) is:
a.)
iG=0
and
iD=0

b.) iG=0
and
i = (v V )2
D

c.)
d.)

iG=0
v
i C = IS exp BE
eT

GS

and


v
i D = G o 1 GS
VT

and

iB =

v
IS
exp BE
F
eT

v DS

Correct answer b.)


43.
3p

A possible mathematic model of a MOSFET operating in linear


region (quasi-static large signal regime) is:
a.)
iG=0
and
iD=0

b.) iG=0
2
and
i D = (v GS VT )
2

c.)

iG=0

and

151


v
i D = G o 1 GS
VT

v DS

Analog Electronics - Tests

d.)

v
i C = IS exp BE
eT

and

iB =

v
IS
exp BE
F
eT

Correct answer c.)


44.
3p

The equivalent circuit of a MOSFET (n channel) operating in


linear region (quasi-static large signal) is:
a.)

b.)

c.)

d.)

Correct answer b.)


45.
3p

The equivalent circuit of a MOSFET (n channel) operating in


saturation region (quasi-static large signal) is:
a.)

b.)

c.)

152

Analog Electronics - Tests

d.)

Correct answer c.)


46.
3p

The equivalent circuit of a MOSFET (n channel) operating in cutoff region (quasi-static large signal) is:
a.)

b.)

c.)

d.)

Correct answer d.)


47.
3p

A possible mathematic model of a MOSFET (n channel) operating


in saturation region (quasi-static small signal regime) is:
a.)
id=0
and
id=gmvds
b.) ig=0
and
id=gmvgs
c.)
id=0
and
id=gmvds
d.) ig=0
and
id=gmvgs
where:
ig
grill current (AC instantaneous value)
id
drain current (AC instantaneous value)
vgs
grill-source voltage (AC instantaneous value)
vds
drain-source voltage (AC instantaneous value)
gm =

2ID
v GS VT

Correct answer b.)


153

Analog Electronics - Tests

48.
3p

The trans-conductance of an MOSFET is:


a.)
b.)
c.)
d.)

(v GS VT )2
2
2i D
gm =
v GS VT QP
gm =

g m = (v GS VT )
2I d
gm =
v gs VT

Correct answer b.)


49.
3p

Consider the mathematical model:


ig=0
id=gmvgs
The equivalent circuit associated is:
a.)

b.)

c.)

d.)

Correct answer a.)


50.
2p

The bias circuit of a MOSFET transistor must solve:


a.)
b.)
c.)

reverse bias of channel-gate junction and bias point stability due to


scattering parameters
reverse bias of channel-gate junction or bias point stability due to
scattering parameters
reverse bias of channel-gate junction
154

Analog Electronics - Tests

d.) bias point stability due to scattering parameters


Correct answer a.)

51.
3p

To function as amplifier, the voltage between the grill and the source
of an E-MOSFET (n channel):
a.)
must be positive (only)
b.) must be negative (only)
c.)
both positive and negative
d.) zero
Correct answer a.)

52.
3p

To function as amplifier, the voltage between the grill and the source
of an E-MOSFET (p channel):
a.)
must be positive (only)
b.) must be negative (only)
c.)
both positive and negative
d.) zero
Correct answer b.)

53.
3p

To function as amplifier, the voltage between the grill and the source
of an D-MOSFET (n channel):
a.)
must be positive (only)
b.) must be negative (only)
c.)
both positive and negative
d.) zero
Correct answer c.)

54.
3p

To function as amplifier, the voltage between the grill and the source
of an D-MOSFET (p channel):
a.)
must be positive (only)
b.) must be negative (only)
c.)
both positive and negative
d.) zero
Correct answer c.)

55.
2p

Figure 6.6 shows a schematic diagram of a common source stage. The


D MOSFET (n channel) transistor is operating in cut-off region
if:

155

Analog Electronics - Tests

a.)
vIN<VT
b.) vIN>VT :
c.)
vIN>VT :
d.) vIN>VT :
Correct answer a.)

56.
2p

and
and
or

vDS>vDSsat
vDS<vDSsat
vDS<vDSsat

Figure 6.6 shows a schematic diagram of a common source stage. The


D MOSFET (n channel) transistor is operating in saturation
region if:

a.)
vIN<VT
b.) vIN>VT :
c.)
vIN>VT :
d.) vIN>VT :
Correct answer b.)

57.
2p

Figure 6.6

Figure 6.6

and
and
or

vDS>vDSsat
vDS<vDSsat
vDS<vDSsat

Figure 6.6 shows a schematic diagram of a common source stage. The


D MOSFET (n channel) transistor is operating in linear region
if:

Figure 6.6

156

Analog Electronics - Tests

a.)
vIN<VT
b.) vIN>VT :
c.)
vIN>VT :
d.) vIN>VT :
Correct answer c.)

58.
2p

and
and
or

vDS>vDSsat
vDS<vDSsat
vDS<vDSsat

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in cut-off


region. The equivalent circuit is:
a.)

b.)

c.)

157

Analog Electronics - Tests

d.)

Correct answer a.)


59.
2p

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in saturation


region. The equivalent circuit is:
a.)

b.)

c.)

158

Analog Electronics - Tests

d.)

Correct answer b.)


60.
2p

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in linear


region. The equivalent circuit is:
a.)

b.)

c.)

159

Analog Electronics - Tests

d.)

Correct answer c.)


61.
4p

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in linear


region. The output voltage is:
a.)
vO=ED
b.)

2
vO = E D

c.)
d.)

vO= E D

R D (v IN VT )

R
R + RD

vO = E D

2
R D (v IN + VT )
2

Correct answer c.)


62
2p

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in saturation


region. The output voltage is:
160

Analog Electronics - Tests

a.)
b.)
c.)
d.)

vO=ED
vO = E D

vO= E D

2
R D (v IN VT )
2

R
R + RD

vO = E D

2
R D (v IN + VT )
2

Correct answer b.)


63.
2p

Figure 6.6 shows a schematic diagram of a common source stage.

Figure 6.6

The D MOSFET (n channel) transistor is operating in cut-off


region. The output voltage is:
a.)
vO=ED
b.)

2
vO = E D

c.)
d.)

vO= E D

R D (v IN VT )

R
R + RD

vO = E D

2
R D (v IN + VT )
2

Correct answer a.)


64.
2p

The circuit diagram of a common source amplifier is presented in


figure:
a.)

161

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer c.)


65.
1p

The circuit diagram of a common source amplifier is presented in


figure 6.7. RG1 is:

Figure 6.7

a.)
part of bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer a.)

66.
1p

The circuit diagram of a common source amplifier is presented in


figure 6.7. RG2 is:
162

Analog Electronics - Tests

a.)
part of bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer a.)

67.
1p

Figure 6.7

The circuit diagram of a common source amplifier is presented in


figure 6.7. RS is:

Figure 6.7

a.)
part of bias circuit
b.) load
c.)
coupling resistor
d.) decoupling resistor
Correct answer a.)

68.
1p

The circuit diagram of a common source amplifier is presented in


figure 6.7. RD is:

Figure 6.7

a.)
b.)
c.)

part of bias circuit


load
coupling resistor
163

Analog Electronics - Tests

d.) decoupling resistor


Correct answer b.)

69.
1p

The circuit diagram of a common source amplifier is presented in


figure 6.7. C1 is

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer c.)

70.
1p

The circuit diagram of a common source amplifier is presented in


figure 6.7. C2 is:

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer c.)

71.
1p

Figure 6.7

Figure 6.7

The circuit diagram of a common source amplifier is presented in


figure 6.6. CS is:

164

Analog Electronics - Tests

a.)
part of a self bias circuit
b.) load
c.)
coupling capacitor
d.) decoupling capacitor
Correct answer d.)

72.
3p

Figure 6.7

The circuit diagram of a common source amplifier is presented in


figure 6.7. The voltage gain A V = Vo is:
Vin

a.)
Av=gmRD
b.) Av=-gmRD
c.)
Av=gmRS
d.) Av=-gmRS
Correct answer b.)

73.
3p

Figure 6.7

The circuit diagram of a common source amplifier is presented in


figure 6.7.

Figure 6.7

The equivalent circuit (quasi-static small signal regime) is:


165

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer c.)


74.
3p

The circuit diagram of a common source amplifier is presented in


figure 6.7. The input resistance (quasi-static small signal regime) is:

a.)
b.)
c.)

Figure 6.7

R in = R G1 R G 2 =

R G1R G 2
R G1 + R G 2

Rin=RS
R in = R G1 R G 2 =

R G1R G 2
R G1 + R G 2

d.) Rin=RS
Correct answer b.)

75.
3p

The circuit diagram of a common source amplifier is presented in


figure 6.7. The output resistance (quasi-static small signal regime) is:
166

Analog Electronics - Tests

a.)
Ro=RD
b.) Ro=RD
c.)
Ro=RS
d.) Ro=RS
Correct answer a.)

Figure 6.7

167

Analog Electronics - Tests

168

Analog Electronics - Tests

Chapter 7
Multi-Layered Devices
1.
1p

The symbol of a tyristor is shown in figure:


a.)
b.)
c.)
d.)

Correct answer a.)


2.
1p

The symbol of a triac is shown in figure:


a.)
b.)
c.)
d.)

Correct answer b.)


3.
1p

The symbol of a Shockley diode is shown in figure:


a.)
b.)
c.)
169

Analog Electronics - Tests

d.)

Correct answer c.)


4.
1p

The symbol of a diac is shown in figure:


a.)
b.)
c.)
d.)

Correct answer d.)


5.
3p

Basic structure of a tyristor is shown in figure:


a.)

A
p
n

p
n

b.)

T2
n1
p1

p2

n2

n2

p2

p1
n1

nnp

c.)

G
A

T1

p
n
p
n

170

Analog Electronics - Tests

d.)

G
n

D
canal
p

Correct answer a.)


6.
3p

Basic structure of a TRIAC is shown in figure:


a.)

A
p
n

p
n

b.)

T2
n1
p1

p2

n2

n2

p2

p1
n1

nnp

G
A

c.)

T1

p
n
p
n

d.)

G
n

D
canal
p

Correct answer c.)


7.
2p

In normal operation, the thyristor has:


a.)
b.)
c.)
d.)

two states, both unstable


two states, one stable and one unstable
three states
two states, both stable
171

Analog Electronics - Tests

Correct answer d.)


8.
2p

In normal operation, the thyristor has two states:


a.)

on state (the thyristor acts as a short circuit) and off state (the
thyristor acts as an open circuit)
b.) on state (the thyristor acts as a short circuit) and off state (the
thyristor acts as negative resistance)
c.)
on state (the thyristor acts as negative resistance) and off state
(the thyristor acts as an open circuit)
d.) on state (the thyristor acts as an amplifier) and off state (the
thyristor acts as an open circuit)
Correct answer a.)

9.
2p

The on-off transition can occur if:


a.)
The tyristor is forward biased and there is a signal on the gate
b.) The tyristor is reverse biased (only)
c.)
The tyristor is forward biased (only)
d.) The tyristor is reverse biased and there is a signal on the gate
Correct answer b.)

10
2p

The off-on transition can occur if:


a.)
The tyristor is forward biased and there is a signal on the gate
b.) The tyristor is reverse biased (only)
c.)
The tyristor is forward biased (only)
d.) The tyristor is reverse biased and there is a signal on the gate
Correct answer a.)

11.
2p

The equivalent circuit of a tyristor is shown in figure:


a.)

T1
G

T2

172

Analog Electronics - Tests

b.)

T1
G

T2

c.)

T1
G

T2

d.)

T1
G

T2

Correct answer b.)


12.
2p

The equivalent circuit of a tyristor is shown in figure7.1. The off-on


transition is generated by a regenerative process. That means:
A

T1
G

T2

a.)

Figure 7.1

i G i BT 2 i CT 2 = i BT1 i CT1 i BT 2

b.)

iG iBT 2 iCT 1 = i BT 2 iCT 2 iBT 1

c.)

iG iBT 1 iCT 2 = i BT 2 iCT 1 iBT 1

173

Analog Electronics - Tests

d.)

iG iBT 1 iCT 1 = iBT 1 iCT 2 iBT 1

Correct answer a.)


13.
2p

The static characteristic of a thyristor is shown in figure denoted:


a.)

iA

VBR

IH H

VBD1

b.)

VH

vA

iT1T2

vT1T2

c.)

iA

VBR

IH H

VBD1

d.)

VH

V BD vA

iT1T2

vT1T2

Correct answer a.)


14.
2p

The static characteristic of a diac is shown in figure denoted:

174

Analog Electronics - Tests

a.)

iA

VBR

IH H

VBD1

b.)

VH

vA

iT1T2

vT1T2

c.)

iA

VBR

IH H

VBD1

d.)

VH

VBD vA

iT1T2

vT1T2

Correct answer b.)


15.
2p

The static characteristic of a Shockley diode is shown in figure


denoted:
i
a.)
A

VBR
VBD1

IH H
VH

vA

175

Analog Electronics - Tests

b.)

iT1T2

vT1T2

c.)

iA

VBR

IH H

VBD1

d.)

VH

V BD vA

iT1T2

vT1T2

Correct answer c.)


16.
2p

The static characteristic of a triac is shown in figure denoted:


a.)

iA

VBR

IH H

VBD1

b.)

VH

vA

iT1T2

vT1T2

176

Analog Electronics - Tests

c.)

iA

VBR
VBD1

d.)

IH H
VH

VBD vA

iT1T2

vT1T2

Correct answer d.)


17.
1p

The static characteristic of a tyristor is shown in figure 7.2. With 1


is denoted:
iA

5
4

iG0=0

3
2

iG1>iG0
IH H

VBR
V

VH VBD3 VBD2 VBD1 vA

a.)
breakdown mode
b.) reverse blocking mode
c.)
forward blocking mode
d.) negative resistance mode
Correct answer a.)

18.
1p

Figure 7.2

The static characteristic of a tyristor is shown in figure 7.2. With 2


is denoted:

177

Analog Electronics - Tests


iA

5
4

iG0=0

3
2

iG1>iG0
IH H

VBR
V

VH VBD3 VBD2 VBD1 vA

Figure 7.2

a.)
breakdown mode
b.) reverse blocking mode
c.)
forward blocking mode
d.) negative resistance mode
Correct answer b.)

19.
1p

The static characteristic of a tyristor is shown in figure 7.2. With 3


is denoted:
iA

5
4
3

iG0 =0
iG1>iG0

IH H

VBR
V

VH VBD3 VBD2 VBD1 vA

a.)
breakdown mode
b.) reverse blocking mode
c.)
forward blocking mode
d.) negative resistance mode
Correct answer c.)

20.
1p

Figure 7.2

The static characteristic of a tyristor is shown in figure 7.2. With 4


is denoted:

178

Analog Electronics - Tests


iA

5
4

iG0 =0

3
2

iG1>iG0
IH H

VBR
V

VH VBD3 VBD2 VBD1 vA

Figure 7.2

a.)
breakdown mode
b.) reverse blocking mode
c.)
forward blocking mode
d.) negative resistance mode
Correct answer d.)

21.
1p

The static characteristic of a tyristor is shown in figure 7.2. With 5


is denoted:
iA

5
4
3

iG0 =0
iG1>iG0

IH H

VBR
V

VH VBD3 VBD2 VBD1 vA

a.)
breakdown mode
b.) reverse blocking mode
c.)
forward blocking mode
d.) forward conducting mode
Correct answer d.)

22.
2p

Figure 7.2

A tyristor operating in blocking mode may be modeled:


a.)
179

Analog Electronics - Tests

b.)
c.)
d.)

Correct answer b.)


23.
2p

A tyristor operating in conducting mode may be modeled:


a.)
b.)
c.)
d.)

Correct answer a.)


24.
4p

Figure 7.3 shows a half-wave rectifier. Figure 7.4 shows the wave
forms of the input voltage Vs and of the gate signal iG.
iL
vs
Tr
Vp

Vs

RL
T

vL
iG

iG

vA
t

Figure 7.3

Figure 7.4

In these conditions, the wave forms of the drop voltage across the
tyristor vA are presented in figure denoted:
a.)
v
s

t
iG
t

vA

180

Analog Electronics - Tests

b.)

vs
t
iG
t

vA

c.)

vs
t
iG
t

vA

d.)

vs
t
iG
t

vA

Correct answer b.)


25.
4p

Figure 7.3 shows a half-wave rectifier. Figure 7.4 shows the wave
forms of the input voltage Vs and of the gate signal iG. In these
conditions, the wave forms of the drop voltage across the load vL
are presented in figure denoted:
iL
vs
Tr
Vp

Vs

RL
T

vL
iG

iG

vA
t

Figure 7.3

Figure 7.4

181

Analog Electronics - Tests

a.)

vs
t
iG
t

vA

b.)

vs
t
iG
t

vA

c.)

vs
t
iG
t

vA

d.)

vs
t
iG
t

vA

Correct answer d.)


26.
2p

Figure 7.3 shows a half-wave rectifier. Assume that the tyristor is


operating in conducting mode. In these conditions, then circuit
diagram may be modeled as:

182

Analog Electronics - Tests

Tr
Vp

iL
Vs

RL
T

vL
iG

vA

Figure 7.3

a.)

Tr
Vp

iL
Vs

RL
T

b.)

Tr
Vp

RL
T

Tr
Vp

RL
T

Tr
Vp

vL
vA

iL
Vs

d.)

vA

iL
Vs

c.)

vL

vL
vA

iL
Vs

RL
T

vL
vA

Correct answer d.)


27.
2p

Figure 7.3 shows a half-wave rectifier. Assume that the tyristor is


operating in blocking mode. In these conditions, then circuit diagram
may be modeled as::

183

Analog Electronics - Tests

Tr
Vp

iL
Vs

RL
T

Figure 7.3

a.)

Tr
Vp

iL
Vs

RL
T

b.)

Tr
Vp

RL
T

Tr
Vp

RL
T

Tr
Vp

vL
vA

iL
Vs

d.)

vA

iL
Vs

c.)

vL

vL
vA

iL
Vs

RL
T

vL
vA

Correct answer c.)

184

vL
iG

vA

Analog Electronics - Tests

Chapter 8
Operational Amplifier

1
2p

An operational amplifier acts as:


a.) current amplifier
b.) voltage amplifier
c.) transconductance amplifier
d.) transresistance amplifier
Correct answer b.)

2.
2p

Figure 8.1 shows the symbol of an operational amplifier. v+ denotes


noninverting input. That means:
v+

v-

vO
Figure 8.1

a.)
b.)

that the output signal is in phase with the signal applied to the input
that the output signal is phase shifted by 1800 degrees related to the
signal applied to this input;
c.) that on this input should be applied only positive signals
d.) that on this input should be applied only negative signals
Correct answer b.)

3.
2p

Figure 8.1 shows the symbol of an operational amplifier. v- denotes


the inverting input. That means:
v+

v-

vO
Figure 8.1

a.)
b.)
c.)

that the output signal is in phase with the signal applied to the input
that the output signal is phase shifted by 1800 degrees related to the
signal applied to this input;
that on this input should be applied only positive signals
185

Analog Electronics - Tests

d.) that on this input should be applied only negative signals


Correct answer a.)

4.
2p

Figure 8.2 is useful to define how the description of an operational


amplifier may be made. Thus we can speak of: input characteristics,
output characteristics and transfer characteristics. The most used
characteristic is:
v+
v-

I+
+

I-

vO

Figure 8.2

a.) vO=vO(v-)
b.) vO=vO(v+)
c.) vO=vO(v++v-)
d.) vO=vO(vD) where vD=v+-vCorrect answer a.)

5.
1p

Io

Figure 8.3 shows the transfer characteristic of an operational


amplifier. With I was noted:
vO[V]
VOH

III.
I.

-0.1

0.1

VOL

vD[mV]

II.

Figure 8.3

a.) negative output saturation region


b.) positive output saturation region
c.) linear region
d.) reverse region
Correct answer a.)

6.
1p

Figure 8.3 shows the transfer characteristic of an operational


amplifier. With II was noted:

186

Analog Electronics - Tests


vO[V]
VOH

III.
I.

-0.1

0.1

vD[mV]

II.

VOL

Figure 8.3

a.) negative output saturation region


b.) positive output saturation region
c.) linear region
d.) reverse region
Correct answer c.)

7.
1p

Figure 8.3 shows the transfer characteristic of an operational


amplifier. With III was noted:
vO[V]
VOH

III.
I.

-0.1

0.1

VOL

vD[mV]

II.

Figure 8.3

a.) negative output saturation region


b.) positive output saturation region
c.) linear region
d.) reverse region
Correct answer b.)

8.
3p

An operational amplifier behaves like a voltage amplifier. That


means:
a.) av, Rin0 and
Ro=;
b.) av, Rin and
Ro=
c.) av, Rin0 and
Ro=0
d.) av, Rin and
Ro=0
Correct answer d.)

9
3p

Zero-order model of an operational amplifier considers:


187

Analog Electronics - Tests

a.) vIN=0,
b.) vO=0,
c.) vIN=0,
d.) vIN=0,
Correct answer a.)

i+=0
i+=const.
i+=const.
i+=0

and
and
and
and

i-=0
i-=0
i-=const.
i-=const.

10. The inverting amplifier is presented in figure noted:


3p
a.)

b.)

c.)

d.)

Correct answer a.)


11. The non-inverting amplifier is presented in figure noted:
3p
a.)

b.)

c.)

188

Analog Electronics - Tests

d.)

Correct answer b.)


12. The difference amplifier is presented in figure noted:
3p
a.)

b.)

c.)

d.)

Correct answer c.)


13. The weight summing amplifier is presented in figure noted:
3p
a.)

b.)

c.)

189

Analog Electronics - Tests

d.)

Correct answer d.)


14. The integrator amplifier is presented in figure noted:
3p
a.)

b.)

c.)

d.)

Correct answer a.)


15. The differentiator amplifier is presented in figure noted:
3p
a.)

b.)

c.)

190

Analog Electronics - Tests

d.)

Correct answer b.)


16. The logarithmic amplifier is presented in figure noted:
3p
a.)

b.)

c.)

d.)

Correct answer c.)


17. The anti-logarithmic amplifier is presented in figure noted:
3p
a.)

b.)

c.)

191

Analog Electronics - Tests

d.)

Correct answer d.)


18. The inverting amplifier is presented in figure 8.4. The output voltage
4p (vO) is:

a.)
b.)
c.)
d.)

Figure 8.4

R
v O = 2 v IN
R1
R2
vO =
v IN
R1
vO =
vO =

R1
v IN
R2

R1
v IN
R2

Correct answer a.)


19. The non inverting amplifier is presented in figure 8.5. The output
4p voltage (vO) is:

Figure 8.5

a.)
b.)
c.)
d.)

vO

vO
vO
vO

R
= 1 + 1 v IN
R2
R
= 1 1 v IN
R2
R
= 1 2 v IN
R1
R
= 1 + 2 v IN
R1

Correct answer a.)


192

Analog Electronics - Tests

20. The difference amplifier is presented in figure 8.6. The output voltage
4p (vO) is:

a.)
b.)
c.)
d.)

Figure 8.6

R
v o = 1 (v1 v 2 )
R2
vo =

R1
(v 2 v1 )
R2

vo =

R2
(v 2 v1 )
R1

R2
(v1 v 2 )
R1
Correct answer c.)
vo =

21. The weight summing amplifier is presented in figure 8.7. The output
4p voltage (vO) is:

a.)
b.)
c.)
d.)

Figure 8.7
k=n

vk
vO = R
k =1 R k

vO = R

vk

k =1

1
1
=
vO
R
1
1
=
vO R

k =n

k=n

Rk

k =1

k =n

Rk

k =1

193

Analog Electronics - Tests

Correct answer b.)


22. The integrator amplifier is presented in figure 8.8. The output voltage
4p (vO) is:

Figure 8.8

Assume: vO(0)=0
t
a.)
v O (t ) = RC v IN ( )d

b.)

v O (t ) = RC v IN ( )d

c.)
d.)

v O (t ) =
v O (t ) =

1
v IN ( )d
RC 0

1
v IN ( )d
RC 0

Correct answer c.)


23. The differentiator amplifier is presented in figure 8.9. The output
4p voltage (vO) is:

dv IN (t )
dt
b.)
dv IN (t )
v O ( t ) = RC
dt
c.)
1 dv IN (t )
vO (t ) =
RC dt
d.)
1 dv IN (t )
vO (t ) =
RC dt
Correct answer b.)
a.)

Figure 8.9

v O ( t ) = RC

194

Analog Electronics - Tests

24
4p

The logarithmic amplifier is presented in figure 8.10. The output


voltage (vO) is:

Figure 8.10

a.)
b.)
c.)
d.)

v
v O e T ln IN
R IS
v
v O e T ln IN
R IS

v
v O e T lg IN
R IS
v
v O e T lg IN
R IS

Correct answer a.)


25. The anti-logarithmic amplifier is presented in figure 8.11. The output
4p voltage (vO) is:

Figure 8.11

a.)
b.)
c.)
d.)

v O + RISe
vO RI Se

v IN
eT
v IN
eT
vIN

vO RIS 10 eT
vIN

vO RIS 10 eT

Correct answer a.)

195

Analog Electronics - Tests

196

Analog Electronics - Tests

Chapter 9
Electronic Amplifier

1.
1p

Figure 9.1 shows a block diagram used for the definition of an


amplifier. With xI is denoted:

Figure 9.1

a.) the instantaneous value of the input signal


b.) the instantaneous value of the output signal
c.) transfer function of the amplifier
d.) input resistance
Correct answer a.)

2.
1p

Figure 9.1 shows a block diagram used for the definition of an


amplifier. With xO is denoted:

Figure 9.1

a.) the instantaneous value of the input signal


b.) the instantaneous value of the output signal
c.) transfer function of the amplifier
d.) input resistance
Correct answer b.)

3.
1p

Figure 9.1 shows a block diagram used for the definition of an


amplifier. With a is denoted:

197

Analog Electronics - Tests

Figure 9.1

a.) the instantaneous value of the input signal


b.) the instantaneous value of the output signal
c.) transfer function of the amplifier
d.) input resistance
Correct answer c.)

4.
2p

Figure 9.1 shows a block diagram used for the definition of an


amplifier. In the same time:

Figure 9.1

a.)
b.)

the output power must be greater than the input signal (only)
the shape output signal must reproduce the shape of the input signal
(only)
c.) the output power must be greater than the input signal or the shape
output signal must reproduce the shape of the input signal
d.) the output power must be greater than the input signal and the
shape output signal must reproduce the shape of the input signal
Correct answer d.)

5.
1p

Assume a voltage amplifier. In this case:


a.) both the input signal and the output signal are voltages
b.) both the input signal and the output signal are currents
c.) the input signal is voltage and the output signal is current
d.) the input signal is current and the output signal is voltage
Correct answer a.)

6.
1p

Assume a current amplifier. In this case:


a.)
b.)
c.)
d.)

both the input signal and the output signal are voltages
both the input signal and the output signal are currents
the input signal is voltage and the output signal is current
the input signal is current and the output signal is voltage
198

Analog Electronics - Tests

Correct answer b.)


7.
1p

Assume a trans-resistance amplifier. In this case:


a.) both the input signal and the output signal are voltages
b.) both the input signal and the output signal are currents
c.) the input signal is voltage and the output signal is current
d.) the input signal is current and the output signal is voltage
Correct answer d.)

8.
1p

Assume a trans-conductance amplifier. In this case:


a.) both the input signal and the output signal are voltages
b.) both the input signal and the output signal are currents
c.) the input signal is voltage and the output signal is current
d.) the input signal is current and the output signal is voltage
Correct answer c.)

9.
2p

Assume a voltage amplifier operating in small signal quasi-static


regime. In this case, the transfer function A becomes:
a.)
V
Av = o
Vi
b.)
Io

Ai =

c.)
d.)

Ii

Az =

Vo
Ii

Ay =

Io
Vi

Correct answer a.)


10.
2p

Assume a current amplifier operating in small signal quasi-static


regime. In this case, the transfer function A becomes:
a.)
V
Av = o
Vi
b.)
Io

Ai =

Ii
199

Analog Electronics - Tests

c.)
d.)

Az =

Vo
Ii

Ay =

Io
Vi

Correct answer b.)


11.
2p

Assume a trans-resistance amplifier operating in small signal quasistatic regime. In this case, the transfer function A becomes:
a.)
V
Av = o
Vi
b.)
Io

Ai =

c.)
d.)

Ii

Az =

Vo
Ii

Ay =

Io
Vi

Correct answer c.)


12.
2p

Assume a trans-conductance amplifier operating in small signal


quasi-static regime. In this case, the transfer function A becomes:
a.)
V
Av = o
Vi
b.)
Io

Ai =

c.)
d.)

Ii

Az =

Vo
Ii

Ay =

Io
Vi

Correct answer d.)


13.
3

The definition of the voltage gain is:


a.)
b.)
c.)

G v [dB] = 20 lg A v
G v [dB] = 10 lg A v
G v [dB] = 20 ln A v
200

Analog Electronics - Tests

d.) G v [dB] = 10 ln A v
Correct answer a.)

14.
1p

A voltage amplifier may be modeled as:


a)

b)

c)

d)

Correct answer a.)


15.
1p

A current amplifier may be modeled as:


a)

b)

c)

d)

Correct answer b.)


16.
1p

A trans-resistance amplifier may be modeled as:

201

Analog Electronics - Tests

a)

b)

c)

d)

Correct answer c.)


17.
1p

A trans-conductance amplifier may be modeled as:


a)

b)

c)

d)

Correct answer d.)


18.
3p

Assume a voltage amplifier. In this case:


R in = 0 and R o
R in = 0 and R o = 0
R in and R o
R in and R o = 0
Where: Rin is the input resistance and Ro is the output resistance
Correct answer d.)
a.)
b.)
c.)
d.)

202

Analog Electronics - Tests

19.
3p

Assume a current amplifier. In this case:


R in = 0 and R o
R in = 0 and R o = 0
R in and R o
R in and R o = 0
Where: Rin is the input resistance and Ro is the output resistance
Correct answer a.)
a.)
b.)
c.)
d.)

20.
3p

Assume a trans-resistance amplifier. In this case:

21.
3p

Assume a trans-conductance amplifier. In this case:

22.
1p

Assume a trans-resistance amplifier operating in small signal quasistatic regime. In this case, the transfer function A becomes:
V
Az = o
Ii
Az is measured using:
a.) decibel
b.) neper
c.) ohm
d.) siemens

R in = 0 and R o
R in = 0 and R o = 0
R in and R o
R in and R o = 0
Where: Rin is the input resistance and Ro is the output resistance
Correct answer b.)
a.)
b.)
c.)
d.)

a.) R in = 0 and R o
b.) R in = 0 and R o = 0
c.) R in and R o
d.) R in and R o = 0
Where: Rin is the input resistance and Ro is the output resistance
Correct answer d.)

203

Analog Electronics - Tests

Correct answer c.)


23.
1p

Assume a trans-resistance amplifier operating in small signal quasistatic regime. In this case, the transfer function A becomes:
I
Ay = o
Vi
Ay is measured using:
a.) decibel
b.) neper
c.) ohm
d.) siemens
Correct answer d.)

24.
2p

The distortions generated by the amplifier are


a.) linear (only)
b.) non-linear (only)
c.) linear or non-linear
d.) linear and non-linear
Correct answer d.)

25.
2p

The non-linear distortions generated by the amplifier are caused by:


a.)
b.)
c.)

the non-linearity of the static characteristics of active elements


the non-linearity of the static characteristics of pasive elements
the non-uniformity of the amplitude-frequency characteristic and of
the phase-frequency characteristic
d.) the non-uniformity of the amplitude-frequency characteristic or of
the phase-frequency characteristic
Correct answer a.)

26.
2p

The linear distortions generated by the amplifier are caused by:


a.)
b.)
c.)
d.)

the non-linearity of the static characteristics of active elements


the non-linearity of the static characteristics of pasive elements
the non-uniformity of the amplitude-frequency characteristic and of
the phase-frequency characteristic
the non-uniformity of the amplitude-frequency characteristic or of
the phase-frequency characteristic
204

Analog Electronics - Tests

Correct answer c.)


27.
2p

The circuit diagram of differential stage is:


a)

b)

c)

d)

Correct answer a.)

205

Analog Electronics - Tests

28.
1p

Figure 9.2 shows a differential amplifier. Resistors RC is:

Figure 9.2

a.) designed to assure the base potential


b.) designed to assure the thermal stability
c.) load
d.) the equivalent resistance of the bias circuit
Correct answer c.)

29.
1p

Figure 9.2 shows a differential amplifier. Resistors RE is:

Figure 9.2

a.) designed to assure the base potential


b.) designed to assure the thermal stability
c.) load
d.) the equivalent resistance of the bias circuit
Correct answer d.)

30.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is:

206

Analog Electronics - Tests

Figure 9.2

a.)

b.)

c.)

207

Analog Electronics - Tests

d.)

Correct answer c.)


31.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 .

Figure 9.2

Figure 9.3

In these conditions iC1 is:


IE
a.) i =
C1

b.)

c.)

d.)

i C1 =

v
1 + exp ID
eT

IE
v
1 + exp ID
eT

IE
vID

exp
eT
IE
i C1 =
v ID

exp
eT
i C1 =

where: v ID = v I1 v I 2
Correct answer a.)

208

Analog Electronics - Tests

32.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 .

Figure 9.2

Figure 9.3

In these conditions iC2 is:


IE
a.)
iC 2 =

b.)

c.)

d.)

iC2

v
1 + exp ID
eT
IE
=
v
1 + exp ID
eT

IE
v ID

exp
eT
IE
=
v ID

exp
eT

i C2 =

iC 2

where: v ID = v I1 v I 2
Correct answer b.)
33.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 .

209

Analog Electronics - Tests

Figure 9.2

Figure 9.3

In these conditions iC1 is:


IE
v
1 + exp ID
eT
= v I1 v I 2 . The graphic representation is:
iC1 =

where: v ID
a.)

iC1
IE

0.5IE

-3eT

b.)

3eT

vID

eT

vID

3eT

vID

3eT

vID

iC1
IE

0.5IE

-eT

c.)

iC1
IE

0.5IE

-3eT -2eT -eT

d.)

eT

2eT

iC1
IE

0.5IE

-3eT -2eT -eT

eT

2eT

Correct answer c.)


210

Analog Electronics - Tests

34.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 .

Figure 9.2

Figure 9.3

In these conditions iC2 is:


iC 2 =

IE
v
1 + exp ID
eT

where: v ID = v I1 v I 2 . The graphic representation is:


i
a.)
C2

IE

0.5IE

-3eT

b.)

3eT

vID

eT

vID

3eT

vID

iC2
IE

0.5IE

-eT

c.)

iC2
IE

0.5IE

-3eT -2eT -eT

eT

2eT

211

Analog Electronics - Tests

d.)

iC2
IE

0.5IE

-3eT -2eT -eT

eT

2eT

3eT

vID

Correct answer d.)


35.
2p

Figure 9.4 shows the graphic representation of C1 and iC2. This


figure highlights the fact that both the upper limit value (IE) and the
lower limit value (approximately zero) of the collector currents.
These limits are given by:
iC1 iC2
IE
iC1
0.5IE
iC2
-3eT -2eT -eT

eT

2eT

3eT

vID

Figure 9.4

a.)

the transition between the active region and cut-off region of the
transistors
b.) the transition between the active region and saturation region of the
transistors
c.) the transition between the cut-off region and saturation region of
the transistors
d.) the transistors are operating all the time in active region
Correct answer d.)

36.
2p

Figure 9.4 shows the graphic representation of C1 and iC2.


According to this figure, the bias currents (IC1 and IC2) of the two
transistors are:
iC1 iC2
IE
iC1
0.5IE
iC2
-3eT -2eT -eT

eT

Figure 9.4

a.)
b.)

IE
2
= IE

I C1 = IC 2 =
I C1 = IC 2

212

2eT

3eT

vID

Analog Electronics - Tests

c.)

IE
2
d.) I C1 = IC 2 = I E
Correct answer a.)

37.
2p

I C1 = IC 2 =

Figure 9.4 shows the graphic representation of C1 and iC2. This


figure highlights the fact that the circuit has a linear behavior if:
iC1 iC2
IE
iC1
0.5IE
iC2
-3eT -2eT -eT

v ID 10 mV
v ID 50 mV
v ID 100 mV
v ID 150 mV
Correct answer b.)
a.)
b.)
c.)
d.)

38.
3p

eT

2eT

3eT

vID

Figure 9.4

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 .

Figure 9.2

Figure 9.3

In these conditions vO1 is:


a.)
IE
vO1=EC+
RC
v
1 + exp ID
eT

213

Analog Electronics - Tests

b.)

c.)

d.)

vO1=EC-

IE
RC
v ID

1 + exp
eT

IE
RC
v ID

1 + exp
eT
IE
vO1=ECRC
v ID

1 + exp
eT
vO1=EC+

where: v ID = v I1 v I 2
Correct answer d.)
39.
3p

Figure 9.2 shows a differential amplifier. The equivalent circuit (large


signal quasi-static regime) is presented in figure 9.3: Assume that
i B1 0 , i B 2 0 and i RE 0 . In these conditions vO2 is:

Figure 9.2

Figure 9.3

In these conditions vO2 is:


a.)
IE
RC
vO2=EC+
v ID

1 + exp
eT
b.)
IE
RC
vO2=EC+
v
1 + exp ID
eT
c.)
IE
vO2=ECRC
v ID

1 + exp
eT
214

Analog Electronics - Tests

d.)

IE
RC
v ID

1 + exp
eT
where: v ID = v I1 v I 2
Correct answer b.)
vO2=EC-

40.
2p

Differential stages can be connected directly as:

41.
4p

The graphic representation of vOD=vOD(vID) is:

a.)

when the differential input voltage (vID) becomes zero, the


differential output voltage (vOD) becomes also zero
b.) thermal drift is small
c.) there is a small scattering of the parameters
d.) the two transistors are identical
Correct answer a.)

a.)

vOD
IERC

-3eT -2eT -eT

eT

2eT

3eT

-IERC
vID

b.)

vOD
IERC

-3eT -2eT -eT

c.)

eT

2eT

3eT

vID

vOD

-3eT -2eT -eT

eT

2eT

3eT

-IERC

215

vID

Analog Electronics - Tests

d.)

vOD
IERC

-3eT -2eT -eT

eT

2eT

3eT vID

-IERC

Where:
vID the differential input voltage;
vOD differential output voltage
Correct answer a.)
42
3p

Figure 9.5 shows the equivalent semi circuit (small signal quasi-static
regime) of a differential amplifier. Differential gain is:

A dd = 1
A dd = 1
A dd = g m R C
A dd = g m R C
Correct answer d.)
a.)
b.)
c.)
d.)

Figure 9.5

43.
1p

Assume a power amplifier. The active devices are operating:

44.
2p

From the point of view of topological structure the output stages are
divided into:

a.) in linear regime


b.) in non-linear regime
c.) according to the load
d.) according to the signal
Correct answer b.)

a.) class A, class B, class AB, class C etc.


b.) asymmetric stages and symmetric stages
c.) small signal and large signal amplifiers
d.) qualitative classes
Correct answer b.)
216

Analog Electronics - Tests

45.
1p

From the point of view of conduction angles the output stages are
divided into:
a.) class A, class B, class AB, class C etc.
b.) asymmetric stages and symmetric stages
c.) small signal and large signal amplifiers
d.) qualitative classes
Correct answer a.)

46.
2p

Assume a class A amplifier. The conduction angle is:


a.)
b.)
c.)
d.)

= 360 0
180 0 < < 360 0
= 180 0
< 1800
Correct answer a.)

47.
2p

Assume a class AB amplifier. The conduction angle is:


a.) = 360 0
b.) 180 0 < < 360 0
c.) = 180 0
d.) < 1800
Correct answer b.)

48.
2p

Assume a class B amplifier. The conduction angle is:


a.) = 360 0
b.) 180 0 < < 360 0
c.) = 180 0
d.) < 1800
Correct answer c.)

49.
2p

Assume a class C amplifier. The conduction angle is:


a.)
b.)

= 360 0
180 0 < < 360 0
217

Analog Electronics - Tests

c.) = 180 0
d.) < 1800
Correct answer d.)

50
2p

The circuit diagram of a class A amplifier is:


a.)

b.)

c.)

d.)

Correct answer d.)


218

Analog Electronics - Tests

51.
2p

The circuit diagram of a class AB amplifier is:


a.)

b.)

c.)

d.)

Correct answer a.)


52.
2p

The circuit diagram of a class B amplifier is:

219

Analog Electronics - Tests

a.)

b.)

c.)

d.)

Correct answer c.)


53.
1p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Resistor RB1

220

Analog Electronics - Tests

Figure 9.6

a.) is part of bias divider


b.) ensures thermal stability
c.) is load resistor
d.) is input resistance
Correct answer a.)

54.
1p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Resistor RB2

a.) is part of bias divider


b.) ensures thermal stability
c.) is load resistor
d.) is input resistance
Correct answer a.)

55.
1p

Figure 9.6

The circuit diagram of a class A amplifier is shown in figure 9.6.


Resistor RE:

a.)
b.)

is part of bias divider


ensures thermal stability

Figure 9.6

221

Analog Electronics - Tests

c.) is load resistor


d.) is input resistance
Correct answer b.)

56.
1p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Resistor RL:

a.) is part of bias divider


b.) ensures thermal stability
c.) is load resistor
d.) is input resistance
Correct answer c.)

57.
1p

The circuit diagram of a class A amplifier is shown in figure 9.6.


C1:

a.) is part of bias divider


b.) ensures thermal stability
c.) is coupling capacitor
d.) is decoupling capacitor
Correct answer c.)

58.
1p

Figure 9.6

Figure 9.6

The circuit diagram of a class A amplifier is shown in figure 9.6.


CE:

222

Analog Electronics - Tests

Figure 9.6

a.) is part of bias divider


b.) ensures thermal stability
c.) is coupling capacitor
d.) is decoupling capacitor
Correct answer d.)

59.
1p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Tr:

Figure 9.6

a.) ensures maximum possible power delivered into the load


b.) ensures thermal stability
c.) is coupling capacitor
d.) is decoupling capacitor
Correct answer a.)

60.
2p

Assume a class A amplifier (figure 9.6). The safe area of the


transistor is presented in figure 9.7. The quiescent point must be put
in:
iC
A
IC max
B

C
D
VCE max vCE

Figure 9.6

a.)

Figure 9.7

point A
223

Analog Electronics - Tests

b.) point B
c.) point C
d.) point D
Correct answer a.)

61.
2p

Assume a class AB amplifier. The safe area of the transistor is


presented in figure 9.7. The quiescent point must be put in:
iC
A
IC max
B

C
D
VCE max vCE

Class AB amplifier

Figure 9.7

a.) point A
b.) point B
c.) point C
d.) point D
Correct answer c.)

62.
2p

Assume a class B amplifier. The safe area of the transistor is


presented in figure 9.7. The quiescent point must be put in:
iC
A
IC max
B

C
D
VCE max vCE

Class B amplifier

Figure 9.7

a.) point A
b.) point B
c.) point C
d.) point D
Correct answer d.)
224

Analog Electronics - Tests

63.
1p

The definition of the efficiency of a power amplifier is:


a.)
b.)
c.)
d.)

pA
pL

pL
pA

1 pL
1 + pA

1 + pL
1 pA

where:
pL

the average power delivered into the load

pA

the average power delivered by the power suply

Correct answer d.)


64.
3p

Assume a class A amplifier (figure 9.6). Figure 9.7 shows the


quiescent point position. In these conditions, the drop voltage
between the emitter and the collector is vCE=EC+ECsin(t). The
collector current becomes:
iC
A
IC max
B

C
D
VCE max vCE

Figure 9.6

Figure 9.7

a.) iC=ICsin(t)
b.) iC=-ICsin(t)
c.) iC=IC-ICsin(t)
d.) iC=IC+ICsin(t)
Correct answer c.)

65.
3p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Knowing that iC=IC-ICsin(t) and vCE=EC+ECsin(t), the average
power delivered by the power supply ( p A ) is:

225

Analog Electronics - Tests

Figure 9.6

a.)
b.)
c.)
d.)

pA
pA
pA
pA

1
= E C IC
2
= E C IC
1
= EC IC

4
= EC IC

Correct answer b.)


66.
3p

The circuit diagram of a class A amplifier is shown in figure 9.6.


Knowing that iC=IC-ICsin(t) and vCE=EC+ECsin(t), the average
power delivered into the load by the power supply ( p L ) is:

Figure 9.6

a.)
b.)
c.)
d.)

1
pL = ECIC
2

pL = E CIC
1
E C IC

4
p L = E C IC

pL =

Correct answer a.)


67.
2p

The circuit diagram of a class A amplifier is shown in figure 9.6. The


maximum efficiency of this stage is:

226

Analog Electronics - Tests

Figure 9.6

a.)
b.)
c.)
d.)

1
=
2

=
4
3
=
4
1
=
4

Correct answer a.)


68.
4p

The transfer characteristic of a class B amplifier is:


a.)

vO

T1 sat.

EC

-EE
EC
T 2 act
T1 off
-EE
T2 sat.
s
vO

b.)

vIN

T1 act.
T2 off

T2 act
T 1 off

EC

-EE

-V
V

-E E

T1 sat

EC

vIN

T1 act.
T2 off

T 2 sat.

227

Analog Electronics - Tests

c.)

vO

EC

Cut-off region
vBEsa
Active region

Saturation region

vCEsat
vIN

0.5V 1V

d.)

vO

III.

EC-v CEsat.

II.
I.

EC

v IN

Correct answer a.)


69.
4p

The transfer characteristic of a class AB amplifier is:


a.)

vO

T1 sat.

EC

-EE
vIN

EC
T 2 act
T1 off

T1 act.
T2 off
-EE
T2 sat.
s
v

b.)

T2 act
T 1 off

EC

-EE

-V
V

-E E

T1 sat

EC

vIN

T1 act.
T2 off

T 2 sat.

c.)

EC

vO

Cut-off region
vBEsa
Active region

Saturation region

vCEsat
vIN

0.5V 1V

228

Analog Electronics - Tests

d.)

vO

III.

EC-vCEsat.

II.
I.

EC

vIN

Correct answer b.)


70.
3p

Figure 9.8 shows a class B amplifier. Figure 9.9 shows the transfer
characteristic of this stage. The region denoted by 1is characterized
by the fact that:
vO

4.

EC
2.
-EE

-V
V

vIN

EC
3.

-E E
1.

Figure 9.8

Figure 9.9

a.)
b.)
c.)

transistor T1 is operating in saturation region


transistor T2 is operating in saturation region
transistor T1 is operating in active region and transistor T2 is
operating in cut-off region
d.) transistor T1 is operating in cut-off region and transistor T2 is
operating in active region
Correct answer a.)

72.
3p

Figure 9.8 shows a class B amplifier. Figure 9.9 shows the transfer
characteristic of this stage. The region denoted by 2is characterized
by the fact that:
vO

4.

EC
2.
-EE

-V
V

EC
3.

-E E
1.

229

vIN

Analog Electronics - Tests


Figure 9.8

Figure 9.9

a.)
b.)
c.)

transistor T1 is operating in saturation region


transistor T2 is operating in saturation region
transistor T1 is operating in active region and transistor T2 is
operating in cut-off region
d.) transistor T1 is operating in cut-off region and transistor T2 is
operating in active region
Correct answer d.)

73.
3p

Figure 9.8 shows a class B amplifier. Figure 9.9 shows the transfer
characteristic of this stage. The region denoted by 3is characterized
by the fact that:
vO

4.

EC
2.
-EE

-V
V

vIN

EC
3.

-E E
1.

Figure 9.8

Figure 9.9

a.)
b.)
c.)

transistor T1 is operating in saturation region


transistor T2 is operating in saturation region
transistor T1 is operating in active region and transistor T2 is
operating in cut-off region
d.) transistor T1 is operating in cut-off region and transistor T2 is
operating in active region
Correct answer a.)

74.
3p

Figure 9.8 shows a class B amplifier. Figure 9.9 shows the transfer
characteristic of this stage. The region denoted by 4is characterized
by the fact that:
vO

4.

EC
2.
-EE

-V
V

EC
3.

-E E
1.

Figure 9.8

Figure 9.9

230

vIN

Analog Electronics - Tests

a.)
b.)
c.)

transistor T1 is operating in saturation region


transistor T2 is operating in saturation region
transistor T1 is operating in active region and transistor T2 is
operating in cut-off region
d.) transistor T1 is operating in cut-off region and transistor T2 is
operating in active region
Correct answer c.)

75.
2p

Crossover distortions are presented in figure:


a.)

vO

b)

vO

c)

vO
t

d.

vO

Correct answer b.)


76.
2p

Assume a class B amplifier. Figure 9.10 shows the crossover


distortions. In order to eliminate these type of distortions it
necessary:
vO
t
Figure 9.10

a.)
b.)
c.)
d.)

to bias both transistors to be on state for more a half cycle


to bias both transistors to be off state for more a half cycle
to bias both transistors to be off state a half cycle
to bias both transistors to be on state a half cycle
231

Analog Electronics - Tests

Correct answer a.)


77.
1p

Figure 9.11 shows a class AB amplifier. Current source ID and the


diodes D1 and D2 have the role:

Figure 9.11

a.) to bias both transistors to be on state for more a half cycle


b.) to bias both transistors to be off state for more a half cycle
c.) to bias both transistors to be off state a half cycle
d.) to bias both transistors to be on state a half cycle
Correct answer a.)

78.
3p

Assume a class B amplifier (figure 9.8). Figure 9.12 shows the


quiescent point position. In these conditions, the drop voltage
between the emitter and the collector is vc(t)=Vcsin(t). The collector
current becomes:
P Dm ax

iC

Dynamic load line


IC max A
Ic

Quiescent point
M
B
VC E max vCE
Vce

Figure 9.8

Figure 9.12

a.) ic=Icsin(t)
b.) ic=-Icsin(t)
c.) iC=IC-Icsin(t)
d.) iC=IC+Icsin(t)
Correct answer a.)
232

Analog Electronics - Tests

79.
3p

Assume a class B amplifier (figure 9.8). Assume also that the


instantaneous value of the current delivered by the source is
iS(t)=Ic sin(t). The average value of the power delivered by the
source ( p A ) is:

Figure 9.8

a.)
b.)
c.)
d.)

1
EC IC
2
pA = E CIC
2
p A = E CIC

4
p A = E C IC

pA =

Correct answer c.)


80.
3p

Assume a class B amplifier (figure 9.8). Assume also that the


instantaneous value of the current delivered by the source is
iS(t)=Ic sin(t) and the voltage drop across the load is
vc(t)=Vcsin(t). The average value of the power delivered into the
load ( p L ) is:

Figure 9.8

a.)
b.)

pL =

1
ECIC
2

pL = E C IC

233

Analog Electronics - Tests

c.)
d.)

1
EC IC

4
p L = EC IC

pL =

Correct answer a.)


81.
2p

Assume a class B amplifier (figure 9.8). The maximum value of the


efficiency is:

Figure 9.8

a.)
b.)
c.)
d.)

1
=
2

=
4
3
=
4
1
=
4

Correct answer b.)


82.
2p

One of the advantages of the feedback is:


a.)
b.)

increase the stability of the amplifier gain against ageing (only)


increase the stability of the amplifier gain against scattering of the
parameters (only)
c.) increase the stability of the amplifier gain against: ageing,
scattering of the parameters and temperature
d.) increase the stability of the amplifier gain against temperature
(only)
Correct answer c.)

83
2p

One of the advantages of the feedback is:


a.)
b.)

conveniently change of the input impedance


conveniently change of the output impedance
234

Analog Electronics - Tests

c.) gain reduction


d.) conveniently change of the input or output impedance
Correct answer d.)

84.
2p

One of the advantages of the feedback is:


a.)

decrease linearity attenuation of non-linear distortions (attenuation


of non-linear distortions )
b.) increase linearity attenuation of non-linear distortions (attenuation
of non-linear distortions )
c.) increase linearity attenuation of linear distortions (attenuation of
non-linear distortions )
d.) decrease linearity attenuation of linear distortions (attenuation of
non-linear distortions )
Correct answer b.)

85.
2p

One of the advantages of the feedback is:


a.) increase bandwidth
b.) decrease bandwidth
c.) gain reduction
d.) oscillation tendency
Correct answer a.)

86.
2p

One of the advantages of the feedback is:

87.
2p

One of the disadvantages of the feedback is:

a.) the decreasing the signal to noise ratio.


b.) the increasing the signal to noise ratio.
c.) gain reduction
d.) oscillation tendency
Correct answer a.)

a.) gain increasing


b.) the decreasing the signal to noise ratio.
c.) the increasing the signal to noise ratio.
d.) gain reduction
Correct answer d.)
235

Analog Electronics - Tests

88.
2p

One of the disadvantages of the feedback is:


a.) gain increasing
b.) the decreasing the signal to noise ratio.
c.) the increasing the signal to noise ratio.
d.) oscillation tendency
Correct answer d.)

89
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


Xi is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.) input signal


b.) output signal
c.) error signal
d.) feedback signal
Correct answer d.)

90
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


Xo is denoted:
Xi

Xo

X
A

+
Xf

a.) input signal


b.) output signal
c.) error signal
d.) feedback signal
Correct answer b.)

91

Figure 9.13

Figure 9.13 shows the general structure of a feedback amplifier. The


236

Analog Electronics - Tests

1p

X is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.) input signal


b.) output signal
c.) error signal
d.) feedback signal
Correct answer c.)

92
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


Xf is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.) input signal


b.) output signal
c.) error signal
d.) feedback signal
Correct answer d.)

93
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


A is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

237

Analog Electronics - Tests

a.) the function performed by the adder circuit


b.) transfer function of the basic amplifier
c.) transfer function of the feedback network (feedback constant)
d.) transfer function of the feedback amplifier
Correct answer d.)

94
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


a is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.) the function performed by the adder circuit


b.) transfer function of the basic amplifier
c.) transfer function of the feedback network (feedback constant)
d.) transfer function of the feedback amplifier
Correct answer b.)

95
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


f is denoted:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.) the function performed by the adder circuit


b.) transfer function of the basic amplifier
c.) transfer function of the feedback network (feedback constant)
d.) transfer function of the feedback amplifier
Correct answer c.)

96
1p

Figure 9.13 shows the general structure of a feedback amplifier. The


is denoted:
238

Analog Electronics - Tests


Xi

Xo

X
A

+
Xf

Figure 9.13

a.) the function performed by the adder circuit


b.) transfer function of the basic amplifier
c.) transfer function of the feedback network (feedback constant)
d.) transfer function of the feedback amplifier
Correct answer a.)

98
2p

Figure 9.13 shows the general structure of a feedback amplifier. The


a is denoted transfer function of the basic amplifier. Depending on
the existing signals in the figure, the expression of this transfer
function is:
Xi

Xo

X
A

+
Xf

a.)
b.)
c.)
d.)

Figure 9.13

X
a= o
X
Xf
a=
Xi

a=Xi+Xf
a=

Xo
Xi

Correct answer a.)


99
2p

Figure 9.13 shows the general structure of a feedback amplifier. The


A is denoted transfer function of the basic amplifier. Depending on
the existing signals in the figure, the expression of this transfer
function is:

239

Analog Electronics - Tests


Xi

Xo

X
A

+
Xf

a.)
b.)
c.)
d.)

Figure 9.13

X
A= o
X
X
A= f
Xi

A=Xi+Xf
A=

Xo
Xi

Correct answer c.)


100 Figure 9.13 shows the general structure of a feedback amplifier. The
2p f is denoted transfer function of the basic amplifier. Depending on
the existing signals in the figure, the expression of this transfer
function is:
Xi

Xo

X
A

+
Xf

a.)
b.)
c.)
d.)

Figure 9.13

X
f= o
X
Xf
f=
Xi

f=Xi+Xf
f=

Xo
Xi

Correct answer a.)


101 Figure 9.13 shows the general structure of a feedback amplifier. The
2p is denoted transfer function of the basic amplifier. Depending on
the existing signals in the figure, the expression of this transfer
function is:
240

Analog Electronics - Tests


Xi

Xo

X
A

+
Xf

Figure 9.13

a.)

X
Xi = o
X

b.)

Xf
Xi
X = Xi+Xf

c.)
d.)

X =

X =

Xo
Xi

Correct answer a.)


102 Figure 9.13 shows the general structure of a feedback amplifier.
4p Considering that:
transfer functions are frequency independent;
both basic amplifier and feedback network are operating in
linear regime
feedback network does not charge the amplifier
the amplifier does not charge the feedback network
feedback loop can be traveled only by direction of the arrows
in the figure;
the fundamental equation of ideal reaction is:
Xi

Xo

X
A

+
Xf

a.)
b.)

Figure 9.13

a
A=
1 + af
f
A=
1 + af
241

Analog Electronics - Tests

c.)

af
1 + af
d.)
1
A=
1 + af
Correct answer a.)
A=

103 Figure 9.13 shows the general structure of a feedback amplifier.


2p Positive feedback is defined by:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.)

A a

b.)

A =a

c.)

A<a

d.)

A >a
Correct answer d.)

104 Figure 9.13 shows the general structure of a feedback amplifier.


2p Negative feedback is defined by:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.)

A a

b.)

A =a

c.)

A<a

d.)

A >a
Correct answer c.)
242

Analog Electronics - Tests

105 Figure 9.13 shows the general structure of a feedback amplifier. T


2p is defined by:
Xi

Xo

X
A

+
Xf

Figure 9.13

T = Af
T = af
a
T=
f
d.)
A
T=
f
Correct answer b.)

a.)
b.)
c.)

106 Figure 9.13 shows the general structure of a feedback amplifier. T


2p is defined by T = af . If T>>1 then A becomes:
Xi

Xo

X
A

+
Xf

Figure 9.13

a.)

1
A
a
b.)
1
A
f
c.) A a
d.) A f
Correct answer b.)

107 From the topological point of view, if the feedback network collect
3p information in voltage, it must be connected:
a.) series with the load
b.) shunt with the load
243

Analog Electronics - Tests

c.) series with the signal source


d.) shunt with the signal source
Correct answer b.)

108 From the topological point of view, if the feedback network collect
3p information in current, it must be connected:
a.) series with the load
b.) shunt with the load
c.) series with the signal source
d.) shunt with the signal source
Correct answer a.)
109 Assume that the output of a feedback network is voltage. It must be
3p connected:
a.) series with the load
b.) shunt with the load
c.) series with the signal source
d.) shunt with the signal source
Correct answer c.)
113 Assume that the output of a feedback network is current. It must
3p be connected:
a.) series with the load
b.) shunt with the load
c.) series with the signal source
d.) shunt with the signal source
Correct answer d.)
114 Shunt-shunt feedback is shown in figure noted:
2p
a.)

b.)

244

Analog Electronics - Tests

c.)

d.)

Correct answer b.)


115 Shunt-series feedback is shown in figure noted:
2p
a.)

b.)

c.)

d.)

Correct answer c.)


116 Series-series feedback is shown in figure noted:
2p
a.)

245

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer d.)


117 Series-parallel feedback is shown in figure noted:
2p
a.)

b.)

c.)

d.)

Correct answer a.)


118 Figure 9.14 shows the basic structure of an amplifier with shunt1p shunt feedback. The input signal of the source is:

246

Analog Electronics - Tests

Figure 9.14

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer a.)

119 Figure 9.14 shows the basic structure of an amplifier with shunt1p shunt feedback. The output signal of the amplifier is:

Figure 9.14

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

120 Figure 9.14 shows the basic structure of an amplifier with shunt1p shunt feedback. The output signal of the feedback network is:

Figure 9.14

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

121 Figure 9.14 shows the basic structure of an amplifier with shunt1p shunt feedback. The input signal of the feedback network is:
247

Analog Electronics - Tests

Figure 9.14

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

122 Figure 9.14 shows the basic structure of an amplifier with shunt2p shunt feedback. The transfer function of the amplifier is:

a.)
b.)
c.)
d.)

Figure 9.14

V
A o
Vin
A

Vo
Iin

Io
Vin

Io
Iin

Correct answer b.)


123 A typical circuit for shunt-shunt feedback is shown in figure noted:
3p
a.)

248

Analog Electronics - Tests

b.)

c.)

d.)

Correct answer a.)


124 A typical circuit for shunt-series feedback is shown in figure noted:
3p
a.)

b.)

c.)

d.)

Correct answer d.)


249

Analog Electronics - Tests

125 A typical circuit for series-shunt feedback is shown in figure noted:


3p
a.)

b.)

c.)

d.)

Correct answer c.)


126 A typical circuit for series- series feedback is shown in figure noted:
3p
a.)

b.)

250

Analog Electronics - Tests

c.)

d.)

Correct answer b.)


127 A typical circuit for shunt-shunt feedback is shown in figure 9.15.
3p The feedback network is formed by:

Figure 9.15

a.) RS, RF and RL resistors


b.) RS and RF resistors
c.) RF resistor
d.) RF i RL resistors
Correct answer c.)

128 A typical circuit for shunt-shunt feedback is shown in figure 9.15.


3p The feedback network is formed by RF resistor. In these conditions,
f network is shown in figure:

Figure 9.15

a.)
b.)

251

Analog Electronics - Tests

c.)
d.)

Correct answer a.)


129 A typical circuit for shunt-shunt feedback is shown in figure 9.15.
3p The feedback network is formed by RF resistor. In these conditions,
f is:

a.)
b.)

Figure 9.15

1
fy =
RF
1
fy =
RF

fz = R F
f z = R F
Correct answer d.)
c.)
d.)

130 A typical circuit for shunt-shunt feedback is shown in figure 9.15.


3p The feedback network is formed by RF resistor. In these conditions,
a is:

Figure 9.15

a.)

1
Ay =
RF
b.)
1
Ay =
RF
c.) A z = R F
d.) A z = R F
Correct answer b.)
252

Analog Electronics - Tests

131 Figure 9.16 shows the basic structure of an amplifier with series1p series feedback. The input signal of the source is:

Figure 9.16

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

132 Figure 9.16 shows the basic structure of an amplifier with series1p series feedback. The error signal is:

Figure 9.16

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

133 Figure 9.16 shows the basic structure of an amplifier with series1p series feedback. The output signal of the feedback network is:

Figure 9.16

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)
253

Analog Electronics - Tests

134 Figure 9.16 shows the basic structure of an amplifier with series1p series feedback. The input signal of the feedback network is:

Figure 9.16

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer a.)

135 Figure 9.16 shows the basic structure of an amplifier with series2p series feedback. The transfer characteristic of the amplifier is based
on:

Figure 9.16

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer b.)

138 Figure 9.17 shows a typical circuit of an amplifier with series-series


2p feedback. The feedback network is formed by:

a.)
b.)
c.)

RE1, RF and RE2 resistors


RE1 and RF resistors
RF resistor

Figure 9.17

254

Analog Electronics - Tests

d.) RF i RE2 resistors


Correct answer a.)

139 Figure 9.17 shows a typical circuit of an amplifier with series-series


3p feedback. The feedback network is formed by RE1, RF and RE2
resistors: In these conditions, the f circuit is:

Figure 9.17

a.)
b.)
c.)
d.)

Correct answer c.)


140 Figure 9.17 shows a typical circuit of an amplifier with series-series
3p feedback. The feedback network is formed by RE1, RF and RE2
resistors: In these conditions, the transfer factor f is:

Figure 9.17

a.)

f z = [R E 2

b.)

f z = [R E1

(R F + R E1 )] R E1
R E1 + R F
(R F + R E 2 )] R E 2
R E2 + R F
255

Analog Electronics - Tests

c.)

f z = [R E 2 (R F + R E 2 )]

R E2
R E2 + R F
d.)
R E1
f z = [R E1 (R F + R E 2 )]
RE2 + R F
Correct answer a.)

141 Figure 9.17 shows a typical circuit of an amplifier with series-series


3p feedback. The feedback network is formed by RE1, RF and RE2
resistors. In these conditions, the transfer factor a is:

a.)

Figure 9.17

Az =

[R (R
E1

b.)

Az =

1
F

[R (R
E2

c.)

Az =

[R (R
E2

d.)

Az =

[R (R
E2

+ R E1

)]R R+ R
E1

E1

1
F

+ R E1

)]R R+ R
E2

E1

1
F

+ R E2

)]R R+ R
E1

E1

1
F

+ R E1

)]R R+ R

E1

E1

Correct answer d.)


142 Figure 9.18 shows the basic structure of an amplifier with series1p shunt feedback. The input signal is:

a.)

current

Figura 9.18

256

Analog Electronics - Tests

b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

143 Figure 9.18 shows the basic structure of an amplifier with series1p shunt feedback. The error signal is:

Figure 9.18

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

144 Figure 9.18 shows the basic structure of an amplifier with series1p shunt feedback. The output signal of the feedback network is:

Figure 9.18

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

145 Figure 9.18 shows the basic structure of an amplifier with series1p shunt feedback. The input signal of the feedback network is:

Figure 9.18

257

Analog Electronics - Tests

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer b.)

146 Figure 9.18 shows the basic structure of an amplifier with series2p shunt feedback. The transfer function A is:

Figure 9.18

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer a.)

147 Figure 9.18 shows the basic structure of an amplifier with series2p shunt feedback. The transfer function A is:

Figure 9.18

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer a.)

148 Figure 9.18 shows the basic structure of an amplifier with series2p shunt feedback. The transfer function f is:

258

Analog Electronics - Tests


Figure 9.18

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer a.)

149 Figure 9.19 shows a typical circuit of an amplifier with series-shunt


2p feedback. The feedback network is formed by:

a.) R E, RF and RL resistors


b.) R E, and R F resistors
c.) R F resistor
d.) R F i RL resistors
Correct answer b.)

Figure 9.19

150 Figure 9.19 shows a typical circuit of an amplifier with series-shunt


3p feedback. The feedback network is formed by RE, and RF resistors. In
these conditions, f circuit is:

Figure 9.19

a.)
b.)
c.)
d.)

259

Analog Electronics - Tests

Correct answer d.)


151 Figure 9.19 shows a typical circuit of an amplifier with series-shunt
3p feedback. The feedback network is formed by RE, and RF resistors. In
these conditions, f is:

a.)
b.)

Figure 9.19

RF
fv =
RE + RF
R + RF
fv = E
RF

RE + RF
RE
d.)
RE
fv =
RE + RF
Correct answer d.)

c.)

fv =

152 Figure 9.19 shows a typical circuit of an amplifier with series-shunt


3p feedback. The feedback network is formed by RE, and RF resistors. In
these conditions, A is:

a.)
b.)
c.)

Figure 9.19

RF
Av =
RE + RF
R + RF
Av = E
RF
R + RF
Av = E
RE
260

Analog Electronics - Tests

d.)

RE
RE + RF
Correct answer c.)
Av =

153 Figure 9.20 shows the basic structure of an amplifier with shunt1p series feedback. The input signal of the amplifier is:

Figure 9.20

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer a.)

154 Figure 9.20 shows the basic structure of an amplifier with shunt1p series feedback. The error signal of the amplifier is:

Figure 9.20

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer a.)

155 Figure 9.20 shows the basic structure of an amplifier with shunt1p series feedback. The output signal of the feedback network is:

Figure 9.20

a.)
b.)

current
voltage
261

Analog Electronics - Tests

c.) mainly current and sometimes voltage


d.) mainly voltage and sometimes current
Correct answer a.)

156 Figure 9.20 shows the basic structure of an amplifier with shunt1p series feedback. The input signal of the feedback network is:

Figure 9.20

a.) current
b.) voltage
c.) mainly current and sometimes voltage
d.) mainly voltage and sometimes current
Correct answer a.)

157 Figure 9.20 shows a typical circuit of an amplifier with shunt-series


2p feedback. The transfer characteristic of the amplifier is based on:

Figure 9.20

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer d.)

158 Figure 9.20 shows a typical circuit of an amplifier with shunt-series


2p feedback. The transfer characteristic of the basic amplifier is based
on:

Figure 9.20

a.)
b.)

the ratio between output voltage and the input voltage


the ratio between output current and the input voltage
262

Analog Electronics - Tests

c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer d.)

159 Figure 9.20 shows a typical circuit of an amplifier with shunt-series


2p feedback. The transfer characteristic f is based on:

Figure 9.20

a.) the ratio between output voltage and the input voltage
b.) the ratio between output current and the input voltage
c.) the ratio between output voltage and the input current
d.) the ratio between output current and the input current
Correct answer d.)

160 Figure 9.21 shows a typical circuit of an amplifier with shunt-series


2p feedback. The feedback network is formed by:

a.) R E, RF and RL resistors


b.) R E and RF resistors
c.) R F resistor
d.) R F and RL resistors
Correct answer b.)

Figure 9.21

161 Figure 9.21 shows a typical circuit of an amplifier with shunt-series


3p feedback. The feedback network is formed by RE and RF resistors.
f circuit is shown in figure:

a.)

Figure 9.21

263

Analog Electronics - Tests

b.)
c.)
d.)

Correct answer a.)


162 Figure 9.21 shows a typical circuit of an amplifier with shunt-series
3p feedback. The feedback network is formed by RE and RF resistors.
f circuit is:

Figure 9.21

a.)

RF
fi =
RE + RF
b.)
R + RF
fi = E
RF
c.)
R + RF
fi = E
RE
d.)
RE
fi =
RE + RF
Correct answer d.)

163 Figure 9.21 shows a typical circuit of an amplifier with shunt-series


3p feedback. The feedback network is formed by RE and RF resistors.
A circuit is:

a.)

Figure 9.21

RF
Ai =
RE + RF

264

Analog Electronics - Tests

RE + RF
RF
c.)
R + RF
Ai = E
RE
d.)
RE
Ai =
RE + RF
Correct answer d.)

b.)

Ai =

164 The shunt-shunt feedback is shown in figure:


2p
a.)

b.)

c.)

d.)

Correct answer b.)

265

Analog Electronics - Tests

266

Analog Electronics - Tests

Chapter 10
Voltage Regulators
1.
2p

Internal resistance of an ideal voltage source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer a.)

2.
2p

Internal resistance of an ideal current source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer b.)

3.
2p

The input resistance of an ideal voltage controlled voltage source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer b.)

4.
2p

The output resistance of an ideal voltage controlled voltage source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer a.)
267

Analog Electronics - Tests

5.
2p

The input resistance of an ideal current controlled voltage source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer a.)

6.
2p

The output resistance of an ideal current controlled voltage source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer a.)

7.
2p

The input resistance of an ideal current controlled current source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer a.)

8.
2p

The output resistance of an ideal current controlled current source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer b.)

9.
2p

The input resistance of an ideal voltage controlled current source is:


a.) zero
b). infinite
c.) very low
d.) very high
Correct answer b.)
268

Analog Electronics - Tests

10. The output resistance of an ideal voltage controlled current source is:
2p
a.) zero
b). infinite
c.) very low
d.) very high
Correct answer b.)
11. ANSI symbol of a voltage controlled voltage source is:
1p
a.)

b).

c.)

d.)

Correct answer d.)


12. ANSI symbol of a current controlled voltage source is:
1p
a.)

b).

c.)

269

Analog Electronics - Tests

d.)

Correct answer b.)


13. ANSI symbol of a current controlled current source is:
1p
a.)

b).

c.)

d.)

Correct answer a.)


14. ANSI symbol of a voltage controlled current source is:
1p
a.)

b).

c.)

270

Analog Electronics - Tests

d.)

Correct answer b.)


15. Figure 10.1 shows a voltage regulator. With vRED is denoted:
2p

Figure 10.1

a.) The instantaneous value of the AC component of the input voltage


b). The instantaneous value of the DC component of the input voltage
c.) The amplitude of the AC component of the input voltage
d.) The total instantaneous value of the input voltage
Correct answer d.)

16. Figure 10.1 shows a voltage regulator. With iRED is denoted:


2p

Figure 10.1

a.) The instantaneous value of the AC component of the input current


b). The instantaneous value of the DC component of the input current
c.) The amplitude of the AC component of the input current
d.) The total instantaneous value of the input current
Correct answer d.)

17. Figure 10.1 shows a voltage regulator. With iL is denoted:


2p

Figure 10.1

a.)
b).
c.)

The instantaneous value of the AC component of the output current


The instantaneous value of the DC component of the output current
The amplitude of the AC component of the output current
271

Analog Electronics - Tests

d.) The total instantaneous value of the output current


Correct answer d.)

18. Figure 10.1 shows a voltage regulator. With vL is denoted:


2p

Figure 10.1

a.) The instantaneous value of the AC component of the output voltage


b). The instantaneous value of the DC component of the output voltage
c.) The amplitude of the AC component of the output voltage
d.) The total instantaneous value of the output voltage
Correct answer d.)

19. Figure 10.2 shows a Zener regulator. RL is:


2p

Figure 10.2

a.) load resistor


b). bulk resistor
c.) positive feedback resistor
d.) negative feedback resistor
Correct answer a.)

19. Figure 10.2 shows a Zener regulator. RB is:


2p

a.) load resistor


b). bulk resistor
c.) positive feedback resistor
d.) negative feedback resistor
Correct answer b.)

Figure 10.2

20. Figure 10.2 shows a Zener regulator. Figure 10.3 shows the I-V
272

Analog Electronics - Tests

1p

characteristic of the diode.


iA
VZ

vA
iZmin

iZmax

Figure 10.2

Figure 10.3

The diode must operate in:


a.) conducting region
b). cut-off region
c.) breakdown region
d.) linear region
Correct answer b.)
21. Figure 10.2 shows a Zener regulator. The voltage drop across the
1p diode vA is:

a.)

v A = V

b).

v A = V

Figure 10.2

c.) v A = VZ
d.) v A = VZ
Correct answer d.)

22. Figure 10.2 shows a Zener regulator. The current flowing through the
1p diode, iZ, must satisfy the condition:

a.)

i Z min i Z

Figure 10.2

273

Analog Electronics - Tests

b). i Z min i Z i Z max


c.) i Z i Z max
d.) i Z 0
Correct answer b.)

23. Figure 10.2 shows a Zener regulator.


3p

Figure 10.2

The equivalent circuit (large signal quasi-static regime) is:


a.)

b).

c.)

d.)

Correct answer c.)


24. Figure 10.2 shows a Zener regulator. The equivalent circuit (large
3p signal quasi-static regime) is presented in figure 10.4.

Figure 10.2

Figure 10.4

Applying Kirchhoff's Laws one obtains:


a.)
iRED=iZ+iL
274

Analog Electronics - Tests

VZ=iZR Z+iLRL
-VZ=iREDR B+iZR Z-vRED
b).
iRED=iZ+iL
VZ=iZR Z+iLRL
-VZ=iREDR B+iZR Z+vRED
c.)
iRED=iZ+iL
VZ=-iZRZ+iLR L
VZ=iREDRB+iZR Z-vRED
d.)
iRED=iZ+iL
VZ=-iZRZ+iLR L
-VZ=iREDR B+iZR Z-vRED
Correct answer d.)

25. Figure 10.2 shows a Zener regulator. The equivalent circuit (large
3p signal quasi-static regime) is presented in figure 10.4.

Figure 10.2

Figure 10.4

Applying Kirchhoff's Laws one obtains:


iRED=iZ+iL
VZ=-iZRZ+iLR L
-VZ=iREDRB+iZR Z-vRED
D 1
D 1
D 1
, GL =
and G Z =
the output voltage becomes:
Noting: G B =
RZ
RB
RL
a.)
GB
GZ
v L = v RED
+ VZ
G B + GL + G Z
GB + G L + G Z
b).
GL
GZ
v L = v RED
+ VZ
G B + GL + G Z
GB + G L + G Z
c.)
GB
GL
v L = v RED
+ VZ
G B + GL + G Z
GB + G L + G Z
d.)
GL
GL
v L = v RED
+ VZ
G B + GL + G Z
GB + G L + G Z
Correct answer a.)
26. Figure 10.2 shows a Zener regulator. The equivalent circuit (large
3p signal quasi-static regime) is presented in figure 10.4.
275

Analog Electronics - Tests

Figure 10.2
D

Noting: G B =

Figure 10.4

D 1
1
1
, GL =
and G Z =
the output voltage becomes:
RZ
RB
RL

GB
GZ
+ VZ
G B + GL + G Z
GB + G L + G Z
The graphical representation is shown in Figure denoted
i
i
vL
a.)
v L = v RED

Zmin

Zmax

VZ

vRED

b).

vL

iZmin

i Zma x

vL

iZmin

i Zmax

vL

iZmin

i Zmax

VZ

vRED

c.)
VZ

vRED

d.)
VZ

vRED

Correct answer b.)


27. Figure 10.2 shows a Zener regulator. The equivalent circuit (large
1p signal quasi-static regime) is presented in figure 10.4.

276

Analog Electronics - Tests

Figure 10.2
D

Noting: G B =

Figure 10.4

D 1
1
1
, GL =
and G Z =
the output voltage becomes:
RZ
RB
RL

GB
GZ
+ VZ
G B + GL + G Z
GB + G L + G Z
Taking into account that in real situations RB>>RZ and RL>>RZ above
relationship is approximated sufficiently by:
a.) v L VZ
b). v L v RED
v L = v RED

c.)
d.)

vL VZ
vL vRED

Correct answer a)
28. Figure 10.2 shows a Zener regulator. The equivalent circuit (small
3p signal quasi-static regime) is:

Figure 10.2

a.)

b).

c.)

277

Analog Electronics - Tests

d.)

Correct answer a)
29. Figure 10.2 shows a Zener regulator.
3p

Figure 10.2

The equivalent circuit (small signal quasi-static regime) is

Assume rz<<RL and RB>>rZ. In these conditions the output resistance


becomes:
a.) ro rz
b). ro R B
c.) r = R R
o

d.)

R B rz
RL
Correct answer a)
ro

30. Figure 10.2 shows a Zener regulator.


3p

Figure 10.2

A solution in order to increase the stabilization coefficient is:


a.)

278

Analog Electronics - Tests

b).

c.)

d.)

Correct answer a)
31. Figure 10.2 shows a Zener regulator.
3p

Figure 10.2

A solution in order to increase the output current is:


a.)

279

Analog Electronics - Tests

b).

c.)

d.)

Correct answer c)
32. Figure 10.2 shows a Zener regulator. A solution in order to increase
3p the output current is presented in figure 10.5.

Figure 10.2

Figure 10.5

In these conditions:
a.) output current is increased 2 times
b). output current is increased times
c.) output current is increased 2 times
d.) output current is increased times
280

Analog Electronics - Tests

Correct answer d.)


33. Figure 10.2 shows a Zener regulator. A solution in order to increase
3p the output current is presented in figure 10.5.

Figure 10.2

Figure 10.5

In these conditions, the output resistance is:


a.) ro rz
b).
r
ro z

c.)
r
ro z

d.) ro rz
Correct answer b.)
34. Figure 10.2 shows a Zener regulator. A solution in order to increase
3p the output current is presented in figure 10.5.

Figure 10.2

Figure 10.5

In these conditions, the output voltage is:


a.) vL=VRED
b). vL=VRED-VZ
c.) vL=VRED-VBE
d.) vL=VZ-VBE
Correct answer d.)
281

Analog Electronics - Tests

35. The standard configuration of a voltage regulator is:


2p
a.)

b).

c.)

d.)

Correct answer d.)


36. The standard configuration of a voltage regulator (current limited) is:
2p
282

Analog Electronics - Tests

a.)

b).

c.)

d.)

Correct answer a.)


37. The standard configuration of a voltage regulator with foldback
2p (current limited) is:

283

Analog Electronics - Tests

a.)

b).

c.)

d.)

Correct answer b.)


38. The standard configuration of a voltage regulator is presented in
3p figure 10.6. The feedback network is formed by R1, R2 resistors. On
the nature of input and output signals can be said:

284

Analog Electronics - Tests

Figure 10.6

a.)

the input signal in the feedback network is current; the output signal
in the feedback network is current;
b). the input signal in the feedback network is current; the output signal
in the feedback network is voltage;
c.) the input signal in the feedback network is voltage; the output signal
in the feedback network is current;
d.) the input signal in the feedback network is voltage; the output signal
in the feedback network is voltage;
Correct answer d.)
39. The standard configuration of a voltage regulator is presented in
2p figure 10.6 The behavior of the reaction is shown in the figure
denoted:

Figure 10.6

a.)

v o v R 1R 2 v v B TR v o

b).

vo v R 1R 2 v v B TR vo

c.)

v o v R 1R 2 v v B TR v o

d.)

v o v R 1R 2 v v B TR v o

Correct answer c.)


40. The standard configuration of a voltage regulator (current limited) is
3p presented in figure 10.7. The knee current is:
285

Analog Electronics - Tests

a.)
b).
c.)
d.)

Figure 10.7

I KNEE =
I KNEE =
I KNEE =
I KNEE =

V
R1
V
R2
V
rprot

rprot R1 + R 2

Correct answer c.)


41. The standard configuration of a voltage regulator with fold back
4p (current limited) is presented in figure 10.8. The knee current is:

a.)
b).

Figure 10.8

I KNEE

R + R4
R3
= 3
V +
vO
rprot R 4
rprot R 4

I KNEE =

R1 + R 2
R3
V +
vO
rprot R 4
rprot R 4
286

Analog Electronics - Tests

c.)
d.)

I KNEE =

R3 + R 4
R3
V +
vO
rprot R 2
rprot R 4

I KNEE =

R3 + R 4
R1
V +
vO
rprot R 4
rprot R 2

Correct answer a.)


42. The standard configuration of a voltage regulator with fold back
4p (current limited) is presented in figure 10.8. The short-circuit current
is:

a.)
b).
c.)
d.)

ISH

R + R3
= 1
V
rprot R 4

ISH =

R2 + R4
V
rprot R 4

ISH =

R1 + R 2
V
rprot R 2

ISH =

R3 + R 4
V
rprot R 4

Figure 10.8

Correct answer a.)


43. Figure 10.9 shows an example of a voltage stabilizer. The block
1p denoted by 1is designed to:

287

Analog Electronics - Tests

a.) power transistor


b). error amplifier
c.) feedback
d.) Zener regulator
Correct answer a.)

Figure 10.9

44. Figure 10.9 shows an example of a voltage stabilizer. The block


1p denoted by 2is designed to:

a.) power transistor


b). error amplifier
c.) feedback
d.) Zener regulator
Correct answer c.)

Figure 10.9

45. Figure 10.9 shows an example of a voltage stabilizer. The block


1p denoted by 3is designed to:

288

Analog Electronics - Tests

a.) power transistor


b). error amplifier
c.) feedback
d.) Zener regulator
Correct answer b.)

Figure 10.9

46. Figure 10.9 shows an example of a voltage stabilizer. The block


1p denoted by 4is designed to:

a.) power transistor


b). error amplifier
c.) feedback
d.) Zener regulator
Correct answer d.)

Figure 10.9

47. Figure 10.9 shows an example of a voltage stabilizer. The behavior of


1p the reaction is shown in the figure denoted:

289

Analog Electronics - Tests

Figure 10.9

a.)

v O VB v BE T VCT = VBT VET = v O

b).

v O VB v BE T VCT = VBT VET = v O

c.)

v O VB v BE T VCT = VBT VET = v O

d.)

v O VB v BE T VCT = VBT VET = v O

Correct answer b.)


48. Figure 10.10 shows an example of an improved voltage stabilizer. The
3p improvement refers to:

Figure 10.10

a.) increasing the regulation coefficient


b). decreasing the output resistance
c.) decreasing the thermal stabilization coefficient
d.) increasing the output power
Correct answer a.)

290

Analog Electronics - Tests

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Analog Electronics - Tests

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294

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