IEEE

454

JOURNAL

Takeshi Shims was born

in Tokyo,
Japan, on
January
23, 1951.
He received the B.S. and
M.S. degrees in electronics
engineering
from
Tohoku
University,
Sendai, Japan, in 1974 and
1976, respectively.
In 1976 he joined the Toshiba Research and
Development
Center, Kawasaki,
Japan.
From
1976 to 1979 he was engaged in the development of the frequency
synthesized
tuning systems.
Since 1979 he has been involved in the
area of integrated-circuit
technology,
especially
in the computer-aided
circuit design.
Mr. Shims holds a U.S. patent and is a member of the Institute
of
Electronics
and Communication
Engineers of Japan.

a member
of Japan.

Tsutomq
Sugawara was born in Japan in 1949.
He received the B.S. and M.S. degrees in electrical engineering
from
Yamagata
University
in
1972 and 1974, respectively.
He joined Toshiba Research and Development
Center, Kawasaki,
Japan, in 1974, and has been
working
on the design of analog circuits
for
audio products.
His interests are in the area of
circuits
and
circuit
simulation
integrated
programs.
Mr. Sugawara holds several U.S. patents and is
of the Institute
of Electronics
and Communication
Engineers

OF SOLID-STATE

CIRCUITS,

VOL.

SC-17,

NO. 3, JUNE

1982

Seijiro Moriyama
received the B.E. and M.E. degrees from Kyoto
University,
Kyoto,
Japan, in
1976 and 1978, respectively.
In 1978 he joined the Research and Development Center,
Toshiba Corporation,
Kawasaki,
Japan, where he has been engaged in the development
of CAD systems for LSI.
He is currently developing
a device characteristics
evalu sting system for bipolar transistors.
Currently,
he is with the Electronic
Equipment
Laboratory
at the Center.
Mr. Moriyama
is a member of the Institute
of Electronics
and Communication
Engineers of Japan.

Hisashi Yamada received the B.S. and M.S. degrees from

Tohoku
University
in 1966 and
1968, respectively,
and the engineer degree in
electrical
engineering
from Stanford University,
Stanford,
CA, in 1979.
In 1968 he joined Toshiba Research and Development
Center,
Kawasaki,
Japan, and engaged in developing
circuits
for
consumer
products.
He is currently
a Senior Researcher
in the Electronic
Equipment
Laboratory
at the
Center.
His interests are in the area of linear
integrated
circuits and circuit simulation.
Mr. Yamada holds several U.S. patents and is a member of the Institute of Electronics
and Communication
Engineers of Japan.

CAD Model for Threshold and Subthreshold

Conduction in MOSFETS
p. ANTOGNETTI,

MEMBER, IEEE, D. D. CAVIGLIA,

Abstract-In
this paper, we propose a simple model for the operation
of MOSFETs in both weak and strong inversion. The proposed model
shows better agreement to experimental results than previous models in
the subthreshold and threshold regions, and is wetf suited for use in
circuit simulation programs; we have implemented it in MSINC and
SPICE programs, and simulation results are compared to experimental
data for a micropower amplifier.

INTRODUCTION

WO-dimensional

numerical

analysis is useful

in deter-

mining accurate simulation of device behavior [1] ; however, numerical techniques become impractical for use in CAD
applications

where rapid and reasonably accurate simulations

Manuscript
received November
13, 198 1; revised January 18, 1982.
This work was supported
in part by the CNR, Italy.
P. Antognetti
and D. D. Caviglia are with the Istituto di Elettrotecnica,
University
of Geneva, Geneva, Italy.
E. Profumo is with SGS-ATES Electronic
Components,
Mitan, Italy.

0018-9200/82/0600

of

MEMBER, lEEE , AND E. PROFUMO

device

phasizing

are required.

performance

comprehensive

analytical

this paper, and by using physical

approximations

On the other hand, emsolutions,

insight,

as we do in

we can determine

by which it will be possible to distinguish be-

tween the competing

conduction

mechanisms and the voltage

ranges in which they are dominant.

Experimental and theoretical characterizations

of MOSFETS

above threshold have been well established. However, many

current applications, both digital and analog, of MOS devices,
such as high density dynamic circuits and micropower op-amps
for switched capacitor circuits, depend critically on current
flowing in the device in the normally off or subthreshold
region of operation.
Several papers in the literature describe subthreshold conduction in terms of the diffusion drain current. These models show
the correct behavior in the voltage range well below threshold,
but are inaccurate as the gate voltage approaches the threshold
voltage VTH [2] . Fig. 1 shows both the diffusion and the drift

-0454 $00.75

01982

IEEE

ANTOGNETTI

et al.: CAD MODEL

455

FOR MOSFETS

10s191

Gate

,~-+

1-

Source

I
I
I

,~-s

Drain

,0-6

, ~-7
I
DIFFUSION

Fig. 3. Schematic cross section of an MOS device where Ld is the

lateral subdiffusion and y~,d are the depletion layer thicknesses.

,0-8

VW

,@

0.

N (cm-3)

,0-10

b
o !5

.0

Vos[vl

I .5

UEIW(-INVERS1ON

TR9NSITION

,.

STRONG-INVERSION

/\

\
As

Fig. 1. Diffusion
and drift components of ZD,y versus VGS for an
NMOS with L = W = 100pm at VDs = 1 V.
The dots are experi-

,/

\
\

/
I

mental points.

\
\

Ios(fll

,0-4

\
\
-

,0-5
VBS

= o.

,o-6

AS

.
x

R
,

Fig. 4. Doping profile in the channel region (dashed line) and its box
approximation.

,
*
* 0-1
*
m

proposed model shows a better agreement with experimental

,0.8

data, both for the single device and for a micropower

NFS:5.3.101

op-amp.

,0-9

SUBTHRESHOLD
The drain current

,0-10

1.0

0.5

VGSIVI

1.5

Fig. 2. The transfer curve for the device of Fig. 1 as simulated by SPICE2
for tWO different VidUW of ~FS.

Obviously,
threshold

]dfift

MODEL

IDS can be written

is present only

as

if the gate is biased above

and if VDs #O, while l&ff

is present with a carrier

components of the drain current IDS as a function of the gate

voltage VGS. Also shown are the experimental data for the

concentration gradient along the channel, and therefore is the

only nonzero term in (1) for VGS < v~~.
Fig. 3 shows a schematic cross section of a MOSFET, which

corresponding

we assume to be n-channel.

NMOS device with L = W = 100 IMI and biased

at VDS = 1 V.

It is clear that there is a need to combine the

two curves in the transition

region in order to obtain a model

suitable for CAD applications.

this attempt,

as implemented

Fig. 2 shows an example of

in SPICE

[3].

The program

concentration

the evaluation of such a model requires iterative

not suitable for CAD applications.

calculations

In this paper, we present an analytical model which overcomes

the above problems and its implementation
in the programs
SPICE2 and MSINC. The proposed model has no discontinuity
in the first derivatives of the current, and thus enables an easier
convergence

in the iterative

calculations.

Furthermore,

the

We also assume that the acceptor

indicated

where we also show the box

paper.
as

selects a point close to threshold, and from there, an exponential is attached with a slope which is a function of the NFS
parameter. Obviously, the results are not correct, and there is
a discontinuity
in the curve. Some authors [4], [5] describe
a MOSFET model valid in weak and strong inversion; however,

has the profile

The diffusion

in Fig. 4 (dashed line),

approximation

used in this

current in such a device can be expressed

(2)

where q is the electronic charge, Dn is the diffusion constant

for electrons, W is the channel width, xd is the effective channel
thickness, n is the electron concentration
along the channel,
and y is the abscissa at which the current is evaluated.
Taylor [2] has derived an expression for the channel thickness as
fd .

IEEE JOURNAL

456

OF SOLID-STATE

where the symbols are self-explanatory.

The surface potential
@$can be replaced in our calculations by an average value equal
to 0.5 V, as suggested, for example, in [2] . However, this sim-

while the real

below the silicon surface,

charge density distribution

bell-shaped curve [6],

[7] so that the real

is somewhat bigger than that predicted

is represented by a
channel thickness

by (3).

VOL. SC-17, NO. 3, JUNE 1982

LOCI NCH 1

plified expression is derived taking into account an exponential

slope of the electron concentration

1
I

CIRCUITS,

NX

--%

-------

----

--/

---------------------

NAS----------------

XN

It is therefore

cl{

possible to assume an effective channel thickness defined as

where q is a suitable fitting

We define now

factor (see Appendix).

1
1

An = n(y)

where nch is the electron concentration

O. Thus, the steady-state continuity
d2An

dy2

equation can be written

An
_..__.-.
o
L:

- 1] = A~~
(7)

Arz(y$) = An, = O

The solution of(6)

An(y)

= And

analysis in the model evaluation.

for ncfr. This nx value can be found using the relationship

where XNA is a suitable fitting parameter (see Appendix).

Furthermore, we assume that the concentration of electrons
in the channel is given by
n~nx
nch =
n$ + nx

n,=

2 esi V~s

(9)

qN~s

diffusion

diode.

If we evaluate the

current at y = Li - yd, we obtain

Equation

qDnqi~nc~
L.

kh

exp

qCox)

L-

(14)

In (14), the constant capacitance C. accounts for the surface

state charge and for the depletion charge. The voltage dependence of the depletion charge is taken into account by the factor
al = 1 + cr~,
and by a correct evaluation of VTH, as done,
parameter.

W[1- exp (- V~S/V~)]

tanh (Leff/L.)

small so

that n~h ~ n~, showing the correct voltage dependence.

According to this formulation,
we can write the expression
ldiff

as

(lo)
Zdiff =

dependence from gate voltage is given by

(@s/VT).

fitting

Thus, in strong inversion, where n. tends to become

large, n~h = fzx, while in weak inversion, n, is relatively

(10) is similar to the expression derived in [2] . The

exponential

VGS- VTH
(1 +

for
I~iff =

al

ew

for example, by the SPICE2 program; ~ is a noncritical

In this expression, derived from [2, eq. (3)], we have assumed

the surface potential ~~ to be approximately equal to the builtin voltage of the source-to-substrate

NAS

(8)

sinh (Leff/Ln)

(13)

where

where
Leff =Ll -

(12)

nx = X~ANAs

is given by

sinh (y - y~)/Lm

VG

Fig. 5. Sketch Of n~h versus VGS!

where we assume that VD~ is present only at the drain-channel

junction
[2].
This assumption, which leads to good results,
avoids complex numerical

VTH

as
(6)

- yd) = n& [exp - (Vjs/??)

in the channel for VDS =

where Lm is the electron diffusion length in the channel (see

Appendix).
The boundary conditions are
An(Lj

(5)

- nch

(11)

~nVzW

L. tanh (Lefi/Ln)

[1 - exp (-~DS/VT)]

(15)

where n, is given by (1 4).

The total drain current can now be computed as the sum of

In this expression, $~ can no longer be considered constant as

the diffusion and the drift components over the whole range
from weak to strong inversion, thus avoiding all discontinuity

in (3), since now it appears at the exponent; however, in the

weak inversion region, @$can be considered to depend linearly

problems. The drift component is computed asin SPICE2 [3].

Fig. 6 shows the transfer characteristic IDS - VGs for the same

on VGS.
Fig. 5 shows a sketch of the log nch versus VG~. In the weak

device as in Fig. 1; here ~djff and ~&ifi, computed according to

this model, are shown separately. Fig. 7 shows the full IDS VGs curves for different values of the body bias V&.
Fig. 8
shows a similar curve, with similar agreement to experimental
points, for a short channel device (Li = 2.5 flm). For the same

inversion

region, the VGs dependence is exponential,

while it

deviates at higher gate voltages; at VTH, the nch value is equal

to ~~~, and at higher gate voltages, the electron concentration
increases very slowly. Given this, we assume that the nch value
approaches a constant value nx, which represents an upper limit

short

device, Fig. 9 shows the IDS - Vjs characteristic;

worth

noting that the model correctly

it is

takes into account the

ANTOGNETTI

457

et al.: CAD MODEL FOR MOSFETS

tlos[Rl

IOS(nfll

10-61
sc~
,..7

OIFFUSION

,0-8

,,-s

,~-lo

o~

b
0.5

1.0

1 .s

Vos[v)

Fig. 6. Transfer ch~acteristic of the device of Fig. 1; the drift and diffusion components of the current are computed according to the new
model (PS = 1 V).

,0-4

10.0 Vos(v)

5.0

Fig. 9. IDS - VDs characteristic for the device of Fig. 8 (VGs = 0.25 V).

IOSIR)

,~-s

MMddM8

y
VBS

0.

,0-6

,~-1

,@

,0-9

t
,~-lo

b
0.5

1.0

1.5

Fig. 10. CMOS amplifier

with V~~ 3.2 V and VR = VTH -0.1

V.

Vcslv)

Fig. 7. Transfer characteristic as in Fig. 6 for different values of VBs.

TABLE

+lDSIRI

0.125
0.810
0.815
I& (/JA)

SPICE2
SPICE2 new model
Measurement

,,-4

,0-5

11.58
11.31

CPU time (s)

0.40
2.59
2.61
P (/.lw)

,,-6

consumption;

,0-1

thus, the devices are biased below threshold.

In the simulation

of such a circuit,

the subthreshold

istic of the model used plays an essential role.

,0-8

the results of simulations

model

,,-9

and with

experimental
,,-10

The CPU time used in a transient

showing the good performance

1.s

to the
simulaof the

VGSIVI

CONCLUSIONS
We have proposed a CAD-oriented

dependence of subthreshold current

correct VDs dependence is obtained

on drain voltage.
Such
with the use of (9) and

with the proper evaluation of VTH in (14).

Fig. 10 shows a CMOS amplifier to be used in switched capacSuch an amplifier

Table I shows

the original SPICE2

b
1.0

Fig. 8. Same as in Fig. 7 for a device with L = 2.5 pm.

itor circuits.

with

the model proposed here, compared

data.

tion is also reported,

new model.

I
0.5

obtained

character-

is designed for very low power

model for threshold

subthreshold conduction in MOSFETs;

no discontinuity
in the drain current

and

the new model shows

and exhibits a better

agreement with experimental data than previous models. The

SPICE2 simulations of a CMOS amplifier show the good performances of the new model, also in terms of CPU time.

IEEE JOURNAL

458

MEASUREMENT

eters C~, Ln,

vices

TI from

are needed,

PROCEDURE

we propose
current

a method

measurements.

Two

the paramdifferent

de-

Ln, as well as three subthreshold current measurements. For

VD~ >> V* and VG~ < ?TH, at VB~ = O, we have for a shortchannel device
I~iff = qDn wT?~dfZch/Leff
and for a long-channel

(Al)

device
(A2)

I&ff = qDn Wf&nch/Ln

where
n~h =NA5

VGSC?xp

VOL. SC-17, NO. 3, JUNE 1982

R. Troutman, VLSI limitations from drain-induced barrier lowering, IEEE Trans.Electron Devices, vol. ED-26, Apr. 1979.
[2] G. Taylor, Subthreshold conduction in MOSFET s, IEEE Trans.
Electron Devices, vol. ED-25, Mar. 1978.
[3] A. Vladimirescu and S. Liu, <The simulation of MOS integrated
circuits using SPICE2, Univ. California, Berkeley, ERL Memo
M80/7, Feb. 1980.
~41 J. R. Brews, A charge-sheet model of the MOSFET, Solid State
Electron., vol. 21, 1978.
F. Van de Wiele, A long channel MOSFET model, Solid State
5] Electron., vol. 22, 1979.
[6] F. Stern and W. E. Howard, Properties of semiconductor surface
inversion layer in the electric quantum limit, Phys. Rev., vol.
163, no. 3, 1968.
[7] Y. A. E1-Mansy and A. R. Boothroyd, A new approach to the
theory and modeling of IGFET s, IEEE Trans. Electron Devices,
vol.
ED-24, 1977.
[1]

to evaluate

Leff << LH and one with Leff >>

one with

CIRCUITS,

REFERENCES

APPENDIX

In this Appendix,

OF SOLID-STATE

VTH

1
[ Vj-(1+CJCOX)

(A3)
P. Antognetti (M70) graduated from the University of Geneva, Geneva, Italy, and the Universit y of California, Berkeley.
In 1970 he joined the Facult y of the Universit y
of Geneva, where he is now Professor of ElecIn 1972 he was a NATO
tronic Engineering.
Fellow at Stanford University, Stanford. CA,
and in 1980-1981 a Visiting Scientist at M. I.T.,
Cambridge. His research interests focus on device modeling and design aids for VLSI design.

AVGS

c,, =

(Cox)

[ VT in (12/11)

If we now consider

_ ~

one current

(A5)

value, e.g., II,

we obtain q

from (Al):
q = II

Lefflq

w~clnchDir

(A6)

where nch is computed using the value of C~ obtained from

(A5) and D. = VTIJn is evaluated above threshold.
If 13 is the current in the long device, we can obtain Ln from

graduated from the

D. D. Cavi~la (S77-M80)
University of Geneva, Geneva, Italy, in 1980.
He is presently a Research Associate at that
University.
His research interests include device modeliig, CAD techniques, and hardware
design.

(A2):
.Ln = qD. q W~~nch/ls .

(A7)

E. Profumo graduated from the University of

Geneva, Geneva, Italy, in 1977.
He is presently a member of the Technical
Staff of the R & D Department,
SGS-ATES
Company, Milano, Italy, where he is responsible
for MOS characterization and modeling.