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TECHNIQUES FOR
DEVELOPMENT OF
ELECTRONIC MODULES
Ciprian Ionescu
Faculty of Electronics and Information Technology
University Politehnica of Bucharest
Center of Technological Electronics and Interconnection Techniques - CETTI
Demonstration in OrCAD
The electronic module proposed for demonstration can be
used for digitally displaying of voltage or current of an
available laboratory power supply.
First of all some words about the working principle of the circuit.
The schematics from fig. 2 will not be used, but it suggests a required
intervention in the existing power supply.
The main change is the insertion of the series (shunt) resistor R6.
The connection of the module with the power supply will be assured by the
connector pins A-F.
C4 Aluminium Electrolytic
Capacitor
U1 A/D Converter
U2 BCD Decoder
U3 Voltage Regulator
NEXT STEP:
Realization of the Schematic Drawing
Art.
Qty.
Ref.
Value
Part Name/Library
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
1
2
1
1
1
1
1
3
1
1
1
1
1
2
1
1
1
3
1
1
1
1
1
B40C1000
270n
100n
470u/25V
Ampers
Volts
CONN PCB 2-R
CONN PCB 6-R
LED7S
50k
10k
10M
1k
82k
82R
82R
15k
27k
SW KEY-SPDT
BC640
BC547B
BC557B
CA3162
CA3161
LM7805
BRIDGE/DISCRETE
CAP/DISCRETE
CAP/DISCRETE
CAP POL/DISCRETE
LED/DISCRETE
LED/DISCRETE
CONN PCB 2-R/CONNECTOR
CONN PCB 6-R/ CONNECTOR
LED7S-new created
TRIM new created
TRIM new created
TRIM new created
TRIM new created
16
17
18
19
20
21
22
23
24
B1
C1
C2,C3
C4
D1
D2
J1
J2
LD1,2,3
P1
P2
P3
P4
R1
R2
R3
R4
R5
SW1
T1,T2,T3
T4
T5
U1
U2
U3
R/DISCRETE
R/DISCRETE
R/DISCRETE
R/DISCRETE
R/DISCRETE
SW KEY-SPDT/DISCRETE
BC640/TRANSISTOR
BC547B/TRANSISTOR
BC557/TRANSISTOR
CA3162- new created
CA3161- new created
LM7805- new created
TO92/100 (TO)
TO92/100 (TO)
TO92/100 (TO)
DIP.100/16/W.300/L.800 (DIP100T)
DIP.100/16/W.300/L.800 (DIP100T)
TO220AB (TO)
PCB Layout
Obs.
Correspondence realized correctly.
Pin name
Pin number
Pin name
2
Correspondence realized correctly.
Pin name
Pin number
Pin name
K
Correspondence realized correctly.
Pin name
Pin number
Pin name
Pin number
Pin name
Pin number
Pin name
Pin number
A
1
A
1
2
1
*
K
2
K
2
1
2
*
Pin name
2
No correspondence found. Error at
AutoECO run.
Pin name
Pin name
Pin name
Recommendation:
Use numbers, majority of Layout libraries use numbers.
Exceptions: TM_CAP_P, TM_DIODE.
Modify symbols (parts) in libraries not in Schematic Page.
Take your time and think twice!
TRANSFER TO LAYOUT
The field PCB Footprint must be filled in (correctly).
DRC Verification.
Postprocessing: Netlist, Bill of Materials, Printing.
Nets verification - Not a CAD activity!!!
In LAYOUT Block:
Establishment of design restrictions:
board outline
no. of layers
track widths
padstack assignments
route spacing
Component placement
Routing
DRC and final operations
Postprocessing: Gerber and NC Drill files, Printing, Reports
POST-PROCESSING
Options Gerber Settings