How to Design a Regulated Power Supply

The performance of each and every electronic system or electronic circuit depends upon the power
supply that energizes the circuit or system. It provides required current to the circuit. Any disturbance
noise in this power supply can cause problem in working or operation of circuit. If there is any
deviation in this power supply level the circuit may not work properly. The accuracy and precision of
circuit operation depends upon it. In some of the circuits all the calibration are done at this voltage
level. So all these calibrations becomes false if there is fluctuation in supply level.
There are two types of power supplies
1)

Unregulated power supply

2)

Regulated power supply

Unregulated supply is used in some circuits where there is no much change in required load current.
The load current remains fixed or deviation is very less. Because in such supply
1)

The output voltage reduces as load current increases

2)

The ripple in output voltage increases as load current increases

So this kind of supply can not be used where there is noticeable change in load current frequently. But
although many circuits works on unregulated supply because it requires very few components and
design is also very simple. Also some fluctuation in supply level can be tolerated due to load current
change. The regulated power supply is required in digital circuits, the circuits in which the components
can not tolerate even 1% change in supply level like micro controller, micro processor etc.
So here I am giving the procedure to design regulated power supply that means which components
should be chosen to have required regulated output voltage with required current. The procedure
requires calculations based on some designing equations, some assumptions and approximations
that

we

must

take

Consider following notification

Erms

rms value of AC voltage (transformer secondary voltage)

Em

max value of AC voltage

VdcNL :

no load DC voltage

during

designing.

VdcFL

full load DC voltage

Ro

internal resistance

IL

full load output current

VLmin :

minimum output voltage from unregulated supply

Vrms

rms value of ripple

?Vo

pick ripple voltage

Following equations relations are used in designing power supply

VdcNL = Em = Erms / 1.41
VdcFL = VdcNL - Ro IL
?Vo = IL / (200 C)
?Vo = 3.5 Vrms
VLmin = VdcFL - ?Vo / 2
So let us start designing
AIM: design regulated power supply for 5 V @ 1 A
Procedure:
We have to design 2 separate sections
1) Regulated section
2) Unregulated section
Design of Regulated section Step 1: select voltage regulator chip
Because we are designing regulated power supply, we need voltage regulator chip. There are so
many voltage regulator chips available. They are broadly classified into different categories based on
1)

Polarity : positive, negative or dual

2)

Fixed output or variable output

3)

Required output current from 0.1 A 5 A

Here we require fixed and positive supply with current capacity 1 A. So we have to choose LM7805
voltage regulator chip.
Step 2: input output capacitive filter
Input capacitor is required to suppress or minimize any ripple or variation in input applied to regulator
chip. Its typical value is 0.33F as specified in datasheet. This can be neglected if regulator chip is
connected very close to filtering capacitor of rectifier. It is only required when the distance between
rectifier output and regulator input.
Output capacitor is required to suppress any spike or glitch in fixed output voltage that may occur due
to transient change in AC input. Its typical value is 0.1 F as specified in datasheet.
This completes design of regulated section.
Design of Unregulated section -

It feeds regulated section. Its rectifier + filter. The most required thing is the input given by this section
to regulated section must be at least 3 V higher than required output voltage. This is known as
headroom for regulator chip. This gives us
VLmin = Vop + headroom
=

5+3

8V

For this section we have to select transformer, diode and capacitor.

Step 3: selecting capacitor
Let us assume the capacitor is 1000 F electrolyte capacitor. We need to find out its working DC
voltage WLDC, but that depends upon VdcNL as
WLDC = VdcNL + 20% VdcNL
So after finding VdcNL we can calculate it.
From this capacitor value we can find ?Vo as
?Vo = IL / (200 C)
So for IL = 1 A and C = 1000 F
?Vo = 1 / 200100010-6
=5V
From ?Vo and VLmin, VdcFL can be calculated as
VdcFL = VLmin + ?Vo / 2
= 8 + 5/2
= 10.5 V
VdcFL is related with VdcNL as
VdcNL = VdcFL + Ro IL
Ro value is between 6? to 10?. Assuming Ro as 8?
VdcNL = 10.5 + 81
= 18.5 V
Now calculate required WLDC
WLDC = VdcNL + 20% VdcNL
= 18.5 + 3.7
= 22.2 V
Always we have to go for higher value than this. So choose capacitor with WLDC of 25 V. So finally
our capacitor is
C = 1000 F @ 25 V
Step 4: selecting diode
Selecting diode means finding current capacity and PIV of diode.
1.

Current capacity IC > IL that means Ic can be 1 A or more

2.

PIV = VdcNL + 20% VdcNL = 22.2. again going for higher value that is 25 V
Finally required diodes are with

D = 1A @ 25V
All the diodes of series 1N4004, 1N4007, 1N4009 satisfies these criteria.
Step 5: selecting transformer
The rms value of transformer output is given by
Erms = Em / 1.41
But Em = VdcNL., So
Erms = VdcNL / 1.41
= 18.5 / 1.41
= 13.12 VAC
So we may select either
1.

1)

Center tap transformer of 9 0 9 or 7 .5 0 7.5 secondary voltage

2.

2)

Transformer Without center tapping either 0 15 or 0 18 secondary voltage

Current rating for secondary of transformer should be at least 1.8 IL. That means the current rating
can be 2 A.
Finally select transformer with
T = 230 / 15 VAC @ 2A
Schematic of final design is as shown in the circuit diagram tab.

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A typical power supply serves the following main functions:

Changing the form of electric power. For example, electricity from the grid is
transmitted in the form of AC, while electronic circuits need DC;

Regulation. Nominal mains voltage varies worldwide from 100 to 240VAC and is
usually poorly regulated, while the circuits normally require well stabilized low-level fixed
voltages;

Safety isolation. In most applications the outputs have to be isolated from the input.

Practically every piece of electronic equipment needs some form of power

conversion. Power supply unit (PSU), technically speaking, is a device that transfers
electric energy from a source to a load and in the process changes its characteristics to meet
specific requirements. Of course, this term is not the most adequate. A PSU does not really
supply power, it only converts it. Its typical application is to convert a utility's AC into required
regulated DC rail(s). Depending on the mode of operation of the semiconductors, the
converters can be linear or switching.

SMPS
stands for switch mode PSU. In such a device, power handling electronic components are
continuously switching "on" and "off" with high frequency in order to provide the transfer of
electric energy via energy storage components (inductors and capacitors). By varying duty
cycle, frequency or a relative phase of these transitions an average value of output voltage
or current is controlled. The operating frequency range of commercial SMPS units varies
typically from 50 kHz to several MHz (see more on frequency selection).
Below is a conceptual circuit diagram of a typical off-line SMPS. This tutorial will introduce
you to its basic operation.

DESIGN BASICS

AC power first passes through fuses and a line filter. Then it is rectified by a full-wave bridge
rectifier. The rectified voltage is next applied to the power factor correction (PFC) preregulator followed by the downstream DC-DC converter(s). Note that except for some
industries, such as PCs and CompactPCI, PSU output connectors and pinouts in general are
not standardized and are left up to the manufacturers.
F1 and F2 shown on the left of the circuit diagram are fuses. Everybody knows about them,
but many people are under impression that a fuse blow immediately once applied current
exceeds its rating.

If that was true, no PSU would function because of momentary "in-rush" currents. In reality, a
fuse is designed to physically open the circuit when the current being drawn through it
exceeds its rating for a certain period of time. This clearing time depends on the degree of
overload and is a function of I2t. Due to this delay, fuses will not always protect electronic
components from a catastrophic failure caused by some fault conditions. Their main purpose
is to protect the upstream line from overloading and overheating, avoid tripping of an external
circuit breaker, and prevent a fire that may be triggered by components that failed into a
short circuit.
The low-pass EMI filter is designed to reduce to an acceptable level high frequency currents
getting back into the AC line. This is necessary to prevent interference on the other devices
connected to the same electrical wiring. There is a number of standards (such as EN55022
for Information Technology equipment) that govern the maximum level of EMI.
The filter is followed by the rectifier that converts bipolar AC waveforms to unipolar pulsating
ones. It has four diodes in a bridge arrangement to provide the same polarity of the output
for both polarities of the input.

PFC regulator
. The rectified input voltage is fed into the next stage, whose prime purpose is to increase
power factor (PF). By definition, PF is the ratio between watts and volt-amps. In the process,
the PFC pre-regulator usually boosts the voltage to 370-400 VDC. There are also designs
where "boost" DC-link follows the peak of input AC voltage instead of being fixed, or where a
buck converter is used instead of a boost.
There are two main types of power factor correction circuits- active and passive. Below is a

block-diagram of an active PFC stage. Here is how it works. A controller monitors both the
voltage across sense resistor andVboost. While regulating Vboost, it controls at the same
time the shape of the input current, so that it is in phase with mains AC and repeats its
waveform. Without this, the current would be delivered to the SMPS in short high level
pulses, which have a high harmonic content. The harmonics do not supply any real energy to
the load, but cause additional heating in the wiring and distribution equipment. They also
reduce the maximum wattage that can be taken from a standard wall outlet, since circuit
breakers are rated by electric current rather than by watts. There are
various regulations that limit the input harmonic content, such as EN61000-3-2 (for
equipment connected to public low-voltage distribution systems) or DO-160 (for airborne
equipment). To meet these requirements you can use a PF correction technique: a device
with a high PF draws a nearly sinusoidal current from the source (at a sinusoidal input). This
automatically results in low harmonic content. Currently there are no mandatory international
standards that specifically regulate the PF of an electronic equipment, but there are various
national and industry standards as well as voluntary incentive programs. For example, 80
PLUS and Energy Star programs require computers to demonstrate PF>0.9 at rated load.
You can read about active power factor correction in this PFC guide.
BY SPEC

The above standards also specify minimum efficiency of certain classes of electronic
devices. The efficiency of a PSU by definition is the ratio between the values of output and
input wattage:Efficiency=Pout/Pin. Note that because Pin=VA*PF and since any real active
circuit has PF<1, you can't just multiply input volts and amps- to measure Pin you need a
true wattmeter.

The downstream DCDC converter runs off the PFC output, generates a set of DC busses required for the load,
and normally also provides input-to-output isolation. There are a number of topologies

utilized in DC-DC converters. The above block diagram depicts an isolating forward
converter. Most low-voltage non-isolated converters use buck regulators (single or
interleaved multi-phase). There is likewise a large variety of PWM ICs suitable for each of
these topologies. The selection of the right power topology depends on specific
requirements for the product (including cost and time factors).
Finally, the housekeeping supply provides "bias" for all control circuitry. It may also provide a
separate stand-by voltage (SBV) which remains active when the PS unit is shut down for any
reason. In today's computer power supply a 5VDC SBV is a standard feature.
If you want to learn practical PSU design, you may start with Unitrode seminar books,
where you can find a comprehensive collection of power supply tutorials, practical schematic
diagrams, and guides.

Technically speaking, the term "active power factor correction (PFC)" refers to the
method of increasing PF by using active electronic circuits with feedback that control
the shape of the drawn current. Let us first quickly review why we need to do it
anyway. In conventional non-PFC AC-DC power supplies a large filter capacitor "Co"
is placed directly after bridge rectifier (see the diagram below).

With that, in linear PSU the rectifier is

connected via a low-frequency transformer, while in off-line switch-mode PSU it is fed
from the AC input. In both cases, once "Co" is charged to nearly peak of rectified
voltage, most of the time the diodes will be reversed biased and will not conduct.
Therefore, such a PSU will draw power from the line in short pulses only when the
instantaneous input voltage exceeds the voltage across the capacitor. This produces

harmonics whose level can exceed an applicable standard (such as EN61000-3-2)

and adversely affect other users.
In order to consume continuous sine-like current over the entire AC cycle, we can
place an inductance before "Co". In passive PFC the inductor is large and
uncontrolled. It typically corrects the PF to 0.7-

0.85.

In practice, a

passive method is used only in small PSU (usually below 100W), when high PF is
not required and regulation of DC-link is not neccesary.
In most other application an active method is used. This is a conceptual schematic of
active PFC boost converter. The inductor "L" here is controlled by a solid state switch
(denoted "Q"). This switch is driven ON and OFF by the control circuit at a frequency
"F" much higher than the mains frequency. Let's review how this circuit operates.
During on-time "ton" the current in the inductor increases by I+=Vinton/L. When the
switch opens, the voltage across "L" reverses and it is releasing all or portion of
accumulated energy via the diode "D". During the off-time "t off" inductor current
decreases by I-=(Vo-Vin)tof/L. The net change during one period "T" is I=I+-I=(Vin-Vo+DVo)/LF, where D=ton/T- duty cycle, F=1/T. We can see that by varying
duty cycle "D" we can vary I. If we do it properly, we can synthesize a desired I(t)
shape.

Here is a simplified block diagram of PFC control. Of

course, commercially available PFC controllers contain many more functional blocks,
but our example is sufficient to illustrate the basics of the operation.The depicted
circuit contains two error amplifiers- a slow one for voltage (Vea) and a fast one for
current (Iea). A replica of rectified input waveform "Vin" is fed into the multiplier,
which produces the programming signal Iref for Iea. The latter monitors the current
via a sense resistor Rs and compares it to Iref. By varying control signal to pulsewidth modulator (PWM), Iea forces average value of current to follow the shape of
the mains voltage. The Vea monitors Vo via a divider and compares it to reference
Vref. The error signal from Vea scales multiplier output up or down without changing
its sine wave pattern. As the result, this circuit can perform two tasks simultaneously:
it creates sine-like current and regulates the bus voltage Vo. The described method
allows the designers to achieve PF as high as 0.99. Note that the described power
factor correction technique addresses only line-frequency harmonics. You still
need an EMI filter to reduce high-frequency components generated by switching
mode operation of the power converters. This filter however may cause some
negative effects. Particularly, its differential-mode inductors and across-the-line
capacitors can introduce certain displacement angle between "Vin" and "I", which is
not corrected by the downstream PFC circuit. This effect may be unimportant if you
have to comply only with EN61000-3-2, but could be an issue if in your application
you also need to meet certain minimum PF limit.
Layout
1. High-frequency circuit design requires careful grounding. The "ground" in a circuit
is supposed to be at one potential, but in reality it is not. When currents flow through
traces which have non-zero impedance, voltage differences will occur at different
points along the ground path. To minimize these voltages use ground plane for
control circuit. Try to make most of ground connections through vias to this plane
rather than through PC traces.

2. For each power supply stage, keep power ground and control ground separately.
Tie them together [If they are electrically connected] in one point near DC output
return of the given stage.
3. If you use a multilayer printed circuit board with surface mount components, place
control ground plane on an inner layer so that it acts as a shield between power and
control circuits.
4. Minimize areas and lengths of the loops which contain high frequency switching
currents.
5. Place capacitors that bypass bias supply voltages and reference pins (if any) of all
ICs physically close to the corresponding pins. For driver chips use a combination of
a large capacitor (10 F - 100 F) and a small ceramic capacitor (0.1 F - 1.0 F).
6. Place filter capacitors so that their leads physically go right into the printed circuit
board traces that carry mainstream of the current to be filtered.
7. If you parallel power semiconductors, try to use symmetrical routing with equal
conductor impedances for each of the paralleled devices.
8. Choose the width of PCB traces based on acceptable temperature rise at the
rated current per IPC2152 as well as acceptable DC and AC impedances. Also,
make sure that the trace will not fuse at any abnormal current (such as short circuit
current) that could develop in the circuit before a electronic protection activates or a
fuse clears.
9. The distances between various circuits should be determined according to the
requirements of applicable standards. For example, for the product covered by UL
60950-1 2nd Edition the creepageand clearance from primary circuits to secondary
circuits and safety ground should be determined from the Tables 2K through 2N of
this standard. In a typical commercial application with 120/250 VAC input, creepage
between primary and low-voltage secondary circuitry per UL/IEC 60950 should be
6.4 mm minimum. For more details see our guide to PCB trace spacing.

10. For circuit spacing in non-UL applications you can generally use the
recommendations of Table 6-1 of IPC-2221B. It is a generic standard for PCB design
which replaced old IPC D-275. The recommended spacings for power supply circuits
is given by IPC-9592B. In my view, the above IPC guidelines are too conservative.
Note that all IPC standards are voluntary rather then mandatory.
11. Schematic design and PCB layout are often done by different engineers. A PCB
designer usually does not know the details of the SMPS circuit operation and
criticality of components location. In this case, the electrical engineer should provide
this information to the circuit board designer, help set design rules and closely
supervise the routing process. Professional schematic capture software allows you to
set various constraints for specific nets or groups of components. Particularly, you
can specify minimum line width, net spacing type, and even maximum and relative
signal propagation delays.