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I.
INTRODUCTION
DESIGN PRINCIPLE
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GND
VO-
VO+
50O
Term.
MB (0.25?6 m2)
LO source
( ~ 13GHz)
Buffer
matching
x24
V1
MA (0.25?4
Harmonic
M ixer
m2)
R
F
RF-SA
Tuning
part
CCB
MA
(a)
Conversion loss:
~ 35dB @300GHz (estimated)
VTUNE
CBE
CTUNE
IEE = 14 mA
(b)
VEE (-3.3V)
Fig. 1. Simplified schematic diagram of the VCO. Output signal is signalended with internal termination of one output to 50 ohm.
Fig. 2. (a) Chip photograph of the VCO (730690 um2) and experimental
setup for VCO measurement. (b) Harmonically down-converted oscillation
output measured with an RF spectrum analyzer (RF-SA). Conversion loss of
the measurement setup is estimated as 35dB at 300 GHz.
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The fabricated VCO chip consumes 46.2 mW with VEE= 3.3 V as designed. The oscillation frequency of the VCO varies
by controlling the tuning voltage (VTUNE) as shown in Fig. 3(a).
VTUNE varies from VEE +0.5V to VEE +2.0V, which corresponds
to reverse bias voltage across the diode-connected HBT of 0 to
1.5 V. The measured oscillation frequency is around 310 GHz
with the frequency tuning range of about 10 GHz.
325
(a)
320
315
310
Measurement
Simulation
305
300
0.5
1.0
1.5
2.0
VTUNE-VEE (V)
0
(b)
-5
IV.
-10
-15
*excluding 35-dB
estimated power loss
-20
310
320
330
340
350
360
370
REFERENCES
[1]
[2]
[3]
MEASUREMENT RESULTS
CONCLUSION
[4]
[5]
[6]
[7]
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[8]
[13]
[14]
[15]
[16]
[17]
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