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FEATURES
and then its PWM frequency is 50% of the clock and its
The
work properly).
!
(patented)
without shutting off PFC. Its PFC green mode threshold and !
(patented)
PWM in one IC
!
VCC OVP Comparator will turn off both PFC and PWM
saturation.
140KHz.
operation
2003/06/25 Preliminary
Page 1
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
APPLICATIONS
PIN CONFIGURATION
SOP-16 (S16) / PDIP-16 (P16)
Top View
IEA O
UPS
IAC
Battery Charger
ISENSE
V RMS
Distributed Power
V EA O
16
V FB
15
V REF
14
V CC
13
SS
P FC O U T
12
V DC
PWM OUT
11
R AM P 1
GND
10
R AM P 2
D C I LIMIT
PIN DESCRIPTION
Pin No.
Symbol
Description
Min.
Operating Voltage
Typ.
Max.
Unit
IEAO
4.25
IAC
PFC gain control reference input. Before the chip wakes up,
mA
ISENSE
-5
0.7
VRMS
SS
VDC
RAMP 1
1.2
3.9
(RTCT)
When in current mode, this pin functions as the current sense
input; when in voltage mode, it is the PWM input from PFC
(PWM RAMP) output (feed forward ramp).
RAMP 2
DC ILIMIT
10
GND
Ground
2003/06/25 Preliminary
Page 2
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
11
PWM OUT
VCC
12
PFC OUT
VCC
13
VCC
Positive supply
10
20
14
VREF
15
VFB
16
VEAO
15
7.5
2.5
BLOCK DIAGRAM
1
16
VEAO
19.4V
LOW POWER
DETECT
GMv
VREF
7.5V
14
REFERENCE
2.75V
3.5K
2.5V
GMi
POWER
FACTOR
CORRECTOR
PFC CMP
+
.
IAC
MPPFC
VCC
-1V
GAIN
VRMS
PFC OUT
MODULATOR
PFC OVP
+
VCC
VCC OVP
VCC
VFB
VCC
0.5V
15
13
IEAO
12
PFC ILIMIT
3.5K
ISENSE
MNPFC
GND
7
RAMP1
OSCILLATOR
CLK
350
RAMP2
SW SPST
PWM
CMP
1.5V
VDC
SS CMP
11
VFB
2.45V
SW SPST
SW SPST
1.0V
MNPWM
SS
SW SPST
VIN OK
GND
DC ILIMIT
PULSE
WIDTH
MODULATOR
VREF
Q
VCC
PWM OUT
Vcc
20uA
350
MPPWM
PWMOUT
LIMIT
PFCOUT
PWM
DUTY
DUTY CYCLE
DC ILIMIT
VCC
2003/06/25 Preliminary
UVLO
GND
fosc=2xfpwm=4xfpfc
10
Page 3
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
ORDERING INFORMATION
Part Number
CM6802IP
Temperature Range
-40 to 125
Package
16-Pin PDIP (P16)
CM6802IS
-40 to 125
Parameter
Min.
VCC
IEAO
ISENSE Voltage
PFC OUT
PWMOUT
Voltage on Any Other Pin
IREF
IAC Input Current
Peak PFC OUT Current, Source or Sink
Peak PWM OUT Current, Source or Sink
PFC OUT, PWM OUT Energy Per Cycle
Junction Temperature
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Thermal Resistance (JA)
Plastic DIP
Plastic SOIC
0
-5
GND 0.3
GND 0.3
GND 0.3
-65
-40
Max.
Units
20
4.5
0.7
VCC + 0.3
VCC + 0.3
VREF + 0.3
10
1
1
1
1.5
150
150
125
260
V
V
V
V
V
V
mA
mA
A
A
J
80
105
/W
/W
Symbol
Parameter
Test Conditions
CM6802
Min.
Unit
Typ.
Max.
6
30
65
90
mho
2.45
2.5
2.55
-1.0
-0.5
5.8
6.0
0
VNONINV = VINV, VEAO = 3.75V
Note 2
0.1
0.4
-35
-20
V
A
30
40
50
60
dB
50
60
dB
-1.5
VNONINV = VINV, VEAO = 3.75V
2003/06/25 Preliminary
50
-12
100
0.7
150
mho
12
mV
Page 4
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
ELECTRICAL CHARACTERISTICS (Conti.) Unless otherwise stated, these specifications apply
Vcc=+15V, RT = 5.0k, CT = 1.0nF, TA=Operating Temperature Range (Note 1)
Symbol
Parameter
Test Conditions
CM6802
Typ.
-1.0
-0.5
4.0
4.25
Source Current
Max.
Unit
Min.
0.65
1.0
-65
-35
35
75
60
70
dB
60
75
dB
Threshold Voltage
2.70
2.77
Hysteresis
230
2.85
290
mV
0.6
0.4
Hystersis
0.5
0.25
19
19.4
20
1.40
1.5
1.65
-1.10
-1.00
-0.90
80
200
mV
250
ns
Threshold Voltage
Delay to Output (Note 4)
0.95
Overdrive Voltage = 100mV
1.0
1.05
250
V
ns
VIN OK Comparator
Threshold Voltage
2.35
2.45
2.55
Hysteresis
0.8
1.0
1.2
GAIN Modulator
Gain (Note 3)
Bandwidth
Output Voltage =
3.5K*(ISENSE-IOFFSET)
0.59
0.81
1.47
2.03
0.66
0.92
0.21
IAC = 100A
IAC = 250A, VRMS = 1.1V, VFB = 1V
Oscillator
TA = 25
Voltage Stability
Temperature Stability
2003/06/25 Preliminary
0.29
10
0.70
0.80
66
MHz
0.90
75.5
kHz
Page 5
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
Total Variation
Line, Temp
CM6802
Min.
68
Max.
84
2.5
Typ.
Unit
kHz
V
500
700
ns
6.5
10.5
mA
7.5
7.6
10
25
mV
Reference
Output Voltage
Line Regulation
10
20
mV
10
20
mV
Load Regulation
7.4
Temperature Stability
0.4
Total Variation
7.35
7.65
25
mV
PFC
Minimum Duty Cycle
90
15
22.5
ohm
0.8
1.5
0.4
0.8
30
45
ohm
95
13.5
CL = 1000pF
14.2
50
ns
PWM
Duty Cycle Range
0-49.5
15
22.5
ohm
0.8
1.5
0.7
1.5
30
45
ohm
0-50
13.5
CL = 1000pF
14.2
50
ns
Supply
Start-Up Current
VCC = 12V, CL = 0
Operating Current
30
50
3.0
mA
14V, CL = 0
CM6802
14.7
15
15.3
CM6802
4.85
5.0
5.15
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Includes all bias currents to other circuits connected to the VFB pin.
-1
2003/06/25 Preliminary
Page 6
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
127
220
120
200
113
180
Transconductance (umho)
Transconductance (umho)
106
99
92
85
78
71
160
140
120
100
80
60
40
64
20
57
0
-500
-400
-300
-200
-100
100
200
300
400
500
ISENSE (mV)
VFB (V)
0.4
0.35
1.8
0.3
1.6
0.25
1.4
0.2
1.2
Gain
2.2
0.15
0.1
0.8
0.05
0.6
0.4
0
0
0.5
1.5
2.5
3.5
4.5
VRMS (V)
0.2
0
0
0.5
1.5
2.5
3.5
4.5
VRMS (V)
K=
-1
IGAINMOD IOFFSET
mV
IAC x (6 - 0.625)
2003/06/25 Preliminary
Gain
Gain =
ISENSE IOFFSET
IAC
Page 7
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Functional Description
Both PFC Green Mode and PWM Green Mode can be set
separately by selecting proper external value of the external
components. These 2 external components are CT on the
pin 7, RAMP1 pin and the filter resistor at pin 3, ISENSE pin.
Oscillator (RAMP1)
The oscillator frequency is determined by the values of RT
and CT, which determine the ramp and off-time of the
oscillator output clock:
1
which is the internal clock
tRAMP + tDEADTIME
frequency, fosc=2 x fpwm= 4 x fpfc
fOSC =
2.5V x CT = 450 x CT
5.5mA
EXAMPLE:
For the application circuit shown in the datasheet, with the
oscillator running at:
fOSC = 280kHz =
1
tRAMP
2003/06/25 Preliminary
Both Blue Angel and Energy Star spec. can be easily met
without shutting off PFC because in CM6802, both PFC and
PWM can set the green mode thresholds. Once the green
mode threshold is triggered, the section will go to pulse
skipping mode.
During the light load, PWM section duty cycle also reduces.
When the PWM section duty cycle is less than the internal
clock duty cycle which is set by the CT at RAMP1, pin 7, the
PWM section will start pulse skipping. By selecting the
proper CT, user can program the PWM Green Mode
Threshold. Usually, CT is 1nF.
Page 8
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Such supplies present a power factor to the line of less than
one (i.e. they cause significant current harmonics of the
power line frequency to appear at their input). If the input
current drawn by such a supply (or any other nonlinear
load) can be made to follow the input voltage in
instantaneous amplitude, it will appear resistive to the AC
line and a unity power factor will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with and proportional to the input
voltage, a way must be found to prevent that device from
loading the line except in proportion to the instantaneous
line voltage. The PFC section of the CM6802 uses a
boost-mode DC-DC converter to accomplish this. The input
to the converter is the full wave rectified AC line voltage. No
bulk filtering is applied following the bridge rectifier, so the
input voltage to the boost converter ranges (at twice line
frequency) from zero volts to the peak value of the AC input
and back to zero. By forcing the boost converter to meet
two simultaneous conditions, it is possible to ensure that
the current drawn from the power line is proportional to the
input line voltage. One of these conditions is that the output
voltage of the boost converter must be set higher than the
peak value of the line voltage. A commonly used value is
385VDC, to allow for a high line of 270VACrms. The other
condition is that the current drawn from the line at any given
instant must be proportional to the line voltage. Establishing
a suitable voltage control loop for the converter, which in
turn drives a current error amplifier and switching output
driver satisfies the first of these requirements. The second
requirement is met by using the rectified AC line voltage to
modulate the output of the voltage control loop. Such
modulation causes the current error amplifier to command a
power stage current that varies directly with the input
voltage. In order to prevent ripple, which will necessarily
appear at the output of boost circuit (typically about 10VAC
on a 385V DC level), from introducing distortion back
through the voltage error amplifier, the bandwidth of the
voltage loop is deliberately kept low. A final refinement is to
adjust the overall gain of the PFC such to be proportional to
1/VIN2, which linearizes the transfer function of the system
as the AC input to voltage varies.
Since the boost converter topology in the CM6802 PFC is
of the current-averaging type, no slope compensation is
required.
PFC Section
Gain Modulator
Figure 1 shows a block diagram of the PFC section of the
CM6802. The gain modulator is the heart of the PFC, as it
is this circuit block which controls the response of the
current loop to line voltage waveform and frequency, rms
line voltage, and PFC output voltages. There are three
inputs to the gain modulator. These are:
2003/06/25 Preliminary
IAC VEAO
x 1V
VRMS2
(1)
-1
Page 9
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Selecting RAC for IAC pin
IAC pin is the input of the gain modulator. IAC also is a
current mirror input and it requires current input. By
selecting a proper resistor RAC, it will provide a good sine
wave current derived from the line voltage and it also helps
program the maximum input power and minimum input line
voltage.
RAC=Vin peak x 7.9K. For example, if the minimum line
voltage is 80VAC, the RAC=80 x 1.414 x 7.9K=894Kohm.
Current Error Amplifier, IEAO
The current error amplifiers output controls the PFC duty
cycle to keep the average current through the boost
inductor a linear function of the line voltage. At the inverting
input to the current error amplifier, the output current of the
gain modulator is summed with a current which results from
a negative voltage being impressed upon the ISENSE pin.
The negative voltage on ISENSE represents the sum of all
currents flowing in the PFC circuit, and is typically derived
from a current sense resistor in series with the negative
terminal of the input bridge rectifier. In higher power
applications, two current transformers are sometimes used,
one to monitor the IF of the boost diode. As stated above,
the inverting input of the current error amplifier is a virtual
ground. Given this fact, and the arrangement of the duty
cycle modulator polarities internal to the PFC, an increase
in positive current from the gain modulator will cause the
output stage to increase its duty cycle until the voltage on
ISENSE is adequately negative to cancel this increased
current. Similarly, if the gain modulators output decreases,
the output duty cycle will decrease, to achieve a less
negative voltage on the ISENSE pin.
To Disable PFC Green Mode, a 1 Mega ohm resistor is
needed between IEAO(pin1) and VREF(pin14).
This 1 Mega ohm resistor will reduce the DC gain but it will
not impact the performance.
2003/06/25 Preliminary
Page 10
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Error Amplifier Compensation
The PWM loading of the PFC can be modeled as a
negative resistor; an increase in input voltage to the PWM
causes a decrease in the input current. This response
dictates the proper compensation of the two
transconductance error amplifiers. Figure 2 shows the types
of compensation networks most commonly used for the
voltage and current error amplifiers, along with their
respective return points. The current loop compensation is
returned to VREF to produce a soft-start characteristic on the
PFC: as the reference voltage comes up from zero volts, it
creates a differentiated voltage on IEAO which prevents the
PFC from immediately demanding a full duty cycle on its
boost converter.
PFC Voltage Loop
There are two major concerns when compensating the
voltage loop error amplifier, VEAO; stability and transient
response. Optimizing interaction between transient
response and stability requires that the error amplifiers
open-loop crossover frequency should be 1/2 that of the
line frequency, or 23Hz for a 47Hz line (lowest anticipated
international power frequency). The gain vs. input voltage
of the CM6802s voltage error amplifier, VEAO has a
specially shaped non-linearity such that under steady-state
operating conditions the transconductance of the error
amplifier is at a local minimum. Rapid perturbation in line or
load conditions will cause the input to the voltage error
amplifier (VFB) to deviate from its 2.5V (nominal) value. If
this happens, the transconductance of the voltage error
amplifier will increase significantly, as shown in the Typical
Performance Characteristics. This raises the
gain-bandwidth product of the voltage loop, resulting in a
much more rapid voltage loop response to such
perturbations than would occur with a conventional linear
gain characteristics.
The Voltage Loop Gain (S)
* GMV * ZCV
2
VOUTDC * VEAO * S * CDC
=
2003/06/25 Preliminary
* GMI * ZCI
S * L * 2.5V
=
Page 11
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
PWM Section
Pulse Width Modulator
The PWM section of the CM6802 is straightforward, but
there are several points which should be noted. Foremost
among these is its inherent synchronization to the PFC
section of the device, from which it also derives its basic
timing. The PWM is capable of current-mode or
voltage-mode operation. In current-mode applications, the
PWM ramp (RAMP2) is usually derived directly from a
current sensing resistor or current transformer in the
primary of the output stage, and is thereby representative of
the current flowing in the converters output stage. DCILIMIT,
which provides cycle-by-cycle current limiting, is typically
connected to RAMP2 in such applications. For
voltage-mode, operation or certain specialized applications,
RAMP2 can be connected to a separate RC timing network
to generate a voltage ramp against which VDC will be
compared. Under these conditions, the use of voltage
feedforward from the PFC buss can assist in line regulation
accuracy and response. As in current mode operation, the
DC ILIMIT input is used for output stage overcurrent
protection.
No voltage error amplifier is included in the PWM stage of
the CM6802, as this function is generally performed on the
output side of the PWMs isolation boundary. To facilitate
the design of optocoupler feedback circuitry, an offset has
been built into the PWMs RAMP2 input which allows VDC to
command a zero percent duty cycle for input voltages
below 1.25V.
2003/06/25 Preliminary
Page 12
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Soft Start
Start-up of the PWM is controlled by the selection of the
external capacitor at SS. A current source of 20A supplies
the charging current for the capacitor, and start-up of the
PWM begins at 1.25V. Start-up delay can be programmed
by the following equation:
CSS = tDELAY x
20 A
1.25V
20 A = 80nF
1.25V
2003/06/25 Preliminary
Generating VCC
After turning on CM6802 at 15V, the operating voltage can
vary from 10V to 19.4V. The threshold voltage of VCC OVP
comparator is 19.4V. The hysteresis of VCC OVP is 1.5V.
When VCC see 19.4V, PFCOUT will be low, and PWM
section will not be disturbed. Thats the two ways to generate
VCC. One way is to use auxiliary power supply around 15V,
and the other way is to use bootstrap winding to self-bias
CM6802 system. The bootstrap winding can be either taped
from PFC boost choke or from the transformer of the DC to
DC stage.
The ratio of winding transformer for the bootstrap should be
set between 18V and 15V. A filter network is recommended
between VCC (pin 13) and bootstrap winding. The resistor of
the filter can be set as following.
RFILTER x IVCC ~ 2V, IVCC = IOP + (QPFCFET + QPWMFET ) x fsw
IOP = 3mA (typ.)
If anything goes wrong, and VCC goes beyond 19.4V, the
PFC gate (pin 12) drive goes low and the PWM gate drive
(pin 11) remains function. The resistors value must be
chosen to meet the operating current requirement of the
CM6802 itself (3mA, max.) plus the current required by the
two gate driver outputs.
Page 13
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
EXAMPLE:
With a wanting voltage called, VBIAS ,of 18V, a VCC of 15V
and the CM6802 driving a total gate charge of 90nC at
100kHz (e.g. 1 IRF840 MOSFET and 2 IRF820 MOSFET),
the gate driver current required is:
IGATEDRIVE = 100kHz x 90nC = 9mA
RBIAS =
VBIAS VCC
ICC + IG
RBIAS =
18V 15V
5mA + 9mA
Leading/Trailing Modulation
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will turn
on right after the trailing edge of the system clock. The error
amplifier output is then compared with the modulating ramp
up. The effective duty cycle of the trailing edge modulation
is determined during the ON time of the switch. Figure 4
shows a typical trailing edge control scheme.
2003/06/25 Preliminary
Page 14
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
+12V
Return
+12V
OUT
R25
C22
R26
C21
C23
+12V
R24
C24
U3
R23
U2
L2
D11A
D11B
T2B
R16
T2C
C10
T2A
+382V
TP1
R13
D6
D5
Q5
RAMP2
R9
C9
D4
C8
R11
R20B
C17
C14
R20A
Q3
D7
C13
R30
R19
D15
C17
C16
R14
R17
C20
T1A
R15
C15
VCC
R30
R29
REF
Q2
D10
T1B
C25
R10
R6
R7A
C31
R7B
R8
D9
L1
10
11
12
9
RAMP2 ILIMIT
C11
GND
RAMP1
7
VDC PWM-OUT
6
13
VCC
PFC-OUT
SS
VRMS
14
I-SENSE VREF
3
16
1
VFB
R12
Q1
VEAO
C7
C12
D1
IAC
CM6802
C4
IEAO
C6
D2
D3
15
C5
R28
D8
R21
C30
C18
VDC
R1A
R1B
R2A
R2B
C19
R28
R3
C2
C33
+
R4
D13
C3
C32
R5E
D12
D14
R5D
C1
R5C
R5B
VIN
R5A
AC
2003/06/25 Preliminary
Page 15
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
APPLICATION CIRCUIT (Voltage Mode)
R5
IVIN_EMC
EMC FILTER
L2
R3
L3
RT1
IVIN
D4
PFC_VIN
IVIN
L1
IL1
PFC_VIN
IAC
D5
Q3
VIN
AC
R2
C3
C8
C2
R1
R10
R12
R14
C33
100n
D12
Q1
Q2N2222
PFC_DC
R13
Q2
Q2N904
R15
R18
D6
PFC_Vout
IC10
D10
R26
18k
22
R16A
MUR1100
C10
R23
R24
75
22
R25
10k
C23
470p
R17A
VFB
D7
C55A
C41
1N4002
PFC_Vout
Q4
R22
1N4148
R11
D5
IBOOT
R65A
C30
1N4002
R58
R64
R59
C43
IEAO
U2 CM6802
1
IEAO
VEAO
2
ISENSE
R60
VRMS
C46
SS
R66
VDC
C47 VREF
5
6
7
C44
R56
R57
C45
VCC
IAC
SS
GND
ILIMIT
VREF
VCC
12
PFC-OUT
VDC PWM-OUT
RAMP2
VREF
13
VCC
RAMP1
VEAO
14
I-SENSE VREF
VRMS
16
15
VFB
C52
C53
1u
100n
VCC
C54
11
10
PWM_OUT
R63
ZD2
C57
C56
R62
C48
C49
ILIMIT
ILIMIT
C50
R61
470
C51
R44
C4
ISO1
VDC
C14
PWM_IN
PFC_Vout
R34
C38
C7
10n
R27
100k
C22
10n
10n
4.7
R49
IL4
D9A
D8
D13
MUR1100
T1
D9B
L4
L5
R35
4.7
R46
PWM_Vout
IC17
IC18
C17
C18
C40
R43
C39
ILOAD
C19
R45
PWM_Rload
500m
U1
CM431
MUR1100
C22
10n
R48
C15
10n
VCC
IBIAS
C34
100n
D16
Q6
Q2N2222
PWM_DC
PFC_OUT
R32A
R32
VCC
1N4148
Q7
Q2N904
C31
R33
R28
T 2:3
22
Q3
R29
10k
ILIMIT
R31
ZD1
6.8V
2003/06/25 Preliminary
Page 16
CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
PACKAGE DIMENSION
16-PIN PDIP (P16)
PIN 1 ID
PIN 1 ID
2003/06/25 Preliminary
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CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
IMPORTANT NOTICE
Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to
discontinue any integrated circuit product or service without notice, and advises its customers to obtain
the latest version of relevant information to verify, before placing orders, that the information being relied
on is current.
A few applications using integrated circuit products may involve potential risks of death, personal injury, or
severe property or environmental damage. CMC integrated circuit products are not designed, intended,
authorized, or warranted to be suitable for use in life-support applications, devices or systems or other
critical applications. Use of CMC products in such applications is understood to be fully at the risk of the
customer. In order to minimize risks associated with the customers applications, the customer should
provide adequate design and operating safeguards.
HsinChu Headquarter
T E L : +886-3-567 9979
F A X : +886-3-567 9909
http://www.champion-micro.com
T E L : +886-2-8692 1591
F A X : +886-2-8692 1596
2003/06/25 Preliminary
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