MC 33385

Freescale Semiconductor
Technical Data
Document Number: MC33385

Rev. 6.0, 11/2006
Quad Low-side Driver

33385
LOW-SIDE DRIVER
Features
RDSON of 250m per Output at 25C
Supplied from the main 5V VCC
Input CMOS Compatible
Diagnostic through SPI
Nominal Current of 2A per Output
Current Limitation at 3A with Automatic Turn Off
Output Internally Clamped at 50V typ for Inductive Load Drive
Junction to Case Thermal Resistance of 4.4C/W
Individual Output over Temperature Shutdown
Pb-Free Packaging Designated by Suffix Code VW
DH SUFFIX
VW SUFFIX (PB-FREE)
98ASH70702A
20-PIN HSOP
ORDERING INFORMATION
Device
MC33385DH/R2
MC33385VW/R2
VPWR
33385
Voltage
Regulator
VCC
MCU
NCS
CLK
SDI
SDO
NRE
NON1
NON2
NON3
NON4
OUT1
OUT2
OUT3
OUT4
GND1-4
Figure 1. MC33385 Simplified Application Diagram
There are no disclaimers required on the Final publication of a data sheet.

Freescale Semiconductor, Inc., 2007. All rights reserved.
Temperature
Range (TA)
Package
-40C to 125C
20 HSOP
ARCHIVE INFORMATION
ARCHIVE INFORMATION
The MC33385 is a Quad Low-side Driver fully protected switch. This

device is a general purpose Low-side Driver but has been especially
designed to operate in engine management applications as injector
driver or automotive gear box. It is interfaced directly with a
microcontroller for parallel control of the load and the individual output
diagnostic is done through a SPI. The diagnostic logic recognizes 4
failure types at each output stage: overcurrent, short to GND, open
load, and over-temperature.
BLOCK DIAGRAM
BLOCK DIAGRAM
VCC
Charge Pump
TRIGGER
NON1
NON2
OUT1
OUT2
S
URES
RES
NON3
dv/dt control
DRIVER
R
NON4
OUT4
RES
URES
Over-temp. detection
ON1
FR Reset
IRES
VCC
I-SCB filter
t-ISCB
ON1
SDI
VCC
I-OL filter
t-IOL
CLK
NON1
VCC
Shift
Register
NCS
Failure
Register
(FR)
SCG filter
t-SCG
URES
RES
Under Voltage
Reset
Reset
Vref
OSC
IRES
SDO
GND
Oscillator
NRES
Figure 2. 33385 Simplified Internal Block Diagram
33385
Analog Integrated Circuit Device Data

ARCHIVE INFORMATION
ARCHIVE INFORMATION
OUT3
PIN CONNECTIONS
PIN CONNECTIONS
21
GND2 1
20 GND1
OUT2 2
19 OUT1
18 N.C
N.C 3
17 NON1
NON2 4
SDI 5
16 SDO
CLK 6
15 NRES
NCS 7
14 VCC
NON4 8
13 NON3
OUT4 9
12 OUT3
GND4 10
21
ARCHIVE INFORMATION
ARCHIVE INFORMATION
Heat sink
11 GND3
Figure 3. 33385 Pin Connections

Table 1. 33385 Pin Definitions
Pin Number
Pin Name
Definition
GND2
Ground 2
OUT2
Output Channel 2
NC
3
4
NON2
Input Control Signal for Channel 2
SDI
Serial Data Input
CLK
Clock Line for Serial Interface
NCS
Chip Select for Serial Interface
NON4
OUT4
Output Channel 4
10
GND4
Ground 4
11
GND3
Ground 3
12
OUT3
Output Channel 3
13
NON3
14
Vcc
5V Power Supply
15
NRES
Reset Input
16
SDO
Data Output of Serial Interface
17
NON1
Input Control Signal Channel 1

NC
18
19
OUT1
Output Channel 1
20
GND1
Ground 1
Case
Connected to the PCB Ground for Thermal Purposes
33385

ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
Vcc
7.0
Continuous Output Voltage (With no reverse current)
VOUT
45
Continuous Current
IOUTC
2.5
Peak Output Current
IOUTP
ISCBMAX
Clamped Energy at the Switching OFF (See Figure 9)
WOFF
70
mJ for 1ms
Input Voltage (Inputs)
VIN
VCC + 0.3
Input Protection Diode Current
IIN
1.0
mA
Input Voltage (Outputs)
VO
VCC + 0.3
Input Protection Diode Current
IO
1.0
mA
TJ
150
RTHJC
4.5
ARCHIVE INFORMATION
Voltage Range
THERMAL RATINGS
Operating Junction Temperature
Thermal Resistance : Junction-case (One power stage in use)
Thermal Resistance : Junction-ambient (Device soldered on printed circuit board)
RTHJA
50
Peak Package Reflow Temperature During Reflow (1), (2)
TPPRT
Note 2
Notes
1. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
2. Freescales Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
33385

ARCHIVE INFORMATION
ELECTRICAL RATINGS
STATIC CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
VCC
Junction Temperature Continuous (Continuous)
TJ1
Junction Temperature Dynamical (Time limited)
Typ
Max
Unit
4.5
5.5
- 40
150
TJ2
185
IOUT
ISCBMAX
SUPPLY VOLTAGE
Supply Voltage Range
ARCHIVE INFORMATION
ARCHIVE INFORMATION
JUNCTION TEMPERATURE
OUTPUT CURRENT
Output Current Range
RESET BEHAVIOUR
Reset Changeable (at NRES-Pin)
Undervoltage Reset (Independent of NRES)
VCC
VCCRES
5.5
VCCRES
3.35
3.95
VCCPRO
1.5
4.0
TOFF
155
185
ICCSTB1
ICCSTB2
6.0
mA
7.0
mA
ICCOPM
17
mA
ICC
100
mA
50
mA
Active for VCC = 0V to VCCPRO

UNDERVOLTAGE PROTECTION
Protection active for VCC =0V to VCCPRO
OVER TEMPERATURE
Temperature Detection Threshold
SUPPLY CURRENT
Standby Current (without load) (NON1...NON4 = High Level)
5.15V VCC
5.5V VCC
Operating Mode (For 5.15V VCC) (Iout 1...4) = 2A
ICC During Reverse Output Current
(IOUT = - 5A on one output)
INPUTS (NONx, NCS, CLK, NRES, SDI)
Low Threshold
VINL
-0.3
0.2*VCC
High Threshold
VINH
0.7*VCC
VCC + 0.3
VHYST
0.85
Hysteresis
V
10
- 20
Input Current (VIN = VCC)
IIN
Input Current (VCC >VRES & 0V<VIN < 0.9*VCC)
IIN
- 100
High Output Level (ISDO = -2mA)
VSDOH
VCC - 0.4
Low Output Level (ISDO = 3.2mA)
VSDOL
Tristate Leakage Current (NCS = HIGH, VSDO = 0V to VCC)
ISDOL
- 10
Average Output Current
IOUTA
2.5
Output Peak Current
IOUTP
ISCBMAX
SERIAL DATA OUTPUT

V
0.4
10
OUTPUTS (OUT 1...4)
33385

Table 3. Static Electrical Characteristics (continued)

Min
Typ
Max
Unit
Leakage Current 1 (NON = High, VOUT = 25V, VCC = 5V)
IOUTL
10
Leakage Current 2 (NON = High, VOUT = 16V, VCC = 1V)
IOUTL2
10
58
VCLP+1
Output Clamp Voltage (IOUT = 1A)
ARCHIVE INFORMATION
Symbol
VCLP
45
Matching Clamp Voltage (Between two outputs)
VCLPM
VCLP-1
Clamped Energy at the Switching OFF (See Figure 9)
WOFF
50
On Resistance (IOUT = 2A, TJ = 150C, NON = LOW)
RDSON
Output Low Voltage Limitation (IOUT = 150mA)

Output Capacitance (Guaranteed by design)
VOUTLIM
50
mJ for 1ms
65
COUT
500
220
mV
350
pF
OUTPUTS REVERSE DIODE

Reverse Output Current
IRD
2,5
IRDP
5.0
VRD1
1.0
1.7
VRD2
0.85
1.7
Short Current Limit
ISCB
3.0
VCC Undervoltage
VCCMIN
3.35
3.95
VREF
0.390xVCC
0.435xVCC
Open Load Threshold Current
IOL
10
50
mA
Pull-up Resistor
ROL
2.0
8.0
Temperature Detection Threshold
TOFF
155
185
Reverse Peak current
(1)
Reverse Voltage Drop

- IOUT = - 5A
- IOUT = - 2,5A
POWERSTAGE PROTECTION
DIAGNOSTIC
Short to GND Threshold Voltage for IOUT 2A
Notes
1.
For t 2ms. Max. reverse current is limited to - 10A (for all outputs together)
33385

ARCHIVE INFORMATION
Characteristic
DYNAMIC CHARACTERISTIC
Table 4. Dynamic Electrical Characteristics
Characteristic
Symbol
Min
fIN
0.0
OVRP1
2.0
3.5
1.75
Typ
Max
Unit
1000
Hz
3.0
6.0
5.0
V/s
10
V/s
3.0
4.0
V/s
40
2.5
5.0
1.0
3.0
4.7
7.5
100
3.0
12
INPUTS
Input Frequency (NON1 to NON4)
OUTPUTS TIMING
VOUT = 4V... 16V

VOUT = 16V... Vclp
Negative Output Voltage Ramp
OVRP2
(25%... 75%)
Internal Switch-on-Time Charge Pump
OVRN
tDCP
ARCHIVE INFORMATION
ARCHIVE INFORMATION
Positive Output Voltage Ramp (with inductive load)
(NON = LOW... VGATE = 0.9 * VBAT)

Turn ON Delay
tDON
1.0
(NON = 50%, VOUT = 0.9 * VBAT)

Turn OFF Delay
(NON = 50%, VOUT = 0.1 * VBAT)
(NON = 50%, VOUT = 4V)
Undervoltage Protection
tDOFFA
tDOFFB
tRPON
Max ON time after a output voltage ramp from

0V to 25V at VCC = 0V...VCCPRO
Matching Turn ON Delay
tMON
- 3.0
(NON = 50%, VOUT = 0.9 * VBAT)

Rise time Turn OFF
tROFF
8.5
(10% - 90% of VCLP)

DIAGNOSTIC
TSCG
140
250
tOL
140
250
Clock Frequency (50% duty cycle)
fCLK
3.0
MHz
Minimum Time CLK = HIGH
tCLH
100
ns
Minimum Time CLK = LOW
tCLL
100
ns
Short to GND Filter Time

Open Load Filter Time
SERIAL DIAGNOSTIC LINK : LOAD CAPACITOR AT SDI AND SDO = 100PF
Propagation Delay (CLF Data at SDO valid)
tPCLD
100
ns
NCS = LOW to Data at SDO Valid
tPCLD
100
ns
CLK Low Before NCS Low
tSCLCH
100
ns
CLK Change Low/High after NCS = Low
tHCLCL
100
ns
SDI Input Set up Time
tSCLD
20
ns
(Setup time CLK to NCS change High/Low)
(CLK change High/Low after SDI data valid)

SDI Input Hold Time (SDI data hold after CLK change High/Low)
tHCLD
CLK Low Before NCS High
tSCLCL
20
150
ns
ns
33385

Table 4. Dynamic Electrical Characteristics (continued)

Symbol
Min
CLK High After NCS High
tHCLCH
150
NCSLow/High to Output Data Flout
tPCHDZ
100
ns
Capacitance at SDI, SDO, CLk, CS
tPCLD
10
pF
NCS Filter time (Pulses tFNCS will be ignored)
tFNCS
40
ns
Max
Unit
ns
ARCHIVE INFORMATION
10
Typ
ARCHIVE INFORMATION
Characteristic
33385

TIMING DIAGRAMS
TIMING DIAGRAMS
NCS
CLK
SDO
FSL
LSB
SDI
D1
LSB
D2
D1
D3
D2
D4
D5
D3
D4
D6
D5
MSB
D6
MSB
NOTE : FR -RESET means Reset failure storage (internal signal)
ARCHIVE INFORMATION
ARCHIVE INFORMATION
FR-RESET
Figure 4. Timing Diagram to Read the Diagnostic Register
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
FSL
FAILURE INDICATOR BIT

Only valid during NCS = LOW to the first
Low to High CLK change
1 : failure stored
0 : no failure
STATUS CHANNEL 4
11 : no failure
01 : open circuit
10: short to battery or overtemperature
00 : short to gnd
STATUS CHANNEL 3
STATUS CHANNEL 2
STATUS CHANNEL 1
Figure 5. Diagnostic Failure Register Structure

.
NCS
tSCLCH
tHCLCH
tCLH
tCLL
tSCLCH
tHCLCH
CLK
tCSDV
SDO
tPCLD
tPCHDZ
FSL
D0
tCSDV
SDI
D7
tHCLD
D0
D1
D7
Figure 6. Serial Interface Timing
33385

TIMING DIAGRAMS
Failure detection time

for an SCG failure
off
on
NON
SCG-failure
VDRAIN
VDRAIN < VREF at off-state
t-SCG (filter-time)
ARCHIVE INFORMATION
Failure detection
Failure store
Figure 7. Diagram to Short-Circuit to GND Failure (SCG-Failure) Detection

Sporadic failure detection
Statical failure detection
Failure detection active

for an sporadic OL-failure
NON
Iload
off
on
I-OL
Iload > I-OL

Iload > IOL for t > tol
Diagnostic active
retrigger t filter
t < t-ol
retrigger filter
t-ol (filter-time)
tol
Sporadic failure-detection
Failure detection
Failure store
Figure 8. Diagram to Open Load Failure (OL-Failure) Detection
33385
10

ARCHIVE INFORMATION
Filter time
ELECTRICAL PERFORMANCE CURVES
350
- 40C
300
Energy (mJ)
250
200
25C
150
100
125C
50
0
3
3,5
Figure 9. Max Clamp- Energy Specification
380
3
375
2,75
VCC=5,5V
370
365
2,25
VINL/VCC
ICCSTB (mA)
2,50
VCC=5,5V
2
1,75
VCC=4,5V
355
350
VCC=5,15V
1,50
360
345
1,25
1
-50
340
-50
-25
0
25
50
75
T, TEMPERATURE (C)
100
12,50
624
12,00
623
11,50
622
11,00
100
125
VinH/Vcc
621
10,50
10,00
9,50
8,50
-50
0
25
50
75
T, TEMPERATURE (C)
Figure 12. Low Threshold Input Voltage versus

Temperature
Figure 10. Standby Current versus Temperature
9,00
-25
125
VCC=4,5V ou 5,5V
620
619
618
VCC=5,15V
All outputs=2A
-25
0
25
50
75
T, TEMPERATURE (C)
617
100
125
616
-50
-25
0
25
50
75
T, TEMPERATURE (C)
100
125
Figure 11. Operating Mode Current versus Temperature

Figure 13. High Threshold Input Voltage versus
Temperature
33385

11
ARCHIVE INFORMATION
1,5
1
2
2,5
Pulse-Duration (ms)
0,5
ICCOPM (mA)
ARCHIVE INFORMATION
55,00
3,78
54,50
3,77
54,00
3,76
IOUT1=1A
52,50
3,74
3,73
52,00
3,72
51,50
3,71
-25
0
25
50
75
T, TEMPERATURE (C)
100
3,70
-50
125
Figure 14. Output Clamp Voltage versus Temperature
-25
0
25
50
75
T, TEMPERATURE (C)
100
125
Figure 17. Vcc Undervoltage versus Temperature
400
4,60
VCC=4,5V
IOUT1=3A
375
4,50
350
4,40
325
4,30
300
4,20
ISCB (A)
RDSON (m)
3,75
275
4,10
250
4,00
225
3,90
200
-50
-25
0
25
50
75
T, TEMPERATURE (C)
100
125
VCC=5,5V
3,80
-50
VCC=4,5V
-25
0
25
50
75
T, TEMPERATURE (C)
100
125
Figure 18. Short Current Limit versus Temperature
Figure 15. Rdson versus Temperature

24,50
24,25
24,00
23,75
23,50
23,25
23,00
22,75
22,50
-50
-25
0
25
50
75
T, TEMPERATURE (C)
100
Figure 16. Open Load versus Temperature
125
Figure 19. Inductive Switching
33385
12

ARCHIVE INFORMATION
VCCMIN (V)
53,00
51,00
-50
IOL (mA)
ARCHIVE INFORMATION
VCLP (V)
53,50
In1 (1V/div)
tDON
VOUT1(2V/div)
VOUT1(2V/div)
tDOFFA
tDOFFB
Figure 20. Turn on Delay
ARCHIVE INFORMATION
ARCHIVE INFORMATION
In1 (1V/div)
Figure 21. Turn off Delay
33385

13
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
ARCHIVE INFORMATION
The device is a Quad Low-side Driver driven by four

CMOS input stages. Each output power transistor is
protected against short to VBAT by a zener clamp against
overvoltage.
A diagnostic logic recognizes four failure types at the
output stage : overcurrent, short to GND, open-load and
overtemperature.
The failures are individually stored in a byte which can be
read out via the serial interface (SPI).
OUTPUT STAGE CONTROL

Each of the four output stages is switched ON and OFF by
an individual control line (NON-Input). The logic level of the
control line is CMOS compatible. The output transistors are
switched off when the inputs are not connected.
POWER TRANSISTORS
Each of the four output stages has its own zener clamp.
This causes a voltage limitation at the power transistors when
inductive loads are switched off. The drain voltage ramp
occurring when output is switched on or off, is within defined
limits. Output transistors can be connected in parallel to
increase current capability. In this case, the associated inputs
should be connected together.
SHORT-CIRCUIT AND OVERTEMPERATURE

PROTECTION
If the output current increases above the short current limit
for a time longer than tSCB or if the temperature increases
above TOFF then the power transistor is immediately
switched off. It remains switched off until the control signal on
the NON-Input is switched off and on again.
DIAGNOSTICS
The following failures at the output stage are recognized :
Short -Circuit to VBAT or overtemp = SCB (Highest priority)
Short -Circuit to GND.................... = SCG
Open Load...................................... = OL (Lowest priority)
The SCB failure is recognized by an overcurrent (current
above the short current limit) or an overtemperature.
If the current through the output stage is lower than the

IOL-reference, after a filter time an OL failure will be
recognized. This measurement is active while the power
stage is switched on.
The SCG failure will recognize when the drain voltage is
lower than the OL reference limit, while the output stage is
switched off. All four outputs have an independent
overtemperature detection and shutdown. All failures are
stored in individual registers.
They can be read by the microprocessor via the serial
interface. There is no failure detected if the power stage
control time is shorter than the filter time.
DIAGNOSTIC INTERFACE
The communication between the microprocessor and the
failure register runs via the SPI link. If there is a failure stored
in the failure register, the first bit of the shift register is set to
a high level. With the High/Low change on the NCS pin, the
first bit of the diagnostic shift register will be transmitted to the
SDO output. The SDO output is the serial output from the
diagnostic shift register and it is put into a tri-state when the
NCS pin is high. The CLK pin clocks the diagnostic shift
register. New SDO data will appear on every rising edge of
this pin and new SDI data will be latched on every CLKs
falling edge into the shift register. With the first positive pulse
of the CLK, the failure register will be cleared. There is no bus
collision at a small spike at the NCS. The CLK is always LOW
while the NCS-signal is changing.
RESET
There are two different reset functions realized :
Under voltage reset : as long as the VCC voltage is lower
than VCCRES, the power stages are switched off and the
failure-registers are reset.
Reset pin : as long as the NRES-pin is low, following
circuits are reset :
Power stages
Failure register
UNDERVOLTAGE PROTECTION
At low VCC voltage, the device remains switched off even
if there is a voltage ramp at the OUT pin.
33385
14

ARCHIVE INFORMATION
INTRODUCTION
PACKAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
ARCHIVE INFORMATION
ARCHIVE INFORMATION
For the most current package revision, visit www.freescale.com and perform a keyword search using the 98A listed below.
DH SUFFIX
VW (PB-FREE) SUFFIX
20-PIN HSOP
PLASTIC PACKAGE
98ASH70702A
ISSUE B
33385

15
PACKAGING
PACKAGE DIMENSIONS
ARCHIVE INFORMATION
ARCHIVE INFORMATION
PACKAGE DIMENSIONS (CONTINUED)
DH SUFFIX
VW (PB-FREE) SUFFIX
20-PIN HSOP
PLASTIC PACKAGE
98ASH70702A
ISSUE B
33385
16

REVISION HISTORY
REVISION HISTORY
REVISION
Implemented Revision History page

Added Pb-Free suffix code VW
Converted to Freescale format, and adjusted to the prevailing form and style
ARCHIVE INFORMATION
11/2006
DESCRIPTION OF CHANGES
ARCHIVE INFORMATION
6.0
DATE
33385

17
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MC33385
Rev. 6.0
11/2006
RoHS-compliant and/or Pb-free versions of Freescale products have the functionality

and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free
counterparts. For further information, see http://www.freescale.com or contact your
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Freescale Semiconductor

Document Number: MC33385

Quad Low-side Driver

Figure 1. MC33385 Simplified Application Diagram

There are no disclaimers required on the Final publication of a data sheet.

The MC33385 is a Quad Low-side Driver fully protected switch. This

Figure 2. 33385 Simplified Internal Block Diagram

Analog Integrated Circuit Device Data

Figure 3. 33385 Pin Connections

Input Control Signal for Channel 2

Serial Data Input

Clock Line for Serial Interface

Chip Select for Serial Interface

Input Control Signal for Channel 4

Input Control Signal for Channel 3

Data Output of Serial Interface

Input Control Signal Channel 1

Connected to the PCB Ground for Thermal Purposes

Analog Integrated Circuit Device Data

Continuous Output Voltage (With no reverse current)

Peak Output Current

Clamped Energy at the Switching OFF (See Figure 9)

Input Voltage (Inputs)

Input Protection Diode Current

Input Voltage (Outputs)

Input Protection Diode Current

Peak Package Reflow Temperature During Reflow (1), (2)

Analog Integrated Circuit Device Data

Junction Temperature Continuous (Continuous)

Junction Temperature Dynamical (Time limited)

Active for VCC = 0V to VCCPRO

Input Current (VIN = VCC)

Input Current (VCC >VRES & 0V<VIN < 0.9*VCC)

High Output Level (ISDO = -2mA)

Low Output Level (ISDO = 3.2mA)

Tristate Leakage Current (NCS = HIGH, VSDO = 0V to VCC)

Average Output Current

Output Peak Current

SERIAL DATA OUTPUT

OUTPUTS (OUT 1...4)

Analog Integrated Circuit Device Data

Table 3. Static Electrical Characteristics (continued)

Leakage Current 1 (NON = High, VOUT = 25V, VCC = 5V)

Leakage Current 2 (NON = High, VOUT = 16V, VCC = 1V)

Output Clamp Voltage (IOUT = 1A)

Matching Clamp Voltage (Between two outputs)

Clamped Energy at the Switching OFF (See Figure 9)

On Resistance (IOUT = 2A, TJ = 150C, NON = LOW)

Output Low Voltage Limitation (IOUT = 150mA)

OUTPUTS REVERSE DIODE

Short Current Limit

Open Load Threshold Current

Temperature Detection Threshold

Reverse Peak current

Reverse Voltage Drop

Analog Integrated Circuit Device Data

VOUT = 4V... 16V

Internal Switch-on-Time Charge Pump

Positive Output Voltage Ramp (with inductive load)

(NON = LOW... VGATE = 0.9 * VBAT)

(NON = 50%, VOUT = 0.9 * VBAT)

Max ON time after a output voltage ramp from

(NON = 50%, VOUT = 0.9 * VBAT)