SSN COLLEGE OF ENGINEERING,

KALAVAKKAM -603 110

STUDENT RESEARCH PROJECT PROPOSAL FOR

INTERNAL FUNDING

year

Title:
Submitted By
K.MADHU MOHAN
M.MEENAKSHI
sHIVABALAN

EEE
FINAL YEAR 2016

Cover sheet

1. PROJECT TITLE:
2. BROAD AREA:
3. SUB AREA:
4. DEPARTMENT: ELECTRICAL AND ELECTRONICS ENGINEERING
5. PROPOSED BUDGET:
6. PROJECT MEMBER: K.MADHU MOHAN,M.MEENAKSHI,SHIVABALAN
7. PROJECT GUIDE, DESIGNATION & ADDRESS: MRS.MALATHY

PROJECT DETAILS

PROJECT SUMMARY:

The concept of multilevel Inverter (MLI) is a kind of

modification of two-level inverter. In multilevel inverters
we dont deal with the two level voltage instead in order
to create a smoother stepped output waveform, more
than two voltage levels are combined together and the
output waveform obtained in this case has lower dv/dt
and also lower harmonic distortions.
Smoothness of the waveform is proportional to the
voltage levels. As we increase the voltage level the
waveform becomes smoother but the complexity of

controller circuit and components also increases along

with the increased levels.
If the waveforms of three, five and seven level inverters
are observed, we can see that the seven level inverters
gives the smooth waveforms with less harmonic
distortions(THD) and voltage stresses. Multilevel inverters
with a large number of steps can generate high quality
voltage waveforms, good enough to be considered as
suitable for voltage source generators.
The unique arrangement of multilevel voltage source
inverters allow them to achieve high voltages with the
low harmonics not including the utilization of
transformers or series connected synchronized switching
devices.
The Diode clamped, Flying capacitor, Cascaded H-bridge
inverter are the three main different multilevel inverter
structures which are used in industrial applications with
separate DC sources. In flying capacitor and diodeclamped inverter there is a problem of capacitor voltage
balancing and this problem is overcome in cascaded Hbridge inverter.
In seven level multi level inverters, there are many
existing topologies present, namely seven level nine
switches and seven level five switches multilevel inverter
with three DC sources.
In addition to the above, we have again seven level six
switches and seven level five switches multilevel inverter
with four DC sources.
Thus by going through all the advantages and
disadvantages of the already existing topologies of seven
level multilevel inverter we have proposed a new

topology with reduced number of switches and DC

sources for the same.
The proposed topology is designed with three dc sources
and six switches and also it consists of some additional
features like minimum number of switches conducting at
a specific interval of time and the multicarrier PWM
method.
2. INTRODUCTION & MOTIVATION OF THE PROJECT:

Multilevel inverter technology has emerged recently as a

very important alternative in the area of high-power
medium-voltage energy control. Though multilevel
inverter has a number of advantages it has drawbacks in
the vein of higher levels because of using more number
of semiconductor switches. This may leads to vast size
and price of the inverter. So in order to overcome this
problem the new multilevel inverter is proposed with
reduced number of switches. The proposed method is
well suited for a high power application and is built with
three Dc sources and six Switches. Multi carrier PWM
technique is used for sine wave generation.
Basically our proposed topology is mainly to reduce the
number of switches, which forms the history of the
problem. A multilevel converter has several advantages
over a conventional two-level converter that uses high
switching frequency pulse width modulation (PWM). The
attractive features of a multilevel converter draws us the
interests in the field. Our topology of multilevel inverter
reduces the complexity of using a multilevel inverter
having more number of switches. There is no similar
topologies of our proposed model and there are
possibilities for further development.

3. OBJECTIVE: To propose a new topology for seven level multilevel

inverter with less number of switches than the already present
topologies.
4. TECHNICAL DETAILS:level,switches,how it is
superior,thd,pwm,adv,in which it is btr than othr,cmpare wid
conventional,3level inv wid 12 swtches,driver and associated ckts
lam less,compact and efficient,prop toop can b xtnded further,more
num of levels,output resemble to sine wave,thd wil b vry
less,fundamental switching freq pwm tech is used,btr pwm
technique is used,
5. METHODOLOGY OF THE WORK: Our methodology of work begins with the

designing of our project model in matlab simulink. Our circuit consists of six
switches and three DC voltage sources, two switches conducting in a interval. The
above circuit is constructed in matlab and simulates using the matlab commands
and the output is analysed. It is checked with various pwm techniques and the
better pwm technique is used. After this the coding is done in aurdino and the
pulses are generated using aurdino commands. And this generated pulses are then
given to the power circuit building circuit and is checked.
how to approach the proj,power ckt dsign,simulation,if ok , all pwm
techs are checkd nd btr pwm is used,coding in ardino,pulses are
generatd,puses is given to powr ckt building ckt nd checkin
6. WORKPLAN:
1.Planning and designing of circuit:
2.
steps of workin, time, sept to march in mnths wid each task

7. DETAILED BUDGET:
8. PROJECT OUTCOME:

Signature of the Project student

Signature of the Project guide