UNIT I MOS TRANSISTOR THEORY

NMOS and PMOS transistors, CMOS logic, MOS transistor theory Introduction, Enhancement mode transistor
action, Ideal I-V characteristics, DC transfer characteristics, Threshold voltage- Body effect- Design equationsSecond order effects. MOS models and small signal AC characteristics, Simple MOS capacitance Models, Detailed
MOS gate capacitance model, Detailed MOS Diffusion capacitance model
UNIT II CMOS TECHNOLOGY AND DESIGN RULE
CMOS fabrication and Layout, CMOS technologies, P -Well process, N -Well process, twin tub process, MOS
layers stick diagrams and Layout diagram, Layout design rules, Latch up in CMOS circuits, CMOS process
enhancements, Technology related CAD issues, Fabrication and packaging.
UNIT III INVERTERS AND LOGIC GATES
NMOS and CMOS Inverters, Inverter ratio, DC and transient characteristics , switching times, Super buffers, Driving
large capacitance loads, CMOS logic structures , Transmission gates, Static CMOS design, dynamic CMOS design.
UNIT IV CIRCUIT CHARACTERISATION AND PERFORMANCE ESTIMATION
Resistance estimation, Capacitance estimation, Inductance, switching characteristics, transistor sizing, power
dissipation and design margining. Charge sharing .Scaling.
UNIT V VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVELPHYSICAL DESIGN
Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic circuits Ripple carry adders,
Carry look ahead adders, High-speed adders, Multipliers. Physical design Delay modelling ,cross talk, floor
planning, power distribution. Clock distribution. Basics of CMOS testing.
UNIT I MOS TRANSISTOR THEORY
NMOS and PMOS transistors, CMOS logic, MOS transistor theory Introduction, Enhancement mode transistor
action, Ideal I-V characteristics, DC transfer characteristics, Threshold voltage- Body effect- Design equationsSecond order effects. MOS models and small signal AC characteristics, Simple MOS capacitance Models, Detailed
MOS gate capacitance model, Detailed MOS Diffusion capacitance model
UNIT II CMOS TECHNOLOGY AND DESIGN RULE
CMOS fabrication and Layout, CMOS technologies, P -Well process, N -Well process, twin tub process, MOS
layers stick diagrams and Layout diagram, Layout design rules, Latch up in CMOS circuits, CMOS process
enhancements, Technology related CAD issues, Fabrication and packaging.
UNIT III INVERTERS AND LOGIC GATES
NMOS and CMOS Inverters, Inverter ratio, DC and transient characteristics , switching times, Super buffers, Driving
large capacitance loads, CMOS logic structures , Transmission gates, Static CMOS design, dynamic CMOS design.
UNIT IV CIRCUIT CHARACTERISATION AND PERFORMANCE ESTIMATION
Resistance estimation, Capacitance estimation, Inductance, switching characteristics, transistor sizing, power
dissipation and design margining. Charge sharing .Scaling.
UNIT V VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVELPHYSICAL DESIGN
Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic circuits Ripple carry adders,
Carry look ahead adders, High-speed adders, Multipliers. Physical design Delay modelling ,cross talk, floor
planning, power distribution. Clock distribution. Basics of CMOS testing.
UNIT I MOS TRANSISTOR THEORY
NMOS and PMOS transistors, CMOS logic, MOS transistor theory Introduction, Enhancement mode transistor
action, Ideal I-V characteristics, DC transfer characteristics, Threshold voltage- Body effect- Design equationsSecond order effects. MOS models and small signal AC characteristics, Simple MOS capacitance Models, Detailed
MOS gate capacitance model, Detailed MOS Diffusion capacitance model
UNIT II CMOS TECHNOLOGY AND DESIGN RULE
CMOS fabrication and Layout, CMOS technologies, P -Well process, N -Well process, twin tub process, MOS
layers stick diagrams and Layout diagram, Layout design rules, Latch up in CMOS circuits, CMOS process
enhancements, Technology related CAD issues, Fabrication and packaging.
UNIT III INVERTERS AND LOGIC GATES
NMOS and CMOS Inverters, Inverter ratio, DC and transient characteristics , switching times, Super buffers, Driving
large capacitance loads, CMOS logic structures , Transmission gates, Static CMOS design, dynamic CMOS design.
UNIT IV CIRCUIT CHARACTERISATION AND PERFORMANCE ESTIMATION
Resistance estimation, Capacitance estimation, Inductance, switching characteristics, transistor sizing, power
dissipation and design margining. Charge sharing .Scaling.
UNIT V VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVELPHYSICAL DESIGN
Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic circuits Ripple carry adders,
Carry look ahead adders, High-speed adders, Multipliers. Physical design Delay modelling ,cross talk, floor
planning, power distribution. Clock distribution. Basics of CMOS testing.