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Outline
Design Steps
Sequence Detectors
Arbitrary Counters
2
Sequence Detectors
A sequence Detector is a special kind of sequential
circuit that looks for a special bit pattern in some
input.
The circuit has only one input: X and one output: Z,
which is 1 when the desired pattern is detected.
For example the input and output for a circuit that
detects the bit pattern 1001 looks like
X: 11100110100100110
Z: 00000100000100100
Here, one input and one output bit appear every clock
cycle.
This requires a sequential circuit because the circuit
has to remember the inputs from previous clock
cycles
5
Example
Design a circuit that detects the sequence
011010 using D, T, and JK FFs.
E: 0110,
F: 01101
0/1
1/0
1/0
0/0
1/0
0/0
A
0/0
1/0
1/0
0/0
1/0
0/0
E
0
1
0
00
01
01
010
011
011
0110
0111
0110
01100
01101
7
01101
011010
011
011
Number of stats = 6
2N-1 < 6 2N N = 3
Number of Rows = 23+1 = 16
Number of Columns:
1 (input) +
1 (output)+
3 (current state) +
3 (current state) +
1 (D)
1 (T)
+ 2 (J , K) = 12
8
0/0
1/0
1/0
0/0
1/1
0/0
A
0/0
1/0
1/0
0/0
0/0
Current State
Input
Next State
Output
A
0
B
0
A
1
A
0
B
0
B
0
B
1
C
0
C
0
B
0
C
1
D
0
D
0
E
0
D
1
A
0
E
0
B
0
E
1
F
0
F
0
B
1
F
1
D
0
9
1/0
A 000
D 011
B 001
E 100
Current StateInput
Next
A
0
A
1
B
0
B
1
C
0
C
1
D
0
D
1
E
0
E
1
F
0
F
1
State
Output
B
0
A
0
B
0
C
0
B
0
D
0
E
0
A
0
B
0
F
0
B
1
D
0
C 010
F 101
Current State
InputNext StateOutput
Q2 Q1 Q0 X Q2*Q1*Q0* Z
0
0
0
0
0
0 0 1
0
0
0
0
1
0 0 0
0
0
0
1
0
0 0 1
0
0
0
1
1
0 1 0
0
0
1
0
0
0 0 1
0
0
1
0
1
0 1 1
0
0
1
1
0
1 0 0
0
0
1
1
1
0 0 0
0
1
0
0
0
0 0 1
0
1
0
0
1
1 0 1
1
1
0
1
0
0 0 1
0
1
0
1
1
0 1 1
10
Flop inputs
Output
T1 J0 K0
Z
0 1 X
0
0 0 X
0
0 X 0
0
1 X 1
0
1 1 X
0
0 1 X
0
1 X 1
0
1 X 1
0
0 1 X
0
0 1 X
0
0 X 0
1
1 X 0
0
X X X
X
X X X
X
X X X
X
X X X
X
11
D2
Q0X
Q0X
0
0
0
1
1
1
0
0
1
0
0
0
0
Q2Q 1
J0
1
1
1
0
0
0
0
Q2Q 1
1
1
0
1
1
X
1
0
1
0
1
1
1
1
1
K0
0
1
0
0
Q2Q 1
0
Q2Q 1
1
1
1
1
0
0
1
Q0X
0
0
0
1
1
1
0
0
Q0X
0
0
0
1
1
Q0X
0
0
0
1
0
0
0
Q2Q 1
1
0
1
1
1
0
D2
SET
CLR
Q1X'
Q0X
T1
D
SET
Q2
Q2
Q1
X
CLR
Q2
Q1
X'
J0
Q1
Q2X
SET
Q1
Q0
K0 CLR Q0
CLK
13
E: 0110,
F: 01101, G: 011010
14
Exercise
15
Design of Arbitrary
Counters
State Table
Current State
InputNext State
Flip Flop inputs
Q2 Q1 Q0 X Q2*Q1*Q0* D2 D1 D0
0 0 0
0
1 1 1
0 0 0
1
0 0 1
0 0 1
0
0 0 0
0 0 1
1
0 1 0
0 1 0
0
0 0 1
0 1 0
1
0 1 1
0 1 1
0
0 1 0
0 1 1
1
1 0 0
1 0 0
0
0 1 1
1 0 0
1
1 0 1
1 0 1
0
1 0 0
1 0 1
1
1 1 0
1 1 0
0
1 0 1
1 1 0
1
1 1 1
1 1 1
0
1 1 0
1 1 1
1
0 0 0
18
FF inputs
D2
0
0
0
0
0
1
1
1
1
0
1
1
0
0
0
0
1
1
Q0X
1
0
0
Q2Q 1
D1
Q0X
1
1
1
1
0
1
0
0
0
Q2Q 1
1
1
1
0
1
1
1
1
1
0
Q0X
0
0
1
1
0
Q2Q 1
1
D
0
0
1
1
0
19
Exercises
Use D, T, and JK FFs to design a three bit
counter that has one input X. The
counter count odd (1, 3, 5, 7) if X = 1,
and counts even (0, 2, 4, 6) if X = 0. If
the X = 0 and the current number is odd,
the counter will go to the next even
number. likewise, if X = 1 and the current
number of even the counter goes to the
next odd number.
Design a 4 bit counters that goes through
the following sequence: 0, 3, 5 , 2, 6, 1,
4, 8, 12, 11, 13, 7, 10, 14, 15, 9, 0.
20
Exercise
Design a digital circuit that has one
output signal Z. The signal Z
controls the dispense of soft drinks
in a vending machine. The machine
accepts three types of coins: 25 fils,
50 fils, and 1 AED. The output signal
Z should be one if the value of the
coins the customer enters is 1.5 AED
or more.
21