Vestel 17mb25 SM

1. INTRODUCTION..................................................................................................................
3
2. TUNER................................................................................................................................... 3
1.1
General description of TDTC-G101D: .................................................................. 3
1.2
Features of TDTC-G101D: .................................................................................... 3
1.3
Pin Configuration ................................................................................................... 4
3. AUDIO AMPLIFIER STAGE WITH TPA3101 ................................................................... 4
3.1 General Description of TPA3101................................................................................. 4
3.2 Features of TPA3101 .................................................................................................. 4
3.3
Pin Configuration of TPA3101 .............................................................................. 5
4. MICROCONTROLLER (MSTAR)....................................................................................... 6
4.1 Genaral Description..................................................................................................... 6
4.2
Features .................................................................................................................. 6
5. INTEGRATED DVB-T RECEIVER (CHEERTEK) ............................................................ 7
5.1 General Description...................................................................................................... 7
5.2
Features .................................................................................................................. 8
6. 4MX16 BIT SYNCHRONOUS DRAM (SDRAM) ............................................................ 10
6.1 General Description.................................................................................................... 10
6.2 Features ...................................................................................................................... 10
6.3 Pin Configuration ...................................................................................................... 11
7. 512K CMOS SERIAL FLASH MX25L512 ..................................................................... 12
7.2 Features ...................................................................................................................... 12
8. 16MX16 BIT SYNCHRONOUS DRAM (SDRAM) .......................................................... 14
8.2 Features ...................................................................................................................... 14
9. SAW FILTER ...................................................................................................................... 14
9.1 IF Filter for Audio Applications Epcos K9656M ................................................... 14
9.1.1 Standarts .................................................................................................................. 14
9.1.2 Features ................................................................................................................... 15
9.1.3 Pin Configuration .................................................................................................. 15
9.1.4 Frequency Response................................................................................................ 15
9.2 IF Filter for Video Applications Epcos K3958M.................................................... 16
9.2.1 Standarts .................................................................................................................. 16
9.2.2 Features ................................................................................................................... 16
9.2.3 Pin Configuration .................................................................................................... 16
9.2.4 Frequency Response................................................................................................ 17
10. POWER STAGE ................................................................................................................ 17
11. IC SPECIFICATIONS ....................................................................................................... 18
11.1 32K Smart Serial EEPROM 24C32 ..................................................................... 18
11.2 TL062 ...................................................................................................................... 19
11.3 PI5V330 ................................................................................................................... 20
11.4 74HCT4053............................................................................................................. 21
11.5 FMS6145................................................................................................................. 22
11.6 LM1117................................................................................................................ 23
11.7 ST24LC21 ............................................................................................................... 24
11.8 24LC02.................................................................................................................... 25
11.9 MAX810............................................................................................................... 26
11.10 TDA1308............................................................................................................... 27
11.11 MP1583 .................................................................................................................. 27
11.12
MP2112 ............................................................................................................ 29
11.13
IRF7314............................................................................................................ 29
12. BLOCK DIAGRAMS ........................................................................................................ 30
12.1 General Block Diagram............................................................................................ 30
12.2 Integrated DVB-T Receiver Block Diagram............................................................ 32
12.3 MSTAR Block Diagram....................................................................................... 33
1. INTRODUCTION
17MB25 mainboard is based on MSTAR concept IC. This IC is capable of handling audio
processing, video processing, scaling-display processing, 3D comb filter, OSD and text
processing, 8 bit dual LVDS transmitter.
TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as
B/G, D/K, I/I, and L/L including German and NICAM stereo.
Sound system is able to supply 2x10W (10%THD) audio output power for stereo speakers.
Supported peripherals are:
The analog part of the moard can support DVD module which is connected to mainboard
through a cable.
The USB feature is supported through digital part of the mainboard.
1 RF input VHF1, VHF3, UHF @ 75Ohm(Common)
1 Side AV (SVHS, CVBS, HP, R/L_Audio) (Common)
1 SCART socket(Common)
1 YPbPr (Common)
1 PC input(Optional)
2 HDMI (Common)
1 Stereo audio input for PC(Common)
1 Line out(Common)
1 S/PDIF output(Common)
1 Side S-Video(Optional)
1 Headphone(Common)
1 Common interface(Optional)
1 Digital USB(Opional)
1 RS232(Optional)
2. TUNER
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH).
The tuning is available through the digitally controlled I2C bus (PLL). Below you will find
info on the Tuner in use.
1.1 General description of TDTC-G101D:

The Tuner covers 3 Bands(from 48MHz to 862MHz for COFDM, from 45.25MHz to
863.25MHz for CCIR CH). Band selection and Tuning are performed digitally via the I2C
bus.
1.2 Features of TDTC-G101D:
Digital Half-NIM tuner for COFDM

Covers 3 Bands(From 48MHz to 862MHz for COFDM,
From 45.25MHz to 863.25MHz for CCIR CH)
Including IF AGC with SAW Filter

Bandwidth Switching (7/8 MHz) possible
DC/DC Converter built in for Tuning Voltage
Internal(or External) RF AGC, Antenna Power Optional
1.3 Pin Configuration
3. AUDIO AMPLIFIER STAGE WITH TPA3101

3.1 General Description of TPA3101
The TPA3101D2 Rev.A evaluation module consists of a single 10-W, class-D, stereo audio
power amplifier complete with a small number of external components mounted on a circuit
board that can be used to directly drive a speaker with an external analog audio source as the
input.
The gain of the amplifier is controlled by two gain select pins. The gain selections are 20, 26,
32, 36dB.
The outputs are fully protected against shorts to GND, Vcc and output to output shorts with an
auto recovery feature and monitor output.
3.2 Features of TPA3101
10-W/ch into an 8- Load From a 13-V Supply

9.2-W/ch into an 8- Load From a 12-V Supply
Operates from 10 V to 26 V
87% Efficient Class-D Operation Eliminates
Need for Heat Sinks
Four Selectable, Fixed Gain Settings
4
Differential Inputs
Thermal and Short-Circuit Protection With
Auto Recovery Feature
Clock Output for Synchronization With Multiple Class-D Devices
Surface Mount 7 mm 7 mm, 48-pin QFN Package
Surface Mount 7 mm 7 mm, 48-pin HTQFP Package
3.3 Pin Configuration of TPA3101
4. MICROCONTROLLER (MSTAR)
4.1 Genaral Description
The MST6WB7GQ-3 is a high performance and fully integrated IC for multi-function
LCD monitor/TV with resolutions up to full HD (1920x1080). It is configured with an
integrated triple-ADC/PLL, an integrated DVI/HDCP/HDMI receiver, a multi-standard TV
video and audio decoder, two video de-interlacers, two scaling engines, the MStarACE-3
color engine, an on-screen display controller, an 8-bit MCU and a built-in output panel
interface. By use of external frame buffer, PIP/POP is provided for multimedia applications.
Furthermore, 3-D video decoding and processing are fulfilled for high-quality TV
applications. To further reduce system costs, the MST6WB7GQ-3 also integrates
intelligent power management control capability for green-mode requirements and spreadspectrum support for EMI management.
4.2 Features
LCD TV controller with PIP/POP display functions
Input supports up to UXGA & 1080P
Panel supports up to full HD (1920x1080)
TV decoder with 3-D comb filter
Multi-standard TV sound demodulator and decoder
10-bit triple-ADC for TV and RGB/YPbPr
10-bit video data processing
Integrated DVI/HDCP/HDMI compliant receiver
High-quality dual scaling engines & dual 3-D video de-interlacers
3-D video noise reduction
Full function PIP/PBP/POP
MStarACE-3 picture/color processing engine
Embedded On-Screen Display (OSD) controler engine
Built-in MCU supports PWM & GPIO
Built-in dual-link 8/10-bit LVDS transmitter
5-volt tolerant inputs
Low EMI and power saving features
296-pin LQFP
NTSC/PAL/SECAM Video Decoder
Supports NTSC M, NTSC-J, NTSC-4.43, PAL (B,D,G,H,M,N,I,Nc), and SECAM
Automatic TV standard detection
Motion adaptive 3-D comb filter for NTSC/PAL
8 configurable CVBS & Y/C S-video inputs
Supports Teletext level-1.5, WSS, VPS, Closed-caption, and V-chip
Macrovision detection
CVBS video output
Video IF for Multi-Standard Analog TV

Digital low IF architecture
Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution
Maximum IF analog gain of 37dB in addition to digital gain
Programmable TOP to accommodate different tuner gain to optimize noise and
linearity performance
Multi-Standard TV Sound Decoder
Supports BTSC/NICAM/A2/EIA-J demodulation and decoding
FM stereo & SAP demodulation
L/Rx4, mono, and SIF audio inputs
L/Rx3 loudspeaker and line outputs
Supports sub-woofer output
Built-in audio output DACs
Audio processing for loudspeaker channel, including volume, balance, mute, tone, EQ,
and virtual stereo/surround
Optional advanced surround available (Dolby1, SRS2, BBE3 etc)
Digital Audio Interface
I2S digital audio input & output
S/PDIF digital audio input & output
HDMI audio channel processing capability
Programmable delay for audio/video synchronization
Analog RGB Compliant Input Ports
Three analog ports support up to UXGA
Supports HDTV RGB/YPbPr/YCbCr
Supports Composite Sync and SOG (Sync-on-Green) separator
Automatic color calibration
DVI/HDCP/HDMI Compliant Input Port
Two HDMI input ports with built-in switch
Supports TMDS clock up to 225MHz @ 1080P 60Hz with 12-bit deep-color
resolution
Single link on-chip DVI 1.0 compliant receiver
High-bandwidth Digital Content Protection(HDCP) 1.1 compliant receiver
5. INTEGRATED DVB-T RECEIVER (CHEERTEK)

5.1 General Description
CT216T is a highly integrated single chip for DVB-T compliant STB solution. Compared
with Cheertek's previous generations of STB receiver devices. CT216T further interates
COFDM demodulator USB 2.0 HS host controller, memory card reader, 1/2-bit SPIFlash
interface, audio DAC, PWM in/out and SAR-ADC functions. In additiont special
enhangements are provided such as MPEG-4 video decoding, 16-bit OSD with anti-flickering,
HW JPEG decoding, flesh tone and black-white extensions, and improvement of small video
quality.
CT216T includes COFDM demodulator transport stream de-multiplexer, DVB-CSA
compliant de-scrambler, RISC MPUs, MPEG-1/2/4 AV decoder, digital T\/ encoder, audio
DACs, USB 2.0 HS host controller, memory card reader, smart card reader, CI controller and
other peripherals.
Cli216T is designed in focus on the market of single tuner input product which makes, it a
cost effective solution. Supports include free to air, conditional access for SC (Smart card)
and CI portable devices, PVR, LCD TV, and other DVB-T applications.
5.2 Features
COFDM Demodulator
ETSI EN 300 744 DVB-T NorDig Unified 1.0.3, and D-book compliant
Automatic spectral inversion, detection
Integrated ADC
Direct IF (36.167 MHz or 43.75 MHz) or low IF (4.57 MHz) supported
Single IF AGC or dual RF/lF AGC controls with modulabon
Impulsive noise cancellation
Carrier acquisition range: 400 kHz (extensible to 600 kHz in 8MHz BW)
Adjacent channel interference (ACI) filter,for supporting 6, 7, and 8MHz channels
with one 8MHz analog filter
Co-channel interterence (CCl) supression
RF signal strength monitor
MPU
Three 32-bit RISC MPU run up to 166MHz with total 448DMIPS
8KB I-Cache and 8KB D-Cache
Two general purpose timers
Watchdog timer
DSU for source level debug
Memory
6-bit SDRAM controller supports up to 32MB (16MB for l28-pin)
Unified memory architecture
Parallel flash (216-pin only)
1/2-bit SPI flash
Transport De-multiplexing
TS, PES, and ES demultiplexing
OneTS path
CI CAM interface (216-pin only)
32 general purpose PID filters
32 Section filters
CRC-32 accelerator
DVB-CSA de-scramblers
Video Decoding and Processing

MPEG-2 MP@ML
MPEG-4 SP&ASP
PAL/NTSC format conversion
3:2 pull down
Zoom in/out from 1/16X to 16X
HW JPEG decode
4/8/16-bit OSD with anti-flickering
On chip NTSC/PAL TV encoder
CVBS, S-VHS, and component video
VBI insertion for Teletext, CC and WSS
ITU-R BT.601 and ITU-R BT.656 outputs
Flesh tone extension
Black/white extension,
Audio Decoding and Processing
MPEG-1: layer 1/2/3
MPEG-2: layer 1/2
Decode MPEG-2 and MPEG-1 audio at sampling frequency of 16K, 22.05K, 24K,
32K, 44.1K, and 48KHz
Decode CU-DA at sampling frequency of 44.1 KHz
SPDIF out for AC-3 by-pass
Embedded 2 channels audio DAC for L/R outputs
Digital mute control and volume adjustment
OSD(On Screen Display)
There are total 9 display planes: border; background. video. RS1 (Rectangle Strip 1),
RS2, OSD, RS3, RS4, and cursor.
4/8l16-bit OSD with anti-flickering and anti-flutter
Support alpha-blending per color
Adjustable brightness control in window
Bitmap OSD
Support horizontal pixel duplication to enlarge bitmap automatically
Support sub-region redraw to facilitate bitmap display.
Digitnal TV Encoder
NTSC-M, PAL-B, D, G, H, I, Nc, M encoding
Four video DACs to provide 6 configuration output: modes
Support CVBS, S-VHS. and component video outs
VBI insertion for Teletext, CC and WSS
Color burst amplitude control
Programmable sync. level
On chip, color-bar generator
High Speed I/O
USB 2.0 HS host controller
9
Memory card reader with SD, MMC, and MS interfaces

Compliant with SD spec. 1.1 and MMC spec. 4.0 with 1-bit & 4-bit modes.
Compliant with Memory Stick Pro format spec. 1.02 and Memory stick format spec
1.43 with 1-bit and 4-bit modes.
Peripherals
Up to 3 full duplex UART with 16-byte FIFO
2-wire serial (2WS) in master mode .. .
Up to 2 IS0-7816 compliant SC (1 in 128-pin, can also be used as UART)
5 digits 7-Segrnent LED control
5x3 two-dimension key scan
2 SAR-ADC input
4 PWM input/output
1 HW IR command decode
GPIO
Electrical and Physical Characteristics
Capable of using single 27MHz clock input crystal
1.8V and 3.3V dual power supply
Power standby mode
PQFP-128 (CT216T-Z) or LQFP-216 (CT216T-R) package
6. 4MX16 BIT SYNCHRONOUS DRAM (SDRAM)

The EM638165 SDRAM is a high-speed CMOS synchronous DRAM containing 64 Mbits. It
is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all
signals are registered on the positive edge of the clock signal, CLK). Read and write accesses
to the SDRAM are burst oriented; accesses start at a selected location and continue for a
programmed number of locations in a programmed sequence. Accesses begin with the
registration of a BankActivate command which is then followed by a Read or Write
command. The EM638165 provides for programmable Read or Write burst lengths of 1, 2, 4,
8, or full page, with a burst termination option. An auto precharge function may be enabled to
provide a self-timed row precharge that is initiated at the end of the burst sequence. The
refresh functions, either Auto or Self Refresh are easy to use. By having a programmable
mode register, the system can choose the most suitable modes to maximize its performance.
These devices are well suited for applications requiring high memory bandwidth and
particularly well suited to high performance PC applications.
6.2 Features
Fast access time from clock: 4.5/5/5.4 ns

Fast clock rate: 200/166/143 MHz
Fully synchronous operation
Internal pipelined architecture
1M word x 16-bit x 4-bank
Programmable Mode registers
10
CAS Latency: 2, or 3
Burst Length: 1, 2, 4, 8, or full page
Burst Type: interleaved or linear burst
Burst stop function
Auto Refresh and Self Refresh
4096 refresh cycles/64ms
CKE power down mode
Single +3.3V 0.3V power supply
Interface: LVTTL
54-pin 400 mil plastic TSOP II package
Pb free and Halogen free
60-ball 6.4mm x 10.1mm VFBGA package
Pb free
6.3 Pin Configuration
11
7. 512K CMOS SERIAL FLASH MX25L512

The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x
8 internally. The MX25L512 feature a serial peripheral interface and software protocol
allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a
serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS#
input. The MX25L512 provide sequential read operation on whole chip. After program/erase
command is issued, auto program/ erase algorithms which program/ erase and verify the
specified page or sector/block locations will be executed. Program command is executed on
page (256 bytes) basis, and erase command is executes on chip or sector (4K-bytes). To
provide user with ease of interface, a status register is included to indicate the status of the
chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP
bit. When the device is not in operation and CS# is high, it is put in standby mode and draws
less than 10uA DC current. The MX25L512 utilize MXIC's proprietary memory cell, which
reliably stores memory contents even after 100,000 program and erase cycles.
7.2 Features
General
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
524,288 x 1 bit structure
16 Equal Sectors with 4K byte each
Any Sector can be erased individually
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
Latch-up protected to 100mA from -1V to Vcc +1V
Low Vcc write inhibit is from 1.5V to 2.5V
Performance
12
High Performance
Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock
(30pF + 1TTL Load)
Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and
2s(max.)/chip(512Kb)
Low Power Consumption
Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and
4mA(max.) at 33MHz
Low active programming current: 15mA (max.)
Low active erase current: 15mA (max.)
Low standby current: 10uA (max.)
Deep power-down mode 1uA (typical)
Minimum 100,000 erase/program cycles
Software Features
Input Data Format
1-byte Command code
Block Lock protection
The BP0~BP1 status bit defines the size of the area to be software protected against
Program and Erase instructions.
Auto Erase and Auto Program Algorithm
Automatically erases and verifies data at selected sector
Automatically programs and verifies data at selected page by an internal algorithm
that automatically times the program pulse widths (Any page to be programed should
have page in the erased state first)
Status Register Feature
Electronic Identification
JEDEC 2-byte Device ID
RES command, 1-byte Device ID
Hardware Features
SCLK Input
Serial clock input
SI Input
Serial Data Input
SO Output
Serial Data Output
WP# pin
Hardware write protection
HOLD# pin pause the chip without diselecting the chip
PACKAGE
8-pin SOP (150mil)
All Pb-free devices are RoHS Compliant
13
8. 16MX16 BIT SYNCHRONOUS DRAM (SDRAM)

The EM63A165 SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits.
It is internally configured as 4 Banks of 2M word x 16 DRAM with a synchronous interface
(all signals are registered on the positive edge of the clock signal, CLK). Read and write
accesses to the SDRAM are burst oriented; accesses start at a selected location and continue
for a programmed number of locations in a programmed sequence. Accesses begin with the
registration of a BankActivate command which is then followed by a Read or Write
command. The EM63A165 provides for programmable Read or Write burst lengths of 1, 2, 4,
8, or full page, with a burst termination option. An auto precharge function may be enabled to
provide a self-timed row precharge that is initiated at the end of the burst sequence. The
refresh functions, either Auto or Self Refresh are easy to use. By having a programmable
mode register, the system can choose the most suitable modes to maximize its performance.
These devices are well suited for applications requiring high memory bandwidth and
particularly well suited to high performance PC applications.
8.2 Features
Fast access time from clock: 5/5.4 ns
Fast clock rate: 166/143 MHz
Fully synchronous operation
Internal pipelined architecture
4M word x 16-bit x 4-bank
Programmable Mode registers
- CAS Latency: 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst stop function
Auto Refresh and Self Refresh
8192 refresh cycles/64ms
CKE power down mode
Single +3.3V power supply
Interface: LVTTL
54-pin 400 mil plastic TSOP II package
- Pb free and Halogen free
9. SAW FILTER
9.1 IF Filter for Audio Applications Epcos K9656M
9.1.1 Standarts
B/G
D/K
I
L/L
14
9.1.2 Features
TV IF audio filter with two channels

Channel 1 (L) with one pass band for sound carriers at 40,40 MHz (L) and 39,75
MHz (L- NICAM)
Channel 2 (B/G,D/K,L,I) with one pass band for sound carriers between 32,35 MHz
and 33,40 MHz
9.1.3 Pin Configuration

1 Input
2 Switching input
3 Chip carrier - ground
4 Output
5 Output
9.1.4 Frequency Response

Frequency Response of Channel 1:
Frequency Response of Channel 2:
15
9.2 IF Filter for Video Applications Epcos K3958M

9.2.1 Standarts
B/G
D/K
I
L/L
9.2.2 Features
TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz

Constant group delay
9.2.3 Pin Configuration

1 Input
2 Input - ground
3 Chip - carrier ground
4 Output
5 Output
16
9.2.4 Frequency Response
10. POWER STAGE

The DC voltages required at various parts of the chassis and inverters are provided by an
external power supply unit or produced on the chassis if an adapter is used for the supply. The
12V dc voltage is switched by IRF 7314 power mosfet in TV sets with mechanical switch to
produce the required standby voltage. Also regulators and mosfets generate 1.8V, 3.3V and
5V and 1.26V voltages for other different parts of the chassis.
17
11. IC SPECIFICATIONS
11.1 32K Smart Serial EEPROM 24C32
General Description
The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable
PROM. This device has been developed for advanced, low power applications such as
personal communications or data acquisition. The 24C32 features an input cache for fast write
loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block
of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of
both random and sequential reads up to the 32K boundary. Functional address lines allow up
to eight 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS
technology makes this device ideal for low-power non-volatile code and data applications.
The 24C32 is available in the standard 8-pin plastic DIP and 8-pin surface mount SOIC
package.
Features
Voltage operating range: 4.5V to 5.5V
Peak write current 3 mA at 5.5V
Maximum read current 150 A at 5.5V
Standby current 1 A typical
Industry standard two-wire bus protocol, I2C compatible
Including 100 kHz and 400 kHz modes
Self-timed write cycle (including auto-erase)
Power on/off data protection circuitry
Endurance: 10,000,000 Erase/Write cycles guaranteed for High Endurance
Block, 1,000,000 E/W cycles guaranteed for Standard Endurance Block
8 byte page, or byte modes available
1 page x 8 line input cache (64 bytes) for fast write loads
Schmitt trigger, filtered inputs for noise suppression
Output slope control to eliminate ground bounce
2 ms typical write cycle time, byte or page
Up to 8 chips may be connected to the same bus for up to 256K bits total
memory
Electrostatic discharge protection > 4000V
Data retention > 200 years
8-pin PDIP/SOIC packages
Temperature ranges: Commercial (C): 0C to +70C, Industrial (I): -40C to
+85C
18
Pin Configuration
11.2 TL062
General Description
Low-power JFET-input operational amplifier
Features
Very Low Power Consumption

Typical Supply Current . . . 200 A (Per Amplifier)
Wide Common-Mode and Differential Voltage Ranges
Low Input Bias and Offset Currents
Common-Mode Input Voltage Range Includes VCC+
Output Short-Circuit Protection
High Input Impedance . . . JFET-Input Stage
Internal Frequency Compensation
Latch-Up-Free Operation
High Slew Rate . . . 3.5 V/s Typ
19
Pin Configuration
11.3 PI5V330
General Description
Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the
Company.s advanced CMOS low-power technology, achieving industry leading performance.
The PI5V330 is a true bidirectional Quad 2-channel multiplexer/demultiplexer that is
recommended for both RGB and composite video switching applications. The VideoSwitch.
can be driven from a current output RAMDAC or voltage output composite video source.
Low ON-resistance and wide bandwidth make it ideal for video and other applications. Also
this device has exceptionally high current capability which is far greater than most analog
switches offered today. A single 5V supply is all that is required for operation. The PI5V330
offers a high-performance, low-cost solution to switch between video sources. The application
section describes the PI5V330 replacing the HC4053 multiplier and buffer/amplifier.
Features
High-performance, low-cost solution to switch between video sources
Wide bandwidth: 200 MHz
Low ON-resistance: 3
Low crosstalk at 10 MHz: .58 dB
Ultra-low quiescent power (0.1 A typical)
Single supply operation: +5.0V
Fast switching: 10 ns
High-current output: 100 mA
Packages available:
16-pin 300-mil wide plastic SOIC (S)
16-pin 150-mil wide plastic SOIC (W)
16-pin 150-mil wide plastic QSOP (Q)
20
Pin Configuration
11.4 74HCT4053
General Description
The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible
with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The
74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common
enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0
and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one
of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all
switches are in the high-impedance OFF-state, independent of S1 to S3. VCC and GND are
the supply voltage pins for the digital control inputs (S1 to S3 and E). The VCC to GND
ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for 74HCT4053. The analog
inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit and VEE as
a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
Features
Low ON resistance:
80 W (typical) at VCC - VEE = 4.5 V
Logic level translation:
To enable 5 V logic to communicate with 5 V analog signals
Typical break before make built in
Complies with JEDEC standard no. 7A
ESD protection: HBM EIA/JESD22-A114-C exceeds 2000 V, MM EIA/JESD22A115-A exceeds 200 V
Multiple package options
Specified from -40 C to +85 C and from -40 C to +125 C
21
Pin Configuration
11.5 FMS6145
General Description
The FMS6145 Low-Cost Video Filter (LCVF) is intended to replace passive LC lters and
drivers with a low-cost integrated device. Five 4th-order lters provide improved image
quality compared to typical 2nd or 3rd-order passive solutions. The FMS6145 may be directly
driven by a DC-coupled DAC output or an AC-coupled signal. Internal diode clamps and bias
circuitry may be used if AC-coupled inputs are required. The outputs can drive AC- or DCcoupled single (150) or dual (75) loads. DC coupling the outputs removes the need for
output coupling capacitors. The input DC levels are offset approximately +280mV at the
output.
Features
Five 4th-order 8MHz (SD) lters
Drives single,AC- or DC-coupled, video loads (2Vpp, 150)
Drives dual, AC- or DC-coupled, video loads (2Vpp, 75)
Transparent input clamping
AC- or DC-coupled inputs
AC- or DC-coupled outputs
DC-coupled outputs eliminate AC-coupling capacitors
5V only
Robust 8kV ESD protection
Lead-free TSSOP-14 package
22
Pin Configuration
11.6 LM1117
General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of
load current. It has the same pin-out as National Semiconductors industry standard LM317.
The LM1117 is available in an adjustable version, which can set the output voltage from
1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed
voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal
shutdown. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage
accuracy to within 1%. The LM1117 series is available in SOT- 223, TO-220, and TO-252
D-PAK packages. A minimum of 10F tantalum capacitor is required at the output to improve
the transient response and stability.
Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
LM1117 0C to 125C
LM1117I -40C to 125C
23
Pin Configuration
11.7 ST24LC21
Description
The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM),
organized by 8 Bits.This device can operate in two modes: Transmit Only mode and I2C
bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data
clocked out from the rising edge of the signal applied on VCLK. The device will switch to the
I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. The
ST24LC21 cannot switch from the I2C bidirectional mode to the Transmit Only mode (except
when the power supply is removed). The device operates with a power supply value as low as
2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.
Features
1 Mllon Erase/Wrte Cycles
40 Years Data Retenton
2.5v To 5.5v Sngle Supply Voltage
400k Hz Compatblty Over The Full
Range Of Supply Voltage
Two Wre Seral Interface I2c Bus
Compatble
Page Wrte (Up To 8 Bytes)
Byte, Random And Sequental Read
Modes
Self Tmed Programmng Cycle
Automatc Address Incrementng
Enhanced Esd/Latch Up
Performances
24
Pin Configuration
11.8 24LC02
Description
The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically
Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire
serial interface. Low-voltage design permits operation down to 1.8V, with standby and active
currents of only 1 A and 1 mA, respectively. The 24XX02 also has a page write capability
for up to 8 bytes of data. The 24XX02 is available in the standard 8-pin PDIP, surface mount
OIC, TSSOP and MSOP packages and is also available in the 5-lead SOT-23 package.
Features
Single supply with operation down to 1.8V
Low-power CMOS technology
- 1 mA active current typical
- 1A standby current typical (I-temp)
Organized as 1 block of 256 bytes (1 x 256 x 8)
2-wire serial interface bus, I2C compatible
Schmitt Trigger inputs for noise suppression
Output slope control to eliminate ground bounce
100 kHz (24AA02) and 400 kHz (24LC02B) compatibility
Self-timed write cycle (including auto-erase)
Page write buffer for up to 8 bytes
2 ms typical write cycle time for page write
Hardware write-protect for entire memory
Can be operated as a serial ROM
Factory programming (QTP) available
ESD protection > 4,000V
1,000,000 erase/write cycles
Data retention > 200 years
8-lead PDIP, SOIC, TSSOP and MSOP packages
5-lead SOT-23 package
Pb-free finish available
Available for extended temperature ranges:
25
- Industrial (I): -40C to +85C

- Automotive (E): -40C to +125C
Pin Configuration
11.9 MAX810
General Description
The MAX809 and MAX810 are cost-effective system supervisor circuits designed to monitor
VCC in digital systems and provide a reset signal to the host processor when necessary. No
external components are required. The reset output is driven active within 10 _sec of VCC
falling through the reset voltage threshold. Reset is maintained active for a timeout period
which is trimmed by the factory after VCC rises above the reset threshold. The MAX810 has
an active-high RESET output while the MAX809 has an active-low RESET output. Both
devices are available in SOT-23 and SC-70 packages. The MAX809/810 are optimized to
reject fast transient glitches on the VCC line. Low supply current of 0.5 _A (VCC = 3.2 V)
makes these devices suitable for battery powered applications.
Features
Precision VCC Monitor for 1.5 V, 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies
Precision Monitoring Voltages from 1.2 V to 4.9 V Available in 100 mV Steps
Four Guaranteed Minimum Power-On Reset Pulse Width Available (1 ms, 20 ms, 100
ms, and 140 ms)
RESET Output Guaranteed to VCC = 1.0 V.
Low Supply Current
Compatible with Hot Plug Applications
VCC Transient Immunity
No External Components
Wide Operating Temperature: -40C to 105C
Pb-Free Packages are Available
26
Pin Configuration
11.10 TDA1308
Description
The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a
DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been
primarily developed for portable digital audio applications.
Features
Operating temperature range: -40 to +85 C
No switch ON/OFF clicks
Short-circuit resistant
signal-to-noise ratio: 110 dB
total harmonic distortion: 0.001 %
Pin Configuration
11.11 MP1583
General Description
The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves 3A
continuous output current over a wide input supply range with excellent load and line
regulation. Current mode operation provides fast transient response and eases loop
stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal
27
shutdown. Adjustable soft-start reduces the stress on the input source at turn-on. In shutdown
mode the regulator draws 20A of supply current.
The MP1583 requires a minimum number of readily available external components to
complete a 3A step down DC to DC converter solution.
Features
3A Output Current
Programmable Soft-Start
100m Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic Capacitors
Up to 95% Efficiency
20A Shutdown Mode
Fixed 385KHz frequency
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Wide 4.75 to 23V operating Input Range
Output Adjustable From 1.22 to 21V
Under Voltage Lockout
Available in 8 pin SOIC Package
3A Evaluation Board Available
Pin Configuration
28
11.12 MP2112
General Description
The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter. The
device integrates a main switch and a synchronous rectifier for high efficiency without an
external Schottky diode. It is ideal for powering portable equipment that powered by a single
cell Lithium-Ion (Li+) battery. The MP2112 can supply 1A of load current from a 2.5V to 6V
input voltage. The output voltage can be regulated as low as 0.6V. The MP2112 can also run
at 100% duty cycle for low dropout applications.
The MP2112 is available in a space-saving 6-pin QFN package.
Features
High Efficiency: Up to 95%
1MHz Constant Switching Frequency
1A Available Load Current
2.5V to 6V Input Voltage Range
Output Voltage as Low as 0.6V
100% Duty Cycle in Dropout
Current Mode Control
Short Circuit Protection
Thermal Fault Protection
<0.1A Shutdown Current
Space Saving 3mm x 3mm QFN6 Package
Pin Configuration
11.13 IRF7314
General Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit, combined
with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely efficient and reliable device for
use in a wide variety of applications. The SO-8 has been modified through a customized
leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a
variety of power applications. With these improvements, multiple devices can be used in an
application with dramatically reduced board space. The package is designed for vapor phase,
infra red, or wave soldering techniques.
29
Pin Configuration
12. SERVICE MENU SETTINGS

In order to reach service menu, First Press MENU Then press the remote control
code, which is 4725. In DTV mode, first press MENU and select TV SETUP.
Then, press 4725.
12.1. Video Setup

Panel Info <..................................>
32_LC_SAC1
Blue Background <.....>
If Menu selected, Blue Background item is seen in Feature
menu.
If Yes selected, Blue Background is on and not seen in
Feature menu
Film Mode <.....>
If Yes selected, Film Mode feature is active.
Dynamic Contrast <.....>
If Yes selected, Dynamic Contrast feature is active.
Game Mode <...........>
If Yes selected, Game Mode feature is active
SRGB For PC <...........>
If Yes selected, PCs can use SRGB option.
Dynamic Noise Reduction<...........>
If Yes selected, Dynamic Noise Reduction feature is active
WSS Option<...........>
If Yes selected, WSS Option can be used
12.2. AudioSetup
BG<.....>
Europe
30
New Zelland
Australia
No
DK<.....>
I<.....>
L<.....>
Equalizer <.....>
If Yes selected, Equalizer item is seen in Sound menu.
Headphone <.....>
If Yes selected, Headphone item is seen in Sound menu.
Power On/Off Melody <.....>
If Yes selected, when power on/off conditions, the power on/off
melody can be heard.
Dynamic Bass <.....>Value between 0 to 12
Effect<.....> Value between 0 to 7
Audio Delay ,offset <.....> Value between 0 to 190
Audio Setup Cont...2
Carrier mute<.......> Value between 0 to 28
Headphone Sound Select <.......>
Always Active Select
Always Inactive Select
Menu
Always Main Menu
Always PIP/PAP Window
Sound Mode Detect Time <.......> Value between 0 to 255
Noise Reduction Threshold <.......> Value between 0 to 255
Noise Reduction Time <.......> Value between 0 to 15
AVL Attack Time <.......> Value between 0 to 255
AVL Release Time <.......> Value between 0 to 255
Prescales ( AVL On)
FM Prescale<.......> Value between 0 to 255
AM Prescale <.......> Value between 0 to 255
NICAM Prescale <.......> Value between 0 to 255
SCART Prescale <.......> Value between 0 to 255
FAV Prescale <.......> Value between 0 to 255
DTV Prescale <.......> Value between 0 to 255
HDMI Prescale <.......> Value between 0 to 255
YPbPr/PC Prescale <.......> Value between 0 to 255
An. USB Prescale <.......> Value between 0 to 255
Dig. USB Prescale <.......> Value between 0 to 255
Prescales ( AVL Off)

Clipping Levels ( AVL On)
FM Clipping <.......> Value between 0 to 255
AM Clipping <.......> Value between 0 to 255
NICAM Clipping <.......> Value between 0 to 255
SCART Clipping <.......> Value between 0 to 255
FAV Clipping <.......> Value between 0 to 255
DTV Clipping <.......> Value between 0 to 255
HDMI Clipping <.......> Value between 0 to 255
YPbPr/PC Clipping <.......> Value between 0 to 255
An. USB Clipping <.......> Value between 0 to 255
Dig. USB Clipping <.......> Value between 0 to 255
Clipping Levels ( AVL Off)
12.3. Service Scan/Tuning Setup

First Search for L/L <.......>
ATS Delay Time (ms) <.......> Value between 0 to +200
Main Tuner Setup
Tuner Type
LC_TDTC_GXX1D
Thomson DTT7543X
Philips TD1318AF-3
Samsung DTOs403LH172A
Generic ( Analog Only)
Control Byte <.......> Value between 0 to +255
BSW1 <.......> Value between 0 to +255
Low-Mid Low Byte <.......>
Low-Mid High Byte <.......>
Mid-High Low Byte <.......>
Mid-High High Byte <.......>
S Band TOP <.......>
VIF TOP <.......> Value between 0 to +15
VIF TOP SECAM <.......> Value between 0 to +15
VIF TOP DK<.......> Value between 0 to +15
Synch Threshold<.......> Value between 0 to +40
16.4. Options
Options-1
Power Up
Standby
Last state
TV Open Mode
Source
1st TV
Last Tv
First APS <.......>
If Yes selected, first time TV opens by asking APS.
APS Volume <.......> Value between 0 to +63
Burn In Mode <.......>
If Yes selected, TV opens with Burn-In mode. This mode is
used in manufacturing.
APS Test
Autostore <.......>
If Yes selected, Channel is automatically stored.
Unicode Enabled <.......>
If Yes selected,Unicode characters can be read in the USB
Files.
Options-2
Source List menu <.......>
If Yes selected, Sorce List Menu appears on the screen
when press source button.
RS232 for B2B <.......>
If Yes selected, Remote Control commandsthe TV via
RS232 and vice versa.
RC Select <.......>
RC Group 1
RC Group 2
RC Group 3
RC Group 4
RC Group 5
RC Group 6
Double Digit Key <.......>
If Yes selected, Double Digit Button on RC activates.
Protection <.......>
If Yes selected,short circuit protection activates.
Led Type <.......>
1 Led 1 Color
1 Led 2 Color
2 Led 2 Color
1 Led 3 Color
2 Led 3 Color
200 Programme <.......>
If Yes selected, totaly 200 programmes can be used.
TouchPad <.......>
If Yes selected, TouchPad can be used.
Teletext Options
TXT Darkness <.......> Value between 0 to +63
TXT Type <.......>
Fasttext&Toptext
No
Default
Fastext
Toptext
TXT Language <.......>
Menu
West
East
Cyrillic
Turk/Gre
Arabic
Persian
Auto
No Txt Warning <.......>
If Yes selected, No Txt Transmission warning appears on
the screen when pressing txt button from RC.
Txt Subtitle <.......>
If Yes selected, Teletext subtitles can be seen.
Optional Features
Default Zoom <.......>
Menu
16:9
4:3
Panaromic
14:9 Zoom
Menu Timeout <.......>
Menu
15 Sec
30 Sec
60 Sec
No Time
Backlight <.......>
If Yes selected, Backlight feature is active.
100 Step Slider <.......>
If Yes selected, 64 step sliders will become 100 step sliders.
Analog USB Enabled <.......>
If Yes selected, Analog USB option is active.
Menu Double Size <.......>
If Yes selected, menu sizes increases.
CEC Enable <.......>
If Yes selected, CEC feature is active.
Digital USB Hotplug <.......>
If Yes selected, Digital USB Hotplug feature is active.
PIP Options
Pip <......>
AV PIP
No PIP
PC PIP
Hotel Options <......>
Hotel TV <......>
If Yes selected, Hotel TV feature is active.
IR Smartloader <......>
If Yes selected, IR Smartloader feature is active.
16.5. External Source Settings

TV <.......>
DTV <.......>
Ext 2 <.......>
Ext 2 S <.......>
FAV <.......>
BAV <.......>
S-Video <.......>
HDMI 1 <.......>
HDMI 2 <.......>
HDMI 3 <.......>
HDMI 4 <.......>
YPbPr <.......>
PC <.......>
16.6. Preset
User Ad.j
ADC Adj.
Service Adj.
All Adj.
Init Factory Channels.
16.7. NVM Edit

NVM-edit addr. (hex)
NVM-edit data (hex)
NVM-data dec
16.8. Programming
HDMI DDC Update Mode <.......>
HDCP Key Update Mode <.......>
Software Bypass <.......>
If On selected, speaker effects are bypassed.
LVDS Clock Step <.......> Value between 0 to +255
Memory Clock Step <.......> Value between 0 to +255
DTV Download <.......>
If On selected, DTV software can be updated from SCART.
DSUB9 Download <.......>

If On selected, DTV software can be updated from DSUB9.
16.9. Diagnostic
Eeprom I2C
Tuner I2C
IF I2C
HDMI I2C
DTV RS232
16.10.
Product Info
13. SOFTWARE UPDATE DESCRIPTION

13.1 17MB25 Analog Part Software Update With Bootloader Procedure
1.1 The File Types Used By The Bootloader
All file types that used by the bootloader software are listed below:
1. The Binary File : It has .bin extension and it is the tv application. Its size is 1920
Kb.
2. The Config Binary File : It has .cin extension and it is the config of the tv
application. Its size may be 64 Kb or a few times 64 Kb.
3. The Test Script File : It has .txt extension and it is the test script that is parsed
and executed by the bootloader. It dont have to be any times of 64 Kb.
4. The Test Binary File : It has .tin extension and it is used and written by the test
groups. It is run to understand the problem part of the hardware.
Alltough a file that is used by the bootloader can be had any one of these extensions, its
name has to be VESTEL_S and it has to be located in the root directory of the usb
device.
1.2 Usage of The Bootloader
1. The starting to pass through : The chassis is only powered up.
2. The starting to download something : When chassis is powered up the menu key has
to be pushed.Before the chassis is powered up and if any usb device is plugged to the
usb port, the programme is downloaded from usb firstly.
Any usb device is plugged to usb port , user must open hyperterminal in the pc and
connect pc to chassis via Mstar debug tool and any one of scart,dsub9 or I2c
connectors. Serial connection settings are listed below:
-
Bit per second: 115200

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
In this case the bootloader sofware puts C character to uart. After repeating C
characters are seen in the hyperterminal user can send any file to chassis by selecting
Transfer -> Send File menu item and choosing 1K Xmodem from protocol section.
Figure 1. The Sample Output Before Sending The File
2. EEProm update
To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used.
Serial connection settings are listed below:
-

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
Programming menu item is choosed in the service menu and switch HDCP Key Update
Mode from off to on.
Figure 2. The Programming Service Menu

After then you must see Xmodem menu in the hyperterminal.To download hdcp key
press k or to download eeprom content press w.
Figure 3. Xmodem Menu

If the repeated C characters are seen you can transfer file content via select Transfer>Send File and choose Xmodem protocol and click the Send button.
Figure 4. The Starting To Send
16.2 17MB25 HDCP key upload procedure.

1) Turn on TV set.
2) Open a COM connection using fallowing parameters and select ISP COM Port
No
Baud Rate: 9600 bps
Data Bits: 8
Stop Bits: 1
Parity: None
Flow Control: None
3) Enter service menu by pressing 4 7 2 5 consecutively while main menu is
open
4) Select 9. Programming
5) Select HDMI HDCP Update Mode yes.
6) On Hyper Terminal Window press k
7) Click on send file under Transfer Tab.
8) Select Xmodem and choose the HDCP key to be uploaded.
9) Press send button
10)Restart TV set
13.3 17MB25 Digital Software Update From SCART

Adjusting DTV Download Mode:
1. Power on the TV.
2. Exit the Stby Mode.
3. Enter the Tv Menu.
4. Enter 4725 for jumping to Service Settings.
5. Select 8. Programming step.
6. Change 6. DTV Download to On.
7. Switch to the Stby mode.
Adjusting HyperTerminal:
1. Connect the MB25 SCART Interface to SCART1 (bottom SCART plug).
2. Also connect the MB25 SCART Interface to PC.
3. Open HyperTerminal.
4. Determine the COM settings listed and showed below.
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
COM Properties Window
6. Click OK.
Software Updating Procedure

1. In the HyperTerminal Menu, click the Connect button.
3. The Space button on the keyboard must be pressed, when the following window can
be seen.
Selection Window
4. Press the 2 button on the keyboard for choosing 2. Upgrade Application with
Xmodem.
5. Repeating C characters are seen in the HyperTerminal menu.
The Sample Output Before Sending The File
6. Click the Send button on the HyperTerminal

7. Select the Filename xxxx_slot1.img using Browse.
8. Choose the 1K Xmodem from Protocol option.
Selection of File
File and Protocol Selection Window
Note: In the Software updating Procedure section, when the first C character is seen,
the filename selection process must be finished before 10 seconds. If the process can
not be finished, the file sending operation will be cancelled. The following figure shows
this situation.
Capture of Receving Data Failing
9. When sending the file the following window must be seen.
Capture of Sending Process
10. After the sending process the following HyperTerminal window must be seen.
Capture of End of The Sending Process
11. For sending second program file, the Software Updating Procedure must be
repeated from the step X. Select the Filename xxxx_slot2.img using Browse.
12. After sending the second program file, the Software Updating Procedure will be
succesful.
Note: After the File Sending Process,
1. Upgrade Application with FUM
2. Upgrade Application with Xmodem, options must be seen.
End of The Sending Process
Checking Of The New Software

1. Turn off and on the TV.
2. Enter the Setup submenu in the DTV Menu.
3. Choose the Configuration option.
4. For controlling new software, check the Receiver Upgrade option.
13.4 17MB25 Digital Software Update From USB

Software upgrade is possible via USB disk by folowing the steps below.
1. Copy the bin file, including higher version than the software loaded in flash, into
the USB flash memory root directory. This file should be named up.bin.
2. Insert the USB disk.
3. Digital module performs version and CRC check. If version and CRC check is
successful, then a message prompt appears to notify user about new version. If
the user confirms loading of new version, upgrade.bin file is written into flash
unused slot.
4. Digital module disables the previous software in the flash and then a system
reset is performed.
5. After the reset, digital module starts with new software.
Revert operation:
With revert operation, it is possible to downgrade the software.
Revert operation is very similar to upgrade process. In the revert operation, file name
should be f_up.bin. Also user confirmation is not asked.
1. Copy the bin file into the USB flash memory root directory. This file should be
named force_upgrade.bin.
3. A lower version than the software in flash can be loaded with revert operation.
Digital module performs only CRC check. If CRC check is successful, then
force_upgrade.bin file is written into flash unused slot.
4. Digital module disables the previous software in the flash.
5. A message prompt is displayed to notify user about end of revert process.
6. Power off/on is required to start digital module with the new software.
For controlling new software, check the Receiver Upgrade option.
New Zelland
Australia
No
DK<.....>
I<.....>
L<.....>
Equalizer <.....>
If Yes selected, Equalizer item is seen in Sound menu.
Headphone <.....>
If Yes selected, Headphone item is seen in Sound menu.
Power On/Off Melody <.....>
If Yes selected, when power on/off conditions, the power on/off
melody can be heard.
Dynamic Bass <.....>Value between 0 to 12
Effect<.....> Value between 0 to 7
Audio Delay ,offset <.....> Value between 0 to 190
Audio Setup Cont...2
Carrier mute<.......> Value between 0 to 28
Headphone Sound Select <.......>
Always Active Select
Always Inactive Select
Menu
Always Main Menu
Always PIP/PAP Window
Sound Mode Detect Time <.......> Value between 0 to 255
Noise Reduction Threshold <.......> Value between 0 to 255
Noise Reduction Time <.......> Value between 0 to 15
AVL Attack Time <.......> Value between 0 to 255
AVL Release Time <.......> Value between 0 to 255
Prescales ( AVL On)
Prescales ( AVL Off)

Clipping Levels ( AVL On)
Clipping Levels ( AVL Off)
16.3. Service Scan/Tuning Setup

First Search for L/L <.......>
ATS Delay Time (ms) <.......> Value between 0 to +200
Main Tuner Setup
Tuner Type
LC_TDTC_GXX1D
Thomson DTT7543X
Philips TD1318AF-3
Samsung DTOs403LH172A
Generic ( Analog Only)
Control Byte <.......> Value between 0 to +255
Low-Mid Low Byte <.......>
Low-Mid High Byte <.......>
Mid-High Low Byte <.......>
Mid-High High Byte <.......>
S Band TOP <.......>
VIF TOP <.......> Value between 0 to +15
VIF TOP SECAM <.......> Value between 0 to +15
VIF TOP DK<.......> Value between 0 to +15
Synch Threshold<.......> Value between 0 to +40
16.4. Options
Options-1
Power Up
Standby
Last state
TV Open Mode
Source
1st TV
Last Tv
First APS <.......>
If Yes selected, first time TV opens by asking APS.
APS Volume <.......> Value between 0 to +63
Burn In Mode <.......>
If Yes selected, TV opens with Burn-In mode. This mode is
used in manufacturing.
APS Test
Autostore <.......>
If Yes selected, Channel is automatically stored.
Unicode Enabled <.......>
If Yes selected,Unicode characters can be read in the USB
Files.
Options-2
Source List menu <.......>
If Yes selected, Sorce List Menu appears on the screen
when press source button.
RS232 for B2B <.......>
If Yes selected, Remote Control commandsthe TV via
RS232 and vice versa.
RC Select <.......>
RC Group 1
RC Group 2
RC Group 3
RC Group 4
RC Group 5
RC Group 6
Double Digit Key <.......>
If Yes selected, Double Digit Button on RC activates.
Protection <.......>
If Yes selected,short circuit protection activates.
Led Type <.......>
1 Led 1 Color
1 Led 2 Color
2 Led 2 Color
1 Led 3 Color
2 Led 3 Color
200 Programme <.......>
If Yes selected, totaly 200 programmes can be used.
TouchPad <.......>
If Yes selected, TouchPad can be used.
Teletext Options
TXT Darkness <.......> Value between 0 to +63
TXT Type <.......>
Fasttext&Toptext
No
Default
Fastext
Toptext
TXT Language <.......>
Menu
West
East
Cyrillic
Turk/Gre
Arabic
Persian
Auto
No Txt Warning <.......>
If Yes selected, No Txt Transmission warning appears on
the screen when pressing txt button from RC.
Txt Subtitle <.......>
If Yes selected, Teletext subtitles can be seen.
Optional Features
Default Zoom <.......>
Menu
16:9
4:3
Panaromic
14:9 Zoom
Menu Timeout <.......>
Menu
15 Sec
30 Sec
60 Sec
No Time
Backlight <.......>
If Yes selected, Backlight feature is active.
100 Step Slider <.......>
If Yes selected, 64 step sliders will become 100 step sliders.
Analog USB Enabled <.......>
If Yes selected, Analog USB option is active.
Menu Double Size <.......>
If Yes selected, menu sizes increases.
CEC Enable <.......>
If Yes selected, CEC feature is active.
Digital USB Hotplug <.......>
If Yes selected, Digital USB Hotplug feature is active.
PIP Options
Pip <......>
AV PIP
No PIP
PC PIP
Hotel Options <......>
Hotel TV <......>
If Yes selected, Hotel TV feature is active.
IR Smartloader <......>
If Yes selected, IR Smartloader feature is active.
16.5. External Source Settings

TV <.......>
DTV <.......>
Ext 2 <.......>
Ext 2 S <.......>
FAV <.......>
BAV <.......>
S-Video <.......>
HDMI 1 <.......>
HDMI 2 <.......>
HDMI 3 <.......>
HDMI 4 <.......>
YPbPr <.......>
PC <.......>
16.6. Preset
User Ad.j
ADC Adj.
Service Adj.
All Adj.
Init Factory Channels.
16.7. NVM Edit

NVM-edit addr. (hex)
NVM-edit data (hex)
NVM-data dec
16.8. Programming
HDMI DDC Update Mode <.......>
HDCP Key Update Mode <.......>
Software Bypass <.......>
If On selected, speaker effects are bypassed.
LVDS Clock Step <.......> Value between 0 to +255
Memory Clock Step <.......> Value between 0 to +255
DTV Download <.......>
If On selected, DTV software can be updated from SCART.
DSUB9 Download <.......>

If On selected, DTV software can be updated from DSUB9.
16.9. Diagnostic
Eeprom I2C
Tuner I2C
IF I2C
HDMI I2C
DTV RS232
16.10.
Product Info
17. SOFTWARE UPDATE DESCRIPTION

16.1 17MB25 Analog Part Software Update With Bootloader Procedure
1.1 The File Types Used By The Bootloader
All file types that used by the bootloader software are listed below:
1. The Binary File : It has .bin extension and it is the tv application. Its size is 1920
Kb.
2. The Config Binary File : It has .cin extension and it is the config of the tv
application. Its size may be 64 Kb or a few times 64 Kb.
3. The Test Script File : It has .txt extension and it is the test script that is parsed
and executed by the bootloader. It dont have to be any times of 64 Kb.
4. The Test Binary File : It has .tin extension and it is used and written by the test
groups. It is run to understand the problem part of the hardware.
Alltough a file that is used by the bootloader can be had any one of these extensions, its
name has to be VESTEL_S and it has to be located in the root directory of the usb
device.
1.2 Usage of The Bootloader
1. The starting to pass through : The chassis is only powered up.
2. The starting to download something : When chassis is powered up the menu key has
to be pushed.Before the chassis is powered up and if any usb device is plugged to the
usb port, the programme is downloaded from usb firstly.
Any usb device is plugged to usb port , user must open hyperterminal in the pc and
connect pc to chassis via Mstar debug tool and any one of scart,dsub9 or I2c
connectors. Serial connection settings are listed below:
-

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
In this case the bootloader sofware puts C character to uart. After repeating C
characters are seen in the hyperterminal user can send any file to chassis by selecting
Transfer -> Send File menu item and choosing 1K Xmodem from protocol section.
Figure 1. The Sample Output Before Sending The File
2. EEProm update
To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used.
Serial connection settings are listed below:
-

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
Programming menu item is choosed in the service menu and switch HDCP Key Update
Mode from off to on.
Figure 2. The Programming Service Menu

After then you must see Xmodem menu in the hyperterminal.To download hdcp key
press k or to download eeprom content press w.
Figure 3. Xmodem Menu

If the repeated C characters are seen you can transfer file content via select Transfer>Send File and choose Xmodem protocol and click the Send button.
Figure 4. The Starting To Send
16.2 17MB25 HDCP key upload procedure.

1) Turn on TV set.
2) Open a COM connection using fallowing parameters and select ISP COM Port
No
Baud Rate: 9600 bps
Data Bits: 8
Stop Bits: 1
Parity: None
Flow Control: None
3) Enter service menu by pressing 4 7 2 5 consecutively while main menu is
open
4) Select 9. Programming
5) Select HDMI HDCP Update Mode yes.
6) On Hyper Terminal Window press k
7) Click on send file under Transfer Tab.
8) Select Xmodem and choose the HDCP key to be uploaded.
9) Press send button
10)Restart TV set
16.3 17MB25 Digital Software Update From SCART

Adjusting DTV Download Mode:
1. Power on the TV.
3. Enter the Tv Menu.
4. Enter 4725 for jumping to Service Settings.
5. Select 8. Programming step.
6. Change 6. DTV Download to On.
7. Switch to the Stby mode.
Adjusting HyperTerminal:
1. Connect the MB25 SCART Interface to SCART1 (bottom SCART plug).
2. Also connect the MB25 SCART Interface to PC.
3. Open HyperTerminal.
4. Determine the COM settings listed and showed below.
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
COM Properties Window
6. Click OK.
Software Updating Procedure

1. In the HyperTerminal Menu, click the Connect button.
3. The Space button on the keyboard must be pressed, when the following window can
be seen.
Selection Window
4. Press the 2 button on the keyboard for choosing 2. Upgrade Application with
Xmodem.
5. Repeating C characters are seen in the HyperTerminal menu.
The Sample Output Before Sending The File
6. Click the Send button on the HyperTerminal

7. Select the Filename xxxx_slot1.img using Browse.
8. Choose the 1K Xmodem from Protocol option.
Selection of File
File and Protocol Selection Window
Note: In the Software updating Procedure section, when the first C character is seen,
the filename selection process must be finished before 10 seconds. If the process can
not be finished, the file sending operation will be cancelled. The following figure shows
this situation.
Capture of Receving Data Failing
9. When sending the file the following window must be seen.
Capture of Sending Process
10. After the sending process the following HyperTerminal window must be seen.
Capture of End of The Sending Process
11. For sending second program file, the Software Updating Procedure must be
repeated from the step X. Select the Filename xxxx_slot2.img using Browse.
12. After sending the second program file, the Software Updating Procedure will be
succesful.
Note: After the File Sending Process,
1. Upgrade Application with FUM
2. Upgrade Application with Xmodem, options must be seen.
End of The Sending Process
Checking Of The New Software

1. Turn off and on the TV.
2. Enter the Setup submenu in the DTV Menu.
3. Choose the Configuration option.
4. For controlling new software, check the Receiver Upgrade option.
16.4 17MB25 Digital Software Update From USB

Software upgrade is possible via USB disk by folowing the steps below.
1. Copy the bin file, including higher version than the software loaded in flash, into
the USB flash memory root directory. This file should be named up.bin.
3. Digital module performs version and CRC check. If version and CRC check is
successful, then a message prompt appears to notify user about new version. If
the user confirms loading of new version, upgrade.bin file is written into flash
unused slot.
4. Digital module disables the previous software in the flash and then a system
reset is performed.
5. After the reset, digital module starts with new software.
Revert operation:
With revert operation, it is possible to downgrade the software.
Revert operation is very similar to upgrade process. In the revert operation, file name
should be f_up.bin. Also user confirmation is not asked.
1. Copy the bin file into the USB flash memory root directory. This file should be
named force_upgrade.bin.
3. A lower version than the software in flash can be loaded with revert operation.
Digital module performs only CRC check. If CRC check is successful, then
force_upgrade.bin file is written into flash unused slot.
4. Digital module disables the previous software in the flash.
5. A message prompt is displayed to notify user about end of revert process.
6. Power off/on is required to start digital module with the new software.
For controlling new software, check the Receiver Upgrade option.
12. BLOCK DIAGRAMS

12.1 General Block Diagram
31
12.2 Integrated DVB-T Receiver Block Diagram
32
12.3 MSTAR Block Diagram
33
AIF
12
ANALOG_IF
DIF1
11
DIGITAL_IF_N
DIF2
10
DIGITAL_IF_P
IF_AGC
IF_AGC_DVB_IN
A
2
U123
LM1117
F116
1
8V_VCC
3 IN
330R
5V_TUN
TH101
C600
47u
16V
B2
5V_TUN
SDA_TUNER
1
1
Q102
FDN336P
ACT_ANT
R503
10k
C359
10u
10V
AND I2C SWITCH PART

B
1
S102
33V_TUNER
C532
1u
50V
ADDRESS_SEL_TUNER
BA
S104
RF_AGC
ACT_ANT
SCL_TUN
R231
3k3
1
R473
6k8
5V_TUN
Z101
C546
1 IN1
OUT1 4
K9656M
OUT2 5
2 IN2
GND
BA782
R474
6k8
10n
16V
R380
75R
D145
5V_TUN
SIFP
SIFM
C135
100n
10V
2
R252
4k7
BSN20
Q144
BF799
10n
16V
N.C.
VIFM
Z102
C547
1 IN1
OUT1 4
K3958M
OUT2 5
2 IN2
GND
R623
1k
5V_VCC
R595
22k
IDTV_SW
C467
C132
1
10u
10V
100n
WARNING!!! This part must be close to chip
10V
C363
C131
1
10u
10V
C654
220u
6V3
C133
220n
10V
C597
220p
50V
F187
1
3V3_STBY
U138
MST6WB7GQ-3
62
AVDD_MPLL
63
VR27
64
VR12
65
AVDD_RXS
66
GND_RXS
SIFP
67
SIFP
SIFM
68
SIFM
VIFM
69
VIFM
VIFP
70
VIFP
330R
100n
10V
F184
1
3V3_VCC
330R
C361
1
330R
5V_TUN
10u
10V
F185
3V3_VCC
C129
100n
10V
71
GND_RXV
72
AVDD_RXV
73
TAGC
F186
1
2
1
330R
2
C510
100n
10V
4k7
R253
T_AGC
10n
16V
2u2
N.C.
1u
1
1
Q140
2
L104
R209
100k
R210
100k
ANALOG_IF
R680
56R
SIF_CTL
R384
10R
C545
R125
47R
L111
R594
22k
R735
680R
R483
1k2
1u
L114
C520
47u
16V
R254
4k7
5V_TUN
Q116
BC848B
SDA_TUN
8V_VCC
SDA_TUN
SDA_TUN_DVB
SDA
S101
R127
47R
C587
47p
50V
1
SDA_TUNER
SCL_TUN
S103
16
15
14
13
12
11
10
9
VCC
2Z
1Z
1Y1
1Y0
S1
S2
S3
SAS
2Y1
2Y0
3Y1
3Z
3Y0
E
VEE
GND
100p
50V
SCL_TUNER
R126
47R
C586
47p
50V
1
SCL_TUNER
RF_AGC_A
1
SDA_TUNER
RF_AGC
10V
100n
C137
NEAR THE TUNER
ANALOG_IF
1
2
3
4
5
6
7
8
SCL_TUN_DVB
SCL
RF_AGC_DVB
This part must be placed near the tuner
SCL
RF_AGC
C676
SDA
74HCT4053
WARNING!!! Saw filter outputs must be close the chip
AIF_OUT
5V_TUN
100n
U115 10V
IF_AGC_DVB
N.C.
10V
100n
C136
T_AGC
IF_AGC_DVB_IN
R505
10k
100n
10V
RF_AGC_A
IF_AGC_DVB_IN
C130
33V_TUNER
1N4148
R111
12k
C448
47u
16V
+5V
5V_TUN
DIGITAL_IF_P
10u
10V
D121
IF_AGC
R624
1k
2
1
47p
50V
C675
1u
L117
TU101
DTOS403LH172A
C128
1
VT
S105
Connect if "33V Integrated Tuner" is used!
AGC
5V_VCC
10
ANT_CTRL
DIGITAL_IF_N
IFOUT+
BC848B
Q115
11
C134
100n
10V
Near Tuner
supply pin
!!!En az 1.8 cm2 altta ve stte soutma alan braklmal.
33V_TUNER
Samsung/Thomson
R460
1k
R622
1k
ACT_ANT
IFOUT-
1
2
330R
C364
ANT_PWR
R504
10k
F234
1
RF_AGC
B1
SCL_TUNER
R502
10k
TP151
SCL
R501
10k
OVER_CUR_DETECT
SDA
5V_TUN
C360
10u
10V
NC
OUT 2
VOUT
GND
2R1
5V_TUN
ADDRESS_SEL_TUNER
R482
4R7
R408
330R
AS
RF_AGC
ACTIVE ANTENNA
1
TU102 TDTC-G101D
TUNER SUPPLY OPSION
LG
A
VIFP
WARNING!!!
This part must be close to chip
VESTEL PROJECT NAME :

1
17MB25
A3
SCH NAME :ANALOG IF
SHEET:1 OF:11
DRAWN BY :NDER GEN
4-28-2008_16:47
AX M
F245
DVD CONNECTION
SC1_AUD_L_OUT
1
2
600R
F211
1
50V
1n
6
5
F212
1
BLK
RED
4
3
600R
WHT
2
1
F209
LINE_L_OUT
600R
D171
C5V6
D146
BAV70
1
1
2
C5V6
D170
2
Q117
BC848B
1
1
S216
100n
10V
R464
100R
SPDIF_OUT
F118
5V_VCC
330R
100n
10V
C229
SPDIF_OUT_COAXIAL
C627
R400
1k
C116
C5V6
COAXIAL SPDIF OUTPUT

YPBPR/PC LINE INPUT
220p
50V
LINE OUTPUT
SUBWOOFER OUTPUT
F215
YPBPR_AUD_L_IN
C480
1n
50V
D172
2
1n
50V
D158
C5V6
D159
C5V6
600R
INPUT
YPBPR_AUD_R_IN
C479
1
YPBPR
SIDE AV INPUT
2
5V_SPDIF
C366
C5V6
R804
4k7
600R
RCA_Y
10u
10V
50V
F205
1
2
WHT 1
D173
F208
1
R639
75R
600R
1n
R216 50V
100R
SPDIF_OUT_COAXIAL
C365
27p
4
RED 3
R242
4k7
JK105
6
5
75R
R638
C440
C489
F210
JK104
5V_SPDIF
600R
C115
LINE_R_OUT
2
1
SAV_AUD_L_IN
SAV_CVBS
2
1
D105 5
4
2 NUP4004M5
GRN
75R
R637
RCA_PB
C441
F204
1
4
3
27p
C488
R217
100R
600R
50V
220p
BLU
50V
600R
YLW
50V
1n
4
3
6
5
C474
3
1
WHT
RCA_PR
RED
220p
50V
RED
C113
SAV_AUD_R_IN
C442
JK101
600R
27p
2
C473
JK106
50V
D168
C5V6
D169
50V
1n
F216
F207
27p
C112
220p
50V
D114
C5V6
D113
1n
50V
S_VIDEO_Y_IN
2
INPUT
3
2
SCART1
4
1
S_VIDEO_C_IN
SC1_AUD_R_OUT
C5V6
C111
600R
R213
100R
C475
5V_VCC
C
S-VIDEO INPUT
JK102
220p
50V
5 D103
4
NUP4004M5 2
3
1
F195
1n
50V
R683
33k
SC1_AUD_R_IN
R219
100R
F194
600R
INPUT
R682
33k
VGA
5 D101
4
NUP4004M5 2
600R
3
1
VGA_R
C484
CN118
SC1_AUD_L_IN
F197
1
C478
1n
50V
VGA_G
10u
10V
600R
4
VGA_B
C5V6
R506
10k
R507
10k
R511
10k
F198
C477
C108
600R
DVD_SPDIF
R642
75R
27p
50V
100n
10V
C114
F196
1
220p
50V
50V
1n
SC1_B
R129
47R
CN111
C140
50V
220p
C15V
600R
C5V6
DVD_AUD_L_IN
50V
27p C652
50V
SC1_PIN8
R255
4k7
F246
1
D116
DVD_AUD_R_IN
6
1
R596
22k
D140
RX/SCL_SC
VGA_HSNC
75R
R643
100R
C438
27p
C651 50V
600R
VGA_VSNC
R349
1
50V
VGA_DDC_5V
SC1_G
27p
C107
DVD_IR
11
10
10u
25V
27p
50V C650
100n
10V
50V
SCART LT1
SC101
600R
12
10
DVD_Y_IN
5 R4 4
TP105
11
50V
220p
13
GND 4
C628
2
F244
5 SDA
1
600R
6 R3 3
14
12
2
27p
C649 50V
R805
4k7
TP102
TP104
TP103
C104
DVD_C_IN
F243
A2 3
A1 2
ST24LC21
DVD_SENSE
600R
TX/SDA_SC
6 SCL
7 WP
75R
R641
C648
13
7 R2 2
SC1_R
A0 1
U112
50V
220p
R872
22k
F242
1
C5V6
SC1_FB
8 VCC
14
D163
10
1
VGA_DDC_5V
3V3_VCC
R711
2k2
R712
2k2
C5V6
47R
R128
C103
16
15
D117
2
C437
4A/24VDC
C15V
11
PROG_EN
C138
100n
10V
R584
100R
8 R1 1
27p
D111
75R
R644
12V_VCC
R861
10k
75R
R640
17
15
FS101
1
12
C5V6
50V
220p
18
C640
220p
50V
19
C439
D115
2
SC1_CVBS_OUT
VGA CONNECTOR
3
1
220p
50V
C658
220n
25V
D176
SC1_CVBS_IN
R120
10k
C18V
1
2
C105
C5V6
C106
20
D102 5
4
2 NUP4004M5
D112
2
TP240
D106 5
4
2 NUP4004M5
3
1
21
5V_TUN
TP101
SPDIF OUTPUT INTERFACE
VESTEL PROJECT NAME : 17MB25

1
A3
SCH NAME :A/V INTERFACE
SHEET:2 OF:11
DRAWN BY :ONDER GENC
4-28-2008_15:57
AX M
4
AVDD_AU
U138
MST6WB7GQ-3
VIDEO TERMINATIONS AND DIFFERENTIAL TRACING

Place 75R termination resistors
close to Paulo reference GNDs
17
VGA_HSNC
HSYNC1
AVDD_AU_1
74
A
1
DVD_C_IN
10V
10u
R653
75R
C0
R142
47R
S_VIDEO_C_IN
47R
R145
Y0
16V
47n
GIN1P
C1
R652
75R
S_VIDEO_Y_IN
R144
47R
R654
75R
47R
R146
R773
470R
2
1
DVB_CVBS
R687
33k
CVBS3
BIN2P
27
BIN0P
AUCOM
84
28
GIN0M
LINE_IN_2L
85
GIN0P
LINE_IN_2R
86
IN2- 6
4 VSS
IN2+ 5
C335
R738
20k
SC1_L
1u
16V
V+
SOGIN0
LINE_IN_3L
RIN0P
LINE_IN_3R
S106
1
1
LINE_IN_2L
10V
10u
LINE_IN_2R
89
33
GND3
LINE_OUT_3L
90
DSP_CH2_R
DSP_CH4_L
HSYNC0
LINE_OUT_3R
91
35
VSYNC0
LINE_OUT_2L
92
36
VSYNC2
LINE_OUT_2R
93
37
BIN2P
LINE_OUT_1L
94
C372
R155
47R
R690
33k
POP_MUTE
DSP_CH2_L
R522
10k
F219
8V_VCC
50V
220p
R802
3k3
BC848B
Q121
C511600R
1
2
1
LINE_IN_3R
R686
33k
AVDD_33_3 LINE_IN_MONO
34
LINE_R_OUT
LINE_IN_3L
88
1 OUT1
VDD 8
2 IN1-
1
2
LINE_OUT_R
R737
20k
V+
OUT2 7
R521
10k
IN2- 6
R736
20k
4 VSS
IN2+ 5
1u
16V
R516
10k
3k3
R801
POP_MUTE
1
1
C330
1u
16V
1
38
GIN2P
39
RIN2P
95
GIN2P
LINE_OUT_0L
96
DSP_CH3_L
40
RIN2P
LINE_OUT_0R
97
DSP_CH3_R
C1
41
C1
Y1
42
Y1
DSP_CH1_R
YPBPR_AUD_R_IN
SAV_AUD_L_IN
SAV_AUD_R_IN
1n
50V R600
22k
C496
2
1
DSP_CH1_L
LINE_OUT_1R
SOGIN2
YPBPR_AUD_L_IN
C497
1u
16V
R518
10k
LINE_IN_2R
LINE_OUT_L
V+
1u
16V
R517
10k
C337
1n
50V R601
22k
LINE_IN_2L
1
C494
2
C336
1u
16V
DSP_CH4_R
3 IN1+
LINE_L_OUT
BC848B
Q120
TL062
C331
U117
DVD_AUD_R_IN
1n
50V R603
22k
1
10V
10u
C118
R675
82k
C495
2
LINE_IN_1R
50V
220p
100n
16V
2
R153
47R
DVD_AUD_L_IN
C371
C119
R676
82k
33k
R689
1n
50V R605
22k
C339
SC1_AUD_R_IN
C492
1u
16V
R515
10k
100n
10V
87
1u
16V
R514
10k
C338
1n
50V R599
22k
1
LINE_IN_3L
BIN0P
C418
C428
2
1
BIN2P
C426
2
1
C425
48
2
1
C416
47n
16V
49
2
1
VCOM1
CVBS0
50
VCOM0
51
AVDD_33_4
47n
AVDD_33
16V
GIN2P
52
C144
2
SOGIN2
CVBSOUT1
100n
10V
C490
2
R132
47R
R512
10k
R131
47R
53
CVBSOUT0
54
GND4
Pin74
DVB_PR
R150
47R
RCA_Y
1
1
5V_TUN
R662
75R
50V
C326
1u
16V
47n
16V
DSP_CH2_R
IN
S1A
S2A
DA
S1B
S2B
DB
GND
VCC
EN
S1D
S2D
DD
S1C
S2C
DC
16
15
14
13
12
11
10
9
DVB/YPBPR SWITCH
D
F151
C147
1
C445
5V_VCC
330R
1
27p
DVB_PB
50V
R663
75R
RCA_PB
S107
S111
SW_PB
SW_Y
R228
100R
HP_L
C555
SCART VIDEO OUTPUT AMPLIFIERS
330R
S108
S112
27p
1
BIN1P
F119
1
1
2
3
4
5
6
7
8
DVB_Y
RIN2P
C429
2
S109
S110
SW_PR
47n
16V
VGA_B
R229
100R
DSP_CH1_L
1
22k
R419
R674
39k
CVBS0_OUT
R661
75R
C444
SW_PR
R147
47R
U129
PI5V330
RCA_PR
DSP_CH2_L
C427
10V
100n
50V
1
R402
470R
R627
1k
27p
1n
50V
R351
100R
DVB/YPBPR_SW
DSP_CH1_R
22k
R420
HP_R
1
R227
100R
MAIN_L
R226
100R
CVBS1
10n
16V
47
CVBS1
C443
22k
R418
E
MAIN_R
10n
16V
CVBS2
C553
CVBS2
RIN0P
C499
2
C552
CVBS3
46
1u
16V
R520
10k
1n
50V
R403
470R
45
10n
16V
CVBS3
Pin79
1n
50V R598
22k
LINE_IN_3R
8V_VCC
47n
16V
1
Y0
C0
10n
16V
R148
47R
44
C327
1u
16V
33k
R685
43
Y0
C417
2
R149
47R
C0
R684
33k
R139
47R
V+
GIN0P
C554
C498
2
1u
16V
R519
10k
C342
R138
47R
10u
10V
SW_Y
3 IN1+
1n
50V R606
22k
LINE_IN_0R
2
TL062
V+
LINE_IN_1L
C367
47n
16V
R659
75R
SC1_AUD_L_IN
C493
C341
LINE_IN_1R
32
SOGIN2
47n
16V
OUT2 7
C343
SW_PB
R655
75R
VDD 8
1u
16V
R513
10k
220p
50V
R677
82k
U118
2 IN1-
SC1_AUD_L_OUT
C374
LINE_IN_1L
AVDD_AU
R137
47R
R657
75R
83
SC1_FB
CVBS2
47n
16V
LINE_IN_1R
30
100n
10V
SC1_R
R656
75R
BIN0M
C120
LINE_IN_0R
C143
SOGIN0
C421
26
1 OUT1
1u
16V
C142
100n
10V
SC1_G
R666
75R
82
29
AVDD_33
47n
16V
LINE_IN_1L
31
47n
16V
1
RIN1P
LINE_IN_0L
81
R607
22k
LINE_IN_0L
10V
10u
SC1_B
R667
75R
80
R665
75R
LINE_IN_0R
1u
16V
AVDD_AU
R739
20k
SC_1_R
25
RIN0P
47n
16V
C435
2
GIN1P
C332
C145
100n
10V
C368
C344
R140
47R
LINE_IN_0L
R692
33k
R664
75R
47n
16V
50V
C433
2
SOGIN1
330R
R141
47R
79
R649
75R
AVDD_AU_2
BIN1P
8V_VCC
R691
33k
600R
100n
16V
C121
220p
50V
R678
82k
C340
C375
F217
2
1
2
SC1_AUD_R_OUT
3V3_VCC
78
C149
SOGIN0
C612
AUVAG
CVBS1
47n
16V
REFM
22
47n
16V
C419
R134
47R
1n
SAV_CVBS
GIN0P
SC1_CVBS_IN
21
2
C424
77
C420
R133
47R
BIN0P
Y1
47n
16V
1
AUVRP
24
REFP
23
C423
RIN1P
C422
20
AUDIO INPUT VOLTAGE DIVISION AND DC BLOCK

Place close to Paulo
C512
10V
10u C369
C150
100n
10V
76
BIN1P
SOGIN1
AUVRM
100n
10V
47n
16V
VCLAMP
C151
C434
2
19
2
100n
10V
C432
DVD_Y_IN
75
C152
1
GND5
F120
75R
R651
R650
75R
16V
47n
VSYNC1
10V
10u
100n
10V
AVDD_AU DECOUPLING CAPACITORS
R143
47R
18
C148
VGA_VSNC
22k
R417
R404
470R
C491
2
1
SOGIN1
SC1_CVBS_OUT
R646
75R
2
1
R152
47R
C430
2
1
RIN1P
75R
R879
DSP_CH4_R
R225
100R
GAIN_SW1
R806
4k7
DSP_CH3_L
22k
R415
R223
100R
DSP_CH3_R
R222
100R
10n
16V
22k
R416
SC1_L
1
22k
R414
LINE_OUT_R
C551
Q154
2N7002
47n
16V
10n
16V
VGA_R
R660
75R
CVBS0_OUT
10u
10V
R221
100R
LINE_OUT_L
2
1n
50V
R620
300R
R224
100R
R658
75R
Q119
BC848B
C550
R467
15k
DSP_CH4_L
C378
2
10n
16V
47n
16V
22k
R413

AUDIO OUTPUT FILTERS
Place close to Paulo
SC_1_R
10n
16V
Q146
BC858B
GIN1P
C549
C431
2
R151
47R
C548
VGA_G
A3
SCH NAME :A/V INTERFACE
SHEET:3 OF:11
4-28-2008_15:57
AX M
U138
MST6WB7GQ-3
HDMI1
HDMIA_C+
HDMI Receiver In_B
10R
R390
HDMIB_C-
1 A0
HDMIB_SCL
HDMIB_SDA
WP 7
HDMI_WP1
HDMIA_HPD
24LC02
3 A2
HDMIB_5V
HDMIB_HPD
4 VSS
SCL 6
HDMIB_SCL
SDA 5
Q162
BC848B
HDMIB_SDA
R876
1k
GND1
USB20_DM 193
RXA0N
USB20_DP 194
HDMIA_0+
RXA0P
GND11 195
AVDD_33_1
VDDP2 196
HDMIA_1-
RXA1N
GND12 197
HDMIA_1+
RXA1P
VDDP3 216
GND2
HDMIA_2-
10
RXA2N
USB_DM 218
HDMIA_2+
11
RXA2P
USB_DP 219
12
HPLUGA
USB_CID 220
13
AVDD_33_2
14
REXT
DI[0] 232
HDMIA_SDA
15
DDCDA_SDA
DI[1] 233
C154 HDMIA_SCL
16
DDCDA_SCL
DI[2] 234
AVDD_33
TP133
TP132
R491
47k
R492
47k
1
1
C153
100n
10V
2 A1
10R
R393
R412
390R
R119
910R
283 RXBCKN
VDDP5 236
284 RXBCKP
DI[4] 237
285 AVDD_33_5
DI[5] 238
HDMIB_0-
286 RXB0N
DI[6] 239
HDMIB_0+
287 RXB0P
DI[7] 240
288 GND
DI[8] 241
HDMIB_1-
289 RXB1N
DI[9] 242
HDMIB_1+
290 RXB1P
HDMIB_5V
2
R629
1k
TP136
TP135
2
R838
10R
HDMIA_0HDMIA_C+
Q123
BC848B
R630
1k
293 RXB2P
294 HPLUGB
R258
4k7
295 DDCDB_SDA
HDMIB_SCL
296 DDCDB_SCL
HDMIB_SDA
WP 7
HDMI_WP2
24LC02
3 A2
SCL 6
HDMIA_SCL
4 VSS
SDA 5
HDMIA_SDA
HDMIA_SCL
HDMIA_SDA
Pin196
VDDP
HDMIA_5V
HDMIA_HPD
Pin216
C155
100n
10V
Pin236
C156
100n
10V
C157
100n
10V
R843
10R
HDMIB_2+
2
R493
47k
R494
47k
CEC CIRCUIT
Pin6
AVDD_33
Pin13
Pin285
TP204
TP206
R841
10R
292 RXB2N
2 A1
R840
10R
VCC 8
C629
100n
10V
HDMIA_C-
CEC
1
S217
R839
10R
1 A0
U147
2
HDMIA_1HDMIA_0+
HDMIB_2-
5V_VCC
R836
10R
TP205
HDMIA_2HDMIA_1+
VDDP
HDMIB_HPD
R837
10R
TP203
2
HDMIA_5V
R807
4k7
HDMI2
R833
10R
HDMIA_2+
R834
10R
R835
10R
5V_VCC
2
R832
10R
291 GND18
BAV70
D165
VDDP
ICLK 231
DI[3] 235
AVDD_33
CN122
VDDP
USB_VBUS 217
282 VDDC5
HDMI2
AVDD_USB
VDDC
HDMIB_C+
100n
10V
HDMIB_C-
AVDD_USB 192
HDMIA_0-
AVDD_33
R808
4k7
10R
R396
VCC 8
U110
R392
10R
1
CEC
1
RXACKP
HDMIB_5V
S218
R391
10R
TP134
HDMIB_0HDMIB_C+
R257
4k7
5V_VCC
HDMIA_5V
R389
10R
BAV70
D147
5V_VCC
10R
R394
HDMIB_1HDMIB_0+
HDMIB_2HDMIB_1+
R388
10R
R875
1k
10R
R387
HDMIB_2+
R386
10R
TP106
R385
10R
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
USB20_REXT 191
RXACKN
1
HDMI1
HDMIA_C-
CN121
S116
R829
200R
1
3
CEC
Q101
2N7002
R159
100R
C158
100n
10V
C159
100n
10V
C160
100n
10V
F124
HDMI_CEC
1
3V3_VCC
AVDD_USB
330R
2
R621
27k
1
5V_STBY
C173
100n
10V
3V3_STBY
A3
SHEET:4 OF:11
SCH NAME :HDMI&USB
DRAWN BY :S.SEBNEM TAS & ULAS DERELI 4-28-2008_15:57
AX M
DVD_IR
R694
4k7
R263
4k7
SAR1 205
SC1_PIN8
57
GPIOL[2]
SAR2 206
DVD_SENSE
58
GPIOL[3]
SAR3 207
59
KEYBOARD_STBY
27p
50V
DVD_IR_ON/OFF
27p
50V
STBY_ON/OFF_NOT
R748
3V3_STBY
47R
1
R267
4k7
GPIOL[4]
PWM0 208
60
XOUT
PWM1 209
61
XIN
DDCR_SDA 210
98
GPIOD[0]
DDCR_SCL 211
99
GPIOD[1]
DDCA_SDA 212
100 GPIOD[2]
DDCA_SCL 213
101 GPIOD[3]
INT 214
102 GPIOD[4]
IRIN 215
R422
10k
3V3_STBY
USB_DIG_OCD
R608
22k
Q125
BC848B
GAIN_SW1
3V3_VCC
R757
4k7
3V3_VCC
VDDP
3V3_VCC
MECH_SWITCH_ONBOARD
KEYBOARD_ONBOARD
D162
C5V6
R793
47R
C176
100n
10V
C178
100n
10V
5V_VCC
PIN226
PIN110
R269
4k7
R270
4k7
VDDC
5V_TOLERANT
PWM3 224
107 GPIOD[9]
GND14 225
108 VDDP1
VDDP4 226
U103
24C32
KEYBOARD_STBY
600R
1
1
2
3
4
3V3_STBY
600R
E0
E1
E2
VSS
VCC
WC
SCL
SDA
8
7
6
5
3V3_STBY
3V3_STBY
100n
10V
4k7
R271
HP_DETECT
4k7
R275
5V_TOLERANT
HDMI_WP1
AMP_MUTE
GPIOT[0] 227
110 VDDC1
GPIOT[1] 228
111 GPIOD[10]
GPIOT[2] 229
112 GPIOD[11]
GPIOT[3] 230
113 GPIOD[12]
HWRESET 243
114 GPIOD[13]
VDDP7 272
115 GPIOD[14]
GND17 273
116 GPIOD[15]
GPIOE[3] 274
TK_SUPPLY
TP239
TP111
TP110
TP109
TP108
TP112
HDMI_WP2
R905
47R
117 GPIOD[16]
GPIOE[2] 275
118 GPIOD[17]
GPIOE[1] 276
149 GPIOR[0]
HDMI_CEC
5V_TOLERANT
1
HDMIB_5V
5V_TOLERANT
HDMIA_5V
3V3_STBY
PROTECT_PANEL
3V3_VCC
R283
4k7
R264
4k7
R395
1k
R877
1k
R161
47R
R162
47R
OPTION2
3V3_VCC
DVB_RXD
R292
4k7
DVB_TXD
R356
100R
3V3_VCC
10V
100n
C182
VDDP
1
R261
4k7
R262
4k7
3V3_STBY
3V3_STBY
150 GPIOR[1]
GPIOM[0] 278
151 GPIOR[2]
GPIOM[1] 279
152 GPIOR[3]
GPIOM[2] 280
153 GPIOR[4]
GPIOM[3] 281
MAX810
GND RST MAX809LTR

VCC
U130
3
10V
100n
SDA_NVM
GPIOE[0] 277
SCL_NVM
3V3_STBY
C183
USB_ENABLE
R760
4k7
5V_VCC
ANT_CTRL
5V_STBY
3V3_STBY
R291
4k7
PROGRAMMING PART
4k7
R278
VDDP
109 GND6
5V_TOLERANT
1
3V3_VCC
DVD_IR_ON/OFF
NVM_WP
SCL_NVM
SDA_NVM
SW_UPDATE_SELECT
NVM_WP
F249
600R
PROG_EN
106 GPIOD[8]
PROTECT
C181
F248
1
CN130
PIN272
C630
100n
10V
C5V6
F250
1
MECH_SWITCH
PWM2 223
R165
47R
C177
100n
10V
3V3_STBY
PIN108
D161
IDTV_SW
C5V6
C175
100n
10V
105 GPIOD[7]
IR_IN
3V3_STBY
VDDC
2
220p
50V
D160
GPIOB[1] 222
VDDP
104 GPIOD[6]
R288
4k7
R268
4k7
DVB_IRQ
C626
GPIOB[0] 221
DVB/YPBPR_SW
S125
R827
100R
4k7
R294
D167
LED2
103 GPIOD[5]
3V3_STBY
STBY_ON/OFF
S117
4k7
R274
STBY_ON/OFF_NOT
5V_STBY
BC858B
R381
220R
R382
220R
3V3_VCC
3V3_STBY
RX/SCL
4k7
R290
DVB_RESET
R265
4k7
LED1
BC858B
Q149
Q148
R724
100k
R531
10k
Q131
BC848B
R831
220R
Q130
BC848B
R830
220R
R528
10k
R421
10k
For Internal CPU Selection

BACKLIGHT_DIM
3V3_STBY
4k7
R524For Internal CPU Selection
3V3_STBY
R279
10k
4k7
3V3_STBY
R287
SDA
4k7
3V3_STBY
R286
SCL
4k7
3V3_STBY
R289
TX/SDA
2
27p
50V
R742
20k
OVER_CUR_DETECT
C446
1
1
GPIOL[1]
S124
N.C.
IR_IN
600R
C653
5V_STBY
GPIOL[0]
56
SIF_CTL
3V3_STBY
SAR0 204
C447
R498
47k
F247S118
1
55
1
3V3_VCC
3V3_STBY
S119
14.31818MHz
R110
1M
2
1
X104
IR_IN
R276
4k7
U138
MST6WB7GQ-3
LED2
TP241
LED1
3V3_STBY
BC848B
Q124
CN119
LED
R277
4k7
3V3_STBY
7
N.C.
4k7
R293
1N4148
154 GPIOR[5]
155 GPIOR[6]
C180
RX/SCL_SC
RX/SCL
3
Q128
BC848B
VCC
1Y2
1Y1
1Z
1Y0
1Y3
S0
S1
16
15
14
13
12
11
10
9
S122
3V3_VCC
S121
5V_VCC
157 GPIOR[8]
5V_STBY
158 GPIOR[9]
TX/SDA
TX/SDA_SC
UART0_TXD0
159 GPIOR[10]
1
SW_UPDATE_SELECT
1
4k7
R284
CN133
2
5V_STBY
MECH_SWITCH_ONBOARD
MEGA_DCR_OUT
KEYBOARD_ONBOARD
R233
4k7
Q147
BC858B
2
2
C530
1
S242
TK_SUPPLY
2Y0
2Y2
2Z
2Y3
2Y1
E
VEE
GND
156 GPIOR[7]
R281
4k7
1
2
3
4
5
6
7
8
R282
4k7
UART0_RXD0
100n
10V
R745
1k
R280
4k7
U127
M74HC4052
220p
50V
S123
R352
100R
R353
100R
Q126
BC848B
C529
1
3
C531
KEYBOARD_ONBOARD
4
2
MECH_SWITCH_ONBOARD
4
2
SW107
VOL-
SW106
TV/AV
SW105
VOL+
PSW104
DEBUG SOCKET
P+
3
HC4052 DISABLE
HC4052 ENABLE
220p
50V
AT THE SAME TIME FOR MENU
PROG_EN
R234
4k7
SW_UPDATE_SELECT
R243
3k9
220p
50V
SW101
R118
2k7
1
R484
1k2
1
R405
470R
ANALOG_SW_UPDATE
DVB_SW_UPDATE
R397
270R
Q127
BC848B
DIMMING
2
F
2
R354
100R
R355
100R
R232
4k7
10u
10V
PUSH V+ AND V-
0
1
R164
47R
R163
47R
SW103
TX/SDA
S238
MEGA_DCR_IN
2
RX/SCL
S237
BACKLIGHT_DIM
N.C. CN110
S120
1
C383
5V_STBY
A3
SCH NAME :CONTROLLER
SHEET:5 OF:11
DRAWN BY :NDER GEN
4-28-2008_15:57
AX M
F126
1
3V3_VCC
TP116
C200
100n
10V
C199
100n
10V
C198
100n
10V
C197
100n
10V
C196
100n
10V
3V3_VCC
PIN168
PIN173
PIN179
R906
4k7
PIN162
PIN184
120 AD[1]
DQS0 161
3V3_VCC
121 AD[2]
AVDD_MI_3 162
VDDM
122 AD[3]
MDATA[0] 163
MDATA[0]
BACKLIGHT_ON/OFF
123 WRZ
MDATA[1] 164
MDATA[1]
124 RDZ
GND9 165
125 ALE
MDATA[2] 166
MDATA[2]
BADR[1]
126 BADR[1]
MDATA[3] 167
MDATA[3]
BADR[0]
127 BADR[0]
AVDD_MI_4 168
VDDM
RASZ
128 RASZ
MDATA[4] 169
MDATA[4]
VDDC
129 VDDC2
MDATA[5] 170
MDATA[5]
130 GND7
MDATA[6] 171
MDATA[6]
131 AVDD_MI_1
MDATA[7] 172
MDATA[7]
S244
DVD_SPDIF
100R
R369
VDDC
SDI
TP118
PANEL_VCC_ON/OFF
SCK
R907
4k7
C194
100n
10V
PIN129
C195
100n
10V
3V3_VCC
3V3_VCC
3V3_VCC
R295
4k7
R911
4k7
R908
4k7
R357
100R
PIN203
VDDM
8MBU131
SDRAM
MEMORY
MT48LC4M16A2TG8E
VDD_DMC
VDD_DMQ
R4 5
R3 6
R2 7
R1 8
100R
R586
VDD_DMQ
MDATA[4]
MDATA[5]
MDATA[6]
MDATA[7]
4
3
2
1
R4 5
R3 6
R2 7
R1 8
100R
R587
VDD1
VSS3
54
DQ0
DQ15
53
VDDQ1
VSSQ4
52
DQ1
DQ14
51
DQ2
DQ13
50
VDDQ4
49
VSSQ1
DQ3
DQ12
48
DQ4
DQ11
47
VDDQ2
VSSQ3
46
10
DQ5
DQ10
45
11
DQ6
DQ9
44
VDDQ3
43
DQ8
42
VSS2
41
12
VSSQ2
13
DQ7
VDD_DMC
14
VDD2
15
DQML
16
WE#
17
VDD_DMQ
4
3
2
1
4
3
2
1
VDD_DMQ
R4 5
R3 6
R2 7
R1 8
100R
R588
R4 5
R3 6
R2 7
R1 8
100R
R589
MDATA[15]
MDATA[14]
MDATA[13]
MDATA[12]
MDATA[11]
MDATA[10]
MDATA[9]
MDATA[8]
CASZ
132 CASZ
AVDD_MI_5 173
WEZ
133 WEZ
MDATA[8] 174
MDATA[8]
MADR[11]
134 WADR[11]
MDATA[9] 175
MDATA[9]
MADR[10]
135 WADR[10]
GND10 176
MADR[9]
136 WADR[9]
MDATA[10] 177
MDATA[10]
MADR[8]
137 WADR[8]
MDATA[11] 178
MDATA[11]
MADR[7]
138 WADR[7]
AVDD_MI_6 179
VDDM
MADR[6]
139 WADR[6]
MDATA[12] 180
MDATA[12]
MADR[5]
140 WADR[5]
MDATA[13] 181
MDATA[13]
MADR[4]
141 WADR[4]
MDATA[14] 182
MDATA[14]
MADR[3]
142 WADR[3]
MDATA[15] 183
MDATA[15]
MADR[2]
143 WADR[2]
AVDD_MI_7 184
MADR[1]
144 WADR[1]
DQS1 185
VDDM
R910
4k7
MADR[0]
145 WADR[0]
DQM1 186
146 GND8
147 AVDD_MI_2
VDDM
F157
3V3_VCC
330R
2
LDM
WEZ
CASZ
RASZ
R828
100R
R104
22R
R105
22R
R103
22R
NC2
40
DQMH
39
CAS#
CLK
38
18
RAS#
CKE
37
19
CS#
NC1
36
R360
100R
MCLK
R361
100R
BADR[0]
BADR[1]
MADR[0]
MADR[1]
MADR[2]
MADR[3]
4
3
2
1
20
BA0
A11
35
21
BA1
A9
34
22
A10
A8
33
23
A0
A7
32
24
A1
A6
31
25
A2
A5
30
26
A3
A4
29
27
VDD3
VSS1
28
R4 5
R3 6
R2 7
R1 8
100R
R917
VDD_DMC
3V3_VCC
VDDM
UDM
MCLKZ 187
MCLK 188
MCLKE 189
R499
100R
MCLK
MCLKE
MVREF 190
SPI_SCK 198
UDM
PIN1
F162
2
MCLKE
VDDM
R916
100R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
R915
100R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
PIN14
PIN27
VDD_DMC
60R
1
R900
22R
R927
22R
148 AVDD_MIPLL
C213
100n
10V
VDDM
SCK
SPI_SDI 199
SDI
SPI_SCZ 200
SCZ
SPI_SDO 201
SDO
C501
1n
50V
C193
100n
10V
R370
100R
Q168
BC848B
FLASH
R535
10k
4
3
2
1
LDM
SPDIF_OUT
8
7
6
5
VCC
HOLD#
SCLK
SI
MDATA[0]
MDATA[1]
MDATA[2]
MDATA[3]
3V3_VCC
3V3_STBY
DQM0 160
C184
100n
10V
330R
C643
10u
10V
PIN147
119 AD[0]
DVB_SPDIF
R296
4k7
R912
4k7
C202
100n
10V
CS#
SO
WP#
GND
R909
4k7
TP113
1
C201
100n
10V
R536
10k
3V3_STBY
TP115
TP114
1
1
2
3
4
R365
100R
SDO
SCZ
U132
MX25L512
PIN131
F150
1
R367
100R
R368
100R
R366
100R
C469
10u
10V
TP117
TP119
U138
MST6WB7GQ-3
VDDM
330R
C461
220u
6V3
C212
100n
10V
C208
100n
10V
GND13 202
C712
100n
10V
VDDC3 203
VDDC
MADR[11]
MADR[10]
MADR[9]
MADR[8]
PIN3
F163
1
VDDM
MADR[7]
MADR[6]
MADR[5]
MADR[4]
C203
100n
10V
PIN43
PIN49
VDD_DMQ
60R
1
2
PIN9
C462
220u
6V3
C189
100n
10V
C210
100n
10V
C204
100n
10V
C186
100n
10V
WARNING!!!DON'T USE VIA FOR MCLK AND
DATA SIGNALS

1
A3
SCH NAME :MEMORY INTERFACE
SHEET:6 OF:11
DRAWN BY :NDER GEN
4-28-2008_15:57
AX M
MUTE_HP_R
R546
10k
2
1
1
Q150
BC858B
BC848B
C595
100n Q132
16V
HP_L
220n
10V
C538
2n2
50V
AMP_MUTE
R722
10k
R542
10k
R729
100k
BC848B
Q133
4k7
R424
MUTE_HP_L
1u
16V
R211
100k
600R
100u
16V
C471
AMP_EN
F192
600R
R123
15k
C625
2n2
50V
JK107
INBP 5
4 VSS
220p
50V
INBN 6
C123
3 INAP
3
2
1
F191
R212
100k
50V
1n
C540C502
2
1
220p
50V
C122
R237
20k
C350
D125
TDA1308T
220n
10V
HP_DETECT
R236
3k9
OUTB 7
R238
20k
1
1
U128
8V_VCC
HP_R
C537
2n2
50V
R423
4k7
VDD 8
2 INAN
C472
1 OUTA
C453
100u
16V
A
D127
1n
50V
D126
C386
10u
10V
6
5
4
16V
100u
1N4148
2
1
3V3_VCC
S126
1N4148
C541
2
1N4148
C503
D124
9
8
7
5V_VCC
1N4148
F190
600R
S127
S128
VDD_AUDIO
C624
2n2
50V
12V_VCC
POP NOISE CIRCUIT

2
R541
10k
HEADPHONE AMPLIFIER
MUTE_HP_R
3
BC848B
Q134
FAULT
S236
D166
S235
SS33
12V_AUDIO
R904
10k
BC848B
Q167
VDD_AUDIO
VDD_AUDIO
R_AUDIO_N
POWER
220n
25V
50R
39
29
28
27
26
25
VCLAMPL
PGNDL_2
PGNDL_1
PVCCL_2
PVCCL_1
GND_5
ROUTN_1
LOUTN_2
POWER
ANALOG
24
C690
23
22
40
ROUTN_2
LOUTN_1
21
41
ROUTP_1
LOUTP_2
20
LOUTP_1
19
BSLP
18
AGND_2
17
F252
1
MUTE
VBYP
16
46
FAULT
VREG
15
47
AVCC_1
ROSC
14
48
AVCC_2
GND_3
13
BC848B
Q166
GND_2
R_AUDIO_N
L_AUDIO_P
L_AUDIO_N
L_AUDIO_N
L_AUDIO_P
L118
C70410u
1n
50V
POWER
C680
1u
25V
POWER
C703
CLOSE TO PIN
R898
100k
100n
50V
VREG
30000289
10NF
ANALOG
ANALOG
12
GAIN1
9
SYNC
GAIN0_2
8
11
GAIN0_1
MSTR/SLV
LINN
RINP
ANALOG
MAIN_R
16V
1u
C696
PIN 1,12,13,24,25,36 AND 37
VREG
CONNECT TO C552 GND

16V
1u
C695
ANALOG
MUST BE CONNECT TO TERMAL PAD

F
VREG
ANALOG
VREG
ANALOG 1u
C693
16V
1u
C694
R893
100k
16V
POWER
S229
R891
100k
POWER
R890
100k
S230
CONNECT TO C553 GND
MAIN_L
AMP_EN
R888
10k
C709
22u
35V
50V
1u
C687
RINN
VDD_AUDIO
10k
R887
GND_1
VREG
LINP
ANALOG
FAULT
4 R4 5
45
ANALOG
3 R3 6
SHUTDOWN
220n
25V
AGND_1
100k
R892
C689
25V
220n
2 R2 7
44
U150
TPA3101
50R
R_AUDIO_P
10u
C699
470p
50V
CN115
C681
1u
25V
L119
50R
R897
100R
1 R1 8
BSRP
VDD_AUDIO
POWER
50V
1n
C705
C698
470p
50V
220n
25V
C692
1u
16V
ROUTP_2
43
C688
4 R4 5
POWER
42
10
C700
470p
50V
50R
C707
1n
50V
3 R3 6
POWER
10u
2 R2 7
C682
1u
25V
POP_MUTE
4 R4 5
30
VCLAMPR
BSLN
3 R3 6
31
PGNDR_1
GND_4
2 R2 7
C685
1u
50V
32
PGNDR_2
ANALOG
F254
R895
100R
1 R1 8
R_AUDIO_P
POWER
F253
L120
R545
10k
ANALOG
R894
100R
1 R1 8
POWER
33
PVCCR_1
BSRN
C701
1u
16V
34
38
POWER
22u
35V
35
GND_7
16V
1u
C702
C708
PVCCR_2
37
C691
C697
470p
50V
10u
5V_VCC
10u
10V
36
POWER
L121
BC848B
Q135
GND_6
4 R4 5
3 R3 6
2 R2 7
C684
1u
50V
R896
100R
1 R1 8
C710
C706
1n
50V
F251
C385
1
ANALOG
C683
1u
25V
R544
10k
MUTE_HP_L
35V
22u
POWER
VDD_AUDIO
C711
220u
35V
24V_VCC

1
A3
SCH NAME :AUDIO
SHEET:7 OF:11
DRAWN BY :S.SEBNEM TAS
4-28-2008_15:57
AX M
R884
100k
1
2
5V_VCC
2
330R
C644
10u
10V
1
1 OUT
5
IN
U149
2 GND
STMP2161
3 FAULT
EN 4
3
5V_VCC
12V_VCC
5V_VCC
3V3_VCC
CI_PWR_CTRL
USB_ENABLE
4
5
6
1
CN128
1
R863
10k
F236
R856
47k
2
1
2 2
R857
47k
330R
TP207
Q158
BSH103
F237
C631
100n
10V
USB INTERFACE
F235
1
46
47
48
49
12
13
14
15
CI_A8
CI_A13
CI_A14
CI_WE
R812
4k7
CI_IREQ
CI_PWR
R814
3V3D_DVB
4k7
58
59
60
61
62
63
64
65
66
67
24
25
26
27
28
29
30
31
32
33
CI_A6
CI_D2
CI_D1
CI_D0
CI_A0
CI_A1
CI_A2
CI_A3
CI_A4
68
57
23
34
56
22
CI_A7
CI_A5
55
21
5V_VCC
C656
15p
50V
54
20
53
19
CI_A12
MPEG_TS_OUT_VALID
52
18
51
45
11
CI_A9
17
44
10
CI_A11
43
CI_OE
42
CI_A10
50
41
CI_CE
16
40
CI_D7
39
CI_D6
38
CI_D5
3V3D_DVB
37
CI_D4
TS_IN
CI_CD
MPEG_TS_IN_D1
MPEG_TS_IN_D2
3 R3 6
4 R4 5
B4
CI
TS_OUT
MPEG_TS_IN_D0
2 R2 7
3V3D_DVB
CI_RST
CI_WAIT
MPEG_TS_OUT_D7
R791
150R
3V3D_DVB
MPEG_TS_OUT_D6
MPEG_TS_OUT_D5
MPEG_TS_OUT_D4
3V3D_DVB
CI_PWR
MPEG_TS_OUT_D3
MPEG_TS_OUT_D2
MPEG_TS_OUT_D1
MPEG_TS_OUT_D0
MPEG_TS_OUT_SYNC
CI_IOWR
CI_IORD
3V3D_DVB
MPEG_TS_IN_D7
MPEG_TS_IN_D6
MPEG_TS_IN_D5
MPEG_TS_IN_D4
MPEG_TS_IN_D3
3V3D_DVB
CI_REG
R795
47R
MPEG_TS_IN_VALID
R850
47R
1 R1 8
MPEG_TS_IN_SYNC
1
4 R4 5
R794
47R
3 R3 6
2 R2 7
R851
47R
1 R1 8
MPEG_TS_IN_CLK
AZ099-04S
R862
10k
IO3 4
VDD 5
USB
N.C.
N.C.
R864
10k
R855
47k
R809
4k7
36
U145
3 IO2
1
R816
4k7
CI_D3
CI SOCKET
2 GND
1
USB_DIG_OCD
2
IO4 6
R815
4k7
1 IO1
R813
4k7
R845
10R
1
R844
10R
1
USB_DIG_DM
2
R810
4k7
USB_DIG_DP
2
35
1
A
2
R811
4k7
C655
15p
50V
B
CN131
1
6
7
330R
2
C645
10u
10V
2
TS ROUTING
MPEG_TS_OUT
B1
MPEG_TS_IN
CI_CONTROL/ DATA&ADDRESS BUS
MPEG_TS_OUT_CLK
C
C
CI 5V SWITCH CIRCUIT
D
D
CI_PWR
C632
100n
10V
Q160
BC847B
F
F

8
A3
SCH NAME :CI

SHEET:8 OF:11
DRAWN BY :MB35 HW GROUP

4-28-2008_15:57
AX M
R434
33R
R1 8
R2 7
R3 6
R4 5
C286
10u
10V
CVBS/YPbPr Video
Outputs
MDQM
MCLK_SDRAM
3V3_SDRAM_DVB
MA12
MA11
MA9
MA8
MA7
MA6
MA5
MA4
3V3_SDRAM_DVB
C294
10u
10V
C245
100n
10V
C246
100n
10V
C247
100n
10V
C243
100n
10V
3V3_SDRAM_DVB
1
2
C244
100n
10V
C272
100n
10V
C236
100n
10V
C237
100n
10V
UART0_TXD0
C717
1M
R789
X102
1
100R
R914
UART0_RXD0
100R
R319
C269
100n
10V
3V3D_DVB
RF_AGC_DVB
27MHz
F135
1
3V3_VCC
330R
1
16V
22u
C352
3V3A_PLL_DVB
C252
100n
10V
F136
1
3V3_VCC
3V3A_ADC_DVB
330R
TP123
10k
R348
R326
1k2
10k
C249R371
100n
10V
1
R327
1k2
C303
3V3A_PLL_DVB
1n
50V* Layout Req.
1n
3V3A_ADC_DVB
50V
R320
100R
SDA_TUN_DVB
SCL_TUN_DVB
R328
1k2
R316
100R
IF_AGC_DVB
C248
100n
10V
BC847B
R762
4k7
Q153
2 2
3V3D_DVB
330R
2
C288
10u
10V
1u
C619
C261
100n
10V
C262
100n
10V
C260
100n
10V
C263
100n
10V
3V3A_DVB
330R
1
S214
S215
C714
DIGITAL_IF_P
DVB_RESET
2
C259
100n
10V
C258
100n
10V
C295
10u
10V
C256
100n
10V
C257
100n
10V
C264
100n
10V
RESET_DVB
C273
100n
10V
1V8D_DVB
2
2
DVB RESET
C289
10u
10V
F134
1
330R
33R
R185
DIGITAL_IF_N
22p
50V
3V3_VCC
C291
10u
10V
50V
22p
1V8_VCC
F132
1
3V3_VCC
1V8_VCC
C253
100n
10V
C250
100n
10V
3V3D_DVB
F133
C255
100n
10V
16V
22u
C287
R318
100R
C302
C713
L115
MD10
MD9
3V3_SDRAM_DVB
MD8
330R
C285
10u
10V
22p
50V
1
1
MD14
MD13
3V3_SDRAM_DVB
MD12
MD11
C266
100n
10V
C678
22u
16V
22p
50V
C268
100n
10V
MD15
330R
1
100R
R913
330R
F140
MPEG DEC TS INPUT
TP208
F141
1
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
C716
C276
100n
10V
390nH
C274
100n
10V
TP153
VSS3
DQ15
VSSQ4
DQ14
DQ13
VDDQ4
DQ12
DQ11
VSSQ3
DQ10
DQ9
VDDQ3
DQ8
VSS2
NC2
DQMH
CLK
CKE
NC1
A11
A9
A8
A7
A6
A5
A4
VSS1
1V8D_DVB
C292
10u
10V
MPEG DEC TS OUTPUT
VDD1
DQ0
VDDQ1
DQ1
DQ2
VSSQ1
DQ3
DQ4
VDDQ2
DQ5
DQ6
VSSQ2
DQ7
VDD2
DQML
WE#
CAS#
RAS#
CS#
BA0
BA1
A10
A0
A1
A2
A3
VDD3
F137
1
3V3_VCC
C239
100n
10V
DVB_SPDIF
C679
22u
16V
CI ADDRESS BUS
SF_DIO
<==
1n
50V
MBS0
MBS1
MA10
MA0
MA1
MA2
MA3
3V3_SDRAM_DVB
TP154
1
SF_CLK
33R
R192
TP156
TP152
1
3V3_VCC
TP122
TP120
R317
100R
3V3D_DVB
330R
C275
100n
10V
R191
33R
C293
10u
10V
F142
C265
100n
10V
1n
50V
C301
DVB_Y
27MHz VCXO
8
7
6
5
<==
VCC
HOLD#
SCLK
SI
10V
100n
C240
CS#
SO
WP#
GND
R373
10k
1
2
3
4
U114
MX25L512
MPEG_TS_IN_D7
MPEG_TS_IN_D6
MPEG_TS_IN_D5
MPEG_TS_IN_D4
MPEG_TS_IN_D3
MPEG_TS_IN_D2
MPEG_TS_IN_D1
MPEG_TS_IN_D0
MPEG_TS_IN_CLK
MPEG_TS_IN_VALID
MPEG_TS_IN_SYNC
MPEG_TS_OUT_D7
MPEG_TS_OUT_D6
MPEG_TS_OUT_D5
MPEG_TS_OUT_D4
MPEG_TS_OUT_D3
MPEG_TS_OUT_D2
MPEG_TS_OUT_D1
MPEG_TS_OUT_D0
MPEG_TS_OUT_CLK
MPEG_TS_OUT_VALID
MPEG_TS_OUT_SYNC
C601
15p
50V
390p
R459 50V
75R
C101
3V3A_DVB
1
MD7
3V3_SDRAM_DVB
MDQM
MWE
MCAS
MRAS
3V3_VCC
CI DATA BUS
ENC_Y
1
DVB_PB
IDTV_SW
C254
108100n
107 10V
106
105
104
103
102
R325
101
5k6
100
USB_DIG_DP
99
USB_DIG_DM
98
97
96
TP163
95
TP164
94
93
R188
92
33R
RESET_DVB
91
DSU_TXD0
90
DSU_RXD0
89
88
87
86
85
84
83
82
81
80
R440
79
33R
1 R1 8
78
2 R2 7
77
3 R3 6
76
R447
4 R4 5
75
33R
74
1 R1 8
73
2 R2 7
72
3 R3 6
R183
71
4 R4 5
33R
1 R1 8
70
2 R2 7
69
3 R3 6
68
67
3V3D_DVB4 R4 5
66
SF_DIO
65
SF_DO
64
SF_CLK
R448
63
33R
SF_CS
1 R1 8
62
CI_D0
2 R2 7
61
CI_D1
3 R3 6
60
CI_D2
R449
4
5
59
R4
33R
CI_D3
1 R1 8
58
CI_D4
2 R2 7
57
CI_D5
3 R3 6
56
CI_D6
4 R4 5
55
CI_D7
SERIAL FLASH
TP124
ENC_PB
3V3A_DVB
R437
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
==>
3V3D_DVB
R450
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
R444
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
MPEG DECODER
ENC_PR
C296
R446
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
R926
33R
ENC_CVBS
R198
470R
390p
50V
27p
50V
R918
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
MD3
MD4
3V3_SDRAM_DVB
MD5
MD6
390p
R458 50V
75R
C102
NC2
C277
100n
10V
R922
33R
R1 8
R2 7
R3 6
R4 5
1V8D_DVB
R372
10k
R443
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
1
2
3
4
CHEERTEK
R376
10k
TP155
TP141
3V3A_DVB
R925
33R
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
ADC_VMID
VREFP
VREFN
VINN
VINP
USB_AVD18
USB_AVSS_2
USB_REF
USB_DP
USB_DN
USB_AVSS_1
USB_AVD33
OSCO1
OSCI1
GPA2/CS2#/TX1/VSYN/PCMCLK
GPA1/CS1#/RX1/HSYN/SD_CD#
RESET#
DSU0_TX/UART0_TX/GPD1
DSU0_RX/UART0_RX/GPD0
TSI_D7/PD7
TSI_D6/PD6
TSI_D5/PD5
TSI_D4/PD4
TSI_D3/PD3
TSI_D2/PD2
TSI_D1/PD1
TSI_D0/PD0
TSI_CLK/CLKO
TSI_VLD/VSYN
TSI_SYN/HSYN
GPD15/TSO_D7
GPD14/TSO_D6
GPD13/TSO_D5
GPD12/TSO_D4
GPD11/TSO_D3
GPD10/TSO_D2
GPD9/TSO_D1
GPD8/FUM/TSO_D0
GPD5/FUM/TSO_CLK
GPD7/FUM/TSO_VLD
GPD6/FUM/TSO_SYN
VDD33_2
SF_DIO/HA20/GPOD2
SF_DO/HA21/GPOD3
SF_CLK/HA22/GPOD4
SF_CS#/FCS#
HAD0/GPOE0
HAD1/GPOE1
HAD2/GPOE2
HAD3/GPOE3
HAD4/GPOE4
HAD5/GPOE5
HAD6/GPOE6
HAD7/GPOE7
MCAS
MRAS
MBS0
MBS1
MA10
MA0
MA1
MA2
MA3
CI_A14
CI_A13
CI_A12
CI_A11
CI_A10
CI_A9
CI_A8
CI_A7
CI_A6
CI_A5
CI_A4
CI_A3
CI_A2
CI_A1
CI_A0
OUT5
47p
50V
3V3D_DVB
R924
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
MA12
MA11
MA9
MA8
MA7
MA6
MA5
MA4
MWE
IN5
CN107
3V3D_DVB
R500
DSU_TXD0
4k7
RAM DATA BUS

RAM ADDRESS BUS
C300
R315
100R
SERIAL FLASH
SF_CS
SF_DO
10
Comm.Port
GPG0
AVSS_3
AVO3
AVD33_3
AVO2
AVSS_2
AVO1
AVD33_2
AVO0
AVSS_1
FSADJ
VREF
AVD33_1
AUDIO_DAC_VMID
AUDIO_DAC_L
AUDIO_DAC_R
GPC15/SPDIF
GPA0/CLKO/PCMACK
HAD8/PD0/GPOE8
HAD9/PD1/GPOE9
VDD18_2
HAD10/PD2/GPOE10
HAD11/PD3/GPOE11
HAD12/PD4/GPOE12
HAD13/PD5/GPOE13
HAD14/PD6/GPOE14
HAD15/PD7/GPOE15
HA19/VSYN/GPOF19
HA18/HSYN/GPOF18
GPA7/PWM3/PCMSD/SCXO
GPA6/PWM2/PCMWS/SCXI
GPA5/PWM1/PCMCLK/TX2
GPA4/PWM0/PCMACK/RX2
UART0_TX/GPOC0
UART0_RX
SAR_ADC_IN1
SAR_ADC_IN0
VDD33_3
VSS_2
OSCI
OSCO
GPC1/COFDM_ERR
GPA12/AGC_RF
GPA11/AGC_IF
GPA15/SDA
GPA14/SCL
AVSS_PLL_2
VLFQ
AVD33_PLL
VLFM
AVSS_PLL_1
VCCA
VSSA
VCCAX
C267
100n
10V
R190
33R
33R
R182
OUT4
IN4
C278
100n
10V
C139
NC1
DVB_CVBS 3V3_SDRAM_DVB
MD0
3V3_SDRAM_DVB
MD1
MD2
DVB_PR
11
GND
33R
R186
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MCLK
VDD33_1
VSS_1
MA12/GPOC11
MA11/GPOC10
MA9
MA8
MA7
MA6
MA5
MA4
MWE#
VDD18_1
CAS#
RAS#
BS0
BS1/GPOC12
MA10
MA0
MA1
MA2
MA3
HA14/GPOF14
HA13/GPOF13
HA12/GPOF12
HA11/GPOF11
HA10/GPOF10
HA9/GPOF9
HA8/GPOF8
HA7/PD7/GPOF7
HA6/PD6/GPOF6
HA5/PD5/GPOF5
HA4/PD4/GPOF4
HA3/PD3/GPOF3
HA2/PD2/GPOF2
HA1/PD1/GPOF1
HA0/PD0/GPOF0
R921
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
R919
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
R920
33R
R1 8
R2 7
R3 6
R4 5
R923
33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
MPEG_TS_OUT_VALID
1
2
3
4
U104
CT216T-R
VCC
R457
75R
R454
75R
R455
75R
R456
75R
R462
75R
R307
4k7
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MCLK_SDRAM
C715
10p
50V
12
OUT3
390p
50V
FMS6145
ENC_Y
GPG1
GPG2
GPG3
GPG4/SD_PWE
GPG6/MS_INS
GPC13/SD/MMC_PWE
GPA10/SD/MMC_WP
GPB13/SD/MS_D1
GPB12/SD/MMC_DAT
GPC14/SD/MMC_CLK
GPB11/SD/MMC_CMD
GPB15/SD/MS_D3
GPB14/SD/MS_D2
GPC2/UART1_TX/SC0CLK
GPC3/UART1_RX/SC0DAT
GPC5/SC0PWR
GPC4/SC0RST
GPA3/SC0CD
GPC6/TX2/SC1CLK
GPC7/RX2/SC1DAT
GPC9/SC1PWR
GPC8/SC1RST
GPA13/SC1CD
VDD18_3
GPB7/IR
GPB5/DSPLYDAT
GPB6/DSPLYCLK
VDD33_4
GPB0/TX1/DSPLYCM0
GPB1/RX1/DSPLYCM1
GPB2/DSPLYCM2
GPB3/DSPLYCM3
GPB4/USB_DRVVBUS
GPB8/USB_DRVVBUS
GPB9/HSYN/KEYDET1
GPB10/VSYN/KEYDET2
HALE/GPOF20
HA17/CI1OE#/GPOF17
HA16/CI1IORD#/GPOF16
HA15/GPOF15
HWR#/CIWE#
HRD#/CI0OE#/GPOF21
HWAIT/GPF22
GPF26/CI1CD#
GPF24/CI0CD#
GPF27/CI1CE#
GPF25/CI0CE#
GPF30/CI0IORD#
GPF31/CIIOWR#
GPA9/CI1INT#
GPA8/CI0INT#
GPF23/CIREG
GPF29
GPF28
3V3D_DVB
U139
330R
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
R406
10k
3V3D_DVB
5V_VCC
10
IN3
1
2
3
4
DSU_RXD0
13
OUT2
F138
UART0_RXD0
IN2
SDRAM
75R
C124
MPEG_TS_OUT_CLK
DSU_TXD0
ENC_PB
14
27p
50V
4 R4 5
OUT1
8
U134
MT48LC4M16A2TG8E
330R
UART0_TXD0
ENC_PR
IN1
C297
FUM_EN
3 R3 6
R375
10k
C251
100n
10V
1
2
3
4
R308
4k7
DVB_IRQ
F130
1
5V_VCC
ENC_CVBS
FUM_EN
MPEG_TS_OUT_SYNC
1V8D_DVB
2 R2 7
3V3D_DVB
DVB_RXD
DVB_TXD
DVB VIDEO FILTER&AMPR461
R435
33R
R1 8
R2 7
R3 6 R436
R4 5 33R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
MPEG_TS_OUT_D0
CI_PWR_CTRL
CN109
33R
1 R1 8
CI_WE
CI_OE
CI_WAIT
CI_RST
CI_CD
CI_CE
CI_IORD
CI_IOWR
CI_IREQ
CI_REG
FUM Interface
R180
CI CONTROL SIGNALS
TP121
A3
SCH NAME :DVB MPEG DECODER & SDRAM
SHEET:9 OF:11
DRAWN BY :ULAS DERELI
4-28-2008_15:57
AX M
12V_INV
6V3
100u
C642
10u
25V
C660
220n
25V
R873
22k
MECH_SWITCH
R846
10R
33k
R883
220n
25V
R882
33k
2
1
220n
25V
TP195
TP196
1
12V_STBY
FS103
1
6V3
100u
60R
R798
47R
1
2
7A/32VDC
S245
27
1
1
L106
D144
28
SS33
C565C566
22u 22u
16V 16V
ADAPTER OPTIONS
R880
33k
2
1
MOSFET_CONTROL
5V_STBY
17PW26 CONNECTOR
C670
10n
16V
S227
12V_STBY
C663
C671
220n22u
25V 16V
R818
4k7
C634
100n
10V
C674
22u
16V
1
2
3
4
BS
IN
SW
GND
SS
EN
COMP
FB
L116
2
ADAPTER AND IPS15 OPTIONS
5V_VCC
18
17
3V3_VCC
12V_STBY
16
15
12V_STBY
14
13
5V_STBY
12
11
12V_VCC
10
NC
3V3_STBY
R476
1k
C307
100n
10V
F147
VDDC
1
330R
C410
MECH_SWITCH
1V26_STBY
R336
33k
STBY_ON/OFF_NOT
C5V6
10u
10V
D120
R378
10k
R796
47R
C5V6
R337
33k
220n
25V
C436
10u
25V
C452
2
1
STBY_ON/OFF
VDDP
BACKLIGHT_ON/OFF
330R
1
F146
1
3V3_STBY
C408
PAULO DECOUPLING
CAPACITORS
10u
10V
C673C672
22u 22u
16V 16V
4A/24VDC
TP145
VOUT
GND
Q105
FDC642P
C470
47u
16V
DIMMING
R345
4k7
R344
4k7
R343
4k7
R342
4k7
8V_VCC
CN126
R866
10k
NC
3V3_VCC
3V3_STBY
12V_VCC
TP143
OUT 2
D157
3 IN
FS105
D174
C5V6
D156
U122
LM1117
C5V6
100n
16V
17PW26 OPTIONS
1
12V_AUDIO
S222
12V_STBY
R411
2k
3V3_STBY
2
3V3_VCC
15u
SS33
19
R803
3k9
5n6 C666
50V
D164
20
100n
10V
1
8
7
6
5
5V_VCC
C677
1
Q164
BC848B
U148
MP1583
15u
R797
47R
TP211
26
25
C635
24
23
TP201
R865
10k
22
100n
16V
R881
33k
21
C567
22u
16V
5n6 C518NC
50V
12V_VCC
20
8
7
6
5
R790
30k
SS
EN
COMP
FB
19
TP200
C662C568
220n 22u
25V 16V
BS
IN
SW
GND
18
1
2
3
4
17
S211
220n
25V
12V_AUDIO
12V_STBY
5V_STBY
TP202
12V_VCC
16
15
C358
10n
16V
12V_STBY
5V_VCC
5V_STBY
C668
14
100n
10V
R244
3k9
C599
TP210
12V_STBY
U137
MP1583
TP198
R878
1k
TP197
Q157
FDC642P
13
12
11
3V3_VCC
10
TP157
TP199
Q163
BC848B
5V_VCC
MOSFET_CONTROL
C506
C507
12V_AUDIO
R817
4k7
C633
100n
10V
C519
R886
2k
R854
15k
24V_VCC
2
24V_VCC
C667
R874
22k
7A/32VDC
7A/32VDC
TP209
12V_PSU
JK103
3V3_VCC
C659
220n
25V
Q156
FDC642P
R847
10R
CN117
FS102
F241
FS104
12V_PSU
4
5V_VCC
12V_STBY
12V_VCC
Q155
IRF7314
5
2
R339
4k7
R340
4k7
R341
4k7
C669
A/D DIMMING SELECTION
30V_VCC
C18V
D175
C308
100n
10V
17IPS17 CONNECTOR
MOSFET_CONTROL
S241
STBY_ON/OFF
F145
1
3V3_STBY
AVDD_33
330R
10u
10V
MOSFET_CONTROL
Q138
BC848B
C409
R338
4k7
C310
100n
10V
S243
C306
100n
10V
STBY_ON/OFF_NOT
PROTECT_PANEL
SHORT CCT PROTECTION
BC848B
1
TP142
1
12V_AUDIO
U121
LM1117
3V3_VCC
3 IN
60R
1
PANEL SUPPLY SWITCH

Q139
BC848B
F222
C406
R575
10k
C309
100n
10V
R702
33k
GND 2
U144
FB 1
1
2
1V26_STBY
2
4u7
2
C575
22u
16V
GND
1
S134
OUT 2
1V8_VCC
VOUT
4
C579
22u
16V
NC
R124
160k
180K olacak
C535
C543
100u
16V
5 VINA
1n
50V
TP147
MP2112
10u
10V
SW 3
24V_VCC
C576
22u
16V
6 EN
PANEL_VCC_ON/OFF
R562
10k
R205
47R
C578
22u
16V
R566
33k
33k
R707
33k
R709
C636
100n
10V
4 VINB
C665
220n
25V
D137
BAW56
1
C641
10u
25V
R249
200k
1
2
D136
BAW56
1
PROTECT
R563
10k
L110
2
10k
R568
R570
10k
1
2
Q151
BC858B
R564
10k
S210
12V_VCC
3V3_STBY
R699
33k
60R
R700
33k
R705
33k
5V_VCC
Q104
FDC642P
PANEL_VCC
F172
12V_VCC
C661
220n
25V
60R
6
C637
100n
10V
F171
1
C455
100u
25V
4
R565
10k
C664
220n
25V
60R
5V_VCC
12V_INV
1
10
S239
TP150
60R
F170
5V_TUN
3V3_VCC
TP238
5V_STBY
3V3_VCC
10k
R569
11
3V3_STBY
TP237
F169
1
INVERTER SOCKET
CN127
S240
Q136
DIMMING
8V_VCC
TP149
R706
33k
R721
100R
2
2
10k
R571
TP236
PANEL_VCC
220n
25V
BC848B
BACKLIGHT_ON/OFF
R708
33k
C618
D135
BAW56
Q137
R410
47R
S228
A3
SCH NAME :MB25 POWER
SHEET:10 OF:11
4-28-2008_15:57
AX M
GND15 244
C312
100n
10V
U138
MST6WB7GQ-3
VDDC4 245
VDDC
TP212
CN103
19" TO 22" FFC OPTIONS
LVA4P 246
RX_B_0_P
CN105
1
RX_B_0_N
RX_B_0_N
TP213
RX_B_1_N
LVA3M 249
RX_A_3_N
RX_B_1_P
RX_B_1_N
LVACKP 250
RX_A_CLK_P
RX_B_2_N
RX_B_1_P
LVACKM 251
RX_A_CLK_N
RX_B_2_P
RX_B_2_N
RX_B_2_P
LVDS CABLE
TP214
TP215
TP216
TP217
LVA1P 254
RX_A_1_P
RX_B_CLK_P
LVA1M 255
RX_A_1_N
RX_B_3_N
LVA0P 256
RX_A_0_P
LVA0M 257
RX_B_3_P
RX_A_0_N
VDDP6 258
RX_A_0_P
VDDP
RX_A_0_N
RX_A_1_N
15
RX_A_1_P
16
RX_A_2_N
RX_B_CLK_P
RX_A_2_P
19
RX_B_CLK_N
RX_A_CLK_N
20
LVB2P 266
RX_B_2_P
RX_A_CLK_P
21
LVB2M 267
RX_B_2_N
RX_A_3_N
22
LVB1P 268
RX_B_1_P
RX_A_3_P
23
LVB1M 269
RX_B_1_N
LVB0P 270
RX_B_0_P
LVB0M 271
RX_B_0_N
PANEL_VCC
S152
S140
S151
TP223
TP224
TP225
TP226
RX_A_1_N
10
11
12
13
14
17
18
RX_A_CLK_N
19
20
BACKLIGHT_ON/OFF
TP235
TP234
15
16
17
18
19
20
21
22
21
22
OPTION1
RX_A_3_N
23
24
OPTION2
RX_A_3_P
25
26
OPTION3
28
29
30
S132
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
OPTION1
43
44
OPTION2
45
46
OPTION3
47
48
49
50
10k
R902
10k
R901
3V3_VCC
3V3_VCC
MEGA_DCR_OUT
TP227
TP233
RX_A_2_N
1
RX_A_CLK_P
TP230
RX_A_3_N
TP229
RX_A_3_P
TP228
25
27
PANEL_VCC
S133
BACKLIGHT_ON/OFF
RX_A_CLK_P
MEGA_DCR_IN
1
14
RX_A_CLK_N
S135
12
13
16
RX_A_2_P
11
RX_A_2_P
26
10
RX_A_1_P
24
2
RX_A_1_P
15
RX_A_1_N
RX_A_2_N
18
LVBCKM 265
RX_B_3_P
17
RX_B_3_N
TP222
RX_A_0_P
LVBCKP 264
RX_A_0_N
RX_A_0_P
C311
100n
10V
13
RX_B_3_P
LVB3M 263
TP221
RX_B_3_N
14
LVB4M 261
LVB3P 262
RX_B_3_P
RX_B_CLK_P
CN108
12
TP220
RX_B_CLK_N
11
RX_A_0_N
GND16 259
LVB4P 260
9
10
RX_B_CLK_N
S141
RX_A_2_N
LVA2M 253
RX_A_2_P
PANEL_VCC
LVA2P 252
1
1
RX_B_0_P
RX_A_3_P
S191
LVA3P 248
S190
LVA4M 247
27
PANEL_VCC
28
29
PANEL_VCC = 5V
30
PANEL_VCC
OPTION3
3V3_VCC
PANEL_VCC
CN102
10
13
16
19
20
21
22
PANEL_VCC = 5V/12V
R580
10k
R581
10k
R903
10k
S153
2
RX_A_0_N
RX_A_0_P
RX_A_1_N
RX_A_2_N
RX_A_1_P
RX_A_2_P
RX_A_CLK_N
RX_A_CLK_P
F148
330R
R578
10k
R579
10k
RX_A_3_N
F149
330R
RX_A_3_P
11
12
14
23
15
S147
24
17
S150
18
S149
25
26
27
28
29
30
CN101
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PANEL_VCC
PANEL VCC = 5V/12V
PANEL_VCC
R582
10k
3V3_VCC
3V3_VCC
S146
S148
R577
10k
OPTION1
3V3_VCC
3V3_VCC
OPTION2
26" TO 32" FFC OPTIONS

1
A3
SCH NAME :LVDS INTERFACE
SHEET:11 OF:11
4-28-2008_15:57
AX M
S245
10
11
18
20
22
2
24
4
26
6
28
8
30
10
12
32
34
14
16
36
18
38
20
40
22
42
44
24
26
46
28
48
30
50
S236
L119
FS101
C658
CN115
10
11
12
R421R528
R276 R831
R345
R344
C636
20
18
16
14
12
10
F247
11
13
15
17
19
21
1
23
3
25
5
27
7
29
9
31
11
33
13
35
15
37
17
39
19
41
21
43
23
45
25
47
27
49
29
R790
R878
C518
C599
R244
C519
FS102
R700
C694
U131
S149
S150
C455
S147
R642
C114
R830
R531
12
11
10
C688
R892
C668
R880
R566
C634
C711
F150
25
26
27
28
29
30
31
32
33
34
35
36
U150
C331
R416
C441
C643
E
1
C436
Q126
Q147
R587
R589
1
C198
R119
D
2
14
R637
13
R638 C442
12
D169
11
C140
R255
15
16
R541
C595
R236
R123
C371
17
Q150
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
C213
18
19
21
D171
20
C103
C181
R261
R262
Q128
B
R282
R280
CN110
2
R601 C480
C497 F209
D124
D127
2
C489 D159 D158
R410
R721
C673
C672
Q117
R163
C632
R862
S228 R863
R864
R816
R815
C656
C601
R307
16
15
10
11
12
13
14
11
12
13
14
15
C366
11
13
15
17
19
21
23
25
27
29
31
33
C183
U130
S126
S127
S128
10
10
12
14
16
18
20
22
24
26
28
30
32
34
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
3
2
R829
S217
R506
U112
R584
X104
Z102
1
2
8
7
6
1
U114
C344
D135
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
20
21
C491
C429
R392
R257
R502 R504
U123
R624
R482
TH101
C359
Q115
F234
R408 Q102
1
R151 R659
R404
R150
R658
R396 R629 R492

Q123 R491 R393
S105
R460
C470 U122
D147
R706
R674 R569
R467
R221
1
D146
C420
C151
U138
2
2
R373
8
7
2
1
R926
R925
R435
U104
R448
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
R449
R436
C416
C425
R512
TU102
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
20
21
R132
R131
R180
C435
C427
C426
C490
C428
C433
C422
C423
R140
R147
R148
R403
R149
R141
R144
R145
R876
R808
R875
R843 D165
1
R683
R664
R655
S112
R657
R656
R649
R652
R653
10
11
12
13
14
15
16
10
U115
R809
C717
C716
10
11
12
C520
L114
2
R851
R850
F140
R440
F151
C147
U129
D145
F187
R682
R627
R183 R447
C510 CN109
R406
C131 C130 C129R253
R210 R500
C547
Q140
C546 C654
C467
1
R919
R434
C257
1
C243
C715
R315
C245 R923
1 R190
R182
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
C368 C369 C363 C364 C361
Z101 R748 C447 R110 C446

C144
S116
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
C294
C159 C143 R687

R134 C430
C150
R133 C431 R152
C152
R660
R412 C419
Q101
R402
C326
R356
D167
2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
C343 C336 C338 C340

C342 C337 C339
C341
R686
L110
C175 C149
C178 S106
C308
U103
F236
Q160
Q168
R288
R268
C105
R308
R810 R814
R124 R811 R813
R812
S134
C410
C665
CN133
F146 C408
C576
C578 C535
149
150
Q105
C203
R546
1
2
R917
C197
R588
R499 C196
R361
R243
L116
Q136
SW107
R796
R337
C199
D174
R336
R911 R908
R927R900
C461
R562
R279
R524
C155
C176
R291R161 R287 R165
C312
R292 R162 R286 R827
R289 R275
R290
D
C511
R294
R802 R801 R153
Q133
R522 R521
R689
R888
U117
R542
R675
R729 C453
R736
1
R684
R685 C327 C367
10
S122 Q127
S121
R563 R565
C663 U148
R484
F:\MENTOR_SASELER\17mb25-1\pcb\pcb.pcb - Page 1 of 1 pages.
D168
R217
R690 1
R581 S242
R580 S238
R905
F126
C702
R854
1
SW105
C184 R535 F124 C157

C195
R912 R536
R370
R578 R369 C501
C193
R579
C469
R742
C156
160708
C691
D136 R564 Q151
R881
Q139
C701
R898C689 C690 C685
C365
R405
D137
F170 Q157
F197C484R219F196
D173 C440 R639
F194
F169
SW104
--------
C120
R677 R691 C374
C512
R894
S124
2
D176
Q156
F172
R265
S241
R267
S243
R343
R608
R817
R883
R798
R882
R397
C664
C659 R699 Q104
C707
SW103
R418
C693 R887R893
R897
R895
C695
C696
30
29
28
27
26
25
24
30
23
29
22
28
21
20
27
26
19
25
18
17
24
16
23
22
15
21
14
20
13
19
12
18
11
10
17
16
9
15
8
14
7
6
13
12
5
11
4
10
3
9
2
8
1
7
6
5
4
3
2
1
R417
R846
C667
C700
C698
R865
5
F245 R603
F246 R605
R606 F195 D103 F198 C477R607C493
C495
C651 C494
F244 C650
R896
F252
F253
S152
Q125
2
Q137
R708
R118
1 1
U137
D144
C662
C375 4
R213 U118
C475
F242 C648
1
R498
R692
C682 F254
Q124
F251
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FS103
D175
R340
R342
D156
2
2
C626
D120
C706
L120
L118
R129
C653
C637
10
19
17
12
14
15
13
16
18
11
20
9
22
7
24
5
26
3
28
1
CN130
F243 C649
11
13
15
17
19
21
23
25
27
CN126
16
R577
14
R582
12
S146
10
S190
8
S191
6
S141
4
S133
2
R901
R902
S132 L121
SW106
SW101
S235
CN127
TOP
CN108
CN105
D157
D163
S148
CN111
Q130
Q148
R277
R422
Q149
R381
C652
1
2
1
2
S118
Q131
S119
S117
S125
D160
2
2
1
2
1
C492
C478
C683
C681
R382
2
1
2
1
C633
1
3
2
OO
1
2
Q163
F250
C641
C661
S135
R872 C628 C640

R861 R805
C704
1
1
2
2
1
1
2
2
2
3
CN117
R339
1
2
R341
2
1
C705
2
2
1
2
1
C680
R571
2
7
2
1
1
F241
6
F248
C630
R793
1
2
2
1
5
4
S151 S140
8
1
1
1
1
C507 C506
R847
2
1
1
7
6
3
6
1
2
1
7
2
8
2
5
4
CN102
R874
R283 R873
C697
1
CN103
S153
R903
1
2
2
2
C687
C699
1
2
2
1
46
15
C121
R678
43
18
2
5
R263
R694
2
7
2
3
6
3
4
5
4
1
8
1
2
1
2
2
1
2
4
2
S229
R891
1
48
13
1
44
17
1
2
C642
5
4
3
4
S211
C567
C568
2
1
2
40
21
C709
1
Q166
R890
2
41
20
D162
2
5
1
2
D161
42
19
1
1
1
2
1
2
1
2
1
37
24
Q155
1
1
2
3
1
38
23
1
39
22
2
47
14
2
1
2
1
45
16
2
1
1
1
1
1
C358
2
1
1
1
FS104
C660
C618
CN101
25
1
23
2
2
1
2
1
1
2
JK103
C703
C692
R738
C335
R155
1
C372
S230
R414
Q121
2
JK105
2
1
C108
R596
D140
2
1
21
2
27
R205
22
32
24
31
2
1
2
16
2
26
29
28
F171
20
35
34
2
33
2
1
F148
1
2
30
F149
3
4
3
1
2
Q164
6
1
1
5
2
18
37
19
R338 R886
C310 R866
Q138 C666
C677
R803
C635
R223 C549 R222 C548
R227 C553 R226 C552
R224 C550 R225 C551
R228 C555 R229 C554
R366
R365 U132
R368
4
F217
R413
C332
R739
2
36
17
38
15
39
14
41
40
R360
R910
1
2
2
1
2
1
3
1
2
2
1
C710
1
2
R904
Q167
1
2
1
1
2
R367
C684
2
2
1
R676
C119
R737
1
2
3
2
2
1
1
2
1
1
2
L106
1
1
R707
R709 C565
R570
R705
C566
1
R797
2
1
R818
2
1
S222
S227
1
2
1
1
1
1
13
12
43
42
10
11
44
46
1
2
1
C674
2
7
C208
D166
R103
R105
R828
C712
C204
2
45
C210
2
3
6
7
48
47
2
1
S237
3
1
2
2
C671
R568
2
2
1
2
1
8
1
2
5
2
1
1
2
2
1
1
1
2
1
2
1
2
1
1
2
1
2
2
1
2
1
2
2
1
1
1
2
2
1
1
2
1
1
54
C189
R353 C530
R352 R233
S123 R745
5
R293
C212
2
53
2
50
2
4
5
49
1
3
6
51
C186
8
1
2
7
52
4
5
3
6
2
7
1
8
8
1
2
5
4
D164 S239
S240
C406
F222
R232R234
C529C531S210
7
2
F162
2
1
R104
5
4
C383
R355
R354
144
145
1
6
3
2
1
C708
Q132
Q120
2
2
1
1
1
2
137
2
7
2
1
8
C173
1
2
JK101
148
C670
2
1
2
1
1
2
4
1
2
C330
R415
1
2
JK104
143
228
227
226
1
1
D116
R643
C107
R641
D117
R644
D115
142
2
1
C311
1
2
139
232
1
2
146
225
1
2
140
231
1
8
F157
F163
F147 C579
1
2
141
230
229
C627
R804
1
2
R278
R722
135
236
2
7
1
6
3
2
5
4
1
2
2
2
147
224
223
C462
R586
C200
FS105
138
233
R909 R915R916
2
2
2
136
235
234
1
2
1
2
1
2
R120
1
2
C118 F219
2
1
1
2
R216
F205
F207
F204
R464
C116
S120
R164
2
1
2
1
F215
C104
R640
D111
R128
D106
2
2
1
2
1
2
C309
R575
C202
1
2
2
1
2
134
133
C201
C194
R296
S244
R271
R270
132
239
238
237
2
2
1
1
2
1
2
C488
127
2
125
R702
C543
123
F249
R856
C631
R857
1
1
1
1
1
2
2
122
3
1
121
1
2
2
1
2
118
1
128
243
1
124
247
246
2
126
245
244
2
120
251
250
249
248
1
131
R357 R295
R906
129
242
2
117
254
1
119
252
2
130
241
240
1
116
255
253
2
1
R242
S216
R400
C229
2
1
R284
Q158
SC101
F208
1
8
214
1
8
8
1
215
216
7
2
6
207
R600
1
2
1
2
196
1
2
1
2
1
199
2
4
1
2
C575 R249
U144
R757
R274
3
1
115
2
112
1
109
195
C645
CN131
2
194
2
106
C307
R907
113
258
2
114
257
1
111
256
2
108
262
2
110
261
260
259
1
107
264
F118
2
105
266
265
2
1
2
1
1
2
263
2
1
2
2
1
2
1
1
2
1
2
1
1
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4
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C122
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C123 C471
2
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2
C625
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F211
2
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TOP
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C385
1
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C473
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C675
C675
1
C541
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CN128
1
2
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C624
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2
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1
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C502
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C273
C619
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JK107
JK102
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F133
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C678
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C296
C678
C352
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F135 R320 R320
C265
C249 C250 R762

2
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C122 R423
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TP120
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TP106
TP156
TP152
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TP104
TP102
TP103
TP105
TP207
TP164
TP142
TP111
TP110
TP108
CN110
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TP112
TP150
CN133
TP145
TP211
TP118
TP117
TP116
JK105
JK101
JK104
SC101
CN118
CN119
CN122
TU102
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TP153
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CN121
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TP204
TP154
TP155
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CN109
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CN131
TP221
TP223
TP115
TP114
TP113
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TP224
TP226
TP233
TP235
TP229
TP210
TP209
TP157
TP237
TP220
TP222
TP212
TP238
TP236
TP240
CN115
TP213
TP215
TP217
TP196
TP200
TP197
CN126
TP195
CN130
TP241
TP198
TP199
TP216
TP149
TP214
TP225
TP227
TP234
TP230
TP228
TP201
TP202
TP239
SW101
CN117
CN111
JK103

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1. INTRODUCTION..................................................................................................................

1.1 General description of TDTC-G101D:

1.2 Features of TDTC-G101D:

Digital Half-NIM tuner for COFDM

Including IF AGC with SAW Filter

1.3 Pin Configuration

3. AUDIO AMPLIFIER STAGE WITH TPA3101

3.2 Features of TPA3101

10-W/ch into an 8- Load From a 13-V Supply

3.3 Pin Configuration of TPA3101

Video IF for Multi-Standard Analog TV

5. INTEGRATED DVB-T RECEIVER (CHEERTEK)

Video Decoding and Processing

Memory card reader with SD, MMC, and MS interfaces

6. 4MX16 BIT SYNCHRONOUS DRAM (SDRAM)

Fast access time from clock: 4.5/5/5.4 ns

6.3 Pin Configuration

7. 512K CMOS SERIAL FLASH MX25L512

8. 16MX16 BIT SYNCHRONOUS DRAM (SDRAM)

TV IF audio filter with two channels

9.1.3 Pin Configuration

9.1.4 Frequency Response

Frequency Response of Channel 2:

9.2 IF Filter for Video Applications Epcos K3958M

TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz

9.2.3 Pin Configuration

9.2.4 Frequency Response

10. POWER STAGE

Very Low Power Consumption

Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

- Industrial (I): -40C to +85C

12. SERVICE MENU SETTINGS

12.1. Video Setup

An. USB Prescale <.......> Value between 0 to 255

12.3. Service Scan/Tuning Setup

16.5. External Source Settings

16.7. NVM Edit

DSUB9 Download <.......>

13. SOFTWARE UPDATE DESCRIPTION

Bit per second: 115200

Figure 1. The Sample Output Before Sending The File

Bit per second: 9600

Figure 2. The Programming Service Menu

Figure 3. Xmodem Menu

Figure 4. The Starting To Send

16.2 17MB25 HDCP key upload procedure.

13.3 17MB25 Digital Software Update From SCART

COM Properties Window

Software Updating Procedure

The Sample Output Before Sending The File

6. Click the Send button on the HyperTerminal

File and Protocol Selection Window

Capture of Receving Data Failing

9. When sending the file the following window must be seen.

Capture of Sending Process

Capture of End of The Sending Process

End of The Sending Process

Checking Of The New Software

13.4 17MB25 Digital Software Update From USB

An. USB Prescale <.......> Value between 0 to 255

16.3. Service Scan/Tuning Setup

16.5. External Source Settings

16.7. NVM Edit