UNIT II: PROGRAMMING OF 8085 PROCESSOR

Contents:
Instruction format-addressing mode-assembly language format-data transfer, data
manipulation and control instructions-programming: loop structure with counting
& indexing-lookup table-subroutine instructions-stack.
INSTRUCTION FORMAT:
An instruction is a command to the microprocessor to perform a given task on a
specified data. Each instruction has two parts: one is task to be performed, called
the operation code (op-code), and the second is the data to be operated on, called
the operand.
The operand (or data) can be specified in various ways. It may include 8-bit (or 16bit ) data, an internal register, a memory location, or 8-bit (or 16-bit) address. In
some instructions, the operand is implicit.
Instruction word size
The 8085 instruction set is classified into the following three groups according to
word size:
1. One-word or 1-byte instructions
2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions
In the 8085, "byte" and "word" are synonymous because it is an 8-bit
microprocessor. However, instructions are commonly referred to in terms of bytes
rather than words.

One-Byte Instructions

A 1-byte instruction includes the op-code and operand in the same byte.
Operand(s) are internal register and are coded into the instruction.
For example:

These instructions are 1-byte instructions performing three different tasks.

In the first instruction, both operand registers are specified.
In the second instruction, the operand B is specified and the accumulator is
assumed.
Similarly, in the third instruction, the accumulator is assumed to be the implicit
operand.
These instructions are stored in 8- bit binary format in memory; each requires one
memory location.
Two-Byte Instructions
In a two-byte instruction, the first byte specifies the operation code and the second
byte specifies the operand. Source operand is a data byte immediately following
the op-code. For example:

Assume that the data byte is 32H. The assembly language instruction is written as

MVI A, 32H----------- 3E 32H

The instruction would require two memory locations to store in memory.
Three-Byte Instructions
In a three-byte instruction, the first byte specifies the op-code, and the following
two bytes specify the 16-bit address.
Note that the second byte is the low-order address and the third byte is the highorder address.
Three byte instructions op-code + data byte + data byte
For example:

This instruction would require three memory locations to store in memory.

ADDRESSING MODE:
The addressing mode defines the way in which the operand of instructions can be
accessed. The different way that a microprocessor can access the data are referred
to as addressing modes the 8085 has 5 addressing modes
Immediate addressing
Register addressing
Direct addressing
Indirect addressing
Implied addressing

1. Immediate addressing mode:

In an immediate addressing mode 8 or 16 bit data can be specified as a part of
instruction. In 8085 the instruction having I letter fall under this category. I
indicates immediate addressing mode.
Example:
MVI A, 20H

: Moves 8 bit accumulator data (20H) into accumulator.

MVI M, 30H

: Moves 8 bit immediate data (30H) into the memory location

Pointed by HL Register pair.

LXI SP, 2700H

: Moves 16 bit immediate data (2700H) into stack pointer.

LXI D, 10FFH

: Moves 16 bit immediate data (10FFH) into DE register pair

(D=10H and E=FFH).

2. Register addressing mode:

The register addressing mode specifies the source operand, destination operand or
both to be contained in an 8085 registers. This results in faster execution since it is
not necessary to access memory locations for operands.
Example:
MOV A, B : moves the contents of register B into the accumulator.
SPHL

: moves the content of the register pair into the stack pointer.

ADD C

: adds the contents of register C into the contents of accumulator and

Stores result in the accumulator.

3. Direct addressing mode:

The direct addressing mode specifies the 16 bit address of the operand within the
instruction itself. The second and third bytes of instruction contain this 16 bit
address.
Example:
LDA 2000H

: loads the contents of (8 bit) memory location 2000H into the

accumulator.

SHLD 3000H

: stores the HL register pair into two consecutive memory

Locations. Lower byte ie., the contents of L register into
Memory location 3000H and higher byte at H register into
Memory location 3001H.

4. Indirect addressing mode:

In indirect addressing mode the memory address where the operand located is
specified by the contents of a register pair.
Example:
LDAX B

: loads the accumulator with the contents of memory location pointed

By BC register pair.
MOV M, A : stores the contents of accumulator into the memory location pointed
By the register pair.
5. Implied addressing mode:
In implied addressing mode op-code specifies the address of the operands.
Example:
CMA : complements contents of accumulator.
RAL : rotates the contents of accumulator left through carry.
ASSEMBLY LANGUAGE FORMAT
INSTRUCTION SET:
The instructions provided by the 8085 can be categorized into five different
groups based on the nature of function of the instructions
DATA TRANSFER OPERATIONS
DATAMANIPULATION
Arithmetic operations
Logical operations
CONTROL INSTRUCTIONS
Branch operations
Stack, input/output and machine control operations

Data transfer instructions:

Data transfer instructions are used to move data between registers, register pairs
and between memory and registers. These instructions are described below
MOV r1, r2 (Move register); (r1) (r2); The contents of register r2 are moved to
register r1
EX.; MOV A,B ; (A) (B)

MOV r, M (Move from memory); (r) ((H) (L)); The contents of the memory
location where address is in the registers H and L
are moved to register r.
EX.; MOV A,M ; (A) (M)
MOV M, r (Move to memory); ((H) (L)) (r) ; The contents of register r are
moved to memory location whose address is in
registers H and L.
EX.; MOV M,A ; (M) (A)
MVI r, data (Move to register immediate); (r) (byte 2); The contents of byte 2
of the instruction are moved to register r.
EX.; MVI B,45 ; (B) 45H
MVI M, data (Move to memory immediate); ((H) (L)) (byte 2) ;The contents of
bytes 2 of the instruction are moved to the memory
location where address is in the registers H and L.
EX.; MVI M,45; (M) 45H
LXI rp, data 16 (Load register pair immediate); (rh) (byte 3) (rl) (byte 2)
Byte 3 of instruction is moved to the higher order register
and byte 2 of instruction is moved to the lower order
register.
EX.; LXI D, 8152 ; (DH) 52 (DL) 81
LDA addr (Load accumulator direct) ; (A) ((byte 3) (byte 2)) ; The contents of
memory location where address is specified by byte 2 and byte
3 of the instruction are moved to register A.
EX.; LDA 8152 ; (A) ((8152))

STA addr (store accumulator direct) ; ((byte 3) (byte 2)) (A) ; The contents of
the accumulator are moved to the memory location where
address is specified in byte 2 and byte 3 of the instruction
EX.; STA 4285H ; (4285) (A)
(L) ((byte 3) (byte 2))
(H) ((byte 3) (byte 2) +1)
EX.; LHLD 4155; (L) (4155)
`
(H) (4156)

LHLD addr (load h and L direct);

SHLD addr (store H and L direct);

((byte 3) (byte 2))

(L)
((byte 3) (byte 2) +1) (H)

EX.; SHLD 4155; (4155) (L)

(4156) (H)
LDAX rp (load accumulator indirect) ; (A) ((rp)) ; The contents of the memory
location where address is in the register pair rp are moved
to register A.
If rp=B (register B and C)
If rp=D (register D and E)
EX.; LDAX B ;

If B=34 and C=41 then (A) ( 4134)

STAX rp (store accumulator indirect) ; ((rp)) (A) ; The contents of register A

are moved to the memory location whose address is in
the register pair rp
EX.; STAX B;

If B=34 and C=41 then (4134) ( A)

XCHG (exchange H and L with D and E) ; (H) (D)

(L) (E)
EX.; XCHG

Arithmetic instructions:

This group of instructions is used to perform arithmetic operations on data stored

in registers and memory. The operations that can be performed are Add, Subtract,
Increment, Decrement, etc. the arithmetic instructions are given below
ADD r (add register)
(A) (A) +(r)
The contents of register r are added with the contents of accumulator. This result is
placed in the accumulator
ADD m (add memory)
(A) (A) + ((H) (L))
The contents of the memory location where address is contained in H and L
registers are added to the contents of accumulator and the result is placed in the
accumulator
ADI data (add immediate) ; (A) (A)+ (byte 2) ; The contents of second byte of
the instruction are added to the contents of the
accumulator and the result is placed in the accumulator
ADC r (add register with carry) ; (A) (A)+(r)+(CY) ; The contents of register r
and the content of CY flag are added to the
contents of the accumulator and the result will be
placed in the accumulator
ADC M (add memory with carry) ; (A) ((H) (L))+((CY))
ACI data (add register with carry) ; (A) (A)+(byte 2)+(CY) ; The contents of
the second byte of instruction and the contents of
CY flag are added to the contents of accumulator
and the results will be placed in the accumulator
SUB r (subtract register) ; (A) (A)-(r) ; The contents of register r are subtracted
from the accumulator content and the results are placed
in the accumulator
SUB M (subtract memory) ; (A) (A)-((H) (L))
SUI data (subtract immediate) ;

(A) (A)-(byte 2)

SBB r (subtract register with borrow) ; (A) (A)-(r)-(CY)

SBB m (subtract memory with borrow) ; (A) (A)-((H) (L))-(CY)

INR r (increment register) ; (r) (r)+1 ; The contents of register r are
incremented by one. Note that all condition flags except
CY are affected
INR m (increment memory) ; ((H) (L)) ((H) (L))+1; The contents of memory
location whose address is contained in the H and L
registers are incremented by one
DCR r (decrement register) ;

(r) (r)-1

DCR m (decrement memory) ; ((H) (L)) ((H) (L))-1

INX rp (increment register pair) ; (rh) (rl) (rh)(rl)+1; The contents of the
register pair rp are incremented by one
DCX rp (decrement register pair) ; rh)(rl)
DAD rp (add register pair to H and L) ; (H)(L)

(rh)(rl)-1

(H)(L)+(rh)(rl)

DAA (decimal adjust accumulator)

The 8 bit number in the accumulator is adjusted to form two 4 bit binary
coded decimal (BCD) digits by the following process.
If the value of the least significant 4 bits of the accumulator is greater than 9
or if the AC flag is set 6 is added to the accumulator.
If the value of the most significant 4 bits of the accumulator is now greater
than 9 or if the CY flag is set 6 is added to the most significant 4 bits of the
accumulator.
Logical Instructions:
These instructions are used to perform logical operations on data in registers
and memory. The operations that can be performed are AND, OR, exclusive OR,
Rotate, Complement and Set.
ANA r (AND register)
(A) (A)(r)
The contents of the register r are logically ANDed with the contents of the
accumulator & the result is placed in accumulator

ANA M (AND memory)

(A) (A) ((H)(L))
ANI data (AND immediate)
(A) (A) (byte 2)
XRA r (exclusive OR register)
(A)(r)
XRA m (exlusive OR memory)
(A)(A) ((H)(L))
XRI data (exclusive OR immediate)
(A)(A)(byte 2)
ORA r (OR register)
(A)(A)(r)
ORA m (OR memory)
(A)(A)((H)(L))
ORI data (OR immediate)
(A)(A)(byte 2)
CMP r (compare register)
(A)-(r)
The contents of the register r are subtracted from the contents of the
accumulator. The accumulator contents remains unchanged. The condition flags
are set as a result of the subtraction
CMP m (compare memory)
(A)-((H)(L))
CPI data (compare immediate)
(A)-(byte 2)
RLC (rotate left)
(An+1)(An):(A0)(A7); (CY)(A7)
The contents of the accumulator are rotated left one position

RRC (rotate right)

(An-1)(An):(A7)(A0); (CY)(A0)
RAL (rotate left through carry)
(An+1)(An):(A0)(CY); (CY)(A7)
RAR (rotate right through carry)
(An-1)(An):(A7)(CY); (CY)(A0)
CMA (complement accumulator)
(A)(), the contents of the accumulator are complemented
CMC (complement carry)
(CY)()
The CY flag is complemented
STC (set carry)
(CY)1
The CY flag is set to 1

CONTROL INSTRUCTIONS; BRANCH Instruction:

This refers to the group of instructions that alters the normal sequential program
flow. There are two types of branch instructions
Unconditional
Conditional
In case of unconditional branch, the branch address is loaded into the program
counter (PC) whereas in case of conditional branch the branch address is loaded
into the PC only if the specified condition is satisfied
JMP Addr (jump)
(PC)(byte 3)(byte 2)
Control is transferred to the instruction whose address is specified in byte 3
and byte 2 of the current instruction
J condition addr (conditional jump)
If condition=true, then

(PC)(byte 3) (byte 2)
Else (PC)
PCHL (jump H and L indirect more H and L to PC)
(PCH)(H)
(PCL)(L)
The contents of the register H are moved to the higher order 8 bits of the
register PC. The contents of the register L are moved to the lower order 8
bits of the register PC
Subroutine call and return instruction:
There are other types of branch instructions like CALL, C.condition, RET,
R.condition and RST. These instructions allow the program to jump to a certain
place to execute a number of instructions and then return to the same original
place. This is made possible by storing the address of memory location from where
the jump was made in stack.
CALL addr (call)
((SP)-1) (PCH)
((SP)-2) (PCL)
(SP)(SP)-2
(PC) (byte 3)(byte 2)
The higher order 8 bits of the next instruction address are moved to the memory
location where address is 1 less than the contents of register SP. The lower order 8
bits of the next instruction address are moved to the memory location whose
address is 2 less than the contents of the register SP. The contents of the register SP
are decremented by 2. The control is transferred to the instruction whose address is
specified in byte 3 and byte 2 of the current location

C condition addr (conditional call)

If condition = true then

((SP)-1) (PCH)
((SP)-2) (PCL)
(SP)(SP)-2
(PC) (byte 3)(byte 2)
Else (PC)
RET (return)
(PCL)((SP));
(PCH)((SP)+1);
(SP)(Sp)+2
The contents of the memory location whose address is specified in register SP are
moved to the lower order 8 bits of register PC. The contents of the memory
location whose address is specified in 1 more than the contents of register SP are
moved to the higher order 8 bits of the register PC. The contents of the register SP
are incremented by 2.
R condition (conditional return)
If condition = true, then
(PCL)((SP));
(PCH)((SP)+1);
(SP)(Sp)+2
Else (PC)
RST n (restore)
((SP)-1) (PCH)
((SP)-2) (PCL)
(SP)(SP)-2
(PC) 8xn
The higher order 8 bit of the next instruction address are moved to the memory
location whose address is 1 less than the contents of the register SP. The lower
order 8 bit of the next instruction address are moved to the memory location whose
address is 2 less than the contents of the register SP. The contents of the register SP
are decremented by 2. The control is transformed to the instruction where address

is 8 times the contents of the NNN (n is represented on a 3 bit number NNN in opcode)

Stack I/O and machine control instructions:

These instructions are used to manipulate the stack, to perform the iput output
and to alter the internal control flags
PUSH rp (Push)
((SP)-1) (rh)
((SP)-2) (rl)
(SP)(SP)-2
PUSH PSW (push program status word)
((SP)-1)A
((SP)-2)0(CY), ((SP)-2)1X
((SP)-2)2(P), ((SP)-2)3X, ((SP)-2)4(AC)
((SP)-2)5(X), ((SP)-2)6(Z), ((SP)-2)7(S)
(SP)(SP)-2
X: defined
POP rp (pop)
(rl)((SP))
(rh)((SP)+1)
(SP)((SP)+2)
POP PSW (pop program status word)
(CY)((SP))0, (P)((SP))2
(AC)((SP))4, (Z)((SP))6
(S)((SP))7
(A)((SP)+1)
(SP)((SP)+2)

XTHL (exchange stack top with H and L)

(L)((SP))

(H)((SP)+1)
SPHL (move HL to SP)
(SP)(H)(L)
IN port (input)
(A)data
The data placed on the 8 bit bidirectional data bus by the specified port is
moved to register A
OUT port (output)
(data)(A)
The contents of register A are placed on the 8 bit bidirectional data bus for
transmission to the specified port
EI (enable interrupt)
The interrupt system is enabled following the execution of the next
instruction
DI (disable interrupt)
The interrupt system is disabled immediately following the execution of the
DI instruction

HLT (halt)
The processor is stopped. The registers and flags are unsffected
NOP (No operation)
No operation is performed. The registers and flags are unaffected
RIM (Read interrupt mask)
After the execution of the RIM instruction the accumulator is loaded with the
restart interrupt masks pending interrupts if any and the contents of the serial input
data line (SID)
SIM (set interrupt mask)

During the execution of SIM instruction the contents of the accumulator will be
used in programming the restart interrupt masks
ASSEMBLY LANGUAGE PROGRAM:
Let us define a program statement as write an assembly language program to
subtract two numbers. The three tasks are involved in this program
Load two hex numbers
Subtract numbers and
Store the result in the memory
These tasks can be symbolically presented as flow chart as shown in the figure
below

Next job is to find the suitable 8085 assembly language instructions for each tasks.
These instructions are as follows

Task 1 instruction:
MVI A, 20H: load 20H as a first number in register A
MVI B, 40H : load 40H as a second number in register B
Task 2 instruction:
ADD B
: add two numbers and save it in register A
Task 3 instruction:
STA 2200H : store the result in memory location 2200H
HLT
: stop the program execution
We need to execute three tasks in a sequence this corresponding instructions in the
same sequence constitutes an assembly language program (ALP).
Assembly Language Program to Machine Language Program:
Once the assembly language program is ready, it is necessary to convert it in the
machine language program. It is possible to do this by referring the proper hex
code for each assembly instruction from the 8085 instructions set manual. This
process is known as hand assembly and the resulted machine language program is
also known as hex code. Let us see the hex code (opcode) for this program.
Mnemonics
MVI A,20H
MVI B, 40H
ADD B
STA 2200H

HLT

Programming Examples:

Hex code
3EHopcode
20Hoperand
06Hopcode
40Hoperand
80Hopcode
32Hopcode
00Hoperand (low byte addr)
22Hoperand (high byte addr)
76Hopcode

P1: store an 8 bit data (52H) in memory

MVI A,52H
STA 2000H
HLT

(OR)

P2: exchange the contents of memory locations

Program (i)
LDA 1000H
MOV B, A
LDA 2000H
STA 1000H
MOV A, B
STA 2000H
HLT

Program (ii)
LXI H, 1000H
LXI D, 2000H
MOV B, M
LDAX D
MOV M, A
MOV A, B
STAX D
HLT

P3: Subtract two 16 bit number

LHLD 2000H
XCHG
LHLD 2002H
MOV A, E
SUB L
MOV L, A
MOV A, D
SBB H
MOV H, A
SHLD 2004H
HLT

Sample Subroutine Program:

Main program
6000H
LXI SP, 27FFH

LXI H, 2000H
MVI M, 52H
HLT

6003H
6006H
6009H
600CH

LXI H, 2000H
LXI B, 1020H
CALL SUB
HLT

SUBROUTINE PROGRAM:
6100H
SUB: PUSH B
6101H
PUSH H
6102H
LXI B, 4080H
6105H
LXI H, 4090H
6108H
DAD B
6109H
SHLD 2200H
610CH
POP H
610DH
POP B
610EH
RET
LOOPING, COUNTING & INDEXING:
Looping:
In this technique the program is instructed to execute certain set of instructions
repeatedly to execute a particular task number of times. For example to add ten
numbers stored in the consecutive memory locations we have to addition ten times
Counting:
This technique allows programmer to count how many times the instruction/set of
instructions are executed

INDEXING:
This technique allows programmer to point or refer the data stored in sequential
memory locations one by one. Let us see the program loop to understanding
looping, counting & indexing.
The program loop is the basic structure which forces the processor to repeat a
sequence of instructions. Loop has four sections

Initialization section
Processing section
Loop control section
Result section

The initialization section establishes the starting values of Loop counters for
counting how many times loop is executed.
Address registers for indexing which give pointers to memory locations, and
other variables.

The actual data manipulation occurs in the processing section. This is the section
which does the work.
The loop control section updates counters, indices (pointers for the next iteration).
The result section analyses and stores the results.

Program Examples:
P1: calculate the sum of series of numbers
LDA 2200H
:
Initialize the memory
MOV C, A
:
Initialize counter
SUB A
:
A = 0; (SUM=0)
LXI H, 2201H
:
Initialize pointer
BACK ADD M
:
SUM = SUM + data
INX H
:
increment pointer
DCR C
:
decrement counter
JNZ BACK
:
if counter o repeat
STA 2300H
:
store SUM
HLT
:
terminate program execution

P2: multiply two 8 bit numbers

LDA 2200H
MOV E, A
MV1 D,00
:
LDA 2201H
MOV C, A
:
LXI H, 0000H
:
BACK:
DAD D
:
DCR C
:
JNZ BACK
:
SHLD 2300H
:
HLT
:

get the first number in DE register pair

initialize counter
result = 0
result=result+first number
decrement count
if count 0 repeat
store result
terminate program execution

P3: divide 16 bit number by 8 bit number

LHLD 2200H
:
get the dividend
LDA 2202H
MOV C, A
:
get the divisor
LXI D,0000H
:
quotient=0
BACK:
MOV A, L
:
subtract divisor
SUB C
:
subtract divisor
MOV L, A
:
save partial result
JNC SKIP
:
if CY1 jump
DCR H
:
subtract borrow of previous subtraction
SKIP:
INX D
:
increment quotient
MOV A, H
CPI 00
:
check if dividend < divisor
JNZ BACK
:
if nor repeat
MOV A, L
CMP C
JNC BACK
SHLD 2302H
:
store the remainder
XCHG
SHLD 2300H
:
store the quotient
HLT
:
terminate the execution

P4: find the largest of given numbers

Program:

BACK:

SKIP:

LDA 2200H
MOV C, A
XRA A
LXI H, 2202H
CMP M
JNC SKIP
MOV A, M
INX H
DCR C
JNZ BACK
STA 2300H
HLT

:
:
:
:

initialize counter
maximum = minimum, possible value=0
initialize pointer
is number>maximum

yes replace maximum

:
:

store maximum number

terminate program execution

P5: multiply two 8 bit numbers with shift and add method
LXI H, 2200H
MOV E, M
MVI D, 00H
INX H
MOV A, M
LXI H, 0000H
MVI B, 08H
MULT:
DAD H
RAL
JNC SKIP
DAD D
SKIP:
DCR B
JNZ MULT
SHLD 2300H
HLT
P6: program to count given data in a set of numbers
LXI 2000H
MVI B, 14H
MVI C, 00H
BACK:
MOV A, M
CPI 02H
JNZ NEXT
INR C
NEXT:
INX H
DCR B
JNZ BACK
HLT
Exercise programs:
Store 8 bit data in memory
Exchange the contents of memory locations
Add two 8 bit numbers

Subtract two 8 bit numbers

Add two 16 bit numbers
Subtract two 16 bit numbers
Find the 1s complement of a number
Find the 2s complement of a number
Right shift data within the 8 bit register
Arrange numbers in ascending order
Calculate the sum of series of even number
Find the factorial of a number
Count the number of odd and even numbers

Code conversion:
This technique allows programmer to translate a number represented using one
coding system to another. For example when we accept any number from the
keyboard it is in ASCII code. But for processing we have to convert this number in
its hex equivalent. The code conversion involve some basic conversions such as
BCD to binary conversion
Binary to BCD conversion
BCD to seven segment code conversion
Binary to ASCII conversion
ASCII to binary conversion
Binary to BCD conversion:
LXI SP, 27FFH
LDA 6000H
CALL BIN TO BCD
HLT

:
:
:
:

initialize stack pointer

get the binary number in accumulator
call subroutines
terminate program execution

SUBROUTINE STACK INSTRUCTIONS

BIN TO BCD: PUSH B
PUSH D
MVI B, 64H
MVI C, 0AH
MVI D, 00H

STEP 1:

STEP 2:

STEP 3:

MVI E, 00H
CMP B
JC STEP2
SUB B
INR E
JMP STEP 1
CMP C
JC STEP3
SUB C
INR D
JMP STEP 2
STA 6100H
MOV A, D
STA 6101H
MOV A, E
STA 6102H
POP D
POP D
RET

BCD to seven segment conversion:

Many times 7 segment LED display is used to display the results or parameters in
the microprocessor system. In such cases we have to convert the result or
parameter in 7 segment mode
LOOKUP TABLE:
Digit
0
1
2
3
4
5

Code
3F
06
5B
4F
66
6D

6
7
8
9

7D
07
7F
6F

Program:

BACK:

LXI H, 6200H
LXI D, 6000H
LXI B, 7000H
LDAX D
MOV L, A
MOV A, M
STAX B
INX D
INX B
MOV A, C
CPI 05H
JNZ BACK
HLT

Exercise programs:
2 digit BCD to binary conversions
Find the square of given numbers
Binary to BCD conversion
Find the Z-segment codes for given number
Find the ASCII character for given numbers
Multiply two 2 digit BCD numbers
Add two 4 digit BCD numbers
Subtraction of two BCD numbers
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