A

Presentation on
CMOS
By
Saket Pratap Deora
Mtech(VLSI Technology)
thakursaketpratap@gmail.com
#9560696005

Introduction

Complementary metaloxidesemiconductor (CMOS) is a

technology for constructing integrated circuits.
CMOS technology is used in microprocessors,
microcontrollers, static RAM, and other digital logic
circuits.
CMOS technology is also used for several analog circuits
such as image sensors (CMOS sensor), data converters,
and highly integrated transceivers for many types of
communication.

Why CMOS

The main advantage of cmos over nmos

is very less static power
dissipation.

They provides high Fanout.

CMOS History

The concept of CMOS was introduced in 1963 by Frank

Wanlass and Chi-Tang Sah of Fairchild did not become
common until the 1980s as NMOS microprocessors were
dissipating as much as 50W and alternative design
techniques were needed
CMOS still dominates digital IC design today.
In 1963, while working for Fairchild Semiconductor, Frank
Wanlass patented CMOS (US patent 3,356,858).

Symbol

The following simplified symbols are used to represent

MOSFET transistors in most CMOS circuit diagramsAlways we use pmos in pull up and nmos in pull down
network.

Switching

The gate of a MOS transistor controls the flow of the current

between the drain and the source.
The MOS transistor can be viewed as a simple ON/OFF
switch.

Structure

N-Channel and P-Channel transistors can be fabricated on

the same substrate as shown below

Digital Designing

They are capable to design logic gates and expressions.

Lets see.....

Power Dissipation

Dynamic Power Dissipation

Switching Power dissipation

Short Circuit Power Dissipation

Glitching

Static Power Dissipation

Leakage Power Dissipation

Dynamic Power Dissipation

It is caused by the current flow from charging &

discharging of Capacitor
Switching power dissipation-

Switching power dissipation

When pmos is on it make

full transation from 0 to aprox
vdd

One half energy is dissipated

In the form of heat

Short circuit power dissipation

Pmos and nmos provides

switching simultaneously.

During the switching for a

very short time both mos
will be on, there will be a short
path from vdd to ground.

Power dissipation due to

Glitches

Glitches- they are unwantes signal which affect the output

during the eveluation as well as dissipate the power.
In multi level circuits there are some intermediate
tranasation during the eveluation of output.
Mostly Glitches occurs due to imbalance path in a logic
circuit.
A carefull layout design can reduce the skew which also
Produces glitches.

Glitches

Static Power Dissipation

Leakage Dissipation

Static power dissiaption caused

by leakage current while the

gates are ideal.There is
no o/p transation.

Leakage current nothing but a

short circuit current from VDD

to ground in range of micro-Amp