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Lecture 11
Data Converters
Converter Applications
4 Rx filters
4 Tx filters
4 Rx ADCs
4 Tx DACs
3 Auxiliary ADCs
8 Auxiliary DACs
Total: Filters 8
ADCs 7
DACs 12
EECS 247 Lecture 11: Data Converters
Analog
Preprocessing
Filters
A/D
Conversion
DSP
000
...001...
110
D/A
Conversion
Analog
Postprocessing
Filters
Analog Output
D/A Conversion
Data Converters
V0 = VF S
i =1
bi
i
LSB
MSB
b1 b2 b3
bn
..
V0
D/A
= bi 2 N i , bi = 0 o r 1
i =1
where N = # o f b i t s
VFS = full scale output
= step size
Example:N = 3
V0 = ( b1 . 22 + b2 . 21 + b3.20 )
N o t e :V0 (b i = 1,a l l i ) = VF S
1
= VFS 1
2N
Ideal DAC
VFS
introduces
no error!
One-toone
mapping
from input VFS /2
to output
Analog
Output
Ideal Response
VFS /8
001
010
111
Digital Input
Code
2004 H.K. Page 11
LSB
MSB
b1 b2 b3
bn
..
A/D
Vin
where m = # o f bits
VFS = full scale output
= step size
N o t e : D ( bi = 1,a l l i ) VF S
1
VF S 1
2m
Ideal ADC
introduces
error
(+-1/2)
= VFS /2m
m= # of bits
This error is
called
``quantization
error``
Digital Output
111
110
101
100
011
010
001
Analog
input
1LSB
000
3 4 5
7
2004 H.K. Page 13
Monotonicity
Offset
Gain error
Differential nonlinearity (DNL)
Integral nonlinearity (INL)
Dynamic
time
Continuous
Time
Physical
Signals
Sampled Data
(e.g. T/H signal)
Clock
"Memory
Content"
Discrete Time
Uniform Sampling
y(kT)=y(k)
t= 1T
k= 1
2T
2
3T
3
4T
4
5T
5
6T ...
6 ...
Summary
Data Converters
ADC/DACs need to sample/reconstruct to
convert from continuous time to discrete time
signals and back
We distinguish between purely mathematical
discrete time signals and "sampled data
signals" that carry information in actual
circuits
Question: How do we ensure that
sampling/reconstruction preserves
information
EECS 247 Lecture 11: Data Converters
Aliasing
The frequencies fx and Nfs fx, N integer, are
indistinguishable in the discrete time domain
Undesired frequency interaction and
translation due to sampling is called aliasing
If aliasing occurs, no signal processing
operation downstream of the sampling
process can recover the original continuous
time signal!
Let's look at this in the frequency domain...
EECS 247 Lecture 11: Data Converters
Time domain
fs = 1/T
time
y(nT)
Amplitude
Frequency domain
fs - fin
fs + fin
2fs f
fs
fin
Signal scenario
before sampling
Amplitude
fin
fs /2
fs
2fs .. f
Discrete
Time
Amplitude
Signal scenario
after sampling DT
Signals @
nfS fmax__signal fold
back into band of
interest
Aliasing
Continuous
Time
0.5
f/fs
2004 H.K. Page 22
Aliasing
Multiple continuous time signals can produce
identical series of sampled voltages
The folding back of signals from nfSfsig down
to ffin is called aliasing
Sampling theorem: fs > 2fmax_Signal
If aliasing occurs, no signal processing
operation downstream of the sampling
process can recover the original continuous
time signal
Filter
Continuous
Time
0
fs
2fs
...
Discrete
Time
0
0.5
f/fs
2- Pre-filter
signal to
eliminate
signals above 1/2
sampling
frequency- then
sample
Frequency domain
fin
fs_new f
2fs_old ..
fs_old
Amplitude
1- Push
sampling
frequency to x2
of the highest
freq.
Oversampled
converters
almost!
Amplitude
Frequency domain
fin
fs /2
fs
2fs
Filter
Continuous
Time
0
fs/2
fs
2fs
...
Parasitic
Tone
Attenuation
Continuous
Time
0
fs/2
B/fs
0.5
fs-B
fs
...
Discrete
Time
f/fs
[R. v. d. Plassche,
CMOS Integrated
Analog-to-Digital and
Digital-to-Analog
Converters, 2nd ed.,
p.41]
Filter Order
fs/2fmax
Data Converter
Classification
fs > 2fmax Nyquist Sampling
"Nyquist Converters"
Actually always slightly oversampled
Sub-Sampling
Amplitude
BP Filter
Continuous
Time
0
fs
...
Discrete
Time
0
0.5
f/fs
Analog
Preprocessing
Sampling
(+Quantization)
A/D
Conversion
000
...001...
110
DSP
D/A
Conversion
How do we go back
from DT CT?
Anti-Aliasing
Filter
Analog
Postprocessing
Analog Output
Ideal Reconstruction
x(k)
x(t)
x(k ) g (t kT )
g (t ) =
k =
sin(2Bt )
2Bt
0.6
0.4
Amplitude
0.2
-0.2
-0.4
-0.6
-0.8
sampled data
after ZOH
-1
0
0.5
1.5
2.5
Time
3.5
-5
x 10
DT sequence
...
Frequency Domain
...
0.5
Zero padded
DT sequence
Infinite
Interpolation:
CT Signal!
...
f/fs
...
...
0.5/i
1.5/i
2.5/i
f/fs
0.5fs
1.5fs
2.5fs
...
...
Tp
Ts
Tp sin(fTp )
Ts
fTp
2004 H.K. Page 36
| H ( f ) |=
0.8
0.7
T p sin(fTp )
fTp
Ts
abs(H(f))
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
1.5
f/fs
2.5
| H ( f ) |=
0.8
0.7
T p sin(fTp )
fTp
Ts
abs(H(f))
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
1.5
f/fs
2.5
Continuous Time
Pulse Train
Spectrum
0.5
0.5
1.5
2.5
0.5
1.5
2.5
0.5
1.5
2.5
ZOH Transfer
Function
("Sinc Distortion")
0.5
0
1
ZOH output,
Spectrum of
Staircase
Approximation
0.5
f/fs
EECS 247 Lecture 11: Data Converters
Smoothing Filter
1
Again:
A brick wall
filter would be
nice
Oversampling
helps to
reduce filter
order
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
1.5
2.5
f/fs
EECS 247 Lecture 11: Data Converters
Summary
Sampling theorem fs > 2fmax, usually dictates
anti-aliasing filter
If theorem is met, CT signal can be recovered
from DT without loss of information
ZOH and smoothing filter reconstruct CT from
DT signal
Oversampling helps reduce order &
complexity of anti-aliasing & smoothing filters
EECS 247 Lecture 11: Data Converters
Next Topic
Analog Input
Done with
"Quantization in time"
Next: Quantization in
amplitude
Analog
Preprocessing
Anti-Aliasing
Filter
Sampling
(+Quantization)
A/D
Conversion
DSP
000
...001...
110
D/A
Conversion
D/A+ZOH
Analog
Postprocessing
Smoothing
Filter
Analog Output
Amplitude
Quantization
Amplitude quantization
quantization noise
E.g. N = 3 Bits
Full-scale input range:
-0.5 (2N-0.5)
ADC characteristics
ideal converter
5
4
3
2
1
0
-1
ADC Model
Vin
Dout
q (Vin )
2
3
4
5
ADC Input Voltage [1/]
1
Quantization error [LSB]
Quantization error:
bounded by /2 +/2
for inputs within full-scale range
0.5
-0.5
-1
-1
Busy input
Amplitude is many LSBs
No overload
Not Gaussian!
Pdf
e2 =
1/
Zero mean
Variance
+ / 2 2
de = 12
/ 2
-/2
+/2
error
1 2N
2 2
SQNR = 2 = 1.5 22 N
12
= 6.02 N + 1.76 dB
e.g.
N
8
12
16
20
SQNR
50 dB
74 dB
98 dB
122 dB
Dout
DAC
Vout
Din
DAC
Vout
DAC
ADC
Din
+
Dout
Offset
Gain error
Differential Nonlinearity, DNL
Integral Nonlinearity, INL
Offset Errors
ADC
DAC
Gain Errors
ADC
DAC
ADC characteristics
ideal converter
Full-scale error
6
5
4
3
2
1
Offset error
0
-1
2
3
4
5
ADC Input Voltage [LSB]
DNL = deviation
of code width from
(1LSB)
4
3
-1
3
4
5
6
ADC Input Voltage [1/]
4
3
4
3
Non-monotonic
(> 1 LSB DNL)
-1
Missing code
(+0.5/-1 LSB DNL)
ADC characteristics
ideal converter
ADC characteristics
ideal converter
3
4
5
6
ADC Input Voltage [1/]
-1
3
4
5
6
ADC Input Voltage [1/]
ADC characteristics
ideal converter
-1 LSB INL
-1
2
3
4
5
ADC Input Voltage [1/]
5
4
3
2
1
1
0.5
-0.5
-1
1
Quantization error [LSB]
At right:
alternating DNL 1/+1 LSB
3
4
5
ADC Input Voltage [1/]
* Ref:
Understanding Data Converters, Texas Instruments Application
Report SLAA013, Mixed-Signal Products, 1995.
EECS 247 Lecture 11: Data Converters
Monotonicity
Monotonicity guaranteed if
| INL | = 0.5 LSB
The best fit straight line is taken as the reference for determining the INL.
This implies
Note: these conditions are sufficient but not necessary for monotonicity
| DNL | = 1 LSB
* Ref: R. J. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters, Kluwer Academic
Publishers, 2nd ed., 2003.
EECS 247 Lecture 11: Data Converters