IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO.

5, MAY 2015

2635

Reliability Oriented Design Tool For the New

Generation of Grid Connected PV-Inverters
Nicolae-Cristian Sintamarean, Student Member, IEEE, Frede Blaabjerg, Fellow, IEEE, Huai Wang, Member, IEEE,
Francesco Iannuzzo, Senior Member, IEEE, and Peter de Place Rimmen

AbstractThis paper introduces a reliability-oriented design

tool for a new generation of grid-connected photovoltaic (PV)
inverters. The proposed design tool consists of a real field mission profile (RFMP) model (for two operating regions: USA and
Denmark), a PV panel model, a grid-connected PV inverter model,
an electrothermal model, and the lifetime model of the power
semiconductor devices. An accurate long-term simulation model
able to consider the one-year RFMP (solar irradiance and ambient temperature) is developed. Thus, the one-year estimation of
the converter device thermal loading distribution is achieved and
is further used as an input to the lifetime model. The proposed
reliability-oriented design tool is used to study the impact of mission profile (MP) variation and device degradation (aging) in the
PV inverter lifetime. The obtained results indicate that the MP
of the field where the PV inverter is operating has an important
impact (up to 70%) on the converter lifetime expectation, and it
should be considered in the design stage to better optimize the
converter design margin. In order to have correct lifetime estimation, it is crucial to consider also the device degradation feedback
(in the simulation model), which has an impact of 2030% on the
precision of the lifetime estimation for the studied case.
Index TermsDevice degradation feedback, long-term simulation, mission profile variation.

NOMENCLATURE
MP
RFMP
DSM
LTSM
D
2L-FB inverter
3L-NPC inverter
SiC
G
Iconv
IM

Mission profile.
Real field mission profile.
Detailed simulation model.
Long-term simulation model.
Device degradation/aging.
Two-level full-bridge inverter.
Three-level neutral-point-clamped
inverter.
Silicon carbide.
Solar irradiance.
Converter output current.
MOSFET drain current.

Manuscript received April 23, 2014; revised July 18, 2014; accepted September 29, 2014. Date of publication October 16, 2014; date of current version
December 23, 2014. Recommended for publication by Associate Editor R. S.
Balog.
N. C. Sintamarean, F. Blaabjerg, and H. Wang are with the Department
of Energy Technology, Center of Reliable Power Electronics, Aalborg University, DK-9220 Aalborg, Denmark (e-mail: ncs@et.aau.dk; fbl@et.aau.dk;
hwa@et.aau.dk).
F. Iannuzzo is with the Department of Electrical and Information Engineering, University of Cassino and Southern Lazio, 03043 Cassino, Italy (e-mail:
iannuzzo@unicas.it).
P. de Place Rimmen is with the R&D Design Center Europe, Danfoss Power
Electronics, DK-6300 Graasten, Denmark (e-mail: pr@danfoss.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2014.2361918

ID
VDC
VDCLink
fsw
Zth device/grease/heatsink
Ta , TJ , TC
Tj
MPPT
PLTotal
GDs
VG
RG
Nf
CTE
ar
ton
A
fDiode
Ea
LT
TS

Freewheeling diode current.

Device off-state voltage.
DC-link voltage.
Switching frequency of the device.
Junction to case/grease/heatsink
thermal impedance.
Ambient temperature, device junction, and case temperature.
Amplitude of the junction temperature cycle.
Maximum power point tracking.
Total power-loss dissipation.
Gate-driving strategy.
Gate voltage.
Gate resistance.
Number of cycles to failure.
Thermal-expansion coefficient.
Bond-wire aspect ratio.
Load pulse duration.
Technology factor.
Freewheeling diode chip thickness
dependence.
Activation energy.
Lookup table.
Time step of the mission profile sampling data.

I. INTRODUCTION
HE improvement of power electronic systems is directly
related to the evolution of power semiconductor devices.
According to a survey published in 2009, the converter is one of
the most unreliable parts in a renewable energy system operating
in harsh environment, e.g., in wind turbines and photovoltaic
(PV) plants [1].
The converter availability in PV system applications is the
most important aspect, and it depends on the component reliability, efficiency and its maintenance [2], [3]. Therefore, highly
reliable components are required in order to minimize the downtime during the lifetime of the converter and implicitly the maintenance costs [4][6].
The design of highly reliable PV inverters under constrained
cost is a great challenge to be overcome. Switching devices
are one of the reliability-critical components, which will be exposed to long-term MPs of solar irradiance and ambient temperature. Among other kinds of stresses, temperature and temperature variations are the most critical ones [7][9]. Therefore, a
reliability-oriented design tool is highly expected to perform the

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2636

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 5, MAY 2015

TABLE I
PV-SYSTEM DESIGN RATINGS

Fig. 1. Stressstrength analysis emphasizes the overstress failure due to MP

variation and device aging.

long-term (e.g., one year) electrothermal and then the reliability

aspect analysis of switching devices in PV inverters.
Even if the typical design target of lifetime for PV systems is
around 20 years, there is a discrepancy between the lifetime of
the PV inverter (510 years) and the PV panel (2025 years).
The system reliability can be improved by replacing devices
before their failure [5], [6], [10].
Great variations in the PV inverter lifetime are encountered
due to the MP variation from one region to another. Therefore,
in order to achieve reliability improvement and cost reduction
of the PV technology, it is of major importance to have a correct
lifetime prediction of the PV inverter, according to the MP
variation operating conditions.
The loading stress (e.g., thermal loading of devices, cyclic
load, voltage, etc.) of the PV inverter devices is a consequence of
the MP variations. Moreover, the device strength model is a consequence of the many resisting physical properties (e.g., hardness, melting point, adhesion, etc.), which defines how much
loading the component can withstand [3]. A component failure
occurs when the applied stress exceeds the designed strength.
By analyzing the overlap area between the stress distribution
and the strength distribution, the probability of failure can be
obtained (see Fig. 1). Therefore, stress and strength are two of
the most important factors that have to be considered for lifetime
or reliability estimation of PV inverters.
Moreover, the MP variation (MP1 and MP2) will have an impact on the device degradation (D1 and D2) involving different
failure distribution as shown in Fig. 1. The device strength is
well known; thus, the main factor that influences the failure distribution is the MP, which usually is not taken into consideration
by the producers in the design stage of the PV inverters. If the
stress has the distribution according to Fig. 1, the converter has
a lower lifetime if it is operating under MP2 (which involves
D2) when compared with MP1 (which involves D1). This is the
main reason why PV inverter lifetime varies so much.
This paper proposes a reliability-oriented design tool for the
new generation of grid-connected PV inverter applications in
order to study the impact of MP variation and device degradation
(D) in the PV inverter lifetime.
II. PROPOSED RELIABILITY-ORIENTED DESIGN TOOL
The recent developments in widebandgap devices based on
SiC (the appearance of SiC 1200-V MOSFETs) is showing
a high impact on the PV inverter technology, which strongly

2L-FB VSI PV-inverter Specifications

Rated power
S = 25 kVA
Conv. Output phase voltage
V N = 230 V (RMS) (325-V peak)
Max. Output current
I m a x = 37A (RMS) (52-A peak)
Max. DC-link Voltage
V D C m a x = 1000 V
Switching Frequency
f s w = 50kHz
Thermal Impedance Values
= 570 [s]
Heatsink
R t h = 0.13 [K/W]
= 1.3 [s]
Thermal Grease
R t h = 0.0059 [K/W]
LCL-Filter Parameters
L g = 150 H
C f = 0.4 F
Parameters
L C = 400 H
Device Characteristics
Device type
CREE MOSFET Module (CCS050M12CM2)
PV-Panel Characteristics-Connection
PV-Panel Type
ET Black Module (ET-M660250BB)
Conn. Type
Series = 24
Parallel = 3

influences the efficiency, power density, and cost [11], [12]. The
SiC-based 2L-FB inverter is a good candidate to replace the
Si-based 3L-NPC inverter in the application of three-phase PV
inverters for +10-kW range. It offers higher efficiency, reduced
complexity, reduced weight/size, and also a competitive cost.
In order to reduce the overall cost and to have a comparable
efficiency, the return to the 2L-FB topology with split capacitor
has been proposed as an alternative [13].
The proposed PV system consists of a 2L-FB inverter connected to the three-phase grid through a passive LCL filter. The
design of a 25-kVA grid-connected PV inverter system has been
performed in agreement with the power rating parameters emphasized in Table I.
This paper introduces a reliability-oriented design tool for
the new generation of grid-connected PV inverter applications.
According to Fig. 2, the proposed design tool consists of an
RFMP model, a PV panel model, a grid-connected PV inverter
model, an electrothermal model, and a lifetime model.
The involved parameters emphasized in Fig. 2 are as follows:
Gsolar irradiance, Ta ambient temperature, VDCLink dcLink voltage, Iconv converter output current, IM MOSFET
drain current, ID freewheeling diode current, VDC device
off-state voltage, Fsw switching frequency of the device, VG
gate voltage, RG gate resistance, Zth device/grease/heatsink
junction to case/grease/heatsink thermal impedance, TJ
device junction temperature, TC case temperature of the device, and Ddevice degradation (aging). A description of each
model is presented as follows.
A. RFMP Model
The proposed design tool presented in Fig. 2 considers the
MP of the real field where the converter will perform. The MP
model is developed based on one-year measurements of solar
irradiance (G) and ambient temperature (Ta ) for two different
locations. In order to study the MP variation impact on the reliability of PV inverter devices, harsh and soft environment conditions are selected from two different locations: the first one
(soft environment) is from Denmark-Aalborg [see Fig. 3(a)]
and the second one (harsh environment) from USA-Arizona

SINTAMAREAN et al.: RELIABILITY ORIENTED DESIGN TOOL FOR THE NEW GENERATION OF GRID CONNECTED PV-INVERTERS

Fig. 2.

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Proposed reliability-oriented design structure for the new generation of grid-connected PV inverters.

Fig. 3. RFMP for one-year measurements of solar irradiance G and ambient temperature T a in Denmark (a) and in USA (b). (a) One-year MP in Denmark.
(b) One-year MP in USA.

[see Fig. 3(b)]. The sampling time of the measured data is

1 min. Thus, a realistic loading of the converter devices can
be achieved, taking into account shorter time and longer time
variations.

mates the PV inverter dc-link voltage and current variations.

Considering the MPPT strategy, the references for the converter
voltage and current are obtained.
C. PV Inverter Model

B. PV Panel Model
The PV panel model estimates the output current and voltage
by considering as input the solar irradiance (G) and the ambient
temperature (Ta ) from the RFMP model. The model considers
the configuration of the PV panel connection and finally esti-

The proposed PV system, depicted in Fig. 4, consists of a

25-kVA SiC-based 2L-FB inverter connected to the three-phase
grid through a passive LCL filter.
Fig. 4 introduces the main control blocks, which are used to
achieve the desired converter functionalities. A more detailed

2638

Fig. 4.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 5, MAY 2015

Three-phase grid-connected 2L-FB PV-inverter application.

description of the grid-connected PV inverter control design

has been presented in [14]. The PV inverter model receives
as input the reference current and voltage from the MPPT. By
considering the input, the model estimates the realistic device
(MOSFET and diode) loading current (IM or ID ) and the voltage
variations (off-state voltage VDC ).
D. Electrothermal Model
The proposed model aims at estimating the junction and case
temperature for the new generation of power electronics devices. The input signals in the model are: the realistic device
(MOSFET and Diode) loading current (IM or ID ) and voltage variations (off-state voltage VDC ), the switching frequency
(fSW ), the ambient temperature (Ta ), the gate-driver operation
point (VG and RG ), and the device degradation level (D). According to Fig. 5, three types of models are involved in the electrothermal analysis: the device model, the power loss model, and
the thermal model. The device model estimates the voltage drop
across the device and the switching energies as a function of
the current, the off-state blocking voltage, and junction temperature. Furthermore, the estimated parameters and the switching
frequency will be used into the power loss PLoss model where
the instantaneous conduction and switching losses of the device
are calculated. Moreover, the total losses (Ptotal loss ) and the
ambient temperature (Ta ) are fed into the thermal model that
estimates the device case temperature (Tc ) and the junction temperature (Tj ). Finally, by providing the junction temperature as
a feedback to the device model, the temperature impact on the
losses is also considered. Moreover, the device degradation (D)
and gate driving strategy (GDs) influence into the junction and
case temperature estimation are also included as follows:
1) device degradation (analyzed in Section IV) in terms of
junction to case thermal impedance degradation (given by
solder fatigue) and on-state resistance degradation (given
by bondwire lift-off);
2) gate-driving strategy impact in terms of VG and RG
variations.
By combining the Shockley model [15] with the resistance
model, an accurate estimation of the device parameters in the
whole working area has been achieved. The junction and case
temperature estimation of the device (MOSFET and diode) has

been performed by implementing the proposed electrothermal

model according to [16].
The device model validation has been achieved by comparing the obtained simulation results with the experimental values, when applying the same operating conditions. Three gatedriving strategies are mainly studied: GDs1 (VGS = 20 V and
RG = 7 ), GDs2 (VG S = 15 V and RG = 20 ), and GDs3
(VG S = 10 V and RG = 70 ). The GDs were arbitrary chosen
in order to emphasize the accuracy and flexibility of the model
for different GD-operating conditions.
Fig. 6(a) presents the MOSFET VDS on-state voltage drop
estimation, when the current is increased from 0 to 50 A, for
gate voltage values of 20, 15, and 10 V. Moreover, the temperature impact is also considered for 25 C and 150 C. Fig. 6(b)
shows the MOSFET-estimated switching energies (Eon and
Eo ), when the current is increased from 0 to 50 A and the
gate resistance values are 7, 20, and 70 . Finally, the diode
Vf -forward voltage drop is also emphasized [see Fig. 6(c)] for
the same current values and junction temperature of 25 C and
150 C.
In order to validate the proposed electrothermal model in a
PV inverter application, the design of 25-kVA grid-connected
PV inverter has been performed in agreement with the power
ratings parameters given in Table I. Fig. 7(a) shows the 2L-FB
PV inverter hardware implementation, which can be divided into
the following main sections: 1three-phase output power; 2
dc-input power; 3heatsink; 4dc-link film capacitors; 5
device MOSFET module; 6gate-driver circuit; and 7DSP
control.
In order to achieve the model validation, the PV inverter
simulation and the laboratory test are performed at the same
conditions. The main purpose is to measure the PV inverter
device (MOSFET power module) efficiency for different active
power levels injected into the grid. The efficiency is measured
for power ratings from 0 to 25 kW with load steps of 2.5 kW,
by using the Yokogawa WT3000 power analyzer.
According to the obtained results presented in Fig. 7(b), it is
worth to mention that the model is performing a good estimation
of the power losses in the whole working area range. The largest
deviation from the experimental measurements (being of 7%) is
in low-power operation.
E. Device Lifetime Model
Since the intensive work on the power cycling testing of SiC
power devices is still undergoing, well-developed degradation
models and lifetime models are still unavailable for the analyzed SiC power module. For demonstrating the procedures of
the proposed design tool, the state-of-the-art lifetime models of
Si IGBT modules are applied for the SiC devices. Therefore, the
results of the lifetime evaluation could be interpreted for relative
evaluation and for comparison only. A more relevant lifetime
evaluation is upon the replacement by the specific lifetime models of the SiC power modules in future. The procedures in the
proposed design tool are still valid.
There are various failures modes for power electronics devices. Two of the most commonly observed (packaging related)

SINTAMAREAN et al.: RELIABILITY ORIENTED DESIGN TOOL FOR THE NEW GENERATION OF GRID CONNECTED PV-INVERTERS

Fig. 5.

2639

Proposed electrothermal model structure for device junction and case temperature estimation.

Fig. 6. Estimation of (a) MOSFET voltage drop, (b) MOSFET switching energies E o n and E o and (c) diode voltage drop when the current is increased from
0 to 50 A and the junction temperature is increasing from 25 C to 150 C. (a) MOSFET VD S estimation. (b) MOSFET E o n and E o estimation. (c) Diode V F
estimation.

Fig. 7.

(a) Hardware layout and (b) Efficiency measurement and estimated curve of the SiC-based 2L-FB PV-inverter.

2640

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 5, MAY 2015

TABLE II
DEVICE PARAMETERS DEGRADATION WITH LIFETIME LEVEL
Degradation-Aging Impact
Lifetime level:
1.
2.
3.
4.
5.

020%
2040%
4060%
6080%
80100%

Normalized R t h

jc

Normalized V D S

1
1.1
1.2
1.3
1.4

1
1
1.01
1.03
1.1

failures are die-attach solder fatigue and bond-wire damage

[17][19]. They are both caused by temperature cycling during
operation and CTE mismatch between adjacent layers. Bondwire damage is more pronounced after die-attach solder is seriously degraded [20], [21]. The solder fatigue will not destroy
the device directly, whereas the end of life failure is bond-wire
damage related [17], [21]. Therefore, device junction temperature (mean junction temperature TJ and junction temperature
variation Tj ) is one of the critical parameters required for
lifetime estimation.
The failure criteria are defined based on previous research
works [17], [20] and [22]. Thus, Huang and Mawby [17] and
Held et al. [22] proposed that 10% increase of on-state voltage VDS indicates the bond-wire damage. Moreover, Huang and
Mawby [17] and Scheuermann and Hecht [20] suggested that a
40% increase of junction to case thermal resistance Rth jc indicates the solder fatigue failure. Rth jc has a linear degradation
behavior with lifetime level and VDS is mainly changing in the
last stage of lifetime (from 80% to 100%) [17].
Table II presents the degradation impact on Rth jc and VDS
with lifetime level.
As shown in Fig. 5, the degradation (of Rth jc and VDS ) is
provided as a feedback in the electrothermal model; thus, the
degradation impact in the losses is also included.
As a tradeoff between accuracy and simulation time, five
degradation levels are included according to Table II.
A lifetime model (SKiM 63) proposed by Semikron is used for
the device lifetime estimation [23]. The model uses as a baseline
the LESIT lifetime model [22]. Moreover, the dependences on
the wire bond aspect ratio (ar), load pulse duration (ton ), and the
freewheeling diode chip thickness (fDiode ) are also considered.
The lifetime equation that expresses the number of cycles to
failure (Nf ) is described as


Ea
Nf = A Tj exp
ar 1 T j + 0
kB Tj m


C + ton

(1)
fDiode .
C +1
Moreover, Table III presents the parameters values used in
the model.
III. LONG-TERM SIMULATION MODEL
The simulation of a grid-connected PV inverter application
has been performed in MATLAB/Simulink, considering the

TABLE III
DEVICE LIFETIME PARAMETERS [20]
Parameter:
Technology factor: A

Activation energy: Ea [eV]

Bond-wire aspect ratio: ar
0
1
C

Cycling period: to n [s]

Diode chip-thickness: fD i o d e

Value:
3.4368e+14
4.923
0.06606
0.31
1.942
9.012e3
1.434
1.208
0.07
0.6204

aforementioned specifications. Due to the high-level increased

complexity of the DSM, the simulation time is 100 times higher
than real time (it takes 1 s to simulate a time period of 10 ms).
Moreover, the high amount of data generated during the simulation constitutes another drawback due to limited memory space
of the computer. The simulation runs out of memory in around
30 s, which makes it impossible to be used for a long simulation
operation.
In order to consider the one-year RFMP data (G and Ta ), an
accurate LTSM is required. For this purpose, an LTSM based
on LTs, which relies on DSM obtained data, is proposed to
overcome this problem. The LTs can be generated by running the
DSM under different operating conditions. The DSM (see Fig. 2)
can be divided into two main parts. The first one [see Fig. 8(a)]
consists of the PV/MPPT model responsible for the estimation
of the converter current (Ic ) and dc-link voltage (VDCLink ).
The behavior of this model can be reproduced by two LTs:
one for Ic and one for VDCLink . When building the LT, it is
important to consider the minimum and maximum values for G
and Ta . Afterward, the number of values used from the interval
will define the model accuracy. The accuracy target of 98% has
been achieved by using 40 values for G and four values for Ta .
Finally, the number of simulations required to build the LT is
equal to the number of values:
LT values = G values Ta values.

(2)

The second part [see Fig. 8(b)] consists of the PV inverter

model and the device electrothermal model. The behavior of the
PV inverter model and device model is reproduced into a single
LT. Therefore, the model estimates the device losses by considering the converter current (Ic ), dc-link voltage (VDCLink ), and
device junction temperature (Tj ) for a specific gate-driving strategy (GDs) and degradation level (D). By using the Ic VDCLink
interval pairs (from the previous LTs Ic VDC estimation) and the
device Tj interval (between minimum and maximum allowed
values), the number of simulations required (for one GDs and
one D) to build one LT is
LT values (GDs1 D1) = (IC VDC ) values Tj values.
(3)
Moreover, to achieve the target accuracy of 98%, a number
of 52 Ic - VDCLink pairs and 18 values for Tj have been used.
Therefore, considering three GDs (from Section II-D) and five

SINTAMAREAN et al.: RELIABILITY ORIENTED DESIGN TOOL FOR THE NEW GENERATION OF GRID CONNECTED PV-INVERTERS

Fig. 8.

Proposed LT-based conversion from DSM to LTSM. (a) From MP to Ic and Vd c . (b) From Ic and V d c to T j .

Fig. 9.

LT selection according to GDs and device degradation variation.

degradation levels (from Section II-E), a total number of 15 LTs

have to be used. In Fig. 9, it can be seen that depending on the
GDs applied and on the device degradation level, a specific LT
is selected.
The gate driver strategy 2 with VG = 15 V and RG = 20 is
considered for this specific study case. It is worth to mention that
the model is able to consider the gate driver parameter variation
and the device degradation impact on the lifetime of PV inverter
devices.
An analytical model for estimating the thermal profile from
loss profile is proposed. The impact of the heatsink time response on the junction temperature estimation [by considering
the total power loss dissipation (PLTotal ) variations with a
time step equal with the MP sampling data (TS )] is considered.
The proposed model is applied for estimating the temperature
drop across the heatsink (TH ) by considering the power dissipation. According to Fig. 10, the model considers the previous
actual dissipated power (Pn 1 ,Pn ), the time for which the power
is applied (tn 1 ,tn ), the thermal resistance (Rth H ), and time
response of the heatsink (H ). A generalized equation of the
model is presented below [see (4)]. Moreover, the model is applied for estimating the temperature drop across the heatsink
(TH ), thermal grease (TG ), and junction to case of the device (Tj c ). It is worth to mention that the LTSM also includes
a model that takes into consideration the internal ambient temperature of the converter (Tic ) as a function of the power loss

Fig. 10.

2641

Conversion from power losses to thermal profile.

dissipation and ambient temperature. Finally, by adding the temperature drop (TH , TG , Tj c ) together with the internal
ambient temperature of the converter (Tic ), the junction temperature of the device is estimated (Tj ) and used as a feedback in
the model (see Fig. 11)


t n 1
Tn 1 = Pn 1 Rth 1 e


t n t n 1
t n t n 1
Tn = Tn 1 e
+ Pn Rth 1 e
.
(4)
Finally, by considering all the above-mentioned conditions,
the proposed LTSM structure has been implemented according to Fig. 11 where, it can clearly differentiate the process
flow from MP Ic and VDC PLTotal/M OS Tj . Additionally, the impact of GDs and the device aging (D) is also
included.
IV. LIFETIME ANALYSIS OF PV INVERTER DEVICES
In order to consider the one-year real-field measurements of
the MP (solar irradiance and ambient temperature), the proposed
LTSM has been implemented.
According to the location where the PV inverter is operating,
the model is using as an input the MP (G and Ta ) for two different
locations: the first one from Denmark-Aalborg [see Fig. 3(a)]
and the second one from USA-Arizona [see Fig. 3(b)].

2642

Fig. 11.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 5, MAY 2015

Proposed LTSM structure.

Fig. 12. Realistic PV-inverter loading current and thermal loading estimation of the inverter devices (MOSFET, Diode) for a one-year operation in (a) Denmark
and in (b) the USA.

The proposed reliability oriented design tool is used to study

the impact of the MP variation and device aging degradation
in the PV inverter lifetime. For this purpose, the simulation has
been performed (using the gate driver strategy 2, VG = 15 V
and RG = 20 ) with and without considering the device aging
impact feedback.
The obtained simulation results are presented in Fig. 12 and
show the realistic load current of the converter (for a one-year
operation in Denmark [see Fig. 12(a)] and USA [see Fig. 12(b)])
due to the RFMP applied as an input to the model. Moreover, the
thermal loading distribution of the converter devices (MOSFET
and diode) in terms of junction and case temperature for the
mentioned simulation cases (Denmark [see Fig. 12(a)] and USA
[see Fig. 12(b)]) has been estimated.
The obtained one-year thermal loading distribution of the
converter devices in terms of mean junction temperature (Tj )

and junction temperature variation (Tj ) has been further used

as an input to the lifetime model presented in Section II-E.
Furthermore, the total device accumulated damage has been
determined according with Miners rule, with and without considering the device degradation feedback loop in the model.
Considering that the device fails when the accumulated damage
is 1, the expected PV inverter devices lifetime is predicted (see
Table IV).
The device degradation and MP variation impact in PV inverter lifetime is presented in Table IV.
According to the obtained results emphasized in Table IV,
the device degradation feedback has an impact from 20% (for
Denmark MP) to 30% (for US MP) in PV inverter lifetime
estimation accuracy. In order to have correct lifetime estimation,
it is crucial to consider also the device degradation feedback loop
in the simulation model.

SINTAMAREAN et al.: RELIABILITY ORIENTED DESIGN TOOL FOR THE NEW GENERATION OF GRID CONNECTED PV-INVERTERS

TABLE IV
MP AND DEVICE AGING IMPACT IN PV-INVERTER DEVICE LIFETIME
Lifetime

RFMP

Without
Degradation

With
Degradation

Degradation impact
in Lifetime

Denmark
USA

16.8 [years]
5.5 [years]

14 [years]
4.2 [years]

20 [%]
30 [%]

MP-variation
(from Denmark
to the USA)
impact in Lifetime
70% lifetime reduction

Furthermore, the device lifetime is 70% lower (see Table IV),

if the converter is operating in the USA when compared to
Denmark. Therefore, it can be concluded that the MP of the
field where the PV inverter is operating has a major impact on
the converter reliability and it should be considered in the design
stage to better optimize the converter design margin selection.
V. CONCLUSION
A reliability-oriented design tool for the new generation of
grid-connected PV inverter applications has been implemented.
The DSM of the tool has been performed considering an RFMP
model (for two operating regions: USA and Denmark), a PVpanel model, a grid-connected PV inverter model, an electrothermal model, and the lifetime model.
In order to consider the one-year RFMP data, an accurate
LTSM has been implemented. Therefore, the estimation of
one-year thermal loading distribution of the converter devices
(MOSFET and diode) has been achieved and further used as an
input to the lifetime model. The proposed reliability-oriented
design tool has been used to assess and study the impact of
the MP variation (from Denmark and the USA) and the device
degradation (aging) in the PV inverter device lifetime.
The obtained results indicate that the MP variation of the field,
where the PV inverter is operating, has an important impact (up
to 70%) in the converter reliability and it should be considered
from the design phase, in order to avoid overdesignunderdesign
of the product by choosing an optimum design margin with respect to the stress margin. Moreover, it has been shown that in
order to have correct lifetimereliability estimation, it is crucial
to consider also the device degradation feedback in the simulation model, which has an impact of 2030% in the accuracy of
the lifetime estimation.

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[5] L. M. Moore and H. N. Post, Five years of operating experience at a

large, utility-scale photovoltaic generating plant, J. Prog. Photovoltaic
Res. Appl., vol. 16, no. 3, pp. 249259, 2008.
[6] Y. Song and B. Wang, Survey on reliability of power electronic systems,
IEEE Trans. Power Electron., vol. 28, no. 1, pp. 591604, Jan. 2013.
[7] R. Burgos, C. Gang, F. Wang, D. Boroyevich, W. G. Odendaal, and J. D.
V. Wyk, Reliability-oriented design of three-phase power converters for
aircraft applications, IEEE Trans. Aerosp. Electron. Syst., vol. 48, no. 2,
pp. 12491263, Apr. 2012.
[8] X. Perpina` , X. Jord`a, M. Vellvehi, J. Rebollo, and M. Mermet-Guyennet,
Long-term reliability of railway power inverters cooled by heat-pipebased systems, IEEE Trans. Ind. Electron., vol. 58, no. 7, pp. 26622672,
Jan. 2011.
[9] F. Carastro, A. Castellazzi, J. Clare, and P. Wheeler, High-efficiency
high-reliability pulsed power converters for industrial processes, IEEE
Trans. Power Electron., vol. 27, no. 1, pp. 3745, Jan. 2012.
[10] A. M. Bazzi, K. A. Kim, B. B. Johnson, P. T. Krein, and A. DominguezGarca, Fault impacts on solar power unit reliability, in Proc. 26th Annu.
IEEE Appl. Power Electron. Conf. Expo., Mar. 2011, pp. 12231231.
[11] E. Cilio, B. McPherson, R. Schupbach, A. Lostetter, and J. Garrett, A
novel high density 100 kW three-phase silicon carbide (SiC) multichip
power module (MCPM) inverter, in Proc. Appl. Power Electron. Conf.,
2007, pp. 666672.
[12] M. Shen, S. Krishnamurthy, and M, Mudholkar, Design and performance
of a high frequency silicon carbide inverter, in Proc. IEEE Energy Convers. Cong. Expo., 2011, pp. 20442049.
[13] C. Sintamarean, E. P. Emi, F. Blaabjerg, R. Teodorescu and H. Wang,
Wide-bandgap devices in PV systems-opportunities and challenges, in
Proc. Int. Power Electron. Conf., 2014, pp. 19121919.
[14] C. Sintamarean, F. Blaabjerg, and H. Wang, Comprehensive evaluation
on efficiency and thermal loading of associated Si and SiC based PV
inverter applications, in Proc. 39th Annu. Conf. Ind. Electron. Soc., Nov.
2013, pp. 555560.
[15] E. Fred Schubert, Light-Emitting Diodes, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 2006.
[16] C. Sintamarean, F. Blaabjerg, and H. Wang, A novel electro-thermal
model for wide bandgap WBG-semiconductor based devices, in Proc.
IEEE Eur. Conf. Power Electron. Appl., Sep. 2013, pp. 110.
[17] H. Huang and P. A. Mawby, A lifetime estimation technique for voltage
source inverters, IEEE Trans. Power Electron., vol. 28, no. 8, pp. 4113
4119, Aug. 2013.
[18] M. Ciappa, Selected failure mechanisms of modern power modules, Microelectron. Reliab., vol. 42, pp. 653667, 2002.
[19] R. Bayerer, T. Hermann, T. Licht, J. Lutz, and M. Feller, Model for power
cycling lifetime of IGBT modules various factors influencing lifetime, in
Proc. 5th Int. Conf. Integr. Power Electron. Syst., Nuremberg, Germany,
Mar. 2008, pp. 16.
[20] U. Scheuermann and U. Hecht, Power cycling lifetime of advanced power
modules for different temperature swings, in Proc. PCIM Nuremberg,
2002, pp. 5964.
[21] W. W. Lee, L. T. Nguyen, and G. S. Selvaduray, Solder joint fatigue
models: Review and applicability to chip scale packages, Microelectron.
Reliab., vol. 40, pp. 231244, 2000.
[22] M. Held, P. Jacob, G. Nicoletti, and P. Scacco, Fast power cycling test for
IGBT modules in traction application, in Proc. Int. Conf. Power Electron.
Drive Syst., 1997, vol. 1, pp. 425430.
[23] Lifetime modelling and simulation, presented at the ECPE Workshop,
Dusseldorf, Germany, Jul. 34, 2013.

REFERENCES
[1] S. Yang, A. T. Bryant, P. A. Mawby, D. Xiang, L. Ran, and P. Tavner, An
industry-based survey of reliability in power electronic converters, IEEE
Trans. Ind. Appl., vol. 47, no. 3, pp. 14411451, May/Jun. 2011.
[2] S. E. De Leon-Aldaco, H. Calleja, F. Chan, and H. R. Jimenez-Grajales,
Effect of the mission profile on the reliability of a power converter aimed
at photovoltaic applicationsa case study, IEEE Trans. Power Electron.,
vol. 28 no. 6, pp. 29983007, Jun. 2013.
[3] H. Wang, K. Ma, and F. Blaabjerg, Design for reliability of power
electronic systems, in Proc. 38th IEEE Int. Conf. Ind. Electron., 2012,
pp. 3344.
[4] F. Chan, H. Calleja, and E. Martinez, Grid connected PV systems: A
reliability-based comparison, in Proc. IEEE Int. Symp. Ind. Electron.,
Jul. 2006, pp. 15831588.

Nicolae-Cristian Sintamarean (S12) received the

B.Sc. degree in electrical engineering from the
Technical University of Cluj-Napoca, Cluj-Napoca,
Romania, in 2010, and the M.Sc. degree in power
electronics and drives from Aalborg University, Aalborg, Denmark, in 2012, where he is currently working toward the Ph.D. degree.
His current research interests include the design
of the new generation of power electronics converters for renewable energy systems and the reliability
of power electronic systems.

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 5, MAY 2015

Frede Blaabjerg (S86M88SM97F03) received the Ph.D. degree from Aalborg University,
Aalborg, Denmark, in 1992.
He was with ABB-Scandia, Randers, Denmark,
from 1987 to 1988. He became an Assistant Professor in 1992, an Associate Professor in 1996, and a Full
Professor of power electronics and drives in 1998 at
Aalborg University. His current research interests include power electronics and its applications such as
in wind turbines, PV systems, reliability, harmonics,
and adjustable speed drives.
Dr. Blaabjerg has received 15 IEEE Prize Paper Awards, the IEEE PELS
Distinguished Service Award in 2009, the EPE-PEMC Council Award in 2010,
the IEEE William E. Newell Power Electronics Award in 2014, and the Villum
Kann Rasmussen Research Award in 2014. He was an Editor-in-Chief of the
IEEE TRANSACTIONS ON POWER ELECTRONICS from 2006 to 2012. He has been
a Distinguished Lecturer for the IEEE Power Electronics Society from 2005 to
2007 and for the IEEE Industry Applications Society from 2010 to 2011.

Francesco Iannuzzo received the Ph.D. degree in

electronics and information engineering from the
University of Naples, Naples, Italy, in 2001, with
a study on the reliability of power MOSFETs during
diode operations. He is primarily specialized in the
field of power device modeling.
He is full Professor of Reliable Power Electronics
at the Aalborg University, Aalborg, Denmark, where
he is also part of the Center of Reliable Power Electronics. He is an author or coauthor of more than
90 publications on journals and international conferences. His research interests are in the field of reliability of power devices,
including against cosmic rays, power device failure modeling and testing of
power modules up to megawatt-scale under extreme conditions, like overvoltage, overcurrent, and overtemperature.
Prof. Iannuzzo is a Senior Member of the IEEE Reliability Society and
Industrial Electronic Society and the Italian Electric, Electronic, and Telecommunication Association.

Huai Wang (S07M12) received the B.Eng. degree in electrical and electronic engineering from
the Huazhong University of Science and Technology, Wuhan, China, in 2007, and the Ph.D. degree
in electronic engineering from the City University of
Hong Kong, Kowloon, Hong Kong, in 2012.
He has been with Aalborg University, Aalborg,
Denmark, since 2012, where he is currently an Assistant Professor with the Department of Energy
Technology. He was a Visiting Scientist with the
ETH Zurich, Zurich, Switzerland, from August to
September, 2014, and with the Massachusetts Institute of Technology, Cambridge, MA, USA, from September to November, 2013. He was with the ABB
Corporate Research Center, Baden, Switzerland, in 2009. He has contributed
more than 20 journal papers and filed four patents. His current research interests
include the reliability of dc-link and ac filter capacitors, reliability of power
electronic systems, high-voltage dcdc power converters, time-domain control
of converters, and passive components reduction technologies.
Dr. Wang is a recipient of the six paper awards and project awards from industry, IEEE, and the Hong Kong Institution of Engineers. He serves the Guest
Associate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS Special
Issue on Robust Design and Reliability in Power Electronics, and a Session
Chair of various conferences in power electronics.

Peter de Place Rimmen is currently a Reliability Advisor at Danfoss Power Electronics A/S,
Graasten, Denmark. He started working at Danfoss
in 2009. He has worked with practical approach implementing reliability during the last 26 years in followed companies: Vestas Wind System R&D from
2004 to 2009, Grundfos Management from 1997 to
2004, and Bang & Olufsen R&D form 1988 to 1997.
Before that, he had careers at B&O as a Constructor, Test Engineer, Plant Manager, and Project Manager. He had for some time participated in IEC dependability group. He has together with Nokia trained Nokia R&D and Vestas
R&D people around the world in Design for Quality and Reliability. Currently, he is participating in CORPE Centre of Reliable Power Electronics at
Aalborg University, Training 2nd Master Class at Energy Technology Aalborg
University in Modern Reliability and in ZVEI Facts Sheets Group. In 2001,
he initiated the Danish Six Sigma ERFA-group, which is a subgroup of FAST
(Danish Society for Applied Statistics).