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Introduction
The objective of this chapter is to describe theoretical, mathematical
for three-phase inverter. There are three modes of operation of one half cycle
for Y-connected load.
This Impedance Source (Z - Source) Inverter is used to overcome the
Three phase A.C. supply is fed to the rectifier, which will convert three
phase A.C. supply to D.C.The rectified D.C.supply is now given to an inverter
through an impedance network. The impedance inverter output is now fed to
the induction motor as input. The process is explained in the flow diagram
shown in Fig.4.1.
4.3.
Theoretical Analysis
Impedance network is a two port network. A two port network is simply
a network inside a box and the network has only two pairs of accessible
terminals. Usually one pair represents the input and the other represents output.
This network is also called as lattice network. Lattice network is one of the
common four terminals two port network.
The lattice network is used in filter sections and is also used as
attenuators. Lattice networks are sometimes used in ladder structure in some
special applications. In this lattice network, L1 and L2 series arm inductances,
C1 and C2 are diagonal capacitances. This network is coupled with the main
L2
Fig.4.2:Equivalent circuit of Impedance Source Inverter (Z - Source)
state. When the load terminals are shorted through both upper and lower
devices of any one phase leg or all three phase legs this shoot through zero
state is forbidden in Voltage Source Inverter (VSI), because it would cause a
Shoot-Through. This network makes the Shoot Through zero state possible.
This state provides unique buck-boost feature to the inverter.
Impedance source network reduces to two capacitors (C1 and C2) in parallel
voltage inverter's capacitor requirements and physical size is the worst case
requirement for the Impedance Source Inverter (Z
Source). Considering
The Fig 4.2 gives equivalent circuit of impedance source network, a two
port network which is used to provide mathematical analysis.
Assume the inductors (L1& L2) and capacitors (C1& C2) have the same
inductance and capacitance values respectively.
L1&LP
C1&C2 -
VI
Input voltage
V2
Output voltage
.....4.1
VL1= V L=~VL
......4.2
VL = VC
vD=2vc
VL = 0
During the switching cycle T
vL=v0-vc
VD= Vo
v, = 2 v c - v o
.....4.5
T=To+T1
The average voltage of the inductors over one switching period (T)
should be zero in steady state
(Vo-vc>
VL=To.Vc+T1-=
- -(To-Ti)
T
T1Vo
VC+T-
Similarly the average DC link voltage across the inverter bridge can be found
v1 =
(To
+ TIl(2VC - VO)
T
T1
v1 = 2vc--T -v,
T
T1
2vc=vo
From equation (4.6)
= B . Vo
Where
'
B =A
( T ~ - Ti-ev~ ~ I
B = Boost factor
The output peak phase voltage from the inverter
V,
= M.-vi
2
In this source V,
= M.
B.
For Z Source
2
V,,
= M.
vo
2
V,,, = M.B.
inverter. The shoot through zero state does not affect P W M control of the
inverter. Because it produces the same zero voltage to the load terminals. The
available shoot through period is limited by the zero state periods that are
determined by the modulation index.
4.6,
- -
- source (or
- -
DC Voltage Source
Z Source
3-Phase Inverter
x<
-
Omrn
w
I'
11
41
'4
ir
b
b
Induction
Motor
rn
shown in Fig. 4.3. The inductance can be provided through a split inductor or
two separate inductors.
The Z
couple the converter main circuit to the power source, load, or another
converter, for providing unique features that cannot be observed in the
traditional V and I source converters where a capacitor and inductor are used,
respectively. The Z-source converter overcomes the above-mentioned
conceptual and theoretical barriers and limitations of the traditional Voltage
Source Inverter and Current Source Inverter and provides a novel power
conversion concept. The Z-source concept can be applied to all DC-to-AC,
AC-to-DC, AC-to-AC, and DC-to-DC power conversion. This work focuses on
application of the Z-Source inverter fed Induction Motor Drive: a Z-Source
inverter for DC to AC power conversion needed for Induction Motor.
4.7.
- stage
boost - buck inverter and one - stage topology which is somewhat considered
Seen from the AC side the Shoot-Through states are the same with null
states, so by replacing the null states with Shoot-Through states, the boost
function of Impedance Source (2 - Source) Inverter is achieved. The DC link
voltage of the bridge of Impedance Source (Z
expressed as
Where do is the duty cycle of Shoot-Through state. The output phase RMS
Where m zsI has a variation range from 1 l f i to 2 l f i for the boost function.
There are typically two categories of Pulse Width Modulation strategies
for Impedance Source (Z - Source) Inverter according to the different ShootThrough state insertion methods. The principle of this method is that the ShootThrough states are inserted at every transition by overlapping the upper and
lower driver signals.
The upper and lower driver signals can be derived by properly level
shifting the modulation signals of Voltage Source Inverter (VSI)as shown in
Fig.4.4. The shifting values are set properly so as to ensure the occupied
duration of the two null states to be the same. The feature of this modulation
strategy is that the transition time in one switching cycle is the same with
Voltage Source Inverter (VSI), the Shoot-Through ST state is divided into six
parts and the equivalent switching frequency of impedance network is six times
of switching frequency. Therefore the volume of inductors could be reduced
drastically.
4.8.
Voltage Source
Inverter
source
As capacitor and
as a constant current
Impedance
Source Inverter
voltage source.
as a constant high
impedance voltage
source.
of the switches
switches.
acceptable.
or boost operation of
buck or boost
inverter.
operation of inverter.
operation of
inverter.
be interchangeable.
cannot be
circuit can be
interchanged here
interchangeable
also.
4.9.
It is also affected by
noise.
noise.
Simulation Results
Results of Fig.4.5. shows the Impedance Source Inverter (Z - Source)
- Source)
Inverter fed Induction Motor Drive are shown in Fig. 4.6. The Fig. 4.6. (a).
shows the AC input voltage. Fig.4.6. (b) shows the rectified output voltage.
Fig. 4.6. (c) shows the Motor speed. Fig.4.6. (d) shows the FFT mttlysis. The
r i m e (Sec )
CSI
ZSI
AC
230
230
230
220
220
300
T.H.D. (%)
7.08
8.12
5.73
laboratory. The hardware consists of power circuit and control circuit. The
UART channel. This chip has built in analog comparator. It can work in lower
power ideal and power down modes. The pulses are generated by using the yC
8YCLU5 1 . I hey are ampl~fiedby uslng the dnver lClK 1110.
Time (Scc)
(a) l?rrrrngpulscs
Top view of Hardware is shown in Fig 4.7. Driving pulses given to the
MOSFET are shown in Fig - 4.8. (a). The line to line voltage across motor is
shown in Fig - 4.8. (b). The notches in the wave form are due to E.M.F induced
in the winding.
4.11. Conclusions
Impedance Source (Z
Source (Z
results are compared with their conventional inverters fed Induction Motor
Drive results. Finally the experimental results are presented and these are in
line with the simulation results.