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13

The table shows the assembly language instructions for a processor which has one general
purpose register the Accumulator.

For
Examiner's
Use

Instruction
Op Code

Explanation

Operand

LDD <address>

Load using direct addressing

STO <address>

Store the contents of the Accumulator at the given address

LDI <address>

Load using indirect addressing

LDX <address>

Load using indexed addressing

INC

Add 1 to the contents of the Accumulator

END

End the program and return to the operating system

(a) Write on the diagram to explain the assembly language instruction shown below.
Show the contents of the Accumulator after the execution of the instruction.
LDD 66

Accumulator

60
61
62
63
64
65
66
67

Main memory
0110 0000
0100 0000
1111 1110
1111 0000
0101 1101
0001 0001
1010 1000
1100 0001

200

1001 1111
[2]

(b) Write on the diagram to explain the assembly language instruction shown.
Show the contents of the Accumulator after the execution of the instruction.
LDI 61

Accumulator

60
61
62
63
64
65
66
67

Main memory
0110 0000
0100 0000
1111 1110
1111 0000
0101 1101
0001 0001
1010 1000
1100 0001

200

1001 1111
[3]

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14
(c) Trace this assembly language program using the given trace table. The first instruction
of the program is loaded into main memory at address 200.
200
201
202
203
204
205
206
207
208

Accumulator

LDD
INC
STO
LDD
INC
STO
END
16
150

208
208
207
207

Memory Address
207
208
16

150

[4]

(d) Explain the relationship between assembly language instructions and machine code
instructions.

[1]

UCLES 2012

9691/33/M/J/12

For
Examiner's
Use

Page 6
6

Mark Scheme: Teachers version


GCE A LEVEL May/June 2012

Syllabus
9691

Paper
33

(a)
LDD 66
60
61
62
63
64
65
66
67

Accumulator
1010 1000

Main memory
0110 0000
0100 0000
1111 1110
1111 0000
0101 1101
0001 0001
1010 1000
1100 0001

100 1001 1111


Mark as follows:
- Sensible annotation which makes clear 66 used
- Final value in Acc

[2]

(b)
LDI 61
60
61
62
63
64
65
66
67

Accumulator
0101 1101

Main memory
0110 0000
0100 0000
1111 1110
1111 0000
0101 1101
0001 0001
1010 1000
1100 0001

200 1001 1111


Mark as follows ...
- Go to address 61 // shows arrow to 61
- Pick up the forwarding address 64 // shows arrow to 64
Correct final contents copied to Acc // shows arrow from contents of 64 to Acc

University of Cambridge International Examinations 2012

[3]

Page 7

Mark Scheme: Teachers version


GCE A LEVEL May/June 2012

Syllabus
9691

Paper
33

(c)
Accumulator

Memory Address
207
208
16

150

150
151

151

16
17
17

Mark as follows ...


- 150 to Acc
- Incremented to 151 and copied to 208
- 16 copied to Acc and
- incremented to 17 copied to address 207
(d) Every assembly language instruction is translated into exactly one machine code instruction /
there is a 1-to-1 relationship between them
[1]
Total: 10

University of Cambridge International Examinations 2012

12
5

The table shows the assembly language instructions for a processor which has one general
purpose register the Accumulator.
Instruction
Op Code

Explanation

Operand

LDD

<address>

Load using direct addressing

STO

<address>

Store the contents of the Accumulator at the given address

LDI

<address>

Load using indirect addressing

LDX

<address>

Load using indexed addressing

INC

Add 1 to the contents of the Accumulator

END

End the program and return to the operating system

(a) Write on the diagram to explain the instruction shown.


Show the contents of the Accumulator after the execution of the instruction.
LDD 105

Accumulator

100
101
102
103
104
105
106
107

Main memory
0100 0000
0110 1000
1111 1110
1111 1010
0101 1101
0001 0001
1010 1000
1100 0001

200

1001 1111
[2]

(b) Write on the diagram to explain the instruction shown.


Show the contents of the registers after the execution of the instruction.
LDX 101

Accumulator

Index Register
0000 0011

100
101
102
103
104
105
106
107

Main memory
0100 0000
0110 1000
1111 1110
1111 1010
0101 1101
0001 0001
1010 1000
1100 0001

200

1001 1111
[4]

UCLES 2012

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For
Examiner's
Use

13
(c) Trace this assembly language program using the trace table below.
500
501
502
503
504
505
506
507
508
509
510

Accumulator

LDD
INC
STO
LDD
INC
STO
END
22
170
0
0

For
Examiner's
Use

507
509
508
510

507
22

Memory Address
508
509
170

510
0

[5]

(d) Explain the relationship between assembly language instructions and machine code
instructions.

[1]

UCLES 2012

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Page 4

Mark Scheme: Teachers version


GCE A LEVEL May/June 2012

Syllabus
9691

Paper
31

(a)
LDD 105
100
101
102
103
104
105
106
107

Accumulator
0001 0001

Main memory
0100 0000
0110 1011
1111 1110
1111 1010
0101 1101
0001 0001
1010 1000
1100 0001

200 1001 1111


Mark as follows:
- Sensible annotation which makes clear 105 is the address used
- Final value in Acc

University of Cambridge International Examinations 2012

[2]

Page 5

Mark Scheme: Teachers version


GCE A LEVEL May/June 2012

Syllabus
9691

Paper
31

(b)
LDX 101
100
101
102
103
104
105
106
107

Accumulator
0101 1101

Index Register
00000011

Main memory
0100 0000
0110 1011
1111 1110
1111 1010
0101 1101
0001 0001
1010 1000
1100 0001

200 1001 1111


Mark as follows:
- IR contents converted to 3
- Computed address of 101 + 3 = 104
// explanation: add contents of IR to address part of instruction
- Then, direct addressing to 104
- Final value in Acc

[MAX 4]

(c)
Accumulator

507

508

22

170

Memory Address
509
0

510
0

22
23
23
170
171
171
Mark as follows ...
- 22 to Accumulator
- Incremented to 23
- 23 copied to address 509
- 170 copied to Accumulator and incremented to 171
- 171 in address 510

[5]

(d) Every assembly language instruction is translated into exactly one machine code instruction /
there is a 1-to-1 relationship between them
[1]
[Total: 11]

University of Cambridge International Examinations 2012

6
3

The table shows the assembly language instructions for a processor which has one general
purpose register the Accumulator (ACC), and an index register (IX).
Instruction
Op Code

LDD <address>

Direct addressing. Load the contents of the given address


to ACC

STO <address>

Store the contents of ACC at the given address

LDI <address>
LDX <address>
INC <register>
ADD <address>
OUT
IN
END

UCLES 2013

Explanation

Operand

Indirect addressing. At the given address is the address to


be used. Load the contents of this second address to ACC
Indexed addressing. Form the address as <address> +
the contents of IX. Copy the contents of this address to ACC
Add 1 to the contents of the register (ACC or IX)
Add the contents of the given address to the contents of
ACC
Output the contents of ACC (as a denary number) to the
monitor
Input a denary number from the keyboard and store in ACC
End the program and return to the operating system

9691/31/M/J/13

For
Examiner's
Use

7
The diagram shows a program loaded in main memory starting at location 100.

For
Examiner's
Use

Two of the op-codes have been partially blanked out.


Locations 200 onwards contain data which is used by the program.

(a) The instruction at address 100 is fetched. Shown are the contents of the registers after
execution.
100
101
102
103
104
105
106
107

ACC
88

IX
2

200
201
202
203
204
205

LD
INC
INC
LD
INC
LDI
INC
END

202
ACC
ACC
203
ACC
203
ACC

38
205
88
200
48
126

Which mode of addressing was used by this load instruction at address 100?
[1]

(b) The instruction at address 103 is fetched. Shown are the contents of the registers after
execution.
ACC
126

IX
2
Which mode of addressing was used by this load instruction at address 103?
[1]

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8
(c) The instruction at address 105 is fetched and executed.
Draw on the diagram to explain how this instruction is executed and show the contents
of ACC after execution.
100
101
102
103
104
105
106
107

ACC

IX

200
201
202
203
204
205

LD
INC
INC
LD
INC
LDI
INC
END

202
ACC
ACC
203
ACC
203
ACC

38
205
88
200
48
126
[2]

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11

For
Examiner's
Use

9
(d) Trace this assembly language program using the trace table below.
The user inputs 19 followed by 37.
IN
INC
STO
IN
INC
ADD
STO
OUT
END

100
101
102
103
104
105
106
107
108

ACC

For
Examiner's
Use

ACC
109
ACC
109
110

Memory location
109
110

Output

[5]

(e) In (d) the program was shown in assembly language. In practice this must be machine
code in order to execute the program.
Explain how the assembler software translates a program from assembly language into
machine code.

[3]

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12

[Turn over

Page 4
3

Mark Scheme
GCE A LEVEL May/June 2013

Syllabus
9691

Paper
31

(a) Direct addressing / LDD

[1]

(b) Indexed addressing / LDX

[1]

(c) Annotation to show 203 used as a forwarding address

[1]

Accumulator contains 38

[1]

(d)
Memory location
ACC
19
20

109
(must be the first
column entry)

110

Output

20

37
38
58

58 /ft

58 /ft

1 mark for each of the emboldened numbers in the correct column and sequence
(e) Labels added to a (symbol) table // creates a list of addresses

[MAX 5]
[1]

Labels are later looked up to determine the actual address / Assembler must allocate
addresses to labels
[1]
Mnemonic looked up to give binary code/machine code

[1]

Macro instructions are expanded into a group of instructions

[1]

The software makes two passes through the source program

[1]
[MAX 3]

[Total: 12]

Cambridge International Examinations 2013

13

6
3

The table shows the assembly language instructions for a processor which has one general
purpose register the Accumulator (ACC), and an index register (IX).
Instruction
Op Code

Explanation

Operand

LDD <address>

Direct addressing. Load the contents of the given address


to ACC

STO <address>

Store the contents of ACC at the given address

LDI <address>
LDX <address>

Indirect addressing. At the given address is the address to


be used. Load the contents of this second address to ACC
Indexed addressing. Form the address as <address> +
the contents of IX. Copy the contents of this address to ACC

LIX <address>

Load the contents of the given address to IX

INC <register>

Add 1 to the contents of the register (ACC or IX)

ADD <address>
OUT
IN

Add the contents of the given address to the contents of


ACC
Output the contents of ACC (as a denary number) to the
monitor
Input a denary number from the keyboard and store in ACC

JMP <address>

Jump (unconditionally) to the given address

END

End the program and return to the operating system

The diagrams on the next page show a program loaded in main memory starting at address
100.
Two of the op-codes have been partially blanked out.
Locations 200 onwards contain data which is used by the program.

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For
Examiner's
Use

7
(a) The instruction at address 100 is fetched and executed. Shown are the contents of the
registers after execution.
100
101
102
103
104
105
106
107

ACC
42

IX
3

LD
INC
INC
LD
INC
LDD
INC
END

For
Examiner's
Use

202
ACC
ACC
203
ACC
204
ACC

38
205
88
200
48
42

200
201
202
203
204
205

Which mode of addressing was used by this load instruction at address 100?
[1]

(b) The instruction at address 103 is fetched. Shown are the contents of the registers after
execution.
100
101
102
103
104
105
106
107

ACC
38

IX
3

200
201
202
203
204
205

LD
INC
INC
LD
INC
LDD
INC
END

202
ACC
ACC
203
ACC
204
ACC

38
205
88
200
48
42

Draw on the memory diagram to explain how this instruction works. Which mode of
addressing was used by this load instruction at address 103?
[2]

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[Turn over

8
(c) Refer to the program used in (a) and (b). The instruction at address 105 is fetched and
executed.
Show the contents of ACC after execution.
ACC

IX
[1]

(d) Trace the first two iterations of this assembly language program using the trace table
below.
LIX
LDX
INC
OUT
INC
JMP

100
101
102
103
104
105

120

200
201
202
ACC

120
200
ACC
IX
101

165
93
107
IX

Output

[4]

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For
Examiner's
Use

9
(e) In (d) the program was shown in assembly language. In practice this must be machine
code in order to execute the program.

For
Examiner's
Use

Explain how the assembler software translates a program from assembly language into
machine code.

[3]

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[Turn over

Page 4
3

Mark Scheme
GCE A LEVEL May/June 2013

Syllabus
9691

Paper
33

(a) Indexed addressing // LDX

[1]

(b) Indirect addressing


Annotation to explain that address 203 is used as a forwarding address

[2]

(c) 48

[1]

(d)
ACC

IX
0

Output

165
166
166
1
93
94
94
(2)

Mark as follows:
Index register contain 0
Sequence of first box (or subsequent sequence for the same instructions)
Index register contains 1
Sequence for final box

[1]
[1]
[1]
[1]

(e) Labels added to a (symbol) table // creates a list of addresses


[1]
Labels are later looked up to determine the actual address / Assembler must allocate
addresses to labels
[1]
Mnemonic looked up to give binary code/machine code
[1]
Macro instructions are expanded into a group of instructions
[1]
The software makes two passes through the source program
[1]
MAX 3
[Total: 11]

Cambridge International Examinations 2013

18

6
For
Examiner's
Use

(a) Describe what is meant by a register.

[2]

(b) (i) Convert the denary number 60 into hexadecimal.


[1]
(ii) Convert the hexadecimal number 10F into denary.
[1]

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7
(iii) Why do computer scientists often write binary numbers in hexadecimal?

For
Examiner's
Use

[1]

(c) The diagram shows a program loaded into main memory starting at memory address
30 Hex.

Address

Main memory
(contents shown in
Hex.)

30
31
32
33

2150
A351
A552
FFFF

58
59
5A

003C
103C
010B

(i) How many bytes are used to store each program instruction?
[1]
(ii) Describe the steps in the fetch stage of the fetch-execute cycle.
Refer to the instruction at address 30 to illustrate your answer.

[5]

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8
(d) The following table shows some of a processors instruction set in assembly language.
Instruction
Explanation
Op Code

Operand

LIX <address>

Load the contents of the address to the Index register (IX)

LDX <address>

Indexed addressing. Form the address as <address> +


the contents of IX. Copy the contents of this address to ACC

STO <address>

Store the contents of ACC at the given address

ADD <address>

Add the contents of the given address to the ACC

INC <register>

Add 1 to the contents of the register (ACC or IX)

JMP <address>

Jump to the given address

The following program is to be executed.


Shown are:

the first six instructions of this program


the memory locations which will be accessed by this program.

Address

UCLES 2013

Main memory
contents

100
101
102
103
104
105

LIX 200
LDX 200
ADD 204
STO 204
INC IX
JMP 101

200
201
202
203
204

1
13
14
22
0

9691/32/O/N/13

21

For
Examiner's
Use

9
Complete the trace table below for three iterations of the loop.

For
Examiner's
Use

Show each change to the contents of the registers and memory location 204.

ACC

IX

Main memory
address 204
0

[4]

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22

[Turn over

Page 3

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

(a) Temporary storage location


general purpose/special (purpose)
Inside the (micro)processor

Paper
32

[1]
[1]
[1]
MAX 2

(b) (i) 3C

[1]

(ii) 271

[1]

(iii) Fewer digits used to represent any number // long string difficult to interpret
Less likely to make a mistake when copying/converting a digit string
Easy to convert from binary to hex (vice versa) than binary to denary
R. Hex is easier to understand/write

Cambridge International Examinations 2013

23

[1]
[1]
[1]
MAX 1

Page 4

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

(c) (i) 2 bytes

Paper
32
[1]

(ii) The Program Counter contains 30


MAR [PC]
// MAR given the contents of the PC
PC [PC] + 1 // PC is incremented
MDR [[MAR]] // The contents of the address in MAR is copied to MDR
CIR [MDR]
// The contents of MDR are copied to CIR

[1]
[1]
[1]
[1]
[1]

OR If the candidates answer uses the suggested instruction:


The Program Counter contains 30
PC contents are copied to MAR
PC contents are incremented to 31
The contents of address 30 / 2150 is copied to MDR
MDR contents / 2150 is copied to CIR

(d)
ACC

IX
1

[1]
[1]
[1]
[1]
[1]
MAX 5

Memory
Address
204
0

13
(13)
13 / ft
2
14
27
27
3
22
49
49
4
[4]
[Total: 15]

Cambridge International Examinations 2013

24

6
3

For
Examiner's
Use

(a) Most modern computers are designed using Von Neumann architecture.
Explain what is meant by Von Neumann architecture.

[2]

(b) (i) Convert the hexadecimal number 7A to denary.


[1]
(ii) Convert the binary number 0101 1100 to hexadecimal.
[1]

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7
(iii) Why do computer scientists often write binary numbers in hexadecimal?

For
Examiner's
Use

[1]
(c) The diagram shows a program loaded into main memory starting at memory address
7A Hex.

Address

Main memory
(contents shown in
Hex.)

7A
7B
7C
7D

2150
A351
A552
FFFF

90

003C

(i) How many bits are used for each main memory location?
[1]
The trace table below is used to show how the contents of the special-purpose
registers change as the program is executed.
The steps in the fetch stage of the fetch-execute cycle are shown in the first column
using register transfer notation. (For example, MAR [PC] means the content of the
Program Counter is copied to the Memory Address Register.)
(ii) Complete the trace table for the fetching of the first program instruction (2150):

Show the changing contents of the registers


Put a tick in the Address bus/Data bus column to show when the signals on
that bus change.
Fetch
stage

Special purpose registers


(Contents shown in Hex.)
PC

MAR

MDR

CIR

Buses
Address bus

Data bus

7A
MAR [PC]
PC [PC] + 1
MDR [[MAR]]
CIR [MDR]
[5]
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[Turn over

8
(d) The following table shows some of a processors instruction set in assembly language.
Instruction
Explanation
Op Code

Operand

LDD <address>
LDI <address>

Direct addressing. Load the contents of the given address


to ACC
Indirect addressing. At the given address is the address to
be used. Load the contents of this second address to ACC

LIX <address>

Load the contents of the address to the Index register (IX)

LDX <address>

Indexed addressing. Form the address as <address> +


the contents of IX. Copy the contents of this address to ACC

The following program is to be executed. Shown are:

the first four instructions only of this program


the memory locations which are accessed by this program.
Address
100
101
102
103

Main memory
LIX 200
LDD 201
LDI 201
LDX 201

200
201
202
203
204

3
216
99
217
63

216
217

96
97

Complete the trace table below for the first four program instructions.
Show each change in the contents of the registers.

Instruction

Register
Accumulator (ACC)
Index Register (IX)

LIX 200
LDD 201
LDI 201
LDX 201
[4]
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27

For
Examiner's
Use

Page 3

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

(a) a single processor


program consists of a sequence of stored instructions
Instructions + data
are stored (in a continuous block) of primary/main memory
instructions are executed in sequence

(b) (i) 122

Paper
31

[1]
[1]
[1]
[1]
MAX 2
[1]

(ii) 5C

[1]

(iii) Fewer digits used to represent any number // long string difficult to interpret
Less likely to make a mistake when copying/converting a digit string
Easy to convert from binary to hex (vice versa) than binary to denary

Cambridge International Examinations 2013

28

[1]
[1]
[1]
MAX 1

Page 4

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

Paper
31

(c) (i) 16 bits

[1]

(ii)
Fetch
stages

Special purpose registers


PC

MAR

MDR

CIR

Busses
Address
bus

Data bus

7A
MAR [PC]

7A

PC [PC] + 1

7B
2150

MDR [[MAR]]

2150

CIR [MDR]

For the buses column penalise once for any additional incorrect ticks

MAX 5

(d)
Instruction

Register
Accumulator
Index Register
(ACC)
(IX)

LIX 200

LDD 201

216

LDI 201

96

LDX 201

63

1 per contents

[4]
[Total: 15]

Cambridge International Examinations 2013

29

6
3

For
Examiner's
Use

(a) Describe what is meant by a register.

[2]

(b) (i) Convert the hexadecimal number 7F into denary.


[1]
(ii) Convert the denary number 291 into hexadecimal.
[1]
(iii) Why do computer scientists often write binary numbers in hexadecimal?

[1]

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30

7
(c) The diagram shows a program loaded into main memory starting at memory address
40 Hex.

Address

For
Examiner's
Use

Main memory
(Contents shown in
Hex.)

40
41
42
43

7324
A351
A552
FFFF

68
69
6A

003C
103C
010B

(i) How many bytes are used to store each program instruction?
[1]
(ii) Describe the steps in the fetch stage of the fetch-execute cycle.
Use the instruction at address 40 to illustrate your answer.

[5]

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[Turn over

8
(d) The following table shows some of a processors instruction set in assembly language.
Instruction
Explanation
Op Code

Operand

LDD <address>
LDI <address>

Direct addressing. Load the contents of the given address


to ACC
Indirect addressing. At the given address is the address to
be used. Load the contents of this second address to ACC

STO <address>

Store the contents of ACC at the given address

ADD <address>

Add the contents of the given address to the ACC

INC <register>

Add 1 to the contents of the register (ACC or IX)

JMP <address>

Jump to the given address

The following program is to be executed.


Shown are:

the first seven instructions in this program


the memory locations which will be accessed by this program.
Address
130
131
132
133
134
135
136

UCLES 2013

Main memory
LDI 160
ADD 153
STO 153
LDD 160
INC ACC
STO 160
JMP 130

150
151
152
153

13
23
11
0

160

150

9691/33/O/N/13

32

For
Examiner's
Use

9
Complete the trace table below for two iterations of the loop.
Show each change in the contents of the register and memory locations.
Register
ACC

For
Examiner's
Use

Memory location
153
160
0

150

[4]

UCLES 2013

9691/33/O/N/13

33

[Turn over

Page 3

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

Paper
33

(a) Temporary storage location


Inside the (micro)processor

[1]
[1]

(b) (i) 127

[1]

(ii) 123

[1]

(iii) less digits used to represent any number


Less likely to make a mistake when copying/converting a digit string
Easy conversion between binary and hex (vice versa) than binary and denary

(c) (i) 2 bytes

[1]
[1]
[1]
MAX 1
[1]

(ii) MAR [PC]


PC [PC] + 1
MDR [[MAR]]
CIR [MDR]

// MAR given the contents of the PC


// PC is incremented
// The contents of the address in MAR is copied to MDR
// The contents of MDR are copied to CIR

OR, if the candidate uses the suggested instruction .


MAR is given value 40 // PC contents of 40 are copied to MAR
7324/The contents of address 40 is copied to the MDR
PC is incremented from 40 to 41
7324/contents of location 40 is copied to CIR

Cambridge International Examinations 2013

34

[1]
[1]
[1]
[1]

[1]
[1]
[1]
[1]
MAX 5

Page 4

Mark Scheme
GCE A LEVEL October/November 2013

Syllabus
9691

Paper
33

(d)
Memory address
ACC

153

160

13

13
13
150
151
151
23
36
36
151
152
152
[4]
[Total: 15]

Cambridge International Examinations 2013

35

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