Professional Documents
Culture Documents
IIIIIII
Datasheet
Revision August 30, 2010
Application
USB 2.0
Cisco CCX Support
Bluetooth Co-existence
Low Power with Advanced Power Management
Operating Systems - Windows XP 32/64, 2000,
Windows 7,Vista 32/64 , Linux, Macintosh
Order Information
Part Number
RT5370N
Temp Range
-10~70
Package
Green/RoHS
Compliant 52LD QFN
(7.5mmx5.7mm)
Features
RF_2G_INP/
RF_2G_INN
RF
receiver
LNA
Baseband
RF
transmitter
PA
USB
USB bus
EEPROM/GPIO
/LED
System
Control
digital controlled
RF
Form No.QS-073-F02
-I-
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DSRT5370_V1.0_083010
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RF_PA_OUTP/
RF_PA_OUTN
MAC/
Packet
Buffer/
Encrption
Engine
RT5370
iiiiiii
Datasheet
Revision August 30, 2010
Table of Content
- i-
Rev.1
Kept by DCC
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Form No.QS-073-F02
Dr
DSRT5370_V1.0_083010
RT5370
1111111
Datasheet
Revision August 30, 2010
1. Pin Layout
V12A
V12A
V12A
PLL_VC_CAP
V12A
PLL_X1
PLL_X2
LDOPLL_OUT
LDO_RF_IN
LDO_RF_OUT
V33A
BG_RES
V12A
V12D
V12D
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
RF_INN
37
V12A
RF_INP
36
V12A
V12A
35
VDD
PA_V33P
34
GPIO7
PA_OUTP
33
GPIO6
PA_OUTN
32
GPIO5
PA_V33N
31
GPIO4
V33A
30
GPIO1
VDD
29
GPIO0
VCCIO
10
28
LED_RDYG_N
RST_N
11
27
LED_ACT_N
PADP
PADM
VDDA
VRES
21
22
23
24
25
26
-1-
Rev.1
Kept by DCC
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DSRT5370_V1.0_100709
Form No.QS-073-F02
af
VDDL
20
VCCIO
LDO_CORE_VI15
19
TEST_EN
18
GPIO11
17
GPIO10
16
GPIO9
15
GPIO8
14
GPIO3
13
GPIO2
12
LDO_CORE_VO12
RT5370
RT5370
Datasheet
Revision August 30, 2010
I
I
O
O
P
P
P
P
O
O
I
Crystal output
Crystal input
IO
IO
P
O
P
OD
OD
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
P
IO
IO
44
LDO_RF_IN
45
LDOPLL_OUT
RF PLL: 2 pins
46
PLL_X2
47
PLL_X1
RF REF: 2 pins
41
BG_RES
49
PLL_VC_CAP
Digital LDO: 3 pins
10
VCCIO
12
LDO_CORE_VO12
13
LDO_CORE_VI15
LED: 2 pins
27
LED_ACT_N
28
LED_RDYG_N
GPIO: 12 pins
29
GPIO0
30
GPIO1
19
GPIO2
20
GPIO3
31
GPIO4
32
GPIO5
33
GPIO6
34
GPIO7
21
GPIO8
22
GPIO9
23
GPIO10
24
GPIO11
USB:5 pins
14
VDDL
15
PADP
16
PADM
Type*
Form No.QS-073-F02
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Kept by DCC
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Pin
Name
RF TX/RX: 4 pins
1
RF_INN
2
RF_INP
5
PA_OUTP
6
PA_OUTN
RF Power: 12 pins
4
PA_V33P
7
PA_V33N
8,42
V33A
3, 40,48,
V12A
50,51,52
38,39
V12D
RF LDO: 3 pins
43
LDO_RF_OUT
RT5370
Datasheet
Revision August 30, 2010
17
VDDA
18
VRES
IO
3.3V IO power
11
RST_N
25
TEST_EN
Name
Type*
28
LED_RDYG_N
IO
21
GPIO8
IO
22
GPIO9
IO
Description
0: normal mode
1: RF_BIST mode
0: use internal electrical fuse
1: use external EEPROM
0: use internal program memory
1: use external program memory
-3-
Rev.1
Kept by DCC
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Form No.QS-073-F02
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*Notation of Type:
I
: input
O
: output
IO : bi-direction
OD : open-drain
P
: power
RT5370
Datasheet
Revision August 30, 2010
Conditions
Min
3.0
1.14
Typ
3.3
1.2
Max
3.6
1.38
Unit
V
V
Icc33rx
Icc12rx
HT40 MCS7
HT40 MCS7
35
190
mA
mA
Icc33tx
Icc12tx
HT40 MCS7
HT40 MCS7
230
110
mA
mA
-4-
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
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Parameters
3.3V Supply Voltage
1.2V Supply Voltage
Receiving
3.3V Current Consumption
1.2V Current Consumption
Transmission
3.3V Current Consumption
1.2V Current Consumption
RT5370
Datasheet
Revision August 30, 2010
RF Receiver
2.6.2
Min
2400
92
lna_gain<1:0> = 11
lna_gain<1:0> = 11
lna_gain<1:0> = 10
lna_gain<1:0> = 01
lna_gain<1:0> = 11, agc<5:1> =
11111
lna_gain<1:0> = 11
lna_gain<1:0> = 10
lna_gain<1:0> = 01
RF to Baseband Filter Input
RF Input
Typ
90
74
61
Max
2500
100
Unit
MHz
dB
dB
316
50
11.2
mV
dB
-30
-16
0
dBm
0.1
dBm
RF Transmitter
Typ
Max
2500
+15
+18
1
+23
-48
35
Unit
MHz
dBm
dBm
dB
dBm
-45
dBc
-141
30
dBm/Hz
dBc
25
40
0.5
dBc
dBc
dB/step
-5-
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Kept by DCC
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Form No.QS-073-F02
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Carrier Suppression
Single-Sideband Suppression
Tx ALC Gain Control Step
Min
2400
RT5370
Datasheet
Revision August 30, 2010
3 Register map
0000 h
USB controller (200h)
0200 h
SCH/DMA register (200h)
0400 h
distributed
register
SRAM (2KB)
SRAM (8KB)
2000 h
4000 h
4000 h
SRAM (8KB)
SRAM
(16KB)
Packet buffer
-6-
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SRAM
RT5370
Datasheet
Revision August 30, 2010
Init Value
0
0
0
0
0
0
0
0
0
0
Rev.1
Kept by DCC
t
af
0
0
0
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Init Value
RT5370
Datasheet
Revision August 30, 2010
MAC_INT3_EN
MAC_INT2_EN
MAC_INT1_EN
MAC_INT0_EN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MCU_CMD_INT_MSK
TX_DONE_INT_MSK5
TX_DONE_INT_MSK4
TX_DONE_INT_MSK 3
TX_DONE_INT_MSK 2
TX_DONE_INT_MSK 1
TX_DONE_INT_MSK 0
RX_DONE_INT_MSK
TX_DLY_INT_MSK
RX_ DLY_INT_MSK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1b1
2d2
0
0
0
0
1b0
1b0
1b0
1b0
1b0
Ret. Time 5 Years
Dr
Kept by DCC
1b0
-8-
Rev.1
8b0
Init Value
DSRT5370_V1.0_083010
Form No.QS-073-F02
Init Value
R/W
R/W
R/W
R/W
af
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RT5370
Datasheet
Revision August 30, 2010
RST_DTX_IDX0
1b0
1b0
7b0
8b0
Init Value
4h0
4h0
4h0
4h0
Init Value
4h0
4h0
4h0
4h0
-9-
Dr
DSRT5370_V1.0_083010
Kept by DCC
8b0
4h0
4h0
4h0
4h0
7b0
Init Value
Form No.QS-073-F02
Init Value
1b0
W1C
af
RT5370
Datasheet
Revision August 30, 2010
Init Value
16h0
16h0
Init Value
16h0
16h0
Init Value
4b0
4hF
1: Input
4b0
4b0
8hFF
1: Input
8h00
Init Value
8h0
Init Value
0
Init Value
0
Init Value
0
Init Value
0
Rev.1
Kept by DCC
Dr
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Init Value
0
Init Value
0
Init Value
0
Init Value
0
Init Value
0
0
0
0
0
0
0
0
- 11 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
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0
00
00
RT5370
Datasheet
Revision August 30, 2010
Init Value
0
0
0
8hf0
0
8h21
- 12 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
1
0
0
0
0
0
0
0
0
0
0
3h0
af
Kept by DCC
Init Value
- 13 -
Rev.1
Dr
DSRT5370_V1.0_083010
Init Value
0
Init Value
RT5370
Datasheet
Revision August 30, 2010
14
R/W
13
R/W
12
R/W
11
R/W
10
R/W
R/W
R/W
7:5
4
3
2
1
0
R/W
R/W
R/W
R/W
- 14 -
Kept by DCC
0
0
0
0
0
0
1
0
1
1
Init Value
0
0
0
0
0
0
0
0
0
Dr
DSRT5370_V1.0_083010
Rev.1
Init Value
8h1f
8h3f
8h9f
8h9f
3h3
5h10
0
R/W
R/W
R/W
af
23:21
20:16
15
RT5370
Datasheet
Revision August 30, 2010
2
1
0
W1C
W1C
W1C
READ_TX1Q
READ_TX2Q
READ_RX0Q
0
0
0
Init Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Init Value
- 15 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
0
0
0
0
0
0
0
0
0
0
0
0
RT5370
Datasheet
Revision August 30, 2010
Reserved
NULL2 frame Tx complete interrupt enable.
DMA to TX0Q frame transfer complete interrupt enable.
DMA to TX1Q frame transfer complete interrupt enable.
DMA to TX2Q frame transfer complete interrupt enable.
RX0Q to DMA frame transfer complete interrupt enable.
Host command interrupt enable.
NULL0 frame Tx complete interrupt enable.
NULL1 frame Tx complete interrupt enable.
Beacon frame Tx complete interrupt enable.
TX0Q to MAC frame transfer complete interrupt enable.
TX1Q to MAC frame transfer complete interrupt enable.
TX2Q to MAC frame transfer complete interrupt enable.
MAC to RX0Q frame transfer complete interrupt enable.
0
0
0
0
0
0
0
0
0
0
0
0
0
Init Value
0
Init Value
0
Init Value
0
Init Value
0
Init Value
8hec
8he8
8he4
8he0
Init Value
8hfc
8hf8
8hf4
8hf0
Init Value
8h22
8h02
- 16 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
af
15:13
12
R/W N2TX_INT_EN
11
R/W DTX0_INT_EN
10
R/W DTX1_INT_EN
9
R/W DTX2_INT_EN
8
R/W DRX0_INT_EN
7
R/W HCMD_INT_EN
6
R/W N0TX_INT_EN
5
R/W N1TX_INT_EN
4
R/W BCNTX_INT_EN
3
R/W MTX0_INT_EN
2
R/W MTX1_INT_EN
1
R/W MTX2_INT_EN
0
R/W MRX0_INT_EN
*This register is only for 8051
RT5370
Datasheet
Revision August 30, 2010
15:8
7:0
RO
RO
TX1Q_STA
TX0Q_STA
Tx1Q status
Tx0Q status
8h02
8h02
Init Value
8h00
8h00
8h00
8h00
Init Value
24h840080
8hFE
Init Value
0
0
13h140
13h000
Init Value
8h0c
8h08
8h04
8h00
Init Value
8h1c
8h18
8h14
8h10
- 17 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Init Value
0
0
0
0
0
0
Init Value
0
0
0
0
0
0
0
1
0
1
Init Value
0
0
0
0
0
0
0
Rev.1
Kept by DCC
af
0
0
0
0
0
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Init Value
0
RT5370
Datasheet
Revision August 30, 2010
23:20 R/W
(PTN_KICK)
LATENCY
19
AUTO_ADJUST
R/W
18:16 R/W
15:14 R
13:0 R/W
EXT_ADJUST_SCALE
RD_START_ADDRESS
0
1
0
0
14h1000
Init Value
0
14h03ff
0
0
Init Value
0
8hff
0
10h3ff
Init Value
0
8hff
0
10h3ff
Init Value
0
8hff
0
10h3ff
Init Value
0
8hff
0
10h3ff
Init Value
0
- 19 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
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RT5370
Datasheet
Revision August 30, 2010
R/W1
EFSROM_KICK
29:26 R
25:16 R/W
EFSROM_AIN
15:14 R/W
13:8 R/W
7:6 R/W
EFSROM_LDO_ON_TIME
EFSROM_LDO_OFF_TIME
EFSROM_MODE
5:0
EFSROM_AOUT
0
0
0x2
0x8
0
Init Value
0
Init Value
0
Init Value
0
Init Value
0
Init Value
0
21h3ff
0
1
0
1
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
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Init Value
0
30
RT5370
Datasheet
Revision August 30, 2010
P_DATAQ_BIST_FAIL
Q_HDRQ_BIST_FAIL
RETRYRAM_BIST_FAIL
RETRYSOTRAM_BIST_FAIL
BIST_FAIL_ROM
BIST_EFSROM_FAIL
BIST_PBF_FAIL
BIST_SMEM_FAIL
BIST_SEC_FAIL
NMAC_BIST_FAIL
BIST_FAIL_DM
BIST_FAIL_M0
BIST_FAIL_M1
BIST_FAIL_PM
BIST_RX_FAIL
BIST_TX_FAIL
ANY_OTHER_FAIL
BIST_DONE
Description
Write 1 to start BBP BIST, write 0 do nothing
Write 1 to start MAC BIST, write 0 do nothing
Write 1 to start USBPHY BIST, write 0 do nothing
USB BIST select high speed mode
0: full speed 1: high speed
PCIE endpoint P_DATAQ bist fail
PCIE endpoint Q_HDRQ bist fail
PCIE endpoint RETRYRAM bist fail
PCIE endpoint RETRYSOTRAM bist fail
8051 ROM bist fail
Efuse ROM bist fail
PBF buffer bist fail
PBF shared memory bist fail
SEC bist fail
NMAC bist fail
8051 DM bist fail
USB M0 bist fail
USB M1 bist fail
8051 program memory bist fail
Asynchronous interface RX bist fail
Asynchronous interface TX bist fail
ANY bist fail
Whole bist finish
Init Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Init Value
0
0
0
0
0
0
Init Value
0
0
0
0
0
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Init Value
0
0
0
OSC_CAL_OUT
af
20:0 R
RT5370
Datasheet
Revision August 30, 2010
PBF_BIST_MASK
CPU_BIST_MASK
INTERNAL_2A
RF_BIST_MODE_EN
R/W
RF_BIST_MODE_SET
7:1
0
R/W
R/W
INTERNAL_2B
RF_PA_MODE
0
0
0
0
0
0
0
Init Value
0
0
0
0
0
0
0
0
0
0
0
0
Init Value
0
0
1
1
4
15
20
Init Value
0
0
0
50
1
55
Init Value
0
12hbff
Init Value
0
0x0
- 22 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
13
R/W
12
R/W
11:10 R/W
9
R/W
RT5370
Datasheet
Revision August 30, 2010
23:0 R/W
BBP_UTIF_IN
0
Init Value
0
0x0
0
Init Value
0
0
Init Value
0
1
0
- 23 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Initial value
16h5390
16h0500
Initial value
0
1
1
1
0
0
0
0
0
0
0
0
1
- 24 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
0
0
0
Initial value
0
0
0
0
Initial value
0
0
Kept by DCC
af
- 25 -
Rev.1
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
RT5370
Datasheet
Revision August 30, 2010
20:18
17:16
R/W
R/W
MULTI_BCN_NUM
MULTI_BSSID_MODE
11:0
R/W
MAX_MPDU_LEN
Initial value
0
10
0
0
- 26 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
0
1
af
RT5370
Datasheet
Revision August 30, 2010
17
R/W
BBP_CSR_KICK
16
15:8
R/W
R/W
BBP_CSR_RW
BBP_ADDR
7:0
R/W
BBP_DATA
0
0
0
Initial value
0
0
22
0
Initial value
0
0
- 27 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
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RT5370
Datasheet
Revision August 30, 2010
R_LED_MODE
23:22
21:16
15:8
7:0
R
R/W
R/W
R/W
SLOW_BLK_TIME
LED_OFF_TIME
LED_ON_TIME
0
3
30
70
Initial value
77777777
Initial value
7
7
7
7
7
7
7
7
Initial value
77777777
Initial value
0
0
- 28 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
7
7
7
7
7
7
7
7
R/W
af
25:24
RT5370
Datasheet
Revision August 30, 2010
FORCE_BA_WINSIZE
Form No.QS-073-F02
Initial value
0
Initial value
0
Initial value
0
Initial value
0
Initial value
0
Initial value
0
Initial value
0
Initial value
0
- 29 -
Rev.1
Kept by DCC
af
R/W
Dr
05:00
0: disable,
1: enable
Forced BA window size
RT5370
Datasheet
Revision August 30, 2010
bit31=WCID255
0: disable, 1:enable
TX_BCN_BYPASS_MASK (offset: 0x108C, default: 0x0000_0000)
Bits
Type
Name
Description
Initial value
31:16 R/W
Reserved
0
15:0
R/W
TX_BCN_DROP_MASK0-15
Directly bypass TX Beacon frame of specific 0
Beacon
Bit0=Nth Beacon, bit1=(N-1)th Beacon, etc.
N is the number of beacons defined in
0x1014 ->MULTI_BCN_NUM
0: disable, 1:enable
AP_CLIENT_BSSID0_L (offset: 0x1090, default: 0x0000_0000)
Bits
Type
Name
Description
31:24 R/W
APC_BSSID0_3
AP client BSSID0 byte3
23:16 R/W
APC_BSSID0_2
AP client BSSID0 byte2
15:8
R/W
APC_BSSID0_1
AP client BSSID0 byte1
7:0
R/W
APC_BSSID0_0
AP client BSSID0 byte0
Initial value
0
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
- 30 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Initial value
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
Initial value
0
0
0
0
Initial value
0
0
0
Initial value
0
- 31 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0
0
0
0
RT5370
Datasheet
Revision August 30, 2010
R/W
R/W
R/W
APC_BSSID7_2
APC_BSSID7_1
APC_BSSID7_0
0
0
0
Initial value
0
0
0
Initial value
0
1250
0
250
0xD3
0xFF
314
- 32 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
3.4.2
Initial value
0
16
af
23:16
15:8
7:0
RT5370
Datasheet
Revision August 30, 2010
15:8
R/W
OFDM_SIFS_TIME
Initial value
0
1
1: enable
1
1: enable
1
1: enable
1
1: enable
- 33 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
0
1
af
Initial value
0
RT5370
Datasheet
Revision August 30, 2010
R/W
CH_STA_TIMER_EN
0
1: enable
Initial value
0
16
R/W
TSF_TIMER_EN
15:0
R/W
BCN_INTVAL
Initial value
0
0
0
00: disable
01: (STA infra-structure mode) Upon the reception of
BEACON frame from associated BSS, local TSF is always
updated with remote TSF.
10: (STA ad-hoc mode) Upon the reception of BEACON
frame from associated BSS, local TSF is updated with
remote TSF only if the remote TSF is greater than local TSF.
11: (AP mode) SYNC with nobody
Local 64-bit TSF timer enable
0
When enabled, TSF timer will re-start from zero.
0: disable
1: enable
BEACON interval (unit: 64us)
1600
This value specified the interval between
Maximum beacon interval is about 4sec.
Initial value
0
4
2
32
16
- 34 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
Initial value
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
0
Initial value
0
Initial value
0
Initial value
0
- 35 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0
RT5370
Datasheet
Revision August 30, 2010
16
R/W
BBP_IPI_KICK
15:0
R/W
BBP_IPI_TIMER
0
0
Initial value
0
1
0
1
0
14:8
7:0
R/W
R/W
SLEEP_TBTT_NUM
WAKEUP_LEAD_TIME
Initial value
0
0
0
20
Initial value
0
0
0
2
0
- 36 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Initial value
0
0
af
3.4.3
Initial value
0
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
7
3
2
0
Initial value
0
7
3
2
0
Initial value
0
7
3
2
0
Initial value
0
7
3
2
0
Initial value
0
3
3
2
2
0
1
1
0
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0x66
0x66
0x66
0x66
3.4.4
RT5370
Datasheet
Initial value
0x06
0x06
0x06
0x06
Initial value
0x66
0x66
0x66
0x66
Initial value
0x6666
0x66
0x66
Initial value
0x66
0x66
0x66
0x66
Initial value
0
0x66
0x66
Initial value
0
0x66
0
0x66
Initial value
0
0
0
0x66
Initial value
0
0x66
Initial value
330
- 38 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
19
18
17
16
15:14
13
12:10
9
8:6
5
4:2
1
0
R/W
R/W
R/W
R/W
R
R/W
R
R/W
R
R/W
R
R/W
R
TRSW_POL
TRSW_EN
RFTR_POL
RFTR_EN
Reserved
LNA_PE_G0_POL
Reserved
LNA_PE_G0_EN
Reserved
PA_PE_G0_POL
Reserved
PA_PE_G0_EN
Reserved
TRSW_EN polarity
TRSW_EN enable
RF_TR polarity
RF_TR enable
0
1
0
1
0
0
3
1
4
0
3
1
1
LNA_PE_G0 polarity
LNA_PE_G0 enable
PA_PE_G0 polarity
PA_PE_G0 enable
Initial value
0x0
0x4
0x8
0xC
Initial value
0
0xC
0x8
0x8
- 39 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0x0
0xC
0x4
0x8
RT5370
Datasheet
Revision August 30, 2010
RDG_IN_THRES
7:0
R/W
RDG_OUT_THRES
36
0x3F
- 40 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
0
0
R/W
af
15:8
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
1
15
10
Form No.QS-073-F02
Initial value
0
1
1
3000
4
7
Initial value
*
0x7F
0
0
- 41 -
Rev.1
Kept by DCC
RTS_RTY_LIMIT
af
R/W
Dr
7:0
Initial value
0
0
65535
RT5370
Datasheet
Revision August 30, 2010
R/W
10
R/W
R/W
R/W
7:0
R/W
0
0
0
0
32
Initial value
6
5
4
3
2
1
0
0
Initial value
EDCBA988
Initial value
14
13
12
11
10
9
8
8
Dr
- 42 -
Rev.1
af
Initial value
0
0
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
0
2
1
0
0
11
0: disable
1: enable
TX_RDG_EN
RDG TX enable
0: disable
1: enable
TX_MRQ_EN
MCS request TX enable
0: disable
1: enable
REMOTE_UMFS_EN
Remote un-solicit MFB enable
0: do not apply remote un-solicit MFB (MFS=7)
1: apply un-solicit MFB
TX_MFB_EN
TX apply remote MFB
0: disable
1: enable
REMOTE_MFB_LITETIM Remote MFB life time
E
Unit: 32us
RT5370
Datasheet
Revision August 30, 2010
19:18 R/W
CCK_PROT_NAV
17:16 R/W
CCK_PROT_CTRL
15:0
CCK_PROT_RATE
0x0003
0x0003
Initial value
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
0
0
- 43 -
Rev.1
Kept by DCC
Dr
R/W
CCK_TXOP_ALLOW
af
25:20 R/W
0: disable
1: enable
CCK TXOP allowance
(0: disallow, 1: allow)
Bit25: allow GF-40 TX
Bit24: allow GF-20 TX
Bit23: allow MM-40 TX
Bit22: allow MM-20 TX
Bit21: allow OFDM TX
Bit20: allow CCK TX
TXOP protection type for CCK TX
0: None
1: Short NAV protection
2: Long NAV protection
3: Reserved (None)
Protection control frame type for CCK TX
0: None
1: RTS/CTS
2: CTS-to-self
3: Reserved (None)
Protection control frame rate for CCK TX
(Including RTS/CTS-to-self/CF-END)
Default: CCK 11M
RT5370
Datasheet
Revision August 30, 2010
MM20_RTSTH_EN
25:20
R/W
MM20_PROT_TXOP
19:18
R/W
MM20_PROT_NAV
17:16
R/W
MM20_PROT_CTRL
15:0
R/W
MM20_PROT_RATE
Reserved
RTS threshold enable on MM20 TX
0: disable
1: enable
MM20 TXOP allowance
(0: disallow, 1: allow)
Bit25: allow GF-40 TX
Bit24: allow GF-20 TX
Bit23: allow MM-40 TX
Bit22: allow MM-20 TX
Bit21: allow OFDM TX
Bit20: allow CCK TX
TXOP protection type for MM20 TX
0: None
1: Short NAV protection
2: Long NAV protection
3: Reserved (None)
Protection control frame type for MM20 TX
0: None
1: RTS/CTS
2: CTS-to-self
3: Reserved (None)
Protection control frame rate for MM20 TX
(Including RTS/CTS-to-self/CF-END)
Default: OFDM 24M
0x4004
Initial value
0
0
8
0x4084
- 44 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
0
0
R
R/W
af
31:27
26
RT5370
Datasheet
Revision August 30, 2010
0x4004
Initial value
0
0
16
- 45 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
16
Initial value
0
0
af
RT5370
Datasheet
Revision August 30, 2010
GF40_PROT_RATE
Initial value
0
56
0
314
Initial value
0
36
0
202
Initial value
0x07
0x07
0x07
0x07
Initial value
0
0x0
0
0x0
DSRT5370_V1.0_083010
Form No.QS-073-F02
0x4084
- 46 -
Rev.1
Kept by DCC
af
R/W
Dr
15:0
RT5370
Datasheet
Revision August 30, 2010
23
22:20
R
R/W
19
18:16
R
R/W
AC0_FBK_SPEED
15:2
1
R
R/W
AC_TX_FBK_SPEED_EN
R/W
AC_TX_RTY_LIMIT_EN
0
0x0
0
0x0
0
0
0
Form No.QS-073-F02
- 47 -
Rev.1
Kept by DCC
af
Initial value
0
1
0
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
Dr
3.4.5
AC1_FBK_SPEED
6: fallback speed x4
7: fallback speed x8
Reserved
AC1 TX fallback speed
0: fallback speed x0
1: fallback speed x1/2
2: fallback speed x1/4
3: fallback speed x1/8
4: fallback speed x0
5: fallback speed x2
6: fallback speed x4
7: fallback speed x8
Reserved
AC0 TX fallback speed
0: fallback speed x0
1: fallback speed x1/2
2: fallback speed x1/4
3: fallback speed x1/8
4: fallback speed x0
5: fallback speed x2
6: fallback speed x4
7: fallback speed x8
Reserved
Per AC TX fallback speed enable
0: disable, 1: enable
Per AC TX retry limit enable
0: disable, 1: enable
RT5370
Datasheet
Revision August 30, 2010
R/W
CCK_SHORT_EN
R/W
CTS_40M_REF
R/W
CTS_40M_MODE
R/W
BAC_ACKPOLICY_EN
R/W
AUTO_RSP_EN
0
0
0
1
1
Initial value
0
0
1: enable
Initial value
0
Initial value
0
256
Initial value
- 48 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
R/W
af
Initial value
0
0
RT5370
Datasheet
Revision August 30, 2010
31:16
15:8
R
R/W
Reserved
OFDM_SIFS_COST
OFDM SIFS time (unit: 1us)
16
Applied after OFDM TX/RX.
7:0
R/W
CCK_SIFS_COST
CCK SIFS time (unit: 1us)
10
Applied after CCK TX/RX.
Note: The OFDM_SIFS_COST and CCK_SIFS_COST are used only for duration field calculation. It will not affect the
responding timing.
RX_PARSER_CFG (offset: 0x1418, default: 0x0FFF_0000)
Bits
Type
Name
Description
31:28 R
Reserved
27:16 R/W
LSIG_LEN_THRES
When the length in L-SIG is longer than this threshold,
the L-SIG TXOP will not be applied as NAV channel
reservation.
15:02 R
Reserved
1
R/W
RX_LSIG_TXOP_EN
Respect LSIG-TXOP as channel reservation
0: disable
1: enable
0
R/W
NAV_ALL_EN
Set NAV for all received frames
0: disable (unicast to me frame will not set the NAV)
1: enable
3.4.6
Initial value
4095
0
0
Initial value
0
0
Initial value
0
0
Initial value
0xc78f
0xc78f
3.4.7
Initial value
0
0
- 49 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0
0
0
0
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
0
0
0
0
0
0
0
0
0
0
Initial value
X
X
X
X
Initial value
0
X
X
X
- 50 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Bits
Type
Name
Description
Initial value
31:24 R
Reserved
0
15:8
R
CFPOLL_QC_BYTE1
Byte1 of QC of received QoS Data (+) CF-Poll frame
X
7:0
R
CFPOLL_QC_BYTE0
Byte0 of QC of received QoS Data (+) CF-Poll frame
X
Note: CFPOLL_RA_DW0, CFPOLL_RA_DW1, and CFPOLL_QC are updated after the reception of QoS Data (+) CF-Poll
frame and RX QoS CF-Poll interrupt (RX_QOS_CFPOLL_INT) is launched then.
3.4.8
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Kept by DCC
*
- 51 -
af
Form No.QS-073-F02
Dr
DSRT5370_V1.0_083010
Initial value
*
*
*
RT5370
Datasheet
Revision August 30, 2010
4:1
0
R
RC
TXQ_PID
TXQ_VLD
0: failed
1: success
TX Packet ID (Latched from TXWI)
TX status queue valid
0: queue empty
1: valid
*
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
- 52 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
- 53 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0
0
Initial value
0xFF
0xFF
0xFF
0xFF
Initial value
0xFF
0xFF
0xFF
0xFF
- 54 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
- 55 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
Initial value
0
0
RT5370
Datasheet
Revision August 30, 2010
Description
Client MAC address byte0
Client MAC address byte1
Initial value
0x00
0x00
0x02
0x03
0x04
R/W
R/W
R/W
WC_MAC_ADDR2
WC_MAC_ADDR3
WC_MAC_ADDR4
0x00
0x00
0x00
0x05
0x06
R/W
R/W
WC_MAC_ADDR5
BA_SESS_MASK0
0x00
0x00
0x07
R/W
BA_SESS_MASK1
Initial value
0
0
0
0
0
- 56 -
Rev.1
Kept by DCC
Dr
DSRT5370_V1.0_083010
Form No.QS-073-F02
af
0x00
RT5370
Datasheet
Revision August 30, 2010
Description
Security key byte3~0
Security key byte7~4
Security key byte11~8
Security key byte15~12
TX MIC key byte3~0
TX MIC key byte7~4
RX MIC key byte3~0
RX MIC key byte7~4
Initial value
*
*
*
*
*
*
*
*
Note:
1. FOR WEP40, CKIP40, ONLY BYTE4~0 OF SECURITY KEY ARE VALID.
2. For WEP104, CKIP104, only byte12~0 of security key are valid.
3. For TKIP, AES, all the bytes of security key are valid.
4. TX/RX MIC key is used only for TKIP MIC calculation.
5. 128 byte space of TX/RX MIC key are used together for WAPI MIC key.
IV/EIV/WAPI_PN format (4 DW)
When TXINFO.WIV=0, hardware will auto lookup IV/EIV/WAPI_PN from this table and update IV/EIV/WAPI_PN after
encryption is finished.
Offset
Type
Name
Description
Initial value
0x00
R/W
IV_FIELED
IV field
*
0x04
R/W
EIV_FIELED
EIV field
*
Offset
0x00
0x04
Type
R/W
R/W
Name
WAPI_PN_MSB
WAPI_PN_MSB
Description
WAPI PN byte11-byte8
WAPI PN byte15-byte12
Initial value
*
*
Note1: The key index and extension IV bit shall be initialized by software. The MSB octet of IV will not be modified by
hardware.
Note2: IV/EIV packet number (PN) counter modes:
a. For WEP40, WEP104, CKIP40, CKIP104, CKIP128 mode, PN=IV[23:0]. EIV[31:0] is not used.
b. For TKIP mode, PN = {EIV[31:0], IV[7:0], IV[23:16]}, IV[15:8]=(IV[7:0] | 0x20) & 0x7f) is generated by hardware.
c. For AES-CCMP, PN = {EIV[31:0], IV[15:0]}.
d. For non-WAPI mode, PN = PN + 1 after each encryption.
e. For WAPI mode, PN={WAPI_PN_MSB_1[31:0], WAPI_PN_MSB_0[31:0], EIV[31:0], IV[31:0]}.
f. For WAPI mode, PN=PN+2 when WAPI_MC_BC=0 in WCID attribute.
g. For WAPI mode, PN=PN+1 when WAPI_MC_BC=1 in WCID attribute.
Note3: Software may initialize the PN counter to any value.
Initial value
*
Description
WAPI KeyID byte
0-1: WAPI Key ID
2-255: reserved
- 57 -
Rev.1
Kept by DCC
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DSRT5370_V1.0_083010
Form No.QS-073-F02
af
RT5370
Datasheet
Revision August 30, 2010
23:16
15
R/W
R/W
WAPI_RSV_BYTE
WAPI_MCBC
14:12
11
R/W
R/W
BSS_IDX_MBS
10
R/W
RX_PKEY_MODE_MSB
9:7
R/W
RXWI_UDF
6:4
3:1
R/W
R/W
BSS_IDX
RX_PKEY_MODE
R/W
RX_PKEY_EN
*
*
*
*
*
*
*
Initial value
*
*
*
*
*
*
*
*
3: TKIP
7: CKIP128
Description
Pair-wise key for WCID0
Pair-wise key for WCID1
Pair-wise key for WCID2~253
Pair-wise key for WCID254
Pair-wise key for WCID255 (not used)
DSRT5370_V1.0_083010
Form No.QS-073-F02
Initial value
*
*
*
*
*
- 58 -
Rev.1
Kept by DCC
af
Security Table
Dr
3.6.2
RT5370
Datasheet
Revision August 30, 2010
Description
IV/EIV for WCID0
IV/EIV for WCID1
IV/EIV for WCID2~253
IV/EIV for WCID254
IV/EIV for WCID255 (not used)
Initial value
*
*
*
*
*
Description
WCID Attribute for WCID0
WCID Attribute for WCID1
WCID Attribute for WCID2~253
WCID Attribute for WCID254
WCID Attribute for WCID255
Initial value
*
*
*
*
*
Description
Shared key for BSS_IDX=0, KEY_IDX=0
Shared key for BSS_IDX=0, KEY_IDX=1
Shared key for BSS_IDX=0, KEY_IDX=2
Shared key for BSS_IDX=0, KEY_IDX=3
Shared key for BSS_IDX=1, KEY_IDX=0
Shared key for BSS_IDX=1, KEY_IDX=1
Shared key for BSS_IDX=1, KEY_IDX=2
Shared key for BSS_IDX=1, KEY_IDX=3
Shared key for BSS_IDX=2, KEY_IDX=0
Shared key for BSS_IDX=2, KEY_IDX=1
Shared key for BSS_IDX=2, KEY_IDX=2
Shared key for BSS_IDX=2, KEY_IDX=3
Shared key for BSS_IDX=3, KEY_IDX=0
Shared key for BSS_IDX=3, KEY_IDX=1
Shared key for BSS_IDX=3, KEY_IDX=2
Shared key for BSS_IDX=3, KEY_IDX=3
Shared key for BSS_IDX=4, KEY_IDX=0
Shared key for BSS_IDX=4, KEY_IDX=1
Shared key for BSS_IDX=4, KEY_IDX=2
Shared key for BSS_IDX=4, KEY_IDX=3
Shared key for BSS_IDX=5, KEY_IDX=0
Shared key for BSS_IDX=5, KEY_IDX=1
Shared key for BSS_IDX=5, KEY_IDX=2
Shared key for BSS_IDX=5, KEY_IDX=3
Shared key for BSS_IDX=6, KEY_IDX=0
Shared key for BSS_IDX=6, KEY_IDX=1
Shared key for BSS_IDX=6, KEY_IDX=2
Shared key for BSS_IDX=6, KEY_IDX=3
Shared key for BSS_IDX=7, KEY_IDX=0
Shared key for BSS_IDX=7, KEY_IDX=1
Shared key for BSS_IDX=7, KEY_IDX=2
Shared key for BSS_IDX=7, KEY_IDX=3
Initial value
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
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RT5370
Datasheet
Revision August 30, 2010
Description
Shared mode for SKEY0-SKEY7
Shared mode for SKEY8-SKEY15
Shared mode forSKEY16-SKEY23
Shared mode for SKEY24-SKEY31
Initial value
*
*
*
*
Initial value
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
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RT5370
Datasheet
Revision August 30, 2010
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Initial value
*
*
*
*
*
*
*
*
RT5370
Datasheet
Revision August 30, 2010
2 2 2 2 2
7 6 5 4 3
N
e
x
RSV
t
[2:0]
V
L
D
Q
S
E
L
W
I
V
1 1
6 5
RSV[7:0]
TxPktLength[15:0]
TXINF is prepared by host driver and used for passing information to DMA. Its size is 1 DW and put at the
head of each Tx frame. Following is the detail description of each field of TXINF:
TxBurst: force DMA transmit frame from current selected endpoint.
NextVLD: host driver info DMA current frame is not he last frame in current Tx queue.
QSEL[1:0]: packet buffer Q selection.
QSEL
Dest. In PBF
Function
Tx Priority
2b00
Tx0Q
Management
Highest
2b01
Tx1Q
HCCA
Medium
2b10
Tx2Q
EDCA
Lowest
2b11
N/A
N/A
N/A
WIV: wireless information (WI) valid.
TxPacketLength[15:0]: this field specify the frame length in unit of byte. It includes WI, 802.11 header, and
payload, but TXINF is not included.
bit 31
M
I
M
O
O
F Reserved
D
[2:0]
M
TX Packet
ID[3:0]
bit 0
STB
C
[1:0]
S
B
G
W
I
MCS[6:0]
Reserved[5:0]
WCID[7:0]
TXO
P
[1:0]
MPDU
desity
[2:0]
A
C
M F
M
F
T
M R
P
A
S
P A
D
C
S G
U
K
BAWinSize[5:0]
N
A
S
C
E
K
Q
IV [31:0]
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FRAG: 1: to inform TKIP engine this is a fragment, so that TKIP MIC is appended by driver at the last
fragment; hardware TKIP engine only need to insert IV/EIV and ICV.
MMPS: 1: the remote peer is in dynamic MIMO-PS mode
CFACK: 1: if an ACK is required to the same peer as this outgoing DATA frame, then MAC TX will send a
EIV [31:0]
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single DATA+CFACK frame instead of separate ACK and DATA frames. 0: no piggyback ACK allowed for the
RA of this frame.
TS: 1: This is a BEACON or ProbeResponse frame and MAC needs to auto insert 8-byte timestamp after
802.11 WLAN header.
AMPDU: this frame is eligible for AMPDU. MAC TX will aggregate subsequent outgoing frames having
<same RA, same TID, AMPDU=1> whenever TXOP allows. Even theres only one DATA frame to be sent, as
long as the AMPDU bit in TXWI is ON, MAC will still package it as AMPDU with implicit BAR. This adds only
4-byte AMPDU delimiter overhead into the outgoing frame and imply the response frame is a BA instead
of ACK. NOTE: driver should set AMPDU=1 only after a BA session is successfully negotiated, because Block
ACK is the only way to acknowledge in AMPDU case.
MPDU density: 1/4usec ~ 16usec per-peer parameter used in outgoing A-MPDU. (This field complies with
the minimum MDPU Starting Spacing of the A-MPDU parameter field of draft 1.08).
000- no restriction
001- 1/4 sec
010- 1/2 sec
011- 1 sec
100- 2 sec
101- 4 sec
110- 8 sec
111- 16 sec
TXOP: TX back off mode. 0: HT TXOP rule; 1: PIFS TX; 2: SIFS (only when previous frame exchange is
successful); 3: Back off.
MCS/BW/ShortGI/ /OFDM/MIMO: TX data rate & MIMO parameters for this outgoing frame to be filled
into BBP
ACK: this bit informs MAC to wait for ACK or not after transmission of the frame. Event though QOD DATA
frame has ACK policy in its QOS CONTROL field, MAC TX solely depends on this ACK bit to decide waiting of
ACK or not.
NSEQ: 1: to use the special h/w SEQ number register in MAC block.
BA window size: tell MAC the maximum number of to-be-BAed frames is allowed of the RA (RAs BA reordering buffer size)
WCID (Wireless Client Index) : lookup result of ADDR1 in the peer table (255=not found). This index is also
used to find all the attributes of the wireless peer (e.g. TX rate, TX power, pair-wise KEY, IV, EIV,). This
index has consistent meaning in both driver and hardware.
MSDU total byte count: total length of this frame.
Packet ID: as a cookie specified by driver and will be latched into the TX result register stack. Driver use
this field to identify special frames TX result.
IV: used by encryption engine.
EIV: used by encryption engine.
RT5370
Datasheet
Revision August 30, 2010
bit 0
TID
[3:0]
PHY
mode
[1:0]
UDF
[2:0]
RSV
[2:0]
STBC
[1:0]
RSV[7:0]
S
B
G
W
I
MCS[6:0]
Key
idx
[1:0]
SN[11:0]
RSSI_2[7:0]
RSV[15:0]
BSS
idx
[2:0]
WCID[7:0]
FN[3:0]
RSSI_1[7:0]
RSSI_0[7:0]
SNR_1[7:0]
SNR_0[7:0]
WCID: index of ADDR2 in the pair wise KEY table. This value uniquely identifies the TA. WCID=255 means
not found.
KEY Index: 0~3 extracted from IV field. For driver reference only, no particular usage so far.
BSSID index: 0~7 for BSSID0~7. Extract from 802.11 header (the last three bits of BSSID field).
UDF: User Defined Field.
MPDU total byte count: the entire MPDU length.
TID: extracted from 802.11 QOS control field.
FN: fragment number of the received MPDU. Extract from 802.11 header.
SN: sequence number of the received MPDU. Used for BA re-ordering especially that AMSDU are auto
segregated by hardware and lost the 802.11 header.
MCS/BW/SGI/PHYmode: RX data rate & related MIMO parameters of this frame got from PLCP header.
See next section for the detail.
RSSI0, RSSI1, RSSI2: BBP reported RSSI information of the received frame.
SNR0, SNR1: BBP reported SNR information of the received frame.
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Revision August 30, 2010
MCS = 1
MCS = 2
MCS = 3
MCS = 8
MCS = 9
MCS = 10
Short Preamble 5.5Mbps
MCS = 11
Short Preamble 11Mbps
Other MCS codes are reserved in legacy CCK mode.
BW and SGI are reserved in legacy CCK mode.
MODE = Legacy OFDM
MCS = 0
6Mbps
MCS = 1
9Mbps
MCS = 2
MCS = 3
MCS = 4
MCS = 5
12Mbps
18Mbps
24Mbps
36Mbps
MCS = 6
48Mbps
MCS = 7
54Mbps
Other MCS code in legacy CCK mode are reserved
When BW = 1, duplicate legacy OFDM is sent.
SGI are reserved in legacy OFDM mode.
MODE = HT mix mode / HT green field
MCS = 0 (1S)
(BW=0, SGI=0) 6.5Mbps
MCS = 1 (1S)
MCS = 2 (1S)
MCS = 3 (1S)
MCS = 4 (1S)
MCS = 5 (1S)
MCS = 6 (1S)
MCS = 7 (1S)
MCS = 32
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RT5370
Datasheet
Revision August 30, 2010
Package Information
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RT5370
Datasheet
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RT5370
Datasheet
Revision August 30, 2010
Revision History
Rev
Date
From
Description
1.0
2010/8/30
Yuchun Lin
Initial Release
This product is not designed for use in medical, life support applications. Do not use this product in these types of equipments or applications .This
document is subject to change without notice and Ralink assumes no responsibility for any inaccuracies that nay be contained in this document.
Ralink reserves the right to make change in the products to improve function, performance, reliability, and to attempt to supply the best product
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possible.