Professional Documents
Culture Documents
transistor
By
Sushmita Dandeliyaa and Anurag Srivastava
Semiconductor Physics
Contents
Setbacks of MOSFETs
Introduction to CNTFETs
CNTFET working
Important aspects of CNTFET
Effect of diameter variation
Conclusion
Future Work
Setbacks of MOSFETs
A MOSFET is a
semiconductor device,
most commonly used in the field of
VLSI Design, and
Power electronics.
Why CNTFET?
Continued
C= na1 +ma2
n, m = chirality parameter
a1 = a ( 3, 0)
a2 = a (
3 3
, )
2 2
=
Special Topics in Nanoelectronics
tan1
3
2 +
CNTFET Type
Based on geometry
Top Gate
Bottom Gate
Coaxial Gate
Based on operation
Schottky barrier
MOSFET
Working principle
SBCNTFET
Continued.
Id/Vds curve
MOSFET
CNTFET
Gc
5uF/cm2
2.4uF/cm2
Id
500uA/um
1500
uA/um
Mobility
7x10^6 cm/s
3.5x10^6 cm/s
Thermal velocity
2 times of mosfet
Contact
Dielectric
Gate structure
Passivation
Contacts
Dielectric
Choosing a dielectric for CNTFETs is not related to
Fermi level pinning or passivating surface states.
The most common fabrication method for
depositing high quality high- dielectrics is atomic
layer deposition (ALD)
Conti.
Conti..
Gate capacitance
= 2 +
ln(
)
=
=
=
=
=
Special Topics in Nanoelectronics
Gate structure
Top Gate
Bottom Gate
Fig. : Different gate geometries of CNTFET
Passivation Treatment
Cont
Summary
Future work
References
Guo, Jing, Supriyo Datta, and Mark Lundstrom. "A numerical study of scaling issues
for Schottky-barrier carbon nanotube transistors." Electron Devices, IEEE
Transactions on 51.2 (2004): 172-177.
Chen, A., Hutchby, J., Zhirnov, V., & Bourianoff, G. (2015). Emerging Nanoelectronic
Devices. John Wiley & Sons.
Zoheir Kordrostami and Mohammad Hossein Sheikhi, Fundamental Physical Aspects
of Carbon Nanotube Transistors, Nanotechnology and Nanomaterials, (2010).
Svensson, Johannes, and Eleanor EB Campbell. "Schottky barriers in carbon
nanotube-metal contacts." Journal of applied physics 110.11 (2011).
Tan, Michael Loong Peng, and Georgios Lentaris. "Device and circuit-level
performance of carbon nanotube field-effect transistor with benchmarking against a
nano-MOSFET." Nanoscale research letters 7.1 (2012): 1-10.
Sinha, Sujeet Kumar, and Santanu Chaudhury. "Impact of oxide thickness on gate
capacitancea comprehensive analysis on MOSFET, nanowire FET, and CNTFET
devices." Nanotechnology, IEEE Transactions on 12.6 (2013): 958-964.