ECE6660: Introduction to VLSI Systems

Lecture 1:

Introduction and overview

Lubna Alazzawi
Electrical and Computer Engineering
Wayne State University

Outline
Syllabus
Grading
Topics,
Final project. etc.
Introduction to VLSI
A brief history
CMOS transistors

Course Information (1)

Instructor:
Lubna Alazzawi
drlubna@wayne.edu
Office hours: T&Th 2:00 pm - 4:00 pm or by
appointment
Teaching Assistants
Ishak Oduvan Kunnummal
Email gd5977@wayne.edu

Course Information (2)

Prerequisites
ECE 4680, or equivalent
I assume you know the following topics
Boolean algebra, logic gates, etc.
Ohms law, resistors, capacitors, etc.

Course Information (3)

Textbook:
There is no text book for this course. Handouts and Blackboard lecture notes will be
provided.

Reference Textbooks:

Neil Weste and David Harris, CMOS VLSI Design: A Circuits and Systems Perspective,
fourth edition, 2011. ISBN: 978-0-321-54774-3.
Erik Brunvand, Digital VLSI Chip Design with Cadence and Synopsys CAD Tools, 1st
Edition, ISBN-13: 978-0321547996.
Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, 2nd Edition, 2013,
ISBN-13: 978-1107635715.
Dawoud Shenouda and R. Peplow, Digital System Design Use of Microcontroller, 2010,
ISBN: 978-87-92329-40-0

Reference:
Class handouts
Cadence manual set

Course Information (4)

The following topics will be covered:

Introduction to VLSI systems

CMOS transistor
Compound gates
Static and dynamic CMOS
Combinational circuits design
Sequential circuits design
Data path subsystems
CMOS circuits simulation
Layout design rules
VLSI design process
Structured design strategies
Design methodology and tools
CMOS logic and fabrication
Processor technologies and IC Structure
6

Course Information (5)

Extensive use of CAD software (Cadence) to synthesize
hardware, simulate circuit and to design VLSI circuits layout.
Labs:
During this course you will complete a series of labs.
The lab sets are due by the end of class.
You will master a variety of CAD tools and design techniques.
Based on this experience, you will propose and carry out a
final project.
Final Project:
There will be one major project assigned for this course.
The final project will be graded based on the final report.
Further details will be announced in class.
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Course Information (6)

Exams
There will be one midterm exam and one final exam:
The mid-term exam will be on Thursday, October 13th, 5:30 7:20 PM. Location: in class
The final exam will be on Thursday, December 15th, 5:30 7:20
PM. Location: in class
Note that all exams are closed book and closed notes.

Course Information (7)

Research Paper:
Each student will conduct a VLSI research paper that can be
completed within the semester.
The paper includes the following sections: introduction,
methods, conclusions, and references. Your references and
in-text citations must be in acceptable (consistent) format.
Research Presentation:
Students will develop a 20-30 slide power point presentation on
the research they conducted.
Talk time 15 minutes, plus 5 minutes Q&A.

Course Information (8)

Grading Weights:
Grading will follow approximately the divisions shown
below:
Labs: 25%
Final project: 15%
Research paper: 10%
Midterm Exam: 20%
Final Exam: 30%

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Questions?

What is VLSI
Very-Large-Scale-Integration (VLSI) is defined as a
technology that allows the construction and interconnection
of large numbers (millions) of transistors on a single
integrated circuit.
Integrated circuit is a collection of one or more gates
fabricated on a single silicon chip.

12

Integration Levels
The level of integration of chips has been classified as:
1. small-scale

SSI:

10 gates

2. medium-scale

MSI: 1000 gates

3. large-scale

LSI:

10,000 gates

4. very large scale. VLSI: > 10k gates

13

What does it take to design VLSI

systems
1. idea (need)

3. design
system 4. Analyze and
model
system

if satisfactory

2. write
specifications

5. Fabrication
6. test / work as
modeled?

14

A Brief History
1958: First integrated circuit
Flip-flop using two transistors
Built by Jack Kilby at Texas
Instruments
Courtesy Texas Instruments

2010
Intel Core i7 mprocessor
2.3 billion transistors
64 Gb Flash memory
[Trinh09]
2009 IEEE

15

Growth Rate
53% The annual growth rate over 50 years
No other technology in history has sustained such
a high growth rate lasting for so long.
Driven by miniaturization of transistors
Smaller is cheaper, faster, dissipate less power

[Moore65]
Electronics Magazine

16

Moores Law
In 1965, Gordon Moore noted that the number

of transistors on a chip doubled every 12

months.
He made a prediction that semiconductor

technology will double its effectiveness

every 18 months

17

Moores Law
Gordon Moore plotted transistor on each chip
Fit straight line on semi log scale

[Moore65] Electronics Magazine

18

And Now
Figure below shows that the number of transistors in Intel
microprocessor has doubled every 26 months since the 4004
processor.

19

Feature Size
Moores Law showing that size of the transistor
shrinking 30% every 2-3 years

20

Corollaries
Many other factors grow exponentially
Ex: clock frequency, processor performance

21

MOS Integrated Circuits

1970s processes usually had only nMOS transistors
Inexpensive, but consume power while idle

Intel
Museum.
Reprinted
with
permission.

Intel 1101 256-bit SRAM

Intel 4004 4-bit mProc

1980s-present: CMOS processes for low idle power

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CMOS Gate Design

23

Digression: Silicon Semiconductors

Modern electronic chips are built mostly on silicon substrates
Silicon is a Group IV semiconducting material
Crystal lattice: hold each atom to four neighbours

Si

Si

Si

Si

Si

Si

Si

Si

Si

24

Dopants

Pure silicon has few free carriers and conducts poorly

Adding dopants increases the conductivity drastically
Dopant from Group V material (e.g. As, P): extra electron (n-type)
Dopant from Group III (e.g. B, Al): missing electron, called hole
(p-type)

Si

Si

Si

Si

Si

Si

Si

As

Si

Si

Si

Si

Si

Si

Si

Si

Si

25

Dopant atoms
N-type doping: phosphorus or arsenic is added to the silicon
in small quantities. Phosphorus and arsenic each have five
outer electrons. The fifth electron has nothing to bond to,
so it's free to move around. Electrons have a negative
charge, hence the name N-type.
N-type silicon is a good conductor.

P-type doping:
Boron and gallium each have only three outer electrons.
They form "holes". The absence of an electron creates the
effect of a positive charge, hence the name P-type.
P-type silicon is a good conductor.

https://www.youtube.com/watch?v=IcrBqCFLHIY
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p-n Junctions
A junction between p-type and n-type semiconductor
forms a diode.
A diode is the first semiconductor (two terminals)
device
Current flows only in one direction

p-type

n-type

anode

cathode

Transistors
A transistor is an electronic device made of
semiconductor material.
Transistors have many uses including: amplification,
switching, voltage regulation, and the modulation of
signals and more

28

Invention of the Transistor

Before transistors were invented,
circuits used vacuum tubes:
Large in size
Heavy
Generate large quantities of heat
Require a large amount of power

29

Invention of the Transistor

In 1947, the first transistors were created at Bell
Telephone Laboratories
The word transistor is a combination of the terms
transconductance or "transfer and variable
resistor

30

Transistor Types
Bipolar transistors
npn or pnp silicon structure
Small current into very thin base layer controls large
currents between emitter and collector
Base currents limit integration density
Field Effect Transistors
The most common nMOS and pMOS (MOSFETS)
Voltage applied to insulated gate controls current
between source and drain
Low power allows very high integration

31

Bipolar Junction
Transistors (BJT)
A bipolar transistor essentially consists of a pair of
PN Junction diodes that are joined back-to-back.
Therefore, there are two kinds of BJT transistors:
The NPN transistor
The PNP transistor
Collector
Base

Emitter

32

Bipolar Junction
Transistors (BJT)
The BJT transistors have three terminals:
called the Emitter, Base, and Collector.

pnp BJT

npn BJT

33

Origin of the names

The Emitter 'emits' the electrons which pass through
the device
The Collector 'collects' them again once they've
passed through the Base
...and the Base is located at the middle and
more thin from the level of collector and
emitter
The emitter and collector terminals are made of
the same type of semiconductor material, while the
base of the other type of material
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Understanding of BJT

force voltage/current
water flow current
- amplification
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Schematic symbol of BJT

Transistor
-The arrow is always drawn on the emitter
-The arrow always point toward the n-type

pnp
IC=the collector current
IB= the base current
IE= the emitter current

npn

36

Field Effect Transistors

The most common types of Field Effect Transistors
are:
MOSFET (Metal-Oxide-Semiconductor Field-Effect
Transistors)
JFET (Junction Field-Effect Transistors)

37

Types of MOSFET

38

Complementary MOS
The Complementary Metal-Oxide-Semiconductor CMOS
technology provides two types of transistors (also called
devices):
n-type transistor (nMOS)
p-type transistor (pMOS)

NMOS transistor

PMOS transistor
39

MOS Transistors
Four terminals device: gate, source, drain and body
The nMOS transistor is made up of n-type source and drain and
a p-type substrate or body.
The PMOS transistor is just the opposite, it is made up of p-type
source and drain and a n-type substrate or body.

The gate of both types of the MOS transistors is formed by

Polysilicon, and the insulator is a Silicon Dioxide.

nMOS

pMOS

nMOS Operation
Body is usually tied to ground (0 V)

When the gate is at a low voltage:

Source-body and drain-body diodes are OFF
No current flows, transistor is OFF
Source

Gate

Drain
Polysilicon
SiO2
0

n+

n+
S

bulk Si

41

nMOS Operation Cont.

When the gate is at a high voltage:
Negative charge is attracted under the gate

Create a channel under the gate if the gate

voltage is above a threshold voltage (VT)
Now current can flow through n-type silicon
from source through channel to drain,
transistor is ON

pMOS Transistor
Similar, but doping and voltages reversed
Body tied to high voltage (VDD)
Gate low: transistor ON
Gate high: transistor OFF
Bubble indicates inverted behavior
Source

Gate

Drain

Polysilicon
SiO2

p+

p+
n

bulk Si

43

Power Supply Voltage

GND = 0 V
In 1980s, VDD = 5V
VDD has decreased in modern processes
High VDD would damage modern tiny transistors
Lower VDD saves power
VDD = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V, 1.0V,

44

Transistors as Switches
We can view MOS transistors as electrically
controlled switches
Voltage at gate controls path from source to drain
d
nMOS

pMOS

g=0

g=1

d
OFF

ON

OFF

ON
s

45

CMOS inverter circuit

Figure below shows the schematic and symbol for a
CMOS inverter or NOT gate using one nMOS
transistor and one pMOS transistor.

47

CMOS Inverter
A

VDD

0
1

OFF
ON

Y
ON
OFF

GND
48

Simplified View of CMOS

Inverter Circuit

49

Basic CMOS Logic

Technology
Input: gates connected together
g

Output: drains connected

Vdd

PMOS
d

The nMOS transistor source is

grounded

out

in
d
g

NMOS
s

While the pMOS transistor source is

connected to +V (Vdd)

Simplified view of CMOS

inverter circuit

51

Operation of CMOS inverter

circuit
When input voltage Vin is grounded (logic 0),
The nMOS is OFF, the pMOS is ON
Then Vout is pulled up to 1

+VDD

52

Operation of CMOS inverter

circuit
When input voltage is at +V (logic 1),
The nMOS is ON, the pMOS is OFF
Then Vout is pulled down to 0
+VDD

53

Lab 1

Schematic and Symbol of an INVERTER gate

Using Cadence

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