1

ELECTRONIC CIRCUITS LAB

List of experiments (Twelve experiments to be done):

Code No: 07A30491
I) Design and Simulation in Simulation Laboratory using multiSim OR
Pspice OR Equivalent Simulation Software (Any Six):
1 Common Emitter and Common Source amplifier
2 Two Stage RC Coupled Amplifier
3 Current shunt and Feedback Amplifier
4 Cascade Amplifier
5 Wien Bridge oscillator using Transistors
6 RC Phase Shift Oscillator using Transistors
7 Class A Power Amplifier ( Transformer less)
8 Class B Complementary Symmetry Amplifier
9 High Frequency Common base (BJT)/ Common gate ( JFET )
Amplifier

II) Testing in the Hardware Laboratory (Six Experiments : 3+3 ):

A Any Three circuits simulated in Simulation laboratory
B Any Three of the following
1 Class A Power Amplifier (with transformer load )
2 Class B Power Amplifier
3 Single Tuned Voltage Amplifier
4 Series Voltage Regulator
5 Shunt Voltage Regulator

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ELECTRONIC CIRCUITS LAB

(SOFTWARE)

Design and Simulation in Simulation Laboratory using Multisim

Introduction to multiSim
1. Common Emitter and Common Source amplifier
2. Two Stage RC Coupled Amplifier
3. RC Phase Shift Oscillator using Transistors
4. Class A Power Amplifier
5. Class B Complementary Symmetry Amplifier
6. Current shunt Feedback amplifier

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1. COMMON EMITTER AND COMMON SOURCE AMPLIFIER

COMMON EMITTER AMPLIFIER

AIM : To design and simulate the frequency response of common emitter

amplifier for a gain of 50.

CIRCUIT DIAGRAM :

THEORY:

The CE amplifier provides high gain and wide frequency response.

The emitter lead is common to both the input and output circuits are grounded.
The emitter base junction is at forward biased .The collector current is controlled
by the base current rather than the emitter current. The input signal is applied to
the base terminal of the transistor and amplified output taken across collector
terminal. A very small change in base current produces a much larger change in
collector current. When the positive is fed to input circuit it opposes forward bias
of the circuit which cause the collector current to decrease, it decreases the

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more negative. Thus when input cycle varies through a negative half cycle,
increases the forward bias of the circuit, which causes the collector current
increases .Thus the output signal in CE is out of phase with the input signal.

PROCEDURE

1. Select different components and place them in the grid.

2. For calculating the voltage gain the input voltage of 25mv (p-p) amplitude
and 1KHz frequency is applied, then the circuit is simulated and output
voltage is noted.
3. The voltage gain is calculated by using the expression
Av = Vo/Vi
4. For plotting frequency response, the input voltage is kept constant at
25mv(p-p) and frequency is varied.
5. Note down the output voltage for each frequency.
6. All readings are tabulated and Av in db is calculated using the formula
20 Log Vo/Vi.
7. A graph is drawn by taking frequency on X-axis and gain in dB on Y-axis
on a Semi log graph sheet.

THEORITICAL CALCULATIONS :

R2 2400
V B= V CC = 12=2 V
R 1+ R 2 14400
V E =V B V BE =20.7=1.3 V
VE 1.3
IE= = =3.3 mA
390
V C =V CC I C R C =120.0033 1500=7.05 V

To calculate Av, Zin(base) and Z in :

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25 mV 25
r 'e= = =7.575
IE 3.3
RC R L 1500 1000
r L= = =600
R C + R L 1500+1000
rL 600
AV = = =79.20
r ' e 7.575
Z (base)= r ' e =40 7.575=303

Z =Z(base) R1 R 2=303 12000 2400=263

Z 263
V b= 25 mV = =7.61mV
RG + Z 600+ 263

V out = A V V b=79.20 7.61 mV =0.603 V

PRACTICAL CALCULATIONS :

V =

V out =

V out
AV = =
V

OBSERVATIONS :

Frequency(Hz) Voltage Gain

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INPUT WAVE FORM :

OUT PUT WAVE FORM :

FREQUENCY RESPONSE :

BAND WITH: f 2f 1 =HZ

RESULT : The frequency response of common emitter amplifier is simulated

and bandwidth is noted.
VIVA QUESTIONS :

1 What is the phase difference between input and output waveforms of CE

amplifier?
2 What type of biasing is used in the given circuit?
3 If the given transistor is replaced by P-N-P ,Can we get the output or not?
4 What is the effect of emitter bypass capacitor on frequency response?
5 What is the effect of coupling capacitor?
6 What is the region of transistor so that it operates as an amplifier?
7 Draw the h-parameter model of CE amplifier.
8 How does transistor acts as an amplifier.

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COMMON SOURCE AMPLIFIER

AIM : To design and simulate the frequency response of common source
amplifier
for a gain of 5.

CIRCUIT DIAGRAM:

THEORY:
A weak signal is applied between gate and source and output is
obtained at drain. For the proper operation of FET, gate must be reverse biased.
A small change in reverse bias on the gate produces a large drain current. This
fact makes FET capable of raising the strength of a weak signal. The gain of the
common source FET amplifier is very high which is greater than unity.

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PROCEDURE:
1. Select different components and place them in the grid.
2. For calculating the voltage gain the input voltage of 0.2V(p-p) amplitude
and 1KHz frequency is applied, then the circuit is simulated and output
voltage is noted.
3. The voltage gain is calculated by using the expression Av = Vo / Vi
4. For plotting frequency response the input voltage is kept constant at
0.2V(p-p) and frequency is varied.
5. Note down the output voltage for each frequency.
6. All readings are tabulated and Av in dB is calculated using 20 Log Vo /
Vi.
7. A graph is drawn by taking frequency on X-axis and gain in dB on Y-axis
on a Semi-log graph sheet.
THEORITICAL CALCULATIONS :
R D R L 1500 10000
r L= = =1300
R D + R L 1500+10000
I DSS =10 mA , V GS=4 V
2 I DSS 2 10 mA
gmo= = =5 mS
V GS(off ) 4V

[
gm=g mo 1
V GS
V GS (off ) ] [
=5 mS 1
1
4]=3.75 mS

V = gm r L =3.75 mS 1300=4.875
A
V =0.2V PP
V out = A V V =4.875 0.2 V PP=0.935 V PP

PRACTICAL CALCULATIONS :

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V =0.2V PP
V out =
V out
AV = =
V

OBSERVATIONS :
Frequency(Hz) Voltage Gain

INPUT WAVE FORM :

OUT PUT WAVE FORM :

FREQUENCY RESPONSE :

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BAND WITH: f2 - f 1 = Hz

RESULT : The frequency response of common source amplifier is simulated and

the bandwidth is noted..

VIVA QUESTIONS:

1 How does FET acts as an amplifier?

2 What are the parameters of a FET?
3 What is an amplification factor?
4 Draw the h-parameter model of the FET.
5 What are the advantages of FET over BJT?
6 What is the region of FET so that it acts as an amplifier?
7 What are the differences between JFET and MOSFET?
8 What type of biasing is used in the given circuit?

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2. TWO STAGE RC COUPLED AMPLIFIER

AIM: To simulate and observe the frequency response of RC coupled amplifier.

CIRCUIT DIAGRAM :

THEORY:

RC is the most widely used coupling as it provides excellent audio fidelity.

A coupling capacitor is used to connect output of first stage to the input of the
second stage. Resistances R1, R2, R5, R3, R4 and R10 form biasing and
stabilisation network. Emitter bypass capacitors C 5 and C6 offer low reactance
paths to the signals. The coupling capacitor C 3 transmits ac signal and blocks dc
signal. Cascaded stages amplifies signal and overall gain is improved. The total
gain is less than the product of gains of individual stages. Thus overall gain of
two stages is A = A 1 x A2, where A1 =
Voltage gain of first stage and A2 = Voltage gain of second stage

When ac signal is applied to the base of the transistor Q 1, its amplified

output appears across the collector resistor R 9. It is given to the second stage for

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further amplification and signal appears with more strength. Frequency response
curve is obtained by plotting a graph between frequency and gain in dB. The
gain is constant in midband frequency range and gain decreases in low and high
frequency ranges. The gain decreases in the low frequency range due to
coupling capacitor C3 and at high frequencies due to junction capacitance C be .

PROCEDURE:

1. Select different components and place them in the grid.

2. Apply input by using function generator to the circuit and simulate the
circuit.
3. Observe the output waveform on CRO.
4. Measure the voltage at
(i) Output of the first stage
(ii) Output of the second stage
5. From the readings, calculate voltage gain of first stage, second stage and
overall gain. Disconnect second stage and then measure output
voltage of first stage and calculate voltage gain.
6. Compare it with the voltage gain obtained when second stage was
connected.
7. For plotting the frequency response, the input voltage is kept constant at
2mv (p-p) and the frequency is varied from 100Hz to 1MHz.
8. Note down the value of output voltage for each frequency.
9. All the readings are tabulated and voltage gain in dB is calculated by
using the expression
Vo
A V =20 log 10
Vi
A graph is drawn by taking frequency on X-axis and gain in
dB on Y-axis on a Semilog graph sheet.
10. The bandwidth of the amplifier is calculated from the graph using the
expression
Bandwidth = f2 f1.
Where f1 = Lower cutoff frequency of CE amplifier.
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f2 = Upper cutoff frequency of CE amplifier

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THEORITICAL CALCULATIONS :
DC Analysis :
Calculation of RC& RE :

Given I C =1 mA ,V CE =5 V ,V E =2V for the operating point to be

approximately for the centre point with this data.
I C 1 mA
I B= = =0.025 mA
40

= IB + IC = 0.025mA + 1mA = 1.025mA

VE 2V
Choose V E =2v then RE = = = 1.95 k
IE 1.025 mA

Then Vc = VCC (VE + VCE ) = 9 ( 2 + 5 ) = 2V

VC 2V
RC = = = 2k
IC 1 mA

It is recommended that RE must be less than RC selected

RE = 1k and RC = 2k
Calculation of R3 & R4 :
The Thevenins equivalent voltage base

R4
VB = VCC and is equal to sum of VBE & VE.
R 3+ R 4

VBE + VE = 0.7 + 2 = 2.7v

R4 VB 2.7
R 3+ R 4
= V CC
= 9
= 0.3

R3 = 2.33 R4
Choose the current flowing through R4 is I4

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IC 1 mA
I4 = 10
= 10 = 100 A

V BE 2.7
R4 = = = 27k
I4 100

R4 = 2.33k, R3 = 27k

Select R3 = 2.2k , R4 = 27k

AC Analysis:
The voltage gain of an amplifier can be taken as

R L'
Av = = 10
Re

20 mv 20 mv
Where Re = = = 25
IE 1.04 mA

R L'
Av = = 10 => RL = 250
Re

RL = RCII RL = 2.2k II RL => RL = 282

There is resistance offered between collector and emitter choose R L = 300

for ac analysis select
Ce = 100f, Cc = 1 f, Rs =2k

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PRACTICAL CALCULATIONS:

Vi1 =
Vo1 =

Vo 1
Av1 = =
Vi 1

Vi2 = Vo1
Vo2 =

V 02
Av2 = =
Vi 2

Av =Av1*Av2 =

Vo 2
Av = =
Vi 1

OBSERVATIONS:

Frequency (Hz) Voltage Gain

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INPUT WAVE FORM :

OUT PUT WAVE FORM OF STAGE 1 :

OUT PUT WAVE FORM OF STAGE 2 :

FREQUENCY RESPONSE :

BAND WITH: f2 - f1 = Hz

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RESULT: The RC coupled amplifier is simulated, the frequency response is

observed and the bandwidth is noted.

VIVA QUESTIONS:

1 What is the necessity of cascading?

2 Define 3-dB bandwidth.
3 Why RC-coupling is preferred in audio range.
4 Explain various types of capacitors.
5 What is loading effect?
6 What is meant by RC coupling?

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3. RC PHASE SHIFT OSCILLATOR

AIM: To construct and simulate the RC phase shift oscillator and to verify the
frequency of oscillation.

CIRCUIT DIAGRAM:

THEORY:

RC-Phase shift Oscillator has a CE amplifier followed by three

sections of RC phase shift feed back networks. The out put of the
last stage is return to the input of the amplifier. The values of R and
C are chosen such that the phase shift of each RC section is 60.
Thus The RC ladder network produces a total phase shift of 180
between its input and output voltage for the given frequencies.
Since CE Amplifier produces 180 phases shift the total phase
shift from the base of the transistor around the circuit and back to
the base will be exactly 360 or 0. This satisfies the Barkhausen
condition for sustaining oscillations and total loop gain of this circuit
is greater than or equal to 1, this condition used to generate the
sinusoidal oscillations.
The frequency of oscillations of RC-Phase Shift Oscillator is,

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1
f=
2 RC 6
PROCEDURE:

1. Select different components and place them in the grid and simulate the
circuit.
2. Observe the output signal and note down the output amplitude and time
period (Td).
3. Calculate the frequency of oscillations theoretically and verify it practically
(f=1/Td).
4. Calculate the phase shift at each RC section by measuring the time shifts
(Tp) between the final waveform and the waveform at that section by
using the below formula.

OBSERVATIONS :
THEORITICAL CALCULATIONS : R = 10000, C = 0.001 f

1 1
f= = = 6.497 kHZ
2 RC 6 6.283105

PRACTICAL CALCULATIONS:

Td =
1
f= =
Td

tp
(1). 1= *3600 =
Td
tp
(2). 2 = * 3600 =
Td
tp
(3). 3= *3600 =
Td

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OUT PUT WAVE FORM :

OUT PUT WAVE FORM AT POINT 1 (i. e., = 600):

OUT PUT WAVE FORM AT POINT 2 (i. e., = 1200):

OUT PUT WAVE FORM AT POINT 3 (i. e., = 1800):

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RESULT : RC phase shift oscillator is simulated and the phase shift at points 1,
2 & 3 is noted.

VIVA QUESTIONS:

1 Mention the conditions for oscillations in RC phase shift oscillator?

2 Give the formula for frequency of oscillations in RC phase shift oscillator?
3 The phase produced by a single RC network is RC phase shift oscillator?
4 RC phase shift oscillator uses positive feedback or negative feedback?
5 The phase produced by basic amplifier circuit in RC phase shift oscillator
is?
6 What is the difference between damped oscillations undamped
oscillations?
7 What are the applications of RC oscillations?
8 How many resistors and capacitors are used in RC phase shift feedback
network.
9 How the Barkhausen criterion is satisfied in RC phase shift oscillator
10. Mention the basic reason for any oscillations.

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4. CLASS A POWER AMPLIFIER

AIM: To simulate and verify the efficiency of class A power amplifier.

CIRCUIT DIAGRAM:

THEORY:

The function of power amplifier is to raise the power level of input signal.
Class A power amplifier is one in which the output current flows during the entire
cycle of input signal. Thus the operating point is selected in such away that the
transistor operates only over the linear region of its load line. So this amplifier
can amplify input signal of small amplitude. As the transistor operates over the
linear portion of load line the output wave form is exactly similar to the input
wave form. Hence this amplifier is used where freedom from distortion is the
prime aim.

PROCEDURE:
1. Select different components and place them in the grid.
2. Apply the input ac signal voltage of 160mV (p-p) and simulate the circuit.

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3. Observe the output wave form on CRO and measure the output voltage
V0.
4. Now connect the ammeter at collector terminal of transistor.
5. Disconnect the ac signal from input and measure the collector current Ic
in ammeter.
6. calculate the efficiency by using practical calculations compare it with
theoretically calculated efficiency

OBSERVATION :
THEORITICAL CALCULATIONS :

V CC
ICQ = RL
2

Ic
ICQ =
2

VccVcc Vcc 2
Pin(dc) = =
2 RL 2 RL

V
( maxV min )(I max I min )
Po(a.c) =
8

V CC
(Imax Imin) =
RL

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(Vmax Vmin) = VCC

V CC V cc2
Po(a.c) =
8 RL
= 8 RL

2
V CC
P o (ac) 8 RL
% of efficiency = *100= * 100=25%
P ( dc) V CC2
2 RL

PRACTICAL CALCULATIONS :

IC =

Pin(d.c) = VCC*ICQ =

V 02
Po(a.c) = =
8 RL

Po( ac)
% of efficiency = *100 =
P(dc )

IN PUT WAVE FORM:

OUT PUT WAVE FORM :

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RESULT: The efficiency of class A Power amplifier is verified.

VIVA QUESTIONS:
1. Explain class A operation?
2. What is phase shift of input and output signals in class A operation?
3. What is the efficiency of class A power amplifier?
4. Distinguish class A and class B operations
5. What is the formula for the input and output power in class A power amplifier?

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5. CLASS B COMPLEMENTARY SYMMETRY PUSH PULL

AMPLIFIER

AIM: To simulate and verify the efficiency of class B complementary symmetry

push pull amplifier.

CIRCUIT DIAGRAM:

THEORY:

Complementary means the circuit uses two identical transistors but one is
NPN and other is PNP. The symmetry means the biasing resistors connected in
both transistors are equal. As a result of this, emitter base junction of each
transistor is biased with the same voltage.

During the positive half cycle of ac input the base emitter voltage of both
transistors becomes positive. Under this condition only NPN transistor conducts,

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while PNP transistor is cutoff. During this process positive half cycle current
flows through load resistor R5.

During negative half cycle of ac input only PNP transistor conducts and
NPN transistor is cutoff and the negative half cycle current flows through R 5. We
get a complete amplified wave form of input signal. This amplifier circuit has a
unity gain because of the emitter follower configuration is used

PROCEDURE:

1. Select different components and place them in the grid.

2. Apply the input ac signal voltage of 0.8V (p-p) and simulate the circuit.
3. Observe the output wave form on CRO and measure the output voltage
Vo.
4. Now connect the ammeters at collector terminals of NPN and PNP
transistors.
5. Disconnect the ac signal from input and measure the collector currents
Ic1 and Ic2 in ammeters.
6. Calculate the efficiency by using practical calculations
7. Compare it with theoretically calculated efficiency

OBSERVATIONS :
THEORITICAL CALCULATIONS :

V CC
ICQ = RL
2

Pin(d.c) = VCC*ICQ

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V CCV CC
Pin(d.c) = =
2 RL

(Vmax Vmin)( Imax Imin)

Po(a.c) =
8

V CC
(Imax Imin) =
RL

( Vmax Vmin) = VCC

V CCV CC V CC 2
Po(a.c) = =
8 RL 8 RL

2
V CC
Po(a . c) 8 RL
% of efficiency = = *100 = ------------------- *100
Pin (d .c ) V CC2
2 RL

= *100 = 78.5%
4

PRACTICAL CALCULATIONS :

IC1 =

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IC2 =

I C 1+ I C 2
IC = =
2

IC
ICQ =
2

VCC =

Vo(p-p) =
V O (P P)2
Po(a.c) =
8 RL

Pin(d.c) = VCC*ICQ
Po(a.c)
% of efficiency = ----------- *100
Pin(d.c)

INPUT WAVE FORM:

OUT PUT WAVE FORM:

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RESULT: The efficiency of class B complementary symmetry push pull

amplifier is verified

VIVA QUESTIONS:
1. Explain complementary and symmetry concept?
2. What is the conduction angle in class B operation?
3. What is the efficiency of class B power amplifier?
4. what will be change in the above circuit if the two transistors are
interchanged?
5. what is the formula for output power in class B power amplifier?

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ELECTRONIC CIRCUITS LAB

(HARDWARE)

1 Two Stage RC Coupled Amplifiers.

2 Class A power amplifier
3 Class B complementary symmetry push pull amplifier
4. Series Voltage Regulator.
5. Shunt Voltage Regulator.
6. Class B power Amplifier.

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1. TWO STAGE RC COUPLED AMPLIFIER

AIM : To design and construct RC coupled amplifier and verify the voltage gain,
observe the frequency response and find the bandwidth.

APPARATUS:

1 Transistors(BC-107)-2
2 Resistors -2K -1, 68K - 2, 27K - 2, 2.2K -2, 1.8K - 2, 330 -2
3 Capacitors-1F -2,10F -1,100F -2
4 Regulated Power Supply (0-30V)
5 Cathode Ray Oscilloscope
6 Bread board

CIRCUIT DIAGRAM :

THEORY:

RC is the most widely used coupling as it provides excellent audio fidelity.

A coupling capacitor is used to connect output of first stage to the input of the
second stage. Resistances R1, R2, R5, R3, R4 and R10 form biasing and
stabilisation network. Emitter bypass capacitors C 5 and C6 offer low reactance
paths to the signals. The coupling capacitor C 3 transmits ac signal and blocks dc
signal. Cascaded stages amplifies signal and overall gain is improved. The total
gain is less than the product of gains of individual stages. Thus overall gain of

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two stages is A = A 1 x A2, where A1 =

Voltage gain of first stage and A2 = Voltage gain of second stage

When ac signal is applied to the base of the transistor Q 1, its amplified

output appears across the collector resistor R 9. It is given to the second stage for
further amplification and signal appears with more strength. Frequency response
curve is obtained by plotting a graph between frequency and gain in dB. The
gain is constant in midband frequency range and gain decreases in low and high
frequency ranges. The gain decreases in the low frequency range due to
coupling capacitor C3 and at high frequencies due to junction capacitance C be .

PROCEDURE:

1 Connections are made as per the circuit diagram.

2 Apply input by using function generator to the circuit.
3 Observe the output waveform on CRO.
4 Measure the voltage at
(i) Output of the first stage
(ii) Output of the second stage
5. From the readings, calculate voltage gain of first stage, second stage and
overall gain. Disconnect second stage and then measure output voltage of
first stage and calculate voltage gain.
6. Compare it with the voltage gain obtained when second stage was connected.
7. For plotting the frequency response, the input voltage is kept constant at 2mv
(p- p) and the frequency is varied from 100Hz to 1MHz.
8. Note down the value of output voltage for each frequency.
9. All the readings are tabulated and voltage gain in dB is calculated by using
the expression
Av =20 Log 10 (Vo/Vi)
10. A graph is drawn by taking frequency on X-axis and gain in dB on Y-axis on
a Semilog graph sheet.
11. The bandwidth of the amplifier is calculated from the graph using the
expression
Bandwidth = f2 f1.
Where f1 = Lower cutoff frequency of CE amplifier.
f2 = Upper cutoff frequency of CE amplifier

THEORITICAL CALCULATIONS :
DC Analysis :
Calculation of RC& RE :

Given Ic = 1mA, Vce= 5V , VE =2V for the operating point to be approximately

at the centre point with this data.

Ic 1 mA
IB = = = 0.025mA
40

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IE = IB + Ic = 0.025mA + 1mA = 1.025mA

VE 2V
Choose VE =2V then RE = = = 1.95 k
IE 1.025 mA

Then Vc =VCC (VE + Vce ) = 9 ( 2 + 5 ) = 2V

Vc 2v
RC = = = 2k
Ic 1 mA

It is recommended that RE must be less than RC is selected

RE = 1k and RC = 2k

Calculation of R3 & R4 :

The Thevinins equivalent voltage at base

R4
VB = VCC and is equal to sum of VBE & VE.
R 3+R 4

VBE + VE = 0.7 + 2 = 2.7V

R4 VB 2.7
= = = 0.3
R 3+ R 4 V CC 9

R3 = 2.33* R4

Choose the current flowing through R4 as I4

IC 1 mA
I4 = = = 100 A
10 10

V BE 2.7
R4 = = = 27k
I4 100

R4 = 2.33k, R3 = 27k

Select R3 = 2.2k , R4 = 27k

AC Analysis:

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The voltage gain of an amplifier can be taken as

RL
Av = -------- = 10
Re

20 mv 20 mv
Where Re = = = 25
IE 1.04 mV

R L'
Av = = 10 => RL = 250
Re

RL = RC//RL = 2.2k// RL => RL = 282

There is resistance offered between collector and emitter choose R L = 300 .

For ac analysis select
Ce = 100f ,Cc = 1 f, Rs =2k

PRACTICAL CALCULATIONS:

Vi1 =

Vo1 =

VO1
Av1 = =
V i1

V i2 = V O1

V O2 =

AV 2 =

AV = AV 1 * AV 2 =

VO2
AV = =
V i1

OBSERVATIONS:

Frequency(Hz) Output voltage(Vo) Voltage gain in dB

Av =20 log 10 (Vo/Vi)

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INPUT WAVE FORM :

OUT PUT WAVE FORM OF STAGE 1 :

OUT PUT WAVE FORM OF STAGE 2 :

FREQUENCY RESPONSE :

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BAND WITH: f2 - f1 = Hz

RESULT: The RC coupled amplifier voltage gain is verified, the frequency

response is observed and the bandwidth is noted.

VIVA QUESTIONS:

1. What is the necessity of cascading?

2. Define 3-dB bandwidth.
3. Why RC-coupling is preferred in audio range.
4. Explain various types of capacitors.
5. What is loading effect?
6. What is meant by RC coupling?

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2. CLASS A POWER AMPLIFIER

AIM: To simulate and verify the efficiency of class A power amplifier.

CIRCUIT DIAGRAM:

THEORY:

The function of power amplifier is to raise the power level of input signal.
Class A power amplifier is one in which the output current flows during the entire
cycle of input signal. Thus the operating point is selected in such away that the
transistor operates only over the linear region of its load line. So this amplifier

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can amplify input signal of small amplitude. As the transistor operates over the
linear portion of load line the output wave form is exactly similar to the input
wave form. Hence this amplifier is used where freedom from distortion is the
prime aim.

PROCEDURE:
1. Select different components and place them in the grid.
2. Apply the input ac signal voltage of 160mV (p-p) and simulate the circuit.
3. Observe the output wave form on CRO and measure the output voltage
V0.
4. Now connect the ammeter at collector terminal of transistor.
5. Disconnect the ac signal from input and measure the collector current Ic
in ammeter.
6. calculate the efficiency by using practical calculations compare it with
theoretically calculated efficiency

OBSERVATION :
THEORITICAL CALCULATIONS :

V CC
ICQ = RL
2

IC
ICQ =
2

2
V CCV CC V CC
Pin(dc) = = =
2 RL 2 RL

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(V max V min )(I max I min )

Po(a.c) =
8

V CC
(Imax Imin) =
RL

(Vmax Vmin) = VCC

V CCV CC V CC 2
Po(a.c) = =
8 RL 8 RL

V CC2
Po(a . c) 8 RL
% of efficiency = *100 = *100 = 25%
Pin (d .c ) V CC2
2 RL

PRACTICAL CALCULATIONS :
IC =

Pin(d.c) = VCC*ICQ =

V O2
Po(a.c) = =
8 RL

Po(a.c)
% of efficiency = ------------- *100 =
Pin(d.c)
IN PUT WAVE FORM:

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OUT PUT WAVE FORM :

RESULT: The efficiency of class A Power amplifier is verified.

VIVA QUESTIONS:
1. Explain class A operation?
2. What is phase shift of input and output signals in class A operation?
3. What is the efficiency of class A power amplifier?
4. Distinguish class A and class B operations
5. What is the formula for the input and output power in class A power amplifier?

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3. CLASS B COMPLEMENTARY SYMMETRY PUSH PULL

AMPLIFIER

AIM: To simulate and verify the efficiency of class B complementary symmetry

push pull amplifier.

CIRCUIT DIAGRAM:

THEORY:

Complementary means the circuit uses two identical transistors but one is
NPN and other is PNP. The symmetry means the biasing resistors connected in
both transistors are equal. As a result of this, emitter base junction of each
transistor is biased with the same voltage.

During the positive half cycle of ac input the base emitter voltage of both
transistors becomes positive. Under this condition only NPN transistor conducts,

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while PNP transistor is cutoff. During this process positive half cycle current
flows through load resistor R5.

During negative half cycle of ac input only PNP transistor conducts and
NPN transistor is cutoff and the negative half cycle current flows through R 5. We
get a complete amplified wave form of input signal. This amplifier circuit has a
unity gain because of the emitter follower configuration is used

PROCEDURE:

1. Select different components and place them in the grid.

2. Apply the input ac signal voltage of 0.8V (p-p) and simulate the circuit.
3. Observe the output wave form on CRO and measure the output voltage
Vo.
4. Now connect the ammeters at collector terminals of NPN and PNP
transistors.
5. Disconnect the ac signal from input and measure the collector currents
Ic1 and Ic2 in ammeters.
6. Calculate the efficiency by using practical calculations
7. Compare it with theoretically calculated efficiency

OBSERVATIONS :
THEORITICAL CALCULATIONS :

V CC
ICQ = R L
2
Pin(d.c) = VCC*ICQ

V
V CCV CC ( CC )2
Pin(d.c) = =
2 R L 2 R L

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(V max V min)( I max I min)

Po(a.c) =
8

V CC
(Imax Imin) =
RL

( Vmax Vmin) = VCC

V CCV CC V CC 2
Po(a.c) = =
8 RL 8 RL

2
d .c V CC
Pin 8 RL
% of efficiency = - *100 = 2 *100
Po( a . c) V CC
2 R L

= *100 = 78.5%
4

PRACTICAL CALCULATIONS :

IC1 =
IC2 =

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IC1+IC2
IC = -------------- =
2
IC
IC
ICQ = =
2

VCC =
Vo(p-p) =
V O (P P)2
Po(a.c) =
8 RL

Pin(d.c) = VCC*ICQ
Po( a . c)
% of efficiency = *100
Pin(dc)

INPUT WAVE FORM:

OUT PUT WAVE FORM:

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RESULT: The efficiency of class B complementary symmetry push pull

amplifier is verified

VIVA QUESTIONS:
1. Explain complementary and symmetry concept?
2. What is the conduction angle in class B operation?
3. What is the efficiency of class B power amplifier?
4. what will be change in the above circuit if the two transistors are
interchanged?
5. what is the formula for output power in class B power amplifier?

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4. SERIES VOLTAGE REGULATOR

AIM: To design, construct and plot the load regulator characteristics of series
voltage regulator

APPARATUS:

1 Transistors SL 100 -2
2 Zener diode 6.2V
3 Resistors 270, 1K, 2.2K, 6.8K, 8.2K
4 Decade Resistance Box
5 Ammeter (0-100mA)
6 Multimeter
7 Regulated Power Supply
8 Bread board

CIRCUIT DIAGRAM:

(1) LINE REGULATION:

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(2) LOAD REGULATION:

THEORY:
Voltage regulator converts a dc input voltage in to a chosen dc
voltage which is stable under conditions of load current and input variation. A
series regulator using an additional transistor as an error amplifier, it improves
the line and load regulation of the circuit. Resistor R 2 and zener diode are the
reference source. Transistor Q 2 and its associated circuit components
constitute the error amplifier, that controls the series pass transistor. When the
circuit output changes, the change is amplified by transistor Q 2 and fed back to
the base of Q1 to correct the output voltage level. Now suppose Vo decreases ,
VBE2 decreases .Because emitter voltage of Q 2 is held at Vz, any decrease in
VBE2 appears across the base emitter of Q 2.A reduction ib VBE2 causes IC2 to be
reduced,VR1 is reduced and VB1 is increased causing the output voltage
increase.

DESIGN:

Select Vz =0.75*Vo = 0.75* 8V = 9V

For D1, use a IN ( ) Zener diode with Vz= 6.2V

For minimum D1 current,

Select IR2 = 10mA

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VoV z 12 V 6.2 V
R2 = = = 290 ( use 270 standard value
I R2 10mA

IE1(max) = IL(max) + IR2= 40mA + 10mA = 50mA

Specification for Q1,

VCE1(max) = VS = 20V

IC1(max) = IE(max) =50mA

PD(max) =( VS Vo)* IE1(max) = (20V 8V)*50mA = 600mW

Assuming hFE1(min) = 50,

I E 1 (max) 50 mA
IB1(max) = = = 1mA
h fe (min) 50

IC2 > IB1(max)

Select IC2 =5mA

V SV B 1 20 V (8 V +0.7 V )
R1 = = = 1.89 k (use 1.8 k standard
I C 2I B 1 5 mA +1 mA
value)

IZ = IE2(max) + IR2 = 5mA +10mA = 15mA

I4 > > IB1(max)

I4 = 1mA

V Z V BE 2 6.2 V +0.7 V
R4 = = =6.9 K= (use 6.8k standard value)
I4 1 mA

V oV R 4 8V + 0.7 V 85.8
R3 = = = = 2.2K
I4 1m 1 mA

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PROCEDURE:

Line Regulation:

1 Connections are made as per the circuit diagram.

2 Using the regulated power supply vary the input voltage and note down
the corresponding output voltage.

Load Regulation:

1 Connections are made as per the circuit diagram.

2 Keep the input voltage constant at which the line regulation is obtained
and DRB is kept at 10K.
3 By go on decreasing the load resistance, note down the load current and
load voltages.
4 Calculate the % load regulation using the following formula
% Load regulation = (VNL VFL) / VFL 100
Where VNL = Input voltage at which the line regulation is obtained
5 Plot the graph of load resistance versus % Load regulation

OBSERVATIONS :

LINE REGULATION :

S.NO INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)

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LOAD REGULATION :

S.NO LOAD LOAD LOAD % LOAD

RESISTANCE CURRENT VOLTAGE REGULATION

PRECAUTIONS:

1 Transistor terminals must be identified properly

RESULT: A 9V series voltage regulator is designed, constructed and load

regulation characteristics is verified.

VIVA Questions:

1 What is Regulation?
2 What are the characteristics of voltage regulator?
3 What is Stabilization factor?
4 Why it is called as series regulator?
5 Why series regulator is also called as negative feedback regulator?
6 What is the purpose of current limiting circuit?
7 What is the disadvantage of current limiting circuit? How we can avoid
that.
8 What is ripple rejection and output voltage in 7805 voltage regulator?
9 Using the 7812 voltage regulator, design a current source that will deliver
a 0.5A current to a 25, 10W load.

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5. SHUNT VOLTAGE REGULATOR

AIM: To design, construct and plot the load regulator characteristics of shunt
voltage regulator

APPARATUS:

1 Transistors SL 100 -2
2 Zener diode 6.2V
3 Resistors 100, 220, 1K
4 Decade Resistance Box
5 Ammeter (0-100mA)
6 Multimeter
7 Regulated Power Supply
8 Bread board

CIRCUIT DIAGRAM:

1 LINE REGULATION:

(2) LOAD REGULATION:

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THEORY:
If control element is connected in shunt with the load the regulator
circuit is called shunt voltage regulator. The unregulated input voltage Vin tries to
provide the load current, but part of the current is taken by the control element,
to maintain a constant voltage across the load. If there is any change in load
voltage the sampling circuit provides a feedback signal to the comparator circuit.
The comparator circuit compares the feedback signal with the reference voltage
and generates a control signal which decides the amount of current required to
be shunted to keep the load voltage constant. Now suppose if load voltage
increases than comparator circuit decides the control signal based on the
feedback information which draws increased shunt current I SH value Due to this
load current decreases and hence the load voltage decreases to its normal
value. Thus control element maintains the constant output voltage by shunting
the current, hence the regulator circuit is called a shunt voltage regulator.

PROCEDURE:

Line Regulation:

1 Connections are made as per the circuit diagram.

2 Using the regulated power supply vary the input voltage and note down
the corresponding output voltage.

Load Regulation:

1 Connections are made as per the circuit diagram.

2 Keep the input voltage constant at which the line regulation is obtained
and DRB is kept at 10K.
3 By go on decreasing the load resistance, note down the load current and
load voltages.
4 Calculate the % load regulation using the following formula
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% Load regulation = (VNL VFL) / VFL 100

Where VNL = Input voltage at which the line regulation is obtained
5 Plot the graph of load resistance versus % Load regulation

OBSERVATIONS:

LINE REGULATION :

S.NO INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)

LOAD REGULATION :

S.NO LOAD LOAD LOAD % LOAD

RESISTANCE CURRENT VOLTAGE REGULATION

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PRECAUTIONS:

1 Transistor terminals must be identified properly

RESULT: A 9V shunt voltage regulator is constructed and load regulation

characteristics are verified.

VIVA Questions:

1 What is Regulation?
2 What are the characteristics of voltage regulator?
3 What is Stabilization factor?
4 Why it is called as shunt regulator?
5 Why series regulator is also called as negative feedback regulator?
6 What is the purpose of Fold back circuit/
7 What is the disadvantage of current limiting circuit? How we can avoid
that.
8 What is ripple rejection and output voltage in 7805 voltage regulator?

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9 Using the 7812 voltage regulator, design a current source that will deliver
a 0.5A current to a 25,10W load.

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