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832 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO.

2, FEBRUARY 2016

High Step-Up DCAC Inverter Suitable for


AC Module Applications
Sayed Abbas Arshadi, Behzad Poorali, Ehsan Adib , and Hosein Farzanehfard

AbstractIn this paper, a novel grid-connected high has made the price of grid-connected inverters in ac module
step-up inverter is proposed. The topology is composed of more visible [2]. Due to the growing popularity of ac modules
two stages. The rst stage is a single-switch high step-up and the aforementioned design challenges, major research has
dcdc converter with bipolar outputs, and the second stage
is a conventional half-bridge dcac grid-connected inverter. been carried out to design more effective and more reliable
Negative grounding of the photovoltaic (PV) module has re- microinverters. In [1][6], many dcdc and dcac converters
sulted in elimination of unwanted ground leakage currents for ac modules are reviewed.
in the PV system. Simple structure, employing few semi- Since the generated voltage by PV modules is relatively low,
conductor switches, simple control, and high efciency are a high step-up boost conversion is required to reach the high bus
the features of the proposed topology. Theoretical analysis
and principal operation of the circuit are discussed. An voltage requirements for the full-bridge, half-bridge, or multi-
experimental prototype is implemented to verify the perfor- level grid-connected inverters. Therefore, the main challenge
mance of the proposed inverter. The experimental results within ac modules is designing high step-up dcac converters.
conrm the aforementioned features and the theoretical Another important issue in designing ac modules is the
analysis of the converter operation. difficulty with the ground leakage current in PV systems. Wide
Index TermsAC module, coupled inductor, ground surface of PV modules results in producing a large parasitic
leakage current, high step-up converter, photovoltaic (PV) capacitor between ground and PV module. Due to low effi-
inverter. ciency and high cost of transformers, employing nonisolated
I. I NTRODUCTION power converters is desirable. However, this results in forming
of a common-mode voltage across the aforementioned parasitic
R ENEWABLE energy sources are the best alternative for
fossil fuels. Free, clean, and abundant energy are the de-
sired characteristics of renewable energy sources. Photovoltaic
capacitor, and hence, some unwanted currents may flow in the
system. In [7], a comprehensive analysis on leakage currents
(PV) systems benefit from the leading technology among re- in single-phase transformerless PV grid-connected inverters is
newable energy technologies and have been considerably stud- presented, and some solutions for reducing these unwanted cur-
ied and developed in recent years [1], [2]. rents are reviewed. By employing multilevel inverters or other
The newest breakthrough in PV technology is ac module. AC similar topologies, the common-mode voltage across parasitic
module is an innovative preassembled module consisting of a capacitors in PV systems is reduced, and hence, lower leakage
microinverter and one or two PV modules [3]. An ac module currents would flow in the system [7]. In [8][12], some solu-
system maximizes energy production by individual maximum tions for reducing ground leakage currents in PV systems are
power point tracking (MPPT) for each PV module. The perfor- presented. Some other works are performed to eliminate leak-
mance issues within traditional PV system technologies caused age currents. Removing ground leakage currents in nonisolated
by clouds, partial shade from trees, or roof obstructions and PV systems can be achieved by negative grounding of PV mod-
module mismatches are resolved in ac module technology. ules [3]. Simultaneous grounding of the PV module and grid
Although higher cost for ac modules is expected, but due to can be provided by applying a dcdc converter with bipolar out-
the modularity, there is opportunity for massive production and puts as the first stage followed by a half-bridge dcac inverter
hence reduction in overall system price. AC module yields more as the second stage. Using a half-bridge inverter instead of a
energy and lower design and installation cost [4]. full-bridge inverter requires a dc link with twice the voltage. As
The main design challenge in ac modules is to produce a result, the first stage needs to have the capability to produce
a more reliable, efficient, and cost-effective grid-connected two high voltages in its outputs. For instance, for a grid with
inverter. The decrease in PV module price over the recent years 220 RMS voltage, each dc-link capacitor of the half-bridge inver-
ter must have a voltage higher than 310 Vdc, which is the grid
peak voltage. In this case, since the PV module voltage (in the ac
Manuscript received August 26, 2014; revised February 8, 2015,
April 16, 2015, and June 21, 2015; accepted August 23, 2015. Date module system) is typically around 50 V, hence, a voltage gain
of publication September 22, 2015; date of current version January 8, higher than 7 is expected for each output in the dcdc stage.
2016. The aforementioned strategy for eliminating ground leakage
The authors are with the Department of Electrical and Computer
Engineering, Isfahan University of Technology, Isfahan 84156-83111, current is employed in the topologies presented in [13][16].
Iran (e-mail: a.arshadi@ec.iut.ac.ir; b.poorali@ec.iut.ac.ir; e.adib@cc. Topology introduced in [13] is a combination of boost and
iut.ac.ir; hosein@cc.iut.ac.ir). buck-boost converters. The main problem with this topology
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. is the low voltage gain of buck-boost converters, which makes
Digital Object Identifier 10.1109/TIE.2015.2480387 them unsuitable for ac module application. In [14], by using
0278-0046 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
ARSHADI et al.: HIGH STEP-UP DCAC INVERTER SUITABLE FOR AC MODULE APPLICATIONS 833

plify the low dc voltage of the PV module to an adequate


dc level for the grid-connected inverter;
3) recycling the leakage inductance energy and absorbing the
voltage ringing on the boost switch by using a passive
regenerative clamp circuit;
4) zero-current switching (ZCS) at turn on of the switch Sb
and ZCS at turn off of all diodes, which reduces switching
losses.
Another concern in PV inverters is the lifetime of electrolytic
capacitors used for power decoupling, which limits the system
lifespan [3]. In two-stage dcac topologies with dc link, power
decoupling capacitors are not located across the PV module.
Fig. 1. System configuration of the proposed high step-up dcac This provides the possibility to place power decoupling ca-
inverter.
pacitors at higher dc-link voltage with higher possible voltage
ripple, which results in smaller decoupling capacitors [1]. In
coupled inductors, the voltage gain of the dcdc stage, which the proposed topology, due to the two-stage structure, smaller
is again a combination of boost and buck-boost converters, is capacitors can be used for power decoupling. Moreover, since
improved, and bipolar outputs of the dcdc stage are formed. there is no decoupling capacitor located across the PV module,
In the topology in [15], bipolar outputs of the first stage are then a more efficient MPPT is expected.
generated by one magnetic component. Low voltage gain and The proposed inverter topology and principal operation of
high number of MOSFET switches are the main disadvantages both stages, along with its control block and design considera-
of this topology. In [16], bipolar outputs of the first stage are tions, are explained. A 150-W prototype of the proposed conver-
also formed by one magnetic component, but the voltage gains ter is implemented, and the experimental results are presented.
of both outputs are equal to the boost converter gain, which is
higher than the voltage gain of the previous topology. Using
high number of MOSFET switches results in high switching II. C IRCUIT C ONFIGURATION AND A NALYSIS
losses and complexity of control circuit. The proposed dcac converter, which is depicted in Fig. 1,
In this paper, a novel dcac grid-connected inverter with high consists of two stages. The first stage is a high step-up boost
boost ratio to eliminate ground leakage current is presented. converter with coupled inductors, and the second stage is
The proposed inverter consists of two stages in which the first a conventional half-bridge inverter. As shown, simultaneous
stage is a high step-up dcdc converter with bipolar outputs grounding of the PV module and grid is provided by means
and the second stage is a conventional half-bridge inverter. of employing a dcdc converter with bipolar outputs that are
Simultaneous grounding of the PV module and grid in this dc-link capacitors for the half-bridge inverter.
topology is provided by the same strategy applied in [13][16]. The first stage contains magnetic and electronic elements.
Higher voltage gain, using fewer MOSFET switches, and soft Switch Sb is the main switch and is triggered by an MPPT
switching are the main advantages of the proposed topology. algorithm. LP , Lsec , and Ltr represent the primary, secondary,
To achieve high step-up dcdc conversion, many circuit and tertiary windings of the coupled inductor Tr . Diodes D1
topologies are presented. The idea of boost converter with and D2 and capacitor C1 form the passive regenerative clamp
coupled inductor is explored in some papers such as [17][20]. circuit. C2 , a high-voltage capacitor, is located in series with
High step-up converters with switched capacitors are also in- the secondary side of Tr . DO , D3 , D4 , CO1 , CO2 , and CO3 are
vestigated in the literature [21][23]. In some topologies, both output diodes and filter capacitors.
coupled inductors and switched capacitors are combined to The primary and secondary sides of Tr , along with capacitor
achieve even higher gain [24], [25]. In this paper, a boost C2 and clamp circuit, form a high step-up boost converter, and
converter with a coupled inductor, a switch capacitor cell, the tertiary side of Tr , along with diodes D3 and D4 , form the
and a regenerative clamp circuit is combined with a forward- combination of a discontinuous conduction mode forward and
flyback converter with output voltage doubler to achieve a high a flyback converter.
step-up high-efficiency dcdc converter with bipolar outputs The detailed operational modes of the dcdc stage are de-
that can be followed by a conventional half-bridge inverter to scribed in Section II-A, and theoretical analysis and equations
eliminate the ground leakage current in ac module application. are presented in Section II-B. The key theoretical waveforms of
The proposed topology is shown in Fig. 1 and has the following the dcdc stage are depicted in Fig. 2, and the equivalent circuit
advantages: of each operating mode is presented in Fig. 3.
1) generating bipolar outputs with only one low-voltage-
rated MOSFET switch, which results in lower switching
A. Operational Modes
losses and easier control and MPPT;
2) extended voltage gain by using coupled inductors and To simplify the converter analysis, all semiconductor ele-
switched capacitors, which makes it suitable for ac module ments are considered ideal. The coupled inductor is modeled
application in which a high boost ratio is required to am- by an ideal transformer, a leakage inductance Llk , and a
834 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 2, FEBRUARY 2016

with capacitors C1 and C2 , forms a resonance circuit, and the


current that charges capacitor C2 flows through D2 . If half of
the resonance period is less than the switch on time ton , diode
D2 would turn on and off under the ZCS condition.
2) Mode 2 (t1 t2 ) [see Fig. 3(b)]: When switch Sb is
turned off, the leakage current charges the parasitic capacitor
of the switch, and then diode D1 turns on and the leakage
and secondary currents start to charge the clamp capacitor C1 .
Meanwhile, the leakage current is decreasing until it becomes
equal to the magnetizing current value, and then the current
through primary and tertiary sides becomes zero.
3) Mode 3 (t2 t3 ) [see Fig. 3(c)]: When the leakage
current reduces to below the magnetizing current, the currents
through transformer sides increase in reverse direction. At this
moment, the reverse voltage across diodes D4 and DO reduces
to zero.
4) Mode 4 (t3 t4 ) [see Fig. 3(d)]: After diode DO
turns on, the series voltages of input source, C2 , Llk , Lm ,
and Lsec supply the output capacitor CO1 . Through D4 , the
output capacitor CO3 is charged by the current through the
tertiary side of the transformer. Meanwhile, the leakage current
is still charging the clamp capacitor C1 . In this stage, once the
clamp capacitor is charged, diode D1 is reversed biased and the
leakage current is equal to the secondary current.
5) Mode 5 (t4 t5 ) [see Fig. 3(e)]: At this time, switch
Sb is turned on. Since, at this moment, the leakage current
and the secondary current are equal and also the rising rate of
the leakage current is limited due to the leakage inductance,
Sb turn-on is under ZCS. When Sb is turned on, the input
voltage charges the leakage inductor until it reaches the magne-
tizing current and then becomes greater. Meanwhile, the current
through the primary side of the transformer reduces to zero and
then increases in reverse direction. This change in the current
through the transformer causes DO and D4 to turn off and then
D3 and D2 to turn on.

B. Formula Derivation

Fig. 2. Key theoretical waveforms of the dcdc stage. The voltage VCo1 and the sum of the voltages VCo2 and VCo3
form the bipolar outputs of the first stage. For easier analysis,
magnetizing inductance Lm . The turns ratios and coupling VCo1 is defined as output-1 and named as VO1 and the sum of
coefficient are defined as VCo2 and VCo3 , is defined as output-2 and named as VO2 . In
this part, for deriving the output voltage values, the coupling
N2
n1 = (1) coefficient k is assumed unity.
N1 The magnetizing inductor of the transformer, along with
N3
n2 = (2) switch Sb , diode D1 , and clamp capacitor C1 , form a conven-
N1 tional boost converter, and hence, like any boost converter, the
Lm clamp capacitor voltage can be calculated as
k= (3)
(Llk + Lm )
Vin
where N1 , N2 , and N3 are the winding turns of the primary, VC1 = (4)
1D
secondary, and tertiary sides of the coupled inductor.
1) Mode 1 (t0 t1 ) [see Fig. 3(a)]: In this mode, switch where D is the duty cycle of switch Sb . Meanwhile, the voltage
Sb is turned on. The magnetizing inductor is charged by across the secondary side of the transformer is n1 Vin , and
the input, and its current is increasing linearly. Diode D3 is the series voltages of the secondary side and VC1 charge the
conducting, and the tertiary current iD3 is increasing due to capacitor C2 . Therefore, the mean voltage across C2 can be
the voltage difference between VCO2 and the tertiary side, calculated as~
which is across the leakage inductor in the tertiary side. At Vin
VC2 = n1 Vin + . (5)
the same time, the secondary side of the transformer, along 1D
ARSHADI et al.: HIGH STEP-UP DCAC INVERTER SUITABLE FOR AC MODULE APPLICATIONS 835

Fig. 3. Equivalent circuit of each operating mode of the dcdc stage. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5.

When switch Sb is off and the primary and secondary sides Voltage stresses of diode D1 and switch Sb are equal to the
with capacitor C2 are charging the output capacitor CO1 , the capacitor C1 voltage as (4). In addition, voltage stresses of
following Kirchhoffs voltage law can be established: diodes D3 and D4 are equal to the output-2 voltage as (11).
Voltage stresses of diodes D2 and DO are calculated as (12),
VCo1 = Vin Vp + VC2 Vsec (6) and finally, voltage stresses of switches S1 and S2 are equal to
the sum of output-1 and ouput-2 voltages
where Vp and Vsec are the voltages of the primary and secondary
sides, respectively, and are specified as 1 + n1
VDO = VD2 = VO1 VC1 = Vin . (12)
1D
Vsec
VP = = Vin VC1 . (7)
n1
III. C ONTROL B LOCK
Using (4)(7), the output-1 voltage is derived as
In the previous section, the operational modes of the first
2 + n1 stage and voltage relations of each output are discussed. As
VO1 = VCO1 = Vin . (8)
1D aforementioned, the output voltages of the first stage are
dc-link voltages for the grid-connected half-bridge inverter in
CO2 is located at the output of the tertiary side of the trans- the second stage. In order to have the same output voltages, (8)
former and is charged through diode D3 when switch Sb is and (11) are equalized and the following relation is obtained:
on. When the switch is on, the voltage difference between the
tertiary side and VCo2 is across the leakage inductor in the n2 = 2 + n1 . (13)
tertiary side and forms a current that charges CO2 up to the ter-
This means that, by choosing the turns ratios of the trans-
tiary voltage. Then, the CO2 voltage is
former Tr as (13), the same output voltages for the first stage are
VCO2 = n2 Vin . (9) expected. However, in reality, due to coupling coefficient lower
than one, gain ratios become more complicated and equalizing
The tertiary side and diode D4 perform like a flyback con- the output voltages is a bit more difficult. Therefore, a peak
verter, and when switch Sb is off, capacitor CO3 is charged. current mode control scheme is adopted for the second stage
Therefore, the voltage across CO3 can be expressed as in order to inject a high-quality sinusoidal ac current in phase
with grid voltage. By adopting this control scheme, in case of
D
VCO3 = n2 Vin . (10) voltage difference between the dc-link capacitors of the half-
1D bridge inverter, dc current is not generated.
As aforementioned, the sum of voltages VCO2 and VCO3 is The first stage is controlled by MPPT algorithms to extract
the output-2 voltage of the first stage. Then, VO2 is derived as the maximum possible power generated by the PV module.
Since there is just one switch in the first stage Sb , implementing
Vin MPPT algorithms in this topology is much easier than circuits
VO2 = VCO2 + VCO3 = n2 . (11)
1D introduced in [13][16].
836 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 2, FEBRUARY 2016

TABLE I
I NVERTED PARAMETERS

Fig. 4. Implemented control scheme.

Fig. 5. Picture of the implemented 150-W prototype of the proposed


high step-up dcac inverter.

The implemented control scheme for this inverter is shown in


Fig. 4. The minimum voltage of the bipolar outputs is controlled
above a constant voltage, which would be higher than the grid
peak voltage to inject maximum possible power into the grid. It Fig. 6. Output ac current from the dcac inverter (CH3) versus the
is achieved by selecting the minimum voltage of VO1 and VO2 reference current (CH2) produced by control block (1 A/div, 5 ms/div).
by a multiplexer and controlling that voltage and generating a
reference current in phase with grid utility voltage. Symbols VO and the output power for designing this prototype are consid-
and iLF in Fig. 4 are the voltage reference for bipolar outputs ered as 50 V and 150 W. The grid utility voltage is 220 Vac,
of the first stage and the output current reference for the second and hence, the output voltages of the first stage must be higher
stage, respectively. than 310 Vdc, which is the grid peak voltage.
When starting the system, the voltage difference between The power differences between the dc side of the inverter and
capacitor CO2 and the tertiary voltage, which is a relatively high the ac side are decoupled by output capacitors of the first stage.
voltage at the moment, is applied across the leakage inductor in The value of the decoupling capacitors(CO1CO3 )is obtained as
the tertiary side and forms a high current that can harm switch PPV
Sb . Therefore, a soft start must be considered for the first stage. C= (14)
2 grid VC VC
where PPV is the PV module nominal power, grid is the grid
IV. E XPERIMENTAL R ESULTS angular frequency, VC is the mean voltage across the capacitor,
In order to verify the effectiveness of the proposed inverter and C is the amplitude of voltage ripple [1]. The value
and justify its operation, a 150-W prototype is implemented in of CO1 and the series connection value of CO2 and CO3 are
the laboratory. The implemented prototype is shown in Fig. 5. calculated using (14).
In this section, the design procedure and experimental results of For choosing proper diodes and switches for the circuit,
this prototype are presented. their current and voltage stresses must be considered. The
The controllers of the dcdc and dcac stages of the proposed voltage stresses of the semiconductor devices are discussed in
inverter are implemented in an AVR microcontroller. Section II-B. Peak current and average current of switch Sb are
Most common PV modules used in PV applications are calculated as
crystalline silicon PV modules that can provide a maximum ILm 2IO
power point (MPP) voltage from 25 to 55 V and provides power ISb (max) = ILm + + n2 (15)
2 D
in the range of 100300 W [3]. On this basis, the input voltage ISb (ave) = DILm + (n1 + n2 + 1)IO (16)
ARSHADI et al.: HIGH STEP-UP DCAC INVERTER SUITABLE FOR AC MODULE APPLICATIONS 837

Fig. 7. Experimental results of the ground leakage current of the pro-


posed dcac grid-connected converter. (CH1) Grid voltage (500 V/div).
(CH2) Leakage current (2 mA/div). (CH3) Voltage of the negative
terminal of the PV module to the ground (0.5 V/div).
Fig. 8. Experimental waveforms of the proposed dcac converter.
(a) Voltage of output-1. (b) Voltage of output-2. (c) Voltage of the clamped
where IO is the average output current of the dcdc stage, and capacitor C1 . (d) Voltage of the series capacitor C2 (50 V/div, 10 ms/div).
ILm is the current change value of the magnetizing inductor.
ILm in (15) and (16) is calculated as
(n1 + n2 + 1)IO
ILm = . (17)
1D
By choosing n1 = 1, in order to have the same output
voltages in the first stage, according to (13), n2 must be 3.
Considering (4) and (8) and n1 = 1, the voltage of switch Sb
is clamped at one-third of the first output voltage stage.
Input current variations can be limited by choosing larger
magnetizing inductor for the transformer Tr . However, a large
magnetizing inductor increases the volume of the transformer
and moreover results in lower coupling coefficient that can
lower the voltage gain. Lm is designed so that the converter Fig. 9. Experimental results for the efficiency of the dcdc stage of the
proposed topology under different output power values.
performs in CCM mode. For this purpose, Lm is calculated as
DVin
Lm = . (18) with the grid voltage. Measured total harmonic distortion of the
fS ILm
output current is below 3.5%.
Switched capacitors (C1 and C2 ) are designed in such a way To prove the elimination of the leakage current in the pro-
that half of the resonance period of the series combination of posed topology, a capacitor is placed between the PV module
C1 , C2 , and Lsec is less than ton = DT. In this case, diode D2 and the ground to simulate the parasitic effect of the PV module,
would be fully soft switched. Considering C1 = C2 = C, for and then its current is sensed. In Fig. 7, the ground leakage
designing these two capacitors, the following equations must current versus the grid voltage and the parasitic capacitor volt-
be considered: age is shown. As shown, the measured leakage current is below
IO 1 mA, and the parasitic capacitor voltage is nearly zero and
C= (19) contains nearly no high-frequency components. These results
 fS V comply with any standard for PV systems.
C
LLk DT (20) Fig. 8(a) and (b) shows the voltages of the first stage bipolar
2 outputs of the proposed dcac inverter. As aforementioned in
where V in (19) is the considered voltage ripple across the previous section, the output voltages of the first stage must
the capacitors, and (20) is for ensuring the fully soft-switch be higher than the grid peak voltage (310 V). The input voltage
condition for diode D2 . (50 V) is amplified with a voltage gain higher than 7 for each
Another consideration in designing the system is that the output in the first stage. Output capacitors voltages contain
clamp diode D1 must be a fast diode with voltage stress equal a 50-Hz voltage ripple, which is due to their performance as
to the voltage stress of switch Sb . Thus, fast diodes with low energy buffer. The value of this voltage ripple is calculated
conduction voltage like Schottky diodes can be a better choice. using (14). The voltage gains for the output voltages of the first
In Table I, parameters of the implemented prototype are shown. stage are as expressed in (8) and (11).
In Fig. 6, the injected current into the grid versus the refer- In Fig. 8(c) and (d), the voltages of capacitors C1 and C2
ence current is shown. The injected current is totally in phase are shown, respectively. According to (4) and (5), since n1 is
838 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 63, NO. 2, FEBRUARY 2016

Fig. 10. Experimental voltage and current waveforms of the dcdc Fig. 11. Experimental voltage and current waveforms of the dcdc
stage of the proposed inverter at full load. (a) Leakage current iLk stage of the proposed inverter at 50% of nominal power. (a) Leakage
(1 A/div). (b) Switch Sb (50 V/div, 2 A/div). (c) Diode D2 (100 V/div, current iLk (0.5 A/div). (b) Switch Sb (50 V/div, 1 A/div). (c) Diode D2
0.5 A/div). (d) Diode DO (100 V/div, 1 A/div). (e) Diode D3 (100 V/div, (100 V/div, 0.1 A/div). (d) Diode DO (100 V/div, 0.5 A/div). (e) Diode D3
0.5 A/div). (f) Diode D4 (100 V/div, 0.5 A/div). (g) Diode D1 (50 V/div, (100 V/div, 0.2 A/div). (f) Diode D4 (100 V/div, 0.2 A/div). (g) Diode D1
2 A/div) (5 s/div). (50 V/div, 1 A/div) (5 s/div).

considered as n1 = 1, hence, the voltage of capacitor C2 is In Figs. 10 and 11, the dcdc stage experimental waveforms
expected to be 50 V higher than the voltage of capacitor C1 . at nominal power (150 W) and 50% of the nominal power are
This voltage difference can be observed in experimental results. presented respectively. At these two specific operating points,
In addition, according to the voltage relations and the design each output voltage is set at 350 V. ZCS turn on of switch Sb
parameters, the voltage of capacitor C1 is three times lower than and ZCS turn off of all diodes is observable.
the output voltages of the first stage as expected. The voltages
in Fig. 8(c) and (d) also contain a low 50-Hz voltage ripple,
V. C ONCLUSION
which is due to the output power fluctuations of capacitor CO1 .
In order to verify the performance of the dcdc stage In this paper, a new high step-up dcac inverter suitable
converter and the analysis in Section II-A, the dcdc stage for ac module application has been presented. Due to nega-
is separately tested at different power points. In Fig. 9, the tive grounding of the PV module, the problem of the ground
experimental results for the efficiency of the dcdc stage of leakage current in PV systems is solved. Simple structure and
the proposed inverter are shown. As shown, the measured easy control due to employing low number of semiconductor
efficiency at full load is 94.6% and the maximum efficiency switches are the main features of the proposed inverter. High
is 96.2%. step-up dcdc in the proposed inverter provides the possibility
ARSHADI et al.: HIGH STEP-UP DCAC INVERTER SUITABLE FOR AC MODULE APPLICATIONS 839

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Jun. 2013.
[7] H. Xiao and S. Xie, Leakage current analytical model and application in Behzad Poorali was born in Mashhad, Iran, in
single-phase transformerless photovoltaic grid-connected inverter, IEEE 1991. He received the B.S. and M.S. degrees
Trans. Electromagn. Compat., vol. 52, no. 4, pp. 902913, Nov. 2010. in electrical engineering from Isfahan University
[8] S. Daher, J. Schmid, and F. L. M. Antunes, Multilevel inverter topologies of Technology (IUT), Isfahan, Iran, in 2013 and
for stand-alone PV systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, 2015, respectively.
pp. 27032712, Jul. 2008. He is currently with the Department of Elec
[9] L. Ma et al., The high efficiency transformer-less PV inverter topologies trical and Computer Engineering, IUT. His-
derived from NPC topology, in Proc. Eur. Conf. Power Electron. Appl., research interests include dcdc power convert-
2009, pp. 110. ers, LED drivers, and high step-up converters.
[10] S. Kouro, J. Rebolledo, and J. Rodriguez, Reduced switching-frequency-
modulation algorithm for high-power multilevel inverters, IEEE Trans.
Ind. Electron., vol. 54, no. 5, pp. 28942901, Oct. 2007.
[11] S. J. Park, F. S. Kang, M. H. Lee, and C. U. Kim, A new single-phase five-
level PWM inverter employing a deadbeat control scheme, IEEE Trans.
Power Electron., vol. 18, no. 3, pp. 831843, May 2003.
[12] L. M. Tolbert and T. G. Habetler, Novel multilevel inverter carrier-based Ehsan Adib was born in Isfahan, Iran, in 1982.
PWM method, IEEE Trans. Ind. Appl., vol. 35, no. 5, pp. 10981107, He received the B.S., M.S., and Ph.D. degrees
Sep./Oct. 1999. from Isfahan University of Technology, Isfahan,
[13] J. L. Duran-Gomez, E. Garcia-Cervantes, D. R. Lopez-Flores, P. N. Enjeti, in 2003, 2006, and 2009, respectively, all in
and L. Palma, Analysis and evaluation of a series-combined connected electrical engineering.
boost and buck-boost dcdc converter for photovoltaic application, He is currently a Faculty Member with the
in Proc. Annu. IEEE Appl. Power Electron. Conf. Expo., Mar. 2006, Department of Electrical and Computer Engi-
pp. 1923. neering, Isfahan University of Technology. He is
[14] S. V. Araujo, P. Zacharias, and B. Sahan, Novel grid-connected non- the author of more than 50 papers published
isolated converters for photovoltaic systems with grounded generator, in in journals and conference proceedings. His
Proc. IEEE Power Electron. Spec. Conf., 2008, pp. 5865. research interests include dcdc converters and
[15] S. Schoenbauer and F. R. Martin-Lopez, Single inductor buck boost their applications and soft-switching techniques.
converter with positive and negative outputs, U.S. Patent 2010 003 9080, Dr. Adib was the recipient of the Best Ph.D. Dissertation Award from
Feb. 18, 2010. the IEEE Iran Section in 2010.
[16] J.-M. She, H.-L. Jou, and J.-C. Wu, Novel transformerless grid-
connected power converter with negative grounding for photovoltaic
generation system, IEEE Trans. Power Electron., vol. 27, no. 4,
pp. 18181829, Apr. 2012.
[17] Q. Zhao and F. C. Lee, High-efficiency, high step-up dcdc converters, Hosein Farzanehfard was born in Isfahan, Iran,
IEEE Trans. Power Electron., vol. 18, no. 1, pp. 6573, Jan. 2003. in 1961. He received the B.S. and M.S. degrees
[18] R. J. Wai, C. Y. Lin, and C. C. Chu, High step-up dcdc converter for in electrical engineering from the University of
fuel cell generation system, in Proc. IEEE IECON, 2004, pp. 5762. Missouri, Columbia, MO, USA, in 1983 and
[19] R. J. Wai and C. Y. Lin, High-efficiency, high-step-up dcdc converter for 1985, respectively, and the Ph.D. degree from
fuel-cell generation system, Proc. Inst. Elect. Eng.Elect. Power Appl., Virginia Polytechnic Institute and State Univer-
vol. 152, no. 5, pp. 13711378, Sep. 2005. sity, Blacksburg, VA, USA, in 1992.
[20] T. F. Wu, Y. S. Lai, J. C. Hung, and Y. M. Chen, Boost converter with Since 1993, he has been a Faculty Member
coupled inductors and buck-boost type of active clamp, IEEE Trans. Ind. with the Department of Electrical and Computer
Electron., vol. 55, no. 1, pp. 154162, Jan. 2008. Engineering, Isfahan University of Technology,
[21] G. Wu, X. Ruan, and Z. Ye, Nonisolated high step-up DCDC converters Isfahan. He is the author or coauthor of more
adopting switched-capacitor cell, IEEE Trans. Ind. Electron., vol. 62, than 150 technical papers published in journals and conference pro-
no. 1, pp.383393, Jan. 2015. ceedings. His current research interests include high-frequency soft-
[22] H. S. Chung, A. Ioinovici, and W. L. Cheung, Generalized structure of switching converters, power factor correction, bidirectional converters,
bi-directional switched-capacitor dc/dc converters, IEEE Trans. Circuits active power filters, high-frequency electronic ballasts, and pulse power
Syst. I, Fundam. Theory Appl., vol. 50, no. 6, pp. 743753, Jun. 2003. applications.

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