10.1109/ULTSYM.2015.
0514
FPGA Implementation of Low-Power 3D
Ultrasound Beamformer
Richard Sampson , Ming Yang , Siyuan Wei , Rungroj Jintamethasawat ,
Brian Fowlkes , Oliver Kripfgans , Chaitali Chakrabarti , and Thomas F. Wenisch
Department of EECS, University of Michigan
Schoolof ECEE, Arizona State University
Department of Radiology, University of Michigan
Abstract3D ultrasound is common for non-invasive
medical imaging in cardiology and OB-GYN because of
its accuracy, safety, and real-time ease of use. However,
high bandwidth requirements and extreme computational
complexity have precluded hand-held and low-power 3D
systems, limiting 3D applications. In previous work, we
presented Sonic Millip3De, a hardware design that can
efficiently handle the high computational demand of real-
time 3D synthetic aperture beamforming, even in handheld
and mobile applications. The design combines a custom,
highly parallel hardware system with a novel delay ap-
proximation method to quickly produce high quality 3D
image data within an estimated 15 W full-system power
budget. Prior evaluations of the design relied on software
prototypes; this work extends previous evaluations with
an FPGA implementation of the beamforming accelerator,
validating the results of earlier prototypes. In particular,
we carry out image quality analyses of our beamforming
architecture using simulated 3D echo data (from Field II)
and 2D artificial tissue phantom data acquired using a
Verasonics V-1 system and Philips P4-1 probe. We compare
results from the FPGA implementation to an ideal software
beamformer and prior software prototypes of the Sonic
Millip3De design.
I. I NTRODUCTION
As technology advances, medical imaging systems
continue to become smaller and more portable. Portable
ultrasound systems, in particular, are becoming more
prevalent due to the inherent low transmit power of the
modality as well as its safety and ease of usemany
2D hand-held systems are available today. In contrast,
real-time 3D imaging remains intractable in hand-held
systems due to the high data rates and enormous compu-
tational requirements; versatile, state-of-the-art real-time
3D systems [2] are larger than a commercial refrigerator.
In our previous work, we proposed Sonic Mil-
lip3De [4, 5], a new approach to 3D ultrasound beam-
forming specifically targeted at a low-power and portable
design to enable small, hand-held, real-time 3D systems.
Sonic Millip3Des key innovation is a highly parallel de-
978-1-4799-8182-3/15/$31.00 2015 IEEE
sign that uses a new delay calculation algorithm coupled
with custom hardware to achieve high frame-rate, high
resolution 3D synthetic aperture ultrasound images, all
within a small, 15 W power budget.
However, our previous evaluations of Sonic Millip3De
relied on synthesis of a Verilog model of the hardware
design, and our image quality evaluation relied exclu-
sively on synthetic echo data from Field II [1, 3] and
simulation of the proposed beamforming algorithm in
MATLAB. Hence, a substantial gap remained between
our proposed design and its validation.
In this work, we build on our previous results by
implementing a hardware prototype of a single channel
of the Sonic Millip3De beamformer design on an Altera
DE1 FPGA board. Using this prototype, we then carry
out image quality analyses using synthetic 3D echo data
(from Field II) and 2D artificial tissue phantom data
acquired using a Verasonics V-1 system and Philips P4-1
probe. We compare results from the FPGA implementa-
tion to an ideal software beamformer and prior software
prototypes of the Sonic Millip3De design. Finally, we
report on the performance of the FPGA prototype taking
into account the limitations of our scaled-down imple-
mentation to re-examine our performance projections for
the full-scale ASIC design.
II. S ONIC M ILLIP 3D E
Sonic Millip3De [4, 5] is our previously proposed
hardware solution for portable, hand-held 3D ultrasound.
The design features custom hardware to implement our
iterative delay estimation algorithm, which eliminates the
need for a large look-up-table (LUT) or complex hard-
ware for on-the-fly delay calculations. In addition to the
custom beamforming accelerator, Sonic Millip3De also
makes use of state-of-the-art 3D die stacking technology
to allow the transducers, storage, and beamformer silicon
layers to connect directly to each other, creating an
2015 IEEE International Ultrasonics Symposium Proceedings
Fig. 1: Sonic Millip3De Hardware Overview. The full-scale ASIC design features 3 stacked die layers connected with through-
silicon vias. The first layer comprises transducers grouped into banks with one transducer per bank in each subaperture. Analog
transducer outputs from each bank are multiplexed and routed over TSVs to the second layer, comprising 12-bit ADC units
and SRAMs arrays for storage. The stored data is passed via face-to-face links to layer 3 for processing in the 3 stages of
the beamsum accelerator. The interpolation stage upsamples the signal by 4x and performs apodization. The select stage maps
signal data from the receive time domain to the image space domain for multiple scanlines. The summing unit combines the
incoming signal from all beamsum nodes over a pipelined interconnect and compounds previous image data, and the resulting
updated image is written back to memory. Our FPGA prototype implements a single channel of the beamforming layer.

efficient design that can provide the required bandwidth
from the transducers to the beamformer. We provide a
brief overview of the algorithmic and hardware innova-
tions of the design.
A. Delay Estimation
At the heart of the Sonic Millip3De design is a new
approach we developed for calculating delays in a delay-
sum synthetic aperture system. One of the key challenges
of large 3D systems is that over 100 billion round-trip
delay calculations are needed to convert the RF channel
data into beamformed images. The standard 2D approach
of pre-computing delays and storing them in a look-
up table (LUT) is infeasible for any high-frame rate,
portable design, as the table would require 10s to 100s
of GB of storage. In contrast, computing delays on-the-
fly while beamforming requires no storage. However,
exact calculation requires trigonometric and square root
functions, where are computationally expensive, and
billions of such computations are similarly infeasible in
a small, low-power system.
Sonic Millip3De instead allows for an efficient com-
promise between these methods by using the key insight
that, along a scanline, the change in the channel index
value from one focal point to the next can be approx-
imated accurately with piecewise quadratic formulae.
By computing the delay values iteratively along each
scanline, the quadratic formulae can be calculated using
only add operations and a small table of pre-computed
coefficients. Relative to a fully pre-computed LUT, our
approach reduces storage by orders of magnitude while
requiring only simple arithmetic circuits.
B. Hardware Design
The full-scale Sonic Millip3De system design (Fig. 1)
comprises three distinct silicon die layers (transducers,
ADC/SRAM, and beamformer) that are connected ver-
tically using through-silicon vias (TSVs). This design
technique reduces wire lengths as the short TSVs elim-
inate the long interconnect wires required in a con-
ventional single-die, planar design. TSVs facilitate tight
and dense connections between the layers, providing
the necessary bandwidth that a large 3D ultrasound
transducer array requires.
This study examines the third layer of the design,
comprising the 1024-channel beamforming accelerator,
which generates the image from the RF data stored in
the ADC/Storage layer. The accelerator itself comprises
three primary components that each perform a distinct
part of the beamforming process. The interpolation unit
up-samples the RF data via linear 4 interpolation and
performs apodization. The select unit uses the previously
described delay estimation algorithm to map the inter-
polated data onto scanlines. The unit contains multiple
sub-units (8 in our FPGA prototype) that operate in
parallel to each generate a single scanline. The summing
unit combines scanline data across the parallel channels
via a uni-directional ring network. The network also
transfers coefficients for the select and interpolation unit
as the accelerator iterates over all scaliness. The network
 TABLE I: System parameters for 2D and 3D results
Parameter 2D 3D
Number of Transducers 96 1024 (32 x 32)
Number of Scanlines per Image 192 1024 (32 x 32)
Number of Points per Scanline 780 1560
Image Depth 7 cm 4 cm
Image Total Angular Width /2 /3 x /3
Transmission Frequency 2.5 MHz 4 MHz
Sampling Frequency 10 MHz 40 MHz
Interpolation Factor 4x 4x
Interpolated Sampling Frequency 40 MHz 160 MHz
Speed of Sound (tissue) 1540 m/s 1540 m/s
terminates at a low-power ARM Cortex-A3 processor,
which manages off-chip memory accesses.
III. M ETHODOLOGY
A. Data Collection
2D: We acquire RF echo data from an artificial tissue
phantom using a Philips P4-1 operating at a 2.5 MHz
center frequency. The transmission pulses of all 96
transducers are time-delayed to create a virtual source
located 1 mm behind the transducer head. We apply
Hamming window apodization to the transmit pulses. We
collect the unprocessed RF data with a Verasonics V-1
system and then perform beamforming on the FPGA.
3D: Currently, commercially available 3D ultrasound
probes do not provide access to unprocessed RF data.
Hence, we use synthetic echo data, simulated in Field
II [1, 3], to create an input data set for 3D beamforming.
We simulate a 32x32 transducer receive aperture and
transmit from a center circle of 78 transducers. Similar
to the 2D methodology, transmission pulses are time-
delayed to create a virtual source 1 mm behind the array.
B. Beamforming
We evaluate image quality by contrasting three beam-
forming methods for both 2D and 3D echo data using
the parameters described in Table I. First, we generate
a ideal baseline image using MATLAB and double pre-
cision floating-point, calculating delays precisely based
on Euclidean distance. Second, we model the operation
of the hardware in MATLAB, using 12-bit fixed-point
arithmetic and our iterative delay calculation approach,
as described in II-A. Finally, we perform beamforming
in hardware on the DE1 FPGA board.
In all scenarios, we pre-process RF data using time-
gain compensation. We truncate input signals to 12-bit
precision for the fixed-point methods. After beamform-
ing, we perform demodulation and Cartesian re-gridding
(to facilitate easier viewing of 3D images) in software.
C. FPGA Processing
We implement a Sonic Millip3De beamforming chan-
nel on an Altera DE1 board which features a Cyclone
TABLE II: Root-mean-square difference in pixel value across
each beamforming method pair, expressed as a percent of the
40 dB dynamic range.
Image Pair 2D RMS 3D RMS
Float-Fixed 6.8% 0.7%
Float-FPGA 9.9% 0.5%
Fixed-FPGA 9.4% 0.6%
II FPGA chip. This FPGA is quite small, and can
accommodate only a single beamforming channel with
a half-width select unit (processing eight rather than 16
scanlines concurrently).
We iteratively load each transducers receive signal
into the FPGA and process the channel. To automate
channel processing, we implemented a MATLAB pro-
gram that manages communication with the FPGA, itera-
tively loading the beamforming coefficients and RF data.
The FPGA then fully processes the image volume for the
single channel, producing eight scanlines at a time in
repeated passes over the channel data. The partial sums
from all channel are then accumulated in MATLAB.
IV. R ESULTS
A. Image Quality
Fig. 2 shows x-z and y-z slices of the 3D results and
Fig. 3 shows the beamformed image results from the 2D
phantom data. By visual comparison, the images are all
similar with notable objects equally identifiable in the
images with no apparent degradation or artifacts.
To compare the images quantitatively, we report the
root-mean-square difference in pixel values, expressed
as a percent of the 40 dB range, for each pair of
beamforming methods (shown in Table II). (These reflect
the entire image volume, not just the shown slices). The
small differences, particularly for 2D, are primarily a
consequence of rounding errors in type conversion when
pre-processing the RF data to load it onto the FPGA.
B. FPGA Performance
We report performance (time to compute a frame) of
the FPGA and contrast it with the projected performance
of a full-scale Sonic Millip3De ASIC implementation.
The FPGA prototype runs at 50 MHz and computes a
partial image in 0.2 seconds per transducer channel in
2D, and 2.3 seconds per transducer in 3D. When scaled
based on our prior estimates [4, 5] for 1 GHz ASIC clock
frequency (20x speedup), 16 instead of 8 way parallelism
in select units (2x speedup), and individual high-speed
memories (estimated 24x speedup), we project that a
full-scale Sonic Millip3De implementation can generate
2D images at over 4k frames per second and 3D images
at over 400 volumes per second for the system configu-
rations described in Table I.
 (a) (b) (c)

(d) (e) (f)

Fig. 2: 3D Image Quality Comparison. Beamformed images of a simulated 3D cylindrical cyst using Field II [1, 3]. (a-c)
depict x-z slices and (d-f) depict y-z slices. (a,d) Generated in MATLAB with full delay and double-precision floating-point
(b,e) Generated in MATLAB with 12-bit fixed-point and iterative delay estimation (c,f) Generated on the FPGA prototype.

in real-time 3D systems. In previous work, we proposed

(a) (b)
(c) (d)
Fig. 3: 2D Image Quality Comparison. (a) Phantom guide.
Phantom features two hyperechoic gray scale targets at 3 cm:
+6 dB (left) and >+15 dB (right). (b) Image generated with
double-precision floating point and exact delay calculation. (c)
The same image generated via our delay estimation and 12-bit
fixed-point precision in MATLAB. (d) Image generated on the
FPGA prototype.
V. C ONCLUSIONS
2D portable ultrasound is now common, but over-
whelming computation requirements hamper portability
a new approach to real-time 3D synthetic aperture beam-
forming with our Sonic Millip3De system. In this work,
we validate the Sonic Millipede approach with a single-
channel FPGA prototype. Our image quality comparison
demonstrates that our approach can producing high-
quality images and validates previous projections of the
achievable frame rate of a full-scale design.
ACKNOWLEDGEMENTS
This work was supported in part by NSF CCF-
1406739, CCF-1406810, and CSR-0910699.
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