Figure 1 Figure 2

With +6 V at the base, the baseemitter junction will be forward biased; thus,

= +6 6 0.7 = 5.3 V
And
5.3
= = 1.6
3.3

Now, assuming active-mode operation, = ; thus,

= +10 4.7 10 7.52 = 2.83 V

The details of the analysis performed above are illustrated in Figure 1. [ 3 marks ]

Since the collector voltage calculated appears to be less than the base voltage by 3.52 V, it
follows that our original assumption of active-mode operation is incorrect. In fact, the
transistor has to be in the saturation mode. [ 2 marks ]

Assuming this to be the case, the values of and will remain unchanged. The collector
voltage, however, becomes
= + +5.3 + 0.2 = +5.5 V
from which we can determine as
10 5.5
= = 0.96
4.7
and can now be found as
= = 1.6 0.96 = 0.64
Thus the transistor is operating at a forced of
0.96
= = = 1.5
0.64

The details of the analysis are shown in Figure 2, where the order of the steps used is
indicated by the circled numbers. [ 3 marks ]

Since is less than the minimum specified value of , the transistor is indeed
saturated. We should emphasize here that in testing for saturation the minimum value of
should be used. By the same token, if we are designing a circuit in which a transistor is to
be saturated, the design should be based on the minimum specified . Obviously, if a
transistor with this minimum is saturated, then transistors with higher values of will also
be saturated. [ 2 marks ]
Since the base is at zero volts and the emitter is connected to ground through RE, the baseemitter
junction cannot conduct and the emitter current is zero. Note that this situation will obtain as long
as the voltage at the base is less than 0.5 V or so. [ 4 marks ]

The collectorbase junction cannot conduct, since the n-type collector is connected
through RC to the positive power supply while the p-type base is at ground. It follows that the
collector current will be zero. The base current will also have to be zero, and the transistor is in
the cutoff mode of operation. [ 2 marks ]

The emitter voltage will be zero, while the collector voltage will be equal to 10 V, since the
voltage drops across RE and RC are zero. [ 1 marks ]

The analysis details on figure [ 3 marks ]