Yamaha 01v96

01V96
DIGITAL MIXING CONSOLE
SERVICE MANUAL
CONTENTS
SPECIFICATIONS................................................... 4
DIMENSIONS .......................................................... 12
PANEL LAYOUT.................................. 13
CIRCUIT BOARD LAYOUT............... 21
DISASSEMBLY PROCEDURE............................ 23
INSTALLING AN OPTIONAL CARD
............................................ 32
LSI PIN DESCRIPTIONLSI................................ 33
IC BLOCK DIAGRAMIC.................................. 41
CIRCUIT BOARDS....................................... 46
INSPECTIONS....................................................... 76/83
SERVICE CHECK PROGRAM ... 90/102
INITIALIZING THE 01V9601V96....................... 114
TRANSMITTING PARAMETER SETTINGS VIA MIDI (BULK DUMP)
MIDI.... 115/117
CHECKING THE BATTERY AND THE SYSTEM VERSION
.......... 119
CALIBRATING THE FADERS
................................... 119
MIDI DATA FORMATMIDI............... 120
MIDI IMPLEMENTATION CHART
MIDI............................ 134

PARTS LIST
ECF BLOCK DIAGRAM

OVERALL CONNECTOR CIRCUIT DIAGRAM

This document is printed on chlorine free (ECF) paper with soy ink. CIRCUIT DIAGRAM
PA 011680
200304-250000 HAMAMATSU, JAPAN 1
1.329K-1933 Printed in Japan 03.03
01V96
IMPOR TANT NOTICE

This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed
that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and under-
stood by the users, and have therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in per-
sonal injury, destruction of expensive components and failure of the product to perform as specified. For
these reasons, we advise all Yamaha product owners that all service required should be performed by an
authorized Yamaha Retailer or the appointed service representative.
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certifi-
cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship of
any form.
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and
service departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable
and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to
exist, please contact the distributors Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have
accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to
this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power
to the unit.
WARNING: CHEMICAL CONTENT NOTICE!

The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Where
applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly
other entities) to cause cancer and/or birth defects or other reproductive harm.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT
SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose
eyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling
food.
WARNING: THIS APPARATUS MUST BE EARTHED

IMPORTANT
THE WIRES IN THIS MAINS LEAD ARE COLOURED IN
ACCORDANCE WITH THE FOLLOWING CODE:
GREEN-AND-YELLOW : EARTH
BLUE : NEUTRAL
BROWN : LIVE
As the colours of the wires in the mains lead of this apparatus may
not correspond with the coloured markings identifying the terminals in
your plug, proceed as follows:
The wire which is coloured GREEN and YELLOW must be
connected to the terminal in the plug which is marked by the letter E
or by the safety earth symbol or coloured GREEN and YELLOW.
The wire which is coloured BLUE must be connected to the terminal
which is marked with the letter N or coloured BLACK.
The wire which is coloured BROWN must be connected to the
terminal which is marked with the letter L or coloured RED.
* This applies only to products distributed by YAMAHA KEMBLE
MUSIC (U.K.) LTD.
WARNING
Components having special characteristics are marked and must be replaced with parts having specification equal to those
originally installed.
2
01V96
LITHIUM BATTERY HANDLING

This product uses a lithium battery for memory back-up.
WARNING : Lithium batteries are dangerous because they can be exploded by improper handling. Observe the following pre-
cautions when handling or replacing lithium batteries.
Leave lithium battery replacement to qualified service personnel.
Always replace with batteries of the same type.
When installing on the PC board by soldering, solder using the connection terminals provided on the battery cells.
Never solder directly to the cells. Perform the soldering as quickly as possible.
Never reverse the battery polarities when installing.
Do not short the batteries.
Do not attempt to recharge these batteries.
Do not disasemble the batteries.
Never heat batteries or throw them into fire.
ADVARSEL!
Lithiumbatteri-Eksplosionsfare ved fejlagtig handtering. Udskiftning ma kun ske med batteri af samme fabrikat og type. lever det brugte
batteri tilbage til leverandren.
VARNING
Explosionsfara vid felaktigt batteribyte.
Anvand samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren.
Kassera anvant batteri enligt fabrikantens instruktion.
VAROITUS
Paristo voi rajahtaa, jos se on virheellisesti asennettu.
Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiiin.
Havita kaytetty paristo valmistajan ohjeiden mukaisesti.
The following information complies with Dutch official Gazette 1995. 45; ESSENTIALS OF ORDER ON THE COLLECTION OF BATTERIES.
Please refer to the diassembly procedure for the removal of Back-up Battery.
Leest u voor het verwijderen van de backup batterij deze beschrijving.
Take care not to trap your fingers.

3
01V96
SPECIFICATIONS
General Spec
Number of scene memories 99
Internal 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz
Sampling Frequency Normal rate: 44.1 kHz10% to 48 kHz+6%
External
Double rate: 88.2 kHz10% to 96 kHz+6%
fs=48 kHz Less than 1.6 ms CH INPUT to STEREO OUT
Signal Delay
fs=96 kHz Less than 0.8 ms CH INPUT to STEREO OUT
Fader 100 mm motorized with touch sense 17
+10 to 138, dB input faders
Fader Resolution
0 to 138, dB master faders, stereo fader
Less than 0.05% 20 Hz20 kHz @ +14 dB into 600
Total Harmonic Distortion*1 fs=48 kHz Less than 0.01% 1 kHz @ +24 dB into 600
(CH INPUT to STEREO OUT)
(Input Gain=Min.) Less than 0.05% 20 Hz40 kHz @ +14 dB into 600
fs=96 kHz
Less than 0.01% 1 kHz @ +24 dB into 600
Frequency Response fs=48 kHz 20 Hz20 kHz, 0.5, 1.5 dB @ +4 dB into 600
(CH INPUT to STEREO OUT) fs=96 kHz 20 Hz40 kHz, 0.5, 1.5 dB @ +4 dB into 600
110 dB typ. DA Converter (STEREO OUT)
Dynamic Range
105 dB typ. AD+DA (to STEREO OUT) @ fs=48 kHz
(maximum level to noise level)
105 dB typ. AD+DA (to STEREO OUT) @ fs=96 kHz
128 dB Equivalent Input Noise
86 dB residual output noise. STEREO OUT (STEREO OUT off)
Hum & Noise*2 Input Gain=Max. 86 dB (90 dB S/N) STEREO OUT
(20 Hz20 kHz) Input Pad =0 dB (STEREO fader at nominal level and all CH INPUT faders at minimum level)
Rs=150 Input Pad =0 dB
64 dB (68 dB S/N) STEREO OUT
Input Sensitivity
(STEREO fader at nominal level and one CH INPUT fader at nominal level)
=60 dB
74 dB CH INPUT (CH112) to STEREO OUT/OMNI (BUS) OUT
40 dB CH INPUT (CH1316) to STEREO OUT
Maximum Voltage Gain
74 dB CH INPUT (CH112) to OMNI (AUX) OUT (via pre input fader)
74 dB CH INPUT (CH112) to MONITOR OUT (via STEREO BUS)
Crosstalk 80 dB adjacent input channels (CH112)
(@ 1 kHz) 80 dB adjacent input channels (CH1316)
Input Gain=Min. 80 dB input to output
Phantom switch +48 V DC (each 4ch)
Pad switch 0/20 dB attenuation
Gain control 44 dB (60 to 16), detented
LED (red) turns on when post HA level reaches 3 dB below clipping at dig-
AD Input (112) Peak indicator
ital domain
LED (green) turns on when post HA level reaches 20 dB below nominal at
Signal indicator
digital domain
24-bit linear, 128-times oversampling (fs=44.1, 48 kHz), 64-times over-
AD converter
sampling (fs=88.2, 96 kHz)
Gain control 30 dB (26 to +4), detented
LED (red) turns on when post HA level reaches 3 dB below clipping at dig-
Peak indicator
ital domain
LED (green) turns on when post HA level reaches 20 dB below nominal at
AD Input (1316) Signal indicator
digital domain
24-bit linear, 128-times oversampling (fs=44.1, 48 kHz), 64-times over-
AD converter
sampling (fs=88.2, 96 kHz)
Input selector CH15/16/2TR IN for CH15/16
4
01V96
Digital Input
(2TR IN DIGITAL, ADAT input)
Option Input (SLOT) Available cards Optional digital interface cards (MY16, MY8, MY4 series)
Input patch
Phase Normal/reverse
On/off
Gate-type *3
Key in: 12 ch Group (112, 1324, 2532)/AUX18
On/off
Comp-type*4 Key in: self /Stereo Link
Pre EQ/pre fader/post fader
Attenuator 96.0 to +12.0 dB (0.1 dB step)
4-band PEQ (TYPE1) *5
EQ
On/off
Delay 043400 samples
On/off
Input Channel CH132 Fader 100 mm motorized (INPUT/AUX18)
On/off
Aux send
AUX18; pre fader/post fader
On/off
Solo
Pre fader/after pan
Pan 127 positions (Left= 163, Center, Right= 163)
127 127 positions
Surround pan
[(Left= 163, Center, Right= 163)], [(Front= 163, Center, Rear= 163)]
LFE level , 96 dB to +10 dB (256 step)
Routing STEREO, BUS18, DIRECT OUT
Direct out Pre EQ/pre fader/post fader
Displayed on LCD
Metering
Peak hold on/off
Input patch (L/R)
Phase (L/R) Normal/reverse
Attenuator (L/R) 96.0 to +12.0 dB (0.1 dB step)
Equalizer 4band PEQ (TYPE1) *5
On/off
100 mm motorized
Fader
INPUT/AUX18 send
On/off
Aux send
Stereo Input Channel CH14 AUX18; pre fader/post fader
On/off
Solo
Pre fader/after pan
Pan (L/R) 127 positions (Left= 163, Center, Right= 163)
Surround pan 127 127 positions
(L/R) ([Left= 163, Center, Right= 163] x [Front= 163, Center, Rear= 163])
LFE level (L/R) , 96 dB to +10 dB (256 step)
Routing STEREO, BUS18, DIRECT OUT
Displayed on LCD
Metering
Peak hold on/off
Level 0 to 96 dB (1 dB step)
On/off
OSCILLATOR
Waveform Sine 100 Hz, sine 1 kHz, sine 10 kHz, pink noise, burst noise
Routing BUS18, AUX18, STEREO L/R
24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-
STEREO OUT DA converter
sampling (@fs=88.2, 96 kHz) 5
01V96

MONITOR OUT DA converter
sampling (@fs=88.2, 96 kHz)
STEREO, BUS18, AUX18, DIRECT OUT 132, INSERT OUT (CH132,
Output patch BUS18, AUX18, STEREO), CASCADE OUT (BUS18, AUX 18, STEREO,
OMNI OUT 14 SOLO)
DA converter
sampling (@fs=88.2, 96 kHz)
On/off
Dither
Word length 16, 20, 24-bit
2TR OUT DIGITAL STEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132,
Output patch BUS 18, AUX 18, STEREO), CASCADE OUT (BUS 18, AUX 18, STEREO,
SOLO)
On/off
Dither
Word length 16, 20, 24-bit
ADAT Output STEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132,
SOLO)
Available card Optional digital interface card (MY16, MY8, MY4 series)
On/off
Dither
Option Output (SLOT) Word length 16/20/24-bit
STEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132,
SOLO)
On/off
Comp-type*4
4-band PEQ *5
EQ
On/off
On/off
STEREO
Fader 100 mm motorized
Balance 127 positions (Left=163, Center, Right=163)
Displayed on LCD
Metering Peak hold on/off
12-elements x2 LED meters
On/off
Comp-type*4
4-band PEQ *5
EQ
On/off
On/off
BUS18 Fader 100 mm motorized
Level (, 130 dB0 dB)
Bus to stereo On/off
Pan: 127 positions (Left=163, Center, Right=163)
Displayed on LCD
Metering
Peak hold on/off
6
01V96
On/off
Comp-type*4
4-band PEQ *5
EQ
On/off
AUX18
On/off
Fader 100 mm motorized
Displayed on LCD
Metering
Peak hold on/off
Number of 4@44.1kHz, 48kHz
effects 2@88.2kHz, 96kHz
Bypass On/off
INTERNAL EFFECTS
(EFFECT 14) In/out 2-in, 2-out
Effect-in from AUX18/INSERT OUT
Effect-out to Input patch
Japan 100 V, 50/60 Hz 90 W
Power Requirements U.S/Canada 120 V, 60 Hz 90 W
Others 220-240 V, 50/60 Hz 90 W
Dimensions (H x D x W) 150 x 548 x 436 mm
Net weight 15 kg
Operating free-air temperature range 1035C
Storage temperature range 2060C
AC Cable (3P/2P AC plug adapter)
Supplied Accessories CD-ROM (Studio Manager)
Owners Manual
Studio Manager Installation Guide
Warranty card (J)
Digital interface card (MY16, MY8, MY4 series)
Options
RACK MOUNT KIT: RK1
*1. Total harmonic distortion is measured with a 6 dB/octave filter @ 80 kHz.
*2. Hum & Noise are measured with a 6 dB/octave filter @ 12.7 kHz; equivalent to a 20 kHz filter with infinite dB/octave
attenuation.
*3. See Gate Parameters on page 8.
*4. See Comp Parameters on page 8.
*5. See EQ Parameters on page 7.
EQ ParametersEQ
LOW/HPF L-MID H-MID HIGH /LPF
0.110.0 0.110.0
Q (41 points) 0.110.0 (41 points)
low shelving (41 points) high shelving
HPF LPF
F 20 Hz20 kHz (1/12 oct step)
18 dB 18 dB
G 18 dB
(0.1 dB step) (0.1 dB step)
(0.1 dB step)
HPF: on/off LPF: on/off
7
01V96
Gate ParametersGate
Threshold 54 dB0 dB (0.1 dB step)
Range 70 dB0 dB (1 dB step)
Attack 0 ms120 ms (1 ms step)
0.02 ms1.96 s (216 points) @ 48 kHz
0.02 ms2.13 s (216 points) @ 44.1 kHz
Gate Hold
0.01 ms981 ms (216 points) @ 96 kHz
0.01 ms1.06 s (216 points) @ 88.2 kHz
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Decay
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
Range 70 dB0 dB (1 dB step)
Attack 0 ms120 ms (1 ms step)
0.02 ms1.96 s (216 points) @ 48 kHz
0.02 ms2.13 s (216 points) @ 44.1 kHz
Ducking Hold
0.01 ms981 ms (216 points) @ 96 kHz
0.01 ms1.06 s (216 points) @ 88.2 kHz
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Decay
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
Comp ParametersComp
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20, (16 points)
Out gain 0 dB to +18 dB (0.1 dB step)
Knee Hard, 1, 2, 3, 4, 5 (6 step)
Compressor Attack 0 ms120 ms (1 ms step)
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Release
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
Threshold 54 dB to 0 dB (0.1 dB step)
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20, (16 points)
Out gain 0 dB to +18 dB (0.1 dB step)
Knee Hard, 1, 2, 3, 4, 5 (6 points)
Expander Attack 0 ms120 ms (1 ms step)
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Release
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
8
01V96

Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20 (15 points)
Out gain 18 dB to 0 dB (0.1 dB step)
Width 1 dB90 dB (1 dB step)
Compander H Attack 0 ms120 ms (1 ms step)
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Release
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20 (15 points)
Out gain 18 dB to 0 dB (0.1 dB step)
Width 1 dB90 dB (1 dB step)
Compander S Attack 0 ms120 ms (1 ms step)
5 ms42.3 s (160 points) @ 48 kHz
6 ms46.0 s (160 points) @ 44.1 kHz
Release
3 ms21.1 s (160 points) @ 96 kHz
3 ms23.0 s (160 points) @ 88.2 kHz
Libraries
Presets 44
Effect library (EFFECT 14)
User memories 76
Presets 36
Compressor library
User memories 92
Presets 4
Gate library
User memories 124
Presets 40
EQ library
User memories 160
Presets 2
Channel library
User memories 127
Presets 1
Input patch library
User memories 32
Presets 1
Output patch library
User memories 32
9
01V96
Analog Input Spec

Input level
Actual Load For Use With
Input PAD GAIN Max. Connector
Impedance Nominal Sensitivity*1 Nominal
before clip
70 dB 60 dB 40 dB
60 dB
(0.245 mV) (0.775 mV) (7.75 mV) A: XLR-3-31 type
0 50600
INPUT A/B 26 dB 16 dB +4 dB (Balanced)*2
3k Mics & 600
112 (38.8 mV) (123 mV) (1.23 V) B: Phone jack
16 dB Lines
6 dB +4 dB +24 dB (TRS) (Balanced)*3
20
(338 mV) (1.23 V) (12.28 V)
36 dB 26 dB 6 dB
26 dB
(1.23 mV) (38.8 mV) (388 mV) Phone jack (TRS)
INPUT 1316 10k 600 Lines
6 dB +4 dB +24 dB (Balanced) *3
+4 dB
(388 mV) (1.23 V) (12.28 V)
CH INSERT IN 12 dB 2 dB +18 dB Phone jack (TRS)
10k 600 Lines
112 (195 mV) (616 mV) (6.16 V) (Unbalanced) *4
10 dB 10 dBV +10 dBV RCA pin jack
2TR IN [L, R] 10k 600 Lines
(316 mV) (316 mV) (3.16 V) (Unbalanced)
*1. Sensitivity is the lowest level that will produce an output of +4 dB (1.23 V) or the nominal output level when the unit
is set to maximum gain. (All faders and level controls are maximum position.)
*2. XLR-3-31 type connectors are balanced (1=GND, 2=HOT, 3=COLD).
*3. Phone jacks are balanced (Tip=HOT, Ring=COLD, Sleeve=GND).
*4. CH INSERT IN/OUT phone jacks are unbalanced. (Tip=OUTPUT, Ring=INPUT, Sleeve=GND).
In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.

For 2TR IN levels, 0 dBV is referenced to 1.00 Vrms.
All input AD converters (CH INPUT 116) are 24-bit linear, 128-times oversampling. (@fs=44.1, 48 kHz)
+48 V DC (phantom power) is supplied to CH INPUT (112) XLR type connectors via individual switches.
Three PHANTOM +48V switches CH14, 58, 912 turn on the phantom power for inputs 14, 58, 912 respectively.
Analog Output Spec

Actual Output level
For Use With
Output Source Max. Connector
Nominal Nominal
Impedance before clip
+4 dB +24 dB
STEREO OUT [L, R] 150 600 Lines XLR-3-32 type (Balanced) *1
(1.23 V) (12.28 V)
+4 dB +24 dB
OMNI OUT 14 150 10k Lines Phone jack (TRS) (Balanced)*2
(1.23 V) (12.28 V)
+4 dB +24 dB
MONITOR OUT [L, R] 150 10k Lines Phone jack (TRS) (Balanced)*2
(1.23 V) (12.28 V)
2 dB +18 dB Phone jack (TRS) (Unbal-
CH INSERT OUT 112 600 10k Lines
(616 mV) (6.16 V) anced) *3
10 dBV +10 dBV
2TR OUT [L, R] 600 10k Lines RCA Pin Jack (Unbalanced)
(316 mV) (3.16 V)
8 Phones 4 mW 25 mW Stereo Phone Jack (TRS)
PHONES 100
40 Phones 12 mW 75 mW (Unbalanced) *4
*1. XLR-3-32 type connectors are balanced (1=GND, 2=HOT, 3=COLD).
*2. Phone jacks are balanced (Tip=HOT, Ring=COLD, Sleeve=GND).
*3. CH INSERT IN/OUT phone jacks are unbalanced. (Tip=OUTPUT, Ring=INPUT, Sleeve=GND).
*4. PHONES stereo phone jack is unbalanced (Tip=LEFT, Ring=RIGHT, Sleeve=GND).
In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.

2TR OUT [L, R] levels, 0 dBV is referenced to 1.00 Vrms.
All output DA converters are 24-bit, 128-times oversampling. (@fs=44.1, 48 kHz)
10
01V96
Digital Input Spec

Input Format Data length Level Connector
2TR IN DIGITAL IEC-60958 24-bit 0.5 Vpp/75 RCA pin jack
ADAT IN ADAT *1 24-bit OPTICAL
*1. ALESIS proprietary multichannel optical digital interface format
Digital Output Spec

Output Format Data length Level Connector
2TR OUT DIGITAL IEC-60958 *1 0.5V pp/75 RCA pin jack

24-bit *3
Consumer use
ADAT OUT ADAT *2 24-bit *3 OPTICAL
*1. Channel status of 2TR OUT DIGITAL

Type: linear PCM
Category code: Digital signal mixer
Copy prohibit: NO
Emphasis: NO
Clock accuracy:Level II (1000 ppm)
Sampling rate: depends on the internal configuration
*2. ALESIS proprietary multichannel optical digital interface format
*3. Dither: word length 16/20/24 bit
I/O Slot SpecI/O

Each I/O SLOT accepts a Digital interface card. SLOT1 has a serial interface.
The
OUTPUT number of
Maker Model Function INPUT *1 Format Resolution Frequency Note
Available
cards
MY8-AT 8 8 20 bit 44.1/48 kHz 1
ADAT
MY16-AT 16 16 44.1/48 kHz 1 Can handle
24 bit/96 kHz by
MY8-TD 8 8 TASCAM 44.1/48 kHz 1 double channel mode
MY8-AE Digital I/O 8 8 44.1/48 kHz 1
24 bit Sampling Rate Con-
MY8-AE96S 8 8 AES/EBU 44.1/48/88.2/96 kHz 1
verter for input
MY8-AE96 8 8 44.1/48/88.2/96 kHz 1
Yamaha
MY4-AD 4 44.1/48 kHz 1
MY8-AD 8 20 bit 44.1/48 kHz 1
ANALOG IN
MY8-AD24 8 44.1/48 kHz 1
24 bit
MY8-AD96 8 44.1/48/88.2/96 kHz 1
MY4-DA 4 20 bit 44.1/48 kHz 1
ANALOG OUT
MY8-DA96 8 44.1/48/88.2/96 kHz 1
MY-mLAN mLAN Interface 8 8 IEEE1394 44.1/48 kHz 1 Maximum 5 nodes
Waves Y56K Effect & I/O 8 8 ADAT 24 bit 44.1/48 kHz 1
AP8AD ANALOG IN 8 44.1/48/88.2/96 kHz 1
Apogee 4ch @fs=88.2, 96 kHz
AP8DA ANALOG OUT 8 44.1/48/88.2/96 kHz 1
*1. Selectable from STEREO/BUS/AUX/DIRECT/OUT/INSERT OUT/CASCADE OUT (STEREO, BUS18, AUX18, SOLO).
Details depend on each interface card.
11
01V96
Control I/O SpecI/O

I/O Port Format Level Connector in Console
TO HOST USB USB 0 V3.3 V B type USB connector
IN *1 MIDI DIN Connector 5P
MIDI OUT MIDI DIN Connector 5P
THRU MIDI DIN Connector 5P
IN TTL/75 BNC Connector
WORD CLOCK
OUT TTL/75 BNC Connector
*1. MIDI IN can use as TIME CODE IN MTC.
DIMENSIONS
Top view Front view
430 (Not included Screw Heads)

436 (Included Screw Heads)
350
Side view
150
101 350
540 Units: mm
548
12
01V96
PANEL LAYOUT
Control Panel
AD Input Section (p. 14) SCENE MEMORY Section (p. 17)

AD
CH1-4 CH5-8 CH9-12
1 2 3
5 4 6 7 8 9 10 11 12 PHANTOM +48V
13 15
A A A A A A A A A A A A Monitor Out
DISPLAY ACCESS 14 16 R
INPUT
B B B B B B B B B B B B
IN OUT & Head-
Section (p. 16) (BAL)
INSERT
2TR
-10dBV (UNBAL)
PHONES
phones Sec-
OUT IN
(UNBAL)
INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O
CH15/16
2TR IN
MONITOR
2TR IN
tion (p. 14)
PAD
20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB
/

+4 GAIN -26 +4 GAIN -26 0 10 0 10
LEVEL LEVEL
MONITOR PHONES
-16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 +4 GAIN -26 +4 GAIN -26
OUT

GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN
PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK
13 14 15 16
SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL
DISPLAY ACCESS SCENE MEMORY
SCENE DIO/SETUP MIDI UTILITY

SOLO Section (p. 18)
STORE RECALL SOLO CLEAR
OVER SELECTED CHANNEL

/ INSERT/ PAN/ PAIR/ PATCH
DELAY ROUTING GROUP 0
-3
FADER MODE DYNAMICS EQ EFFECT VIEW

Display Section -6
-9
PAN DEC INC
Data Entry
-12
Section (p. 16)

FADER MODE
(p. 17) -15
-18
EQUALIZER
AUX 1 AUX 2 AUX 3 AUX 4

-24
-30 Section (p. 18)
-36
-48
STEREO
Q
HIGH

HIGH-MID

FREQUENCY
HOME (METER)
LAYER
LOW-MID
ENTER
SELECTED
LAYER Section (p. 16) 1-16 17-32 MASTER REMOTE GAIN
LOW
ST IN
CHANNEL
Section (p. 17)
SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL

SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO

ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ST IN 1 ST IN 2
+10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 +10 0 0
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5 5
ST IN Section (p. 16)
USER DEFINED
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10
0
10 10
KEYS

5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
1 2
10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 20
3 4
15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 30
20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 40
5 6
30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 50
40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 60
70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 7 8
50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AUX 1 AUX 2 AUX 3 AUX 4 AUX 5 AUX 6 AUX 7 AUX 8 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 BUS 8 STEREO
Channel Strip Section (p. 15) STEREO Section (p. 15) USER DEFINED KEYS
Section (p. 18)

13
01V96
AD Input SectionAD
CH1-4
1 2 3
5 4 9 10 11 12
13 15
A A A A A A A A A
14 16
B B B B B B B B B
INPUT
(BAL)
INSERT
OUT IN
(UNBAL)
CH15/16
INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O I NSERT I/O INSERT I/O INSERT I/O INSERT I/O 2TR IN
PAD
20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB
+4 GAIN -26 +4 GAIN -26
-16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 +4 GAIN -26 +4 GAIN -26
GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN
PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK
13 14 15 16
SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL
q [INPUT] connectors A/B A/B

w [INPUT] connectors 1316 13 16
e [INSERT I/O] connectors /
r [PAD] switches
t [GAIN] controls
y [PEAK] indicators
u [SIGNAL] indicators
i [AD15/16] selector
AD15/16
Monitor Out & Headphones Section
CH5-8 CH9-12
PHANTOM +48V
q [2TR IN/OUT] connectors 2 /
L
w Monitor Source selector
R e [MONITOR LEVEL] control
IN
2TR
OUT
r [PHONES LEVEL] control
-10dBV (UNBAL)
PHONES
t [PHONES] jack
MONITOR
2TR IN
0 10 0 10
LEVEL LEVEL
MONITOR PHONES
OUT
14
01V96
Channel Strip Section
SEL
SOLO
q [SEL] buttons
ON w [SOLO] buttons
1 e [ON] buttons
r Channel faders
+10 0
5
5
0
10
5
15
10 20
15 30
20 40
30 50
40 60
70
50
1
17
AUX 1
STEREO Section
SEL
q [SEL] button
ON
w [ON] button
e [STEREO] fader
10
15
20
30
40
50
60
70
STEREO
15
01V96
ST IN Section
ST IN
q [ST IN] button

SEL SEL
w [SEL] buttons
e [SOLO] buttons
SOLO SOLO
r [ON] buttons
ON ON
t Level controls
ST IN 1 ST IN 2
FADER MODE Section
FADER MODE

q [AUX 1] - [AUX 8] buttons
AUX 1AUX 8
w [HOME] button
HOME (METER)
DISPLAY ACCESS Section
q [SCENE] button
DISPLAY ACCESS
w [DIO/SETUP] button /
e [MIDI] button
SCENE DIO/SETUP MIDI UTILITY r [UTILITY] button
t [/INSERT/DELAY] button / /
/ INSERT/ PAN/ PAIR/ PATCH
DELAY ROUTING GROUP
y [PAN/ROUTING] button /
DYNAMICS EQ EFFECT VIEW
u [PAIR/GROUP] button /
i [PATCH] button
o [DYNAMICS] button
!0 [EQ] button
!1 [EFFECT] button
!2 [VIEW] button
LAYER Section
LAYER
q [1-16]/[17-32] buttons
116/17 32
1-16 17-32 MASTER REMOTE w [MASTER] button
e [REMOTE] button
16
01V96
Display Section
OVER
0
-3
-6
-9
-12
-15
-18
-24
-30
-36
-48
STEREO
q Display
w Stereo meters
e Contrast control
r [F1]-[F4] buttons
F1F4
t Left Tab Scroll [ ] button
y Right Tab Scroll [ ] button
SELECTED CHANNEL Section
SELECTED CHANNEL
PAN q [PAN] control

EQUALIZER
w [HIGH] button
e [HIGH-MID] button -
Q
HIGH r [LOW-MID] button -
t [LOW] button
y [Q] control
HIGH-MID

Q
FREQUENCY
LOW-MID
u [FREQUENCY] control
i [GAIN] control
LOW
GAIN
SCENE MEMORY Section
SCENE MEMORY
q [STORE] button
STORE RECALL
w Scene Up [ ] / /
Down [ ] buttons
e [RECALL] button
17
01V96
USER DEFINED KEYS Section
USER DEFINED
KEYS
1 2
3 4
q [1]-[8] buttons
18
5 6
7 8
Data Entry Section
DEC INC
q Parameter wheel
w [ENTER] button
e [DEC] & [INC] buttons DEC/INC
r Left, Right, Up, Down
([ ] / [ ] / [ ] / [ ]) / / /

cursor buttons
ENTER
SOLO Section
q [SOLO] indicator
SOLO CLEAR w [CLEAR] button
18
01V96
Rear Panel
PHANTOM +48V (p. 19) AD Output Section (p. 19) Digital I/O Section (p. 20) MIDI/Control Section (p. 20)
+48V / /
Power Section (p. 20) SLOT Section (p. 20)

PHANTOM +48V +48V
q [CH1-4 ON/OFF] switch CH14 /

w [CH5-8 ON/OFF] switch CH58 /
e [CH9-12 ON/OFF] switchCH912 /
AD Output Section
q [MONITOR OUT] connectors L/R L/R

w [OMNI OUT] connectors 1-4 1 4
e [STEREO OUT] connectors L/R L/R
19
01V96
Digital I/O Section /
q [WORD CLOCK OUT] connector

w [WORD CLOCK IN] connector
e [ADAT IN/OUT] connectors ADAT /
r [2TR OUT DIGITAL COAXIAL] connector2 COAXIAL
t [2TR IN DIGITAL COAXIAL] connector 2 COAXIAL
MIDI/Control Section /
q [MIDI IN/THRU/OUT] ports / /

w [TO HOST USB] port
SLOT SectionSLOT
q [SLOT]
Power Section
q [POWER ON/OFF] switch /

w [AC IN] connector [AC IN]
20
01V96
CIRCUIT BOARD LAYOUT
Bottom Assembly Assy
<Top view>
AC
DCA
MAIN
Power Transformer

DCD
21
01V96
Control Panel Assembly Assy
<Bottom view>
ADA
PN1 (1/2)
PN1 (2/2) LCD
FD
PN2
<Rear view>
HA
ADA
<Bottom view>
HA
PN1 (2/2) PN1 (1/2)
PN2
22
01V96
DISASSEMBLY PROCEDURE
Note: Take care not to trap your fingers.
After replacing the circuit board or fader of FD, please FD

calibrate the faders. (See page 119.) (119 )
1. Control Panel Assembly 1. Ass'y 3

(Time required: About 3 minutes) 1-1. [50] 20
1
1-1. Remove the twenty (20) screws marked [50]. (Fig.1) 1-2. Ass'y 1
1-2. Lift the control panel assembly from the rear side 1
and fasten them by the stay. (Photo.1) Ass'y Ass'y
When assembling the control panel assembly
with the bottom assembly, put the screws of
the front side right side panel side left
side panel side rear side in order.
<Front view>
[50]
<Left side view> <Top view> <Right side view>
[50] [50]
Side panel L Side panel R

<Rear view> R)
L)
Control panel assembly
Ass'y)
Bottom assembly
[50]
Ass'y)
[50]: Bind Head Tapping Screw-B ( B ) 4.0X8 MFZN2BL (EG340190)

Fig .1 (1)
23
01V96
Control panel assembly

Ass'y
Stay
(WA963600)
Bottom assembly
Ass'y) Photo.1 (1)
Bottom Assembly Section Ass'y
2. MAIN Circuit Board 2. MAIN 5

(Time required: About 5 minutes) 2-1. Ass'y 1
2-1. Fasten the control panel assembly. (See procedure 1.) 2-2. [130] 9 MAIN
2-2. Remove the nine (9) screws marked [130]. The MAIN 2
circuit board can then be removed. (Fig.2)
3. Replacing the Lithium Battery 3. 3

(Time required: About 3 minutes) 3-1. Ass'y
1
3-1. Fasten the control panel assembly. (See procedure 1.) 3-2. MAIN
3-2. You can replace the lithium battery from the MAIN 2
circuit board. (Fig.2) MAIN
The lithium battery is not part of the MAIN MAIN
circuit board. When you replace the MAIN
circuit board, you should remove the lithium
battery from the board, and install in the holder MIDI
on the new circuit board. 117
Important data should be backed up by MIDI
dump. (See page 115.)
4. DCA Circuit Board 4. DCA 6

4-1. Fasten the control panel assembly. (See procedure 1.) 4-2. [220]4[221]3[222]5
4-2. Remove the four (4) screws marked [220], the three DCA 2 2
(3) screws marked [221] and the five (5) screws
marked [222]. The DCA circuit board can then be
removed. (Fig.2, Photo.2)
5. DCD Circuit Board 5. DCD 5

5-1. Fasten the control panel assembly. (See procedure 1.) 5-2. [290] 4 [291] 2 DCD
5-2. Remove the four (4) screws marked [290] and the 2 3
two (2) screws marked [291]. The DCD circuit board
can then be removed. (Fig.2, Photo.3)
6. AC Shield Plate 6. AC 4
6-1. Fasten the control panel assembly. (See procedure 1.) 6-2. [170] 4 AC
6-2. Remove the four (4) screws marked [170]. The AC 2 4
shield plate can then be removed. (Fig.2, Photo.4)
7. Power Transformer 7. 5
7-1. Fasten the control panel assembly. (See procedure 1.) 7-2. AC 6
7-2. Remove the AC shield plate. (See procedure 6.) 7-3. [110] 4
7-3. Remove the four (4) screws marked [110]. The power 2
transformer can then be removed. (Fig.2)
24
01V96
<Front view> [220] [221] <Rear view>
DCA
[170]
Photo.2 (2)
Photo.4 (4)
<Top view> [222]
AC shield plate
AC
DCA
[170]
[110]
MAIN
[130]
Power transformer

Lithium Battery
Battery VN103500 DCD

VN103600(Battery holder for VN103500)
[290]
Notice for back-up battery removal
Push the battery as shown in figure,
then the battery will pop up.
Druk de batterij naar beneden zoals
aangeven in de tekening de batterij
springt dan naar voren.
Battery
Battery holder
[291]
[130] <Front view>
DCD
Photo.3 (3)
[110]: Bind Head Tapping Screw-B ( B ) 4.0X8 MFZN2BL (EG340190)

[130]: Bind Head Tapping Screw-B ( B ) 3.0X6 MFZN2BL (EP600230)
[220]: Bind Head Tapping Screw-B ( B ) SP 3.0X10 MFZN2BL (VH741100)
[221]: Bind Head Screw () SP 3.0X12 MFZN2Y (VB763800)
[291]: Bind Head Tapping Screw-B ( B ) SP 3.0X10 MFZN2BL (VH741100)
Fig. 2 (2)
25
01V96
8. AC Circuit Board 8. AC 5
8-2. Remove the AC shield plate. (See procedure 6.) 8-3. AC
8-3. Remove the cord holder fastened the AC circuit 5
board and the ferrite core.(Photo.5) 8-4. [145]2
8-4. Remove the two (2) screws marked [145]. The AC 2 AC 5
circuit board can then be removed from the two (2) PSW AC
locking card spacers. (Photo.5) AC AC
The power switch knob is not part of the AC PSW AC
circuit board. When you replace the AC circuit 6
board, you should remove the power switch
knob from the AC circuit board, and install in
the new AC circuit board. (Photo.6)
9. AC Inlet Assembly 9. AC Ass'y 5

9-2. Remove the AC shield plate. (See procedure 6.) 9-3. AC Ass'y
9-3. Remove the cord holder fastened the AC inlet 8
assembly and the ferrite core.(Photo.8) 9-4. [165] 2 [175] 1 AC
9-4. Remove the two (2) screws marked [165] and the Ass'y 7, 8
screw marked [175]. The AC inlet assembly can then
be removed. (Photo.7, 8)
Ferrite core Cord holder (underneath the ferrite core)

AC
Locking card spacer

[145]

Power switch knob

PSW
[145]: Bind Head Tapping Screw-B ( B )
3.0X6 MFZN2BL (EP600230) Photo.6 (6)
Photo.5 (5) Ferrite core

Cord holder AC inlet assembly
[175] ACAss'y
[165]
[165]: Bind Head Tapping Screw-B ( B ) [175]: Bind Head Tapping Screw-S ( S )
3.0X8 MFZN2BL (EP600190) 4.0X8 MFZN2BL (VI693100)
Photo.7 (7) Photo.8 (8)

26
01V96
Control Panel Assembly Section Ass'y

When removing the circuit board, if it is hard to handle Ass'y45
while the control panel assembly is fixed slantwise 180
at the stay, open it widely at 180 for the work.
10. ADA Circuit Board 10. ADA 6

10-1. Fasten the control panel assembly. (See procedure 1.) 10-2. [300]3[310]13
[320]3
10-2. Remove the three (3) screws marked [300], the ADA 3 10
thirteen (13) screws marked [310] and the three (3)
screws marked [320]. The ADA circuit board can then
be removed. (Fig.3, Photo.10)
11. HA Circuit Board 11. HA 15

(Time required: About 15 minutes) 11-1. [280]
11-1. Remove the twenty-nine (29) hexagonal nuts marked 29 11
[280] from the control panel side. (Photo.11) 11-2. Ass'y 1
11-2. Fasten the control panel assembly. (See procedure 1.) 11-3. ADA 10
11-3. Remove the ADA circuit board. (See procedure 10.) 11-4. [260] 5 [270] 25 HA
11-4. Remove the five (5) screws marked [260] and the 11, 12
twenty-five (25) screws marked [270]. The HA circuit 11-5. HA 18 9
board can then be removed. (Photo.11, 12) 1212
11-5. Remove the eighteen (18) knobs from the HA circuit HA 8
board. (Photo.9)
When you replace the twelve (12) cannon 13, 14
connectors and the twelve (12) phone jacks,
remove the phone cannon shield soldered to
the HA circuit board by eight (8) places.
(Photo.13, 14)
<Top view> <Bottom view>

Push button
ADA
Knob

Knob [300]
Photo.9 (9)
Photo.10 (10)
[320] [310] [320]

<Rear view> [310]
3.0X8 MFZN2BL (EP600190)
[310]: Bonding Tapping Screw-B ( B )
3.0X8 MFZN2BL (VN413300)
[320]: Bonding Screw ()
3.0X8 MFZN2BL (VP157800)
Fig. 3 (3)
27
01V96
12. FD Circuit Board 12. FD 5

(Time required: About 5 minutes) 12-1. 17
12-1. Remove the seventeen (17) fader knobs from the 15
control panel side. (Photo.15) 12-2. Ass'y 1
12-2. Fasten the control panel assembly. (See procedure 1.) 12-3. [210] 10 FD
12-3. Remove the ten (10) screws marked [210]. The FD 16
circuit board can then be removed with the insulation 12-4. 4 FD
sheet. (Photo.16) 16
12-4. Remove the four (4) cord holders. The insulation FD
sheet can then be removed from the FD circuit board.
(Photo.16) FD
The insulation sheet is fastened to the FD
circuit board by the cord holders.
When you replace the FD circuit board, be sure
to attach the insulation sheet as before.
<Top view> <Bottom view>

[270] [270] [270] [270] [270] [270] [280] x 28
[270]
[280]
ADA
HA
[260]

[270]: Bonding Tapping Screw-B ( B ) 3.0X8 MFZN2BL (EP600190)
3.0X8 MFZN2BL (VN413300)
[280]: Hexagonal Nut () Photo.12 (12)
9 12X2 MFNI3 (VP034300)
Photo.11 (11)
<Bottom view> <Top view>
HA
Phone jack x 12
HA
Cannon connector x 12 Phone cannon shield

Soldering
Photo.13 (13) Photo.14 (14)
28
01V96
<Bottom view>
<Top view> Insulation sheet
FD
[210]
Fader knob Cord holder

Cord holder [210]

Photo.15 (15) [210]: Bind Head Tapping Screw-B ( B )

3.0X8 MFZN2BL (EP600190)
Photo.16 (16)
13. LCD Circuit Board and LCD

13. LCD
(Time required: About 20 minutes)
20
13-1. Fasten the control panel assembly. (See procedure 1.)
13-1. Ass'y 1
13-2. Remove the ADA circuit board. (See procedure 10.)
13-2. ADA 10
13-3. Remove the HA circuit board. (See procedure 11.)
13-3. HA 11
13-4. Remove the six (6) screws marked [190A]. The HA-
13-4. [190A] 6 HA-ADA PN1
ADA angle, PN1 shield plate 1 and 2 can then be
12 17
removed. (Photo.17)
13-5. [80] 5 LCD
13-5. Remove the five (5) screws marked [80]. The LCD
18
circuit board can then be removed. (Photo.18)
13-6. [100]2[190B]2LCD
13-6. Remove the two (2) screws marked [100] and the
19
two (2) screws marked [190B]. The LCD shield plate
13-7. [60] 4
can then be removed. (Photo.19)
20
13-7. Remove the four (4) screws marked [60]. The LCD
can then be removed. (Photo.20)
<Bottom view> <Bottom view>
LCD LCD
[190A]
[190A]
[190A]
PN1 shield plate 2 HA-ADA angle
PN1 shield plate 1 HA-ADA
PN12 [80]
PN11
[190A]: Bind Head Tapping Screw-B ( B ) [80]: Bind Head Tapping Screw-B ( B )
3.0X8 MFZN2BL (EP600190) 3.0X8 MFZN2BL (EP600190)
Photo.17 (17) Photo.18 (18)
29
01V96
<Bottom view> <Bottom view>

LCD shield plate LCD
LCD
[190B] [60]
[100] [60]
[100]: Bind Head Tapping Screw-B ( B ) [60]: Bind Head Tapping Screw-B ( B )
3.0X8 MFZN2BL (EP600190) 3.0X8 MFZN2BL (EP600190)
[190B]: Bind Head Tapping Screw-B ( B )
Photo.20 (20)
3.0X8 MFZN2BL (EP600190)
Photo.19 (19)
14. PN1 (1/2) and PN1 (2/2) Circuit Boards 14. PN1 (1/2)PN1 (2/2)
(Time required: About 17 minutes each) 17
14-1. Remove the encoder knob marked [450A] and the 14-1. [450A]
three (3) encoder knobs marked [460] from the 1 [460] 3
control panel side. (Photo.21) 21
14-2. Fasten the control panel assembly. (See procedure 1.) 14-2. Ass'y 1
14-3. Remove the ADA circuit board. (See procedure 10.) 14-3. ADA 10
14-4. Remove the HA circuit board. (See procedure 11.) 14-4. HA 11
14-5. Remove the FD circuit board. (See procedure 12.) 14-5. FD 12
14-6. Remove the LCD shield plate. (See procedure 13-6.) 14-6. LCD 13-6
14-7. PN1 (1/2) Circuit Board: 14-7. PN1 (1/2):
Remove the seven (7) screws marked [190C]. The [190C] 7 PN1 (1/2)
PN1 (1/2) circuit board can then be removed. 22
(Photo.22) 14-8. PN1 (2/2):
14-8. PN1 (2/2) Circuit Board: [190D]3
Remove the three (3) screws marked [190D]. The PN1 (2/2)
PN1 (2/2) circuit board can then be removed with 22
the encoder knob and the encoder angle bracket.
(Photo.22) PN1 (2/2)
Remove the encoder knob and the hexagonal nut. 23
The encoder angle bracket can then be removed
from the PN1 (2/2) circuit board. (Photo.23)
15. PN2 Circuit Boards 15. PN2 4

(Time required: About 4 minutes) 15-1. [450B]
15-1. Remove the two (2) encoder knobs marked [450B] 2 21
from the control panel side. (Photo.21) 15-2. Ass'y 1
15-2. Fasten the control panel assembly. (See procedure 1.) 15-3. [190E]4PN2
15-3. Remove the four (4) screws marked [190E]. The PN2 24
circuit board can then be removed. (Photo.24)
30
01V96
<Top view>
[450A]: Encoder knob

[460]: Encoder knob

[450B]: Encoder knob

Photo.21 (21)
<Bottom view>
Hexagonal nut
PN2
[190C]
PN1 (1/2)
Encoder angle bracket

[190D]
[190C] PN1 (2/2)

[190D]
Encoder knob
Photo.23 (23)
3.0X8 MFZN2BL (EP600190)
Photo.22 (22)
<Bottom view> [190E]
PN2
[190E]: Bind Head Tapping Screw-B ( B )
3.0X8 MFZN2BL (EP600190)
Photo.24 (24)
[190E]
31
01V96
INSTALLING AN OPTIONAL CARD
Follow the steps below to install an optional mini-YGDAI miniYGDAI

card.
1 Make sure that the power to the 01V96 is turned off. 1 01V96
2 Undo the two fixing screws and remove the slot 2
cover, as shown below.
Keep the cover and fixing screws in a safe place for
future use.
3 Insert the card between the guide rails and slide it 3

all the way into the slot, as shown below.
You may have to push firmly to fully insert the card into
the internal connector.

4 Secure the card using the attached thumbscrews. 4

Tighten the screws firmly to secure the card. Otherwise,
the card may not be grounded cor-rectly.
32
01V96
LSI PIN DESCRIPTIONLSI
M37641M8-141FP (X2485200) CPU (USB 32K) .......................................................................... 33

HD6417709SF133 (X2081A00) CPU (SH-3) ................................................................................. 34
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) ........................................................... 35
YSS919B-H (XZ693B00) DSP7 (Digital Signal Processor) ......................................................... 36
SGH603064F-62F (XV973A00) Gate Array .................................................................................. 37
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver) ........................................... 37
MBCG61594-130 (X3299A00) ATSC2A ....................................................................................... 38
CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver) ............................................. 39
S1D13704F00A100 (X3498A00) LCDC (LCD Controller) ............................................................ 39
CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter) ........................................ 40
AK4393-VF-E2 (XW029A00) DAC (Digital to Analog Converter) .............................................. 40
CS5361-KS (X3447A00) ADC (Analog to Digital Converter) ..................................................... 40
M37641M8-141FP (X2485200) CPU (USB 32K) ADA: IC002

PIN PIN
NAME I/O FUNCTION NAME I/O FUNCTION
NO. NO.
1 P61/DQ1 I/O 41 P17/AB15 I/O

Port 6
2 P60/DQ0 I/O 42 P16/AB14 I/O
3 P57//W/(R//W) I/O 43 P15/AB13 I/O
4 P56//R(E) I/O 44 P14/AB12 I/O
Port 1
5 P55/A0 I/O 45 P13/AB11 I/O
Port 5
6 P54//S0 I/O 46 P12/AB10 I/O
7 P53//IBF0 I/O 47 P11/AB9 I/O
8 P52/OBF0 I/O 48 P10/AB8 I/O
9 CNVSS/VPP I Chip operation mode 49 P07/AB7 I/O
10 /RESET I Reset input 50 P06/AB6 I/O
11 P51/TOUT/XCOUT I/O 51 P05/AB5 I/O
Port 5
12 P50/XCIN I/O 52 P04/AB4 I/O
Port 0
13 VSS Ground 53 P03/AB3 I/O
14 XIN I Quartz crystal input 54 P02/AB2 I/O
15 XOUT O Quartz crystal output 55 P01/AB1 I/O
16 VCC Power supply +5V 56 P00/AB0 I/O
17 AVCC Analog power supply +5V 57 P27/DB7 I/O
18 LPF O Loop filter for synthesizer 58 P26/DB6 I/O
19 AVSS Analog ground 59 P25/DB5 I/O
20 P44/CNTR1 I/O 60 P24/DB4 I/O
Port 2
21 P43/CNTR0 I/O 61 P23/DB3 I/O
22 P42/INT1 I/O Port 4 62 P22/DB2 I/O
23 P41/INT0 I/O 63 P21/DB1 I/O
24 P40//EDMA I/O 64 P20/DB0 I/O
25 P87//RTS1 I/O 65 P74/OBF1 I/O
26 P86//CTS1 I/O 66 P73//IBF1//HLDA I/O
27 P85/URXD1 I/O 67 P72//S1 I/O Port 7
28 P84/UTXD1 I/O 68 P71//HOLD I/O
Port 8
29 P83//RTS2/STXD I/O 69 P70//SOF I/O
30 P82//CTS2/SRXD I/O 70 USB D+ I/O USB +voltage line interface
31 P81/URXD2/SCLK I/O 71 USB D- I/O USB -voltage line interface
32 P80/UTXD2//SRDY I/O 72 Ext. Cap I/O Power supply +3.3V
33 P37//RD I/O 73 VSS Ground
34 P36//WR I/O 74 VCC Power supply +5V
35 P35/SYNCOUT I/O 75 P67/DQ7 I/O
36 P34/OUT I/O 76 P66/DQ6 I/O
Port 3
37 P33/DMAOUT I/O 77 P65/DQ5 I/O
Port 6
38 P32 I/O 78 P64/DQ4 I/O
39 P31 I/O 79 P63/DQ3 I/O
40 P30/RDY I/O 80 P62/DQ2 I/O
33
01V96
HD6417709SF133 (X2081A00) CPU (SH3) MAIN: IC001

PIN PIN
NO. NO.
1 MD1 I 105 CKE/PTK5 I/O CK enable / Port K
Mode control
2 MD2 I 106 RAS3L/PTJ0 I/O RAS address bus / Port J
3 Vcc(RTC) - Power supply +1.8 V 107 PTJ1 I/O Port J
4 XTAL2 O 108 CASL/PTJ2 I/O CAS address bus / Port J
Crystal oscillator
5 EXTAL2 I 109 VssQ - Ground
6 Vss(RTC) - Ground 110 CASU/PTJ3 I/O CAS address bus / Port J
7 NMI I Non-maskable interrupt request 111 VccQ - Power supply +3.3 V
8 IRQ0/IRL0/PTH0 I 112 PTJ4 I/O Port J
9 IRQ1/IRL1/PTH1 I 113 PTJ5 I/O
10 IRQ2/IRL2/PTH2 I Interrupt request / Port H 114 DACK0/PTD5 I/O DMA acknowledge / Port D
11 IRQ3/IRL3/PTH3 I 115 DACK1/PTD7 I/O
12 IRQ4/PTH4 I 116 PTE6 I/O Port E
13 D31/PTB7 I/O 117 PTE3 I/O
14 D30/PTB6 I/O 118 RAS3U/PTE2 I/O RAS address bus / Port E
15 D29/PTB5 I/O 119 PTE1 I/O Port E
Data bus / Port B
16 D28/PTB4 I/O 120 TDO/PTE0 I/O Test data / Port E
17 D27/PTB3 I/O 121 BACK O Bus acknowledge
18 D26/PTB2 I/O 122 BREQ I Bus request
19 VssQ - Ground 123 WAIT I Hardware wait request
20 D25/PTB1 I/O Data bus / Port B 124 RESETM I Manual reset
21 VccQ - Power supply +3.3 V 125 ADTRG/PTH5 I Analog trigger / Port H
22 D24/PTB0 I/O Data bus / Port B 126 IOIS16/PTG7 I Write protect / Port G
23 D23/PTA7 I/O 127 ASEMD0/PTG6 I ASE mode / Port G
24 D22/PTA6 I/O 128 ASEBRKAK/PTG5 I/O ASE break acknowledge / Port G
Data bus / Port A
25 D21/PTA5 I/O 129 PTG4/CKIO2 I/O Port G / Clock output
26 D20/PTA4 I/O 130 AUDATA3/PTG3 I/O AUD data / Port G
27 Vss - Ground 131 AUDATA2/PTG2 I/O
28 D19/PTA3 I/O Data bus / Port A 132 Vss - Ground
29 Vcc - Power supply +1.8 V 133 AUDATA1/PTG1 I/O AUD data / Port G
30 D18/PTA2 I/O 134 Vcc - Power supply +1.8 V
31 D17/PTA1 I/O Data bus / Port A 135 AUDATA0/PTG0 I/O AUD data / Port G
32 D16/PTA0 I/O 136 TRST/PTF7/PINT15 I Test reset / Port F / Port interruption
33 VssQ - Ground 137 TMS/PTF6/PINT14 I Test mode switch / Port F / Port interruption
34 D15 I/O Data bus 138 TDI/PTF5/PINT13 I Test data / Port F / Port interruption
35 VccQ - Power supply +3.3 V 139 TCK/PTF4/PINT12 I Test clock / Port F / Port interruption
36 D14 I/O 140 IRLS3/PTF3/PINT11 I
37 D13 I/O 141 IRL2/PTF2/PINT10 I Interrupt request / Port F / Port interruption
40 D10 I/O Data bus 144 MD0 I Mode control
41 D9 I/O 145 Vcc(PLL1) - Power supply +1.8 V
42 D8 I/O 146 CAP1 - Capacitor
43 D7 I/O 147 Vss(PLL1) - Ground
44 D6 I/O 148 Vss(PLL2) - Ground
45 VssQ - Ground 149 CAP2 - Capacitor
46 D5 I/O Data bus 150 VCC(PLL2) - Power supply +1.8 V
47 VccQ - Power supply +3.3 V 151 AUDCK/PTH6 I AUD clock / Port H
48 D4 I/O 152 Vss - Ground
49 D3 I/O 153 Vss -
50 D2 I/O Data bus 154 Vcc - Power supply +1.8 V
51 D1 I/O 155 XTAL1 O Crystal oscillator
52 D0 I/O 156 EXTAL1 I
53 A0 O 157 STATUS0/PTJ6 I/O Processor status / Port J
54 A1 O 158 STATUS1/PTJ7 I/O
Address bus
55 A2 O 159 TCLK/PTH7 I/O Timer clock / Port H
56 A3 O 160 /IRQOUT O Interrupt request output
57 VssQ - Ground 161 VssQ - Ground
58 A4 O Address bus 162 CKIO I/O System clock input / output
59 VccQ - Power supply +3.3 V 163 VccQ - Power supply +3.3 V
60 A5 O 164 TXD0/SCPT0 O Data transmission / SCI port
61 A6 O 165 SCK0/SCPT1 I/O Serial clock / SCI port
62 A7 O 166 TXD1/SCPT2 O Data transmission / SCI port
64 A9 O Address bus 168 TXD2/SCPT4 O Data transmission / SCI port
66 A11 O 170 RTS2/SCPT6 I/O Transmit request / SCI port
67 A12 O 171 RXD0/SCPT0 I Data reception / SCI port
68 A13 O 172 RXD1/SCPT2 I
69 VssQ - Ground 173 Vss - Ground
70 A14 O Address bus 174 RXD2/SCPT4 I Data reception / SCI port
71 VccQ - Power supply +3.3 V 175 Vcc - Power supply +1.8 V
72 A15 O 176 CTS2/IRQ5/SCPT7 I Transmit clear / Interrupt request / SCI port
73 A16 O 177 MCS7/PTC7/PINT7 I/O
74 A17 O 178 MCS6/PTC6/PINT6 I/O Mask ROM chip select / Port C / Port interruption
75 A18 O Address bus 179 MCS5/PTC5/PINT5 I/O
76 A19 O 180 MCS4/PTC4/PINT4 I/O
77 A20 O 181 VssQ - Ground
78 A21 O 182 WAKEUP/PTD3 I/O Standby mode Interrupt request output / Port D
79 Vss - Ground 183 VccQ - Power supply +3.3 V
80 A22 O Address bus 184 RESETOUT/PTD2 I/O Reset output / Port D
81 Vcc - Power supply +1.8 V 185 MCS3/PTC3/PINT3 I/O
82 A23 O Address bus 186 MCS2/PTC2/PINT2 I/O Mask ROM chip select / Port C / Port interruption
83 VssQ - Ground 187 MCS1/PTC1/PINT1 I/O
84 A24 O Address bus 188 MCS0/PTC0/PINT0 I/O
85 VccQ - Power supply +3.3 V 189 DRAK0/PTD1 I/O DMA acknowledge / Port D
86 A25 O Address bus 190 DRAK1/PTD0 I/O
87 BS/PTK4 I/O Bus cycle / Port K 191 DREQ0/PTD4 I DMA request / Port D
88 RD O Read strobe 192 DREQ1/PTD6 I
89 WE0/DQMLL O Select signal (D7-D0) / D QM (SDRAM) 193 RESETP I Power on reset
90 WE1/DQMLU/WE O Select signal (D15-D8) / D QM (SDRAM) / Write enable 194 CA I Chip active
91 WE2/DQMUL/ICIORD/PTK6 I/O Select signal (D23-D16) / D QM (SDRAM) / I/O read / Port K 195 MD3 I
92 WE3/DQMUU/ISIOWR/PTK7 I/O Select signal (D31-D24) / D QM (SDRAM) / I/O write / Port K 196 MD4 I Mode control
93 RD/WR O Read / Write 197 MD5 I
94 AUDSYNC/PTE7 I/O AUD cycle / Port E 198 AVss - Analog ground
95 VssQ - Ground 199 AN0/PTL0 I
96 CS0/MCS0 O Chip select / Mask ROM chip select 200 AN1/PTL1 I
97 VccQ - Power supply +3.3V 201 AN2/PTL2 I Analog input / Port L
98 CS2/PTK0 I/O 202 AN3/PTL3 I
99 CS3/PTK1 I/O Chip select / Port K 203 AN4/PTL4 I
100 CS4/PTK2 I/O 204 AN5/PTL5 I
101 CS5/CE1A/PTK3 I/O Chip select / Chip enable / Port K 205 AVcc - Analog power supply +3.3 V
102 CS6/CE1B O Chip select / Chip enable 206 AN6/DA1/PTL6 I/O Analog input / Analog output / Port L
103 CE2A/PTE4 I/O 207 AN7/DA0/PTL7 I/O
CE2B/PTE5 I/O Chip enable / Port E AVss - Analog ground
104 208
34
01V96
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) MAIN: IC301, 302

PIN PIN
NO. NO.
1 Vdd Power supply (3.3 V) 89 Vss Ground
2 Vss Ground 90 DB13 I/O
3 XI I System master clock input (60 MHz or 30 MHz) 91 DB14 I/O
4 XO O System master clock output (High or 30 MHz) 92 DB15 I/O
5 Vdd5 Power supply (5 V) 93 DB16 I/O
6 /SYNCI I Sync. signal input 94 DB17 I/O
Parallel data bus
7 /SYNCO O Sync. signal output 95 DB18 I/O
9 CKI I System clock input (30 MHz) 97 DB20 I/O
10 CKO O System clock output (30 MHz) 98 DB21 I/O
11 CKSEL I System master clock select (0: 60 MHz, 1: 30 MHz) 99 DB22 I/O
12 Vss Ground 100 Vss Ground
13 MCKS I Serial I/O master clock input (128 x Fs) 101 Vdd Power supply (3.3 V)
14 /SSYNC I Serial I/O Sync. signal output 102 DB23 I/O
15 /IC I Initial clear (RESET) 103 DB24 I/O
16 /TEST I Test mode setting (0: Test, 1: Normal) 104 DB25 I/O
17 BTYP I Data bus type select (0: 8 bit, 1: 16 bit) 105 DB26 I/O
18 /IRQ O IRQ output 106 DB27 I/O Parallel data bus
19 TRIG I/O Trigger signal input/output 107 DB28 I/O
21 Vss Ground 109 DB30 I/O
22 /CS I chip select signal input 110 DB31 I/O
23 /WR I Write signal input 111 TIMO/DBOB I/O Timing signal output/ Parallel data bus output/ input
24 /RD I Read signal input 112 Vss Ground
25 CA7 I/O 113 Vdd5 Power supply (5 V)
26 CA6 I/O 114 DA00 I/O
27 CA5 I/O 115 DA01 I/O
28 CA4 I/O Address bus of internal register 116 DA02 I/O
29 CA3 I/O 117 DA03 I/O
Memory data bus
30 CA2 I/O 118 DA04 I/O
31 CA1 I/O 119 DA05 I/O
32 Vss Ground 120 DA06 I/O
33 Vdd Power supply (3.3 V) 121 DA07 I/O
34 CD15 I/O 122 Vss Ground
35 CD14 I/O 123 DA08 I/O
36 CD13 I/O 124 DA09 I/O
37 CD12 I/O 125 DA10 I/O
38 CD11 I/O 126 DA11 I/O
Data bus of internal register Memory data bus
39 CD10 I/O 127 DA12 I/O
40 CD09 I/O 128 DA13 I/O
41 CD08 I/O 129 DA14 I/O
42 CD07 I/O 130 DA15 I/O
44 Vss Ground 132 Vdd Power supply (3.3 V)
45 Vdd Power supply (3.3 V) 133 (n.c) Not used
46 Vdd5 Power supply (5 V) 134 Vdd5 Power supply (5 V)
47 CD05 I/O 135 DA16 I/O
48 CD04 I/O 136 DA17 I/O
49 CD03 I/O 137 DA18 I/O
Data bus of internal register
50 CD02 I/O 138 DA19 I/O
Memory data bus
51 CD01 I/O 139 DA20 I/O
52 CD00 I/O 140 DA21 I/O
53 /WAIT O WAIT output 141 DA22 I/O
55 SI0 I 143 Vss Ground
56 SI1 I 144 DA24 I/O
57 SI2 I 145 DA25 I/O
58 SI3 I 146 DA26 I/O
Serial data input
59 SI4 I 147 DA27 I/O
Memory data bus
60 SI5 I 148 DA28 I/O
61 SI6 I 149 DA29 I/O
62 SI7 I 150 DA30 I/O
64 Vdd5 Power supply (5 V) 152 Vdd5 Power supply (5 V)
65 SO0 O 153 Vss Ground
66 SO1 O 154 A00 O
67 SO2 O 155 A01 O
68 SO3 O 156 A02 O
Serial data output
69 SO4 O 157 A03 O
70 SO5 O 158 A04 O
Memory address (SRAM, PSRAM, DRAM)
71 SO6 O 159 A05 O
72 SO7 O 160 A06 O
73 Vss Ground 161 A07 O
74 DB00 I/O 162 A08 O
75 DB01 I/O 163 A09 O
76 DB02 I/O 164 Vss Ground
77 DB03 I/O 165 Vdd Power supply (3.3 V)
78 DB04 I/O 166 A10 O
Memory address (SRAM, PSRAM, DRAM)
79 DB05 I/O 167 A11 O
80 DB06 I/O Parallel data bus 168 A12 O
81 DB07 I/O 169 A13 O Memory address (SRAM, PSRAM)
82 DB08 I/O 170 A14 O
83 DB09 I/O 171 A15/RAS O Memory address (SRAM, PSRAM), /RAS (DRAM)
84 DB10 I/O 172 A16/CAS O Memory address (SRAM, PSRAM), /CAS (DRAM)
85 DB11 I/O 173 A17/CE O Memory address (SRAM), /CE (PSRAM)
86 DB12 I/O 174 /WE O Memory write enable signal
87 Vdd5 Power supply (5 V) 175 /OE O Memory output enable signal
88 Vdd Power supply (3.3 V) 176 Vdd5 Power supply (5 V)
35
01V96
YSS919B-H (XZ693A00) DSP7 (Digital Signal Processor) MAIN: IC201-204

PIN PIN
NO. NO.
1 PLLEN I PLL enable input (0: PLL unuse, 1: PLL use) 105 SIO32 I/O
2 /TEST I Test mode setting (0: TEST, 1: Normal) 106 SIO33 I/O
3 AVss Analog ground 107 SIO34 I/O
4 CPO PLL filter 108 SIO35 I/O
Serial data bus
5 AVdd Power supply (2.5 V) 109 SIO36 I/O
6 Vss Ground 110 SIO37 I/O
7 Vdd Power supply (3.3 V) 111 SIO38 I/O
8 /IC I Initial clear 112 SIO39 I/O
9 /MUTE I Mute control (0: SIO mute, 1: SIO normal in-out) 113 Vdd Power supply (2.5 V)
10 /SSYNC I Serial I/O Sync. signal input 114 Vss Ground
11 MCKS I Serial I/O master clock input (128 x Fs) 115 SIO40 I/O
12 XI I System master clock input (60 MHz or 15 MHz) 116 SIO41 I/O
13 BTYP I Data bus type select (0: 16 bits, 1: 32 bits) 117 SIO42 I/O
14 /CS I Chip select 118 SIO43 I/O
Serial data bus
15 /WR I Write enable input 119 SIO44 I/O
16 /RD I Read enable input 120 SIO45 I/O
17 CA7 I 121 SIO46 I/O
18 CA6 I 122 SIO47 I/O
19 CA5 I 123 Vss Ground
20 CA4 I CPU address bus 124 Vdd Power supply (3.3 V)
21 CA3 I 125 SIO48 I/O
22 CA2 I 126 SIO49 I/O
Serial data bus
25 CD31/CA1 I/O CPU data bus / CPU address bus 129 SIO52 I/O
26 CD30 I/O 130 SIO53 I/O
27 CD29 I/O 131 SIO54 I/O
28 CD28 I/O 132 SIO55 I/O
29 CD27 I/O CPU data bus 133 Vss Ground
30 CD26 I/O 134 SIO56 I/O
31 CD25 I/O 135 SIO57 I/O
32 CD24 I/O 136 SIO58 I/O
Serial data bus
35 CD23 I/O 139 SIO61 I/O
36 CD22 I/O 140 SIO62 I/O
37 CD21 I/O 141 SIO63 I/O
38 CD20 I/O 142 Vdd Power supply (2.5 V)
CPU data bus
41 CD17 I/O 145 DA00 I/O
42 CD16 I/O 146 DA01 I/O
45 149 Memory data bus
CD15 I/O DA04 I/O
46 CD14 I/O 150 DA05 I/O
47 CD13 I/O 151 DA06 I/O
48 CD12 I/O 152 DA07 I/O
CPU data bus
50 CD10 I/O 154 DA08 I/O
51 CD09 I/O 155 DA09 I/O
52 CD08 I/O 156 DA10 I/O
CD07 I/O DA12 I/O
55 CD06 I/O 159 DA13 I/O
56 CD05 I/O 160 DA14 I/O
57 CD04 I/O 161 DA15 I/O
CPU data bus
60 CD01 I/O 164 DA16 I/O
61 CD00 I/O 165 DA17 I/O
62 /WAIT O Wait output 166 DA18 I/O
Vss Ground DA20 I/O
66 SIO00 I/O 170 DA22 I/O
67 SIO01 I/O 171 DA23 I/O
68 SIO02 I/O 172 Vdd Power supply (2.5 V)
69 SIO03 I/O 173 Vss Ground
Serial data bus
70 SIO04 I/O 174 DA24 I/O
71 SIO05 I/O 175 DA25 I/O
72 SIO06 I/O 176 DA26 I/O
73 SIO07 I/O 177 DA27 I/O
Vss Ground DA28 I/O
75 SIO08 I/O 179 DA29 I/O
76 SIO09 I/O 180 DA30 I/O
77 SIO10 I/O 181 DA31 I/O
Serial data bus
80 SIO13 I/O 184 /WE O Memory write enable signal
81 SIO14 I/O 185 /CAS O Column address strobe
82 SIO15 I/O 186 SDCK O Clock (SDRAM)
83 Vss Ground 187 CKE O CKE (SDRAM)
84 Vdd Power supply (3.3 V) 188 /RAS O Row address strobe
87 SIO18 I/O 191 BA1 O
88 SIO19 192 O Bank select (SDRAM)
I/O BA0
Serial data bus
89 SIO20 I/O 193 A12 O
90 SIO21 I/O 194 A11 O
91 SIO22 I/O 195 A10 O Memory address (SDRAM, DRAM)
92 SIO23 I/O 196 A09 O
93 Vdd Power supply (2.5 V) 197 A08 O
94 Vss Ground 198 Vss Ground
96 SIO25 I/O 200 A07 O
97 SIO26 I/O 201 A06 O
98 SIO27 I/O 202 A05 O
Serial data bus
99 SIO28 I/O 203 A04 O
100 SIO29 204 Memory address (SDRAM, DRAM)
I/O A03 O
101 SIO30 I/O 205 A02 O
102 SIO31 I/O 206 A01 O
103 Vss Ground 207 A00 O
104 Vdd Power supply (3.3 V) 208 Vss Ground
36
01V96
SGH603064F-62F (XV973A00) Gate Array MAIN: IC712

PIN PIN
NO. NO.
1 RA1 I 33 D0 O Data bus
2 RB1 I 34 D1 O
Encoder input
3 RA2 I 35 VSS Ground
4 RB2 I 36 D2 O Data bus
5 VSS Ground 37 D3 O
6 RA3 I 38 VSS Ground
7 RB3 I 39 D4 O
Encoder input Data bus
8 RA4 I 40 D5 O
9 RB4 I 41 VSS Ground
10 VSS Ground 42 D6 O Data bus
11 RA5 I 43 D7 O
12 RB5 I Encoder input 44 VSS Ground
13 RA6 I 45 NC Not used
14 RB6 I 46 NC
15 VSS Ground 47 RA9 I
16 RA7 I 48 RB9 I
17 RB7 I 49 RA10 I
Encoder input
18 RA8 I 50 RB10 I
19 RB8 I 51 RA11 I
20 A0 I 52 RB11 I Encoder input
21 A1 I Address bus 53 RA12 I
22 A2 I 54 RB12 I
23 VSS Ground 55 RA13 I
24 RDN I Read 56 RB13 I
25 CSN I Chip select 57 RA14 I
26 VDD Power supply +5V 58 VDD Power supply +5V
27 ASN I Address strobe 59 RB14 I
28 A3N I Address bus 60 RA15 I
29 SEL I Bus select 61 RB15 I Encoder input
30 NC 62 RA16 I
31 NC Not used 63 RB16 I
32 NC 64 VSS Ground
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver) MAIN: IC144, 456
PIN PIN
NO. NO.
1 DAUX I Auxiliary input for audio data 23 RSTN I System reset input
2 HDLT O Asynchronous buffer operation flag 24 Vdda VCO section power (+5V)
3 DOUT O Audio data output 25 CTLN I VCO control input N
4 VFL O Parity flag output 26 PCO O PLL phase comparison output
5 OPT O Fs x 1 Synchronous output signal for DAC 27 (NC)
6 SYNC O Fs x 1 Synchronous output signal for DSP 28 CTLP I VCO control input P
7 MCC O Fs x 64 Bit clock output 29 Vssa VCO section power (GND)
8 WC O Fs x 1 Word clock output 30 TSTN I Test terminal. Open for normal use
9 MCB O Fs x 128 Bit clock output 31 KM2 I Clock mode switching input 2
10 MCA O Fs x 256 Bit clock output 32 KM0 I Clock mode switching input 0
11 SKSY I Clock synchronization control input 33 FS1 O Channel status sampling frequency
display output 1
12 XI I Crystal oscillator connection or external 34 FS0 O Channel status sampling frequency
clock input display output 0
13 XO O Crystal oscillator connection 35 CSM I Channel status output method selection
14 P256 O VCO oscillating clock connection 36 EXTW I External synchronous auxiliary input
word clock
15 LOCK O PLL lock flag 37 DDIN I EIAJ (AES/EBU) data input
16 Vss Logic section power (GND) 38 LR O PLL word clock output
17 TC O PLL time constant switching output 39 Vdd Logic section power (+5 V)
18 DIM1 I Data input mode selection 40 ERR O Data error flag output
19 DIM0 I Data input mode selection 41 EMP O Channel status emphasis control code
output
20 DOM1 I Data output mode selection 42 CD0 O 3-wire type microcomputer interface data
output
21 DOM0 I Data output mode selection 43 CCK I 3-wire type microcomputer interface clock
input
22 KM1 I Clock mode switching input 1 44 CLD I 3-wire type microcomputer interface load
input
37
01V96
MBCG61594-130 (X3299A00) ATSC2A MAIN: IC401, 457

PIN PIN
NO. NO.
1 VDD Power supply +3.3V 73 VDD Power supply +3.3V
2 XTST I LSI test pin 74 PB_H_M4_SEL I Port B audio data input buffer active select
3 VSS Ground 75 PB_O_MUTE I Port B mute
4 WT_X I CPU interface write input 76 VSS Ground
5 RD_X I CPU interface read input 77 PB_SO0_ATO O
6 CS_X I CPU interface chip select input 78 PB_SO1 O
Port B audio data output
7 HS_SEL I Chip active select 79 PB_SO2 O
8 RES_X I System reset input 80 PB_SO3 O
9 VSS Ground 81 VSS Ground
10 ADD[0] I 82 PB_O_H_MODE[0] I
11 ADD[1] I 83 PB_O_H_MODE[1] I Port B audio data output mode select
12 ADD[2] I 84 PB_O_H_MODE[2] I
13 ADD[3] I 85 PC_I_H_MODE[0] I
CPU interface address bus
14 ADD[4] I 86 PC_I_H_MODE[1] I Port C audio data input mode select
15 ADD[5] I 87 PC_I_H_MODE[2] I
16 ADD[6] I 88 PC_H_M4_SEL I Port C audio data input buffer active select
17 ADD[7] I 89 PC_SI0_ATI I Port C audio data input
20 DAT[0] I/O 92 PC_SI1 I
21 DAT[1] I/O 93 PC_SI2 I Port C audio data input
CPU interface data bus
22 DAT[2] I/O 94 PC_SI3 I
23 DAT[3] I/O 95 PC_I_SW_SEL I Port C audio data input sync/wc select
24 VDD Power supply +3.3V 96 PC_SYNC_WC_SI I Port C audio data input sync/wc input
25 VSS Ground 97 PC_FS256_SI I Port C audio data input bit clock input (256fs)
26 DAT[4] I/O 98 VSS Ground
27 DAT[5] I/O 99 PC_FS256_SO I Port C audio data output bit clock input (256fs)
CPU interface data bus
28 DAT[6] I/O 100 PC_SYNC_WC_SO I Port C audio data output sync/wc input
29 DAT[7] I/O 101 PC_O_SW_SEL I Port C audio data output sync/wc select
31 VDD Power supply +3.3V 103 PC_SO0 O
32 PA_I_H_MODE[0] I 104 PC_SO1 O
Port C audio data output
33 PA_I_H_MODE[1] I Port A audio data input mode select 105 PC_SO2 O
34 PA_I_H_MODE[2] I 106 PC_SO3 O
35 PA_O_H_MODE[0] I 107 VSS Ground
36 PA_O_H_MODE[1] I Port A audio data output mode select 108 PC_O_MUTE I Port C mute
37 PA_O_H_MODE[2] I 109 PC_O_H_MODE[0] I
38 PA_SI0_ATI I 110 PC_O_H_MODE[1] I Port C audio data output mode select
39 PA_SI1 I Port A audio data input 111 PC_O_H_MODE[2] I
40 PA_SI2 I 112 PC_CLK_ATI I Port C ADAT clock input
41 PA_SI3 I 113 VSS Ground
42 PA_I_SW_SEL I Port A audio data input sync/wc select 114 PD_I_H_MODE[0] I
43 PA_SYNC_WC_SI I Port A audio data input sync/wc input 115 PD_I_H_MODE[1] I Port D audio data input mode select
44 PA_FS256_SI I Port A audio data input bit clock input (256fs) 116 PD_I_H_MODE[2] I
46 PA_FS256_SO I Port A audio data output bit clock input (256fs) 118 PD_H_M4_SEL I Port D audio data input buffer active select
47 PA_SYNC_WC_SO I Port A audio data output sync/wc input 119 PD_SI0 I
48 PA_O_SW_SEL I Port A audio data output sync/wc select 120 PD_SI1 I Port D audio data input
49 VSS Ground 121 PD_SI2 I
50 PA_SO0 O 122 PD_SI3 I
51 PA_SO1 O 123 PD_I_SW_SEL I Port D audio data input sync/wc select
Port A audio data output
52 PA_SO2 O 124 PD_SYNC_WC_SI I Port D audio data input sync/wc input
53 PA_SO3 O 125 PD_FS256_SI I Port D audio data input bit clock input (256fs)
56 PA_CLK_ATI I Port A ADAT clock input 128 PD_FS256_SO I Port D audio data output bit clock input (256fs)
57 PA_H_M4_SEL I Port A audio data input buffer active select 129 PD_SYNC_WC_SO I Port D audio data output sync/wc input
58 PA_O_MUTE I Port A mute 130 PD_O_SW_SEL I Port D audio data output sync/wc select
59 PB_SI0 I 131 VSS Ground
60 PB_SI1 I 132 PD_SO0_ATO O
Port B audio data input
61 PB_SI2 I 133 PD_SO1 O Port D audio data output
62 PB_SI3 I 134 PD_SO2 O
63 PB_I_SW_SEL I Port B audio data input sync/wc select 135 PD_SO3 O
64 PB_SYNC_WC_SI I Port B audio data input sync/wc input 136 VSS Ground
65 PB_FS256_SI I Port B audio data input bit clock input (256fs) 137 PD_O_MUTE I Port D mute
67 PB_FS256_SO I Port B audio data output bit clock input (256fs) 139 PD_O_H_MODE[0] I
68 PB_SYNC_WC_SO I Port B audio data output sync/wc input 140 PD_O_H_MODE[1] I Port D audio data output mode select
69 PB_O_SW_SEL I Port B audio data output sync/wc select 141 PD_O_H_MODE[2] I
70 PB_I_H_MODE[0] I 142 XSM I LSI test pin
71 PB_I_H_MODE[1] I Port B audio data input mode select 143 PA_WC_ATI O Port A ADAT word clock output
72 PB_I_H_MODE[2] I 144 PC_WC_ATI O Port C ADAT word clock output
38
01V96
CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver) MAIN: IC501

PIN PIN
NO. NO.
1 CDOUT O Data out (SPI) 15 RXP4 I Additional AES3/SPDIF receiver port
2 /CS I Control port chip select (SPI) 16 OSCLK I/O Serial audio output bit clock
3 /EMPH O Pre-emphasis 17 OLRCK I/O Serial audio output left/right clock
4 RXP0 I 18 SDOUT O Serial audio output data
AES3/SPDIF receiver port
5 RXN0 I 19 INT O Interrupt
6 VA+ Positive analog power supply +5V 20 U O User data
7 AGND Analog ground 21 OMCK I System clock
8 FILT O PLL loop filter 22 DGND Digital ground
9 /RST O Reset 23 VL+ Positive logic power supply +5V
10 RMCK I/O Input section recovered master clock 24 H//S I Hardware/software mode control
11 RERR O Receiver error 25 RXP5 I Additional AES3/SPDIF receiver port
12 RXP1 I 26 RXP6 I
13 RXP2 I Additional AES3/SPDIF receiver port 27 CDIN I Serial control data in (SPI)
14 RXP3 I 28 CCLK I Control port clock
S1D13704F00A100 (X3498A00) LCDC (LCD Controller) MAIN: IC019

PIN PIN
NO. NO.
1 COREVDD Power supply +3.3V 41 COREVDD Power supply +3.3V
2 /WAIT O Wait signal 42 DRDY O TFT/D-TFD display enable
3 DB15 I/O 43 LCDPWR O LCD power control
4 DB14 I/O 44 TESTEN I Test enable input
5 DB13 I/O 45 CNF4 I
6 DB12 I/O Data bus 46 CNF3 I
7 DB11 I/O 47 CNF2 I Configure the S1D13704
8 DB10 I/O 48 CNF1 I
9 DB9 I/O 49 CNF0 I
10 IOVDD Power supply +3.3V 50 VSS Ground
11 DB8 I/O 51 CLKI I Input clock
12 DB7 I/O 52 IOVDD Power supply +3.3V
13 DB6 I/O 53 AB15 I
14 DB5 I/O 54 AB14 I
15 DB4 I/O Data bus 55 AB13 I
16 DB3 I/O 56 AB12 I Address bus
17 DB2 I/O 57 AB11 I
18 DB1 I/O 58 AB10 I
19 DB0 I/O 59 AB9 I
21 COREVDD Power supply +3.3V 61 COREVDD Power supply +3.3V
22 GPIO0 I/O General purpose input/output 62 AB8 I
23 FPDAT11 O 63 AB7 I
24 FPDAT10 O Panel data 64 AB6 I
26 FPDAT8 O 66 AB4 I Address bus
27 VSS Ground 67 AB3 I
28 FPSHIFT O Shift clock 68 AB2 I
29 IOVDD Power supply +3.3V 69 AB1 I
31 FPDAT6 O 71 BCLK I System bus clock
32 FPDAT5 O 72 VSS Ground
33 FPDAT4 O
Panel data
73 /RESET I Reset
34 FPDAT3 O 74 /CS I Chip select signal
35 FPDAT2 O 75 /BS I Bus start signal
36 FPDAT1 O 76 /RD I Read signal
37 FPDAT0 O 77 /WE0 I Write enable signal for the lower data byte
38 FPLINE O Line pulse 78 /WE1 I Write enable signal for the upper data byte
39 FPFRAME O Frame pulse 79 RD//WR I Read/write signal
39
01V96
CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter) MAIN: IC504

PIN PIN
NO. NO.
2
1 SDA/CDOUT I/O Serial control data I/O (I C) / Data out (SPI) 15 TCBL I/O Transmit channel status block start
2 AD0//CS I/O Address bit 0 (I2C) / Control port chip select (SPI) 16 NC3
3 AD2 I Address bit 2 (I2C) 17 NC4 Not used
4 RXP I Auxiliary AES3 Receiver port 18 NC5
5 DGND2 Digital ground 19 INT O Interrupt
6 VD2+ Positive digital power supply (+5V) 20 U I/O User data
7 DGND4 21 OMCK I Master clock
Digital ground
8 DGND3 22 DGND Digital ground
9 /RST I Reset 23 VD+ Positive digital power supply (+5V)
10 NC1 24 H//S I Hardware/software control mode select
Not used
11 NC2 25 TXN O Differential line drivers
12 ILRCK I/O Serial audio input left/right clock 26 TXP O
13 ISCLK I/O Serial audio bit clock 27 AD1/CDIN I Address bit 1 (I2C) / Serial control data in (SPI)
14 SDIN I Serial audio data port 28 SCL/CCLK I Control port clock
AK4393-VS-E2 (XW029A00) DAC (Digital to Analog Converter) ADA: IC151, 251, 351, 451
PIN PIN
NO. NO.
1 DVSS - Digital ground 15 BVSS - Substrate ground
2 DVDD - Digital power supply 16 VREFL I Low level voltage reference
3 MCLK I Master clock 17 VREFH I High level voltage reference
4 /PD I Power down mode 18 AVDD - Analog power supply +5 V
5 BICK I Audio serial data clock 19 AVSS - Analog ground
6 SDATA I Audio serial data input 20 AOUTR- O Rch negative analog output
7 LRCK I L/R clock 21 AOUTR+ O Rch positive analog output
8 SMUTE//CS I Soft mute 22 AOUTL- O Lch negative analog output
9 DFS I Double speed sampling mode 23 AOUTL+ O Lch positive analog output
10 DEM0/CCLK I 24 VCOM O Common voltage output
De-emphasis enable
11 DEM1/CDTI I 25 P//S I Parallel/serial select
12 DIF0 I 26 CKS0 I
13 DIF1 I Digital input format 27 CKS1 I Master clock select
14 DIF2 I 28 CKS2 I
CS5361-KS (X3447A00) ADC (Analog to Digital Converter) ADA: IC103, 303, 503, 703, 903, B03, D03, F03
PIN PIN
NO. NO.
1 /RST I Reset 13 M0 I Mode selection
2 M//S I Master/slave mode 14 M1 I
3 LRCK I/O Left right clock 15 TST I Test
4 SCLK I/O Serial clock 16 AINL+ I Differential left channel analog input
5 MCLK I Master clock 17 AINL- I
6 VD Digital power supply +5V 18 GND Ground
7 GND Ground 19 VA Analog power supply +5V
8 VL Logic power supply +3.3V 20 AINR- I
Differential right channel analog input
9 SDOUT O Serial audio data output 21 AINR+ I
10 DIV I Divider 22 VCOM O Common voltage
11 /HPF I High pass filter enable 23 REFGND Reference ground
12 DIF I Digital input format 24 FILT+ O Positive voltage reference
40
01V96
IC BLOCK DIAGRAMIC
TC74VHC00F (XT229A00) 74VHC04SJX (XY871A00) 74VHC08SJX (XY872A00)

MAIN: IC138 MAIN: IC131, 453 MAIN: IC014, 015, 503
Quad 2 Input NAND SN74HCU04NSR (XW842A00) Quad 2 Input AND
ADA: IC007
Hex Inverter
1A 1 14 VDD 1A 1 14 VDD
1A 1 14 VDD
1B 2 13 4B 1B 2 13 4B
1Y 2 13 6A
1Y 3 12 4A 1Y 3 12 4A
2A 3 12 6Y
2A 4 11 4Y 4
2A 4 11 4Y
2Y 11 5A
2B 5 10 3B 5 10
2B 5 10 3B
3A 5Y
2Y 6 9 3A 6 9 2Y 6 9 3A
3Y 4A
Vss 7 8 3Y Vss 7 8 VSS 7 8 3Y
4Y
TC74VHC14F-EL (XW876A00) TC74VHC74F-EL (XW875A00) HD74HC123AP (IR012310)

ADA: IC005 MAIN: IC024, 307, 455 DCA: IC350
Hex Inverter Dual D-Type Flip-Flop Dual Retriggerable Signale Shot
1A 1 16 Vcc
1A 1 14 VDD 1CLR 1 14 VCC
CLR
1B 2 15 1 Rext / Cext
1Y 2 13 1D 2 D 13
6A 2CLR
CLR
3 12 3 D 12
1 3 CLR 14 Cext
2A 6Y 1CK CK 2D
4 11 4 11 1Q 4 Q Q 13 1Q
2Y 5A 1PR PR CK 2CK
5 10 5 Q 10
2Q 5
Q Q 12 2Q
3A 5Y 1Q PR 2PR
6 6 9 2 Cext 6 CLR 11 CLR

3Y 9 1Q Q Q 2Q
4A
7 8 7 8 2 Rext / Cext 7 10 2B
GND 4Y GND Q 2Q
GND 8 9 2A
INPUTS OUTPUTS
PR CLR CLK D Q Q
L H X X H L
H L X X L H
L L X X H H
H H f H H L
H H f L L H
H H L X QO QO
74VHC138SJX (XY873A00) 74VHC157SJX (XY870A00) TC74VHC244F (XT800A00)

MAIN: IC707, 708, 714 MAIN: IC402, 403 ADA: IC006
3 to 8 Demultiplexer Quad 2 to 1 Multiplexer Octal 3-State Bus Buffer
A 1 16 Vcc SELECT 1 16 Vcc 1G 1 20 VDD (Vcc)

A
S
Select B 2 B Y0 15 YO 1A 2 1A G 15 STROBE 1A1 2 19 2G
C 3 C Y1 14 Y1 1B 3 1B 4A 14 4A 2Y4 3 18 1Y1
G2A 4 G2A Y2 13 Y2 1Y 4 1Y 4B 13 4B 1A2 4 17 2A4

Output
Enable 5 G2B Y3 12 5 2A 4Y 12 5 16 1Y2
G2B Y3 2A 4Y 2Y3
6 G1 Y4 11 6 2B 3A 11 2A3
G1 Y4 2B 3A 1A3 6 15
Output Y7 7 10 Y5 2Y 7 2Y 3B 10 3B 1Y3
3Y
Y7 Y5 2Y2 7 14
Y6
GND 8 9 Y6 GND 8 9 3Y 8 13 2A2

1A4
2Y1 9 12 1Y4
(GND) Vss 10 11 2A1
41
01V96
74VHC245SJX (XY874A00) SN74HC273NSR (XH223A00) TC74VHC541F-EL (X3954A00)

ADA: IC951, 952 MAIN: IC701-706 MAIN: IC117, 209, 505, 603
MAIN: IC102-104, 106, 113-116, 132, Octal 3-State Buffer
506, 507 TC74VHC273F (EL) (XY254A00)
FD: IC007-010
SN74HC245NSR (XD838A00)
FD: IC005, 006
Octal D-Type Flip-Flop
MAIN: IC709-711, 713
TC74VHC245F (XT487A00) G1 1 20 Vcc
ADA: IC001, 003 CLEAR 1 20 VCC
A1 2 19 G2
2 19
TC74VHCT245AF (XV242A00) 1Q Q
CL CL
Q 8Q
A2 3 18 Y1
1D 3 D CK CK D 18 8D
MAIN: IC020, 109, 110, 140, 141, 508, 601 A3 4 17 Y2
602, 716 2D 4 D CK CK D 17 7D
CL CL
Octal 3-State Bus Transceiver 2Q 5 Q Q 16 7Q
A4 5 16 Y3
6 15
A5 6 15 Y4
3Q Q Q 6Q
CL CL
7 D CK CK D 14 A6 7 14 Y5
1 3D 6D
D1R 20 Vcc
8 13 5D A7 8 13 Y6
2 19 4D D CK CK D
A1 G
CL CL
18 4Q 9 Q Q 12 5Q A8 9 12 Y7
A2 3 B1
GND 10 11 CLOCK GND 10 11 Y8
4 17
A3 B2
5 16
A4 B3
6 15
A5 B4
A6 7 14
B5
A7 8 13
B6
A8 9 12 B7 SN74LV4051ANSR(X3955A00) SN74LV4052ANSR (IS405210)

GND 10 11 B8 FD: IC011, 014, 017 FD: IC003, 004
Single 8-channel Differential 4-channel
Multiplexer/Demultiplexer Multiplexer/Demultiplexer
TC74LVX4245FS (XU229A00) Channel IN/OUT 4 1 CH4 VDD 16 +DC Voltage Supply 0Y 1 16 VDD
MAIN: IC107, 108, 111, 112 2Y 2 2Y
0Y
2X 15 2X
- do. - 6 2 CH6 CH2 15 Channel IN/OUT 2
Dual Supply Octal Bus Transceiver Commons OUT/IN 3 COM CH1 14 - do. - 1 Y-COM 3 Y-COM 1X 14 1X
Channel IN/OUT 7 4 CH7 CH0 13 - do - 0 3Y 4 3Y X-COM 13 X-COM
- do. - 5 5 CH5 CH3 12 - do - 3 1Y 5 1Y 0X 12 0X

VCCA 1 24 VCCB
0 Control Inhibit 6 INH A 11 Control Input A INH 6 INH 3X 11 3X
DIR 2 1 A 23 VCCB
-DC Voltage Supply 7 VEE B 10 - do. - B VEE 7 A 10 A
B
A1 3 2 B 22 /G
- do - 8 VSS C 9 - do. - C VSS 8 9 B

A2 4 3 D 21 B1
A3 5 4 D 20 B2
A4 6 5 G2 19
B3
A5 7 6 G1 18 B4
A6 8 7 15 17 B5 SN75121NSR (XU816A00) SN75124NSR (XV930A00)

A7 9 8 14 16 B6
ADA: IC010 ADA: IC009
A8 10 9 13 15
B7
Dual Line Driver Triple Line Receiver
GND 11 10 12 14 B8
11
GND 12 13 GND
1A 1 16 Vcc 1A 1 16 Vcc
1B 2 15 2F 1B 2 15 1S
1C 3 14 2E 2R 3 14 1R
1D 4 13 2D 2S 4 13 1Y
1E 5 12 2C 2A 5 12 3A
1F 6 11 2B 2B 6 11 3S
1Y 7 10 2A 2Y 7 10 3R
GND 8 9 2Y GND 8 9 3Y
42
01V96
MC26LS30DR2 (XL334A00)
ADA: IC011
Line Driver
SINGLE-ENDED MODE DIFFERENTIAL MODE Inputs Outputs

EIA-423 EIA-422 Vcc 1 16 SR-A
Operation Vcc VEE Mode A B C D A B C D
16 Input A 2 15 Output A Differential +5.0 GND 0 0 0 0 0 0 1 1 0
SR-A 3
Enable AB (EIA-422-A) 0 1 0 0 1 1 0 0 1
2 15 15 Input B/ 3
Input A Out A 2 Out A 14 Output B 0 X 1 0 1 Z Z 0 1
Input A Enable AB
13 14 Out B 0 1 0 0 0 1 0 1 0
SR-B Mode 4 13 SR-B
3 0 0 0 0 1 0 1 0 1
14
Input B Out B GND 5 12
0 1 0 1 X 1 0 Z Z
11 SR-C
12 1 0 0 0 0 0 0 0 0
SR-C Input D 7 Out C
Input C/
Single-Ended +5.0 -5.0
(EIA-423-A)
6 11 6 10 Out D Enable CD
6 11 Output C 1 1 0 0 0 1 0 0 0
Input C Out C Enable CD 1 0 1 0 0 0 1 0 0
9 Input D 7 10 Output D 1 0 0 1 0 0 0 1 0
SR-D Vcc 1 Gnd 5
7 1 0 0 0 1 0 0 0 1
10 SR-D
Input D Out D VEE 8 Mode 4 VEE 8 9 X 0 X X X X X X Z Z Z Z
X = Don't Care
Z = High Impedance (Off)
DS26C32ATMX (XU815A00) TC7S04F (XM182A00) TC7SH04FU (XS775A00)

ADA: IC008 ADA: IC953 MAIN: IC101, 139, 502, 715
Quad Differential Line Receiver Inverter Gate Inverter Gate
INPUT A 1 16 Vcc
- NC 1 5 VDD NC 1 5 VCC
INPUT A 2 + 15
- INPUT B IN 2 IN A 2
+
OUTPUT A 3 14 INPUT B VSS 3 4 OUT GND 3 4 OUT Y
ENABLE 4 13 OUTPUT B
OUTPUT C 5 12 ENABLE
INPUT C 6
+ 11 OUTPUT D
INPUT C 7 - 10
+ INPUT D
-
GND 8 9 INPUT D
TC7WU04FU (XQ805A00) TC7SH08FU (XR680A00) TC7WH08FU TE12L (XW948A00)

MAIN: IC459 MAIN: IC013, 452 MAIN: IC018, 021
Triple Inverter 2 Input AND Gate Dual 2 Input AND Gate
1A 1 8 Vcc Vcc 1A 1 8 Vcc

IN B 1 5
3Y 2 7 1Y IN A 2 1B 2 7 1Y
2A 3 6 3A GND 3 4 OUT Y 2Y 3 6 2B
4 5 GND 4 5 2A
GND 2Y
43
01V96
TC7SH32FU (TE85L) (XW633A00) NJM2904M (XV190A00) PC4570G2 (XF291A00)

MAIN: IC016, 017 FD: IC002 ADA: IC102, 153, 202, 253, 254, 302,
353, 354, 402, 453, 454, 502,
TC7SET32FU (XW814A00) NJM2904V (TE1) (XR532A00) 602, 702, 802, 902, A02, B02,
MAIN: IC004 C02, D02, E02, F02, G02
MAIN: IC022, 451, 458 HA: IC101, 201, 301, 401, 501, 551-553,
Input OR Gate Dual Operational Amplifier 601, 701, 801, 901, A01, B01,
C01, D01, E01, F01, G01
NJM4580E-T1 (XQ178A00)
Output A 1 +V 8
+DC Voltage ADA: IC255, 256, 355, 356, 455, 456
Supply
IN B 1 5 Vcc
Inverting
Input A
2
- +
7 Output B NJU7072M (TE1) (X3701A00)
IN A 2
Non-Inverting Inverting
Input A
3
+ -
6
Input B
FD: IC018
GND 3 4 OUT Y
Ground 4 -V 5 Non-Inverting
Input B
Dual Operational Amplifier
Output A 1 +V 8
+DC Voltage
Supply
Inverting
2 7 Output B
Input A - +
Non-Inverting 3 6
Inverting
Input A + - Input B
-DC Voltage Supply 4 -V 5 Non-Inverting
Input B
NJM2902M-T1 (XR562A00) NJM4556AL (XP844A00) NJM2360AM (X0200A00)

FD: IC001, 101, 151, 201, 251, 301, 351, ADA: IC155, 156 LCD: IC1
401, 451, 501, 551, 601, 651, 701, HA: IC651
751, 801, 851, 901 DC-DC Converter
LCD: IC2 Dual Operational Amplifier
NJU7074M (TE1) (X3700A00)
FD: IC012, 013, 015, 016
Quad Operational Amplifier
+
A B Cs 1 8 CD
- -
Q2 Q S
Q1 R
OUT A 1 14 OUT D 1 2 3 4 5 6 7 8
OUT -IN +IN -V +IN -IN OUT +V Es 2 7 SI

-IN A 2 - + 13 -IN D
+ -
A A A B B B Ipk
+IN A 3 12 +IN D CT OSC
CT 3
+VDD 4 +V GND 11 -VSS COMP 6 V+
VREF
1.25V
+IN B 5 10 +IN C
- +
6 + -
-IN B 9 -IN C GND 4 5 INVIN
OUT B 7 8 OUT C
CY2305 (XY937A00)
MAIN: IC005
Clock Buffer
Block Diagram
8
PLL MUX CLKOUT
1 3 Pin No. Signal Function
REF CLKA1
2 REF 1 8 CLK OUT 1 REF Input reference frequency, 5V-tolerant input
CLKA2 2 CLK2 Buffered clock output
5 CLK2 2 7 CLK4 3 CLK1 Buffered clock output
CLKA3
7 4 GND Ground
CLK1 3 6 VDD
CLKA4 5 CLK3 Buffered clock output
3 4
6 VDD 3.3V supply
GND 5 CLK3
S2 CLKB1 7 CLK4 Buffered clock output
Select Input 2 8 CLKOUT Buffered clock output, internal feedback on this pin
CLKB2
Decoding 5
S1 CLKB3
7
CLKB4
44
01V96
TLC2932IPWR (XV064A00)
MAIN: IC143
PLL
LOGIC VDD FIN-B PFD INHIBIT VCO INHBIT VCO VDD VCO OUT SELECT
1 5 9 10 14 3 2
LOGIC VDD 1 14 VCO VDD
2 13 DETECTOR CHARGE PUMP

SELECT RBIAS
BLAS CONTROL
VCO OUTPUT
VCO OUT 3 12 VCOIN 1/2
MUX
FIN-A 4 11 VCO GND
FIN-B 5 10 VCO INHBIT
6 9
PFD OUT PFD INHIBIT
LOGIC GND 7 8 NC
7 4 6 12 13 11 8
LOGIC GND FIN-A PFD OUT VCOIN RBIAS VCO GND NC
45
01V96
CIRCUIT BOARDS
DCCOM (AC) Circuit Board (X3434C0) ........................................ 46

DCCOM (DCA 1/5) Circuit Board (X3434C0) ............................... 47
DCD Circuit Board (X3858B0) .................................................. 48/49
FD Circuit Board (X3423B0) .................................................... 50/52
HACOM (ADA) Circuit Board (X3422B0) ................................. 54/56
HACOM (HA) Circuit Board (X3422B0) .................................... 58/60
MAIN Circuit Board (X3421B0) ...................................... 62/64/66/68
PNCOM (LCD) Circuit Board (X3424B0) ...................................... 75
PNCOM (PN1 (1/2, 2/2)) Circuit Board (X3424B0) .................. 70/72
PNCOM (PN2) Circuit Board (X3424B0) ....................................... 74
Note: See parts list for details of circuit board component parts.

DCCOM (AC) Circuit Board
POWER ON/OFF
to Power Transformer
not installed
to AC Inlet Assembly
Component side
2NAP-V989570-2 2 (J, U, V models)

2NAP-V989570-2a 2 (H, B, W K models)
46
01V96
DCCOM (DCA 1/5) Circuit Board

not installed
to HA-CN551
to ADA-CN953
to MAIN-CN005
not installed
not installed
Component side
2NAP-V989570-2 2 (J, U, V models)

2NAP-V989570-2a 2 (H, B, W K models)
47
01V96
DCD Circuit Board
to MAIN-CN004 not installed
to FD-CN002
to Power
Transformer Component side
2NAP-V989580-2 1
48
01V96
DCD Circuit Board
Pattern side
2NAP-V989580-2 1
49
01V96
FD Circuit Board to MAIN-CN704
1 fader 2 fader 3 fader 4 fader 5 fader 6 fader 7 fader 8 fader 9 fader
A'
2NAP-V989450-2 1
50
01V96
to DCD-CN202
der 10 fader 11 fader 12 fader 13 fader 14 fader 15 fader 16 fader STEREO fader
Component side
A'
2NAP-V989450-2 1
51
01V96
to DCD-CN202
FD Circuit Board
B'
2NAP-V989450-3
52
01V96
B
to MAIN-CN704
Pattern side
B'
2NAP-V989450-3
53
01V96
HACOM (ADA) Circuit Board

C
to MAIN-CN503 WORD CLOCK
2 TR DIGITAL (COX.) to MAIN-CN502 IN
MIDI IN OUT adat OPTICAL
TO HOST USB IN OUT THRU OUT IN
to HA-CN101
C'
2NAP-V989280-2 1
54
01V96
C
K WORD CLOCK to HA-CN552
OUT
STEREO OUT (BAL) OMNI OUT (BAL) MONITOR OUT (BAL)
L R 1 2 3 4 L R
to HA-CN901 to DCA 1/5-CN305 to MAIN-CN501
C'
Component side
2NAP-V989280-2 1
55
01V96
HACOM (ADA) Circuit Board
D'
2NAP-V989280-3 1
56
01V96
Pattern side
D'
2NAP-V989280-3 1
57
01V96
E
HACOM (HA) Circuit Board
INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT

A1 A2 A3 A4 A5 A6 A7 A8
INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT

B1 B2 B3 B4 B5 B6 B7 B8
INSERT INSERT INSERT INSERT INSERT INSERT INSERT INSERT

I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8
PAD 20dB 1 PAD 20dB 2 PAD 20dB 3 PAD 20dB 4 PAD 20dB 5 PAD 20dB 6 PAD 20dB 7 PAD 20dB 8
GAIN 1 GAIN 2 GAIN 3 GAIN 4 GAIN 5 GAIN 6 GAIN 7 GAIN 8
to ADA-CN131
E'
2NAP-V989280-2 1
58
01V96
E
to ADA-CN954
UT INPUT INPUT INPUT INPUT INPUT INPUT

8 A9 A 10 A 11 A 12 13 15
UT INPUT INPUT INPUT INPUT INPUT INPUT

8 B9 B 10 B 11 B 12 14 16
ERT INSERT INSERT INSERT INSERT

8 I/O 9 I/O 10 I/O 11 I/O 12
0dB 8 PAD 20dB 9 PAD 20dB 10 PAD 20dB 11 PAD 20dB 12 MONITOR
GAIN 13 GAIN 15 OUT PHONES
LEVEL LEVEL
N8 GAIN 9 GAIN 10 GAIN 11 GAIN 12 GAIN 14 GAIN 16
to ADA-CN931 to DCA 1/5-CN304

E'
Component side
2NAP-V989280-2 1
59
01V96
HACOM (HA) Circuit Board
F'
2NAP-V989280-3 1
60
01V96
Pattern side
F'
2NAP-V989280-3 1
61
01V96
not installed G
MAIN Circuit Board
to PN1-CN101
to FD-CN001
to LCD-CN1
to PN1-CN103
to PN1-CN102
Lithium Battery to DCD-CN205

G'
Battery VN103500
Notice for back-up battery removal Battery

Push the battery as shown in figure,
then the battery will pop up.
Druk de batterij naar beneden zoals
aangeven in de tekening de batterij
springt dan naar voren. Battery holder
62 2NAP-V989160-2 5
01V96
G not installed to DCA 1/5-CN303
to SLOT
to ADA-CN002
to ADA-CN951
to ADA-CN952
Component side
G'
2NAP-V989160-2 5
63
01V96
H
MAIN Circuit Board
H'
64 2NAP-V989160-2 5
01V96
Component side
H'
2 layer2
2NAP-V989160-2 5
65
01V96
I
MAIN Circuit Board
I'
66 2NAP-V989160-2 5
01V96
Component side
I'
5 layer5
2NAP-V989160-2 5
67
01V96
J
MAIN Circuit Board
J'
2NAP-V989160-3 3
68
01V96
Pattern side
J'
2NAP-V989160-3 3
69
01V96
K
PNCOM (PN1 (1/2, 2/2)) Circuit Board
to MAIN-CN701
K'
2NAP-V989490-2 2
70
01V96
K
to PN2-CN301
to MAIN-CN702
Parameter wheel
to MAIN-CN703
K' Component side
2NAP-V989490-2 2
71
01V96
L
PNCOM (PN1 (1/2, 2/2)) Circuit Board
L'
2NAP-V989490-2 2
72
01V96
Pattern side
L'
2NAP-V989490-2 2
73
01V96
PNCOM (PN2) Circuit Board
to PN1-CN105
Component side
Pattern side
2NAP-V989490-2 2
74
01V96
PNCOM (LCD) Circuit Board
to LCD Module
LCD contrast
to MAIN-CN006
Component side
Pattern side
2NAP-V989490-2 2
75
01V96
INSPECTIONS
Perform the Check of 01V96. b. While holding down the MONITOR [CLEAR] key,
1. Preparations switch on the power for the 01V96 main unit and
1-1. Parameters continue to hold down this key until "FLASH
The parameters are as follows unless otherwise UPDATE" is displayed on the screen of the 01V96
specified. main unit. For the MAIN circuit board inspection,
The word clock (FS) is set to 96 kHz. it is adequate to just switch on the power.
Only the channel being measured is ON. c. Start the version upgrade program (VerUp.exe).
PAN: Center d. Press the Browse button and select the main
GAIN : MIN p r o gra m a n d b o o t p r o gra m ( f i l e n a m e
PAD : ON 01V96.pgm) to be written.
FADER : NOMINAL (0 dB) e. When you press the Load button, the program
0 dBu = 0.775Vrms writing is started. Never switch off the power or
0 dBV = 1Vrms=2.2 dBu disconnect the USB cable while the program is
0 dBFS = 0 dB full scale being written.
The oscillator output impedance is 150 . f. In order to check that the main program and the
The oscilloscope, level meter, etc. input impedance boot program have been written correctly, check
is set to at least 100 k. the versions of the program with the method in q.
Noise measurement is corrected with a 12.7 kHz,
-6 dB/octave low pass filter. 1-3. Initialization
(These are not effective values, but measurement While holding down both the FADER MODE [HOME]
with average values.) key and the [AUX1] key, switch On the power switch
Distortion measurement is corrected with an 80 to start up the system, then operate according to
kHz, -6 dB/octave low pass filter. the following instructions.
For analog output inspection, the following Continue holding down these keys until the Loading
parameters are added or changed. Factory Presets message is displayed on the 01V96
For maximum output measurement, unless main unit screen.
otherwise specified, output 0 dB from the internal Screen instructions Instruction contents
oscillator. Calibrating the Faders Do not touch any faders during
The analog output loads are Do Not Touch the Faders! Fader calibration and do not
INSERT OUT: 10k obstruct movement of the faders.
Adjust CH1-16 -INFINITY Set the CH1~16, STEREO Fader
STEREO OUT: 600
STEREO -INFINITY to - (lowest setting), then press
2TR OUT: 10k the [ENTER] key.
OMNI OUT: 10k Hit ENTER key
MONITOR OUT: 10k Adjust CH1-16 -15dB Set the CH1~16 Fader to -15 dB
PHONES: 8 STEREO -30dB and the STEREO Fader to -30
dB, then press the [ENTER] key.
Hit ENTER key
1-2. Writing Programs Adjust CH1-16 0dB Set the CH1~16 Fader to 0dB.
If the main program or the boot program is not the STEREO Any Position There is no particular need to
latest version, upgrade to the latest version. operate the STEREO Fader.
For the latest program, please download from When this setting is complete,
press the [ENTER] key.
the YSISS home page.
Hit ENTER key
Adjust CH1-16 +10dB Set the CH 1~16 Fader to 10 dB
q Program version check method STEREO 0dB and the STEREO Fader to 0 dB,
Press the 01V96 [SEL] key CH5, CH9, CH6, CH3, then press the [ENTER] key.
in that order, then press the [STORE] key. This Hit ENTER key
displays the versions of the main program and the After the initialization is complete, check that the DIO
boot program on the LCD screen. WORD SELECT screen is displayed.
w Program writing method 1-4. Fader Inspection

Write the main program and the boot program with q Preparations
the following method. a. Press the LAYER [MASTER] key to select the master
layer.
a. Connect the PC and the 01V96 with the USB b. Move all the faders all the way up.
cable.
(The YAMAHA USB-MIDI driver must be installed
on the PC and the USB-MIDI driver must be set
76 to Through = Off.)
01V96
c. Press the DISPLAY ACCESS [PAIR/GROUP] key a t Crosstalk between left and right
few times, switch to the OUT FADER GROUP fixed Parameter PAN L swung to cut off.
screen, and press the [SEL 1]~[SEL 16] and [SEL Input frequency Output level (L) Permitted range (R)
STEREO] keys and group the 17 faders. 1kHz +22dBu -58dBu or below
w Group inspection The right side must be the same.

a. Operate the stereo master fader, repeat the delay
(about 3 seconds/100 mm) twice and repeat the y Maximum output (both L/R)
advance (about 1 second/100 mm) twice. Input frequency Permissible range Permissible range (distortion ratio)
b. Operate the Channel 1 fader, repeat the delay (about 1kHz +240.5dBu 0.01% or below
3 seconds/100 mm) twice and repeat the advance
(about 1 second/100 mm) twice. 2-2. 2TR OUT L/R
c. Check that there are no vibrating faders or extremely Parameter Must be input from CH1(XLR).
late faders in the above operations q Gain (both L/R)
Input frequency Input level Regulated output level Permitted range
e Recall inspection 1kHz +4dBu -10dBV -102dBV
a. Press the LAYER [1-16] key and select Layers 1-16.
b. Press the DISPLAY ACCESS [SCENE] key to switch w f characteristic (both L/R)
to the SCENE MEMORY screen, then press the Parameter The permitted range uses 1 kHz as
SCENE MEMORY [ ] key or [ ] key to select 0, the reference.
then press the [RECALL] key to recall 0. Input frequency Input level Permitted range
c. Move all the faders all the way up, press the SCENE 20Hz +4dBu -1.5~+0.5dB
MEMORY [ ] key or [ ] key to select 1, then press 40kHz +4dBu -1.5~+0.5dB
the [STORE] key and when the TITLE EDIT screen
is displayed, then select OK to store 1. 2-3. OMNI OUT 1~4
d. With the operation method in b., repeat two times Parameters Must be input from CH1 (XLR).
from the 0 recall to the 1 recall. BUS 1~4 ON with CH1 routing.
e. Check that there are no vibrating faders or extremely Assign Bus nCH to OMNI nCH with
late faders in the above operations. an OUT PATCH.
BUS 1-4 MASTER FADER ON.
2. ANALOG IN/OUT WORD CLOCK INT q Gain (OMNI OUT 1~4)
96 kHz inspection Input frequency Input level Regulated output level Permitted range
2-1. STEREO OUT L/R 1kHz +4dBu +4dBu +42dBu
Parameter Must be input from CH1(XLR).
q Gain (both L/R) w f characteristic (OMNI OUT 1~4)
Input frequency Input level Regulated output level Permitted range Parameter The permitted range uses 1 kHz as
1kHz +4dBu +4dBu +42dBu the reference.
Input frequency Input level Permitted range
w f characteristic (both L/R) 20Hz +4dBu -1.5~+0.5dB
Parameter The permitted range uses 1 kHz as 40kHz +4dBu -1.5~+0.5dB
the reference.
Input frequency Input level Permitted range e Residual noise (OMNI OUT 1~4)
20Hz +4dBu -1.5~+0.5dB Parameter Switch the BUS OUT Off.
40kHz +4dBu -1.5~+0.5dB Permitted range
-86dBu or below
e Residual noise (both L/R)
Parameter Switch STEREO OUT Off. r OMNI OUT 1-4 level difference
Permitted range The range for the difference in the gain measured
-86dBu or below with q is regulated as follows.
Permitted range
r L/R level difference Within 1dB
The range for the difference in the gain measured
with q is regulated as follows.
Permitted range
Within 1dB
77
01V96
t Odd channel/even channel crosstalk q Gain (both L/R)

Input frequency Output level (odd channels) Permitted range (even channels) Input frequency Input level Regulated output level Permitted range
1kHz +22dBu -58dBu or below 1kHz +4dBu -12.8dBu -12.82dBu
The even channels must be the same too. w f characteristic (both L/R)
Parameter The permitted range uses 1 kHz as
y Maximum output (OMNI OUT 1~4) the reference.
Input frequency Permissible range Permissible range (distortion ratio) Input frequency Input level Permitted range
1kHz +240.5dBu 0.01% or below 20Hz +4dBu -3~0.5dB
40kHz +4dBu -3~0.5dB
2-4. MONITOR OUT L/R
Parameters Must be input from CH1 (XLR). e Residual noise (both L/R)
Set the MONITOR/2TR lN SW to Parameter Set the PHONES LEVEL to MIN.
MONITOR. Permitted range
Set the MONITOR OUT LEVEL to -110dBu or below
MAX.
q Gain (both L/R) r L/R level difference
Input frequency Input level Regulated output level Permitted range The range for the difference in the gain measured
1kHz +4dBu +4dBu +42dBu with q is regulated as follows.
Permitted range
w f characteristic (both L/R) Within 1dB
the reference. t Maximum output (both L/R)
Input frequency Input level Permitted range Parameter -12 dB must be output from the internal
20Hz +4dBu -1.5~+0.5dB oscillator.
40kHz +4dBu -1.5~+0.5dB Input frequency Permissible range Permissible range (distortion ratio)
1kHz -4.80.5dBu 0.04% or below
e Residual noise (both L/R)
Parameter Switch STEREO OUT Off. y Crosstalk between left and right
MONITOR LEVEL Permitted range Parameter PAN L swung to cut off.
MAX -86dBu or below Input frequency Output level (L) Permitted range (R)
MIN -100dBu or below 1kHz -10dBu -75dBu or below
r L/R level difference The right side must be the same.

The range for the difference in the gain measured
with q is regulated as follows. 2-6. 2TR IN ANALOG L/R
Permitted range Parameters Inspect with MONITOR OUT .
Within 1dB Set the MONITOR OUT LEVEL to MAX.
Set the 15/16 GAIN to MIN.
t Crosstalk between left and right Gain only can also be inspected with
Parameter PAN L swung to cut off. STEREO OUT.
Input frequency Output level (L) Permitted range (R) Set the MONITOR/2TR IN SW to 2TR
1kHz +22dBu -58dBu or below IN.
Set the 15/16/2TR IN SW to 2TR IN.
The right side must be the same. q Gain (both L/R)
y Maximum output (both L/R) 1kHz -10dBV +4dBu +42dBu
Input frequency Permissible range Permissible range (distortion ratio)
1kHz +240.5dBu 0.01% or below w f characteristic (both L/R)
2-5. PHONES OUT L/R the reference.
Parameters Must be input from CH1 (XLR). Input frequency Input level Permitted range
Set the MONITOR/2TR lN SW to 20Hz -10dBV -1.5~0.5dB
MONITOR. 40kHz -10dBV -1.5~0.5dB
Set the PHONES LEVEL to MAX.
78
01V96
e Distortion ratio (both L/R) Permitted range

Input frequency Output level Permitted range Within 2dB
1kHz +22dBu 0.003% or below
B. GAIN MIN, PAD ON
r Residual noise (both L/R) q Gain (CH1~12)
Parameter Short 2TR IN ANALOG with 150 . Input frequency Input level Regulated output level Permitted range
Permitted range 1kHz +4dBu +4dBu +42dBu
-97dBu or below
w Distortion ratio (CH1~12)
t L/R level difference Input frequency Output level Permitted range
The range for the difference in the gain measured 1kHz +22dBu 0.01% or below
Permitted range e Noise level (CH1~12)
Within 1dB Parameter Short the CH IN being measured with
150 .
y Crosstalk between left and right Permitted range
Parameter Input the signals to the left side. -82dBu or below
Short the right side with 150 .
Input frequency Output level (L) Permitted range (R) r INSERT OUT Gain (CH1~12)
1kHz +22dBu -58dBu or below Input frequency Input level Regulated output level Permitted range
1kHz +4dBu -2dBu -21.5dBu
The right side must be the same.
t INSERT IN Gain (CH1~12)
2-7. CH IN 1~12 (XLR) Parameter Input the signals to the INSERT IN being
Parameter Inspect with STEREO OUT L (XLR). measured.
A. GAIN MAX, PAD OFF Input frequency Input level Regulated output level Permitted range
q Gain (CH1~12) 1kHz -2dBu +4dBu +41.5dBu
1kHz -60dBu +4dBu +42dBu y Odd channel/even channel crosstalk
Parameters Input the signals to the odd channels side.
w f characteristic (CH1~12) Short the even channel side with 150 .
Parameter The permitted range uses 1 kHz as Input frequency Output level (odd channels) Permitted range (even channels)
the reference. 1kHz +22dBu -58dBu or below
Input frequency Input level Permitted range
20Hz -60dBu -1.5~0.5dB The even channels must be the same too.
40kHz -60dBu -1.5~0.5dB
C. Phantoms (CH 1~12)
e Distortion ratio (CH1~12) Short XLR Pin 2 and Pin 3, connect a 10 k load
Input frequency Output level Permitted range between Pin 2-1, then switch the Phantom switch
1kHz +22dBu 0.02% or below On. The voltage is regulated to be no more than the
following.
r Noise level (CH1~12) Permitted range
Parameter Short the CH IN being measured with DC 31~37V
150 .
Permitted range Check that when the Phantom switch is switched
-64dBu or below Off, the discharge starts quickly.
However, if the permitted range above is not met, EIN 2-8. CH IN 13~16 (PHONE)
Measurement value (Gain at 1 kHz) must be -128 Parameter Inspect with STEREO OUT L (XLR).
or more. A. GAIN MAX
q Gain (CH13~16)
t Level difference (CH 1~12) Input frequency Input level Regulated output level Permitted range
The range for the difference in the gain measured 1kHz -26dBu +4dBu +42dBu
79
01V96
w f characteristic (CH13~16) Check visually that the PEAK and

Parameter The permitted range uses 1 kHz as SIGNAL LED lights up and goes out.
the reference. Lit up
Input frequency Input level Permitted range Reference output level
LED level Input frequency Input level (STEREO OUT)
20Hz -26dBu -1.5~0.5dB
40kHz -26dBu -1.5~0.5dB PEAK 1kHz +23dBu +23dBu
SIGNAL 1kHz -14dBu -14dBu
e Distortion ratio (CH13~16)
Input frequency Output level Permitted range Out
1kHz +22dBu 0.02% or below Reference output level
LED level Input frequency Input level (STEREO OUT)
r Level difference (CH13~16) PEAK 1kHz +19dBu +19dBu
The range for the difference in the gain measured SIGNAL 1kHz -18dBu -18dBu
Permitted range 3. ANALOG IN/OUT WORD CLOCK INT
Within 2dB 48 kHz inspection
3-1. STEREO OUT L/R (XLR)
t Noise level (CH13~16) Parameter Must be input from CH1(XLR).
Parameter Short the CH IN being measured with q Distortion ratio (both L/R)
150 . Input frequency Output level Permitted range
Permitted range 1kHz +22dBu 0.01% or below
-72dBu or below
w Residual noise (both L/R)
However, if the permitted range above is not met, EIN Parameter Switch STEREO OUT Off.
Measurement value (Gain at 1 kHz) must be -102 Permitted range
or more. -86dBu or below
B. GAIN MIN 3-2. OMNI OUT 1~4

q Gain (CH13~16) Parameters Must be input from CH1 (XLR).
Input frequency Input level Regulated output level Permitted range BUS 1~4 ON with CH1 routing.
1kHz +4dBu +4dBu +42dBu Assign Bus nCH to OMNI nCH with
an OUTPUT PATCH.
w Distortion ratio (CH13~16) q Distortion ratio (OMNI OUT 1~4)
Input frequency Output level Permitted range Input frequency Output level Permitted range
1kHz +22dBu 0.01% or below 1kHz +22dBu 0.01% or below
e Noise level (CH13~16) w Residual noise (OMNI OUT 1~4)

Parameter Short the CH IN being measured with Parameter Switch BUS OUT Off.
150 . Permitted range
Permitted range -86dBu or below
-82dBu or below
r Odd channel/even channel crosstalk Parameters Must be input from CH1 (XLR).
Parameters Input the signals to the odd channels side. Set the MONITOR/2TR lN SW to
Short the even channel side with 150 . MONITOR.
Input frequency Output level (odd channels) Permitted range (even channels) Set the MONITOR OUT LEVEL to
1kHz +22dBu -58dBu or below MAX.
q Distortion ratio (both L/R)
The even channels must be the same too. Input frequency Output level Permitted range
2-9. CH IN 1~16 level meter operation check
Parameters Input the regulated level to the w Residual noise (both L/R)
channels being measured (PHONE). Parameter Switch STEREO OUT Off.
1~16 CH can be input at the same Permitted range
time. -86dBu or below
80
01V96
3-4. PHONES OUT L/R 4-2. 2TR DIGITAL IN (COAXIAL)

Parameters Must be input from CH1 (XLR). Parameters Use Parameter System Two.
Set the MONITOR/2TR lN SW to Inspect with STEREO OUT L/R
MONITOR. (XLR).
Set the PHONES LEVEL to MAX. For the WORD CLOCK, select 2TR
q Distortion ratio (both L/R) DIGITAL IN.
Input frequency Output level Permitted range
1kHz -10dBu 0.04% or below A. 96 kHz
Parameter System Two frequency setting
w Residual noise (both L/R) (Sample Rate) to 96 kHz.
Parameter Set the PHONES LEVEL to MIN. q Gain (2TR DIGITAL IN)
Permitted range Input frequency Input level Regulated output level Permissible range
-110dBu or below 1kHz -20dBFS +4dBu +42dBu
3-5. CH IN 1~16 (PHONE) w f characteristic (2TR DIGITAL IN)

Parameters Inspect with STEREO OUT L (XLR). Parameter The permitted range uses 1 kHz as
GAIN MIN (CH1~16), PAD ON the reference.
(CH1~12). Input frequency Input level Permissible range
q Distortion ratio (CH1~16) 20Hz -20dBFS -1.0~0.5dB
Input frequency Output level Permitted range 40kHz -20dBFS -1.5~0.5dB
e Distortion ratio (2TR DIGITAL IN)
w Noise level (CH1~16) Input frequency Output level Permissible range
Parameter Short the CH IN being measured with 1kHz +22dBu 0.01% or below
150 .
Permitted range B. 48 kHz
-82dBu or below Parameter System Two frequency setting
(Sample Rate) to 48 kHz.
4. DIGITAL IN/OUT inspection q Distortion ratio (2TR DIGITAL IN)
4-1. 2TR DIGITAL OUT (COAXIAL) Input frequency Output level Permissible range
Parameters Use System Two. 1kHz +22dBu 0.01% or below
Must be input from CH1 (XLR).
4-3. adat IN/OUT (OPTICAL)
A. WORD CLOCK INT96kHz Parameters Use System Two.
Parameter Set WORD CLOCK INT to 96 kHz. Inspect with STEREO OUT L/R
q Gain (2TR DIGITAL OUT) (XLR).
Input frequency Input level Regulated output level Permissible range Must be input from CH1 (XLR).
1kHz +4dBu -20dBFS -202dBFS
A. 48 kHz
w f characteristic (2TR DIGITAL OUT) Parameter System Two frequency setting
Parameter The permitted range uses 1 kHz as (Sample Rate) to 48 kHz.
the reference.
Input frequency Input level Permitted range q Distortion ratio (adat IN)
20Hz +4dBu -1.0~0.5dB Input frequency Output level Permissible range
40kHz +4dBu -1.5~0.5dB 1kHz +22dBu 0.01% or below
e Distortion ratio (2TR DIGITAL OUT) B. 44.1 kHz

Input frequency Output level Permissible range Parameter System Two frequency setting
1kHz -2dBFS 0.01% or below (Sample Rate) to 44.1 kHz.
B. WORD CLOCK INT48kHz q Distortion ratio (adat IN)

Parameter Set WORD CLOCK INT to 48 kHz. Input frequency Output level Permissible range
q Distortion ratio (2TR DIGITAL OUT) 1kHz +22dBu 0.01% or below
Input frequency Output level Permissible range
1kHz -2dBFS 0.01% or below
81
01V96
4-4. WORD CLOCK IN and 2TR DIGITAL IN PLL For WORD CLOCK IN inspection,
operation range select the value of the frequency
Parameters Use System Two. setting according to the table below.
Inspect with STEREO OUT L/R For 2TR DIGITAL IN inspection, set
(XLR). the System Two frequency setting
Select the WORD CLOCK as follows. (Sample Rate) according to the table
WORD CLOCK IN inspection: WC IN below.
2TR DIGITAL IN inspection: 2TR D q Jitter (both WORD CLOCK IN and 2TR DIGITAL IN)
Input from CH1 (XLR). WORD CLOCK Permitted range
44.1kHz 10nsec below
A. 96kHz + 6% (101.76kHz) 48kHz 10nsec below
Parameter For WORD CLOCK IN inspection, set 88.2kHz 10nsec below
the oscillator frequency setting to 96 96kHz 10nsec below
kHz + 6%.For 2TR DIGITAL IN
inspection, set the System Two 6. Issuing sound
frequency setting (Sample Rate) to 96 Check the following items by listening.
kHz +6%. ANALOG INPUT, ANALOG OUTPUT
q Distortion ratio (for both WORD CLOCK IN and 2TR CH1 (XLR), CH9 (XLR), CH16 (PHONE)
DIGITAL IN) Inspect with STEREO OUT L/R (XLR).
Input frequency Output level Permissible range
1kHz +22dBu 0.01% or below EEFFECT function (DSP6 operation check)
Parameters "Sound scene data": Use the file
B. 44.1kHz - 10% (39.69kHz) name "JADE_01".
Parameter For WORD CLOCK IN inspection, set WORD CLOCK: INT48kHz
the oscillator frequency setting to 44.1 Input the music signal from ANALOG
kHz -10 %. For 2TR DIGITAL IN INPUT CH1, recall scenes in order
inspection, set the System Two from Scene 1 to Scene 4, and adjust
frequency setting (Sample Rate) to the [GAIN] knob so that the
44.1 kHz - 10%. STEREO METER OVER does not
q Distortion ratio (for both WORD CLOCK IN, 2TR light up for any scene.
DIGITAL IN)
Input frequency Output level Permissible range Inspection :Recall Scene 1 (REVERB) and check
1kHz +22dBu 0.01% or below the signal with the headphones for at
least 15 seconds.
5. Jitter measurement Judgment standard 1: The EFFECT sounds must
Parameters Use System Two. be output.
Select Sec, PK. Judgment standard 2: The output must not include
Select BW: 700 Hz to 100kHz. any noise.
Inspect with 2TR DIGITAL OUT.
In the same manner, recall and inspect Scenes 2
5-1. WORD CLOCK INT through 16.
Parameter Select the value of the WORD The Effect functions for Scenes 2 through 14 work
CLOCK according to the following as follows.
table. Scene 2: SYMPHONIC
q Jitter Scene 3: HQ PITCH
WORD CLOCK Permitted range Scene 4: DYNAMIC FILTER
INT 44.1kHz 5nsec or below Scene 5: REVERB
INT 48kHz 5nsec or below Scene 6: SYMPHONIC
INT 88.2kHz 5nsec or below Scene 7: HQ PITCH
INT 96kHz 5nsec or below Scene 8: DYNAMIC FILTER
Scene 9: REVERB
5-2. WORD CLOCK EXT Scene 10: SYMPHONIC
Parameters Select the WORD CLOCK as follows. Scene 11: DYNAMIC FILTER
WORD CLOCK IN inspection: WC IN Scene 12: REVERB
2TR DIGITAL IN inspection: 2TR D Scene 13: SYMPHONIC
Scene 14: DYNAMIC FILTER
82
01V96
01V96 a. 01V96 USB

1. YAMAHA USB-MIDI
1-1. USB-
MIDI Through=Off
FS 96kHz
CH ON b. MONITOR [CLEAR] 01V96
PAN: 01V96
GAIN: MIN "FLASH UPDATE"
PAD: ON MAIN
FADER: NOMINAL0dB
0dBu 0.775Vrms c. VerUp.exe
0dBV 1Vrms 2.2dBu
0dBFS 0 d. Browse
150 01V96.pgm

100k e. Load
12.7kHz 6dB OCT LPF

f.
80kHz 6dB OCT LPF
1-3.
FADER MODE[HOME][AUX1]
ON

01V96 Loading Factory
0dB Presets

INSERT OUT: 10k
STEREO OUT: 600 Calibrating the Faders Fader
2TR OUT: 10k Do Not Touch the Faders! Fader
OMNI OUT: 10k Fader

MONITOR OUT: 10k Adjust CH1-16 -INFINITY CH1 16STEREO Fader
PHONES: 8 -
STEREO -INFINITY [ENTER]

Hit ENTER key
1-2.
Adjust CH1-16 -15dB CH1 16 Fader -15dB
STEREO Fader -30dB
STEREO -30dB
[ENTER]
YSISS
Hit ENTER key
Adjust CH1-16 0dB CH116 Fader0dB

STEREO Any Position STEREO Fader
01V96 [SEL] CH5CH9CH6CH3
[STORE]LCD [ENTER]

Hit ENTER key
Adjust CH1-16 +10dB CH1 16 Fader 10dB
STEREO Fader 0dB
STEREO 0dB
[ENTER]

Hit ENTER key
DIOWORD CLOCK SELECT

83
01V96
1-4. L/R

a. LAYER [MASTER]
1dB
b. 1
c. DISPLAY ACCESS [PAIR/GROUP] L/R
OUT FADER GROUP [SEL1] PAN L
[SEL16][SEL STEREO] L R
17 1kHz 22dBu 58dBu
R
a. 3/
100mm 2 1 /100mm L/R
2
b. 3 / 1kHz 24 0.5dBu 0.01%
100mm 2 1 /100mm
2
c. 2-2. 2TR OUT L/R
CH1XLR
L/R

a. LAYER[1-16]1-16 1kHz 4dBu 10dBV 10 2dBV

b. DISPLAY ACCESS [SCENE] f L/R
S C E N E M E M O R Y S C E N E 1kHz
MEMORY[] []0
[RECALL] 0 20Hz 4dBu 1.5 0.5dB
c. 1 S C E N E 40kHz 4dBu 1.5 0.5dB
MEMORY [][] 1
[STORE]TITLE EDIT 2-3. OMNI OUT 1 4
OK1 CH1XLR
d. b 0 1 CH1 ROUTING BUS1 4 ON
2 OUT PATCH OMNI nCH BUS nCH
e.
BUS1 4 MASTER FADER ON
2. ANALOG INOUTWORD CLOCK INT96kHz OMNI OUT 1 4

2-1. STEREO OUT L/R
CH1XLR 1kHz 4dBu 4dBu 4 2dBu
L/R
f OMNI OUT

1kHz
1kHz 4dBu 4dBu 4 2dBu

L/R 20Hz 4dBu 1.5 0.5dB
1kHz 40kHz 4dBu 1.5 0.5dB

20Hz 4dBu 1.5 0.5dB OMNI OUT
40kHz 4dBu 1.5 0.5dB BUS OUT OFF

L/R 86dBu
STEREO OUT OFF

86dBu
84
01V96
OMNI OUT 1 4 2-5. PHONES OUT L/R

CH1XLR
MONITOR 2TR IN SW MONITOR
1dB PHONES LEVEL MAX
L/R

1kHz 4dBu 12.8dBu 12.8 2dBu
1kHz 22dBu 58dBu
L/R
1kHz

OMNI OUT 1 4 20Hz 4dBu 3 0.5dB
40kHz 4dBu 3 0.5dB
1kHz 24 0.5dBu 0.01
L/R
PHONES LEVEL MIN
CH1XLR 110dBu
MONITOR OUT LEVEL MAX L/R

L/R
1dB
L/R
f L/R 12dB
1kHz
1kHz 4.8 0.5dBu 0.04
20Hz 4dBu 1.5 0.5dB
40kHz 4dBu 1.5 0.5dB L/R
PAN L
L/R L R
STEREO OUT OFF 1kHz 10dBu 75dBu
MONITOR LEVEL
MAX 86dBu R
MIN 100dBu
2-6. 2TR IN ANALOG L/R
L/R MONITOR OUT
MONITOR OUT LEVEL MAX
15/16 GAIN MIN
1dB STEREO OUT
MONITOR/2TR IN SW 2TR IN
L/R 15/16/2TR IN SW 2TR IN
PAN L
L R L/R
1kHz 22dBu 58dBu
1kHz 10dBV 4dBu 4 2dBu
R
L/R
L/R 1kHz

1kHz 24 0.5dBu 0.01 20Hz 10dBV 1.5 0.5dB
40kHz 10dBV 1.5 0.5dB
85
01V96
L/R B. GAIN MINPAD ON

CH1 12
1kHz 22dBu 0.003
L/R
2TR IN ANALOG 150 CH1 12

97dBu 1kHz 22dBu 0.01
L/R CH1 12
CH IN 150

1dB 82dBu
L/R INSERT OUT CH1 12

L
R 150 1kHz 4dBu 2dBu 2 1.5dBu
L R
1kHz 22dBu 58dBu
INSERT IN CH1 12
INSERT IN
R
1kHz 2dBu 4dBu 4 1.5dBu
2-7. CH IN 1 12XLR
STEREO OUT LXLR
A. GAIN MAXPAD OFF CH
CH1 12 CH 150

1kHz 60dBu 4dBu 4 2dBu 1kHz 22dBu 58dBu
f CH1 12
1kHz
C. CH1 12
20Hz 60dBu 1.5 0.5dB XLR 2 3 2-1
40kHz 60dBu 1.5 0.5dB 10k ON

CH1 12

DC 31 37V
1kHz 22dBu 0.02
OFF
CH1 12
CH IN 150

2-8.CH IN 13 16PHONE
64dBu STEREO OUT LXLR
A. GAIN MAX
EIN CH13 16
1kHz 128
CH1 12

2dB
86
01V96
f CH13 16
1kHz
LED STEREO OUT

20Hz 26dBu 1.5 0.5dB PEAK 1kHz 23dBu 23dBu
40kHz 26dBu 1.5 0.5dB SIGNAL 1kHz 14dBu 14dBu
CH13 16

LED STEREO OUT
1kHz 22dBu 0.02
PEAK 1kHz 19dBu 19dBu
CH13 16 SIGNAL 1kHz 18dBu 18dBu

3. ANALOG IN OUT WORD CLOCK INT48kHz
2dB 3-1. STEREO OUT L/RXLR
CH1XLR
CH13 16 L/R
CH IN 150

1kHz 22dBu 0.01
72dBu
L/R
EIN STEREO OUT OFF
1kHz 102

86dBu
B. GAIN MIN
3-2. OMNI OUT 1 4
CH13 16
CH1XLR

CH1 ROUTING BUS 1 4 ON
OUTPUT PATCH OMNI nCH BUS nCH

CH13 16
OMNI OUT 1 4

1kHz 22dBu 0.01
1kHz 22dBu 0.01
CH13 16
OMNI OUT 1 4
CH IN 150
BUS OUT OFF

82dBu
86dBu

CH
CH 150 CH1XLR

MONITOR OUT LEVEL MAX
1kHz 22dBu 58dBu
L/R

1kHz 22dBu 0.01
2-9. CH IN 1 16
L/R
CHPHONE
STEREO OUT OFF
1 16CH

PEAK,SIGNAL LED
86dBu

87
01V96
3-4. PHONES OUT L/R 4-2. 2TR DIGITAL INCOAXIAL

CH1XLR System Two
MONITOR 2TR IN SW MONITOR STEREO OUT L/RXLR
PHONES LEVEL MAX WORD CLOCK2TR DIGITAL IN
L/R A. 96kHz
System Two Sample Rate
1kHz 10dBu 0.04 96kHz
2TR DIGITAL IN
L/R
PHONES LEVEL MIN 1kHz 20dBFS 4dBu 4 2dBu

110dBu f 2TR DIGITAL IN
1kHz
3-5. CH IN 1 16PHONE
STEREO OUT LXLR 20Hz 20dBFS 1.0 0.5dB
GAIN MINCH1 16PAD ON 40kHz 20dBFS 1.5 0.5dB
CH1 12
CH1 16 2TR DIGITAL IN

1kHz 22dBu 0.01 1kHz 22dBu 0.01
CH1 16 B. 48kHz
CH IN 150 System Two Sample Rate
48kHz
82dBu 2TR DIGITAL IN

4. DIGITAL IN/OUT 1kHz 22dBu 0.01
4-1. 2TR DIGITAL OUTCOAXIAL

4-3. adat IN/OUT OPTICAL
System Two
CH1XLR System Two
STEREO OUT L/RXLR
A. WORD CLOCK INT 96kHz CH1XLR
WORD CLOCK INT 96kHz
2TR DIGITAL OUT A. 48kHz

48kHz
1kHz 4dBu 20dBFS 20 2dBFS
f 2TR DIGITAL OUT adat IN

1kHz
1kHz 22dBu 0.01

20Hz 4dBu 1.0 0.5dB
40kHz 4dBu 1.5 0.5dB
B. 44.1kHz
2TR DIGITAL OUT 44.1kHz

adat IN
1kHz 2dBFS 0.01

B. WORD CLOCK INT 48kHz 1kHz 22dBu 0.01
WORD CLOCK INT 48kHz
2TR DIGITAL OUT

1kHz 2dBFS 0.01
88
01V96
4-4. WORD CLOCK IN2TR DIGITAL IN PLL WORD CLOCK IN2TR DIGITAL IN
WORD CLOCK
System Two 44.1kHz 10nsec
STEREO OUT L/RXLR 48kHz 10nsec
WORD CLOCK 88.2kHz 10nsec
WORD CLOCK IN : WC IN 96kHz 10nsec
2TR DIGITAL IN :2TR D
CH1XLR 6.

A. 96kHz 6101.76kHz ANALOG INPUTANALOG OUTPUT
WORD CLOCK IN CH1XLR CH9XLRCH16PHONE
96kHz 62TR DIGITAL IN STEREO OUT L/RXLR
System Two Sample
Rate 96kHz 6 EFFECT DSP6
WORD CLOCK IN2TR DIGITAL IN JADE_01

1kHz 22dBu 0.01 WORD CLOCKINT48kHz
ANALOG INPUTCH1
B. 44.1kHz 1039.69kHz 1 4
WORD CLOCK IN STEREO METER OVER
44.1kHz 102TR DIGITAL [GAIN]
INSystem TwoSample
Rate 44.1kHz 10
WORD CLOCK IN2TR DIGITAL IN 1(REVERB)
15
1kHz 22dBu 0.01
1EFFECT
5.
System Two 2
SecPK
BW700Hz to 100kHz
2TR DIGITAL OUT 214

2 14 EFFECT
5-1. WORD CLOCK INT

WORD CLOCK
2SYMPHONIC

3HQ PITCH
WORD CLOCK
4DYNAMIC FILTER
INT 44.1kHz 5nsec
5REVERB
INT 48kHz 5nsec
6SYMPHONIC
INT 88.2kHz 5nsec
7HQ PITCH
INT 96kHz 5nsec
8DYNAMIC FILTER
9REVERB
5-2. WORD CLOCK EXT
10SYMPHONIC
WORD CLOCK 11DYNAMIC FILTER
WORD CLOCK IN : WC IN 12REVERB
2TR DIGITAL IN : 2TR D 13SYMPHONIC
WORD CLOCK IN 14DYNAMIC FILTER

2TR DIGITAL INSystem Two
Sample Rate
89
01V96
SERVICE CHECK PROGRAM

Execute the Service Check Program for 01V96.
0. Outline (Fig. 3)
0-1. Operation method Example B of individual check screen (when checking each
Keys used for the service check on the panel one of multiple items automatically or visually)
[DEC] key: --- PANEL ALL LED ---

Used to exit or cancel
OK 1 BRIGHTNESS
the check NG 2 RED LEDs
OK 3 GREEN LEDs
OK 4 ORANGE LEDs
[ ], [ ], [ ], [ ] keys:
Used to select the check
item and OK/NG
[ENTER] key: Used to execute the selection or exit OK NG
EXIT ([DEC] Key->[ENTER] Key)

0-2. Screen explanation
(Fig. 1)
Example of screen for all of the check items 1) After starting the check, the OK/NG selection items are
displayed. Check the actions and results and then select
---01V96 test--- (C)YAMAHA 2003 OK/NG.
Use the [ ] and [ ] keys to select the item and press
F/W Ver. MAIN Vx.xx Version number of each CPU ROM
the [ENTER] key to execute the selection.
Each check result
2) When OK or NG is selected, the next check item is
OK 1 PLLP2 OK 21 LCD automatically displayed.
OK 2 BATT OK 22 PANEL LED
OK 4 DSP6,SIO NG 23 PANEL ALL LED 3) When the [DEC] key is pressed while waiting for the input
OK 5 DSP7,SIO,ATSC2 OK 24 PANEL SW of the OK/NG judgment, the exit display will reverse and
OK 6 MIDI OK 26 FADER Move
OK 11 2TR IN/OUT(DIO) OK 28 ENCODER The number of the selected this screen can be exited by pressing the [ENTER] key.
OK 12 ADAT item is displayed in reverse. (Even if part of one check item is being executed, exit is
OK 13 WORD CLOCK 98 MESSAGE LOG Selection method:
Use the [], [], [], or [] keys in the possible by pressing the [DEC] key.)
lower right of the panel to select items.
Press the [ENTER] key to display the
If exit is performed before all of the check items are
screen for the selected item. completed, the judgement in Fig. 1 is displayed as NG.
4) As shown in Fig. 3, the check items with numbers in front
EXIT ([DEC] Key->[ENTER] Key) of the items can be selected. Use the [ ] and [ ] keys to
select an item and press the [ENTER] key to start the
check. As shown in Fig. 2, the checks for the items that
(Fig. 2) do not have numbers in front of the items star t
Example A of individual check screen (when continuing with automatically.
check items based on automatic judgment)
0-3.List of check items
--- WORD CLOCK --- Item Check name Outline of check item Judge
1-1 PLLP2 Check the PLLP2 register by Read/Write. Auto
NG OUT->IN Checks are executed in order 1-2 BATT Check the voltage of the backup battery. Auto
OK PLL (DIR2, DBL) from the top automatically.
OK PLL UnLock The item being checked is 1-4 DSP6,SIO Check each DSP6 register by Read/Write and the SIO connection. Auto
displayed in reverse. 1-5 DSP7,SIO,ATSC2 Check each DSP7 register by Read/Write and the SIO and ATSC2 connections. Auto
1-6 MIDI MIDI OUT Check the IN Send/Receive. Auto
Display area of the instruction

message
NG: BNC_WCLK_48K_COUNT=1023 Display area of the NG message
Long messages are 1-11 2TR IN/OUT(DIO) Loopback and check the 2TR IN/OUT DIGITAL. Auto
displayed on two lines. 1-12 ADAT Loopback and check the ADAT. Auto
EXIT ([DEC] Key->[ENTER] Key) 1-13 WORD CLOCK Count the FS of WCLK OUT by WCLK IN and check the PLL LOCK. Semi-Auto
(Scroll up)
1) The check is executed automatically. When all items are 1-21 LCD Display the entire screen in black and white and check the contrast volume. Visual check
completed, the exit mode is activated. Press the [ENTER] 1-22 PANEL LED LEDs light in the specified order. Visual check
key to return to the screen in Fig. 1. 1-23 PANEL ALL LED All LEDs have gradual brightness and color differences. Visual check
1-24 PANEL SW Press the panel SWs in the specified order and check. Semi-Auto
2) To execute a check again, return to Fig. 1 and select the
item. 1-26 FADER Move Check the operation of the stop position of the FADER. Automatic
1-28 ENCODER Rotate the Encoder and check. Semi-Auto
90
01V96
1. Service Check 1-1.PLLP2 test

Common contents: Contents: Read/Write the Reg. (00, 0f, 10, 16) of
1) The contents of the Service Check Program and the PLLP2 to compare and check.
examples of the screens executed for each check
item are displayed. Example of execution screen
Common preparations:
--- PLLP2 ---
1) Check objective: 01V96
2) Cables: MIDI cable: 1 NG Adrs,Data BUS
COAXIAL cable: 1
BNC cable: 1
ADAT cable: 1
3) 01V96 starting method:
While pressing the [HOME (METER)] and [AUX4]
keys, turn the power ON. EXIT ([DEC] Key->[ENTER] Key)
During normal operation, press the [SEL] key in

the CH 6 7 1 1 order and press the [STORE] key
to display the dialog box for confirmation. Select 1-2.Battery test
Yes and press the [ENTER] key to restart the 01V96 Contents: The voltage of the backup battery by A/D
in the service check mode. is measured and judgment is automatic.
Service Check Connection Diagram Example of execution screen

--- BATT --- Certified voltage
range
2.80 V to 3.50 V
NG BATT
01V96 Below 0.5 V is
TO HOST USB NG: BATT NONE
NG:BATT (2.56V)
MIDI IN
OUT EXIT ([DEC] Key->[ENTER] Key)
THRU
2TR IN DIGITAL
1-4. DSP6 and SIO tests
1-5. DSP7, SIO, and ATSC2 tests
2TR OUT DIGITAL Contents: Read/Write the register of each DSP6
SLOT1 and DSP7 and check whether the Data
adat OUT Bus and Address Bus are good or bad.
adat IN Read/Write the DRAM and SDRAM of
each DSP6 and DSP7 via the registers
WORD CLOCK IN and compare and check.
WORD CLOCK OUT
Check the SIO connection between each
DSP and between the ATSC by the Send/
Receive signal.
If the ADAT cable is not connected during
the DSP7, SIO, and ATSC2 tests, NG is
displayed.
91
01V96
Example of execution screen 1-11. 2TR IN/OUT (DIO) test

Contents: Use the DSP SIO and check 2TR OUT
--- DSP6 --- DIGITAL 2TR IN DIGITAL.
All items are selected Preparation: Connect the 2TR IN DIGITAL to the 2TR
OK DSP6,SIO automatically and cannot
be selected manually. OUT DIGITAL of the unit with a cable.
Items are displayed one Example of execution screen

after another after 1:
1: CPU Interface (Data bus) during execution.
--- 2TR IN/OUT ---
NG: TxBusy Details are displayed
when NG is determined.
When there are many OK FS
OK OUT-->IN
--- DSP7 --- NG items, the display
stops after about 20 items. OK DIR Lock (RERR)
OK DSP7,SIO,ATSC2 OK DIT,DIR CDIN, CDOUT
NG: DIO_SIO 2TR1 [W:12485100 -> R:00000000]

1: CPU Interface (Data bus)
NG: BIF #01 0000 XXXX 0000
DSP6 test items DSP7 test items 1-12. ADAT test

1: CPU Interface (Data bus) 1: CPU Interface (Data Bus) Contents: Use the ATSC2 and check ADAT OUT
2: CPU Interface (Data bus) 2: CPU Interface (Chip Select) ADAT IN.
3: CPU Interface (Chip Select, TXB) 3: CPU Interface (Address Bus) Preparation: Connect the ADAT IN to the ADAT OUT
4: CPU Interface (Address bus) 4: E-RAM Interface (Data Bus) of the unit with a cable.
5: CPU Interface (BUS W/R Reg.) 5: E-RAM Interface (Address Bus)
6: DRAM Interface (Data Bus) 6: SIO Connection (DSP7 DSP6) Example of execution screen
7: DRAM Interface (Address Bus) 7: SIO Connection (DSP6 DSP7)
8: DRAM Interface (Address Bus & MPR) 8: SIO Connection (DSP7 DSP7) --- ADAT ---
9: SIO Connection 9: SIO Connection (ATSC DSP7) OK ADAT OUT->IN

(DSP6--->DSP6 SIO test) A: SIO Connection (DSP7 ATSC)
B: SIO Connection (ATSC ATSC)
OK: ADAT
Explanation of display when DSP6 and DSP7 are common
or NG EXIT ([DEC] Key->[ENTER] Key)
IC number
1) CPU Interface (Data Bus) ...NG: IC201
0000 0000 XXXX 0000 0000 0000 0000 X00X
MSB X=Error bit LSB
1-13. WORD CLOCK test
2) SIO Connection (DSP7 -> DSP6) ... Contents: WORD CLOCK OUT IN is counted by
NG: 1 IC201 S0[xx] -> IC301 SI[xx] PLLP2 and automatically checked (Fs =
44.1/48/88.2/96 kHz). For the PLL LOCK
1-6. MIDI test check, Read the UNLOCK signal and
Contents: Send/Receive the character string check when the clock is stable after the
SCI2:TESTn (n = 0Ah) from/to MIDI FS change (after about 200 ms).
OUT MIDI IN at 31.25 Kbps and check To confirm the UnLock, disconnect the
that the sent and received strings are cable connected to WORD CLOCK IN
identical. and check.
Preparation: Connect the MIDI IN connector to the Preparation: Connect the IN to the WORD CLOCK
MIDI OUT of the unit with a MIDI cable. OUT of the unit with the BNC cable.
Example of execution screen

--- MIDI Loopback ---
OK MIDI Check
OK: SCI2
92
01V96
Example of execution screen 1-23. PANEL LED test

Contents: 1. Check that the brightness of all of the
--- WORD CLOCK --- LEDs on the panel light in four grades.
OK OUT->IN 2. Light the red LEDs only and check that
OK PLL (DIR2,DBL) no other colors are present.
NG PLL UnLock
3. Light the green LEDs only and check that
no other colors are present.
Disconnect WORD CLOCK cable If this message is displayed,
disconnect the BNC cable
4. Light the orange LEDs only and check
NG:DBL_PLL_48K_COUNT=220 connected to the WORD that no other colors are present.
CLOCK IN and press the
[ENTER] key.
EXIT ([DEC] Key->[ENTER] Key) Example of execution screen
--- PANEL ALL LED ---
1-21. LCD test OK 1 BRIGHTNESS

OK 2 RED LEDs
Contents: Display the entire LCD screen in black OK 3 GREEN LEDs
and white alternatively and visually check. OK 4 ORANGE LEDs
[ENTER] key to Start
--- LCD ---
OK NG Good or bad
decision
OK Turn on LCD(white<-->black)
[ENTER] key to Start, [DEC] key to Stop
1-24. PANEL SW test

OK NG Good or bad Contents: Check that all of the switches on the panel
decision
respond when pressed in the specified
order (automatic judgement).
Check if the entire screen is displayed in black and Example of execution screen
white respectively.
When the entire screen is displayed in black, check --- PNL SW ---
for any dot flaws.
NG GROUP1
Check if the screen contrast changes when the contrast GROUP2
volume is changed.
If the above is confirmed, press the [DEC] key and

select OK/NG.
1-22. PANEL LED test EXIT ([DEC] Key->[ENTER] Key)

Contents: Visually check that the LEDs on the panel
light in the specified order. 1) See SW operation Fig. 1 and 2 in 2. Supplement
for operation order.
Example of execution screen 2) When the check starts, the LCD display changes
to the LCD display Fig. 1 in 2. Supplement. This
--- PANEL LED --- screen can be skipped if the [DEC] key is pressed.
OK 1 CH1..CH16 PEAK-SIGNAL For this reason, the [DEC] key is not included in
OK 2 FADER MODE..LAYER
OK 3 CH1..CH16, STEREO, ST IN1/3-2/4 SEL-SOLO-ON
the operation order.
OK 4 SOLO..SELECTD CHANNEL..ST IN
OK 5 USER DEFINED KEYS
OK 6 STEREO METER 1-26. FADER Move test
OK 7 ALL LED ON Contents: At first, manually move the FADER all
the way up and all the way down
[ENTER] key to Start according to instructions on the
execution screen. During this time, the
positions are checked and whether or not
OK NG Good or bad the values are correct is automatically
decision
judged using the built-in A/D.
Move all of the FADERs all the way up
See LED lighting order Fig. 1 and 2 in 2. Supplement and all the way down and the positions
for the lighting order. are checked and whether or not the
values are correct is automatically
judged using the built-in A/D.
93
01V96
Move all of the FADERs to the set (960...1020): Certified range when the FADER
positions (three positions) and the detects the stop position using the
positions are checked and whether or not built-in A/D (displayed in 1024
the values are correct is automatically resolution)
judged using the built-in A/D. 950: True value when the FADER Reads the stop
position using the built-in A/D (displayed in
Checking procedures 1024 resolution)
Select the item to start the check. (Check item 1 or
check item 5) 3) Explanation of the automatic judgment display of
When starting the check from check item 5, push the FADER positions 1 to 3
the [ ] cursor key once and move check item 5. CH_Pos 207, 862, (792...932)
207: Specified stop value (displayed in 256
Starting from check item 1 resolution)
q Press the [ENTER] key. 862: Stop position detected using the built-in A/
w Move all of the FADERs up. D (displayed in 1024 resolution)
e Manually move all of the FADERs all the way up. (792...932): Certified range when the FADER
r Press the [ENTER] key. detects the stop position using the
t OK is displayed. Move all of the FADERs down. built-in A/D (displayed in 1024
y Manually move all of the FADERs all the way down. resolution)
u Press the [ENTER] key. NG 02 (761)
i The FADERs are checked if they can automatically NG 02: CH2 FADER is NG.
move. (Check items 3 to 7) (761): True value when the FADER Reads the
o The judgment result is displayed. stop position using the built-in A/D
(displayed in 1024 resolution)
Starting from check item 5
q Press the [ENTER] key. 1-28. ENCODER test
w The FADERs are checked if they can Contents: Check the rotation response of the
automatically move. (Check items 5 to 7) Encoder.
e The judgment result is displayed. When the Encoder rotates clockwise, the
> mark on the left side moves to the right.
Example of execution screen The > mark changes to the < mark
when it reaches the right side. Then, when
--- FADER Move --- the Encoder rotates counterclockwise, the
NG 1 FADER Up Position < mark moves to the left. When the <
OK 2 FADER Down Position mark reaches the left side, the Encoder is
OK 3 FADER Up
NG 4 FADER Down
OK.
OK 5 FADER Position1 The Encoder rotates slowly.
OK 6 FADER Position2
OK 7 FADER Position3
[ENTER] key to Start --- ENCODER --- If the judgment is OK,
the test continues with
FADER Up OK PAN the check of the next
OK: OK Q channel automatically.
OK FREQUENCY If the judgment is not
1 OK NG OK GAIN OK, press the [DEC]
OK WHEEL key to move to the next
EXIT ([DEC] Key->[ENTER] Key) OK ST IN 1/3 check.
OK ST IN 2/4
1) Explanation of the automatic judgment display of

the FADER Up/Down positions When the Encoder
NG: CH 8, 940, (950...1023) moves in the specified
direction, the bar
940: Stop position detected using the built-in A/D moves accordingly.
CCW ------>---------- CW
(displayed in 1024 resolution) > indicates CW
(clockwise) rotation.
(950...1023): True value when the FADER Reads < indicates CCW
the stop position using the built-in (counterclockwise)
rotation.
A/D (displayed in 1024 resolution)
2) Explanation of the automatic judgment display of

the FADER Up/Down
NG: CH 1, 990, (960...1020), 950
990: Specified stop value (displayed in 1024
resolution)
94
01V96
1-98. MESSAGE LOG A maximum of 999 pages can be displayed in the log
Contents: The log of the check results is displayed. of the check results. Any additional pages will not be
displayed.
Example of execution screen To clear the log, end the Service Check Program or
press the [CLEAR] key of the SOLO.
--- MESSAGE LOG ---
[ 2 BATT]
NG:BATT (2.56V)
[ 6 MIDI]
OK: SCI2
BACK: [UP] NEXT: [DOWN] EXIT: [ENTER] Page 2
Press the [ ] key to display the next page and press

the [ ] key to display the previous page.
Press the [ENTER] key to exit this page.
2. Supplement
LCD display Fig. 1 Panel SW operation order screen
(See SW operation Fig. 1 and 2 for operation order.)
LCD display: 53 columns x 30 lines (320 240 dots with Font 57)
The [DEC] SW is not

displayed during the 1-24.
PANEL SW test.
A pressed SW
will disappear.
The next SW to
be pressed will flash.
Switches not pressed in the specified order display .

If pressed in the specified order, the normal display will return.
95
01V96
SW operation Fig. 1
GROUP1
3 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SW operation Fig. 2
GROUP2
1 2
3
4
7
5
The [DEC] SW is used to exit during the 1-24. PANEL SW test so do not check the [DEC] SW.
96
01V96
LED lighting order Fig. 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
LED lighting order Fig. 2
5 1
2
97
01V96
3. Audio Check Startup method
CAUTION! Keys on the panel used for the Audio Check

[WHEEL]:
Be sure to press the [END] button to complete Used for the route display
the Audio Check. If the [END] button is not selection and to move the
pressed and the power is turned OFF, the current cursor of the INPUT BUS/
AUX button.
memory data of the unit will be erased and the unit
will not return to the condition before the check. [ ], [ ], [ ], [ ] keys:
However, if the current memory data: Scene Used to move the cursor
Memory, Input Patch Library, Output Patch Library, [ENTER] key:
Surround Monitor Library, and Automix are saved Used to determine the
selection and ON/OFF
before starting the Audio Check, this data can be
recovered but other data must be reset. Startup method
3-1. Outline While pressing the [HOME (METER)] and [AUX5]

keys, turn the power ON.
Execute the Audio Check for 01V96.
Limits
Check method Possible operation keys are for the DATA ENTRY
SECTION only.
Insert the voice signal in the ANALOG, SLOT, and Parameters cannot be changed according to
2TR Digital input, select INPUT CH 1 to 48, and communication.
check the headphone output. If the voice signal LED displayed on the panel is for the STEREO
input is not correctly output, the LSI on the selected METER only.
signal route is faulty. FADER is not effective.
Because the built-in oscillator (1 kHz/-20 dB, sine Fixed parameters:
wave) is output to BUS 1 to 8 and AUX 1 to 8, INPUT BUS/AUX/STEREO OUT are all set to
select BUS 1 to 8 and AUX 1 to 8 and check nominal levels.
ANALOG, SLOT, and 2TR Digital output set in the Oscillator is output to all BUS/AUX.
OUT PORT. If the sine wave is not correctly output, The output of the Oscillator STEREO is OFF.
the LSI on the selected signal route is faulty. Oscillator waveform is set to 1 kHz.
Oscillator output is set to 20 dB.
ST swings the PAN to the left and right. The
others have the PAN centered.
Screen explanation
CLOCK
01V96 Audio Check (c) YAMAHA2003
FS
MODE CLOCK FS
MODE ANALOG SLOT ADAT INT 48k INT 48k END END
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
INPUT button
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
S1 S2 S3 S4
IC number
INPUT CH1 ADC DSP7-1 DSP7-2
route display
selection IN PORT IC103 IC201 IC202
INPUT route
INPUT1 16, 17 9 66 135 128 135
DSP7-3 DSP7-4
IC203 IC204 IC input PIN number
128 129 97 129 PHONE IC output PIN number
BUS, AUX buttons BUS AUX

1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
OUTPUT BUS1
route display
selection DSP7-4 DAC
IC204 IC151 OUTPUT
OUTPUT route
1kHz 130 6 22, 23 OMNI 1
98
01V96
MODE Changing the input/output terminals

ANALOG Patches the ANALOG I/O to the input/output.
SLOT Patches the SLOT I/O to the input/output.
ADAT Patches the ADAT and 2TRD I/O to the input/output.
CLOCK Changing the clock source

INT 44.1k
INT 48k
INT 88.2k
INT 96k
FS Displays the operation clock.
END Exits the Audio Check mode.
INPUT button Sets the INPUT CHANNEL to ON/OFF.

The INPUT route of the last CHANNEL set is displayed.
Multiple CHANNELs are not set to ON at the same time.
The voice of the CHANNEL set to ON is output to the C-R monitor (headphones).
INPUT route display selection Selects the route display.
INPUT route Displays the outline of the route of the signal selected by the INPUT route display selection.
BUS. AUX buttons Sets the OUTPUT CHANNEL to ON/OFF.

The OUTPUT route of the last CHANNEL set is displayed.
Multiple CHANNELs are not set to ON at the same time.
OUTPUT route display selection Selects the route display CHANNEL.
OUTPUT route Displays the outline of the route of the signal selected by the OUTPUT route display selection.
3-2. Check contents
Common contents:
1) The IN PORT and OUT PORT are determined by setting the INPUT CH and OUTPUT CH (BUS/AUX).
2) When the INPUT CH setting is S1...S4, the default STxL INPUT route is displayed.
To display the STxR INPUT route, manually change the INPUT route display selection.
Mode: Patch setting during ANALOG
INPUT CH IN PORT OUTPUT CH(BUS/AUX) OUT PORT

CH1 INPUT1 BUS1 OMNI1
CH5 INPUT5 BUS5 -
CH6 INPUT6 BUS6 -
CH7 INPUT7 BUS7 -
CH8 INPUT8 BUS8 -
CH9 INPUT9 AUX1 -
CH10 INPUT10 AUX2 -
CH11 INPUT11 AUX3 -
CH12 INPUT12 AUX4 -
CH13 INPUT13 AUX5 -
CH14 INPUT14 AUX6 -
CH15 INPUT15 AUX7 -
CH16 INPUT16 AUX8 -
CH17 INPUT1
99
01V96
CH18 INPUT2
CH19 INPUT3
CH20 INPUT4
CH21 INPUT5
CH22 INPUT6
CH23 INPUT7
CH24 INPUT8
CH25 INPUT9
CH26 INPUT10
CH27 INPUT11
CH28 INPUT12
CH29 INPUT13
CH30 INPUT14
CH31 INPUT15
CH32 INPUT16
ST1L(S1) INPUT1
ST1R(S1) INPUT2
ST2L(S2) INPUT3
ST2R(S2) INPUT4
ST3L(S3) INPUT5
ST3R(S3) INPUT6
ST4L(S4) INPUT7
ST4R(S4) INPUT8
Mode: Patch setting during SLOT

CH1 SLOT-1 BUS1 SLOT-1
CH9 SLOT-9 AUX1 SLOT-9
CH17 SLOT-1
CH18 SLOT-2
CH19 SLOT-3
CH20 SLOT-4
CH21 SLOT-5
CH22 SLOT-6
CH23 SLOT-7
CH24 SLOT-8
CH25 SLOT-9
CH26 SLOT-10
CH27 SLOT-11
CH28 SLOT-12
CH29 SLOT-13
100
01V96
CH30 SLOT-14
CH31 SLOT-15
CH32 SLOT-16
ST1L(S1) SLOT-1
ST1R(S1) SLOT-2
ST2L(S2) SLOT-3
ST2R(S2) SLOT-4
ST3L(S3) SLOT-5
ST3R(S3) SLOT-6
ST4L(S4) SLOT-7
ST4R(S4) SLOT-8
Mode: Patch setting during ADAT

CH1 ADAT-1 BUS1 ADAT-1
CH9 2TRD L AUX1 2TRD L
CH10 2TRD R AUX2 2TRD R
CH11 ADAT-1 AUX3 -
CH12 ADAT-2 AUX4 -
CH13 ADAT-3 AUX5 -
CH14 ADAT-4 AUX6 -
CH15 ADAT-5 AUX7 -
CH16 ADAT-6 AUX8 -
CH17 ADAT-7
CH18 ADAT-8
CH19 2TRD L
CH20 2TRD R
CH21 ADAT-1
CH22 ADAT-2
CH23 ADAT-3
CH24 ADAT-4
CH25 ADAT-5
CH26 ADAT-6
CH27 ADAT-7
CH28 ADAT-8
CH29 2TRD L
CH30 2TRD R
CH31 ADAT-1
CH32 ADAT-2
ST1L(S1) ADAT-3
ST1R(S1) ADAT-4
ST2L(S2) ADAT-5
ST2R(S2) ADAT-6
ST3L(S3) ADAT-7
ST3R(S3) ADAT-8
ST4L(S4) 2TRD L
ST4R(S4) 2TRD R
101
01V96

01V96
0. (Fig.3)
0-1.

--- PANEL ALL LED ---

[DEC]:EXIT
CANCEL OK 1 BRIGHTNESS
NG 2 RED LEDs
OK 3 GREEN LEDs
OK 4 ORANGE LEDs
[], [], [], []:

OK/NG

[ENTER]:EXIT OK NG
0-2.
(Fig.1)
1) OK/NG
OK/NG
---01V96 test--- (C)YAMAHA 2003 [] [][ENTER]
F/W Ver. MAIN Vx.xx CPUROMVer.

2) OKNG

OK 1 PLLP2 OK 21 LCD
OK 2 BATT OK 22 PANEL LED
3) O K / N G [ D E C ]
OK 4 DSP6,SIO NG 23 PANEL ALL LED EXIT[ENTER]
OK 5 DSP7,SIO,ATSC2 OK 24 PANEL SW
OK 6 MIDI OK 26 FADER Move ([DEC]
OK 11 2TR IN/OUT(DIO) OK 28 ENCODER EXIT
OK 12 ADAT
OK 13 WORD CLOCK 98 MESSAGE LOG [], [], [], [] EXITFig.1
NG
[ENTER]
4) Fig.3
[],[]
[ENTER]Fig.2

(Fig.2) 0-3.

1-1 PLLP2 PLLP2W/R
1-2 BATT
--- WORD CLOCK ---
1-4 DSP6,SIO DSP6W/RSIO
NG OUT->IN 1-5 DSP7,SIO,ATSC2 DSP7W/RSIO,ATSC2
OK PLL (DIR2, DBL) 1-6 MIDI MIDI OUTIN
OK PLL UnLock

1-11 2TR IN/OUT(DIO) 2TR IN/OUT DIGITALLoopBack

1-12 ADAT ADATLoopBack
NG: BNC_WCLK_48K_COUNT=1023 NG 1-13 WORD CLOCK WCLK OUTFsWCLK INPLLLOCK

2

() 1-21 LCD
1-22 PANEL LED LED
1-23 PANEL ALL LED LED
1) EXIT 1-24 PANEL SW SW
[ENTER]Fig.1
1-26 FADER Move FADER
2) Fig.1
1-28 ENCODER
102
01V96
1. 1-1 PLLP2test
PLLP2 Reg.(00,0f,10,16) W/R
1)

--- PLLP2 ---
1) 01V96 NG Adrs,Data BUS

2) MIDI 1
COAXIAL 1
BNC 1
ADAT 1
3) 01V96 [HOME(METER)]+[AUX4]
ON
[SEL]
CH6711[STORE]
1-2 BATTtest
YES A/D
[ENTER]01V96

--- BATT ---

2.80V3.50V
NG BATT 0.5VNG:
BATT NONE
01V96 NG:BATT (2.56V)
TO HOST USB
MIDI IN EXIT ([DEC] Key->[ENTER] Key)

OUT
THRU
2TR IN DIGITAL 1-4 DSP6,SIO test

1-5 DSP7,SIO,ATSC2 test
2TR OUT DIGITAL D S P 6 , D S P 7 R e g i s t e r W / R
SLOT1 DataBUS,AddressBUS
adat OUT DSP6,DSP7 DRAM,SDRAM Register
adat IN W/R
DSP ATSC SIO
WORD CLOCK IN
WORD CLOCK OUT
DSP7,SIO,ATSC2 testADAT
NG

--- DSP6 ---
OK DSP6,SIO

1:
NG: TxBusy NG
NG
20
--- DSP7 ---
OK DSP7,SIO,ATSC2

NG: BIF #01 0000 XXXX 0000

103
01V96
DSP6 DSP7 1-12 ADAT test

1: CPU Interface (Data bus) 1: CPU Interface (Data Bus) ADAT OUTADAT INATSC2
2: CPU Interface (Data bus) 2: CPU Interface (Chip Select)
3: CPU Interface (Chip Select, TXB) 3: CPU Interface (Address Bus) ADAT OUT ADAT IN
4: CPU Interface (Address bus) 4: E-RAM Interface (Data Bus)
5: CPU Interface (BUS W/R Reg.) 5: E-RAM Interface (Address Bus)
6: DRAM Interface (Data Bus) 6: SIO Connection (DSP7 DSP6)
7: DRAM Interface (Address Bus) 7: SIO Connection (DSP6 DSP7)
8: DRAM Interface (Address Bus & MPR) 8: SIO Connection (DSP7 DSP7) --- ADAT ---
9: SIO Connection 9: SIO Connection (ATSC DSP7) OK ADAT OUT->IN

(DSP6--->DSP6 SIO test) A: SIO Connection (DSP7 ATSC)
B: SIO Connection (ATSC ATSC)
OK: ADAT
DSP6,DSP7 NG
IC
...NG: IC201 EXIT ([DEC] Key->[ENTER] Key)
1) CPU Interface (Data Bus)
0000 0000 XXXX 0000 0000 0000 0000 X00X
MSB X= LSB
2) SIO Connection (DSP7 -> DSP6) ...

1-13 WORD CLOCK Test
NG: 1 IC201 S0[xx] -> IC301 SI[xx] WORD CLOCK OUTINPLLP2
(Fs=44.1/48/88.2/
96kHz)
1-6 MIDI test PLL LOCK FS
MIDI OUTMIDI IN 31.25Kbps ( 2 0 0 m s )
"SCI2:TESTn" (n=0Ah) UNLOCK Read
UnLock WORD CLOCK IN
MIDI OUT MIDI IN
MIDI WORD CLOCK OUT IN BNC

--- MIDI Loopback ---
OK MIDI Check --- WORD CLOCK ---
OK OUT->IN
OK PLL (DIR2,DBL)
OK: SCI2 NG PLL UnLock
EXIT ([DEC] Key->[ENTER] Key) Disconnect WORD CLOCK cable

WORD
NG:DBL_PLL_48K_COUNT=220 CLOCK IN
BNC

1-11 2TR IN/OUT(DIO) test [ENTER]
2TR OUT DIGITAL2TR IN DIGITAL
DSP SIO
2 T R O U T D I G I T A L 2 T R I N 1-21 LCD test
DIGITAL LCD

--- 2TR IN/OUT ---
--- LCD ---
OK FS
OK OUT-->IN OK Turn on LCD(white<-->black)
OK DIR Lock (RERR)
OK DIT,DIR CDIN, CDOUT [ENTER] key to Start, [DEC] key to Stop
OK NG
NG: DIO_SIO 2TR1 [W:12485100 -> R:00000000]
104
01V96
1-24 PANEL SW test

()

[DEC]OK/NG --- PNL SW ---
NG GROUP1
GROUP2
1-22 PANEL LED test

LED


--- PANEL LED ---
OK 1 CH1..CH16 PEAK-SIGNAL 1)
2. SW
OK 2 FADER MODE..LAYER
OK 3 CH1..CH16, STEREO, ST IN1/3-2/4 SEL-SOLO-ON
OK 4 SOLO..SELECTD CHANNEL..ST IN 2) LCD2.LCD
OK 5 USER DEFINED KEYS
OK 6 STEREO METER [DEC]
OK 7 ALL LED ON
[DEC]

1-26 FADER Move test

OK NG FADER
EXIT ([DEC] Key->[ENTER] Key) A/D

2. LED FADER
A/D

1-23 PANEL ALL LED test FADERA/
1. LED 4 D
3
2. LED

3. LED 1
5
4. LED 5
5
1
q [ENTER]
--- PANEL ALL LED --- w
OK 1 BRIGHTNESS e
OK 2 RED LEDs r [ENTER]
OK 3 GREEN LEDs
OK 4 ORANGE LEDs t
y
u [ENTER]
OK NG i

3 7
o
5
q [ENTER]
w

5 7
e
105
01V96

--- FADER Move --- --- ENCODER --- OK

NG 1 FADER Up Position OK PAN
OK 2 FADER Down Position OK Q OK
OK 3 FADER Up OK FREQUENCY [DEC]
NG 4 FADER Down OK GAIN
OK 5 FADER Position1 OK WHEEL
OK 6 FADER Position2 OK ST IN 1/3
OK 7 FADER Position3 OK ST IN 2/4
FADER Up
OK:
CCW ------>---------- CW Encoder
1 OK NG

EXIT ([DEC] Key->[ENTER] Key) >CW
<CCW

1) FADER Up/Down Position

1-98 MESSAGE LOG
NG: CH 8, 940, (950...1023)

940A/D(1024
)
(950...1023)FADERA/D
(1024 --- MESSAGE LOG ---
) [ 2 BATT]
NG:BATT (2.56V)
2) FADER Up/Down
NG: CH 1, 990, (960...1020), 950
[ 6 MIDI]
990(1024 ) OK: SCI2
(960...1020)FADERA/D
(1024
) BACK: [UP] NEXT: [DOWN] EXIT: [ENTER] Page 2
950FADER A/D
(1024 )
3) FADER Position1 3 [][]
CH_Pos 207,862(792...932)
207(256 ) [ENTER]
862A/D(1024
) 999
(792...932)FADER A/D
(1024
) SOLO [CLEAR]
NG 02(761)
NG 02CH2 FADER NG
(761)FADER A/D
(1024)
1-28 ENCODER test

Encoder
Encoder
">"">"
"<"
Encoder"<"
"<"
OK
Encoder
106
01V96
2.
LCD PANEL SW
( SW )
LCD 53 x30 (320x240dot Font5x7 )
[DEC] SW
1-24 PANEL SW test

SW

SW

SW

107
01V96
SW
GROUP1
3 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SW
GROUP2
1 2
3
4
7
5
[DEC] SW 1-24 PANEL SW test EXIT

[DEC] SW
108
01V96
LED
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
LED
5 1
2
109
01V96
3. Audio Check
Audio Check
Audio Check[END] [WHEEL]:

INPUTBUS/AUX

Audio Check [], [], [], []:
Scene Memory, Input Patch Library, Output
Patch Library, Surround Monitor Library, Automix [ENTER]:
ON/OFF

3-1.
[HOME(METER)]+[AUX5]
01V96 Audio Check ON
SLOT2TR Digital DATA ENTORY SECTION

INPUT CH1 48

LSI LEDSTEREO METER

1kHz/-20dB BUS1 FADER
8, AUX1 8 BUS1 8,
AUX1 8 OUT PORT INPUTBUS/AUX/STEREO OUT Level
SLOT2TR Digital
Oscillator BUS/AUX
LSI Oscillator STEREO OFF
Oscillator 1kHz
Oscillator -20dB
ST PAN LR
PAN
CLOCK
01V96 Audio Check (c) YAMAHA2003
FS
MODE CLOCK FS
MODE ANALOG SLOT ADAT INT 48k INT 48k END END
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
INPUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
S1 S2 S3 S4
IC
INPUT CH1 ADC DSP7-1 DSP7-2

IN PORT IC103 IC201 IC202
INPUT
INPUT1 16, 17 9 66 135 128 135
DSP7-3 DSP7-4
IC203 IC204 ICPIN
128 129 97 129 PHONE ICPIN
BUS AUX
BUS, AUX
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
OUTPUT BUS1

DSP7-4 DAC
IC204 IC151 OUTPUT
OUTPUT
1kHz 130 6 22, 23 OMNI 1
110
01V96
MODE
ANALOG I/O
SLOT SLOT I/O
ADAT ADAT 2TRD I/O
CLOCK
INT 44.1k
INT 48k
INT 88.2k
INT 96k
FS
END AudioCheck
INPUT INPUT CHANNEL ON/OFF

CHANNEL INPUT
CHANNEL ON
ON CHANNEL C-R ()
INPUT
INPUT INPUT
BUSAUX OUTPUT CHANNEL ON/OFF

CHANNEL OUTPUT
CHANNEL ON
OUTPUT CHANNEL
OUTPUT OUTPUT
3-2.

1) INPUT CHOUTPUT CH(BUS/AUX)IN PORTOUT PORT
2) INPUT CH S1..S4 STxL INPUT
STxR INPUT INPUT
MODE:ANALOG

CH5 INPUT5 BUS5 -
CH6 INPUT6 BUS6 -
CH7 INPUT7 BUS7 -
CH8 INPUT8 BUS8 -
CH9 INPUT9 AUX1 -
CH10 INPUT10 AUX2 -
CH11 INPUT11 AUX3 -
CH12 INPUT12 AUX4 -
CH13 INPUT13 AUX5 -
CH14 INPUT14 AUX6 -
CH15 INPUT15 AUX7 -
CH16 INPUT16 AUX8 -
CH17 INPUT1
111
01V96
CH18 INPUT2
CH19 INPUT3
CH20 INPUT4
CH21 INPUT5
CH22 INPUT6
CH23 INPUT7
CH24 INPUT8
CH25 INPUT9
CH26 INPUT10
CH27 INPUT11
CH28 INPUT12
CH29 INPUT13
CH30 INPUT14
CH31 INPUT15
CH32 INPUT16
ST1L(S1) INPUT1
ST1R(S1) INPUT2
ST2L(S2) INPUT3
ST2R(S2) INPUT4
ST3L(S3) INPUT5
ST3R(S3) INPUT6
ST4L(S4) INPUT7
ST4R(S4) INPUT8
MODE:SLOT

CH17 SLOT-1
CH18 SLOT-2
CH19 SLOT-3
CH20 SLOT-4
CH21 SLOT-5
CH22 SLOT-6
CH23 SLOT-7
CH24 SLOT-8
CH25 SLOT-9
CH26 SLOT-10
CH27 SLOT-11
CH28 SLOT-12
CH29 SLOT-13
112
01V96
CH30 SLOT-14
CH31 SLOT-15
CH32 SLOT-16
ST1L(S1) SLOT-1
ST1R(S1) SLOT-2
ST2L(S2) SLOT-3
ST2R(S2) SLOT-4
ST3L(S3) SLOT-5
ST3R(S3) SLOT-6
ST4L(S4) SLOT-7
ST4R(S4) SLOT-8
MODE:ADAT

CH9 2TRD L AUX1 2TRD L
CH10 2TRD R AUX2 2TRD R
CH11 ADAT-1 AUX3 -
CH12 ADAT-2 AUX4 -
CH13 ADAT-3 AUX5 -
CH14 ADAT-4 AUX6 -
CH15 ADAT-5 AUX7 -
CH16 ADAT-6 AUX8 -
CH17 ADAT-7
CH18 ADAT-8
CH19 2TRD L
CH20 2TRD R
CH21 ADAT-1
CH22 ADAT-2
CH23 ADAT-3
CH24 ADAT-4
CH25 ADAT-5
CH26 ADAT-6
CH27 ADAT-7
CH28 ADAT-8
CH29 2TRD L
CH30 2TRD R
CH31 ADAT-1
CH32 ADAT-2
ST1L(S1) ADAT-3
ST1R(S1) ADAT-4
ST2L(S2) ADAT-5
ST2R(S2) ADAT-6
ST3L(S3) ADAT-7
ST3R(S3) ADAT-8
ST4L(S4) 2TRD L
ST4R(S4) 2TRD R
113
01V96
INITIALIZING THE 01V9601V96
You can delete all currently-recorded settings and

restore the factory-preset values, and reset 01V96
the Operation Lock password to its initial setting. Follow
the steps below.
Note:
If you initialize the 01V96 to the factory-preset 01V96
values, all Scene, library and other data you
stored previously will be erased. Proceed with
caution.
If you want to keep the current internal data, be 01V96
sure to first back up the data using the included Studio Manager
Studio Manager software.
Tip:
You can also store the data to an external MIDI MIDI MIDI
device, such as a MIDI data filer, by using MIDI Bulk
Dump. (See page 115.) 117
2 While holding down the SCENE MEMORY [STORE] 2 SCENE MEMORY STORE
button, turn on the POWER ON/OFF switch. POWER ON/OFF
After a moment, the 01V96 displays the following
confirmation window.
3 To reset the 01V96 to factory default settings, move 3 INITIALIZE

the cursor to the INITIALIZE button, then press ENTER
[ENTER]. CANCEL
To cancel the initialization operation, move the cursor ENTER
to the CANCEL button, then press [ENTER]. 01V96
When the internal data is thoroughly overwritten, the
01V96 restarts using the factory settings.
4 To reset the Operation Lock password to its initial 4

setting, in Step 2, move the cursor to the PASSWORD 2 PASSWORD
button, then press [ENTER]. ENTER
The password is reset to 1234. 1234
If you do not take any action after the confirmation 2

window appears, the window automatically 01V96
closes and the 01V96 restarts without being initialized.
114
01V96
TRANSMITTING PARAMETER SETTINGS VIA MIDI (BULK DUMP)
You can back up data stored in the 01V96, such as libraries and Scenes, to an external MIDI device by using MIDI Bulk
Dump. In this way, you can later restore previous 01V96 settings by transmitting this MIDI data back to the 01V96.
Note: Some of the data transmitted from the 01V96 to the sequence software may occasionally drop out during Bulk
Dump transmission. To avoid this, we recommend that you use the included Studio Manager software to store 01V96
data to an external device.
1 Press the DISPLAY ACCESS [DIO/SETUP] button repeatedly until the DIO/Setup | MIDI/Host page appears, then
specify ports for transmission and reception of MIDI messages.
2 Make connections using the ports selected in Step 1 so that the 01V96 can transmit and receive MIDI messages to
and from the external device.
3 Press the DISPLAY ACCESS [MIDI] button, then press the [F4] button.
The MIDI | Bulk page appears.
The page includes the following parameters:
q CATEGORY section
This section enables you to select data for transmission and reception.
w REQUEST
Move the cursor to this button, then press [ENTER] to transmit messages from the 01V96 that request a second 01V96
(connected to the first 01V96) to transmit the data specified in the CATEGORY section. This button is used primarily when
two 01V96s are connected in cascade.
e TRANSMIT
Move the cursor to this button, then press [ENTER] to transmit data specified in the CATEGORY section to an external MIDI
device.
r INTERVAL
This parameter specifies the interval between data packets during bulk transmission in 50 millisecond steps. If the external
device drops part of the bulk data, increase this parameter value.
4 In the CATEGORY section, move the cursor to the button of the data type you want to transmit, then press [ENTER].
115
01V96
The following options are available:

ALL................................. This button selects all data available for bulk dump. When this button is turned on, all other
buttons in this section are turned off.
SCENEMEM....................This button selects Scene memories. You can select Scenes you wish to transmit in the parameter
box next to the button.
LIBRARY......................... This button selects libraries. You can select the type of library in the TYPE parameter box (next
to the button), then specify the library number in the parameter box on the right.
BANK.............................. This parameter enables you to select the User Defined Key banks (KEYS UDEF), User Defined
Remote Layer banks (RMD UDEF), or User Assignable Layer banks (USR LAYER) for bulk
dump. You can select one of these three types in the parameter box next to the button, and select
the banks in the parameter box on the right.
SETUPMEM ................... This button selects the 01V96 setup data (i.e., system settings).
PGM TABLE ...................This button selects the MIDI | Pgm Asgn page settings.
CTL TABLE..................... This button selects the MIDI | Ctl Asgn page settings.
PLUG-IN......................... This button selects the settings of an optional Y56K card installed in the slot. You can select
Y56K card programs in the parameter box next to the button..
Note: Data selected by the SETUPMEM button includes MIDI transmission and reception port settings and message
settings. After you store to an external device bulk dump data that has its reception disabled, if the 01V96 later starts to
receive this particular data, 01V96 bulk dump reception will be turned off immediately, and the 01V96 will be unable to
receive sub-sequent data. Therefore, before you store the data selected by the SETUPMEM button using Bulk Dump, be
sure to enable bulk data transmission and reception.
5 If necessary, move the cursor to the parameter box next to the selected button, then rotate the Parameter wheel or
press the [INC]/[DEC] buttons to select the desired bulk dump data.
Tip: If you selected [ALL] in the parameter box, all data selected by the corresponding button is transmitted as bulk dump
data.
6 To start transmitting bulk data, move the cursor to the TRANSMIT button, then press [ENTER].
Bulk Dump is executed. During the operation, the Bulk Dump window appears, indicating the current bulk dump status. To
abort the bulk dump operation, move the cursor to the CANCEL button in the window, then press [ENTER].
Tip: To transmit bulk dump request messages, move the cursor to the REQUEST button, then press [ENTER]. If you set
up the 01V96 so that it will transmit and receive MIDI messages to and from another 01V96, the other 01V96 will respond
to the bulk dump request and transmit the bulk dump data to the 01V96 you are operating.
7 To receive bulk data, press the DISPLAY ACCESS [MIDI] button again to display the MIDI | Setup page, then turn on
the Rx ON/OFF button in the BULK row.
Now, when the 01V96 receives bulk data, the corresponding internal data is updated.
116
01V96
MIDI
MIDI
MIDI 01V96

01V96
Studio Manager
1 DISPLAY ACCESS DIO/SETUPDIO/SETUP MIDI/HOST

MIDI
2 1 01V96 MIDI
3 DISPLAY ACCESS MIDIF4

MIDI BULK
q CATEGORY

w REQUEST
ENTER 1 01V96 CATEGORY
2 01V96

e TRANSMIT
ENTERCATEGORY MIDI

r INTERVAL
50

4 CATEGORY ENTER

117
01V96

ALL ......................

SCENEMEM .....

LIBRARY ............ TYPE

BANK .................. KEYS UDEFRMD
UDEF
USR LAYER

SETUPMEM .................. 01V96
PGM TABLE ..... MIDI PGM ASGN
CTL TABLE ....... MIDI CTL ASGN
PLUG IN....................... Y56K
Y56K
SETUPMEM MIDI MIDI

SETUPMEM

5 INC/DEC

ALL

6 TRANSMIT ENTER
BULK DUMP
CANCEL ENTER

TRANSMIT REQUEST ENTER

1 01V96 MIDI

7 DISPLAY ACCESS MIDI MIDI SETUP

BULK Rx ON/OFF
01V96
118
01V96
CHECKING THE BATTERY AND THE SYSTEM VERSION
The Utility | Battery page enables you to check the UTILITY BATTERY 01V96
condition of the internal memory-backup battery and
the system version number. To locate this page, press
the DISPLAY ACCESS [UTILITY] button repeatedly. DISPLAY ACCESS UTILITY

q Status q Status
If the Status is Okay, the battery has sufficient voltage Okay
for operation. If the Status is Voltage Low!, failure to Voltage Low!
replace a low battery may result in data loss.

w Ver X.XX (X.XX represents the version number.) w VerXXXX XXXX

This indicator identifies the system version number.
Check the current system version number before you
update the system software.
CALIBRATING THE FADERS

The 01V96 motorized fader positions may shift over time 01V96
depending on the operating conditions and environment.
You can correct the shifted faders using the Calibration
function.
2 While holding down the [ENTER] button, turn on the 2 ENTERPOWER ON/OFF
POWER ON/OFF switch.
After a moment, the 01V96 displays a message
indicating that the calibration is in progress.
Calibration takes about two minutes. It is important that 2
you do not touch the faders while this message is
displayed.
When calibration is finished, the 01V96 displays a page
that enables you to fine-tune the fader position.
3 Follow the instructions on the display and lower all 3

faders to , then press [ENTER]. ENTER
4 Set faders 116 to 15 and the Stereo fader to 30, 4 1 16 15

then press [ENTER]. STEREO 30
ENTER
5 Set faders 116 to 0, then press [ENTER]. 5 1 16 0

Proceed to the next step without moving the Stereo fader ENTER
this time. STEREO

6 Finally, set faders 116 to +10 and the Stereo fader 6 1 16 10 STEREO
to 0, then press [ENTER]. 0 ENTER
This is the end of the fader calibration process. The
01V96 restarts in normal mode.
01V96 119
01V96
MIDI DATA FORMAT

1. DATA FORMAT The following data types of parameter change are used by the 01V96.
Type (HEX) tx/rx function
1 (01) tx/rx Edit buffer
1.1 CHANNEL MESSAGE
2 (02) tx/rx Patch data
Command rx/tx function 3 (03) tx/rx Setup data
8n NOTE OFF rx Control the internal effects 4 (04) tx/rx Backup data
9n NOTE ON rx Control the internal effects 15 (0F) tx/rx Cascade data
Bn CONTROL CHANGE rx/tx Control parameters 16 (10) tx/rx Function (recall, store, title, clear)
Cn PROGRAM CHANGE rx/tx Switch scene memories 17 (11) rx Function (pair, copy)
18 (12) rx Function (effect)
1.2 SYSTEM COMMON MESSAGE 19 (13) tx/rx Sort table
20 (14) tx/rx Function (attribute, link)
Command rx/tx function
32 (20) rx Key remote
F1 MIDI TIME CODE QUARTER rx MTC
33 (21) tx/rx Remote meter
FRAME
34 (22) tx/rx Remote time counter
80 (50) tx/rx Function response (recall, store,
1.3 SYSTEM REALTIME MESSAGE title, clear)
84 (54) tx/rx Function response (attribute, link)
126 (7E) tx/rx Version
F8 TIMING CLOCK rx MIDI clock
127 (7F) tx Active sense
FE ACTIVE SENSING rx Check MIDI cable connections
FF RESET rx Clear running status * tx indicates that the data can be transmitted from the 01V96, and
rx indicates that the data can be received by the 01V96.
1.4 EXCLUSIVE MESSAGE
2. Format Details
1.4.1 Real Time System Exclusive
Command rx/tx function 2.1 NOTE OFF (8n)
F0 7F dd 06 F7 MMC tx MMC command
COMMAND Reception
F0 7F dd 07 F7 MMC RESPONSE rx MMC response If [OTHER ECHO] is ON, these message are echoed from MIDI OUT.
F0 7F dd 01 F7 MIDI TIME CODE rx MTC full message If the [Rx CH] matches, these messages are received and used to control effects.
STATUS 1000nnnn 8n Note off message
1.4.2 System Exclusive Message
DATA 0nnnnnnn nn Note number
0vvvvvvv vv Velocity(ignored)
1.4.2.1 Bulk Dump
F0 43 0n 7E F7 BULK DUMP BULK DUMP DATA
2.2 NOTE ON (9n)
DATA rx/tx Reception
F0 43 2n 7E F7 BULK DUMP BULK DUMP REQUEST If [OTHER ECHO] is ON, these messages are echoed from MIDI OUT.
REQUEST rx/tx
If the [Rx CH] matches, these messages are received and used to control effects.
The following data types of bulk dump are used on the 01V96.
STATUS 1001nnnn 9n Note on message
Data name tx/rx function DATA 0nnnnnnn nn Note number
m tx/rx Scene Memory & Request 0vvvvvvv vv Velocity(1-127:on, 0:off)
(compressed data)
S tx/rx Setup Memory & Request
R tx/rx Input patch library & Request 2.3 CONTROL CHANGE (Bn)
O tx/rx Output patch library & Request
Reception
H tx/rx Channel library & Request
If [Control Change ECHO] is ON, these messages are echoed from MIDI OUT.
G tx/rx Gate library & Request
If [TABLE] is selected, these message are received if [Control Change Rx] is ON,
Y tx/rx Compressor library & Request
and will control parameters according to the [Control assign table] settings.
Q tx/rx Equalizer library & Request
The parameters that can be set are defined in the Control Change Assign Pa-
E tx/rx Effect library & Request
rameter List.
P tx/rx Program change table & Request
If [NRPN] is selected, these messages are received if [Control Change Rx] is ON
C tx/rx Control change table & Request
and the [Rx CH] matches, and will control the parameter that is specified by the
L tx/rx User define layer & Request
four messages NRPN control number (62h, 63h) and Data Entry control num-
V tx/rx User define key & Request
ber (06h, 26h). Parameter settings are defined in the Control Change Assign Pa-
U tx/rx User assignable layer & Request
rameter List.
N tx/rx Plug-in Effect Card Data & Request
Transmission
1.4.2.2 PARAMTER CHANGE If [TABLE] is selected, operating a parameter specified in the [Control assign ta-
ble] will cause these messages to be transmitted if [Control Change Tx] is ON.
The parameters that can be specified are defined in the Control Change Assign
F0 43 1n 3E 0D F7 RARAMETER rx/tx 01V96-specific parameter change
CHANGE
Parameter List.
F0 43 3n 3E 0D F7 PARAMETER rx/tx 01V96-specific parameter change
If [NRPN] is selected, operating a specified parameter will cause data to be
REQUEST transmitted on the [Tx CH] if [Control Change Tx] is ON, using the four mes-
F0 43 1n 3E 7F F7 PARAMETER rx/tx General purpose digital mixer sages NRPN control number (62h, 63h) and Data Entry control number (06h,
CHANGE parameter change 26h). Parameter settings are defined in the Control Change Assign Parameter
F0 43 3n 3E 7F F7 PARAMETER rx/tx General purpose digital mixer List.
REQUEST parameter request This data cannot be transmitted via control change to Studio Manager since
there is no guarantee that the contents of the tables will match. (Parameter
Change messages will always be used.)
120
01V96
If [TABLE] is selected 2.8.2 BULK DUMP

STATUS 1011nnnn Bn Control change This message sends or receives the contents of various memories stored within
DATA 0nnnnnnn nn Control number (0-95, 102-119) the 01V96.
The basic format is as follows.
0vvvvvvv vv Control Value (0-127)
For DUMP DATA
If [NRPN] is selected F0 43 0n 7E cc cc <Model ID> tt mm mm [Data ] cs F7
STATUS 1011nnnn Bn Control change
For DUMP REQUEST
DATA 01100010 62 NRPN LSB F0 43 2n 7E <Model ID> tt mm mm F7
0vvvvvvv vv LSB of parameter number
n Device Number
STATUS 1011nnnn Bn Control change *1
cc cc DATA COUNT (the number of bytes that
DATA 01100011 63 NRPN MSB follow this, ending before the checksum)
0vvvvvvv vv MSB of parameter number 4C 4D 20 20 38 43 39 33 Model ID
STATUS 1011nnnn Bn Control change *1 tt DATA TYPE
DATA 00000110 06 MSB of data entry mm mm DATA NUMBER
0vvvvvvv vv MSB of parameter data cs CHECK SUM
STATUS 1011nnnn Bn Control change *1
A unique header (Model ID) is used to determine whether the device is a 01V96.
DATA 00100110 26 LSB of data entry
CHECK SUM is obtained by adding the bytes that follow BYTE COUNT
0vvvvvvv vv LSB of parameter data (LOW) and end before CHECK SUM, taking the binary compliment of this
*1) The second and subsequent STATUS need not be added during sum, and then setting bit 7 to 0.
transmission. Reception must be implemented so that reception oc- CHECK SUM = (-sum)&0x7F
curs whether or not STATUS is present. Reception
This message is received if [Bulk RX] is ON and the [Rx CH] matches the device
2.4 PROGRAM CHANGE (Cn) number included in the SUB STATUS.
When a bulk dump is received, it is immediately written into the specified
Reception
memory.
If [Program Change ECHO] is ON, these messages are echoed from MIDI
When a bulk dump request is received, a bulk dump is immediately transmit-
OUT.
ted.
If [Program Change RX] is ON and the [Rx CH] matches, these messages will
be received. However if [OMNI] is ON, they will be received regardless of the Transmission
channel. When a message is received, a Scene Memory will be recalled according This message is transmitted on the [Tx CH] by key operations in the [MI-
to the settings of the [Program Change Table]. DI]-[BULK DUMP] screen.
A bulk dump is transmitted on the [Rx CH] in response to a bulk dump request.
Transmission
The data area is handled by converting seven words of 8-bit data into eight
If [Program Change TX] is ON, this message is transmitted according to the set-
words of 7-bit data.
tings of the [Program Change Table] on the [Tx CH] channel when a scene
memory is recalled. Conversion from actual data into bulk data
If the recalled scene has been assigned to more than one program number, the d[0~6]: actual data
lowest-numbered program number will be transmitted. Transmission to Studio b[0~7]: bulk data
Manager using Program Change messages will not be performed since there is b[0] = 0;
no guarantee that the contents of the tables will match. (Parameter Changes will for( I=0; I<7; I++){
always be used.) if( d[I]&0x80){
STATUS 1100nnnn Cn Program change b[0] |= 1<<(6-I);
DATA 0nnnnnnn nn Program number (0-127) }
b[I+1] = d[I]&0x7F;
}
2.5 TIMING CLOCK (F8)
Restoration from bulk data into actual data
Reception
d[0~6]: actual data
It is used to control effects. This message is transmitted 24 times per quarter
b[0~7]: bulk data
note.
for( I=0; I<7; I++){
STATUS 11111000 F8 Timing clock b[0] <<= 1;
d[I] = b[I+1]+(0x80&b[0]);
2.6 ACTIVE SENSING (FE) }
Reception 2.8.2.1 Scene memory bulk dump format (compress)

Once this message has been received, the failure to receive any message for an
The 01V96 can transmit and receive scene memories in compressed form.
interval of 400 ms or longer will cause MIDI transmission to be initialized, such
as by clearing the Running Status. STATUS 11110000 F0 System exclusive message
ID No. 01000011 43 Manufactures ID number (YAMAHA)
STATUS 11111110 FE Active sensing
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
FORMAT No. 01111110 7E Universal bulk dump
2.7 SYSTEM RESET (FF) data count = ch * 128 + cl
COUNT HIGH 0ccccccc ch
Reception COUNT LOW 0ccccccc cl
When this message is received, MIDI communications will be cleared, e.g., by 01001100 4C L
clearing the Running Status. 01001101 4D M
STATUS 11111111 FF System reset 00100000 20
00100000 20
2.8 SYSTEM EXCLUSIVE MESSAGE (F0) 00111000 38 8
01000011 43 C
2.8.1 MIDI MACHINE CONTROL (MMC) 00111001 39 9
These messages are transmitted when the Machine Control section of the 01V96 00110011 33 3
is operated. For details, refer to the MMC specification. DATA NAME 01101101 6D m
0mmmmmmm m=0-99, 256, 8192(Scene0-99, EDIT
mh
BUFFER, UNDO)
0mmmmmmm ml Receive is effective 1-99, 256, 8192
121
01V96
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) 2.8.2.4 Setup memory bulk dump request format
0bbbbbbb bb current block number(0-total block number) STATUS 11110000 F0 System exclusive message
DATA 0ddddddd ds Scene data of block[bb] ID No. 01000011 43 Manufactures ID number (YAMAHA)
: : SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
0ddddddd de FORMAT No. 01111110 7E Universal bulk dump
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F 01001100 4C L
EOX 11110111 F7 End of exclusive 01001101 4D M
00100000 20
2.8.2.2 Scene memory bulk dump request format
00100000 20
(compress)
00111000 38 8
The second and third bytes of the DATA NAME indicate the scene number that
01000011 43 C
is being requested. If this is 256, the data of the Edit Buffer will be bulk-dumped.
00111001 39 9
If this is 8192, the data of the Undo Buffer will be bulk-dumped.
00110011 33 3
STATUS 11110000 F0 System exclusive message
DATA NAME 01010011 53 S
00000010 02
00000000 00 No.256 = Current
EOX 11110111 F7 End of exclusive
01001100 4C L
01001101 4D M
2.8.2.5 User Defined MIDI Remote bulk dump format
00100000 20
The second and third bytes of the DATA NAME indicate the bank number.
00100000 20 Be aware that the state of the transmission destination will (in some cases)
00111000 38 8 change if the same bank is being used.
01000011 43 C
00111001 39 9
00110011 33 3
DATA NAME 01101101 6D m
0mmmmmmm mh m=0-99, 256, 8192(Scene0-99, EDIT
BUFFER, UNDO) COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
0mmmmmmm ml COUNT LOW 0ccccccc cl

EOX 11110111 F7 End of exclusive 01001100 4C L
01001101 4D M
2.8.2.3 Setup memory bulk dump format 00100000 20
Of the setup memory of the 01V96, this bulk-dumps data other than the User 00100000 20
define layer, User define plug-in, User define keys, Control change table, and 00111000 38 8
Program change table. 01000011 43 C
STATUS 11110000 F0 System exclusive message 00111001 39 9
ID No. 01000011 43 Manufactures ID number (YAMAHA) 00110011 33 3
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) DATA NAME 01001100 4C L
FORMAT No. 01111110 7E Universal bulk dump 00000000 00

COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 0bbbbbbb bb b=0-3(bank no.1-4)
COUNT LOW 0ccccccc cl BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
01001100 4C L 0bbbbbbb bb current block number(0-total block number)
01001101 4D M DATA 0ddddddd ds User define layer data of block[bb]
00100000 20 : :
00100000 20 0ddddddd de
00111000 38 8 CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
01000011 43 C EOX 11110111 F7 End of exclusive
00111001 39 9
00110011 33 3 2.8.2.6 User Defined MIDI Remote bulk dump request
DATA NAME 01010011 53 S format
00000010 02 The second and third bytes of the DATA NAME indicate the bank number.
00000000 00 No.256 = Current STATUS 11110000 F0 System exclusive message
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) ID No. 01000011 43 Manufactures ID number (YAMAHA)
0bbbbbbb bb current block number(0-total block number) SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
DATA 0ddddddd ds Setup data of block[bb] FORMAT No. 01111110 7E Universal bulk dump
: : 01001100 4C L
0ddddddd de 01001101 4D M
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F 00100000 20
EOX 11110111 F7 End of exclusive 00100000 20
00111000 38 8
01000011 43 C
00111001 39 9
00110011 33 3
DATA NAME 01001100 4C L
00000000 00
0bbbbbbb bb b=0-3(bank no.1-4)
122
01V96
2.8.2.7 User Defined Keys bulk dump format BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
The second and third bytes of the DATA NAME indicate the bank number. 0bbbbbbb bb current block number(0-total block number)
Be aware that the state of the transmission destination will (in some cases) DATA 0ddddddd ds User assignable layer data of block[bb]
change if the same bank is being used. : :
STATUS 11110000 F0 System exclusive message 0ddddddd de
ID No. 01000011 43 Manufactures ID number (YAMAHA) CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) EOX 11110111 F7 End of exclusive
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 2.8.2.10 User Assignable Layer bulk dump request format
COUNT LOW 0ccccccc cl The second and third bytes of the DATA NAME indicate the bank number.
01001100 4C L STATUS 11110000 F0 System exclusive message
01001101 4D M ID No. 01000011 43 Manufactures ID number (YAMAHA)
00100000 20 SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
00100000 20 FORMAT No. 01111110 7E Universal bulk dump
00111000 38 8 01001100 4C L
01000011 43 C 01001101 4D M
00111001 39 9 00100000 20
00110011 33 3 00100000 20
DATA NAME 01010110 56 V 00111000 38 8
00000000 00 01000011 43 C
0bbbbbbb bb b=0-7(bank no.A-H) 00111001 39 9
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) 00110011 33 3
0bbbbbbb bb current block number(0-total block number) DATA NAME 01010101 55 U
DATA 0ddddddd ds User define key data of block[bb] 00000000 00
: : 0bbbbbbb bb b=0-3(bank no.1-4)
0ddddddd de EOX 11110111 F7 End of exclusive
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
EOX 11110111 F7 End of exclusive 2.8.2.11 Control change table bulk dump format
2.8.2.8 User Defined Keys bulk dump request format ID No. 01000011 43 Manufactures ID number (YAMAHA)
The second and third bytes of the DATA NAME indicate the bank number. SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
STATUS 11110000 F0 System exclusive message FORMAT No. 01111110 7E Universal bulk dump
ID No. 01000011 43 Manufactures ID number (YAMAHA) COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) COUNT LOW 0ccccccc cl
FORMAT No. 01111110 7E Universal bulk dump 01001100 4C L
01001100 4C L 01001101 4D M
01001101 4D M 00100000 20
00100000 20 00100000 20
00100000 20 00111000 38 8
00111000 38 8 01000011 43 C
01000011 43 C 00111001 39 9
00111001 39 9 00110011 33 3
00110011 33 3 DATA NAME 01000011 43 C
DATA NAME 01010110 56 V 00000010 02
00000000 00 00000000 00 No.256 = Current
0bbbbbbb bb b=0-7(bank no.A-H) BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
EOX 11110111 F7 End of exclusive 0bbbbbbb bb current block number(0-total block number)
DATA 0ddddddd ds Control change table data of block[bb]
2.8.2.9 User Assignable Layer bulk dump format : :
The second and third bytes of the DATA NAME indicate the bank number. 0ddddddd de
Be aware that the state of the transmission destination will (in some cases) CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
change if the same bank is being used. EOX 11110111 F7 End of exclusive
ID No. 01000011 43 Manufactures ID number (YAMAHA) 2.8.2.12 Control change table bulk dump request format
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) STATUS 11110000 F0 System exclusive message
FORMAT No. 01111110 7E Universal bulk dump ID No. 01000011 43 Manufactures ID number (YAMAHA)
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
COUNT LOW 0ccccccc cl FORMAT No. 01111110 7E Universal bulk dump
01001100 4C L 01001100 4C L
01001101 4D M 01001101 4D M
00100000 20 00100000 20
00100000 20 00100000 20
00111000 38 8 00111000 38 8
01000011 43 C 01000011 43 C
00111001 39 9 00111001 39 9
3 00110011 33 3
00110011 33
DATA NAME 01000011 43 C
DATA NAME 01010101 55 U
00000000 00 00000010 02
00000000 00 No.256 = Current
0bbbbbbb bb b=0-3(bank no.1-4)
123
01V96
2.8.2.13 Program change table bulk dump format 0bbbbbbb bb current block number(0-total block number)
STATUS 11110000 F0 System exclusive message DATA 0ddddddd ds EQ Library data of block[bb]
ID No. 01000011 43 Manufactures ID number (YAMAHA) : :

SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) 0ddddddd de
FORMAT No. 01111110 7E Universal bulk dump CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl EOX 11110111 F7 End of exclusive
COUNT LOW 0ccccccc cl

2.8.2.16 Equalizer library bulk dump request format
01001100 4C L
The second and third bytes of the DATA NAME indicate the bank number. (See
01001101 4D M
above)
00100000 20
00100000 20
00111000 38 8
01000011 43 C
00111001 39 9
01001100 4C L
00110011 33 3
01001101 4D M
DATA NAME 01010000 50 P
00100000 20
00000010 02
00100000 20
00000000 00 No.256 = Current
00111000 38 8
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
01000011 43 C
0bbbbbbb bb current block number(0-total block number)
00111001 39 9
DATA 0ddddddd ds Program change table data of block[bb]
00110011 33 3
: :
DATA NAME 01010001 51 Q
0ddddddd de
ee=(Invert(L++de)+1)&0x7F 0mmmmmmm mh 0-127(EQ Library no.1-128),
CHECK SUM 0eeeeeee ee
0mmmmmmm ml 256-(Channel current data)
2.8.2.14 Program change table bulk dump request format

2.8.2.17 Compressor library bulk dump format
The second and third bytes of the DATA NAME indicate the bank number.
0:Library no.1 127:Library no.128,
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) 256:CH1 287:CH32, 384:BUS1 391:BUS8, 512:AUX1 519:AUX8, 768:STE-
FORMAT No. 01111110 7E Universal bulk dump REO, 8192:UNDO
01001100 4C L 256 and following are data for the corresponding channel of the edit buffer.
01001101 4D M For reception by the 01V96, only the user area is valid. (36-127, 256-)
00100000 20 STATUS 11110000 F0 System exclusive message
00100000 20 ID No. 01000011 43 Manufactures ID number (YAMAHA)
00111000 38 8 SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
01000011 43 C FORMAT No. 01111110 7E Universal bulk dump
00111001 39 9 COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
00110011 33 3 COUNT LOW 0ccccccc cl
DATA NAME 01010000 50 P 01001100 4C L
00000010 02 01001101 4D M
00000000 00 No.256 = Current 00100000 20
EOX 11110111 F7 End of exclusive 00100000 20
00111000 38 8
2.8.2.15 Equalizer library bulk dump format 01000011 43 C
The second and third bytes of the DATA NAME indicate the bank number. 00111001 39 9
0:Library no.1 199:Library no.200, 3
00110011 33
256:CH1 287:CH32, 288:STEREO 1L 295:STEREO 4R, 384:BUS1
DATA NAME 01011001 59 Y
391:BUS8, 512:AUX1 519:AUX8, 768:STEREO, 8192:UNDO
0mmmmmmm mh 0-127(COMP Library no.1-128),
256 and following are data for the corresponding channel of the edit buffer.
For reception by the 01V96, only the user area is valid. (40-199, 256-) 0mmmmmmm ml 256-(Channel current data)
DATA 0ddddddd ds COMP Library data of block[bb]
: :
0ddddddd de
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
01001100 4C L
01001101 4D M
00100000 20
00100000 20
00111000 38 8
01000011 43 C
00111001 39 9
00110011 33 3
DATA NAME 01010001 51 Q
0mmmmmmm mh 0-127(EQ Library no.1-128),
124
01V96
2.8.2.18 Compressor library bulk dump request format 2.8.2.21 Effect library bulk dump format
The second and third bytes of the DATA NAME indicate the bank number. (See The second and third bytes of the DATA NAME indicate the bank number.
above) 0:Library no.1 127:Library no.128, 256:EFFECT1 259:EFFECT4, 8192:UN-
System exclusive message
DO
STATUS 11110000 F0
256-263 are the data for the corresponding area of the edit buffer.
For reception by the 01V96, only the user area is valid. (52-127, 256-259, 8192)
01001100 4C L
01001101 4D M
00100000 20
00100000 20
00111000 38 8 COUNT LOW 0ccccccc cl
01001100 4C L
01000011 43 C
01001101 4D M
00111001 39 9
00100000 20
00110011 33 3
00100000 20
DATA NAME 01011001 59 Y
00111000 38 8
0mmmmmmm mh 0-127(COMP Library no.1-128),
01000011 43 C
00111001 39 9
00110011 33 3
2.8.2.19 Gate library bulk dump format DATA NAME 01000101 45 E
The second and third bytes of the DATA NAME indicate the bank number. 0mmmmmmm mh 0-127(Effect Library no.1-128),
0:Library no.1 127:Library no.128, 256:CH1 287:CH32, 8192:UNDO 0mmmmmmm ml 256-259(Effect1-4 current)
256 and following are data for the corresponding channel of the edit buffer. BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
For reception by the 01V96, only the user area is valid. (4-127, 256-) 0bbbbbbb bb current block number(0-total block number)
STATUS 11110000 F0 System exclusive message DATA 0ddddddd ds Effect Library data of block[bb]

SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) 0ddddddd de
FORMAT No. 01111110 7E Universal bulk dump CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl EOX 11110111 F7 End of exclusive

01001100 4C L 2.8.2.22 Effect library bulk dump request format
01001101 4D M The second and third bytes of the DATA NAME indicate the bank number. (See

above)
00100000 20
00100000 20 STATUS 11110000 F0 System exclusive message
00111000 38 8 ID No. 01000011 43 Manufactures ID number (YAMAHA)
01000011 43 C SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
00111001 39 9 FORMAT No. 01111110 7E Universal bulk dump
00110011 33 3 01001100 4C L
DATA NAME 01000111 47 G 01001101 4D M
0mmmmmmm mh 0-127(GATE Library no.1-128), 00100000 20
0mmmmmmm ml 256-351(Channel current data) 00100000 20
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) 00111000 38 8
0bbbbbbb bb current block number(0-total block number) 01000011 43 C
DATA 0ddddddd ds GATE Library data of block[bb] 00111001 39 9
: : 00110011 33 3
0ddddddd de DATA NAME 01000101 45 E
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F 0mmmmmmm mh 0-127(Effect Library no.1-128),
EOX 11110111 F7 End of exclusive 0mmmmmmm ml 256-259(Effect1-4 current)
2.8.2.20 Gate library bulk dump request format
The second and third bytes of the DATA NAME indicate the bank number. (See 2.8.2.23 Channel library bulk dump format
above) The second and third bytes of the DATA NAME indicate the bank number.
0:Library no.0 128:Library no.128,
STATUS 11110000 F0
256:CH1 287:CH32, 288:STEREO 1L 295:STEREO 4R, 384:BUS1
391:BUS8, 512:AUX1 519:AUX8, 768:STEREO, 8192:UNDO
256 and following are data for the corresponding channel of the edit buffer.
FORMAT No. 01111110 7E Universal bulk dump For reception by the 01V96, only the user area is valid. (2-128, 256-)
01001100 4C L
01001101 4D M
00100000 20
00100000 20
00111000 38 8
01000011 43 C
00111001 39 9
01001100 4C L
00110011 33 3
01001101 4D M
DATA NAME 01000111 47 G
00100000 20
0mmmmmmm mh 0-127(GATE Library no.1-128),
00100000 20
0mmmmmmm ml 256-351(Channel current data)
00111000 38 8
01000011 43 C
125
01V96
00111001 39 9 2.8.2.26 Input patch library bulk dump request format

00110011 33 3 The second and third bytes of the DATA NAME indicate the bank number. (See
DATA NAME 01001000 48 H above)
0mmmmmmm mh 0-128(Channel Library no.0-128), STATUS 11110000 F0 System exclusive message
0mmmmmmm ml 256-(Current data) ID No. 01000011 43 Manufactures ID number (YAMAHA)
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
0bbbbbbb bb current block number(0-total block number) FORMAT No. 01111110 7E Universal bulk dump
DATA 0ddddddd ds Channel Library data of block[bb] 01001100 4C L
: : 01001101 4D M
0ddddddd de 00100000 20
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F 00100000 20
EOX 11110111 F7 End of exclusive 00111000 38 8
01000011 43 C
2.8.2.24 Channel library bulk dump request format 9
00111001 39
The second and third bytes of the DATA NAME indicate the bank number. (See 3
00110011 33
above)
DATA NAME 01010010 52 R
STATUS 11110000 F0 System exclusive message 0mmmmmmm mh 0-32(Input patch Library no.0-32),
ID No. 01000011 43 Manufactures ID number (YAMAHA) 0mmmmmmm ml 256(Current data)
01001100 4C L 2.8.2.27 Output patch library bulk dump format
01001101 4D M The second and third bytes of the DATA NAME indicate the bank number.
00100000 20 0:Library no.0 32:Library no.32, 256:current output patch data, 8192:UNDO
00100000 20 For reception by the 01V96, only the user area is valid. (1-32, 256)
00111000 38 8 STATUS 11110000 F0 System exclusive message
01000011 43 C ID No. 01000011 43 Manufactures ID number (YAMAHA)
00111001 39 9 SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
00110011 33 3 FORMAT No. 01111110 7E Universal bulk dump
DATA NAME 01001000 48 H COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
0mmmmmmm mh 0-128(Channel Library no.0-128), COUNT LOW 0ccccccc cl
0mmmmmmm ml 256-(Current data) 01001100 4C L
EOX 11110111 F7 End of exclusive 01001101 4D M
00100000 20
2.8.2.25 Input patch library bulk dump format 00100000 20
The second and third bytes of the DATA NAME indicate the bank number. 00111000 38 8
0:Library no.0 32:Library no.32, 256:current input patch data, 8192:UNDO C
01000011 43
For reception by the 01V96, only the user area is valid. (1-32, 256, 8192)
00111001 39 9
STATUS 11110000 F0 System exclusive message 00110011 33 3
ID No. 01000011 43 Manufactures ID number (YAMAHA) DATA NAME 01001111 4F O
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) 0mmmmmmm mh 0-32(Output patch Library no.0-32),
FORMAT No. 01111110 7E Universal bulk dump 0mmmmmmm ml 256(Current data)
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
COUNT LOW 0ccccccc cl 0bbbbbbb bb current block number(0-total block number)
01001100 4C L DATA 0ddddddd ds Output patch Library data of block[bb]
01001101 4D M : :
00100000 20 0ddddddd de
00100000 20 CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F
00111000 38 8 EOX 11110111 F7 End of exclusive
01000011 43 C
00111001 39 9 2.8.2.28 Output patch library bulk dump request format
00110011 33 3 The second and third bytes of the DATA NAME indicate the bank number. (See
DATA NAME 01010010 52 R above)
0mmmmmmm mh 0-32(Input patch Library no.0-32),
0mmmmmmm ml 256(Current data)
DATA 0ddddddd ds Input patch Library data of block[bb]
01001100 4C L
: : 01001101 4D M
0ddddddd de 00100000 20
00100000 20
00111000 38 8
01000011 43 C
00111001 39 9
00110011 33 3
DATA NAME 01001111 4F O
0mmmmmmm mh 0-32(Output patch Library no.0-32),
0mmmmmmm ml 256(Current data)
126
01V96
2.8.2.29 Plug-in effect card bulk dump format Transmission

The second byte of the DATA NAME indicates the slot number. If [Parameter change TX] is ON and you operate a parameter for which Control
0:SLOT 1 1:SLOT 2 Change transmission is not enabled, a parameter change will be transmitted
The data is not received if the Developer ID and Product ID are different than with [Tx CH] as the Device Number.
the card that is installed in the slot. As a response to a Parameter Request, a parameter change will be transmitted
The data is not transmitted if a valid plug-in effect card is not installed. with [Rx CH] as the Device Number.

2.8.3.1.1 Parameter change basic format
GROUP ID 00111110 3E MODEL ID (digital mixer)
MODEL ID 00001101 0D 01V96
01001100 4C L
ADDRESS 0ttttttt tt Data type
01001101 4D M
0eeeeeee ee Element no.
00100000 20
(If ee is 0, ee is expanded to two bytes)
00100000 20 0ppppppp pp Parameter no.
00111000 38 8 0ccccccc cc Channel no.
01000011 43 C DATA *) 0ddddddd dd data
00111001 39 9 : :
00110011 33 3 EOX 11110111 F7 End of exclusive
DATA NAME 01001110 4E N
m=0(SLOT 1)
*) For parameters with a data size of 2 or more, data for that size will be
0mmmmmmm mh
transmitted.
0mmmmmmm ml
BLOCK INFO. 0bbbbbbb bh current block number(0-total block number) 2.8.3.1.2 Parameter Change basic format (Universal
0bbbbbbb bl format)
0ttttttt th total block number(minimum number is 0)
0ttttttt tl Manufactures ID number (YAMAHA)
ID No. 01000011 43
0000iiii 0i Developer id (High)
0000iiii 0i Developer id (Low)
0000jjjj 0j Product id (High)
MODEL ID 01111111 7F Universal
0000jjjj 0j Product id (Low)
ADDRESS 0ttttttt tt Data type
DATA 0ddddddd ds Plug-in Effect card memory data of block[bb]
: : (If ee is 0, ee is expanded to two bytes)
0ddddddd de 0ppppppp pp Parameter no.
CHECK SUM 0eeeeeee ee ee=(Invert(L++de)+1)&0x7F 0ccccccc cc Channel no.
EOX 11110111 F7 End of exclusive DATA *) 0ddddddd dd data
: :
2.8.2.30 Plug-in effect card bulk dump request format EOX 11110111 F7 End of exclusive
The second and third bytes of the DATA NAME indicate the slot number. (See
*) For parameters with a data size of 2 or more, data for that size will be
above)
transmitted.
ID No. 01000011 43 Manufactures ID number (YAMAHA) 2.8.3.1.3 Parameter request basic format
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) STATUS 11110000 F0 System exclusive message
FORMAT No. 01111110 7E Universal bulk dump ID No. 01000011 43 Manufactures ID number (YAMAHA)
01001100 4C L SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel)
01001101 4D M GROUP ID 00111110 3E MODEL ID (digital mixer)
00100000 20 MODEL ID 00001101 0D 01V96
00100000 20 ADDRESS 0ttttttt tt Data type
00111000 38 8 0eeeeeee ee Element no.
01000011 43 C (If ee is 0, ee is expanded to two bytes)
00111001 39 9 0ppppppp pp Parameter no.

00110011 33 3 0ccccccc cc Channel no.
DATA NAME 01001110 4E N EOX 11110111 F7 End of exclusive
0mmmmmmm mh m=0(SLOT 1)
2.8.3.1.4 Parameter request basic format (Universal
0mmmmmmm ml
End of exclusive
format)
EOX 11110111 F7
2.8.3 PARAMETER CHANGE ID No. 01000011 43 Manufactures ID number (YAMAHA)
2.8.3.1 Basic behavior GROUP ID 00111110 3E MODEL ID (digital mixer)
Reception MODEL ID 01111111 7F Universal
If [Parameter change ECHO] is ON, these messages are echoed. ADDRESS 0ttttttt tt Data type
If [Parameter change RX] is ON and the [Rx CH] matches the Device Number 0eeeeeee ee Element no.
included in the SUB STATUS, these messages are received. A specific parameter (If ee is 0, ee is expanded to two bytes)
is controlled when a Parameter Change is received. When a Parameter Request 0ppppppp pp Parameter no.
is received, the current value of the specified parameter will be transmitted as a 0ccccccc cc Channel no.
Parameter Change with the Device Number set to [Rx CH]. EOX 11110111 F7 End of exclusive
127
01V96
2.8.3.1.5 Parameter Address : :

Consult your dealer for parameter address details. EOX 11110111 F7 End of exclusive
2.8.3.2 Parameter change (Edit buffer) 2.8.3.7 Parameter request (Setup memory)
STATUS 11110000 F0 System exclusive message STATUS 11110000 F0 System exclusive message
ID No. 01000011 43 Manufactures ID number (YAMAHA) ID No. 01000011 43 Manufactures ID number (YAMAHA)
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel)
GROUP ID 00111110 3E MODEL ID (digital mixer) GROUP ID 00111110 3E MODEL ID (digital mixer)
MODEL ID 01111111 7F Universal MODEL ID 00001101 0D 01V96
ADDRESS 00000001 01 Edit Buffer ADDRESS 00000011 03 Setup data
0eeeeeee ee Element no. 0eeeeeee ee Element no.
(If ee is 0, ee is expanded to two bytes) (If ee is 0, ee is expanded to two bytes)
0ppppppp pp Parameter no. 0ppppppp pp Parameter no.
0ccccccc cc Channel no. 0ccccccc cc Channel no.
DATA 0ddddddd dd data EOX 11110111 F7 End of exclusive
: :
EOX 11110111 F7 End of exclusive 2.8.3.8 Parameter change (Backup memory)
2.8.3.3 Parameter request (Edit buffer) ID No. 01000011 43 Manufactures ID number (YAMAHA)
STATUS 11110000 F0 System exclusive message SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
ID No. 01000011 43 Manufactures ID number (YAMAHA) GROUP ID 00111110 3E MODEL ID (digital mixer)
SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel) MODEL ID 00001101 0D 01V96
GROUP ID 00111110 3E MODEL ID (digital mixer) ADDRESS 00000100 04 Backup data
MODEL ID 01111111 7F Universal 0eeeeeee ee Element no.
ADDRESS 00000001 01 Edit Buffer
0ppppppp pp Parameter no.
(If ee is 0, ee is expanded to two bytes) 0ccccccc cc Channel no.
0ppppppp pp Parameter no. DATA 0ddddddd dd data
0ccccccc cc Channel no. : :
EOX 11110111 F7 End of exclusive EOX 11110111 F7 End of exclusive
2.8.3.4 Parameter change (Patch data) 2.8.3.9 Parameter request (Backup memory)
MODEL ID 00001101 0D 01V96 MODEL ID 00001101 0D 01V96
ADDRESS 00000010 02 Patch data ADDRESS 00000100 04 Backup data
0eeeeeee Element no.
ee 0eeeeeee Element no.
ee
(If ee is 0, ee is expanded to two bytes) (If ee is 0, ee is expanded to two bytes)
0ppppppp pp Parameter no. 0ppppppp pp Parameter no.
0ccccccc cc Channel no. 0ccccccc cc Channel no.
DATA 0ddddddd dd data EOX 11110111 F7 End of exclusive
: :
EOX 11110111 F7 End of exclusive 2.8.3.10 Parameter change (Cascade data)
Reception
2.8.3.5 Parameter request (Patch data) This message is echoed if [Parameter change ECHO] is ON.
STATUS 11110000 F0 System exclusive message Data received from a port that is assigned to [Cascade Link] and whose Device
ID No. 01000011 43 Manufactures ID number (YAMAHA) Number included in the SUB STATUS matches the [Rx CH] will be received for
n=0-15 (Device number=MIDI Channel)
processing.
SUB STATUS 0011nnnn 3n
When this is received, the specified parameter will be controlled.
MODEL ID 00001101 0D 01V96 STATUS 11110000 F0 System exclusive message
ADDRESS 00000010 02 Patch data ID No. 01000011 43 Manufactures ID number (YAMAHA)
0eeeeeee ee Element no. SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
(If ee is 0, ee is expanded to two bytes) GROUP ID 00111110 3E MODEL ID (digital mixer)
0ppppppp pp Parameter no. MODEL ID 01111111 7F Universal
0ccccccc cc Channel no. ADDRESS 00001111 0F Cascade data
EOX 11110111 F7 End of exclusive 0sssssss ss Set:0, Response:1
2.8.3.6 Parameter change (Setup memory) (If ee is 0, ee is expanded to two bytes)
0ccccccc cc Channel no.
DATA 0ddddddd dd data
MODEL ID (digital mixer)
: :
GROUP ID 00111110 3E
MODEL ID 00001101 0D 01V96
ADDRESS 00000011 03 Setup data
ee
0ccccccc cc Channel no.
DATA 0ddddddd dd data
128
01V96
2.8.3.11 Parameter request (Cascade data) 2.8.3.13 Parameter change (Function call response: Library
Reception store/recall)
This message is echoed if [Parameter change ECHO] is ON. Transmission
Data received from a port that is assigned to [Cascade Link] and whose Device If store/recall is executed by a parameter change received from Studio Manager,
Number included in the SUB STATUS matches the [Rx CH] will be received for the result of execution is transmitted as the following parameter change.
processing.
When this is received, the value of the specified parameter will be transmitted
as a Parameter response.
ADDRESS 01010000 50 Function call response
00ffffff ff function
0mmmmmmm mh number High
ADDRESS 00001111 0F Cascade data
0mmmmmmm ml number Low
ee
DATA 0ccccccc ch channel High
0ppppppp pp Parameter no. 0ccccccc cl channel Low
0ccccccc cc Channel no. 0eeeeeee ee result HH
EOX 11110111 F7 End of exclusive 0eeeeeee ee result HL

0eeeeeee ee result LH
2.8.3.12 Parameter change (Function call: Library store / 0eeeeeee ee result LL
recall) EOX 11110111 F7 End of exclusive
Reception
2.8.3.14 Parameter change (Function call: title)
When this is received, the specified memory/library will be stored/recalled. If
this is received from Studio Manager or Cascade Link, the operation will be ex- Reception
ecuted, and then the result of execution will be transmitted as a Parameter Re- When this is received, the title of the specified memory/library will be changed.
sponse. If this is received from Studio Manager or Cascade Link, the operation will be
executed, and then the result of execution will be transmitted as a parameter re-
Transmission
sponse.
If [Parameter change Tx] is ON, and you store or recall a memory/library for
which Program Change transmission is not valid, this message will be transmit- Transmission
ted with the Device Number set to the [Tx CH]. In response to a request, this is transmitted with the device number set to the
[Tx CH].
STATUS 11110000 F0
When the title is changed on the 01V96, this message will be transmitted with
the device number set to [Tx CH].
ADDRESS 00010000 10 Function call
00ffffff ff function
0100ffff 4f title
DATA 0ccccccc ch channel High
0ccccccc cl channel Low
DATA 0ddddddd dd title 1
: : :
function number channel*1) tx/rx 0ddddddd dd title x(depend on the library)
SCENE RECALL 0x00 0-99, 8192 256 tx/rx EOX 11110111 F7 End of exclusive
EQ LIB RECALL 0x01 1-128, 8192 0-513 tx/rx
GATE LIB RECALL 0x02 1-128, 8192 0-95 tx/rx
COMP LIB RECALL 0x03 1-128, 8192 0-513 tx/rx function number size
EFF LIB RECALL 0x04 1-128, 8192 0-3 tx/rx SCENE LIB TITLE 0x40 0-99,256(0:response only) 16
CHANNEL LIB RECALL 0x06 0-128, 8192 0-513 tx/rx EQ LIB TITLE 0x41 1-128(1-40:response only) 16
INPATCH LIB RECALL 0x07 0-32, 8192 256 tx/rx GATE LIB TITLE 0x42 1-128(1-4:response only) 16
OUTPATCH LIB RECALL 0x08 0-32, 8192 256 tx/rx COMP LIB TITLE 0x43 1-128(1-36:response only) 16
EFF LIB TITLE 0x44 1-128(1-52:response only) 16
SCENE STORE 0x20 1-99 256, 16383 tx/rx CHANNEL LIB TITLE 0x46 0-128(0:response only) 16
EQ LIB STORE 0x21 41-128 0-513, 16383 tx/rx INPATCH LIB TITLE 0x47 0-32(0:response only) 16
GATE LIB STORE 0x22 5-128 0-31, 16383 tx/rx OUTPATCH LIB TITLE 0x48 0-32(0:response only) 16
COMP LIB STORE 0x23 37-128 0-513, 16383 tx/rx
EFF LIB STORE 0x24 53-128 0-3, 16383 tx/rx
CHANNEL LIB STORE 0x26 1-128 0-513, 16383 tx/rx
INPATCH LIB STORE 0x27 1-32 256, 16383 tx/rx
OUTPATCH LIB STORE 0x28 1-32 256, 16383 tx/rx
*1) 0:CH1 31:CH32, 32:ST-IN1L - 39:ST-IN4R, 128:BUS1 135:BUS8,

256:AUX1 263:AUX8, 512:STEREO
Use 256 if the recall destination or store source is a single data item.
Effect is 0:Effect 13:Effect 4
If the store destination is 16383 (0x3FFF), this indicates that the li-
brary data has been changed by a external cause (such as bulk re-
ception)
(only transmitted by the 01V96)
129
01V96
2.8.3.15 Parameter request (Function call: title) 2.8.3.18 Parameter change (Function call response:
Reception Scene/Library Clear)
When this is received, a parameter change will be transmitted with the device Transmission
number set to [Rx CH]. When a scene or library is cleared as a result of receiving a parameter change
Refer to the above table for the Functions and Numbers. from Studio Manager, the result of execution will be transmitted as the follow-
STATUS 11110000 F0 System exclusive message ing parameter change.
ID No. 01000011 43 Manufactures ID number (YAMAHA) STATUS 11110000 F0 System exclusive message
SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel) ID No. 01000011 43 Manufactures ID number (YAMAHA)
GROUP ID 00111110 3E MODEL ID (digital mixer) SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
MODEL ID 01111111 7F Universal GROUP ID 00111110 3E MODEL ID (digital mixer)
ADDRESS 00010000 10 Function call MODEL ID 01111111 7F Universal
0100ffff 4f title ADDRESS 01010000 50 Function call
0mmmmmmm mh number High 0110ffff 6f clear function
0mmmmmmm ml number Low 0mmmmmmm mh number High
EOX 11110111 F7 End of exclusive 0mmmmmmm ml number Low
DATA 0eeeeeee ee result HH
2.8.3.16 Parameter change (Function call response: title) 0eeeeeee ee result HL
Transmission 0eeeeeee ee result LH

If the title is modified by a parameter change received from Studio Manager, the 0eeeeeee ee result LL
result of execution will be transmitted as the following parameter change. EOX 11110111 F7 End of exclusive

Manufactures ID number (YAMAHA)
2.8.3.19 Parameter change (Function call: attribute)
ID No. 01000011 43
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) Reception
GROUP ID 00111110 3E MODEL ID (digital mixer) This is received if [Parameter change RX] is ON and the [Rx CH] matches the
MODEL ID 01111111 7F Universal device number included in the SUB STATUS. This is echoed if [Parameter
Function call
change ECHO] is ON.
ADDRESS 01010000 50
When this is received, the attribute of the specified memory/library will be
0100ffff 4f title
changed.
0mmmmmmm ml number Low Transmission
result HH
In response to a request, a Parameter Change message will be transmitted on the
DATA 0eeeeeee ee
[Rx CH].
0eeeeeee ee result HL
If [Parameter change ECHO] is ON, this message will be retransmitted without
0eeeeeee ee result LH
change.
0eeeeeee ee result LL
2.8.3.17 Parameter change (Function call: Scene/Library
Clear)
Reception Function call
ADDRESS 00010100 14
When this is received, the specified memory/library will be cleared. If this is re-
0000ffff 0f attribute
ceived from Studio Manager or Cascade Link, the operation will be executed,
and then the result of execution will be transmitted as a parameter response.
Transmission attribute(protect:0x2000, normal:0x0000)
DATA 0ttttttt tt
When a memory or library is cleared on the 01V96, this message will be trans-
0ttttttt tt
mitted with the device number set to [Tx CH].
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) function number
GROUP ID 00111110 3E MODEL ID (digital mixer) SCENE LIB ATTRIBUTE 0x00 0-99(0:response only)
EQ LIB ATTRIBUTE 0x01 1-128(1-40:response only)
GATE LIB ATTRIBUTE 0x02 1-128(1-4:response only)
COMP LIB ATTRIBUTE 0x03 1-128(1-36:response only)
0110ffff 6f clear function
EFF LIB ATTRIBUTE 0x04 1-128(1-52:response only)
CHANNEL LIB ATTRIBUTE 0x06 0-128(0:response only)
0mmmmmmm ml number Low INPATCH LIB ATTRIBUTE 0x07 0-32(0:response only)
EOX 11110111 F7 End of exclusive OUTPATCH LIB ATTRIBUTE 0x08 0-32(0:response only)
function number
SCENE LIB CLEAR 0x60 1-99
EQ LIB CLEAR 0x61 41-128
GATE LIB CLEAR 0x62 5-128
COMP LIB CLEAR 0x63 37-128
EFF LIB CLEAR 0x64 53-128
CHANNEL LIB CLEAR 0x66 1-128
INPATCH LIB CLEAR 0x67 1-32
OUTPATCH LIB CLEAR 0x68 1-32
130
01V96
2.8.3.20 Parameter request (Function call: attribute) 2.8.3.23 Parameter request (Function call: link)
Reception Reception
This is received if [Parameter change RX] is ON and the [Rx CH] matches the This is received if [Parameter change RX] is ON and the [Rx CH] matches the
device number included in the SUB STATUS. This is echoed if [Parameter device number included in the SUB STATUS. This is echoed if [Parameter
change ECHO] is ON. change ECHO] is ON.
When this is received, a Parameter Change message will be transmitted on the When this is received, a Parameter Change message will be transmitted on the
[Rx CH]. [Rx CH].
Refer to the above table for the Functions and Numbers. Refer to the above table for the Functions and Numbers.
MODEL ID 01111111 7F Universal MODEL ID 01111111 7F Universal
ADDRESS 00010100 14 Function call ADDRESS 00010100 14 Function call
0000ffff 0f attribute 0010ffff 2f link
0mmmmmmm mh number High 0mmmmmmm mh number High
0mmmmmmm ml number Low 0mmmmmmm ml number Low
EOX 11110111 F7 End of exclusive EOX 11110111 F7 End of exclusive
2.8.3.21 Parameter change (Function call response: 2.8.3.24 Parameter change (Function call response: link)
attribute) Transmission
Transmission When link data is modified as a result of receiving a parameter change from Stu-
When an attribute is modified as a result of receiving a parameter change from dio Manager, the result of execution will be transmitted as the following param-
Studio Manager, the result of execution will be transmitted as the following pa- eter change.
rameter change. STATUS 11110000 F0 System exclusive message
STATUS 11110000 F0 System exclusive message ID No. 01000011 43 Manufactures ID number (YAMAHA)
ID No. 01000011 43 Manufactures ID number (YAMAHA) SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) GROUP ID 00111110 3E MODEL ID (digital mixer)
GROUP ID 00111110 3E MODEL ID (digital mixer) MODEL ID 01111111 7F Universal
MODEL ID 01111111 7F Universal ADDRESS 01010100 54 Function call
ADDRESS 01010100 54 Function call 0010ffff 2f link
0000ffff 0f attribute 0mmmmmmm mh number High
0mmmmmmm mh number High 0mmmmmmm ml number Low
0mmmmmmm ml number Low DATA 0eeeeeee ee result HH
DATA 0eeeeeee ee result HH 0eeeeeee ee result HL
0eeeeeee ee result HL 0eeeeeee ee result LH
0eeeeeee ee result LH 0eeeeeee ee result LL
0eeeeeee ee result LL EOX 11110111 F7 End of exclusive
2.8.3.25 Parameter change (Function call: pair, copy)
2.8.3.22 Parameter change (Function call: link) Reception
Reception This is received if [Parameter change RX] is ON and the [Rx CH] matches the
This is received if [Parameter change RX] is ON and the [Rx CH] matches the device number included in the SUB STATUS. This is echoed if [Parameter
device number included in the SUB STATUS. This is echoed if [Parameter change ECHO] is ON.
change ECHO] is ON. When this is received, pairing will be enabled/disabled for the specified channel.
When this is received, the patch link data of the specified scene will be modified. STATUS 11110000 F0 System exclusive message
Transmission ID No. 01000011 43 Manufactures ID number (YAMAHA)
In response to a request, a Parameter Change message will be transmitted on the SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
[Rx CH]. GROUP ID 00111110 3E MODEL ID (digital mixer)
If [Parameter change ECHO] is ON, this message will be retransmitted without MODEL ID 01111111 7F Universal
change. Function call Pair
ADDRESS 00010001 11
STATUS 11110000 F0 System exclusive message 0000ffff 0f function
ID No. 01000011 43 Manufactures ID number (YAMAHA) 0sssssss sh Source channel H
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) 0sssssss sl Source channel L
GROUP ID 00111110 3E MODEL ID (digital mixer) DATA 0ddddddd dh Destination channel H
MODEL ID 01111111 7F Universal 0ddddddd dl Destination channel L
ADDRESS 00010100 14 Function call EOX 11110111 F7 End of exclusive
0010ffff 2f link
function channel
PAIR ON with COPY 0x00 *1)
DATA 0iiiiiii ih inpatch
PAIR ON with RESET BOTH 0x01 *1)
0iiiiiii il PAIR OFF 0x02 *1)
0ooooooo oh outpatch
*1) 0:CH1 31:CH32, 128:BUS1 135:BUS8, 256:AUX1 263:AUX8,
0ooooooo ol
512:STEREO
EOX 11110111 F7 End of exclusive Effect is 0:Effect 13:Effect 4
In the case of PAIR, you must specify channels for which pairing is pos-
sible.
function number In the case of PAIR ON with COPY, you must specify Source Channel
SCENE LIB LINK 0x20 0-99(0:response only) as the copy source, and Destination Channel as the copy destination.
131
01V96
2.8.3.26 Parameter change (Function call Event: Effect ) 2.8.3.29 Parameter change (Key remote)
Reception Reception
device number included in the SUB STATUS. device number included in the SUB STATUS.
This is echoed if [Parameter change ECHO] is ON. This is echoed if [Parameter change ECHO] is ON.
When this is received, the corresponding effects function activates (depending When this is received, the same processing that is executed when the key speci-
on the effect type). fied by Address is pressed (released).
STATUS 11110000 F0 System exclusive message Transmission
ID No. 01000011 43 Manufactures ID number (YAMAHA) If [Parameter Change ECHO] is ON, this message is retransmitted without
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) change.
GROUP ID 00111110 3E MODEL ID (digital mixer) STATUS 11110000 F0 System exclusive message
MODEL ID 01111111 7F Universal ID No. 01000011 43 Manufactures ID number (YAMAHA)
ADDRESS 00010010 12 Function call Effect Event SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
0000ffff 0f function GROUP ID 00111110 3E MODEL ID (digital mixer)
00000000 00 MODEL ID 00001101 0D 01V96
0ppppppp pp Release:0, Press:1 ADDRESS 00100000 20 Key remote
DATA 00000000 00 0kkkkkkk kk Key address H
0eeeeeee ee Effect number (0:Effect1 - 3:Effect4) 0kkkkkkk kk Key address M
EOX 11110111 F7 End of exclusive 0kkkkkkk kk Key address L
DATA 0ppppppp pp Release:0, Press:1
function channel
Freeze Play button 0x00 0:Effect1-3:Effect4
Freeze Record button 0x01 0:Effect1-3:Effect4
2.8.3.30 Parameter change (Remote Meter)
When transmission is enabled by receiving a Request of Remote meter, the
This does not activate when the effect type is different. specified meter information is transmitted every 50msec for 10 seconds. When
you want to transmit meter information continuously, a Request must be trans-
2.8.3.27 Parameter change (Sort Table)
mitted continuously within every 10 seconds.
When scene memory sort is executed on the 01V96, the memory sort table will
be transmitted to Studio Manager. Reception
Studio Manager will sort the memories according to this data. This is echoed if [Parameter change ECHO] is ON.
If Studio Manager performs a scene memory sort, it will transmit this data to Transmission
the 01V96. When transmission has been enabled by a Request, the parameter specified by
STATUS 11110000 F0 System exclusive message Address will be transmitted on the [Rx CH] channel at 50 msec intervals for a
ID No. 01000011 43 Manufactures ID number (YAMAHA) duration of 10 seconds.
n=0-15 (Device number=MIDI Channel)
Transmission will be disabled if the power is turned off and on again, or if the
SUB STATUS 0001nnnn 1n
PORT setting is changed.
If [Parameter Change ECHO] is ON, this message is retransmitted without
MODEL ID 00001101 0D 01V96
change.
ADDRESS 00010011 13 Library sort table
0000ffff 0f Library type
DATA 0ddddddd ds Data
: :
0ddddddd de Data
MODEL ID 00001101 0D 01V96
ADDRESS 00100001 21 Remote meter
8-7 conversion is performed on the data area in the same way as for bulk. 0mmmmmmm mm ADDRESS UL
0mmmmmmm mm ADDRESS LU
2.8.3.28 Parameter request (Sort Table) ADDRESS LL
0mmmmmmm mm
When the 01V96 receives this data, it will transmit Sort Table Data. DATA 0ddddddd dd Data1 H
STATUS 11110000 F0 System exclusive message 0ddddddd dd Data1 L

GROUP ID 00111110 3E MODEL ID (digital mixer) * Meter data uses the unmodified DECAY value of the DSP. The inter-
MODEL ID 00001101 0D 01V96 pretation of the data will depend on the parameter.
ADDRESS 00010011 13 Library sort table
0000ffff 0f Library type
132
01V96
2.8.3.31 Parameter request (Remote Meter) 2.8.3.33 Parameter request (Remote Time Counter)
Reception Reception
device number included in the SUB STATUS. This is echoed if [Parameter device number included in the SUB STATUS. This is echoed if [Parameter
change ECHO] is ON. change ECHO] is ON.
When this is received, data of the specified address is transmitted on the [Rx When this is received, the Time Counter information is transmitted on the [Rx
CH] at intervals of 50 msec as a rule (although this may not be the case if the CH] channel every 50 msec for 10 seconds.
port is being used by other communication), for a period of 10 seconds. When the second byte of Address is received on 0x7F, data transmission will be
If Address UL= 0x7F is received, transmission of all meter data will be halted halted immediately. (disable)
immediately. (disable)
Transmission
Transmission If [Parameter Change ECHO] is ON, this message is retransmitted without
If [Parameter Change ECHO] is ON, this message is retransmitted without change.
change. System exclusive message
STATUS 11110000 F0
STATUS 11110000 F0 System exclusive message ID No. 01000011 43 Manufactures ID number (YAMAHA)
ID No. 01000011 43 Manufactures ID number (YAMAHA) SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel)
SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel) GROUP ID 00111110 3E MODEL ID (digital mixer)
GROUP ID 00111110 3E MODEL ID (digital mixer) MODEL ID 00001101 0D 01V96
MODEL ID 00001101 0D 01V96 ADDRESS 00100010 22 Remote Time counter
ADDRESS 00100001 21 Remote meter 0ddddddd 0:Transmission request,
dd
0mmmmmmm mm ADDRESS UL 0x7F:Transmission stop request
0mmmmmmm mm ADDRESS LU EOX 11110111 F7 End of exclusive

0mmmmmmm mm ADDRESS LL
0ccccccc ch Count H
0ccccccc cl Count L
2.8.3.32 Parameter change (Remote Time Counter)

When transmission is enabled by receiving a Request of Remote Time Counter,
the Time Counter data is transmitted every 50 msec for 10 seconds. When you
want to transmit Counter information continuously, a Request must be trans-
mitted within every 10 seconds.
Reception
This is echoed if [Parameter change ECHO] is ON.
Transmission
When transmission is enabled by receiving a Request, the Time Counter infor-
mation is transmitted on [RxCH] channel every 50 msec for 10 seconds.
Transmission will be disabled if the power is turned off and on again, or if the
PORT setting is changed.
If [Parameter Change ECHO] is ON, this message is retransmitted without
change.
MODEL ID 00001101 0D 01V96
ADDRESS 00100010 22 Remote Time counter
0000tttt 0t 0:Time code, 1:Measure.Beat.Clock
0ddddddd dd Hour / Measure H
0ddddddd dd Minute / Measure L
DATA 0ddddddd dd Second / Beat
0ddddddd dd Frame / Clock
133
01V96
YAMAHA [Digital Mixing Console-Internal Parameters] Date: 26 Aug. 2002

Model: 01V96 MIDI Implementation Chart Version: 1.0
Function... Transmitted Recognized Remarks
Basic Default 116 116

Memorized
Channel Changed 116 116
Default X OMNI off/OMNI on

Mode Messages X X Memorized
Altered ************** X
Note X 0127
True Voice
Number ************** X
Note On X O
Velocity Effect Control
Note Off X O
Keys X X
After
Chs X X
Pitch Bend X X
Control
0-95,102-119 O O Assignable
Change
Prog 0127 0127

Assignable
Change :True# ************** 099
System Exclusive O O *1
:Song Pos X X
System
:Song Sel X X
Common
:Tune X X
System :Clock X O
Effect Control
Real Time :Commands X X
:Local ON/OFF X X
Aux :All Notes OFF X X
Messages :Active Sense X O
:Reset X O
MTC quarter frame message is recognized.

Notes *1: Bulk Dump/Request, Parameter Change/Request, and MMC.
For MIDI Remote, ALL messages can be transmitted.
Mode 1: OMNI ON, POLY Mode 2: OMNI ON, MONO O: Yes

134 Mode 3: OMNI OFF, POLY Mode 4: OMNI OFF, MONO X: No
PARTS LIST
CONTENTS
OVERALL ASSEMBLY.............................................. 2
BOTTOM ASSEMBLYAssy ..................................... 4
CONTROL PANEL ASSEMBLYAssy.................. 7
ELECTRICAL PARTS...................................... 10-55
Notes : DESTINATION ABBREVIATIONS

A : Australian model M : South African model
B : British model O : Chinese model
C : Canadian model Q : South-east Asia model
D : German model T : Taiwan model
E : European model U : U.S.A. model
F : French model V : General export model (110V)
H : North European model W: General export model (220V)
I : Indonesian model N,X: General export model
J : Japanese model Y : Export model
K : Korean model
WARNING
Components having special characteristics are marked and must be replaced with parts having
specification equal to those originally installed.
The numbers QTY show quantities for each unit.

The parts with -- in PART NO. are not available as spare parts.
This mark } in the REMARKS column means these parts are interchangeable.
The second letter of the shaded ( ) part number is O, not zero.
The second letter of the shaded ( ) part number is I, not one.

QTY
PART NO.--
REMARKS
PART NO. 2
PART NO. 2
01V96
OVERALL ASSEMBLY
Control panel assembly: 50

Ass'y)
See page 7.
30
20
50 100 110
10
Bottom assembly:
Ass'y)
50 See page 4.
50
120 U, V models only 120 K model only
DIGITAL MIXING CONSOLE THIS C DIGITAL MIXING CONSOLE SER.NO.

MODEL 01V96 COMP MODEL 01V96
CET A
120V 90W 60Hz CLAS 220-230V 90W 50/60Hz
NORM
MADE IN JAPAN
POWER THIS POWER MADE IN JAPAN
ON UPC LABEL
15 O ON
OFF OPE OFF
FOL
(1 )T
AC IN INCL AC IN
2
01V96
REF NO. PART NO. DESCRIPTION REMARKS QTY RANK

OVERALL ASSEMBLY 01V96
-- Overall Assembly J (V967810)
-- Overall Assembly U,V (V967820)
-- Overall Assembly H,B,W (V967830)
-- Overall Assembly K (V967840)
10 -- Bottom Assembly J (V967860)
10 -- Bottom Assembly U,V (WA45550)
10 -- Bottom Assembly H,B,W,K (WA45560)
20 VN103500 Lithium Battery CR2032 03
30 -- Control Panel Assembly (V967850)
40 CB069250 Cord Holder BK-1 01
50 EG340190 Bind Head Tapping Screw-B 4.0X8 MFZN2BL 20 01
100 VZ678500 IF Plate 05
110 VP156900 Bind Head Screw A4.0X12 MFZN2BL 2 01
120 VA039300 Label U,V 03
120 -- Label K (WA33190)
ACCESSORIES
VQ240200 Adaptor, AC Cord KPR-24 J 06
* X3650A00 CD-ROM CD-R 650MB 12cm
VT119800 AC Cord J 7A 125V 3P 2.5m J 06
V6190600 AC Cord CSA U,V 07
V6190700 AC Cord VDE H,W,K 08
V6190800 AC Cord BS B 10
TOOL
* WA963600 Stay
: New Parts RANK: Japan only
3
01V96
4
BOTTOM ASSEMBLY Assy

50
20
222
175 170 215
40
10a 10b
205 10a 10b

30
210
165
B view C
10a 10b
230 10a 10b
80
200
A view
B
206
165
225 150 150a

175
170
160
170
60
110 145 180
146
130 20 147
70
190
10
50 140
10c
285
120 290 100
A 250 80
300
220 221 291
D
240
C view D view
01V96
Top view
410
400
5
01V96

BOTTOM ASSEMBLY 01V96
-- Bottom Assembly J (V967860)
-- Bottom Assembly U,V (WA45550)
-- Bottom Assembly H,B,W,K (WA45560)
* 10 WA176900 Bottom Chassis J
* 10 WA845100 Bottom Chassis U,V
* 10 WA845200 Bottom Chassis H,B,W,K
10a CB806590 Leg Black ABS 4 03
10b VR138400 Bind Head Tapping Screw-B 4.0X12 MFZN2BL 4 01
10c -- Caution Label (VV85650)
* 20 WA857600 Locking Card Spacer KGLS-16RT 2
* 30 WB328500 Screw Cover 3
40 -- OPT Angle (V968220)
* 60 WA043300 Side Panel L LEFT
* 70 WA043400 Side Panel R RIGHT
* 100 X3552A00 Power Transformer JA J
* 100 X3553A00 Power Transformer UL,CSA A U,V
* 100 X3554A00 Power Transformer CEE E H,B,W,K
* 120 V9891600 Circuit Board MAIN
130 EP600230 Bind Head Tapping Screw-B 3.0X6 MFZN2BL 9 01
* 140 V9896100 Circuit Board AC (DCCOM) J,U,V (V989570)
* 140 V9896600 Circuit Board AC (DCCOM) H,B,W,K (V989620)
146 VC362700 Ferrite Core FR25/15/12-1400L 04
147 CB069250 Cord Holder BK-1 2 01
* 150 WA333200 AC Inlet Assembly AC INLET&VH3P
150a V5065200 AC Inlet 3P M1908-C AC IN 03
160 -- AC Shield Plate (V968230)
175 VI693100 Bind Head Tapping Screw-S 4.0X8 MFZN2BL 2 01
180 VL812900 Power Switch Knob POWER ON/OFF 03
190 VL813000 Escutcheon, Power Switch 03
200 -- Heat Sink DCA (WA04510)
205 -- Heat Sink Block (WB04160)
206 EC030030 Flat Head Screw 3.0X6 MFZN2BL 2 01
* 210 V9895900 Circuit Board DCA (DCCOM) J,U,V (V989570)
* 210 V9896500 Circuit Board DCA (DCCOM) H,B,W,K (V989620)
215 -- Silicon Grease G-746 (0412125)
220 VH741100 Bind Head Tapping Screw-B SP 3.0X10 MFZN2BL 4 01
221 VB763800 Bind Head Screw SP 3.0X12 MFZN2Y 3 01
225 CB817510 Cord Binder S-14B 03
240 -- Heat Sink DCD (WA04520)
* 250 V9895800 Circuit Board DCD
285 -- Silicon Grease G-746 (0412125)
291 VH741100 Bind Head Tapping Screw-B SP 3.0X10 MFZN2BL 2 01
* 400 V5843400 Jumper Wire FVP=2.0C26SB16-60
410 V9468500 Jumper Wire FVP=2.0C26SB14-225 02
6
CONTROL PANEL ASSEMBLY Assy
See page 50 for the buttons of the PN1 and PN2 circuit boards.
PN1PN250
90
30
35 A
110
20
40 280
x29
460
270 470
x25 x14
60 x4 440
450 430 x16

410 450
10
400
x16
B view 15
420
250
200
100
B
25
x17
210
170
26
150 260
190
PN1 (1/2)
190
230
290
50
180
150
70
220 PN1 (2/2)
190 300
x3 A view 320
190
194
80 x5 190
193
190
160
195
190 310 310
196
190
01V96
7
01V96
540
600
295
Pic.1
570
590
296
650
580
700
500 555 510 520

560
530
570
Pic.1 Pic.2
600
580
8
01V96

-- CONTROL PANEL ASSEMBLY 01V96 (V967850)
* 10 V9679200 Control Panel
15 V9116000 Sponge Spacer, Panel 3 02
20 -- Adhesive Tape W=4.5 (WB32820)
* 25 WA773700 LED Lens 2P PEAK 1-16,SIGNAL 1-16, 17
ST IN 1-2,ST IN 3-4
* 26 WB052700 LED Lens 1P SOLO
* 30 WA455400 LCD Case
* 35 WA832900 LED Lens STEREO 3
* 40 V9679500 LCD
50 -- LCD Shield Plate t=0.8 (V999620)
* 70 V9895400 Circuit Board LCD (PNCOM) (V989490)
* 90 WA043900 LCD Printing Sheet
110 -- LCD Shield Film (WB41190)
* 150 V9895000 Circuit Board PN1 (PNCOM) (1/2, 2/2) (V989490)
* 160 V9895200 Circuit Board PN2 (PNCOM) (V989490)
170 -- HA-ADA Angle t=1.0 (V990210)
180 -- Angle Bracket, Encoder (V983680)
* 193 WB547100 Flat Washer 3.3X16X1.0
* 194 WB547200 Insulation Spacer
195 -- PN1 Shield Plate 1 (WB32200)
196 -- PN1 Shield Plate 2 (WB32210)
* 200 V9894500 Circuit Board FD
220 -- Insulation Sheet-FD (WA83830)
230 CB069250 Cord Holder BK-1 4 01
* 250 V9893900 Circuit Board HA (HACOM) (V989280)
270 VN413300 Bonding Tapping Screw-B 3.0X8 MFZN2BL 25 01
280 VP034300 Hexagonal Nut 9 12X2 MFNI3 29 01
* 290 V9894100 Circuit Board ADA (HACOM) (V989280)
295 VJ770600 Cord Binder S-126 01
296 CB817510 Cord Binder S-14B 03
310 VN413300 Bonding Tapping Screw-B 3.0X8 MFZN2BL 13 01
320 VP157800 Bonding Screw 3.0X8 MFZN2BL 3 01
* 400 WA844600 Fader Knob L_Gray/Black 1-16 16
* 410 WA844700 Fader Knob Red/Black ST STEREO
420 VN938800 Knob M_Gray/S_Gray S MONITOR OUT LEVEL, 2 03
PHONES LEVEL
430 VS085700 Knob S_Gray/Dark Gray S GAIN 1-16 16 03
440 VT651700 Encoder Knob Parameter wheel 02
* 450 WB328700 Encoder Knob Gray/Gray PAN,ST IN 1/3,ST IN 2/4 3
* 460 WA844800 Encoder Knob Green/Green Q,FREQUENCY,GAIN 3
470 VZ679200 Push Button 3.3 PAD 20dB 1-12, 14 03
CH15/16/2TR IN,
MONITOR/2TR IN
* 500 WA757800 Jumper Wire FVP=2.0C26SB12-280
510 V8392600 Jumper Wire FVP=2.0C26SB16-400 03
* 520 WA759900 Cable, FFC P=1.25-K-34-250
* 530 WA760100 Cable, FFC P=1.25-K-24-300
* 540 WA760300 Cable, FFC P=1.25-K-38-500
* 555 WB386400 Cable 26P 380mm P=1.0
* 560 WA835100 Cable 30P 400mm P=1.0
* 570 WB060600 Sponge Spacer 1 4
* 580 WB111800 Sponge Spacer 3 4
* 590 WB322500 Sponge Spacer 5
* 600 WB322200 ADA Shield Film
650 -- Adhesive Tape 12X70 (VN19540) 2
700 -- Adhesive Tape 12X90 (WB45930)
9
01V96
ELECTRICAL PARTS

ELECTRICAL PARTS 01V96
* V9896100 Circuit Board AC (DCCOM) J,U,V (V989570)(X3434C0)
* V9896600 Circuit Board AC (DCCOM) H,B,W,K (V989620)(X3434C0)
* V9895900 Circuit Board DCA (DCCOM) J,U,V (V989570)(X3434C0)
* V9896500 Circuit Board DCA (DCCOM) H,B,W,K (V989620)(X3434C0)
* V9895800 Circuit Board DCD (X3858B0)
* V9894500 Circuit Board FD (X3423B0)
* V9894100 Circuit Board ADA (HACOM) (V989280)(X3422B0)
* V9893900 Circuit Board HA (HACOM) (V989280)(X3422B0)
* V9891600 Circuit Board MAIN (X3421B0)
* V9895400 Circuit Board LCD (PNCOM) (V989490)(X3424B0)
* V9895000 Circuit Board PN1 (PNCOM) (1/2, 2/2) (V989490)(X3424B0)
* V9895200 Circuit Board PN2 (PNCOM) (V989490)(X3424B0)
* V9896100 Circuit Board AC (DCCOM) J,U,V (V989570)(X3434C0)

* V9896600 Circuit Board AC (DCCOM) H,B,W,K (V989620)(X3434C0)
* V9895900 Circuit Board DCA (DCCOM) J,U,V (V989570)(X3434C0)
* V9896500 Circuit Board DCA (DCCOM) H,B,W,K (V989620)(X3434C0)
VB659000 Bind Head Screw 3.0X8 MFZN2BL 01
-- Silicon Grease G-746 (0412125)
-- Jumper Wire 0.55 (VA07890)
C101 V3311600 Capacitor-KH 0.010 250V J.U.C.S 01
C102 V5170300 Capacitor-MKP 0.220 275V U.C.S 01
C301 VS589000 Ceramic Capacitor-E 4700P 500V M 01
-304 VS589000 Ceramic Capacitor-E 4700P 500V M 01
* C305 WA129900 Electrolytic Cap. 2200 50.0V
C307 UA355100 Mylar Capacitor 0.1000 50V J 01
C309 UR858100 Electrolytic Cap. 100.00 35.0V 01
C350 VC694800 Semiconductive Cera. Cap. 0.1000 25V Z 01
* C351 WA163400 Electrolytic Cap.-TM 3.30 25.0V
CN101 VG879900 Base Post Connector VA 2P TE 01
CN102 LB932040 Base Post Connector VH 4P TE 01
CN303 VK025800 Wire Trap 52147 14P TE 01
D301 VZ221700 Diode D4G 01
-311 VZ221700 Diode D4G 01
D350 VZ221700 Diode D4G 01
D390 VZ221700 Diode D4G 01
DB301 VT359600 Diode Stack D3SBA20 4.0A 200V 03
DB303 VB845300 Diode Stack S1WB(A)60 1.0A 60 02
* EM301 WA093400 LC Filter ZJSR5101-223TA
* -308 WA093400 LC Filter ZJSR5101-223TA
10
01V96

F101 KB000790 Fuse T 4.00AL/250V S J,U,V 01
F101 KB000750 Fuse T 2.00AL/250V H,B,W,K 01
F301 KB000690 Fuse T 2.50AL/250V S 01
-304 KB000690 Fuse T 2.50AL/250V S 01
F305 KB000710 Fuse T L 500mA S 250V 02
FZ101 VP206500 Fuse Holder EYF-52BC 2 01
-305 VP206500 Fuse Holder EYF-52BC 2 01
IC301 XR608A00 IC UPC2415AHF REGULATOR +15V 04
IC302 XD854A00 IC NJM7915FA REGULATOR -15V 03
IC303 XD854A00 IC NJM7915FA REGULATOR -15V 03
IC304 XR607A00 IC UPC2405AHF REGULATOR +5V 04
IC305 XE436A00 IC NJM79M05FA REGULATOR -5V 0.5A 03
IC350 IR012310 IC HD74HC123AP SINGLE SHOT 02
K301 -- Earth Plate (WA20680)
-303 -- Earth Plate (WA20680)
K304 -- Heat Sink PUE16-30 (WB08520)
L101 V4122100 Line Filter PLH10AN7003R6P2B 02
R301 HF757100 Carbon Resistor 10.0K 1/4 J 01
-304 HF757100 Carbon Resistor 10.0K 1/4 J 01
R305 HF755470 Carbon Resistor 470.0 1/4 J 01
R306 VC749400 Metal Oxide Film Resistor 5.6K 1W J 01
R310 VC743400 Metal Oxide Film Resistor 22.0 1W J 01
R313 VC750200 Metal Oxide Film Resistor 12.0K 1W J 01
R315 VC330400 Metal Film Resistor 47.0K 1/4 F 01
* R372 VC744400 Metal Oxide Film Resistor 56.0 1W J
SW101 V3127000 Push Switch ESB92S23B J.U.C.S POWER ON/OFF 02
TR301 VS150800 Transistor 2SC3200 GR 01
TR302 VM923000 Transistor 2SD2015 03
TR305 VM923000 Transistor 2SD2015 03
TR370 ID066700 Transistor 2SD667 C,D 01
TR371 V2797700 Transistor 2SC5395 E,F 01
TR372 V2797600 Transistor 2SA1993 E,F 01
TR373 IB064730 Transistor 2SB647 C,D 01
W308 -- Connector Assembly DCA ' (WA83140)
W309 -- Connector Assembly DCA2 ' (WA97960)
ZD301 VQ554100 Zener Diode MTZJ7.5A 7.5V 01
ZD302 VQ558500 Zener Diode MTZJ33B 33.0V 01
ZD303 VQ557800 Zener Diode MTZJ27B 27.0V 01
ZD350 VI241100 Zener Diode MTZJ4.3A 4.3V 01
* ZD370 VQ557100 Zener Diode MTZJ22B 22.0V
* V9895800 Circuit Board DCD (X3858B0)

11
01V96

* C211 WA163300 Electrolytic Cap.-HD 220.00 35.0V
* C212 WA163300 Electrolytic Cap.-HD 220.00 35.0V
C213 UB045100 Monolithic Ceramic Cap. F 0.100 50V Z 01
* C215 WA122600 Electrolytic Cap.-HC 220.00 10.0V
C221 UR819100 Electrolytic Cap. 1000 6.3V 01
CN205 VJ861600 Wire Trap 52147 16P TE 01
D201 V2330500 Diode DE5S4M 03
D202 V2330500 Diode DE5S4M 03
DB201 V2954200 Diode Stack D10XB20 10.0A 200V 04
F201 VT943200 Fuse TH 5.00A S 01
F202 VT943200 Fuse TH 5.00A S 01
* IC201 X3846A00 IC LM2678SX-5.0 DC-DC CONVERTER
* IC202 X3845A00 IC LM2676SX-3.3 DC-DC CONVERTER
* L201 WA626800 Coil CDRH127-220MC 22uH
R201 RD157100 Carbon Resistor (chip) 10.0K 1/4 J 01
R202 RD356470 Carbon Resistor (chip) 4.7K 63M J 01
* TH201 WB428900 Protector Switch RUE185-AP 1.85A30V
* V9894500 Circuit Board FD (X3423B0)

EC030030 Flat Head Screw 3.0X6 MFZN2BL 34 01
-- Fader Angle 1 (V968200) 2
-005 UR847470 Electrolytic Cap. 47.00 25.0V 01
C006 US062100 Ceramic Capacitor-SL(chip) 100P 50V J 01
-010 US062100 Ceramic Capacitor-SL(chip) 100P 50V J 01
C011 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
-020 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
C021 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
C101 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
C102 VR169000 Monolithic Mylar Capacitor 0.33 50V J 01
C103 UA354470 Mylar Capacitor 0.0470 50V J
12
01V96

13
01V96

CN001 VQ046300 Connector, FFC 52044 34P SE 02
D101 VT332900 Diode 1SS355 TE-17 01
D151 VT332900 Diode 1SS355 TE-17 01
D201 VT332900 Diode 1SS355 TE-17 01
D251 VT332900 Diode 1SS355 TE-17 01
D301 VT332900 Diode 1SS355 TE-17 01
D351 VT332900 Diode 1SS355 TE-17 01
D401 VT332900 Diode 1SS355 TE-17 01
D451 VT332900 Diode 1SS355 TE-17 01
D501 VT332900 Diode 1SS355 TE-17 01
D551 VT332900 Diode 1SS355 TE-17 01
D601 VT332900 Diode 1SS355 TE-17 01
D651 VT332900 Diode 1SS355 TE-17 01
D701 VT332900 Diode 1SS355 TE-17 01
D751 VT332900 Diode 1SS355 TE-17 01
D801 VT332900 Diode 1SS355 TE-17 01
D851 VT332900 Diode 1SS355 TE-17 01
D901 VT332900 Diode 1SS355 TE-17 01
D951 VS201100 Diode D1F60 01
-958 VS201100 Diode D1F60 01
DA001 VD303900 Diode Array 1SS226 TE85R 01
-005 VD303900 Diode Array 1SS226 TE85R 01
* FT101 WA601900 FET (chip) 2SK208 Y,GR
IC001 XR562A00 IC NJM2902M-T1 OP AMP 02
IC002 XV190A00 IC NJM2904M OP AMP 01
IC003 IS405210 IC SN74LV4052ANSR MULTIPLEXER 02
IC004 IS405210 IC SN74LV4052ANSR MULTIPLEXER 02
IC005 XD838A00 IC SN74HC245NSR TRANSCEIVER 04
IC007 XY254A00 IC TC74VHC273F(EL) D-FF 03
14
01V96

-010 XY254A00 IC TC74VHC273F(EL) D-FF 03
* IC011 X3955A00 IC SN74LV4051ANSR MULTIPLEXER
* IC012 X3700A00 IC NJU7074M(TE1) OP AMP
* IC951 X3620A00 IC NJM78L06UA(TE1) REGULETOR +6V
IC952 XJ598A00 IC NJM78L05UA REGULATOR +5V 02
IC953 X2091A00 IC UPC2912T-E1 REGULATOR +12V 03
-958 X2091A00 IC UPC2912T-E1 REGULATOR +12V 03
R001 RD355100 Carbon Resistor (chip) 100.0 63M J 01
-005 RD355100 Carbon Resistor (chip) 100.0 63M J 01
-021 RD357100 Carbon Resistor (chip) 10.0K 63M J 01
* R108 RD157220 Carbon Resistor (chip) 22.0K 1/4 J
* R110 RD358160 Carbon Resistor (chip) 160.0K 63M J
R115 RD155100 Carbon Resistor (chip) 100.0 1/4 J 01
15
01V96

16
01V96

17
01V96

18
01V96

TR101 V3033500 Digital Transistor DTC143XKA TP 01
TR102 V7798800 Digital Transistor DTA143ZUA 01
TR103 VU384300 Transistor 2SD1733F5 P,Q,R 01
TR104 VU384100 Transistor 2SB1181F5 P,Q,R 01
19
01V96

VR101 V6226100 Slide Pot., Motor Drive B10K 1 fader 10
VR901 V6226100 Slide Pot., Motor Drive B10K STEREO fader 10
ZD101 VU172000 Zener Diode UDZS5.6BTE-17 5.6V 01
20
01V96

* V9894100 Circuit Board ADA (HACOM) (V989280)(X3422B0)

* V9893900 Circuit Board HA (HACOM) (V989280)(X3422B0)
V6435700 Holder, Phones x3 2 02
* WA044000 Phone Cannon Shield t=0.5
V7539800 Cannon Angle 2 02
C002 UF037100 Electrolytic Cap. (chip) 10 16V 01
C007 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
C020 UF018100 Electrolytic Cap. (chip) 100 6.3V 01
C029 US061330 Ceramic Capacitor-CH(chip) 33P 50V J 01
C102 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
C108 UU119100 Electrolytic Cap.-FW 1000 6.3V 01
21
01V96

* C114 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
C134 UA353100 Mylar Capacitor 1000P 50V J 01
C167 UA353160 Mylar Capacitor 1600P 50V J
-178 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
-182 US061330 Ceramic Capacitor-CH(chip) 33P 50V J 01
C183 UU168100 Electrolytic Cap.-FW 100.00 50.0V 01
-186 UU168100 Electrolytic Cap.-FW 100.00 50.0V 01
22
01V96

23
01V96

24
01V96

25
01V96

26
01V96

CA01 UR877470 Electrolytic Cap. 47.00 63.0V 01
CA02 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CA03 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CA04 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CA06 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CA07 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CA08 UU119100 Electrolytic Cap.-FW 1000 6.3V 01
CA09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CA11 US061220 Ceramic Capacitor-CH(chip) 22P 50V J 01
CA12 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CA13 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CA14 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CA16 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CA17 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CA34 UA353100 Mylar Capacitor 1000P 50V J 01
CA47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CA48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CB01 UR877470 Electrolytic Cap. 47.00 63.0V 01
CB02 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CB03 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CB04 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CB06 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CB07 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CB08 UU119100 Electrolytic Cap.-FW 1000 6.3V 01
CB09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CB11 US061220 Ceramic Capacitor-CH(chip) 22P 50V J 01
CB12 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CB13 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CB14 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CB16 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CB34 UA353100 Mylar Capacitor 1000P 50V J 01
CB47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CB48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CC01 UR877470 Electrolytic Cap. 47.00 63.0V 01
CC02 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CC03 VJ097400 Electrolytic Cap.-KL 10.00 50.0V 01
CC04 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CC06 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CC07 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
CC08 UU119100 Electrolytic Cap.-FW 1000 6.3V 01
CC09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CC11 US061220 Ceramic Capacitor-CH(chip) 22P 50V J 01
CC12 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CC13 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CC14 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CC16 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
27
01V96

CC17 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CC34 UA353100 Mylar Capacitor 1000P 50V J 01
CC47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CC48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CD01 UR867100 Electrolytic Cap. 10.00 50.0V 01
CD03 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CD07 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CD08 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CD09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CD10 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
* CD31 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CD32 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CD33 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CD34 UA353100 Mylar Capacitor 1000P 50V J 01
CD47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CD48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CE01 UR867100 Electrolytic Cap. 10.00 50.0V 01
CE02 UR867100 Electrolytic Cap. 10.00 50.0V 01
CE03 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CE07 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CE08 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CE09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CE10 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CE11 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
* CE31 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CE32 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CE33 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CE34 UA353100 Mylar Capacitor 1000P 50V J 01
CE47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CE48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CF01 UR867100 Electrolytic Cap. 10.00 50.0V 01
CF03 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CF06 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CF08 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CF09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CF10 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CF32 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CF33 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CF34 UA353100 Mylar Capacitor 1000P 50V J 01
CF47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CF48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CG01 UR867100 Electrolytic Cap. 10.00 50.0V 01
28
01V96

CG02 UR867100 Electrolytic Cap. 10.00 50.0V 01
CG03 US061470 Ceramic Capacitor-CH(chip) 47P 50V J 01
* CG06 UR347470 Electrolytic Cap.-ASF 47.00 25.0V
CG08 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CG09 US061100 Ceramic Capacitor-CH(chip) 10P 50V D 01
CG10 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CG11 US145100 Ceramic Capacitor-F (chip) 0.1000 25V Z 01
CG32 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CG33 US062220 Ceramic Capacitor-SL(chip) 220P 50V J 01
CG34 UA353100 Mylar Capacitor 1000P 50V J 01
CG47 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CG48 US064100 Ceramic Capacitor-B (chip) 0.0100 50V K 01
CN001 V9020800 USB Connector USB 4P SE TO HOST USB
CN002 VQ151900 Connector, FFC 52045 38P TE 01
CN101 VI879400 Cable Holder 51048 16P TE 01
CN954 VK027000 Wire Trap 52151 11P SE 02
D001 VT332900 Diode 1SS355 TE-17 01
D951 VT332900 Diode 1SS355 TE-17 01
-954 VT332900 Diode 1SS355 TE-17 01
DA001 V9424900 Diode Array 1SS372 TE85L 01
DA002 V9424900 Diode Array 1SS372 TE85L 01
DA003 VV556300 Diode Array DAN217 0.3A X2 01
DA004 VV556300 Diode Array DAN217 0.3A X2 01
EM001 VD542700 LC Filter DSS6NF31C223Q93A 01
EM002 VQ761400 EMI Filter (chip) NFM3DCC101U1H3L 01
EM003 VQ761400 EMI Filter (chip) NFM3DCC101U1H3L 01
EM101 VI243100 LC Filter DSS6NB32A271Q93A 01
-104 VI243100 LC Filter DSS6NB32A271Q93A 01
* EM651 WA049400 LC Filter DSS6NE32A222Q93A
29
01V96

-954 VD542700 LC Filter DSS6NF31C223Q93A 01
EMA01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMB01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMC01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMD01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMD02 VI243100 LC Filter DSS6NB32A271Q93A 01
EME01 VI243100 LC Filter DSS6NB32A271Q93A 01
EME02 VI243100 LC Filter DSS6NB32A271Q93A 01
EMF01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMF02 VI243100 LC Filter DSS6NB32A271Q93A 01
EMG01 VI243100 LC Filter DSS6NB32A271Q93A 01
EMG02 VI243100 LC Filter DSS6NB32A271Q93A 01
IC001 XT487A00 IC TC74VHC245F TRANSCEIVER 03
IC002 X2485200 IC M37641M8-141FP CPU(USB 32K) 09
IC004 VR903700 Photo Coupler HCPL-M600 04
IC005 XW876A00 IC TC74VHC14F-EL INVERTER 01
IC007 XW842A00 IC SN74HCU04NSR INVERTER 01
IC008 XU815A00 IC DS26C32ATMX LINE RECEIVER 06
IC009 XV930A00 IC SN75124NSR LINE RECEIVER 05
IC010 XU816A00 IC SN75121NSR LINE DRIVER 05
IC011 XL334A00 IC MC26LS30DR2 LINE DRIVER 08
IC101 XF291A00 IC UPC4570G2 OP AMP 03
* IC103 X3447A00 IC CS5361-KS ADC
IC151 XW029A00 IC AK4393-VF-E2 DAC 07
IC155 XP844A00 IC NJM4556AL OP AMP 02
IC255 XQ178A00 IC NJM4580E-T1 OP AMP 01
* IC303 X3447A00 IC CS5361-KS ADC
* IC503 X3447A00 IC CS5361-KS ADC
-553 XF291A00 IC UPC4570G2 OP AMP 03
30
01V96

* IC703 X3447A00 IC CS5361-KS ADC
* IC903 X3447A00 IC CS5361-KS ADC
IC951 XY874A00 IC 74VHC245SJX TRANSCEIVER 02
IC953 XM182A00 IC TC7S04F INVERTER 01
ICA01 XF291A00 IC UPC4570G2 OP AMP 03
ICA02 XF291A00 IC UPC4570G2 OP AMP 03
ICB01 XF291A00 IC UPC4570G2 OP AMP 03
ICB02 XF291A00 IC UPC4570G2 OP AMP 03
* ICB03 X3447A00 IC CS5361-KS ADC
ICC01 XF291A00 IC UPC4570G2 OP AMP 03
ICC02 XF291A00 IC UPC4570G2 OP AMP 03
ICD01 XF291A00 IC UPC4570G2 OP AMP 03
ICD02 XF291A00 IC UPC4570G2 OP AMP 03
* ICD03 X3447A00 IC CS5361-KS ADC
ICE01 XF291A00 IC UPC4570G2 OP AMP 03
ICE02 XF291A00 IC UPC4570G2 OP AMP 03
ICF01 XF291A00 IC UPC4570G2 OP AMP 03
ICF02 XF291A00 IC UPC4570G2 OP AMP 03
* ICF03 X3447A00 IC CS5361-KS ADC
ICG01 XF291A00 IC UPC4570G2 OP AMP 03
ICG02 XF291A00 IC UPC4570G2 OP AMP 03
JK001 VI466400 DIN Connector x3 DIN YKF51-5046 MIDI IN/OUT/THRU 04
* JK002 V9965900 Pin Jack 2P YKC21-4141 2TR IN/OUT DIGITAL(COAX.)
JK003 V6022800 Module 1P GP1FA551TZ adat OPTICAL OUT 03
JK004 V5478200 Module 1P GP1FA551RZ adat OPTICAL IN 06
JK005 V6415900 BNC Connector 1P YKS11-0067 WORD CLOCK IN 05
JK006 V6415900 BNC Connector 1P YKS11-0067 WORD CLOCK OUT 05
JK101 VU805200 Cannon Connector XLR NC3FAV1-0 INPUT A 1 04
JK102 V3359800 Phone Jack ST JY6351J INPUT B 1 02
JK103 V3359800 Phone Jack ST JY6351J INSERT I/O 1 02
* JK151 WA831300 Cannon Connector XLR NC3MAH STEREO OUT L (BAL)
* JK152 WA831300 Cannon Connector XLR NC3MAH STEREO OUT R (BAL)
JK251 VS056300 Phone Jack JACK HLJ7001-01 OMNI OUT 1 (BAL) 01
JK451 VS056300 Phone Jack JACK HLJ7001-01 MONITOR OUT L (BAL) 01
JK452 VS056300 Phone Jack JACK HLJ7001-01 MONITOR OUT R (BAL) 01
JK551 VZ358700 Pin Connector 4P PIN JK040057DN 2TR IN/OUT ANALOG L/R 02
JK651 V3359800 Phone Jack ST JY6351J PHONES 02
31
01V96

JKA01 VU805200 Cannon Connector XLR NC3FAV1-0 INPUT A 10 04
JKA02 V3359800 Phone Jack ST JY6351J INPUT B 10 02
JKA03 V3359800 Phone Jack ST JY6351J INSERT I/O 10 02
JKB01 VU805200 Cannon Connector XLR NC3FAV1-0 INPUT A 11 04
JKB02 V3359800 Phone Jack ST JY6351J INPUT B 11 02
JKB03 V3359800 Phone Jack ST JY6351J INSERT I/O 11 02
JKC01 VU805200 Cannon Connector XLR NC3FAV1-0 INPUT A 12 04
JKC02 V3359800 Phone Jack ST JY6351J INPUT B 12 02
JKC03 V3359800 Phone Jack ST JY6351J INSERT I/O 12 02
JKD01 V3359800 Phone Jack ST JY6351J INPUT 13 02
JKE01 V3359800 Phone Jack ST JY6351J INPUT 14 02
JKF01 V3359800 Phone Jack ST JY6351J INPUT 15 02
JKG01 V3359800 Phone Jack ST JY6351J INPUT 16 02
L001 V5239100 Common Mode Coil DLP31SN121SL2L 03
L002 GE300610 Ferrite Bead BL02RN1-R62T4 01
-009 GE300610 Ferrite Bead BL02RN1-R62T4 01
L010 VP246300 Noise Filter ZJY51R5-2P 04
L011 V7930100 Pulse Transformer TB06A015 05
R003 RD256150 Carbon Resistor (chip) 1.5K 0.1 J 01
R006 RD255680 Carbon Resistor (chip) 680.0 0.1 J 01
-020 RD255220 Carbon Resistor (chip) 220.0 0.1 J 01
R103 HV755390 Flame Proof C. Resistor 390.0 1/4 J 01
R105 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
R107 VI194200 Metal Film Resistor (chip) 510.0 1/10 D 01
R108 VI196600 Metal Film Resistor (chip) 4.7K 1/10 D 01
32
01V96

-154 VI195300 Metal Film Resistor (chip) 1.5K 1/10 D 01
-188 HF754750 Carbon Resistor 75.0 1/4 J 01
-192 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
33
01V96

34
01V96

35
01V96

36
01V96

37
01V96

38
01V96

39
01V96

RA01 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RA02 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RA03 HV755390 Flame Proof C. Resistor 390.0 1/4 J 01
RA05 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RA07 VI194200 Metal Film Resistor (chip) 510.0 1/10 D 01
RA08 VI196600 Metal Film Resistor (chip) 4.7K 1/10 D 01
RA09 RD254100 Carbon Resistor (chip) 10.0 0.1 J 01
RA17 VI190700 Metal Film Resistor (chip) 18.0 1/10 D 01
RA25 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RA001 RE047100 Resistor Array 10KX4 01
RA005 RE044220 Resistor Array 22X4 01
RB01 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RB02 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RB03 HV755390 Flame Proof C. Resistor 390.0 1/4 J 01
RB05 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RB07 VI194200 Metal Film Resistor (chip) 510.0 1/10 D 01
RB08 VI196600 Metal Film Resistor (chip) 4.7K 1/10 D 01
RB09 RD254100 Carbon Resistor (chip) 10.0 0.1 J 01
RB17 VI190700 Metal Film Resistor (chip) 18.0 1/10 D 01
40
01V96

RB25 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RC01 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RC02 VC328400 Metal Film Resistor 6.8K 1/4 F 01
RC03 HV755390 Flame Proof C. Resistor 390.0 1/4 J 01
RC05 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RC07 VI194200 Metal Film Resistor (chip) 510.0 1/10 D 01
RC08 VI196600 Metal Film Resistor (chip) 4.7K 1/10 D 01
RC09 RD254100 Carbon Resistor (chip) 10.0 0.1 J 01
RC17 VI190700 Metal Film Resistor (chip) 18.0 1/10 D 01
RC25 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RD01 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RD02 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RD03 VI197400 Metal Film Resistor (chip) 10.0K 1/10 D 01
RD09 RD254390 Carbon Resistor (chip) 39.0 0.1 J 01
RD31 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RD35 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RD36 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RE01 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
41
01V96

RE02 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RE03 VI197400 Metal Film Resistor (chip) 10.0K 1/10 D 01
RE09 RD254390 Carbon Resistor (chip) 39.0 0.1 J 01
RE31 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RE35 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RE36 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RF01 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RF02 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RF03 VI197400 Metal Film Resistor (chip) 10.0K 1/10 D 01
RF09 RD254390 Carbon Resistor (chip) 39.0 0.1 J 01
RF11 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RF31 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RF35 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RF36 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RG01 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RG02 RD259100 Carbon Resistor (chip) 1.0M 0.1 J 01
RG03 VI197400 Metal Film Resistor (chip) 10.0K 1/10 D 01
RG09 RD254390 Carbon Resistor (chip) 39.0 0.1 J 01
RG11 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RG31 RD258100 Carbon Resistor (chip) 100.0K 0.1 J 01
RG35 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
RG36 VI195600 Metal Film Resistor (chip) 2.0K 1/10 D
SW101 VR365100 Slide Switch SSSF112-S06N1 CH1-4 ON/OFF 02
SW102 VZ587700 Push Switch SPPH430100 PAD 20dB 1 01
SW551 VZ587700 Push Switch SPPH430100 MONITOR/2TR IN 01
SWA02 VZ587700 Push Switch SPPH430100 PAD 20dB 10 01
SWB02 VZ587700 Push Switch SPPH430100 PAD 20dB 11 01
42
01V96

SWC02 VZ587700 Push Switch SPPH430100 PAD 20dB 12 01
SWF01 VZ587700 Push Switch SPPH430100 CH15/16/2TR IN 01
TR101 IC224030 Transistor 2SC2240 GR,BL 01
TR151 VK432900 Transistor 2SD1915(F) S,T 01
-154 VK432900 Transistor 2SD1915(F) S,T 01
TR951 V4767500 Transistor 2SD601A-(TX) Q,R,S 01
TR952 V4767500 Transistor 2SD601A-(TX) Q,R,S 01
TR953 V8819500 Transistor 2SA1235A E,F
TR954 VG013300 Transistor 2SB1132 82-390 01
TRA01 IC224030 Transistor 2SC2240 GR,BL 01
TRA02 IC224030 Transistor 2SC2240 GR,BL 01
TRB01 IC224030 Transistor 2SC2240 GR,BL 01
TRB02 IC224030 Transistor 2SC2240 GR,BL 01
TRC01 IC224030 Transistor 2SC2240 GR,BL 01
TRC02 IC224030 Transistor 2SC2240 GR,BL 01
VR101 VV701400 Rotary Variable Resistor 5K RK11K113 GAIN 1 03
VR551 VS144900 Rotary Variable Resistor A20Kx2 RK14K MONITOR OUT LEVEL 03
VR651 VS144900 Rotary Variable Resistor A20Kx2 RK14K PHONES LEVEL 03
VRA01 VV701400 Rotary Variable Resistor 5K RK11K113 GAIN 10 03
VRB01 VV701400 Rotary Variable Resistor 5K RK11K113 GAIN 11 03
VRC01 VV701400 Rotary Variable Resistor 5K RK11K113 GAIN 12 03
VRD01 VV701500 Rotary Variable Resistor C 100K RK11K113 GAIN 13 03
VRE01 VV701500 Rotary Variable Resistor C 100K RK11K113 GAIN 14 03
VRF01 VV701500 Rotary Variable Resistor C 100K RK11K113 GAIN 15 03
VRG01 VV701500 Rotary Variable Resistor C 100K RK11K113 GAIN 16 03
* W101 VY690700 Jumper Wire FVP=2.0C26SB16-100
* W551 WA758000 Jumper Wire FVP=2.0C26SB13-650
* W901 VY690700 Jumper Wire FVP=2.0C26SB16-100
W951 V2016000 Jumper Wire FVP=2.0C26SB15-550 03
X001 VP864900 Quartz Crystal Unit 16MHz SMD-49 04
43
01V96
PART NO.
REF NO. DESCRIPTION REMARKS QTY RANK
* V9891600 Circuit Board MAIN (X3421B0)
BT001 VN103600 Battery Holder CR2032 03
C019 UB446100 Ceramic Capacitor-F (chip) F 1.0 16V Z 01
C020 UB446100 Ceramic Capacitor-F (chip) F 1.0 16V Z 01
-035 US063100 Ceramic Capacitor-B (chip) 1000P 50V K 01
C057 UF046470 Electrolytic Cap. (chip) 4.7 25V 01
C077 UF118470 Electrolytic Cap. (chip) 470 6.3V UUR0J4 01
* C081 WA122800 Electrolytic Cap.-HD 150.00 35V
* C082 WA122800 Electrolytic Cap.-HD 150.00 35V
C088 UF148100 Electrolytic Cap. (chip) 100 25V UUR1E1 01
C089 UF148100 Electrolytic Cap. (chip) 100 25V UUR1E1 01
C160 V J 9 0 3 7 0 0 Monolithic Ceramic Cap. CH 560P 50V J 01
C176 VR327300 Mylar Capacitor (chip) 0.0820 16V J 01
C182 V 6 2 0 0 9 0 0 Capacitor 1.0000 16V M 01
44
01V96

C216 VR328100 Mylar Capacitor (chip) .00022 50V J 01
C217 VP864400 Mylar Capacitor (chip) 0.0047 16V J 01
C474 VR327300 Mylar Capacitor (chip) 0.0820 16V J 01
C501 V9074200 Mylar Capacitor (chip) 0.15 50V J
C504 VS026900 Mylar Capacitor (chip) 0.0039 16V G 01
45
01V96

CN003 VB390100 Connector Base Post PH 5P TE 01
CN006 VP127700 Connector, FFC 52045 24P TE 01
CN501 VF667700 Wire Trap 52147 17P TE 01
CN502 VF667600 Wire Trap 52147 15P TE 01
* CN601 WA013500 Plug PHEC 100P SE
CN701 V4415100 Connector, FFC/FPC 52808 30P TE 02
CN702 V6478900 Connector, FFC/FPC 52808 26P TE 01
D001 V2376600 Diode RB500V-40 01
D002 V2330500 Diode DE5S4M 03
D131 VT332900 Diode 1SS355 TE-17 01
-007 VD542700 LC Filter DSS6NF31C223Q93A 01
IC001 X2081A00 IC HD6417709SF133 CPU(SH-3) 12
IC002 XU965A00 IC UPC29M33T-E1 REGULATOR +3.3V 03
IC003 X2157A00 IC UPC2918T-E1 REGULATOR +1.8V 03
IC004 XR532A00 IC NJM2904V(TE1) OP AMP 02
IC005 XY937A00 IC CY2305 CLOCK BUFFER 07
* IC006 X3479A00 IC K4S643232F-TC/L60 SDRAM 64M
* IC007 X4210A00 IC MBM29LV320BE90TN FLASH ROM 32M
* IC008 X3497A00 IC M5M5V416BTP-70H SRAM 4M
* IC009 X3497A00 IC M5M5V416BTP-70H SRAM 4M
* IC010 X3848A00 IC S-80130ANMC-JCP-T2 SYSTEM RESET
* IC011 X3847A00 IC S-80142ANMC-JC3-T2 SYSTEM RESET
IC012 X2163A00 IC M62023FP SYSTEM RESET 03
IC013 XR680A00 IC TC7SH08FU AND
IC014 XY872A00 IC 74VHC08SJX AND
IC016 XW633A00 IC TC7SH32FU(TE85L) OR 01
IC017 XW633A00 IC TC7SH32FU(TE85L) OR 01
IC018 XW948A00 IC TC7WH08FU TE12L AND 01
* IC019 X3498A00 IC S1D13704F00A100 LCD CONTROLLER
IC020 XV242A00 IC TC74VHCT245AF TRANSCEIVER 03
IC021 XW948A00 IC TC7WH08FU TE12L AND 01
* IC022 XW814A00 IC TC7SET32FU OR
IC023 X2790A00 IC LM2596SX-ADJ DC-DC CONVERTER 06
IC024 XW875A00 IC TC74VHC74F-EL D-FF 01
IC101 XS775A00 IC TC7SH04FU INVERTER 01
-104 XY874A00 IC 74VHC245SJX TRANSCEIVER 02
IC107 XU229A00 IC TC74LVX4245FS TRANSCEIVER 04
-116 XY874A00 IC 74VHC245SJX TRANSCEIVER 02
* IC117 X3954A00 IC TC74VHC541F-EL BUFFER
IC131 XY871A00 IC 74VHC04SJX INVERTER 01
* IC136 X3775A00 IC S1L51252F32S000 PLLP2
IC137 XW422A00 IC M51953AFP SYETEM RESET 01
46
01V96

IC138 XT229A00 IC TC74VHC00F NAND 01
IC143 XV064A00 IC TLC2932IPWR PLL 06
IC144 XG948E00 IC YM3436DK DIR2 11
IC201 XZ693B00 IC YSS919B-H DSP7 15
-204 XZ693B00 IC YSS919B-H DSP7 15
IC205 X3482A00 IC MSM56V16160F-8T SDRAM 16M
-208 X3482A00 IC MSM56V16160F-8T SDRAM 16M
IC301 XV988A00 IC YSS910-S DSP6 10
IC302 XV988A00 IC YSS910-S DSP6 10
IC303 XV077B00 IC MSM514260E-60JS DRAM 4M 07
-306 XV077B00 IC MSM514260E-60JS DRAM 4M 07
IC401 X3299A00 IC MBCG61594-130 ATSC2A 11
IC402 XY870A00 IC 74VHC157SJX MULTIPLEXER 01
IC403 XY870A00 IC 74VHC157SJX MULTIPLEXER 01
IC452 XR680A00 IC TC7SH08FU AND
IC453 XY871A00 IC 74VHC04SJX INVERTER 01
IC454 XW422A00 IC M51953AFP SYETEM RESET 01
IC456 XG948E00 IC YM3436DK DIR2 11
IC457 X3299A00 IC MBCG61594-130 ATSC2A 11
IC459 XQ805A00 IC TC7WU04FU INVERTER 01
IC501 X2089A00 IC CS8415A-CS DIR 06
IC504 XZ349A00 IC CS8405A-CS DIT 06
IC701 XH223A00 IC SN74HC273NSR D-FF 01
-706 XH223A00 IC SN74HC273NSR D-FF 01
IC707 XY873A00 IC 74VHC138SJX DECODER 01
-711 XD838A00 IC SN74HC245NSR TRANSCEIVER 04
IC712 XV973A00 IC SGH603064F-62F GATE ARRAY 07
L001 V3232700 Chip Inductance 120U BLM31P121SN1L 01
* L132 V7716400 Coil SSB44-331 SMD
-503 V3232700 Chip Inductance 120U BLM31P121SN1L 01
47
01V96

R036 RD359100 Carbon Resistor (chip) 1.0M 63M J 01
R103 RD350000 Carbon Resistor (chip) 0 63M J 01
-108 RD350000 Carbon Resistor (chip) 0 63M J 01
* R152 WB248300 Chip Inductance BLM18RK121SN1D
* -155 WB248300 Chip Inductance BLM18RK121SN1D
R451 RD359100 Carbon Resistor (chip) 1.0M 63M J 01
48
01V96

-724 RD154330 Carbon Resistor (chip) 33.0 1/4 J 01
-027 RE047100 Resistor Array 10KX4 01
TA701 VY703900 Transistor Array TD62309F(EL) 04
-703 VY703900 Transistor Array TD62309F(EL) 04
TA704 V9615500 Transistor Array TD62783AF(EL)
-706 V9615500 Transistor Array TD62783AF(EL)
TH601 VV457600 Protector Switch RUE090 0.90A 30V 02
TH602 VV457600 Protector Switch RUE090 0.90A 30V 02
TR001 V3033500 Digital Transistor DTC143XKA 01
* X001 WA002000 Quartz Crystal Unit 11MHz MA-406
X131 V8904500 Quartz Crystal Unit 49.152MHz DSO751SB
X132 V8904400 Quartz Crystal Unit 45.1584M DSO751SB
X301 VZ156100 Quartz Crystal Unit 60MHz DSO751S 06
X451 V3232900 Quartz Crystal Unit 21MHz SMD-49 12PF 03
* V 9 8 9 5 4 0 0 Circuit Board LCD (PNCOM) (V989490)(X3424B0)

* V 9 8 9 5 0 0 0 Circuit Board PN1 (PNCOM) (1/2, 2/2) (V989490)(X3424B0)
* V 9 8 9 5 2 0 0 Circuit Board PN2 (PNCOM) (V989490)(X3424B0)
49
01V96

10 V 6 1 9 7 4 0 0 Button D_Gray S LENS AUX1-8 <FADER MODE> 8 02
20 V 8 4 8 7 1 0 0 Button M_Gray S LENS 1-16,17-32,MASTER,REMOTE 16 02
<LAYER>
HIGH,HIGH-MID,LOW-MID,LOW
<SELECTED CHANNEL>
1-8 1-8 <USER DEFINED KEYS>
30 V8487200 Button L_Gray S LENS HOME(METER) <FADER MODE> 02
40 V8487400 Button D_Gray/D_Gray S Cursor Left/Right,F1-4 6 02
50 V8487500 Button M_Gray/M_Gray S CLEAR,ST IN 2 02
60 V8487600 Button L_Gray/L_Gray S SCENE,DIO/SETUP,MIDI, 12 02
UTILITY,/INS/DLY,PAN/
ROUTING,PAIR/GROUP,PATCH,
DYNAMICS,EQ,EFFECT,VIEW
<DISPLAY ACCESS>
100 V 8 4 8 6 7 0 0 Button M_Gray L LENS SOLO ST IN 1/3, 2 02
SOLO ST IN 2/4
110 V 8 4 8 6 8 0 0 Button L_Gray L LENS ON STEREO,ON ST IN 1/3, 3 02
ON ST IN 2/4
120 V 8 4 8 6 9 0 0 Button Blue L LENS SEL STEREO,SEL ST IN 1/3, 3 02
SEL ST IN 2/4
* 130 WA335700 Button M_Gray/M_Gray L STORE,Cursor Up/Down, 11
RECALL <SCENE MEMORY>
DEC,INC,ENTER,
Cursor Left/Right/Up/Down
* 200 WA773300 Button M_Gray L LENS SOLO 1-16 4
* 210 WA835300 Button L_Gray L LENS ON 1-16 4
* 220 WA835800 Button Blue L LENS SEL 1-16 4
C1 FI565220 Monolithic Ceramic Cap. 0.220 50V K
* C8 V7182500 Ceramic Capacitor-F (chip) 0.1000 50V Z
* -13 V7182500 Ceramic Capacitor-F (chip) 0.1000 50V Z
CN1 VP798200 Connector, FFC 52044 24P SE 01
* CN2 V9984400 Connector, FFC/FPC 52435 23P SE
* CN101 WA045600 Connector, FFC/FPC 52793 30P SE
CN102 V7563700 Connector, FFC 52207 26P SE 02
CN103 VU421600 Wire Trap 52151 16P SE 01
D2 VS597600 Diode RB160L-40 TE25 01
D101 VT332900 Diode 1SS355 TE-17 01
-188 VT332900 Diode 1SS355 TE-17 01
D191 VT332900 Diode 1SS355 TE-17 01
-205 VT332900 Diode 1SS355 TE-17 01
D207 VT332900 Diode 1SS355 TE-17 01
D301 VT332900 Diode 1SS355 TE-17 01
-308 VT332900 Diode 1SS355 TE-17 01
EC101 V3750700 Rotary Encoder EC12E2410401 PAN <SELECTED CHANNEL> 01
EC102 V3750700 Rotary Encoder EC12E2410401 Q <SELECTED CHANNEL> 01
EC103 V3750700 Rotary Encoder EC12E2410401 FREQUENCY<SELECTED CHANNEL > 01
EC104 V3750700 Rotary Encoder EC12E2410401 GAIN <SELECTED CHANNEL> 01
EC105 VR101400 Encoder EC16B24204 L=15 Parameter wheel 04
EC301 V3750700 Rotary Encoder EC12E2410401 ST IN 1/3 01
EC302 V3750700 Rotary Encoder EC12E2410401 ST IN 2/4 01
IC1 X0200A00 IC NJM2360AM DC-DC CONVERTER 03
* L1 WB767800 Coil CDH73-151KC 150uH
LD1 V3670000 LED Red LT1D40A STEREO R OVER 01
LD2 V3670200 LED Yellow LT1H40A STEREO R 0 01
LD3 V3670200 LED Yellow LT1H40A STEREO R -3 01
50
01V96

LD9 V3670100 LED Yellow/Green LT1E40A STEREO R -24 01
LD13 V3670000 LED Red LT1D40A STEREO L OVER 01
LD14 V3670200 LED Yellow LT1H40A STEREO L 0 01
LD15 V3670200 LED Yellow LT1H40A STEREO L -3 01
LD21 V3670100 LED Yellow/Green LT1E40A STEREO L -24 01
LD101 V3670200 LED Yellow LT1H40A ON 1 01
LD117 V3670200 LED Yellow LT1H40A ON STEREO 01
LD118 V3670200 LED Yellow LT1H40A ON ST IN 1/3 01
LD119 V3670200 LED Yellow LT1H40A ON ST IN 2/4 01
LD120 V3670200 LED Yellow LT1H40A SOLO 1 01
LD136 V3670200 LED Yellow LT1H40A SOLO ST IN 1/3 01
LD137 V3670200 LED Yellow LT1H40A SOLO ST IN 2/4 01
LD138 V3670100 LED Yellow/Green LT1E40A SEL 1 01
51
01V96

LD154 V3670100 LED Yellow/Green LT1E40A SEL STEREO 01
LD155 V3670100 LED Yellow/Green LT1E40A SEL ST IN 1/3 01
LD156 V3670100 LED Yellow/Green LT1E40A SEL ST IN 2/4 01
LD157 V3670100 LED Yellow/Green LT1E40A 1-16 <LAYER> 01
LD158 V3670100 LED Yellow/Green LT1E40A 17-32 <LAYER> 01
LD159 V3670100 LED Yellow/Green LT1E40A MASTER <LAYER> 01
LD160 V3670100 LED Yellow/Green LT1E40A REMOTE <LAYER> 01
LD161 V3670100 LED Yellow/Green LT1E40A AUX1 <FADER MODE> 01
LD169 V3670100 LED Yellow/Green LT1E40A HOME(METER) <FADER MODE> 01
LD189 V3670100 LED Yellow/Green LT1E40A ST IN 1-2 01
LD190 V3670100 LED Yellow/Green LT1E40A ST IN 3-4 01
LD191 V3670100 LED Yellow/Green LT1E40A HIGH <SELECTED CHANNEL> 01
LD192 V3670100 LED Yellow/Green LT1E40A HIGH-MID<SELECTED CHANNEL> 01
LD193 V3670100 LED Yellow/Green LT1E40A LOW-MID<SELECTED CHANNEL> 01
LD194 V3670100 LED Yellow/Green LT1E40A LOW <SELECTED CHANNEL> 01
LD206 V3670000 LED Red LT1D40A SOLO 01
LD208 V3670100 LED Yellow/Green LT1E40A SIGNAL 1 01
LD224 V3670000 LED Red LT1D40A PEAK 1 01
LD301 V3670200 LED Yellow LT1H40A 1 <USER DEFINED KEYS> 01
52
01V96

* R7 RD353150 Carbon Resistor (chip) 1.5 63M J
R13 RD154100 Carbon Resistor (chip) 10.0 1/4 J
* R14 RD353150 Carbon Resistor (chip) 1.5 63M J
R24 RD154100 Carbon Resistor (chip) 10.0 1/4 J
SW101 VV056000 Tact Switch SKQNAED010 ON 1 01
SW117 VV056000 Tact Switch SKQNAED010 ON STEREO 01
SW118 VV056000 Tact Switch SKQNAED010 ON ST IN 1/3 01
SW119 VV056000 Tact Switch SKQNAED010 ON ST IN 2/4 01
SW120 VV056000 Tact Switch SKQNAED010 SOLO 1 01
SW136 VV056000 Tact Switch SKQNAED010 SOLO ST IN 1/3 01
SW137 VV056000 Tact Switch SKQNAED010 SOLO ST IN 2/4 01
SW138 VV056000 Tact Switch SKQNAED010 SEL 1 01
SW154 VV056000 Tact Switch SKQNAED010 SEL STEREO 01
SW155 VV056000 Tact Switch SKQNAED010 SEL ST IN 1/3 01
SW156 VV056000 Tact Switch SKQNAED010 SEL ST IN 2/4 01
SW157 VV056000 Tact Switch SKQNAED010 1-16 <LAYER> 01
53
01V96

SW158 VV056000 Tact Switch SKQNAED010 17-32 <LAYER> 01
SW159 VV056000 Tact Switch SKQNAED010 MASTER <LAYER> 01
SW160 VV056000 Tact Switch SKQNAED010 REMOTE <LAYER> 01
SW161 VV056000 Tact Switch SKQNAED010 AUX1 <FADER MODE> 01
SW169 VV056000 Tact Switch SKQNAED010 HOME(METER) <FADER MODE> 01
SW170 VV056000 Tact Switch SKQNAED010 SCENE <DISPLAY ACCESS> 01
SW171 VV056000 Tact Switch SKQNAED010 DIO/SETUP<DISPLAY ACCESS> 01
SW172 VV056000 Tact Switch SKQNAED010 MIDI <DISPLAY ACCESS> 01
SW173 VV056000 Tact Switch SKQNAED010 UTILITY <DISPLAY ACCESS> 01
SW174 VV056000 Tact Switch SKQNAED010 /INS/DLY <DISPLAY ACCESS> 01
SW175 VV056000 Tact Switch SKQNAED010 PAN/ROUTING <DISPLAY ACCESS> 01
SW176 VV056000 Tact Switch SKQNAED010 PAIR/GROUP <DISPLAY ACCESS> 01
SW177 VV056000 Tact Switch SKQNAED010 PATCH <DISPLAY ACCESS> 01
SW178 VV056000 Tact Switch SKQNAED010 DYNAMICS <DISPLAY ACCESS> 01
SW179 VV056000 Tact Switch SKQNAED010 EQ <DISPLAY ACCESS> 01
SW180 VV056000 Tact Switch SKQNAED010 EFFECT <DISPLAY ACCESS> 01
SW181 VV056000 Tact Switch SKQNAED010 VIEW <DISPLAY ACCESS> 01
SW182 VV056000 Tact Switch SKQNAED010 Cursor Left 01
SW183 VV056000 Tact Switch SKQNAED010 F1 01
SW187 VV056000 Tact Switch SKQNAED010 Cursor Right 01
SW188 VV056000 Tact Switch SKQNAED010 ST IN 01
SW191 VV056000 Tact Switch SKQNAED010 HIGH <SELECTED CHANNEL> 01
SW192 VV056000 Tact Switch SKQNAED010 HIGH-MID<SELECTED CHANNEL> 01
SW193 VV056000 Tact Switch SKQNAED010 LOW-MID<SELECTED CHANNEL> 01
SW194 VV056000 Tact Switch SKQNAED010 LOW <SELECTED CHANNEL> 01
SW195 VV056000 Tact Switch SKQNAED010 DEC 01
SW196 VV056000 Tact Switch SKQNAED010 INC 01
SW197 VV056000 Tact Switch SKQNAED010 Cursor Left 01
SW198 VV056000 Tact Switch SKQNAED010 Cursor Up 01
SW199 VV056000 Tact Switch SKQNAED010 Cursor Right 01
SW200 VV056000 Tact Switch SKQNAED010 Cursor Down 01
SW201 VV056000 Tact Switch SKQNAED010 ENTER 01
SW202 VV056000 Tact Switch SKQNAED010 STORE <SCENE MEMORY> 01
SW203 VV056000 Tact Switch SKQNAED010 Cursor Down<SCENE MEMORY> 01
SW204 VV056000 Tact Switch SKQNAED010 Cursor Up <SCENE MEMORY> 01
SW205 VV056000 Tact Switch SKQNAED010 RECALL <SCENE MEMORY> 01
SW207 VV056000 Tact Switch SKQNAED010 CLEAR 01
SW301 VV056000 Tact Switch SKQNAED010 1 <USER DEFINED KEYS> 01
* TH1 WA116900 Thermistor (chip) ERTJ1VT102J 1.0K
TR1 VQ986700 Transistor 2SC4081 T106 01
* VR1 WA833000 Rotary Variable Resistor B 10K RK09K1130A0H LCD contrast
* ZD1 VU173300 Zener Diode UDZS20B TE-17 20V
* X3552A00 Power Transformer JA J

* X3553A00 Power Transformer UL,CSA A U,V
* X3554A00 Power Transformer CEE E H,B,W,K
* V 9 6 7 9 5 0 0 LCD
VN103500 Lithium Battery CR2032 03
54
01V96

V 5 0 6 5 2 0 0 AC Inlet 3P M1908-C AC IN 03
55
01V96
CIRCUIT DIAGRAM
CONTENTS
BLOCK DIAGRAM(002~006) .......... 3
OVERALL CONNECTOR CIRCUIT DIAGRAM
......................................................... 8
CIRCUIT DIAGRAM
AC .................................................................................... 9
DCA................................................................................ 10
DCD................................................................................ 11
FD (002~006) ................................................................. 12
ADA (002~004) .............................................................. 17
HA (002~004) ................................................................ 20
MAIN (002~013) ............................................................ 23
LCD ................................................................................ 35
PN1 (002~004)............................................................... 36
PN2 ................................................................................ 39
Note: See parts list for details of circuit board component parts.

Q P O N M L K J I H G F E D C B A
01V96
BLOCK DIAGRAM 002 (01V96) 1
LCD Module
CN2(23P)
LCD MAIN 2
Contrast
CN1 CN006 IC019(80P)
(24P) (24P)
LCD controller
W/40Kbyte SRAM
Bias (S1D13704F)
circuit
DC/DC
converter Backlight LCD Reset
(5V25V) circuit
+5V
3
PN2
CN501(17P), ADA
LED/SW
MATRIX
CN502(15P),
CN503(38P)
Analog I/O
X30 2ch/line STEREO L/R (See Page 5)
SM OUT
Crystal 2ch/line MONI L/R
oscillator CR OUT
4
Encoders
60MHz 2ch/line
2 OMNI 1-4
1/4 OMNI OUT 1-4 /
2ch/line
CN301(14P) 8 SDATA 1-16
AIN 1-16 /
DPS block
CN701(30P), (See Page 4) DFS
CN702(26P),
CN105(14P) CN703(16P) Master clock (MCLK, 64Fs, Fs)
PN1 2ch/line
IC709~IC711(20P)
2Tr DIN
( 8 x 3bit)
DSP7 x 4 ADA Reset
SW read
buffer
DSP6 x 2 2ch/line
2Tr DOUT CN002(38P),
SDRAM 16M x 4 CN951(15P),
DRAM 4M x 4
SLOT2 IN
4ch/line
2
/
CN952(17P) 5
IC701~IC703(20P)
SLOT2 OUT /
TA701~TA703
Sink driver
Digital I/O
(8 x 4bit)
System Reset
D-Latch
2
LED/SW
MATRIX
4ch/line
4ch/line 2TR RMCK1
4
SLOT1 IN / IC007
SLOT1 OUT / 2ch/line DIR 2TR IN DIGITAL
CS8420
IC704~IC706(20P)
(COAXIAL)
TA704~TA706
LED source
4
( 8 x 4bit)
System Reset
D-Latch
4ch/line IC501(28P)
driver
JK002
CN101(30P),
2ch/line DIT
IC011 2TR OUT
DIGITAL
6
Encoders
IC712(64P)
Counter G/A
CN102(26P), CS8405 (COAXIAL)

(REC2)
CN103(16P) DSP Reset IC504(28P)
2Tr Reset
WORD
IC009 CLOCK JK005
IN
FD
75
IC010 JK006
Multiplexer
(8:1 x 3)
CN001(34P) CN704(34P) OUT

7
System Reset MIDI
17
JK001
/
X131 X132 IC004

SCI2(RX)
Crystal Crystal IN
100mm Motorized fader ( x 17)
Servo driver
oscillator oscillator
(8bit x 3)
D-Latch
Motor
17
( x 17 )
49.152MHz 45.1584MHz SCI2(TX) IC005

/ IC136(208P) OUT
PLLP2
ATDIR Reset IC005
1/2 1/2 Selector Master clock THRU
External
WC 1/2 44.1K x256 WC OUT X451
8
Selector
1/2 48K x256 PLL
Divider
Selector Crystal
88.2K x256 SL clock WC ATI IC456
Multiplexer
21MHz
Position
(4:1 x 4)
17 16 5 96K x256 SLOT2 clock (44P)

Address
/ / / DFS Decoder & WC x256
2TR(256fs) SLOT1 clock adat
Register
System Reset OPTICAL
ATSC2A IN JK003
IC143(14P) IC457(144P)
PLL PLL 5
48K/44.1K / OUT JK004
96K/88.2K
TLC2932 DIR2
BUS
IC144(44P)
System Reset
DIR Reset CPU
M37641 CN001
9
IC002 TO HOST
(80P) USB
USB Reset
IC001(208P)
A/D
D/A
Flash ROM SDRAM SRAM Backup MY SLOT

32Mbit 64Mbit 4Mbit x 2 BT001 I/F
LCD Reset controller
(16bit) (32bit) (32bit) IC012(8P)
DSP Reset SH-3 CPU IC007(48P) IC006(96P) IC008(44P), SCI0(RX)
2Tr Reset (SH7709S) IC009(44P) SCI0(TX)
DIR Reset
CPU: 132MHz
SCI0
SCI2
SCI0, SCI2
10
ATDIR Reset BUS: 44MHz WC SLOT1
ADA Reset Internal I/O: 22MHz
USB Reset
System Reset (2or4ch) (2or4ch)

4 4
ATSC2A / Selector /
System IC401(144P)
Reset / Selector /
Crystal 4 4
11MHz (2or4ch) (2or4ch)
RESET
X001
IC010(5P)
IC011(5P)
System Reset
11
Hard: Digital Block
(System, Digital I/O, DSP, Panel Display, Operation Control)
28CA1-8826666-2 BLOCK DIAGRAM 002 (01V96)
3 12
I H G F E D C B A
01V96
BLOCK DIAGRAM 003 (01V96) INS SEND 1-4
SO58
IC201 SO59 INS SEND 5-8
OAUX1-4 INS SEND 9-12
OAUX5-8 SI41 (208P) SO60
DIRECT OUT 1-4
1 SI42
DSP7
SO61
SO62
DIRECT OUT 5-8
DIRECT OUT 9-12
OBUS1-2 SO63
SI36
SO52
SO53
SO55
SO56
SO57
16M SDRAM
IC205(50P)
SI46
SI47
SI49
SI50
SI51
INS SEND 13-16
SO58
INS SEND 17-20
SO59 INS SEND 1-4
OAUX1-4 IC202 INS SEND 21-24 SI36
SI41 SO60 INS SEND 5-8
OAUX5-8 DIRECT OUT 13-16 SI37 SO56 SLOT1OUT 1-4
SI42 (208P) SO61
DIRECT OUT 17-20 INS SEND 9-12
SO12
SO13
SO14
SO62 SI38 SO57 SLOT1OUT 5-8
SI10
INS SEND 13-16
SI8
SI9
OBUS3-4 DSP7 DIRECT OUT 21-24 SI39 SO58 SLOT1OUT 9-12
SO63 INS SEND 17-20
SI36
SO52
SO53
SO55
SO56
SO57
SI40 SO59 SLOT1OUT 13-16
INS SEND 21-24
16M SDRAM SI41 SO60 SLOT2OUT 1-4
INS SEND 25-28
SI42 SO61 SLOT2OUT 5-8
INS SEND 29-32
IC206(50P) SI43 IC204
(208P)
SO48 SMOUT
SI46
SI47
SI49
SI50
SI51
INS SEND 25-28
SO58 DSP7 SO52 CROUT
SO59 INS SEND 29-32
2 OAUX1-4
OAUX5-8 SI41 IC203 DIRECT OUT 25-28
DIRECT OUT 1-4
DIRECT OUT 5-8
SI28
SI29
SO53
SO54
OMNI 1-2
OMNI 3-4
SI42 (208P) SO61
DIRECT OUT 29-32 DIRECT OUT 9-12 SI30
SI24
SO55 2TrDO
SO62 DIRECT OUT 13-16
OBUS5-6
DSP7 DIRECT OUT 17-20
SI25
SI31
SO52
SO53
SO55
SO56
SO57
SI36 SI26
SI32
16M SDRAM DIRECT OUT 21-24
SI27
SI33
MONITOR,AUX,BUS,ST,
DIRECT OUT 25-28 SI28 OSC,Input(37-40)
SI34
IC207(50P) DIRECT OUT 29-32
SI29
SI35 DIRECT OUT
SI30
SI31
CX3SM /CX3SL
CX3AUX1-4
CX3AUX5-8
SI32
CX3BUS1-4
CX3BUS5-8
IC201-204 SI33
SI34
SO62
SO63
SO49
SO50
SO51
SO44
SO45
SO46
SO47
Input
SI22
SI23
SI24
SI25
SI26
16M SDRAM
IC208(50P)
CX3SM /CX3SL
FX1SEND1-4
FX3SEND1-4
FX2SEND1-4
FX4SEND1-4
CX3BUS1-4
CX3BUS5-8
CX3AUX1-4
CX3AUX5-8
OBUS1-2
OBUS3-4
OBUS5-6
OAUX1-4
OAUX5-8
AD IN 1-2 SI0
3 AD IN 3-4 SI1
AD IN 5-6 SI2
AD IN 7-8 SI3
AD IN 9-10 SI4
AD IN 11-12 SI5
AD IN 13-14 SI6
AD IN 15-16 SI7
SLOT1IN 1-4 SI12

SLOT1IN 5-8 SI13
SLOT1IN 9-12 SI14
SLOT1IN 13-16 SI15
The number on EFFECT is given just to show the
SLOT2IN 1-4 SI16 signal name, and it is not necessarily true that
4 SLOT2IN 5-8 SI17 operation is made in the way the number suggests.
FX1SEND1-4 FX1RTN1-4
SI0 SO0
SI1 IC301 SO1
FX3SEND1-4 FX3RTN1-4
SI2 (176P) SO2
SI3 SO3
FX1RTN1-4
SI4 DSP6 SO4
FX2 RTN1-4
SI5 SO5
FX3 RTN1-4
SI6 EFFECT SO6
FX4RTN1-4
SI7 (FX1/3) SO7
4M DRAM x2 IC303(40P),
IC304(40P)
FX2 SEND1-4
SO0
FX2RTN1-4
SI0 IC302
FX4 SEND1-4 SI1 SO1 FX4RTN1-4
SI2 (176P) SO2
5 FX1 RTN1-4
FX2 RTN1-4
SI3
SI4 DSP6 SO4
SO3
SI5 SO5
FX3 RTN1-4
2TrDIN SI10 FX4 RTN1-4
SI6 EFFECT SO6
SI7 (FX2/4) SO7
IC305(40P),
4M DRAM x2 IC306(40P)
FX1RTN 1-4
SI18
FX3RTN1-4 SI19
FX2RTN1-4 SI20
FX4RTN1-4 SI21
DSP Block
6
4
28CA1-8826666-4
BLOCK DIAGRAM 004 (01V96)

HA ADA MAIN
G
CH1-4
SW101 PHANTOM
+48V (See Page 3)
CH5-8
SW501
CH9-12
SW901
CN101(16P), CN131(16P),
CN552(11P), CN931(16P),
JK101 CN901(16P) CN954(11P)
A
IC101 CN002(38P), CN501(17P),
INPUT 1 JK102 IC103(24P) CN951(15P), CN502(15P),
IC102 A/D
B PAD HA AINL CN952(17P) CN503(38P)
-1
SW102 VR101
SDOUT SDATA-1/2
CS5361-KS
GAIN AINR
MCLK
20dB
LRCK
SCLK
/RST
IC202
M0
JK103
DFS
-1
INSERT I/O 1 64Fs
Fs
A JK201
ADA Reset
INPUT 2 JK202 MCLK
IC201
B
SW202 VR201
JK203
INSERT I/O 2
MCLK.64Fs.Fs.RESET.DFS
JK301
F
A
INPUT 3 JK302
B IC301
SW302 VR302 IC302
JK303
INSERT I/O 3
IC303 SDATA-3/4
JK401 (24P)
A IC401
INPUT 4 IC402
JK402
B
SW402 VR401
JK403
INSERT I/O 4
JK501
A
INPUT 5 JK502
B IC501
IC502
JK503 SW502 VR501
INSERT I/O 5
IC503 SDATA-5/6
JK601 (24P)
A
INPUT 6 JK602 IC601 IC602
B
JK603 SW602 VR601
INSERT I/O 6
E
JK701
A
INPUT 7 JK702
B
IC701 IC702
JK703 SW702 VR701
INSERT I/O 7
IC703 SDATA-7/8
MCLK.64Fs.Fs.RESET.DFS
JK801 (24P)
A
INPUT 8 JK802 IC801 IC802
B CN501(17P),
CN502(15P),
JK803 SW802 VR801 CN503(38P) CN002(38P),CN951(15P),CN952(17P)
INSERT I/O 8 IC151(28P) IC153 IC155 JK151
AOUTL MUTE
STEREO L/R SDATA LPF
JK901 MUTE STEREO OUT L
A
DF . D/A
INPUT 9 JK902 AK4393
B IC154 IC156 JK152
IC901 AOUTR MUTE
JK903 IC902 LPF
MCLK
LRCK
SW902 VR901
BICK
DFS
MUTE
/PD
INSERT I/O 9 STEREO OUT R

/RESET
MCLK
64Fs
Fs
DFS
IC903 SDATA-9/10
JKA01 (24P)
A
INPUT 10 JKA02 ICA01 ICA02
B
JKA03 SWA02 VRA01
D
INSERT I/O 10 IC251(28P) IC253 IC255 JK251
MUTE
JKB01 OMNI_1/2 SDATA AOUTL LPF
MUTE
A DF . D/A
INPUT 11 AK4393
OMNI OUT 1
JKB02
MCLK.64Fs.Fs.RESET
IC254 IC256
B JK252
ICB01 MUTE
ICB02 AOUTR LPF
MCLK
LRCK
BICK
JKB03
DFS
SWB02 VRB01 MUTE

/PD
INSERT I/O 11
/RESET
OMNI OUT 2
64Fs
MCLK
DFS
Fs
ICB03 SDATA-11/12
JKC01 (24P)
A
INPUT 12 JKC02 ICC01 ICC02
B IC351(28P) IC353 IC355 JK351
OMNI_3/4 MUTE
JKC03 SWC02 VRC01 SDATA AOUTL LPF
MUTE
INSERT I/O 12 DF . D/A OMNI OUT 3
ICE01 AK4393
JKD01 ICD01
HA IC354 IC356
ICD02 JK352
INPUT13 MUTE
AOUTR
MCLK
LPF
LRCK
BICK
DFS
/PD
VRD01 GAIN MUTE

/RESET
OMNI OUT 4
64Fs
MCLK
DFS
Fs
JKE01 ICD03 SDATA-13/14

ICD01 ICE01 (24P)
HA ICE02
INPUT14
VRE01 GAIN IC451(28P)

IC453 IC455
ICF01 JK451
CH15/16 / 2TR IN MONI L/R SDATA MUTE
JKF01 AOUT L LPF
INPUT15 ICG01 MUTE
C
HA ICF02 DF . D/A
AK4393
MONITOR OUT L
IC454 IC456
JK452
ICF01 SWF01 VRF01 GAIN MUTE
JKG01 ICF03 SDATA-15/16 AOUT R LPF
MCLK
LRCK
BICK
ICG01 (24P) MUTE

DFS
/PD
INPUT16
HA ICG02
/RESET
MONITOR OUT R
64Fs
MCLK
DFS
Fs
IC552
IC552
VRG01 GAIN
BA
BA
CN131(16P), CN931(16P), CN954(11P)
CN101(16P),
CN552(11P), MONITOR /2TR IN VR551
IC551 CN901(16P) JK551
BA
2TR IN L BA ATT MUTE 2TR OUT L
(Analog I/O, AD/DA)
Hard: Analog Block
SW551
IC553
JK551
IC551 BA ATT MUTE 2TR OUT R
2TR IN R BA
VR651
HPA
JK651
IC651 MUTE
PHONES
HPA MUTE
01V96
B
5
1
H G F E D C B A
01V96
(Gain Reduction) METER METER (Out Meter)
OFF COMP
x 12
STEREO R
+48V
STEREO L
1 INPUT PATCH
SOLO R
(each 4ch )
SOLO L
AUX 1
AUX 8
BUS1
BUS2
BUS3
BUS4
BUS5
BUS6
BUS7
BUS8
ON
A METER
INSERT METER INSERT INSERT
[INPUT] INPUT 1(...32) ON LEVEL BAL
(1-12) PAD (Gain Reduction) METER STEREO L
B SOLO 4BAND OUTPUT
METER (Out Meter) ATT DELAY
PEAK METER EQ
0 SIGNAL
20 GAIN METER INSERT INSERT
[INSERT I/O] -60~ -16
ON LEVEL
(1-12) PAN STEREO R
4BAND INPUT Same as stereo master L
AD AD 1-12 GATE ATT
EQ DELAY
PAN
Keyin (Gain Reduction)
PEAK 12ch Group(1-12,13-24....)
METER METER (Out Meter)
SIGNAL LFE
AUX 1-8 (Gain Reduction) (Out Meter)
x2 METER METER
ON AUX
COMP
PRE/POST
[INPUT] AD AD 13-14
(13-14) METER
COMP INSERT INSERT INSERT
METER
GAIN ON LEVEL
2 -26~ +4 Keyin
Self or Stereo Link 4BAND OUTPUT
BUS 1(...8)
ATT
DIRECT OUT 1(...32) EQ DELAY
PEAK
[2TR IN] (L) SIGNAL
CH15/16
RCA /2TR IN ON LEVEL
ST IN 1-4 PAN BUS to STEREO
[INPUT] AD AD 15 METER
(15) SOLO
METER
[2TR GAIN PEAK
(R) -26~ +4 SIGNAL AUX1(...8)
IN] ON LEVEL
RCA The same the above
4BAND PAN
ATT
[INPUT] EQ
AD AD 16
(16)
Stereo Configuration PAN L
GAIN
LFE SOLO TRIM
[2TR IN]
-26~ +4 RCA R
SOLO L
16
[SLOT] SLOT SLOT 1-16 PRE/POST ON AUX SOLO R MONITOR
SOLO LOGIC
/2TR IN MONITOR OUT
MONITOR TRIM LEVEL
OUTPUT SOLO
8 DA
BUS1-8 L
3
MONO
8
[ADAT IN] ADAT 1-8 8 [MONITOR OUT]
AUX1-8
DA R
PHONES
2 LEVEL
[2TR IN DIGITAL] 2TRD L/R
COAXIAL
[PHONES]
METER METER OSCILLATOR
EFFECT SINE100Hz
8 SINE1kHz LEVEL ON OMNI 1
AUX1-8 FX1 SEND 1-2 2 DA
SINE10kHz STEREO
SELECT
FX1 Return L/R 1

PINK NOISE
50 FX1 BURST NOISE
BUS1-8 8 OMNI 2
INSERT to OUT PATCH for DA
2
SEND AUX1-8 8
cascade
BUS1 BUS OMNI 3 DA
[OMNI OUT]
METER METER DIRECT OUT 1-32 32 3
OUTPUT PATCH
EFFECT BUS8 BUS 50 OMNI 4
8 FX2 SEND 1-2 STEREO L BUS INSERT OUT DA
AUX1-8 4
SELECT
FX2 Return L/R TRIM ON STEREO R BUS

50 FX2 CASCADE SELECT SOLO L BUS
INSERT SOLO R BUS SLOT 16
SEND AUX1 BUS DITHER SLOT [SLOT OUT]
4 METER METER AUX8 BUS ADAT 8

DITHER [ADAT OUT]
EFFECT
8 FX3 SEND 1-2 for cascade
AUX1-8 FX3 Return L/R
SELECT
STEREO BUS 2 2TR DIGITAL 2 DITHER [2TR OUT DIGITAL]

FX3 8
INSERT 50 BUS1-8 BUS
8
COAXIAL
SEND AUX1-8 BUS
2
SOLO BUS
L
METER METER (-10dBV) [2TR OUT]
R
EFFECT
8 FX4 SEND 1-2
AUX1-8
SELECT
FX4 Return L/R STEREO L

STEREO L DA L
50 FX4
INSERT (+4dBu) [STEREO OUT]
SEND STEREO R DA
STEREO R R
SURROUND L
When 96kHz FX3,4 cannot be used. SURROUND R
5
Soft: Mixer Block
28CA1-8826666-5 1 BLOCK DIAGRAM 005 (01V96)

6
S R Q P O N M L K J I H G F E D C B A
01V96
BLOCK DIAGRAM 006 (01V96) 1
Analog Digital Digital Analog

Analog Digital
2
PAD GAIN INSERT AD
INPUT
PHASE GATE INSERT ATT. EQ INSERT COMP DELAY ON LEVEL INSERT PAN
BUS
INSERT ATT. EQ INSERT COMP
MASTER MASTER
INSERT BAL DELAY
OUTPUT
DA
Analog
PATCH Adder ON LEVEL PATCH
dBu dBFS Bit dBu
Max. Max. Output

Input [+24dBu] CASCADE IN CASCADE OUT
Digital Clipping Level [+24dBu] +24
+24 0 0
+20 [+18dBu] +20 3
1
-10
+10 2 Nominal Output +10
3 [+4dBu] [+4dBu] +4
+4 -20
-0 4
Nominal [-2dBu] 0
-2 Input
STEREO OUT
-30 5 GAIN MIN.,
OMNI OUT
-10 PAD ON -10
6 MONITOR OUT 4
-40
-20 7 -20
-50 8
-30 9 -30
Max.
-60 10 Input [-40dBu]
-40 -40
11 5
-70
-50 12 -50
-80 13 Nominal
Input [-60dBu] -60
-60 14
-90 GAIN MAX.,
15 PAD OFF
-70 -70
16
-100
17
6
-80 -80
18
-110
-90 19 -90
-120 20
-100 -100
21
-130
22 -110
7
-110
23
-140
-120 24 -120
-150 25
-130 -130
26
-160
-140 27 -140 8
28
-170
-150 29 -150
-180 30
-160 -160
31
-190
32
-170 DSP Noise Floor -170 9
33
-200
-180 34 -180
-210 35
-190 -190
36
10
[0dBu = 0.775Vrms]
[0dBFS = Full Scale]
11
Level Diagram
7 12
H G F E D C B A
01V96
1 OVERALL CONNECTOR CIRCUIT DIAGRAM (01V96)
LCD PN1 (1/2) PN2
14P
14P
CN105 CN301
23P
LCD Module CN2
PN1 (2/2)
2 (PARAMETER WHEEL)
3P
3P
CN104 CN201
CN1 CN101 CN102 CN103
24P 30P 26P 16P
FD MAIN 24P 30P 26P 16P ADA HA

CN006 CN701 CN702 CN703
11P
38P
38P
11P
CN503 CN002 CN954 CN552
34P
34P
CN001 CN704
16P
15P
15P
16P
CN502 CN951 CN931 CN901
16P
17P
17P
16P
CN501 CN952 CN131 CN101
CN002 CN004 CN005 CN953 CN551
12P 16P 14P 12P 13P
DCD 12P 16P DCA 14P 12P 13P

CN202 CN205
1/5 CN303 CN305 CN304
CN201 CN301
4P 8P
5 Note) When the mark in the diagram indicates pin 1 of the connector, connectors are connected pin 1 to pin n,
AC pin 2 to pin (n-1),, pin (n-1) to pin 2, and pin n to pin 1 where "n" represents the last pin number of the connector.
Connectors without the mark are connected pin 1 to pin 1,, and pin n to pin n.
Power 11n2n-1

n-1
2n1
Transformer 11
nnn
AC Inlet Assembly AC Cord
4P
2P
CN102 CN101
ACAss'y
6 28CA2-8826667 OVERALL CONNECTOR CIRCUIT DIAGRAM (01V96)

8
G F E D C B
AC CIRCUIT DIAGRAM (01V96) 01V96
POWER ON/OFF
to AC Inlet Assembly
ACAss'y
Destination F101
J, U, V KB000790 T4AL 250V
H, B, W, K KB000750 T2AL 250V 3
Capacitor
TO SERVICE PERSONNEL
Critical Components Information
specifications equal to those originally installed.
28CC1-8826684-1 AC CIRCUIT DIAGRAM (01V96)

9
DCA CIRCUIT DIAGRAM (01V96) SINGLE SHOT 01V96

1
PC24A05HF (XM967A00) NJM7905FA(XK309A00)

REGULATOR +5V REGULATOR -5V
32
1
1: INPUT 1: OUTPUT
1
2 2: COMMON
3 3 3: OUTPUT
2: INPUT
3: COMMON
PC24A15HF (X3506A00) NJM7915FA(XD854A00)

REGULATOR +15V REGULATOR -15V
to MAIN-CN005
4 REGULATOR +15V
32
1
1: INPUT 1: OUTPUT
1
2 2: GND 2: INPUT
3 3: OUTPUT 3: COMMON
6 REGULATOR -15V
to HA-CN551
REGULATOR -15V
8 to ADA-CN953
REGULATOR +5V
REGULATOR -5V
10
11
(1P) : Metal Oxide Film Resistor ()
( F ) : Metal Film Resistor ()
( ) : Mylar Capacitor () TO SERVICE PERSONNEL
( ) : Ceramic Capacitor () Components having special characteristics are marked and must be replaced with parts having
12 DCA CIRCUIT DIAGRAM (01V96)
28CC1-8826685-1 1
10
K J I H G F E D C B A
DCD CIRCUIT DIAGRAM (01V96) 01V96

1
to FD-CN002
DC-DC CONVERTER
to Power Transformer 4
DC-DC CONVERTER
TO SERVICE PERSONNEL
to MAIN-CN004 7
( ) : Ceramic Capacitor ()
X X : not installed ()
28CC1-8826686-1 2 DCD CIRCUIT DIAGRAM (01V96)

11 8
1 FD CIRCUIT DIAGRAM 002 (01V96) 01V96
2
OP AMP
3
MULTIPLEXER
OP AMP
MULTIPLEXER
5 TRANSCEIVER
to MAIN-CN704
6
D-FF D-FF
TRANSCEIVER
8
9
D-FF D-FF
10
to DCD-CN202
11
Interface Section
28CC1-8826674-2 FD CIRCUIT DIAGRAM 002 (01V96)
12
12
P O N M L K J I H G F E D C B
FD CIRCUIT DIAGRAM 003 (01V96) MULTIPLEXER OP AMP 01V96

2
OP AMP
OP AMP
3
OP AMP
4
OP AMP
MULTIPLEXER OP AMP
5
OP AMP
OP AMP
7
OP AMP
8
MULTIPLEXER
OP AMP
10
Fader Drive Section

28CC1-8826674-3 1 FD CIRCUIT DIAGRAM 003 (01V96) 11
13
NJM78L05UA(XJ598A00) NJM78L06UA(X3620A00) PC2912T-E1(X2091A00)
FD CIRCUIT DIAGRAM 004 (01V96) REGULATOR +5V REGULATOR +6V REGULATOR +12V 01V96
1 REGULETOR +6V REGULETOR +5V REGULETOR +12V REGULETOR +12V
4
1 1
2 2
3 3 1
2
3 1: INPUT
1: OUTPUT 1: OUTPUT 2: GND
2: COMMON 2: COMMON 3: OUTPUT
3: INPUT 3: INPUT 4: GND
1 fader 4 fader
OP AMP OP AMP
OP AMP OP AMP
5
2 fader 5 fader
6
OP AMP OP AMP
OP AMP OP AMP
8
3 fader 6 fader
9
OP AMP OP AMP
OP AMP OP AMP
10
: Metal Oxide Film Resistor ()

11 ( ) : Mylar Capacitor ()
Fader Drive Section (CH1-CH6)

28CC1-8826674-4 1 FD CIRCUIT DIAGRAM 004 (01V96)
12 14
FD CIRCUIT DIAGRAM 005 (01V96) 01V96

REGULETOR +12V REGULETOR +12V 1
7 fader 10 fader
OP AMP OP AMP
OP AMP OP AMP
4
5
8 fader 11 fader
6
OP AMP OP AMP
OP AMP OP AMP
8
9 fader 12 fader
OP AMP
9
OP AMP
OP AMP OP AMP
PC2912T-E1(X2091A00)
REGULATOR +12V
4
10
1
2
3 1: INPUT : Metal Oxide Film Resistor ()
2: GND ( ) : Ceramic Capacitor ()
3: OUTPUT
4: GND
( ) : Mylar Capacitor () 11
Fader Drive Section (CH7-CH12)

28CC1-8826674-5 1 FD CIRCUIT DIAGRAM 005 (01V96)
15 12
FD CIRCUIT DIAGRAM 006 (01V96) REGULETOR +12V REGULETOR +12V 01V96

1
13 fader 16 fader
OP AMP OP AMP
OP AMP OP AMP
4
5
STEREO
14 fader fader
6
OP AMP OP AMP
OP AMP OP AMP
8
15 fader
PC2912T-E1(X2091A00)
REGULATOR +12V
9
OP AMP
4
OP AMP
1
2
3 1: INPUT
2: GND
10 3: OUTPUT
4: GND
11
: Metal Oxide Film Resistor ()
( ) : Mylar Capacitor ()
Fader Drive Section (CH13-STEREO)
12 28CC1-8826674-6 1 FD CIRCUIT DIAGRAM 006 (01V96)
16
W V U T S R Q P O N M L K J I H G F E D C B A
ADA CIRCUIT DIAGRAM 002 (01V96) 01V96 1
128FS
256FS
MCLK
to MAIN-CN502 2
H: Normal Rate
H: Double Rate
DFS_ADA
3
ADC ADC ADC ADC ADC ADC ADC ADC
10
11
OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP

12
13
14

15
to HA-CN101 to HA-CN901
28CC1-8826670-2 1 ADA CIRCUIT DIAGRAM 002 (01V96)
17 16
X W V U T S R Q P O N M L K J I H G F E D C B A
1
ADA CIRCUIT DIAGRAM 003 (01V96) OMNI OUT 1 OMNI OUT 2 OMNI OUT 3 OMNI OUT 4 MONITOR OUT L MONITOR OUT R
01V96
STEREO OUT L STEREO OUT R (BAL) (BAL) (BAL) (BAL) (BAL) (BAL)
(BAL) (BAL)
5 OP AMP OP AMP OP AMP OP AMP
to HA-CN552
7 NJM78L05UA(XJ598A00)
REGULATOR +5V
OP AMP OP AMP OP AMP OP AMP
8
1
2
3
1: OUTPUT
9 2: COMMON
3: INPUT
REGULATOR +5V REGULATOR +5V REGULATOR +5V REGULATOR +5V
10
DAC DAC DAC DAC
11
12
13
TRANSCEIVER REGULATOR +5V
128FS
256FS
MCLK
HA Circuit Board HA Circuit Board HA Circuit Board HA Circuit Board

STEREO STEREO OMNI OMNI OMNI OMNI MONITOR MONITOR MONITOR MONITOR
OUT L OUT R OUT 1 OUT 2 OUT 3 OUT 4 OUT L OUT R OUT L OUT R
14 TRANSCEIVER Maximum R151 R153 R251 R253 R351 R353

HA HA HA HA
Circuit Board Circuit Board Circuit Board Circuit Board
output level R152 R154 R252 R254 R352 R354 R585 R586 R551 R552
H: Normal Rate
H: Double Rate
24dBu 1.5K 47 1.5K

2 DFS_ADA
20dBu 2.4K 5.6K 510

15
18dBu 3.0K 10K 200
INVERTER 15dBu 4.3K 18K 0

to DCA-CN305
16 3
4 Also change the value of R551 and R552 of HA circuit board at the time of output level change of STEREO OUT.
STEREO OUT
HAR551R552
5 Also change the value of R585 and R586 of MONITOR OUT at the time of output level change of STEREO OUT.
to MAIN-CN501 STEREO OUT
HAR551R552
17 28CC1-8826670-3 2 ADA CIRCUIT DIAGRAM 003 (01V96)

18 ( ) : Mylar Capacitor ()
ADA CIRCUIT DIAGRAM 004 (01V96) 01V96

1
adat OPTICAL
MIDI WORD CLOCK WORD CLOCK
2TR IN/OUT DIGITAL (COAX.)
to HOST USB OUT IN IN OUT
IN OUT THRU
CPU
INVERTER 4
Photo Coupler
LINE DRIVER
5
INVERTER LINE RECEIVER
LINE RECEIVER
INVERTER INVERTER
8
TRANSCEIVER
TRANSCEIVER LINE DRIVER
TRANSCEIVER
9
10
X X : not installed () 11
USB, MID, COAXIAL, ADAT, BNC

28CC1-8826670-4 3 to MAIN-CN503 ADA CIRCUIT DIAGRAM 004 (01V96)
12
19
1 HA CIRCUIT DIAGRAM 002 (01V96) 01V96
CH1-4 ON/OFF CH5-8 ON/OFF

3
4 to ADA-CN131
9 OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP
10
GAIN 1
GAIN 2
GAIN 3
GAIN 4
GAIN 5
GAIN 6
11
12
PAD 20dB 1 PAD 20dB 2 PAD 20dB 3 PAD 20dB 4 PAD 20dB 5 PAD 20dB 6
13
14
15
INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O
1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6
16 ( ) : Flame proof C. Resistor ()

28CC1-8826669-2 X X : not installed () HA CIRCUIT DIAGRAM 002 (01V96)
17 20
Y X W V U T S R Q P O N M L K J I H G F E D C B A
HA CIRCUIT DIAGRAM 003 (01V96) 01V96 1
CH9-12 ON/OFF
3
to ADA-CN931
4
OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP 9
10
GAIN 11
GAIN 12
GAIN 10
GAIN 7
GAIN 9
GAIN 8
11
12
PAD 20dB 7 PAD 20dB 8 PAD 20dB 9 PAD 20dB 10 PAD 20dB 11 PAD 20dB 12
13
14
15
INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O INPUT A INPUT B INSERT I/O
7 7 7 8 8 8 9 9 9 10 10 10 11 11 11 12 12 12
( ) : Flame proof C. Resistor ()

16
28CC1-8826669-3 HA CIRCUIT DIAGRAM 003 (01V96)

21
17
PHONES
1 HA CIRCUIT DIAGRAM 004 (01V96) 01V96
3
OP AMP OP AMP
5
MONITOR PHONES LEVEL
OUT LEVEL
OP AMP OP AMP MONITOR/2TR

IN
7
to ADA-CN954
8
GAIN 13 GAIN 14 GAIN 15 GAIN 16
9
CH15/16/2TR IN
10
OP AMP
OP AMP OP AMP
11 OP AMP
12
13
14 2TR IN ANALOG L/R 2TR OUT ANALOG L/R

to DCA-CN304
INPUT 13 INPUT 14 INPUT 15 INPUT 16
15 ( F ) : Metal Film Resistor ()
16 28CC1-8826669-4 HA CIRCUIT DIAGRAM 004 (01V96)

22
MAIN CIRCUIT DIAGRAM 002 (01V96) 01V96 1
PC2918T-E1(X2157A00) PC29M33T-E1(XU965A00)
REGULATOR +3.3V
REGULATOR +1.8V 2
4 2
OP AMP
1 1
3
2
3 1: INPUT 3
2: GND 1: INPUT
REGULATOR +3.3V 3: OUTPUT 2: COMMON
4: GND 3: OUTPUT
4
CLOCK BUFFER
5
REGULATOR +1.8V
6
SDRAM 64M
CPU
7
FLASH ROM 32M

8
10
OR
11
AND 12
OP AMP SYSTEM RESET

AND
13
socket
Battery SYSTEM RESET
Detection voltage
AND
AND 14
Detection voltage Detection voltage
SRAM 4M SRAM 4M
SYSTEM RESET
not used
(for check) OR
Lithium Battery
X X : not installed () 15
Battery VN103500 Battery
Notice for back-up battery removal Push the battery
as shown in figure,then the battery will pop up. CPU (SH-3) block
Druk de batterij naar beneden zoals aangeven in de
tekening de batterij springt dan naar voren. Battery holder
16
28CC1-8826668-2 5 MAIN CIRCUIT DIAGRAM 002 (01V96)
23
17
L K J I H G F E D C B A
MAIN CIRCUIT DIAGRAM 003 (01V96) 01V96

1
D-FF
OR
2 TRANSCEIVER
to LCD-CN1
LCD CONTROLLER
3 D-FF
AND AND
DC-DC CONVERTER
to DCA-CN303
to DCD-CN205
7
8
LCD controler, DC/DC converter block
28CC1-8826668-3 MAIN CIRCUIT DIAGRAM 003 (01V96)
24
R Q P O N M L K J I H G F E D C B A

INVERTER
TRANSCEIVER TRANSCEIVER TRANSCEIVER
4
TRANSCEIVER TRANSCEIVER TRANSCEIVER
TRANSCEIVER TRANSCEIVER
TRANSCEIVER TRANSCEIVER
6
TRANSCEIVER
7
BUFFER
TRANSCEIVER
TRANSCEIVER
TRANSCEIVER 9
10
11
CPU bus I/F block

12
25
1 MAIN CIRCUIT DIAGRAM 005 (01V96) 01V96
2
TRANSCEIVER
TRANSCEIVER
4
INVERTER
5 NAND
6
PLL
SYSTEMRESET INVERTER
7 TRANSCEIVER
9
DIR2
10
PLLP2
11
12
13
14
15
16
Clock system block
17 28CC1-8826668-5 ( ) : Mylar Capacitor ()
MAIN CIRCUIT DIAGRAM 005 (01V96)
26 ( ) : Film Capacitor ()
Y X W V U T S R Q P O N M L K J I H G F E D C B A

1
2
SDRAM 16M SDRAM 16M
4
DSP7 DSP7
10
BUFFER
SDRAM 16M
11
12
DSP7 DSP7
13
SDRAM 16M 14
15
16
DSP7 block
28CC1-8826668-6 ( F ) : Metal Film Resistor () MAIN CIRCUIT DIAGRAM 006 (01V96) 17
( ) : Mylar Capacitor () 27
DRAM 4M DRAM 4M
6
DSP6 DSP6
10
DRAM 4M DRAM 4M
11
12
13
D-FF
D-FF
14
15 DSP6 block
28
16
P O N M L K J I H G F E D C B A
6
MULTIPLEXER ATSC2A
MULTIPLEXER
10
ATSC2 (Slot) block

11
29
1
INVERTER
INVERTER
2
AND
SYSTEM RESET
3 D-FF
DIR2
INVERTER
4
INVERTER
5 D-FF
OR
7
ATSC2A
8 TC7SET32FU
OR
10
11 ( F ) : Metal Film Resistor ()
ADAT I/F block
TC7SET32FU
30
12

1
to ADA-CN952
3
TRANSCEIVER
4
BUFFER
to ADA-CN951
INVERTER
6
TRANSCEIVER
TRANSCEIVER
DIR
7
DIT
9
to ADA-CN002
AND
AND
10
11
2Tr Digital I/O, ADA I/F block
31
12

1
TRANSCEIVER
2
SLOT
BUFFER
TRANSCEIVER
Slot I/F block

32
8
D-FF D-FF 2
D-FF to PN1-CN101
D-FF
7
to PN1-CN102
8
D-FF D-FF
DECODER 10
11
INVERTER PN (Scan, LED source) I/F block
33
12
P O N M L K J I H G F E D C B A
2 TRANSCEIVER
DECODER
to FD-CN001
TRANSCEIVER
5
DECODER
6 TRANSCEIVER
TRANSCEIVER
8
TRANSCEIVER
GATEARRAY
to PN1-CN103
10
PN (SW buffer, REC2) I/F block

11
34
L K J I H G F E D C B A
LCD CIRCUIT DIAGRAM (01V96) 01V96

1
4
to MAIN-CN006 to LCD Module
5
DC-DC Output voltage LCD contrast
B curve
OP AMP
7
DC-DC CONVERTER
OP AMP
28CC1-8826677-1 2 LCD CIRCUIT DIAGRAM (01V96)

35
1
PN1 CIRCUIT DIAGRAM 002 (01V96) 01V96
5
AUX1 AUX2 AUX3 AUX4 AUX5 AUX6 AUX7 AUX8 HIGH HIGH-MID LOW-MID LOW ST IN 1-2 ST IN 3-4 SOLO
<FADER MODE> <FADER MODE> <FADER MODE> <FADER MODE> <FADER MODE> <FADER MODE> <FADER MODE> <FADER MODE> <SELECTED <SELECTED <SELECTED <SELECTED
CHANNEL> CHANNEL> CHANNEL> CHANNEL>
6 HOME 1-16 17-32 MASTER REMOTE SEL ST IN 1/3 SEL ST IN 2/4 SOLO ST IN 1/3 SOLO ST IN 2/4 ON STEREO ON ST IN 1/3 ON ST IN 2/4
(METER) <LAYER> <LAYER> <LAYER> <LAYER>
<FADER MODE>
10
PN1 (1/2)
11
PN1 LED MATRIX

28CC1-8826675-2 PN1 CIRCUIT DIAGRAM 002 (01V96)
12 36
PN1 CIRCUIT DIAGRAM 003 (01V96) 01V96

1
3
SCENE DIO/SETUP MIDI UTILITY /INS/DLY PAN/ PAIR/ PATCH STORE Cursor Down Cursor Up RECALL
<DISPLAY <DISPLAY <DISPLAY <DISPLAY <DISPLAY ROUTING GROUP <DISPLAY <SCENE <SCENE <SCENE <SCENE
ACCESS> ACCESS> ACCESS> ACCESS> ACCESS> <DISPLAY <DISPLAY ACCESS> MEMORY> MEMORY> MEMORY> MEMORY>
ACCESS> ACCESS>
HIGH HIGH-MID LOW-MID LOW

4
DYNAMICS EQ EFFECT VIEW <SELECTED <SELECTED <SELECTED <SELECTED
<DISPLAY <DISPLAY <DISPLAY <DISPLAY CHANNEL> CHANNEL> CHANNEL> CHANNEL>
ACCESS> ACCESS> ACCESS> ACCESS>
AUX1
<FADER MODE>
AUX2
<FADER MODE>
AUX3
<FADER MODE>
AUX4
<FADER MODE>
AUX5
<FADER MODE>
AUX6
<FADER MODE>
AUX7
<FADER MODE>
AUX8
<FADER MODE>
5
HOME
(METER)
1-16
<LAYER>
17-32
<LAYER>
MASTER
<LAYER>
REMOTE
<LAYER>
SEL ST IN 1/3 SEL ST IN 2/4 SOLO ST IN 1/3 SOLO ST IN 2/4 ON STEREO ON ST IN 1/3 ON ST IN 2/4 6
<FADER MODE>
PN1 (1/2) 10
11
PN1 SW MATRIX
28CC1-8826675-3 PN1 CIRCUIT DIAGRAM 003 (01V96)
37 12
M L K J I H G F E D C B A
PN1 CIRCUIT DIAGRAM 004 (01V96) SELECTED CHANNEL 01V96

1 PAN Q FREQUENCY GAIN
Parameter wheel
to MAIN-CN702
3 PN1 (2/2)
PN1 (1/2) PARAMETER WHEEL
to MAIN-CN703
5
to PN2-CN301
7
to MAIN-CN701
PN1 ENCODER
28CC1-8826675-4 1 PN1 CIRCUIT DIAGRAM 004 (01V96)
9 38
PN2 CIRCUIT DIAGRAM (01V96) 01V96

1
1 2
<USER <USER
DEFINED DEFINED
KYES> KYES>
<USER
1
<USER
2 4
DEFINED KYES> DEFINED KYES>
ST IN 1/3 ST IN 2/4
3 4
<USER <USER
DEFINED DEFINED
KYES> KYES>
3 4
<USER <USER 5
DEFINED KYES> DEFINED KYES>
to PN1-CN105
5 6
<USER <USER
DEFINED DEFINED
KYES> KYES>
5 6
<USER <USER
DEFINED KYES> DEFINED KYES> 6
7 8
<USER <USER
DEFINED DEFINED
KYES> KYES>
7 8
<USER <USER
DEFINED KYES> DEFINED KYES> 7
PN2 LED/SW MATRIX, ENCODER 8

28CC1-8826676-2 PN2 CIRCUIT DIAGRAM (01V96)
39

Yamaha 01v96

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Yamaha 01v96

Uploaded by

Copyright:

Available Formats

01V96

DIGITAL MIXING CONSOLE

IMPOR TANT NOTICE

WARNING: CHEMICAL CONTENT NOTICE!

WARNING: THIS APPARATUS MUST BE EARTHED

LITHIUM BATTERY HANDLING

Take care not to trap your fingers.

24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-

Threshold 54 dB to 0 dB (0.1 dB step)

Analog Input Spec

In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.

Analog Output Spec

In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.

Digital Input Spec

*1. ALESIS proprietary multichannel optical digital interface format

Digital Output Spec

2TR OUT DIGITAL IEC-60958 *1 0.5V pp/75 RCA pin jack

*1. Channel status of 2TR OUT DIGITAL

*2. ALESIS proprietary multichannel optical digital interface format

*3. Dither: word length 16/20/24 bit

I/O Slot SpecI/O

Control I/O SpecI/O

*1. MIDI IN can use as TIME CODE IN MTC.

Top view Front view

430 (Not included Screw Heads)

AD Input Section (p. 14) SCENE MEMORY Section (p. 17)

CH1-4 CH5-8 CH9-12

DISPLAY ACCESS SCENE MEMORY

SCENE DIO/SETUP MIDI UTILITY

OVER SELECTED CHANNEL

FADER MODE DYNAMICS EQ EFFECT VIEW

Section (p. 16)

AUX 1 AUX 2 AUX 3 AUX 4

q [INPUT] connectors A/B A/B

Monitor Out & Headphones Section

Channel Strip Section

q [ST IN] button

FADER MODE Section

AUX 1 AUX 2 AUX 3 AUX 4

DISPLAY ACCESS Section

SELECTED CHANNEL Section

PAN q [PAN] control

SCENE MEMORY Section

USER DEFINED KEYS Section

Data Entry Section

Power Section (p. 20) SLOT Section (p. 20)

PHANTOM +48V +48V

q [CH1-4 ON/OFF] switch CH14 /

q [MONITOR OUT] connectors L/R L/R

Digital I/O Section /

q [WORD CLOCK OUT] connector

q [MIDI IN/THRU/OUT] ports / /

q [POWER ON/OFF] switch /

CIRCUIT BOARD LAYOUT

Bottom Assembly Assy

Control Panel Assembly Assy

PN1 (2/2) PN1 (1/2)

After replacing the circuit board or fader of FD, please FD

1. Control Panel Assembly 1. Ass'y 3

Side panel L Side panel R

[50]: Bind Head Tapping Screw-B ( B ) 4.0X8 MFZN2BL (EG340190)

Control panel assembly

Bottom Assembly Section Ass'y

2. MAIN Circuit Board 2. MAIN 5