LG 32ls3500-Ud 32ls3510-Ua Chassis La25a mfl67454202

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LA25A
MODEL : 32LS3500 32LS3500-UD

MODEL : 32LS3510 32LS3510-UA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67454202 (1203-REV00) Printed in Korea

CONTENTS
CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION................................................................. 6
TROUBLESHOOTING.............................................................................. 13
BLOCK DIAGRAM.................................................................................... 24
EXPLODED VIEW .................................................................................. 25
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied LCD TV with LA25A/B/C chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 C 5 C(77 9 F), CST : 40 5 C

2) Relative Humidity: 65 % 10 %
3) Power Voltage
- AC 110-240 V~, 50/60 Hz
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
4. General Specification
No Item Specification Remark
1 Receiving System 1) ATSC / NTSC-M
2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz 120V, 50/60Hz on the label (USA)
4 Market NORTH AMERICA
5 Screen Size 22/26/32 inch Wide (1366 768) HD + 60Hz 22/26/32LS3500-UD,
22/26/32LS3510-UA
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module(Edge LED) LC320EXN-SEA2 LGD 32LS3500-UD/32LS3510-UA
T320XVN01.1 AUO
9 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
5. Supported video resolutions
5.1. Component input(Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. HDMI Input (DTV)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 31.47 60.00 27.027 SDTV 480P
2. 720*480 31.47 59.94 27.00 SDTV 480P
3. 1280*720 45.00 60.00 74.25 HDTV 720P
4. 1280*720 44.96 59.94 74.176 HDTV 720P
5. 1920*1080 33.75 60.00 74.25 HDTV 1080I
6. 1920*1080 33.72 59.94 74.176 HDTV 1080I
7. 1920*1080 67.50 60.00 148.50 HDTV 1080P
8. 1920*1080 67.432 59.94 148.352 HDTV 1080P
9. 1920*1080 27.00 24.00 74.25 HDTV 1080P
10. 1920*1080 26.97 23.976 74.176 HDTV 1080P
11. 1920*1080 33.75 30.00 74.25 HDTV 1080P
12. 1920*1080 33.71 29.97 74.176 HDTV 1080P
ADJUSTMENT INSTRUCTION
1. Application Range 4. MAIN PCBA Adjustments
This spec. sheet applies to LA25A Chassis applied LCD TV all * Download
models manufactured in TV factory. (1) E
xecute ISP program Mstar ISP Utility and then click
Config tab.
(2) S
et as below, and then click Auto Detect and check OK
2. Specification message. If display Error, Check connect computer, jig, and
(1) Because this is not a hot chassis, it is not necessary to use set.
an isolation transformer. However, the use of isolation (3) C
lick Connect tab. If display Cant , Check connect
transformer will help protect test instrument. computer, jig, and set.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 5 C of temperature and 6510% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz.
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 C
In case of keeping module is in the circumstance of 0C, it
should be placed in the circumstance of above 15C for 2
hours (4) C
lick Read tab, and then load download file(XXXX.bin) by
In case of keeping module is in the circumstance of below clicking Read
-20C, it should be placed in the circumstance of above
15C for 3 hours

[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p / RGB-PC 1080p (5) Click Auto tab and set as below
(2) EDID downloads for HDMI and RGB-PC (6) Click Run.
(7) After downloading, check OK message.
3.2. Final assembly adjustment

(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (IN-STOP)
(5) GND and HI-POT test
3.3. Appendix
(1) Shipment conditions
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information
4.1. ADC Calibration 4.2. EDID Download
4.1.1. Overview 4.2.1. Overview
ADC adjustment is needed to find the optimum black level I t is a VESA regulation. A PC or a MNT will display an
and gain in Analog-to-Digital device and to compensate RGB optimal resolution through information sharing without any
deviation necessity of user input. It is a realization of Plug and Play.
4.1.2. Equipment & Condition 4.2.2. Equipment

(1) Protocol: RS-232C
(1) Since EDID data is embedded, EDID download JIG, HDMI
(2) Inner Pattern
cable and D-sub cable are not need.
- Resolution : 1080p(Comp)
(2) Adjust by using remote controller.
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.70.1 Vp-p
4.2.3. Download method (using DFT)
4.1.3. Adjustment PC(for communication through RS-232C), UART baud rate:
4.1.3.1. Adjustment method 115200 bps
- Connect to Jig by using RS-232, adjust Component Command : aa 00 00 (Start Factory mode)
Command : ae 00 10 (Download All EDID)
4.1.3.2. Adj. protocol Command : aa 00 90 (End of Factory mode)
Protocol CMD 1 CMD 2 Data 1 Data 2 Remark

4.2.4. Download method (using Service Remocon)
Enter a a 00 00 When (1) Press Adj. key on the Adj. R/C,
adj transfer
(2) Select EDID D/L menu.
mode the Mode
(3) By pressing Enter key, EDID download will begin
In,Carry
the com- (4) If Download is successful, OK is display, but If Download is
mand. failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
Start a d 00 10 Automati- Caution: When EDID Download, must remove RGB/HDMI
ADC adj cally adjust- Cable.
ment (Use
(6) EDID Write confirmation
internal
pattern) EDID D/L (PCM)
HDMI1 : OK
4.1.3.3. Manual ADC process using Service Remocon
HDMI2 : OK
After enter Service Mode by pushing ADJ key, execute ADC
Adjust by pushing key at 0. ADC CALIBRATION .
0. TOOL OPTION1
1. TOOL OPTION2
2. TOOL OPTION3
3. Country Group
4. ADC CALIBRATION
5. W/B ADJUST
6. EDID D/L (PCM)
7. SUB B/C ADJUST
Manual ADC Confirmation using Service Remocon. After

enter Service Mode by pushing INSTART key,
ADJUST ADC (COMPONENT) : OK
4.3. EDID DATA 4.3.2. AC3 EDID Data
4.3.2.1. HD Model
4.3.1. North America (PCM) 4.3.2.1.1. 8BIT
4.3.1.1. HD Model
HDMI 1-HD (C/S : 715D)
4.3.1.1.1. 8BIT
EDID Block 0, Bytes 0-127 [00H-7FH]
HDMI 1-HD (C/S : 71CF)
EDID Block 0, Bytes 0-127 [00H-7FH] 0 1 2 3 4 5 6 7 8 9 A B C D E F
-------------------------------------------------------------------------------
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
--------------------------------------------------------------------------------- 10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 71
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 71 EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH] 0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
--------------------------------------------------------------------------------- 10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 5D
60 | 18 26 36 80 A0 70 38 1F 40 30 20 25 00 40 84 63
70 | 00 00 1A 00 00 00 00 00 00 00 00 00 00 00 00 CF
HDMI 2-HD (C/S : 714D)
EDID Block 0, Bytes 0-127 [00H-7FH]
HDMI 2-HD (C/S : 71BF)
EDID Block 0, Bytes 0-127 [00H-7FH] 0 1 2 3 4 5 6 7 8 9 A B C D E F
-------------------------------------------------------------------------------
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
--------------------------------------------------------------------------------- 10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 71
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 71 EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]] 0 1 2 3 4 5 6 7 8 9 A B C D E F

--------------------------------------------------------------------------------
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
--------------------------------------------------------------------------------- 10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 4D
60 | 18 26 36 80 A0 70 38 1F 40 30 20 25 00 40 84 63
70 | 00 00 1A 00 00 00 00 00 00 00 00 00 00 00 00 BF
4.4. Tool Option Input
- Input Model Tool Option according to BOM
5. Final Assembly Adjustment 5.1.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj.
5.1. White Balance Adjustment
RS-232C COMMAND
5.1.1. Overview Explanation
5.1.1.1. W/B adj. Objective & How-it-works CMD DATA ID
(1) Objective: To reduce each Panels W/B deviation Wb 00 00 Begin White Balance adj.
(2) H ow-it-works: When R/G/B gain in the OSD is at 192, it
Wb 00 ff End White Balance adj.
means the panel is at its Full Dynamic Range. In order to
(internal pattern disappears )
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
(2) Adjustment Map
the desired value.
(3) Adj. condition: normal temperature Command Data Range
(lower caseASCII) (Hex.) Default
- Surrounding Temperature: 255 C Adj. item
(Decimal)
- Warm-up time: About 5 Min CMD1 CMD2 MIN MAX
- Surrounding Humidity: 20% ~ 80%
Cool R Gain j g 00 C0 172
- Before White balance adjustment, Keep power on status,
dont power off G Gain j h 00 C0 172
B Gain j i 00 C0 192
5.1.1.2. Adj. condition and cautionary items
(1) L ighting condition in surrounding area surrounding lighting R Cut 64
should be lower 10 lux. Try to isolate adj. area into dark G Cut 64
surrounding. B Cut 64
(2) P robe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface Medium R Gain j a 00 C0 192
(80~ 100) G Gain j b 00 C0 192
(3) Aging time B Gain j c 00 C0 192
- A fter Aging Start, Keep the Power ON status during 5
Minutes. R Cut 64
- In case of LCD, Back-light on should be checked using no G Cut 64
signal or Full-white pattern.
B Cut 64
Warm R Gain j d 00 C0 192
5.1.2. Equipment
G Gain j e 00 C0 192
(1) C olor Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14) B Gain j f 00 C0 172
(2) A dj. Computer (During auto adj., RS-232C protocol is R Cut 64
needed)
(3) Adjust Remocon G Cut 64
(4) V ideo Signal Generator MSPG-925F 720p/204-Gray B Cut 64
(Model: 217, Pattern: 49)
Color Analyzer Matrix should be calibrated using CS-1000
5.1.3. Equipment connection
Color Analyzer
Probe RS-232C
Computer
RS-232C
RS-232C

Pattern Generator
Signal Source
If TV internal pattern is used, not needed
5.1.5. Adjustment method 5.2. O
ption selection per country
5.1.5.1 Auto WB calibration 5.2.1. Overview
(1) S et TV in ADJ mode using P-ONLY key (or POWER ON (1) Tool option selection is only done for models in Non-USA
key) North America due to rating
(2) Place optical probe on the center of the display (2) Applied model: LA25C Chassis applied to CANADA and
- It need to check probe condition of zero calibration before MEXICO
adjustment.
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment. 5.2.2. Country Group selection
(5) W hen WB adjustment is completed with OK message, (1) Press ADJ key on the Adj. R/C, and then select Country
check adjustment status of pre-set mode (Cool, Medium, Group Menu
Warm) (2) Depending on destination, select US, then on the lower
(6) Remove probe and RS-232C cable. Country option, select US, CA, MX.
W/B Adj. must begin as start command wb 00 00 , and Selection is done using +, - KEY
finish as end command wb 00 ff, and Adj. offset if need (3) Using DFT(Auto)
PC (for communication through RS-232C) -> UART Baud
5.1.5.2. Manual adj. method rate : 115200 bps
(1) Set TV in Adj. mode using POWER ON Command : ah 00 00 DATA(Area Number(hexadecimal)
(2) Z ero Calibrate the probe of Color Analyzer, then place it on ITEM DATA(Area Number) AREA
the center of LCD module within 10cm of the surface..
AREA OPTION1 0 USA
(3) P ress ADJ key -> EZ adjust using adj. R/C -> 6. White-
Balance then press the cursor to the right (KEY). 1 CANADA
( When KEY() is pressed 204 Gray(80IRE) internal pattern 2 MEXICO
will be displayed)
(4) O ne of R Gain / G Gain / B Gain should be fixed at 192, 3 COMMERCIAL
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of 5.2.3. Tool Option Inspection
color temperature Press Adj. key on the Adj. R/C, then select Tool option
Model Tool 1 Tool 2 Tool 3 Tool 4
5.1.6 R
eference (White Balance Adj. coordinate and 42CS530-UB LGD 01028 04354 45120
color temperature)
42CS560-UE LGD 01028 08450 45120
Luminance: 204 Gray
Standard color coordinate and temperature using CS-1000 42CS560-UE AUO 09216 08450 45120
(over 26 inch) 37CS560-UE LGD 00772 08450 45120
Coordinate 32CS560-UE LGD 00516 08450 45120
Mode Temp uv
X Y 32CS560-UE AUO 08704 08450 45120
Cool 0.269 0.273 13,000K 0.0000 32CS460-UC LGD 00512 00258 45120
Medium 0.285 0.293 9,300K 0.0000 32CS461-UA
Warm 0.313 0.329 6,500K 0.0000 32CS460-UC AUO 08704 00258 45120
32CS461-UA
S tandard color coordinate and temperature using 26CS460-UA LGD 00257 00258 45120
CA-210(CH 14)
32LS3400-UA LGD 545 12546 45128
Coordinate
Mode Temp uv 42LS3400-UA LGD 1057 12546 45128
X Y
22LS3500-UD CMI 4113 12546 45128
Cool 0.2690.002 0.2730.002 13,000K 0.0000
26LS3500-UD LGD 273 12546 45128
Medium 0.2850.002 0.2930.002 9,300K 0.0000
AUO 8464 12546 45128
Warm 0.3130.002 0.3290.002 6,500K 0.0000
32LS3500-UD AUO 8722 12546 45128
32LS3500-UD LGD
Tool option can be reconstructed by Software
5.3. Ship-out mode check (In-stop)

- After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode
Copyright LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
6. GND and HI-POT Test 8. EYE-Q TEST
6.1. GND & HI-POT auto-check preparation Step 1) Turn on the TV..
(1) C
heck the POWER CABLE and SIGNAL CABE insertion Step 2) P ress 'EYE button' on the adjustment remote-
condition controller.
Step 3) Cover 'Eye Q sensor' on the front of set with your
hands, hold it for 6 seconds.
6.2. GND & HI-POT auto-check Step 4) Check "the Sensor Data" on the screen, make certain
(1) P allet moves in the station. (POWER CORD / AV CORD is that Data is below 10. If Data isnt below 10 in 6
tightly inserted) seconds, Eye Q sensor would be bad. You should
(2) Connect the AV JACK Tester. change Eye Q sensor.
(3) Controller (GWS103-4) on. Step 5) Uncover your hands from Eye Q sensor, hold it for 6
(4) GND Test (Auto) seconds.
- If Test is failed, Buzzer operates. Step 6) Check "Back Light(xxx)" on the screen, check data
- If Test is passed, execute next process (Hi-pot test). increase . You should change Eye Q sensor.
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
automatically.
<Step 2> <Step 3>
6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND. <Step 4> <Step 5> <Step 6>
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
7. AUDIO output check

7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
(3) RGB PC: 1KHz sine wave signal (0.7Vrms)
7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio 9.0 10.0 12.0 W (1) Measurement

practical 8.5 8.9 9.9 Vrms condition
max Output, -E
Q/AVL/Clear
L/R Voice: Off
(2) Speaker (8
Impedance)
9. USB S/W Download
(optional, Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
than that of TV set, it didnt work. Otherwise USB data is
automatically detected.
(3) Show the message Copying files from memory
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically

(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didnt have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.

(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push OK button.
(3) Punch in the number. (Each model has their number.)
TROUBLESHOOTING
1. Power-up boot check
Check stand-by Voltage. No ok Main B/D 3.5V Line ok
Check Power connector Replace Power board.
P403 9~12pin : +3.5V_ST Short Check
ok
Check Micom Voltage No

Replace L404
L404 : +3.5V
ok
No
Check X201 clock
Replace X201
24 MHz
ok
No No
Check P403 PWR_ON. Re-download software. Replace Mstar(IC101) or Main board
1pin : 3.3V
ok
No
Check Multi Voltage Replace Power Board
P403 2pin:24V ,17pin:12V
ok
Check IC402/3/7 Output Voltage
IC402 : 2.5V No
IC403 : 1.1V Replace IC402/3/7, Q403
IC407 : 1.5V
Q403 : 3.3V
ok
No
Check LVDS Power Voltage
Replace Q409
Q409 : 12V
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board
ok
Check Inverter Control & Error Out No

P403 18 pin : High Check Power Board or Module
P403 24 pin : low
ok
Change Module
2. Digital TV Video
Check RF Cable & Signal
ok
No
Check Tuner 3.3V Power
Replace L3703
L3703
ok
Check Tuner 1.8V Power No

Replace IC3703
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal No

Bad Tuner. Replace Tuner.
TU3700 10/11 Pin
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
3. Analog TV Video
ok
No
Replace L3703
L3703
ok

Replace IC3703 .
IC3703 2 pin : 1.8V
ok
Check CVBS Signal No

TU3700 8 Pin
ok
No
4. AV Video
Check input signal format.
Is it supported?
ok
Check AV Cable for damage

for damage or open conductor
ok
Check JK1604 , JK9901 No
CVBS Signal Line Replace Jack
R246 , R4016
ok
No
Check CVBS_DET Signal Replace R9915 or R1666
ok
No
5. Component Video
Is it supported?
ok
Check Component Cable

for damage or open conductor.
ok
Check JK1601 or 1603 No

Replace Jack
Y/PB/PR signal Line
ok
No
Check COMP_DET Signal Replace R1614, R4223 or R1615
ok
No
6. RGB Video
Is it supported?
ok
Check RGB Cable conductors

ok
Check EDID No
I2C Signal re-download EDID data ,Replace Mstar(IC101) or Main Board
R138, R139(SDA,SCL)
ok
Check JK1104 No
Replace Jack
H/V_Sync/R/G/B Signal Line
ok
No
Check DSUB_DET Replace R1146 or R1147
ok
No
7. HDMI Video
Is it supported?
ok
Check HDMI Cable conductors

ok
Check EDID No
R4033,R4034,R4035,R4036 Replace the defective IC or re-download EDID data
,R4037,R4038 I2C Signal
ok
No
Check JK801, JK802, JK803 Replace Jack
ok
No
Check HDMI_DET(HPD) Replace R830,R828,R862
ok
Check HDCP EEPROM(IC103) No

Replace the defective IC.
Power & I2C Signal
ok
No Check other set No

Check HDMI Signal Replace Main Board
If no problem, check signal line
ok
No
8. All Source Audio
Check the TV Speaker Menu Off
Toggle the Menu
(Menu -> Sound -> TV Speaker)
On
Check AMP IC(IC501) Power No

Replace Amp IC(IC501)
24V, 3.3V
ok
No
Check Mstar AUDIO_MASTER_CLK Replace Mstar(IC101) or Main Board.
R148
ok
Check AMP I2C Line No

Check signal line. Or replace Mstar(IC101)
R140, R141
ok
Check Mstar I2S Output No

Check signal line. Or replace Mstar(IC101)
IC501 9,10,11 Pin
ok
Check Output Signal P501 No

Replace Audio AMP IC(IC501)
1, 2, 3, 4 pin.
ok
No Replace connector
Check Connector & P501
if found to be damaged.
ok
Check speaker resistance No

Replace speaker.
and connector damage.
9. Digital TV Audio
ok
No
Replace L3703
L3703
ok

Replace IC3703
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal No

TU3700 10/11 Pin
ok
Follow procedure
8. All source audio
trouble shooting guide.
10. Analog TV Audio
ok
No
Replace L3703
L3703
ok

Replace IC3703 .
IC3703 2 pin : 1.8V
ok
Check CVBS Signal No

TU3700 8 Pin
ok
Follow procedure
8. All source audio
11. AV Audio
Check AV Cable for damage
ok
No
Check JK1604 & Signal Line Replace Jack
ok
Follow procedure
8. All source audio
12. Component Audio

Check Component Cable
ok
Check JK1601, JK1603 No

Replace Jack
& Signal Line
ok
Follow procedure
8. All source audio
13. RGB Audio

Check Cable conductors
ok
No
Check JK1102 & Signal Line Replace Jack
ok
Follow procedure
8. All source audio
Copyright
X-tal
24MHz
Half
IF +/-
NIM
FPC(51P/FHD)
(SI21 TU_CVBS
76_AT
SIF LVDS
SC_1I

NPUT) (FHD/HD 60z)
FPC(30P/HD)
LG Electronics. Inc. All rights reserved.

Rear SPI
SERIAL FLASH
(64M bit)
MX25L6445EMI
TMDS
HDMI(DVI)
CVBS, Y/Pb/Pr, L/R DDR3 Add.

Component 2
DDR3 Data
1 DDR3 1Gb
- 24 -
CLK 800MHz
AV CVBS, L/R
Hynic
S7LR H5TQ1G63DFR
I2C
AT24C1024BN-SH-T
512Kbit
BLOCK DIAGRAM
SENSOR_SCL
Internal SENSOR_SDA
Micom KEY1
CONTROL
(PM) KEY2 IR & LED /
(SOFT TOUCH)
I2S LED_B/LG LOGO
A. AMP DP/DM
SPK L/R IR
NTP7500 L/R
USB2.0
TMDS
Side
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
400 Do not modify the original design without permission of manufacturer.
910
900
521
810
120
540
LV1
530
310
* Set + Stand
A10
* Stand Base
Stand Body
320
A9
+
200
A5
A21
A2
510
300
TP for NON-EU models(except EU and China)
TP for CI slot TP for SCART TP for Headphone

/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT
/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT
/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE
/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] SC1_SOG_IN HP_DET
/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT
/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout
/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout
/PCM_CD PCM_D[7] CI_TS_DATA[4] SC1_CVBS_IN
/PCM_WAIT CI_TS_DATA[5]
PCM_RST CI_TS_DATA[6]
/CI_CD1 CI_TS_DATA[7]
/CI_CD2
PCM_5V_CTL
CI_DET
TP for S2
S2_RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4_S7LR2 2011.07.07
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EN 3
Copyright 2012 LG Electronics. Inc. All right reserved.

Only for training and service purposes LGE Internal Use Only
RS-232C
COMMERCIAL MODEL OPTION

COMMERCIAL MODEL OPTION COMMERCIAL
JP1002
IR_OUT
R1003 M6 6
100 JP1000
+3.5V_ST
M1 1
R1002 M3_DETECT 3
100 JP1001
JP1004
M4 4
C1000 M5_GND 5
0.33uF OPT OPT KJA-PH-1-0177
D1000 D1001 JK1001
ADUC 20S 02 010L ADUC 20S 02 010L
COMMERCIAL COMMERCIAL 20V 20V
COMMERCIAL C1005
0.1uF
IC1000
MAX3232CDR
COMMERCIAL C1+ VCC

1 16
C1001 +3.5V_ST P1000
0.1uF V+ GND
COMMERCIAL 2 15 12507WR-04L
C1002
0.1uF C1- DOUT1
JP1003
VCC
3 14 1
COMMERCIAL C2+ RIN1 RS-232C_IC_Bypass PM_RXD

4 13 2
C1003
0.1uF C2- ROUT1 R1000 R1001 GND
5 12 0 0 3
PM_RXD
RS-232C_IC_Bypass
COMMERCIAL V- DIN1 RM_TXD

6 11 PM_TXD 4
C1004
0.1uF DOUT2 DIN2 5
7 10
GND
RIN2 ROUT2
8 9
EAN41348201
For Comsumer model,

use 4PIN Wafer.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/08/13
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_PHONE 10

AVDD_DDR0 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0
+1.5V_DDR AVDD_DDR0
R1227
R1201
R1224
R1204
1K 1%
1K 1%
OS
OS
1K 1%
1K 1%
L1202
CIC21J501NE
A-MVREFDQ B-MVREFCA B-MVREFDQ
0.1uF
A-MVREFCA
OS 1000pF
0.1uF
1000pF
0.1uF
OS 1000pF
OPT
0.1uF
1000pF
1%
1%
1%
1%
C1250
R1228
C1217
C1218
C1219
C1238
C1241
R1202
R1225
0.1uF
0.1uF
0.1uF
R1205
C1206
C1239
C1220
10uF
C1247
C1248
C1249
C1251
1uF
1uF
1uF
1uF
1uF
OS
OS
C1202
C1201
C1204
1K
C1203
1K
1K
OS
OS
1K
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
IC1201-*1 IC1202-*1
K4B1G1646G-BCH9 K4B1G1646G-BCH9
DDR_1333_SS_NEW DDR_1333_SS_NEW
N3 M8 N3 M8
A0 VREFCA A0 VREFCA
P7 P7
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
A4 A4
P2 P2
A5 A5
R8 L8 R8 L8
A6 ZQ A6 ZQ
R2 R2
A7 A7
T8 T8
A8 A8
R3 B2 R3 B2
A9 VDD_1 A9 VDD_1
L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
EAN61828901 R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
EAN61828901 IC1202 N8
BA0 VDD_9
N8
BA0 VDD_9
IC1201 H5TQ1G63DFR-H9C M3
BA1
M3
BA1
H5TQ1G63DFR-H9C IC101 BA2

A1
BA2
A1
LGE2111A-T8 DDR_1333_HYNIX J7
VDDQ_1
A8 J7
VDDQ_1
A8
CK VDDQ_2 CK VDDQ_2
DDR_1333_HYNIX K7 C1 K7 C1
N3 M8 CK VDDQ_3 CK VDDQ_3
B-MA0 A0 VREFCA B-MVREFCA K9 C9 K9 C9
A-MVREFCA
M8
VREFCA A0
N3
P7
A-MA0
A11
S7LR2_DIVX_MS10 B23
B-MA1
P7
P3
A1
L2
CKE VDDQ_4
VDDQ_5
D2
E9 L2
CKE VDDQ_4
VDDQ_5
D2
E9
A1 A-MA1 A-MA0 A_DDR3_A[0] B_DDR3_A[0] B-MA0 B-MA2 A2 CS VDDQ_6 CS VDDQ_6
P3 C14 D25 N2 H1 K1 F1 K1 F1
A-MA2 A-MA1 B-MA1 B-MA3 B-MVREFDQ ODT VDDQ_7 ODT VDDQ_7
A2 A_DDR3_A[1] B_DDR3_A[1] A3 VREFDQ J3 H2 J3 H2
H1 N2 B11 F22 P8 RAS VDDQ_8 RAS VDDQ_8
A-MVREFDQ VREFDQ A3 A-MA3 A-MA2 A_DDR3_A[2] B_DDR3_A[2] B-MA2 B-MA4 A4 K3 H9 K3 H9
P8 F12 G22 P2 OS CAS VDDQ_9 CAS VDDQ_9
A-MA4 A-MA3 B-MA3 B-MA5 L3 L3
A4 A_DDR3_A[3] B_DDR3_A[3] A5 R1226 WE WE
P2 C15 E24 R8 L8 J1 J1
R1203 A5 A-MA5 A-MA4 A_DDR3_A[4] B_DDR3_A[4] B-MA4 B-MA6 A6 ZQ NC_1 NC_1
L8 R8 E12 F21 R2 T2 J9 T2 J9
A-MA6 A-MA5 B-MA5 B-MA7 240 RESET NC_2 RESET NC_2
ZQ A6 A_DDR3_A[5] B_DDR3_A[5] A7 L1 L1
240 R2 A14 E23 T8 1% AVDD_DDR0 NC_3 NC_3
A7 A-MA7 A-MA6 A_DDR3_A[6] B_DDR3_A[6] B-MA6 B-MA8 A8 L9 L9
AVDD_DDR0 1% T8 D11 D22 R3 B2 NC_4 NC_4
A-MA8 A-MA7 B-MA7 B-MA9 F3 T7 F3 T7
A8 A_DDR3_A[7] B_DDR3_A[7] A9 VDD_1 C1227 10uF DQSL NC_6 DQSL NC_6
B2 R3 B14 D24 L7 D9 G3 G3
VDD_1 A9 A-MA9 A-MA8 A_DDR3_A[8] B_DDR3_A[8] B-MA8 B-MA10 A10/AP VDD_2 DQSL DQSL
C1205 10uF D9 L7 D12 D21 R7 G7 OS C1228 0.1uF
VDD_2 A10/AP A-MA10 A-MA9 A_DDR3_A[9] B_DDR3_A[9] B-MA9 B-MA11 A11 VDD_3 C7 A9 C7 A9
C1207 0.1uF G7 R7 C16 C24 N7 K2 OS C1229 0.1uF DQSU VSS_1 DQSU VSS_1
VDD_3 A11 A-MA11 A-MA10 A_DDR3_A[10] B_DDR3_A[10] B-MA10 B-MA12 A12/BC VDD_4 B7 B3 B7 B3
C1208 0.1uF K2 N7 C13 C25 T3 K8 OS C1230 0.1uF DQSU VSS_2
E1
DQSU VSS_2
E1
VDD_4 A12/BC A-MA12 A-MA11 A_DDR3_A[11] B_DDR3_A[11] B-MA11 B-MA13 A13 VDD_5 VSS_3 VSS_3
C1210 0.1uF K8 T3 A15 F23 N1 OS C1231 0.1uF E7 G8 E7 G8
VDD_5 A13 A-MA13 A-MA12 A_DDR3_A[12] B_DDR3_A[12] B-MA12 VDD_6 DML VSS_4 DML VSS_4
C1211 0.1uF N1 E11 E21 M7 N9 OS C1232 0.1uF D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
VDD_6 A-MA13 A_DDR3_A[13] B_DDR3_A[13] B-MA13 NC_5 VDD_7 J8 J8
C1212 0.1uF N9 M7 B13 D23 R1 OS C1233 0.1uF VSS_6 VSS_6
VDD_7 NC_5 A-MA14 A_DDR3_A[14] B_DDR3_A[14] B-MA14 VDD_8 E3 M1 E3 M1
C1213 0.1uF R1 M2 R9 OS C1234 0.1uF
F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9
VDD_8 B-MBA0 BA0 VDD_9 DQL1 VSS_8 DQL1 VSS_8
C1214 0.1uF R9 M2 B-MCK N8 OS C1235 0.1uF F2 P1 F2 P1
VDD_9 BA0 A-MBA0 A-MCK B-MBA1 BA1 DQL2 VSS_9 DQL2 VSS_9
OS
R1235
N8 F13 G20 M3 OS C1236 0.1uF F8 P9 F8 P9
56
R1237
C1215 0.1uF A-MBA1 A-MBA0 B-MBA0 B-MBA2 DQL3 VSS_10 DQL3 VSS_10
1%
BA1 A_DDR3_BA[0] B_DDR3_BA[0] BA2
1%
H3 T1 H3 T1
M3 B15 F24 OS C1240 A1
56
C1216 0.1uF DQL4 VSS_11 DQL4 VSS_11

BA2 A-MBA2 A-MBA1 A_DDR3_BA[1] B_DDR3_BA[1] B-MBA1 VDDQ_1 H8 T9 H8 T9
OS A1 C1209 E13 F20 J7 A8 DQL5 VSS_12 DQL5 VSS_12
A-MBA2 B-MBA2 G2 G2
VDDQ_1 A_DDR3_BA[2] B_DDR3_BA[2] 0.01uF CK VDDQ_2 DQL6 DQL6
R1236
A8 J7 K7 C1
56
R1238
50V H7 H7
0.01uF
1%
VDDQ_2 CK CK VDDQ_3 DQL7 DQL7
1%
OS
C1 K7 50V C17 G25 K9 C9 B1 B1
56
A-MCK B-MCK B-MCKE VSSQ_1 VSSQ_1

VDDQ_3 CK A_DDR3_MCLK B_DDR3_MCLK CKE VDDQ_4 D7 B9 D7 B9
C9 K9 A17 G23 B-MCKB D2 DQU0 VSSQ_2 DQU0 VSSQ_2
VDDQ_4 CKE A-MCKE A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ B-MCKB VDDQ_5 C3 D1 C3 D1
D2 B16 F25 L2 E9 DQU1 VSSQ_3 DQU1 VSSQ_3
A-MCKB A-MCKE B-MCKE C8 D8 C8 D8
VDDQ_5 A_DDR3_MCLKE B_DDR3_MCLKE CS VDDQ_6 DQU2 VSSQ_4 DQU2 VSSQ_4
E9 L2 K1 F1 C2 E2 C2 E2
VDDQ_6 CS B-MODT ODT VDDQ_7 DQU3 VSSQ_5 DQU3 VSSQ_5
F1 K1 J3 H2 A7 E8 A7 E8
A-MODT AVDD_DDR0 B-MRASB DQU4 VSSQ_6 DQU4 VSSQ_6
VDDQ_7 ODT RAS VDDQ_8 A2 F9 A2 F9
H2 J3 E14 D20 K3 H9 DQU5 VSSQ_7 DQU5 VSSQ_7
VDDQ_8 RAS A-MRASB AVDD_DDR0 A-MODT A_DDR3_ODT B_DDR3_ODT B-MODT B-MCASB CAS VDDQ_9 B8 G1 B8 G1
H9 K3 B12 B25 L3 DQU6 VSSQ_8 DQU6 VSSQ_8
A-MCASB R1231 A-MRASB B-MRASB R1232 B-MWEB A3 G9 A3 G9
VDDQ_9 CAS A_DDR3_RASZ B_DDR3_RASZ WE DQU7 VSSQ_9 DQU7 VSSQ_9
L3 A12 B24 10K J1
WE A-MWEB 10K A-MCASB A_DDR3_CASZ B_DDR3_CASZ B-MCASB NC_1
J1 C12 A24 T2 J9
NC_1 A-MWEB A_DDR3_WEZ B_DDR3_WEZ B-MWEB OS B-MRESETB RESET NC_2
J9 T2 L1
NC_2 RESET A-MRESETB NC_3
L1 F11 E20 L9 IC1201-*2 IC1202-*2
NC_3 A-MRESETB A_DDR3_RESET B_DDR3_RESET B-MRESETB NC_4 NT5CB64M16DP-CF NT5CB64M16DP-CF
L9 F3 T7
NC_4 B-MDQSL DQSL NC_6 B-MA14
T7 F3 G3
A-MA14 NC_6 DQSL A-MDQSL B-MDQSLB DQSL DDR_1333_NANYA_NEW DDR_1333_NANYA_NEW
G3 B19 K24 N3 M8 N3 M8
DQSL A-MDQSLB A-MDQSL A_DDR3_DQSL B_DDR3_DQSL B-MDQSL A0 EAN61857201 VREFCA A0 EAN61857201 VREFCA
C18 K25 C7 A9 P7 P7
A-MDQSLB B-MDQSLB B-MDQSU A1 A1
A_DDR3_DQSLB B_DDR3_DQSLB DQSU VSS_1 P3 P3
A9 C7 B7 B3 A2 A2
VSS_1 DQSU A-MDQSU B-MDQSUB DQSU VSS_2 N2 H1 N2 H1
B3 B7 B18 J21 E1 A3 VREFDQ A3 VREFDQ
A-MDQSUB A-MDQSU B-MDQSU P8 P8
VSS_2 DQSU A_DDR3_DQSU B_DDR3_DQSU VSS_3 A4 A4
E1 A18 J20 E7 G8 P2 P2
VSS_3 A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB B-MDQSUB B-MDML DML VSS_4 A5 A5
G8 E7 D3 J2 R8 L8 R8 L8
A-MDML B-MDMU A6 ZQ A6 ZQ
VSS_4 DML DMU VSS_5 R2 R2
J2 D3 E15 H24 J8 A7 A7
VSS_5 DMU A-MDMU A-MDML A_DDR3_DQML B_DDR3_DQML B-MDML VSS_6 T8 T8
J8 A21 L20 E3 M1 A8 A8
A-MDMU B-MDMU B-MDQL0 R3 B2 R3 B2
VSS_6 A_DDR3_DQMU B_DDR3_DQMU DQL0 VSS_7 A9 VDD_1 A9 VDD_1
M1 E3 F7 M9 L7 D9 L7 D9
VSS_7 DQL0 A-MDQL0 B-MDQL1 DQL1 VSS_8 A10/AP VDD_2 A10/AP VDD_2
M9 F7 D17 L23 F2 P1 R7 G7 R7 G7
A-MDQL1 A-MDQL0 B-MDQL0 B-MDQL2 A11 VDD_3 A11 VDD_3
VSS_8 DQL1 A_DDR3_DQL[0] B_DDR3_DQL[0] DQL2 VSS_9 N7 K2 N7 K2
P1 F2 G15 J24 F8 P9 A12 VDD_4 A12 VDD_4
VSS_9 DQL2 A-MDQL2 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1] B-MDQL1 B-MDQL3 DQL3 VSS_10 T3 K8 T3 K8
P9 F8 B21 L24 H3 T1 NC_6 VDD_5 NC_6 VDD_5
A-MDQL3 A-MDQL2 B-MDQL2 B-MDQL4 N1 N1
VSS_10 DQL3 A_DDR3_DQL[2] B_DDR3_DQL[2] DQL4 VSS_11 VDD_6 VDD_6
T1 H3 F15 J23 H8 T9 M7 N9 M7 N9
VSS_11 DQL4 A-MDQL4 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3] B-MDQL3 B-MDQL5 DQL5 VSS_12 NC_5 VDD_7 NC_5 VDD_7
T9 H8 B22 M24 G2 R1 R1
A-MDQL5 A-MDQL4 B-MDQL4 B-MDQL6 VDD_8 VDD_8
VSS_12 DQL5 A_DDR3_DQL[4] B_DDR3_DQL[4] DQL6 M2 R9 M2 R9
G2 F14 H23 H7 BA0 VDD_9 BA0 VDD_9
DQL6 A-MDQL6 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5] B-MDQL5 B-MDQL7 DQL7 N8 N8
H7 A22 M23 B1 BA1 BA1
A-MDQL7 A-MDQL6 B-MDQL6 M3 M3
DQL7 A_DDR3_DQL[6] B_DDR3_DQL[6] VSSQ_1 BA2 BA2
B1 D15 K23 D7 B9 A1 A1
VSSQ_1 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7] B-MDQL7 B-MDQU0 DQU0 VSSQ_2 VDDQ_1 VDDQ_1
B9 D7 C3 D1 J7 A8 J7 A8
A-MDQU0 B-MDQU1 CK VDDQ_2 CK VDDQ_2
VSSQ_2 DQU0 DQU1 VSSQ_3 K7 C1 K7 C1
D1 C3 G16 G21 C8 D8 CK VDDQ_3 CK VDDQ_3
VSSQ_3 DQU1 A-MDQU1 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0] B-MDQU0 B-MDQU2 DQU2 VSSQ_4 K9 C9 K9 C9
D8 C8 B20 L22 C2 E2 CKE VDDQ_4 CKE VDDQ_4
A-MDQU2 A-MDQU1 B-MDQU1 B-MDQU3 D2 D2
VSSQ_4 DQU2 A_DDR3_DQU[1] B_DDR3_DQU[1] DQU3 VSSQ_5 VDDQ_5 VDDQ_5
E2 C2 F16 H22 A7 E8 L2 E9 L2 E9
VSSQ_5 DQU3 A-MDQU3 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2] B-MDQU2 B-MDQU4 DQU4 VSSQ_6 CS VDDQ_6 CS VDDQ_6
E8 A7 C21 K20 A2 F9 K1 F1 K1 F1
A-MDQU4 A-MDQU3 B-MDQU3 B-MDQU5 ODT VDDQ_7 ODT VDDQ_7
VSSQ_6 DQU4 A_DDR3_DQU[3] B_DDR3_DQU[3] DQU5 VSSQ_7 J3 H2 J3 H2
F9 A2 E16 H20 B8 G1 RAS VDDQ_8 RAS VDDQ_8
VSSQ_7 DQU5 A-MDQU5 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4] B-MDQU4 B-MDQU6 DQU6 VSSQ_8 K3 H9 K3 H9
G1 B8 A20 L21 A3 G9 CAS VDDQ_9 CAS VDDQ_9
A-MDQU6 A-MDQU5 B-MDQU5 B-MDQU7 L3 L3
VSSQ_8 DQU6 A_DDR3_DQU[5] B_DDR3_DQU[5] DQU7 VSSQ_9 WE WE
G9 A3 D16 H21 J1 J1
VSSQ_9 DQU7 A-MDQU7 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6] B-MDQU6 NC_1 NC_1
C20 K21 T2 J9 T2 J9
A-MDQU7 B-MDQU7 RESET NC_2 RESET NC_2
A_DDR3_DQU[7] B_DDR3_DQU[7] L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_7 DQSL NC_7
G3 G3
DQSL DQSL
C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DDR_1600_SS DDR_1600_SS DDR_1600_HYNIX DDR_1600_HYNIX DDR_DVB_T2_2G DDR_DVB_T2_2G DDR_1600_MICRON DDR_1600_MICRON DMU VSS_5 DMU VSS_5
J8 J8
IC1201-*5 IC1202-*5 IC1201-*4 IC1202-*4 IC1201-*3 IC1202-*3 IC1201-*6 IC1202-*6 VSS_6 VSS_6
K4B1G1646G-BCK0 K4B1G1646G-BCK0 H5TQ1G63DFR-PBC H5TQ1G63DFR-PBC K4B2G1646C K4B2G1646C MT41J64M16JT-125:G MT41J64M16JT-125:G E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 DQL1 VSS_8 DQL1 VSS_8
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
F2 P1 F2 P1
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 F8 P9 F8 P9
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
H3 T1 H3 T1
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 DQL4 VSS_11 DQL4 VSS_11
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
H8 T9 H8 T9
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 G2 G2
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 DQL6 DQL6
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 H7 H7
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 DQL7 DQL7
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
NC_6 VDD_5
K8 T3
NC_6 VDD_5
K8 B1 B1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 VSSQ_1 VSSQ_1
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 D7 B9 D7 B9
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1 DQU0 VSSQ_2 DQU0 VSSQ_2
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 C3 D1 C3 D1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
DQU1 VSSQ_3 DQU1 VSSQ_3
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
C8 D8 C8 D8
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1 DQU2 VSSQ_4 DQU2 VSSQ_4
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 C2 E2 C2 E2
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 DQU3 VSSQ_5 DQU3 VSSQ_5
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 A7 E8 A7 E8
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2 DQU4 VSSQ_6 DQU4 VSSQ_6
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 A2 F9 A2 F9
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 DQU5 VSSQ_7 DQU5 VSSQ_7
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 B8 G1 B8 G1
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 DQU6 VSSQ_8 DQU6 VSSQ_8
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
A3 G9 A3 G9
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1 DQU7 VSSQ_9 DQU7 VSSQ_9
T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
L1 L1 L1 L1 L1 L1 L1 L1
NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3
L9 L9 L9 L9 L9 L9 L9 L9
NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4
F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7
DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_5 DQSL NC_5
G3 G3 G3 G3 G3 G3 G3 G3
DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL
C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
E1 E1 E1 E1 E1 E1 E1 E1
VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3
E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8
DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4
D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5
J8 J8 J8 J8 J8 J8 J8 J8
VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6
E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQ0 VSS_7 DQ0 VSS_7
F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9
F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1
F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9
H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1
H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9
G2 G2 G2 G2 G2 G2 G2 G2
DQL6 DQL6 DQL6 DQL6 DQL6 DQL6 DQ6 DQ6
H7 H7 H7 H7 H7 H7 H7 H7
DQL7 DQL7 DQL7 DQL7 DQL7 DQL7 DQ7 DQ7
B1 B1 B1 B1 B1 B1 B1 B1
VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1
D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQ8 VSSQ_2
C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8
C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2
A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8
A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9
B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1
A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR_256 12

GLOBAL tuner block except EU and China
FE_AGC_SPEED_CTL
IF_AGC_SEL
DEMOD_RESET
FE_BOOSTER_CTL
LNA2_CTL
DEMOD_SCL
DEMOD_SDA
RF_SWITCH_CTL
Pull-up cant be applied
because of MODEL_OPT_2 R3741-*3
TU3704 TU3700 2.2K
TU_IIC_BR_2.2K
TU3703 TDSS-G201D
TDSH-T101F TDSN_B001F R3740-*3
SI2156_DVB_1INPUT_H 2.2K
TU_IIC_BR_2.2K
SI2176_TW_2INPUT_H SI2176_BR_2INPUT_H
R3741-*2
1.2K
+3.3V_TU TU_IIC_ATSC_1.2K
R3740-*2
1.2K
+3.3V_TU
C3711-*1 C3713-*1 +3.3V_TU TU_IIC_ATSC_1.2K
R3733 20pF 20pF
100K 50V 50V
close to TUNER R3732 TU_I2C_FILTER TU_I2C_FILTER R3740-*1
100 1K R3774
RF_S/W_CTL RF_S/W_CTL NC_1 TUNER_RESET
TU_I2C_FILTER TU_I2C_FILTER
TU_IIC_NON_ATSC_1K 470
TU_BUFFER
1 1 R3705 0 1 R3735-*1 R3736-*1
C3701 RF_SW_OPT R3741-*1 R3775 R3758
C3710 1K 0 82
RESET RESET 0.1uF RESET 0.1uF
16V R3740 R3741
TU_IIC_NON_ATSC_1K TU_SIF
2 2 16V 2 1.8K 1.8K TU_NON_BUFFER
E
TU_IIC_ATSC_1.8K TU_IIC_ATSC_1.8K
SCL SCL SCL TU_I2C_NON_FILTER Q3705
MMBT3906(NXP)
3 3 3 R3735 33
TU_SCL
B TU_BUFFER
C
SDA SDA SDA R3736 33
R3753
4.7K
4 4 4 TU_SDA TU_BUFFER
C3702-*1 TU_I2C_NON_FILTER TU_I2C_NON_FILTER TU_I2C_FILTER
0
+B1[3.3V] +B1[3.3V] +B1[3.3V] ASIA C3711
18pF
C3713
18pF
C3742
20pF
C3743
20pF
5 5 5 50V 50V 50V 50V
TU_I2C_NON_FILTER TU_I2C_FILTER
SIF SIF NC_2 close to TUNER +3.3V_TU
6 6 C3702 R3783 0
6
0.1uF 16V NON_ASIA
+B2[1.8V] +B2[1.8V] +B2[1.8V]NON_ASIA
7 7 7
R3751 R3752
CVBS CVBS NC_3 R3784 0 220 220
8 8 8 TU_BUFFER TU_BUFFER
NON_ASIA
IF_AGC NC_1 IF_AGC R3756 0
TU_CVBS
9 9 9 TU_NON_BUFFER
C3750 C3751 E
10pF 10pF R3780 R3781 Q3703
DIF[P] NC_2 DIF[P] 50V 50V 390
R3782
390 R3749 0 MMBT3906(NXP)
10 10 10 R3761 0
ASIA ASIA
ASIA
2K
ASIA
TU_BUFFER B
TU_BUFFER
HALF_NIM ASIA
DIF[N] NC_3 DIF[N] R3750
C
11 11 11 R3760 0
R3785 R3786
1K
OPT
HALF_NIM 0 0
+B3[3.3V] ASIA ASIA
L3706
12
12 120 12 Close to the tuner
+B4[1.23V] FULL_NIM
13 C3718
0.1uF IF_P_MSTAR
16V
SHIELD NC_4 +1.23V_TU
FULL_NIM
SHIELD
14 IF_N_MSTAR
GND
15 1. should be guarded by ground
2. No via on both of them
ERROR 3. Signal Width >= 12mils
16 Signal to Signal Width = 12mils
Ground Width >= 24mils
SYNC
17 +3.3V_TU
VALID
18
MCLK
19 +1.8V_TU C3739 C3707 C3708
10uF 100pF 0.1uF
D0 6.3V 50V 16V
20 OPT
C3737 C3738 C3705

D1 100pF 0.1uF 100uF
21 50V 16V 16V close to the tuner pin, add,09029
OPT
D2
22
D3 R3704 100
23 IF_AGC_MAIN
HALF_NIM
D4 should be guarded by ground
C3716
24 0.1uF
16V
HALF_NIM
+3.3V_TU
D5 IC3703
25 AP1117E18G-13 +1.8V_TU
D6 OPT
R1
26 FE_TS_SYNC 3 IN ADJ/GND 1
OUT R3710
D7 200
27 FE_TS_VAL_ERR FE_TS_DATA[0-7] 2 1%
28
FE_TS_CLK R3766
Vo=VREF*(1+R2/R1) R3711 1
0
FE_TS_DATA[0]
VREF = 1.25V
SHIELD
R2
C3740 C3741
FE_TS_DATA[1] 0.1uF 10uF
16V
10V
FE_TS_DATA[2]
IC3701
AP2132MP-2.5TRG1
[EP]
TUNER MULTI-OPTION FE_TS_DATA[3]
+1.23V_TU
380mA
R3771 10K PG GND
TU3700-*1 FE_TS_DATA[4] 1 8
FULL_NIM_BCD FULL_NIM_BCD FULL_NIM_BCD
THERMAL
TDSS-H101F FULL_NIM_OPT
R3748 R3776
SI2176_ATSC_1INPUT_H C3717 EN ADJ 11K 10K
9
FE_TS_DATA[5] 0.1uF 2 7
16V
VIN VOUT R1
FE_TS_DATA[6] 3 6
10K
NC
FULL_NIM
1
RESET
VCTRL NC FULL_NIM_BCD
FE_TS_DATA[7] 4 5 C3729
2 +5V_Normal 0.1uF
C3730
SCL R3747 16V 10uF
3
R3769
SDA
20K FULL_NIM 10V
4 FULL_NIM
L3704
Close to the CI Slot 1005
FULL_NIM
+B1[3.3V] R2
5
SIF
6 R3713
+B2[1.8V]
+3.3V_TU +3.3V_Normal 0
7
CVBS FULL_NIM_BCD FULL_NIM_TJ
8 IC3701-*1 BCD Vo=0.6*(1+R1/R2)
IF_AGC TJ4220GDP-ADJ[EP]GND
9 Size change,0929 TJ Vo=0.8*(1+R1/R2)
DIF[P] L3703 NC_1
1 8
GND
10 60mA FULL_NIM FULL_NIM_TJ
CIS21J121
THERMAL
DIF[N] EN2 ADJ/SENSE R3748-*1 R3776-*1
9
2 7
11 5.1K 0
VIN3 VOUT
3 6
12 C3723 C3725 C3715 C3727 NC4 NC_2
22uF 0.1uF 22uF 0.1uF 4 5 FULL_NIM_TJ
SHIELD 10V 16V 10V 16V R3747-*1
9.1K
Add,0929

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011.10.11
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_NON_EU 14

Audio amp(NTP-7500)
+3.3V_Normal AMP_RESET
R521 C516
10K 1000pF
50V
50V
L502
+24V_AMP
22000pF
BLM18PG121SN1D
OPT
C517
AUD_MASTER_CLK R507
3.3
+24V_AMP OPT
+24V
C525
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C519 C521 C523
0.1uF 0.1uF 10uF 0.01uF
VDD_IO
GND_IO
/RESET
PGND1A
C514 C515 50V
10uF 50V 50V 35V
CLK_I
L501
0.1uF 10V
BST1A
[EP]
16V SPK_L+
CIS21J121
D501
AD
1N4148W R508 R515 L505

100V 12 12 R516
OPT 10.0uH C537
OPT C510 C512 OPT 0.1uF 4.7K
C501 C502 C506 C508 10uF 0.1uF C530 50V
0.1uF 0.1uF 4.7uF 0.1uF 10V 390pF L506
50V 50V 16V 16V 50V C535
16V 10.0uH 0.47uF
48
47
46
45
44
43
42
41
40
39
38
37
C504
1000pF
50V
50V
SPEAKER_L
C503 C531 C538
100pF R505 AGND_PLL 1 36 OUT1B_2 D502
390pF
50V 0.1uF
50V
R517
50V 3.3K 1N4148W R509 R513 4.7K
AVDD_PLL 2 35 OUT1B_1 100V
OPT 12 12
THERMAL SPK_L-
DVDD_PLL 3 34 PGND1B
49 C526
22000pF
LF 4 33 BST1B 50V WAFER-ANGLE
DGND_PLL IC501 VDR1

5 32 SPK_L+
OPT 4
C511
10uF
GND_1 6 NTP-7500L 31 VCC_5
C513
10V 0.1uF SPK_L-
16V DGND 7 30 AGND 3
DVDD 8 29 VDR2 SPK_R+

2
C528 C529 C534
SDATA 9 28 BST2A 1uF
25V
1uF
25V
1uF
25V SPK_R-
AUD_LRCH 1
WCK 10 27 PGND2A C527
P501
AUD_LRCK 22000pF
50V
BCK 11 26 OUT2A_2
AUD_SCK
R503 100 SDA 12 25 OUT2A_1

AMP_SDA
13
14
15
16
17
18
19
20
21
22
23
24
R504 100
AMP_SCL
C507 C509
+3.5V_ST 33pF 33pF
50V 50V SPK_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
+24V_AMP D503 R510 R514

NON_LIPS 1N4148W 12 12 L503
R502 100V
R520 10K 10.0uH C539 R518
R506 OPT
10K C532 0.1uF 4.7K
NON_LIPS
NON_LIPS C 100 390pF L504 C536 50V
C505 50V 0.47uF
R501 B Q501
1000pF C520 C522 C524
10.0uH 50V
SPEAKER_R
AMP_MUTE 50V C533
10K MMBT3904(NXP) 0.1uF 0.1uF 10uF 390pF
50V
NON_LIPS E NON_LIPS 50V 50V 35V D504 C540 R519
C518 1N4148W R511 R512 0.1uF 4.7K
22000pF 100V 12 12 50V
OPT
50V
SPK_R-
R522
0
POWER_DET
LIPS_ONLY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NTP-7500 16

IR/LED and control for on.y 12 sub without IR-OUT.
+3.5V_ST
R2411
100
SENSOR_SCL P2400
OPT 12507WR-10L
D2403
R2404 R2405 C2408 5.48VTO5.76V
10K 10K 18pF
1% 1% 50V
L2401
R2401 BLM18PG121SN1D 1
100
KEY1 AMOTECH CO., LTD.
L2402 OPT R2412 100
R2402 D2402 SENSOR_SDA 2
100 BLM18PG121SN1D
5.6V OPT
KEY2
C2409 D2404
C2401 C2402 18pF 5.48VTO5.76V 3
0.1uF 0.1uF OPT
50V
D2401
5.6V
AMOTECH CO., LTD. JP2407
4
+3.5V_ST JP2408
5
L2403
BLM18PG121SN1D
6
C2403 C2404 7
0.1uF 1000pF
16V 50V R2413
LED_B/LG_LOGO
1.5K JP2409
8
LED_R/BUZZ
OPT
C2410
IR_OUT 0.1uF JP2410
16V 9
+3.5V_ST
10
11
R2426
3.3K
IR
C2407
100pF D2405
50V 5.48VTO5.76V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL_W/O_IR_OUT 23

LED driver circuit for TN module
LED_DRIVER
LED_DRIVER D10001
L10001 PDS5100H-13
+24V_LED_driver 33uH
OPT
LED_DRIVER LED_DRIVER LED_DRIVER LED_DRIVER LED_DRIVER
LED_DRIVER LED_DRIVER LED_DRIVER OPT
R10012
C10012 C10014 C10018 C10020
C10001 C10002 C10005 C10021 5.1 R10018
OPT 2.2uF 10uF 2.2uF 2.2uF
2.2uF 2.2uF 0.1uF 0.1uF 560K
C10010 100V 100V 100V 100V
50V 50V 50V 50V LED_DRIVER LED_DRIVER
1/10W
1000pF D
50V R10015 Q10001
close to IC10000 12 G AP18T10GH
must be modifed
S
R10016 LED_DRIVER OPT 18.5" 21.5" CMI_21.6" CMI_18.5"

LED_DRIVER 3K R10017 C10011 R10019 R10019-*1 R10019-*2 R10019-*3
R10007 1/8W 0.1 1000pF 16K 11K 16K 22K
4.7 LED_DRIVER 1% 50V 1/10W 1/10W 1/10W 1/10W
wafer modify & resister add
[EP]PGND/LEDGND
1/10W
must be modifed
C10008 R120 : 6.8K --> 3K
0.1uF R121 : 0.03 --> 0.1
50V
LED_DRIVER 2010.06.30 HWSON
close to IC10000
NDRV
PGND
C10009 7
VCC
DRV
2010.06.30. hwson 1uF
CS
C104 : 10uF --> 2.2nF for thermal Issue 10V LED_DRIVER_NON_LGD 6
LED_DRIVER R10020
C106 : 0.68uF --> 0.33uF 0
LED_DRIVER R113/R114
20
19
18
17
16
R111 : 470 --> 390 IN
R10001 Operating Freq. 1 15 OUT4 1/10W 5
2010.02.07 for PQ/19V_LED 5%
WLED_ENABLE 100 F=7.35x10^9/RT THERMAL
EN 2 14 OUT3
21
1/10W LED_DRIVER COMP IC10000 13 LEDGND 4
3
R10004 C10003 LED_DRIVER LED_DRIVER MAX16814
R10006 RT 4 OUT2
100K 100pF LED_DRIVER 12 LED_DRIVER_NON_LGD 3
390 R10008 FLT OUT1 R10021
1/10W 50V 5 11 0
1/10W 16K
10
LED_DRIVER
2
6
7
8
9
LED_DRIVER 1% 1/10W
C10006 5%
2200pF C10007
OVP
SETI
RSDT
SGND
DIM
50V 0.33uF OPT 1

50V R10009 C10013 C10015 C10017 C10019
OPT LED_DRIVER
51K LED_DRIVER_LGD LED_DRIVER_LGD
AUO_CPT 1000pF 1000pF 1000pF 1000pF R10022 R10023
R10005 1% 0 0
10031HR-H06
R10011R10013 50V 50V 50V 50V 1/10W 1/10W
100 47K 51K R10011-*1 R10011-*2 R10011-*3 LED_DRIVER LED_DRIVER LED_DRIVER LED_DRIVER
5% 5%
P10000
1/10W LED_DRIVER_LGD
1/10W 1/10W 27K 39K 39K
ERROR_OUT
OPT 1% 5% 1/10W 1/10W 1/10W
ESD protection solution
R10002 1% 1% 1%
AUO_CPT
10K LGD CMI_18.5" CMI_21.6"
1/10W LED_DRIVER_NON_LGD
R10013-*1 R10013-*2 R10013-*3 P10001
R10010 LED_DRIVER 27K 56K 56K 12507WR-06L
10K R10014 1/10W 1/10W 1/10W
1/8W 7.5K 1% 1% 1%
LED_DRIVER
LED_DRIVER 1/8W LGD CMI_18.5" CMI_21.6"
R10003 1
100
1/10W
2
PWM_DIM LED_DRIVER
PWM_PULL_DOWN
R10024 C10004
3
3.9K 100pF
50V
4
ILED = 1500/RSETI OVP = 1.23*(1+R1/R2) Forward voltage spec. 7
Module ILED spec R10011 R10013 Remark Module Vs spec R10018 R10019 Remark Module min Typ Max
34.0V_Typ
AUO_18.5_HD AUO_18.5 560Kohm 16Kohm 44.28V AUO_18.5 30.0 34.0 36.0
36.0V_Max
AUO_21.5_FHD 60mA_Typ 52.8V_Typ
47Kohm 51Kohm 61.35mA AUO_21.5 560Kohm 11Kohm 63.85V AUO_21.5 48.0 52.8 57.6
63mA_Max 57.6V_Max
52.0V_Typ
CPT_21.5_FHD CPT_21.5 57.6V_Max 560Kohm 11Kohm 63.85V CPT_21.5 46.4 52.0 57.6
110mA_Typ 51.2V_Typ
LGD_21.5_FHD 27Kohm 27Kohm 111.11mA LGD_21.5 560Kohm 11Kohm 63.85V LGD_21.5 - 51.2 56.0
120mA_Max 56.0V_Max
65mA_Typ 24.8V_Typ
CMI_18.51_HD 70mA_Max 39Kohm 56Kohm 65.24mA CMI_18.51 560Kohm 22Kohm 32.54V CMI_18.51 - 24.8 27.2
27.2V_Max
65mA_Typ 37.8V_Typ
CMI_21.6_FHD 70mA_Max
39Kohm 56Kohm 65.24mA CMI_21.6 560Kohm 16Kohm 44.28V CMI_21.6 33.6 37.8 40.8
40.8V_Max

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR SMALL_TN_LED_DRIVER 29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LVDS_SMALL
RXA4+
RXA4-
RXB4+
RXB4-
RXB3+
RXB3-
[30Pin LVDS Connector] RXBCK+

(For HD_Small) PANEL_VCC
HD_SMALL RXBCK-
P3102 HD_SMALL
FF10001-30 L3102
70-ohm RXB2+
1 RXB2-
2 OPT HD_SMALL
C3107 C3108
3 1000pF 0.1uF RXB1+
50V 16V [30Pin LVDS Connector]
4
(For HD_LARGE) RXB1-
5
CMI 18.5" HD_LARGE
6 P3101 RXB0+
R3107 FF10001-30
7 0
8 RXB0-
1
9
OPT
2
10
R3104
3 0
11
4
12
5
13 RXA3+
6 RXA3+
14 RXA3-
7 RXA3-
15
8
16 RXACK+
9 RXACK+
17 RXACK-
10 RXACK-
18
11
19 RXA2+
12 RXA2+
20 RXA2-
13 RXA2-
21
14
22 RXA1+
15 RXA1+
23 RXA1-
16 RXA1-
24
17
25 RXA0+ LVDS_SEL
18 RXA0+
26 RXA0-
19 +3.3V_Normal
27 RXA0-
20 OPT
28
R3105
21 3.3K
29
22
30 OPT
HD_LARGE
23 R3106 PANEL_VCC
R3103 10K
31 0
24
25
HD_LARGE
26 L3101
70-ohm
27
28 OPT OPT HD_LARGE

C3106 C3104 C3105
29 10uF 1000pF 0.1uF
16V 50V 16V
30
31

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SMALL_LVDS 31

+5V_Normal +12V/+15V 24V-->3.48V
LIPS
NON_Adapter +24V/+15V +3.5V_ST ST_3.5V-->3.5V --> 3.375V
R3373
P3301
SMAW200-12
NON_Adapter
L3303
CIS21J121
+5V_PANEL
L3311
70-ohm
12V_PANEL
L3320
70-ohm
PANEL_POWER 100K
+15V +24V/+15V +24V_LED PANEL_VCC_0.01uF

LIPS_PWR_DET_ONSEMI
1
OPT LIPS
C3337 C3340 C3342 R3362 IC3308 OPT
C3345 3.9K LIPS R3382
+15V Adapter 0.015uF 0.01uF 0.1uF 10uF NCP803SN293
2 +3.5V_ST JK3300 50V 50V 16V 16V
1% R3379 10K
Q3307 100
NON_Adapter JPD003N-M432-4F Adapter
Adapter PANEL_VCC_0.015uF AO3407A VCC RESET 1%
GND L3300 L3308 3 2
3 L3304 New item POWER_DET
D
CIS21J121 24V CIS21J121 CIS21J121
12V_PANEL +5V_PANEL 1
GND C3348 OPT
4 R3345-*1 R3345 4.7uF C3362 LIPS GND LIPS_PWR_DET_DIODES
OPT NON_Adapter 22K 16V 0.1uF R3363 (LIPS_PWR_DET_ONSEMI) C3382
C3300 C3303 OPT 33K G IC3308-*1
SW Adapter 16V 1.2K 0.1uF
+3.5V_ST 0.1uF 0.1uF C3316 C3317 C3320 R3338 LIPS 1% 16V APX803D29
5
16V 16V 0.1uF 0.1uF 22K PANEL_VCC
68uF 12V_PANEL +5V_PANEL OPT
GND 50V 50V 35V R3346-*1 R3346 C3353
+3.5V_ST R3374 VCC RESET
6 5.6K 0.1uF +3.5V_ST 100K 3 2
+3.3V_Normal 2.7K
50V
1
PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES
GND C PWR_DET_ONSEMI
7 OLP OLP R3335 GND
R3303 10K B Q3305 R3364 IC3309
R3304 NCP803SN293 R3380
OLP 10K 1K MMBT3904(NXP) 0 100
8
OLP 1/16W PWR_DET_DIODES
R3355
OPT C 1%
R3356
C3355 5% VCC RESET
2.2K
R3336 OPT E 3 2
2.2K
OPT IC3309-*1
INV_ON PANEL_CTL 10K B Q3303 R3342 0.1uF
9
WLED_ENABLE 22K 16V OPT 1 APX803D29
MMBT3904(NXP) R3365
C3364 27K GND
P_DIM
10 R3334 E 0.1uF 1/16W VCC RESET
PWM_DIM 3 2
10K 16V 1%
A_DIM 1
11
A_DIM +3.3V_Normal
12
NC
NON_Adapter
R3301
4.7K 3.3K -> 1K (threshold voltage up) UNDER CHECKING Power_DET GND
R3312
1K +3.5V_ST
24V->15V +24V/+15V
* H/W option : Adapter
WLED_ENABLE IC3306
+24V_LED_driver
C
R3308
10K +1.5V_DDR Max 1000mA MP8670DN-LF-Z
C3374 C3376 C3378
Adapter_26inch OPT R3311 0.1uF 3.3uF 3.3uF
P3300 R3313 B 10K 50V 50V 50V
SM14B-SRSS-TB 6.8K INV_CTL SW IN
1 8
Q3300 OPT +12V/+15V
MMBT3904(NXP)
E R3309
1
24V
10K +3.5V_ST BST EN/SYNC
2 7 RL_ON_BUFFER
24V C3301 C3304
2
0.1uF 0.01uF IC3305 +1.5V_DDR R1 R3381
50V 50V VCC FB 120K
24V AP7173-SPG-13 HF(DIODES) R3358 3 6
3 L3313
1.6K 6.8K
R3375 R3376
22 C3367 1%
1%
BLM18PG121SN1D [EP] 1/16W R3366 R2 real output : 12.3V
24V 1uF BG GND
4 5% 0 OPT
50V 4 5
R3383
1%
1/8W
Q3310
5
24V
IN OUT
SI4124DY-T1-GE3(VISHAY) 22K
1 8 C3363
S_1 D_4
1uF 1 8
THERMAL
GND
6
+3.5V_ST 25V S_2
2 7
D_3
PG FB
9
S_3 D_2
GND 2 7 C3357 C3360 3 6
7 RT1P141C-T112 G D_1 L3316

R3350 22uF 0.1uF 4 5
Q3302 RL_ON_BUFFER SP-7850_4.7

GND 4.3K 10V 16V Placed on SMD-TOP
8 VCC SS 4.7uH
3 6 1% close to IC7502
+3.3V_Normal R1
GND +3.5V_ST 1 3
9 R3337 C3372 C3377
10K EN GND C3384
4 5 R3349 10uF 10uF 0.1uF
GND 2 4.7K
10
R3332 C3335 C3349 25V 25V 50V
OPT NON_CI_CAP 1%
R3302 4.7K 10uF 560pF
ERROR_OUT 100 R3323 C3338
0.1uF
1.5A
11
ERROR_OUT 10V 50V
10K 16V R2
R3328 C
INV_ON
12
WLED_ENABLE 10K
B Q3301
NC
RL_ON MMBT3904(NXP)
13
14
PWM_DIM
PWM_DIM
R3324
E 24V->3.5V * H/W option : Adapter
10K OPT
R3329
15
R3300
0 Vout=0.8*(1+R1/R2) = 1.5319 R3370
100K
GND 0
C3370
0.1uF 50V
Switching noise reducing [MPS recommend]

IC3307 R3378
MP4460DQ-LF-Z EP_GND 22 +24V/+15V
D3300
* H/W option : Adapter_26inch S7LR core 1.2V volt MBRA340T3G

close to pin SW_1
1 10
BST
THERMAL
11
SW_2 VIN_2
2 9
+3.3V_Normal C3381 C3385

+5V_Normal 10K
C3341
0.1uF
16V
EN
3 8
VIN_1 R3377
100K
1/8W
3.3uF
50V
0.1uF
50V
+3.5V_ST
+12V/+15V MAX 1A R3339
COMP FREQ 5%
4 7 R3387
* H/W option : +5V_PANEL +3.5V_ST C3344 C3369
100K
1/10W
FB GND
0.1uF 220pF 5 6 1%
L3321
16V 50V
CIC21J501NE +1.10V_VDDC 2.5A
EP[GND]
R3315 +5V_Normal
10K R3367
VIN_3
PWRGD
R3359 68K R3384

L3312
BOOT
30K
OPT 18K 1/10W
EN
CIC21J501NE 1%
C3305 C3307 L3314
L3309 L3317
10uF 10uF L3305 NR8040T3R6N NR8040T3R6N
IC3300
16
15
14
13
25V 25V NR8040T3R6N BLM18PG121SN1D 3.6uH 3.6uH

AOZ1051PI [EP]LX 3.6uH VIN_1 1 12 PH_3
THERMAL
NON_CI_CAP VIN_2 PH_2 C3375 C3380 C3383
C3334 2 17 11 R3351
OPT OPT C3336 C3358 10uF 10uF 0.1uF
PGND NC 10uF C3350 C3352 0
C3324 0.1uF GND_1 PH_1 0.1uF 10V 10V 50V
1 8 C3328 C3331 10V 3 IC3304 10 22uF 22uF 1/16W
22uF 16V 16V
22uF TPS54319TRE 10V 10V 5%
THERMAL
0.1uF
16V 16V GND_2 4 9 SS/TR
16V
VIN SS 3A
9
OPT 2 7 C3346
C3312
5
3300pF
R1 0.1uF C3394 50V FB_CORE
AGND
VSENSE
COMP
RT/CLK
16V AGND EN 0.01uF OPT

3 6 50V R3347 R3354
330K 0 780 mA
+3.3V_Normal
R3352
R3319 R3320
27K
1/16W
1%
56K 11K FB COMP C3347 50V
4 5 R3343 3300pF R1
15K 100pF
50V
1% 1% C3354
R3314
3A 12K +3.5V_ST +3.3V_Normal
OPT R3321 Q3312 L3318
12K C3318 R3353 BLM18SG700TN1D
C3323 2200pF AO3407A
56K
1/16W
1%
1% 50V 70-ohm
D
100pF R2
R2
NON_CI_CAP OPT
C3366 R3368 R3371 G C3379 OPT C3389
C3387
Vout=0.8*(1+R1/R2) 0.1uF
16V 10K 22K
C3373
4.7uF
0.1uF
16V
R3385
10K
0.1uF
22uF
16V
16V 16V
Vout=0.827*(1+R1/R2)=1.225V
+12V/+15V
+5V_USB 2000 mA R3372
100
L3301 C
R3369
CIC21J501NE R3310
10K
AMP_VCC Control POWER_ON/OFF_1
10K B Q3311
MMBT3904(NXP)
OPT E
+5V_USB +5V_Normal +24V/+15V
C3302 C3391
10uF 10uF L3307
NR8040T3R6N Non_5V_PANEL AO3407A Vgs : 10.8V(24V input)
25V 25V IC3302 L3310 AO3407A Vgs : 8.3V(15V input)
3.6uH BLM18PG121SN1D
AOZ1051PI [EP]LX
OPT OPT AMP_VCC +24V_LED

PGND
1 8
NC C3322
22uF
16V
C3393
0.1uF
C3325
22uF
C3339
0.1uF
C3343
2.2uF
R3348
22K
Q3306 +24V +12V/+15V
C3365 R3361 +24V_LED_driver +2.5V
THERMAL
16V 50V 50V 2.2uF 22K +3.3V_Normal

16V AO3407A S 50V
VIN SS C3361 IC3310
+2.5V_Normal
9
OPT 2 7
C3392 Adapter G 0.1uF S TJ3940S-2.5V-3L
0.1uF C3314 R3341 50V Q3309
R1 POWER_ON/OFF_1 10K
R3344
G
16V AGND
3 6
EN 0.01uF 27K
D
Adapter
R3360
AO3407A
VIN 1A VOUT
50V L3315 3 2
NON_Adapter 27K Vd=550mV
3.3uH 2520 R3389 D NON_CI_CAP R3386
R3305 R3306 OPT CPI2520NHL3R3ME 0 1
FB COMP R3340 C3371 1
56K 11K GND
4 5 10K 0.1uF 1/16W
C R3357 C AO3407A Vgs : 10.8V 5%
1% 1% 16V
3A R3390 C3351 C3356 C3359 10K Q3308
B Q3304 B
12K 0.01uF NON_Adapter 3.3uF 0.01uF MMBT3904(NXP) C3386 C3388
MMBT3904(NXP)
50V L3319 50V 50V
OPT R3307 C3311 NON_Adapter BLM18PG121SN1D RL_ON_BUFFER C3368 10uF 0.1uF
12K 2200pF E E 0.01uF 10V 16V
C3390 R3388
1% 50V RL_ON_BUFFER 10K 50V 300 mA
100pF
R2
Power for LED driver
* H/W option : Adapter
Vout=0.8*(1+R1/R2)
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SMALL_POWER 33

IC102
NAND01GW3B2CN6E
NAND FLASH MEMORY +3.3V_Normal
<CHIP Config(LED_R/BUZZ)>
+3.3V_Normal
Boot from SPI CS1N(EXT_FLASH) 1b0
NC_1
1 48
NC_29 Boot from SPI_CS0N(INT_FLASH) 1b1 S7LR2_DIVX_MS10
NAND_FLASH_1G_NUMONYX IC101
NC_2 EAN60762401 NC_28
2 47 LGE2111A-T8
NC_3 NC_27 OS PCM_A[0-7] <CHIP Config>
3 46 PCM_D[0-7]
AR101 (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
NC_4 NC_26
4 45 22 B51_no_EJ : 4b0000 Boot from 8051 with SPI flash PCM_D[0] W21
OS OS NC_5 I/O7 PCM_A[7] SB51_WOS : 4b0001 Secure B51 without scramble PCM_D[1] PCMDATA[0]/GPIO126
R107 R109 5 44 AA18
1K 3.9K SB51_WS : 4b0010 Secure B51 with scramble PCM_D[2] PCMDATA[1]/GPIO127
NC_6 I/O6 PCM_A[6] MIPS_SPE_NO_EJ : 4b0100 Boot from MIPS with SPI flash AB22
6 43 PCM_D[3] PCMDATA[2]/GPIO128
MIPS_SPI_EJ_1 : 4b0101 Boot from MIPS with SPI flash AE20
RB I/O5 PCM_A[5] MIPS_SPI_EJ_2 : 4b0110 Boot from MIPS with SPI flash PCM_D[4] PCMDATA[3]/GPIO120
7 42 AA15
/F_RB MIPS_WOS : 4b1001 Secure MIPS without scramble PCMDATA[4]/GPIO119 AR103
R I/O4 PCM_A[4] MIPS_WS : 4b1010 Scerur MIPS with SCRAMBLE PCM_D[5] AE21 22
8 41 PCM_D[6] PCMDATA[5]/GPIO118
/PF_OE +3.3V_Normal AB21 AE18
E NC_25 PCM_D[7] PCMDATA[6]/GPIO117 NF_CE1Z/GPIO138
9 40 Y15 AC17
/PF_CE0 PCM_A[0-14] PCMDATA[7]/GPIO116 NF_WPZ/GPIO198 /PF_WP
NC_7 NC_24 OS AD18
10 39 PCM_A[0] NF_CEZ/GPIO137 /PF_CE0
C102 W20 AC18
OPT OS NC_8 NC_23 10uF PCM_A[1] PCMADR[0]/GPIO125 NF_CLE/GPIO136 /PF_CE1
1K
1K
1K
1K
1K
R108 11 38 V20 AC19
C101 PCMADR[1]/GPIO124 NF_REZ/GPIO139 /PF_OE
1K PCM_A[2] W22 AD17
0.1uF VDD_1 VDD_2
OPT
OPT
OPT
OPT
PCMADR[2]/GPIO122 NF_WEZ/GPIO140 /PF_WE
OS
12 37 PCM_A[3] AB18 AE17
+3.3V_Normal VSS_1 VSS_2 OS C103 PCM_A[4] PCMADR[3]/GPIO121 NF_ALE/GPIO141 PF_ALE
R115
R117
R165
R123
R152
13 36 0.1uF AA20 AD19
OPT PCM_A[5] PCMADR[4]/GPIO99 NF_RBZ/GPIO142 /F_RB
NC_9 NC_22 AA21
R105 PCMADR[5]/GPIO101 AR104
1K 14 35 PCM_A[6] Y19
LED_R/BUZZ 22
NC_10 NC_21 OS PCM_A[7] AB17
PCMADR[6]/GPIO102
15 34
AR102 AUD_SCK PCM_A[8] Y16
PCMADR[7]/GPIO103
CL NC_20 AUD_MASTER_CLK R148
16 33 22 PCM_A[9] PCMADR[8]/GPIO108
/PF_CE1 AUD_MASTER_CLK_0 AB19 H5
OPT PCMADR[9]/GPIO110 GPIO_PM[0]/GPIO6 POWER_DET
R104 AL I/O3 PCM_A[3] 56 PCM_A[10] AB20 K6
10K PF_ALE 17 32
PWM1 PCM_A[11] PCMADR[10]/GPIO114 PM_UART_TX/GPIO_PM[1]/GPIO7 PM_TXD
W I/O2 PCM_A[2] C112 AA16 K5
18 31 100pF PCM_A[12] PCMADR[11]/GPIO112 GPIO_PM[2]/GPIO8 INV_CTL
/PF_WE PWM0 AA19 J6
WP I/O1 PCM_A[1] 50V PCM_A[13] PCMADR[12]/GPIO104 GPIO_PM[3]/GPIO9 RL_ON
1K
1K
1K
1K
1K
19 30 AC21 K4
PCM_A[14] PCMADR[13]/GPIO107 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1
NON_OS
NC_11 I/O0 PCM_A[0] AA17 L6
C
R106
20 29 PCMADR[14]/GPIO106 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD

C2
OS
1K
B NC_12 NC_19 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
R116
R118
R121
R124
R153
/PF_WP OPT 21 28 Y20 L5
Q101 /PCM_REG PCMREG_N/GPIO123 GPIO_PM[7]/GPIO13 /FLASH_WP
MMBT3904(NXP) NC_13 NC_18 M6
3.3K
R102
E 22 27 GPIO_PM[8]/GPIO14 SIDE_HP_MUTE
AB15 M5
OS
NC_14 NC_17 /PCM_OE PCMOE_N/GPIO113 GPIO_PM[9]/GPIO15 PANEL_CTL

23 26 AA22 C1
/PCM_WE PCMWE_N/GPIO197 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 PM_MODEL_OPT_0
NC_15 NC_16 AD22 M4
24 25 +5V_Normal /PCM_IORD PCMIORD_N/GPIO111 GPIO_PM[11]/GPIO17 AMP_MUTE
AD20
/PCM_IOWR PCMIOWR_N/GPIO109
A2 R147 33
R132 PM_SPI_SCK/GPIO1 SPI_SCK
AD21 D3 R154 22 R146 33
10K /PCM_CE PCMCE_N/GPIO115 PM_SPI_CZ0/GPIO_PM[12]/GPIO0 /SPI_CS
AC20 B2 OPT
R133 /PCM_IRQA PCMIRQA_N/GPIO105 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
10K /PCM_CD PCMCD_N/GPIO130 PM_SPI_SDO/GPIO3 SPI_SDO
Y21 for SERIAL FLASH
S7LR2_DIVX_CN /PCM_WAIT PCMWAIT_N/GPIO100
IC101-*5 Y22
LGE2111A-VD PCM_RST PCM_RESET/GPIO129
C108 C109
0.1uF 0.1uF CI_TS_CLK
C7 AB25 Y14
GPIO36 LVA0P OPT TS0CLK/GPIO87 CI_TS_VAL
NAND_FLASH_1G_SS NAND_FLASH_1G_TOSHIBA E6
GPIO37 LVA0N
AB23
OPT U21 AA10
NAND_FLASH_1G_HYNIX F5 AC25
USB1_OCD CI_TS_SYNC
EAN61857001 EAN61508001 B6
GPIO38 LVA1P
AB24 PCM2_CE_N/GPIO131 TS0VALID/GPIO85
EAN35669102 E5
GPIO39 LVA1N
AD25 R120 22 V21 Y12
IC102-*2 IC102-*3 D5
GPIO40 LVA2P
AC24 /CI_CD1 USB1_CTL PCM2_IRQA_N/GPIO132 TS0SYNC/GPIO86 CI_TS_DATA[0-7]
IC102-*1 K9F1G08U0D-SCB0 TC58NVG0S3ETA0BBBH B7
GPIO41 LVA2N
AE23 R122 22 R20
H27U1G8F2BTR-BC E7
GPIO42 LVA3P
AC23 /CI_CD2 PCM2_CD_N/GPIO135 CI_TS_DATA[0]
F7
GPIO45 LVA3N
AC22 OPT T20 Y13 from CI SLOT
AB5
GPIO46 LVA4P
AD23 PCM_5V_CTL PCM2_WAIT_N/GPIO133 TS0DATA_[0]/GPIO77 CI_TS_DATA[1]
AB3
GPIO49 LVA4N U22 Y11
A9
GPIO50
V23 ERROR_OUT PCM2_RESET/GPIO134 TS0DATA_[1]/GPIO78 CI_TS_DATA[2]
NC_1 NC_29 NC_1 NC_29 F4
GPIO51 LVB0P
U24 AA12
NC_1 NC_29 1 48 1 48 S7LR2_DIVX_DTS_AT
AB1
GPIO52 LVB0N
V25 to delete CI or gate for TS0DATA_[2]/GPIO79 CI_TS_DATA[3]
1 48 IC101-*4 N6
I2C_SCKM0/GPIO53 LVB1P
V24 D4 AB12
NC_2 NC_28 NC_2 NC_28 LGE2111A-W1 AB2
I2C_SDAM0/GPIO54 LVB1N
W25 UART1_TX/GPIO43 TS0DATA_[3]/GPIO80 CI_TS_DATA[4]
NC_2 NC_28 2 47 2 47 AC2
GPIO73 LVB2P
W23 E4 AA14
2 47 GPIO74 LVB2N
AA23 UART1_RX/GPIO44 TS0DATA_[4]/GPIO81 CI_TS_DATA[5]
NC_3 NC_27 NC_3 NC_27 C7 AB25
LVB3P
Y24 N25 AB14
NC_3 NC_27 3 46 3 46 E6
GPIO36 LVA0P
AB23
LVB3N
AA25 PM_TXD UART2_TX/GPIO65 TS0DATA_[5]/GPIO82 CI_TS_DATA[6]
3 46 F5
GPIO37 LVA0N
AC25
LVB4P
AA24 N24 AA13
NC_4 NC_26 NC_4 NC_26 B6
GPIO38 LVA1P
AB24
LVB4N
PM_RXD UART2_RX/GPIO64 TS0DATA_[6]/GPIO83 CI_TS_DATA[7]
NC_4 NC_26 4 45 4 45 E5
GPIO39 LVA1N
AD25 AE24 B8 AB11
4 45 D5
GPIO40 LVA2P
AC24
LVACKP
AD24 MODEL_OPT_6 UART3_TX/GPIO47 TS0DATA_[7]/GPIO84
NC_5 I/O7 NC_5 I/O8 B7
GPIO41 LVA2N
AE23
LVACKN
Y23 A8 FE_TS_CLK
NC_5 I/O7 5 44 5 44 E7
GPIO42 LVA3P
AC23
LVBCKP
W24 MODEL_OPT_7 UART3_RX/GPIO48 FE_TS_VAL_ERR
5 44 F7
GPIO45 LVA3N
AC22
LVBCKN AC15
NC_6 I/O6 NC_6 I/O7 AB5
GPIO46 LVA4P
AD23 T25 TS1CLK/GPIO98 FE_TS_SYNC
NC_6 I/O6 6 43 6 43 AB3
GPIO49 LVA4N GPIO196
U23 R136 22 P23 AD15
6 43 A9
GPIO50
V23
GPIO193
T24 for SYSTEM EEPROM I2C_SCL I2C_SCKM2/DDCR_CK/GPIO72 TS1VALID/GPI96 FE_TS_DATA[0-7]
R/B I/O5 RY/BY I/O6 F4
GPIO51 LVB0P
U24
GPIO194
T23 R137 22 P24 AC16
R/B I/O5 7 42 7 42 AB1
GPIO52 LVB0N
V25
GPIO195
(IC104) I2C_SDA I2C_SDAM2/DDCR_DA/GPIO71 TS1SYNC/GPIO97
7 42 N6
V24
RE I/O4 RE I/O5 AB2
W25 FE_TS_DATA[0] Internal demod out
RE I/O4 8 41 8 41 AC2
GPIO73 LVB2P
W23 D2 AD16
8 41 GPIO74 LVB2N
AA23 RGB_DDC_SDA DDCA_DA/UART0_TX TS1DATA_[0]/GPIO88 FE_TS_DATA[1]
CE NC_25 CE NC_25 LVB3P
Y24 D1 AE15
CE NC_25 9 40 9 40 LVB3N
AA25 RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO89 FE_TS_DATA[2]
9 40 LVB4P
AA24 AE14
NC_7 NC_24 NC_7 NC_24 LVB4N
TS1DATA_[2]/GPIO90 FE_TS_DATA[3]
NC_7 NC_24 10 39 10 39 AE24 S7LR2_DIVX_AT_ASE AC13
10 39 LVACKP
AD24 S7LR2_DIVX_DTS_AT TS1DATA_[3]/GPIO91 FE_TS_DATA[4]
NC_8 NC_23 NC_8 NC_23 LVACKN
Y23 IC101-*1 IC101-*3 P21 AC14
NC_8 NC_23 11 38 11 38 LVBCKP
W24
LGE2111A-TE LGE2111A-W1 PWM0 PWM0/GPIO66 TS1DATA_[4]/GPIO92 FE_TS_DATA[5]
11 38 LVBCKN N23 AD12
VCC_1 VCC_2 VCC_1 VCC_2 T25 PWM1 PWM1/GPIO67 TS1DATA_[5]/GPIO93 FE_TS_DATA[6]
VCC_1 VCC_2 12 37 12 37 GPIO196
U23 P22 AD13
12 37 GPIO193
T24 PWM2 PWM2/GPIO68 TS1DATA_[6]/GPIO94 FE_TS_DATA[7]
VSS_1 VSS_2 VSS_1 VSS_2 GPIO194
T23 C7 AB25 C7 AB25 R21 AD14
VSS_1 VSS_2 13 36 13 36 GPIO195
E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 LED_B/LG_LOGO PWM3/GPIO69 TS1DATA_[7]/GPIO95
13 36 GPIO37 LVA0N GPIO37 LVA0N P20
NC_9 NC_22 NC_9 NC_22 F5 AC25 F5 AC25 LNB_INT PWM4/GPIO70
NC_9 NC_22 14 35 14 35 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 F6
14 35 GPIO39 LVA1N GPIO39 LVA1N LED_R/BUZZ PWM_PM/GPIO199
NC_10 NC_21 NC_10 NC_21 E5
GPIO40 LVA2P
AD25 E5
GPIO40 LVA2P
AD25
NC_10 NC_21 15 34 15 34 S7LR2_DIVX_AT_SPIL D5 AC24 D5 AC24
15 34 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23
CLE NC_20 CLE NC_20 IC101-*2 GPIO42 LVA3P GPIO42 LVA3P
CLE NC_20 16 33 16 33 LGE2111A-TE SPIL E7 AC23 E7 AC23 H6
16 33 GPIO45 LVA3N GPIO45 LVA3N KEY1 SAR0/GPIO31
F7 AC22 F7 AC22
ALE I/O3 ALE I/O4 GPIO46 LVA4P GPIO46 LVA4P G5
ALE I/O3 17 32 17 32 C7 AB25
AB5
GPIO49 LVA4N
AD23 AB5
GPIO49 LVA4N
AD23 KEY2 SAR1/GPIO32
17 32 E6
GPIO36 LVA0P
AB23 AB3 AB3 G4
WE I/O2 WE I/O3 F5
GPIO37 LVA0N
AC25 A9
GPIO50
V23 A9
GPIO50
V23 SAR2/GPIO33
WE I/O2 18 31 18 31 B6
GPIO38 LVA1P
AB24 GPIO51 LVB0P GPIO51 LVB0P J5
18 31 E5
GPIO39 LVA1N
AD25 F4 U24 F4 U24 SAR3/GPIO34
WP I/O1 WP I/O2 D5
GPIO40 LVA2P
AC24 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 R164 22 J4
WP I/O1 19 30 19 30 B7
GPIO41 LVA2N
AE23 I2C_SCKM0/GPIO53 LVB1P I2C_SCKM0/GPIO53 LVB1P SCART1_MUTE SAR4/GPIO35
19 30 GPIO42 LVA3P N6 V24 N6 V24 EU_OPT
E7 AC23 I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N
NC_11 I/O0 NC_11 I/O1 F7
GPIO45 LVA3N
AC22 AB2 W25 AB2 W25
NC_11 I/O0 20 29 20 29 AB5
GPIO46 LVA4P
AD23 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23
20 29 AB3
GPIO49 LVA4N
GPIO74 LVB2N GPIO74 LVB2N
NC_12 NC_19 NC_12 NC_19 A9
GPIO50
V23 AA23 AA23 R23
NC_12 NC_19 21 28 21 28 F4
GPIO51 LVB0P
U24
LVB3P
Y24
LVB3P
Y24 S2_RESET VSYNC_LIKE/GPIO145
21 28 AB1
GPIO52 LVB0N
V25 LVB3N LVB3N
NC_13 NC_18 NC_13 NC_18 N6
V24 LVB4P
AA25
LVB4P
AA25
NC_13 NC_18 22 27 22 27 AB2
W25 AA24 AA24 R24
22 27 AC2
GPIO73 LVB2P
W23 LVB4N LVB4N SPI1_CK/GPIO201
NC_14 NC_17 NC_14 NC_17 GPIO74 LVB2N
AA23 R25
NC_14 NC_17 23 26 23 26 LVB3P
Y24 AE24 AE24 SPI1_DI/GPIO202
23 26 LVB3N LVACKP LVACKP T21
AA25 AD24 AD24
NC_15 NC_16 NC_15 NC_16 LVB4P
AA24 LVACKN LVACKN SENSOR_SCL SPI2_CK/GPIO203
NC_15 NC_16 24 25 24 25 LVB4N
LVBCKP
Y23
LVBCKP
Y23 T22
24 25 AE24 W24 W24 SENSOR_SDA SPI2_DI/GPIO204
LVACKP
AD24 LVBCKN LVBCKN
LVACKN
Y23
LVBCKP
W24 T25 T25
LVBCKN GPIO196 GPIO196
U23 U23
T25 GPIO193 GPIO193
GPIO196 T24 T24
U23 GPIO194 GPIO194
GPIO193
T24 T23 T23
GPIO194
T23 GPIO195 GPIO195
GPIO195
DIMMING I2C +3.3V_Normal
S7LR2_DIVX_MS10
A_DIM IC101
R156 10K
A_DIM PWM0 LGE2111A-T8
R140 R141 R160 R161 R144 R145
1K 1K 1K 1K 2.2K 2.2K
R157 100
PWM_DIM PWM2
NON_OS_512k_ST NON_OS_512k_ATMEL C7 AB25
A_DIM AMP_RESET GPIO36 LVA0P RXA0+
C111 AMP_SDA IC104-*3 IC104-*4 E6 AB23
5V_DET_HDMI_1 GPIO37 LVA0N RXA0-
2.2uF AMP_SCL M24512-RMN6TP AT24C512C-SSHD-T F5 AC25
5V_DET_HDMI_2 GPIO38 LVA1P RXA1+
B6 AB24
I2C_SDA GPIO39 LVA1N RXA1-
E0 VCC A0 VCC E5 AD25
1 8 1 8 RXA2+
I2C_SCL AV_CVBS_DET GPIO40 LVA2P
D5 AC24
DSUB_DET GPIO41 LVA2N RXA2-
SENSOR_SDA E1 WC A1 WP B7 AE23
2 7 2 7 RXA3+
SC1/COMP1_DET GPIO42 LVA3P
SENSOR_SCL E7 AC23
HP_DET GPIO45 LVA3N RXA3-
E2 SCL A2 SCL F7 AC22
3 6 3 6 OLP RXA4+
GPIO46 LVA4P
applied on only SMALL PCB AB5 AD23
TUNER_RESET GPIO49 LVA4N RXA4-
VSS SDA GND SDA AB3
4 5 4 5
MODEL_OPT_0 GPIO50
A9 V23
GPIO51 LVB0P RXB0+
HDCP EEPROM +3.3V_Normal Addr:10101-- EEPROM MODEL_OPT_1
F4
GPIO52 LVB0N
U24
RXB0-
+3.3V_Normal AB1 V25
EAN43349003 EAN43349004 R172 0
*Option : HDCP_EEPROM AMP_SCL I2C_SCKM0/GPIO53 LVB1P RXB1+
PM MODEL OPTION R173 OPT 0 N6 V24
+3.5V_ST AMP_SDA I2C_SDAM0/GPIO54 LVB1N RXB1-
IC104-*1 NVRAM_RENESAS OPT AB2 W25
MODEL_OPT_2 GPIO73 LVB2P RXB2+
IC104 M24256-BRMN6TP IC104-*2 AC2 W23
IC103 DEMOD_RESET GPIO74 LVB2N RXB2-
AT24C256C-SSHL-T C105 NVRAM_ST AA23
CAT24WC08W-T C107 R1EX24256BSAS0A LVB3P RXB3+
R113 NVRAM_ATMEL 0.1uF Y24
4.7K 0.1uF LVB3N RXB3-
A0 1 VCC AA25
8 E0 VCC A0 VCC R174 R177
1 8 1 8 10K 10K LVB4P RXB4+
A1 2 WP TOUCH_KEY 11_SUB AA24
7 R127 4.7K A0 VCC LVB4N RXB4-
1 8
I2C_SCL E1 WC A1 WP R178 100 OPT
A2 3 SCL R128 22 2 7 2 7
PM_MODEL_OPT_0 AE24
6 A1 WP
2 7 LVACKP RXACK+
VSS SDA R179 100 OPT AD24
E2 SCL A2 SCL RXACK-
4 5 A0h 3 6 3 6
PM_MODEL_OPT_1
LVACKN
Y23
R129 22 I2C_SDA A2 SCL LVBCKP RXBCK+
3 6 R111 22 I2C_SCL W24
VSS SDA VSS SDA LVBCKN RXBCK-
4 5 4 5 R175 R176
GND SDA 10K 10K
4 5 R112 22 TACT_KEY 12_SUB
I2C_SDA T25
GPIO196 MODEL_OPT_3
C104 C106 U23
8pF 8pF EAN61548301 EAN62389501 GPIO193 MODEL_OPT_4
T24
EAN61133501 OPT OPT GPIO194 MODEL_OPT_5
T23
GPIO195

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 50

MODEL OPTION
+3.3V_Normal +2.5V_Normal +3.3V_Normal

PIN NAME PIN NO. LOW HIGH
MODEL OPTION
+1.10V_VDDC
MODEL_OPT_0 AB3 FHD HD VDDC 1.05V +1.10V_VDDC
1K
1K
1K
1K
1K
1K
1K
1K
VDDC : 2026mA
MODEL_OPT_1 F4 PHM_OFF PHM_ON
DVB_T2
PHM_ON
120HZ
DVB_S
OLED
OPT
3D
HD
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
MODEL_OPT_2 AB2
10uF
NON_DVB_T2 DVB_T2
1uF
1uF
R4028
R4027
OPT OPT
R290
R291
R206
R208
R211
R226
MODEL_OPT_3 T25 NON_3D 3D
C275
C276
C228
OPT OPT
C4006
C4011
C4013
C4019
C4024
OPT OPT OPT OPT
OPT 100
C277
C280
C283
C292
C299
R201
IF_AGC_SEL MODEL_OPT_0 MODEL_OPT_4 U23 NON_OLED OLED
R202 BOOSTER_OPT100
LNA2_CTL MODEL_OPT_1
R203 RF_SW_OPT 100 MODEL_OPT_5 T24 NON_DVB_S DVB_S
RF_SWITCH_CTL MODEL_OPT_2
R204 OPT 100
MODEL_OPT_3
R4031 OPT 100 MODEL_OPT_4 MODEL_OPT_6 B8 NON_120HZ 120HZ
R4032 OPT 100 MODEL_OPT_5
R4040 OPT 100 MODEL_OPT_6 MODEL_OPT_7 A8 READY READY IC101
R4039 OPT 100 MODEL_OPT_7 LGE2111A-T8
+1.10V_VDDC
Close to MSTAR
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 S7LR2_DIVX_MS10
1K
1K
1K
1K
1K
1K
1K
1K
NON_DVB_T2
NON_120HZ
NON_DVB_S
DTV_IF
NON_OLED
Normal Power 3.3V

PHM_OFF
NON_3D
R288 100 C257 0.1uF K12 G10

IF_P_MSTAR
FHD
AVDDLV_USB GND_32
HALF_NIM/EU_NON_T2 G11
C4067 VDD33 GND_33
R4030
R4029
C4068 +3.3V_Normal G9 G12

R293
R294
R207
R209
R212
R227
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 OPT 100pF VDDC_1 GND_34

H9 G13
R289 100 C258 0.1uF VDDC_2 GND_35
IF_N_MSTAR L204 K10 G14
C4069 BLM18PG121SN1D VDDC_3 GND_36
100pF K11 G17
VDDC_4 GND_37
0.1uF
HALF_NIM/EU_NON_T2
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
L10 G18
10uF
10uF
10uF
IC101 VDDC_5 GND_38
OPT
OPT
OPT
OPT
OPT
OPT
OPT
M12 G19
LGE2111A-T8 M13
VDDC_6 GND_39
G24
VDDC_7 GND_40
C250 0.1uF R4002 47
C4043
C4044
TU_SIF N12 H11
C4001
C4007
C4012
C4014
C4020
C4025
C4031
VDDC_8 GND_41
C284
C293
C265
C267
C232
S7LR2_DIVX_MS10 C251 0.1uF R4003 47 P14 H12
C264 VDDC_9 GND_42
J2 AC4 1000pF P15 H13
CK+_HDMI1 RXACKP VIFP VDDC_10 GND_43
J3 AD3 ANALOG SIF OPT R10 H14
CK-_HDMI1 RXACKN VIFM VDDC_11 GND_44
K3 Close to MSTAR FB_CORE R14 H15
D0+_HDMI1 RXA0P VDDC_12 GND_45
J1 AC3 R15 H16
D0-_HDMI1 RXA0N IP +3.3V_Normal AVDD_AU33 VDDC_13 GND_46
K2 AE3 T10 H17
D1+_HDMI1 RXA1P IM VDDC_14 GND_47
K1 L227 H18
D1-_HDMI1 RXA1N BLM18PG121SN1D L208 GND_48
L2 AD4 HALF_NIM/EU_NON_T2 BLM18PG121SN1D H19
D2+_HDMI1 RXA2P SIFP GND_49
L3 AC5 P10 J9
D2-_HDMI1 RXA2N SIFM AVDD1P0 GND_50
T5 HALF_NIM/EU_NON_T2 C240 C241 P19 J10
DDC_SDA_1 DDCDA_DA/GPIO24 0.1uF FB_CORE FB_CORE GND_51
T4 C4064 HALF_NIM/EU_NON_T2 0.1uF R16 J11
DDC_SCL_1 0.1uF R4019
DDCDA_CK/GPIO23 10K AVDDL_MOD GND_52
V5 L11 J12
HPD1 HOTPLUGA/GPIO19 HALF_NIM/EU_NON_T2 AVDD10_LAN GND_53
R4004 M14 J13
0 MIUVDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C4065 GND_56
OPT 0.047uF W9 J16
R4001 AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C 0
HALF_NIM/EU_NON_T2 AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO75 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO76 TU_SDA AVDD25_REF GND_60
Close to MSTAR K9
GND_61
Y17 K13
C261 22pF AVDD25_LAN GND_62
AD1 K14
XIN GND_63
AC1 V18 H10
R287
X201 AVDD2P5_MOD
XOUT AVDD_MOD_1 GND_64
1M
R5 24MHz C262 22pF U19 K18

PM_MODEL_OPT_1 HOTPLUGB/GPIO20 AVDD_MOD_2 GND_65
HDMI
K19
GND_66
AE9 D7 OPT R297 0 K22
RXCCKP SPDIF_IN/GPIO152 CI_DET GND_67
AC9 D6 W14 L8
RXCCKN SPDIF_OUT/GPIO153 SPDIF_OUT AVDD25_PGA AVDD25_PGA GND_68
AC10 W15 L9
AVSS_PGA
AD9
RXC0P
RXC0N
Normal 2.5V AVSS_PGA GND_69
GND_70
J8
AC11 E3 U7 L12
RXC1P USB0_DM AVDD_NODIE AVDD_NODIE GND_71
AD10 E2 +2.5V_Normal AVDD2P5 L13
RXC1N USB0_DP GND_72
AE11 SIDE USB L7 L18
RXC2P VDD33 AVDD_DVI_USB_1 GND_73
AD11 AC12 L211 AVDD2P5:172mA M7 L19
RXC2N USB1_DM SIDE_USB1_DM BLM18PG121SN1D AVDD_DVI_USB_2 GND_74
AE8 AE12 P7 M8
DDCDC_DA/GPIO28 USB1_DP SIDE_USB1_DP AVDD3P3_MPLL GND_75
AD8 R7 K8
DDCDC_CK/GPIO27 AMP_SCL AVDD_DMPLL GND_76
AC8 M10
HOTPLUGC/GPIO21 AMP_SDA C269 C270 C271 C273 C274 GND_77
C8 R213 22 DVB_S 10uF 0.1uF 0.1uF 0.1uF 0.1uF C4045 1uF M19 M11
I2S_IN_BCK/GPIO150 DEMOD_SCL OPT OPT DVDD_NODIE GND_78
F2 D8 R214 22 DVB_S L14
CK+_HDMI2 RXDCKP I2S_IN_SD/GPIO151 DEMOD_SDA GND_79
F3 D9 V7 M15
CK-_HDMI2 RXDCKN I2S_IN_WS/GPIO149 COMP2_DET AVDD_AU33 AVDD_AU33 GND_80
G3 W7 M16
D0+_HDMI2 RXD0P AVDD2P5_MOD AVDD_EAR33 GND_81
F1 B10 M18
D0-_HDMI2 RXD0N I2S_OUT_BCK/GPIO156 AUD_SCK AVDD25_PGA:13mA GND_82
G2 C9 R19 M25
D1+_HDMI2 RXD1P I2S_OUT_MCK/GPIO154 AUD_MASTER_CLK_0 L229 VDD33 VDDP_1 GND_83
G1 B9 BLM18PG121SN1D T19 N10
D1-_HDMI2 RXD1N I2S_OUT_SD/GPIO157 AUD_LRCH VDDP_2 GND_84
H2 N11
D2+_HDMI2 RXD2P GND_85
H3 W18 N13
D2-_HDMI2 RXD2N I2S_I/F C4070 AVDD_LPLL_1 GND_86
R6 0.1uF W19 N14
DDC_SDA_2 DDCDD_DA/GPIO30 AVDD_LPLL_2 GND_87
U6 C10 16V N15
DDC_SCL_2 DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO155 AUD_LRCK GND_88
P5 V19 N16
HPD2 HOTPLUGD/GPIO22 VDD33 VDDP_NAND GND_89
R4 N17
CEC_REMOTE_S7 CEC/GPIO5 GND_90
AB9 C236 2.2uF EU_OPT N19
AUL0 SC1/COMP1_L_IN AVDD25_PGA GND_91
AA11 C237 2.2uF EU_OPT J17 K7
DSUB AUR0 SC1/COMP1_R_IN AVDD_MIU AVDD_DDR0_D_1 GND_92
P2 Y9 L219 K15 P8
DSUB_HSYNC HSYNC0 AUL1 BLM18PG121SN1D AVDD_DDR0_D_2 GND_93
R3 AA9 K16 P9
DSUB_VSYNC VSYNC0 AUR1 AVDD_DDR0_D_3 GND_94
N2 AA7 L15 M9
DSUB_R+ RIN0P AUL2 AVDD_DDR0_C GND_95
P3 AB8 P11
DSUB_R- RIN0M AUR2 C4027 GND_96
N3 Y8 C242 2.2uF 0.1uF K17 P13
DSUB_G+ GIN0P AUL3 COMP2_L_IN AVDD_DDR1_D_1 GND_97
N1 Y10 C243 2.2uF L223 L17 P16
DSUB_G- GIN0M AUR3 COMP2_R_IN AVDD_DDR1_D_2 GND_98
M3 AC7 AVSS_PGA M17 P17
DSUB_B+ BIN0P AUL4 PC_L_IN AVDD_DDR1_D_3 GND_99
M2 AD7 BLM18SG121TN1D L16 P18
DSUB_B- BIN0M AUR4 PC_R_IN AVDD_DDR1_C GND_100
M1 P12
DSUB_SOG SOGIN0 Close to IC with width trace GND_101
AUDIO IN R8
GND_102
E9 R9
SCART1_RGB/COMP1 V2
GND_EFUSE GND_103
R11
SC1_ID HSYNC1 GND_104
V3 W6 AUDIO OUT R12
SC1_FB VSYNC1 AUOUTL0 GND_105
R253 33 C211 0.047uF U3 V6 A23 R13
SC1_R+/COMP1_Pr+ RIN1P AUOUTL2 SCART1_Lout GND_1 GND_106
R254 68 C212 0.047uF U2 V4 TP207 B17 R17
RIN1M AUOUTL3 GND_2 GND_107
R255 C213 T1 Y7 C23 T8
SC1_G+/COMP1_Y+
R256
33
68 C214
0.047uF
0.047uF T2
GIN1P AUOUTR0
W5
TP208 DDR3 1.5V A5
GND_3 GND_108
T9
GIN1M AUOUTR2 SCART1_Rout GND_4 GND_109
R257 33 C215 0.047uF R2 U5 C11 N7
SC1_B+/COMP1_Pb+ BIN1P AUOUTR3 TP209 GND_5 GND_110
R258 68 C216 0.047uF R1 C19 T11
BIN1M GND_6 GND_111
C217 1000pF T3 C22 T12
SC1_SOG_IN SOGIN1 GND_7 GND_112
AVDD_DDR0:55mA D14 T13
*Opt : EU_OPT +1.5V_DDR D18
GND_8 GND_113
T14
AVDD_MIU
GND_9 GND_114
AA2 D19 T15
COMP2(common AV) R237 33 C218 0.047uF Y2
HSYNC2 L209 E17
GND_10 GND_115
T16
COMP2_Pr+ RIN2P L202 BLM18PG121SN1D GND_11 GND_116
R238 68 C219 0.047uF AA3 BLM18SG121TN1D E18 T17
RIN2M GND_12 GND_117
0.1uF
0.1uF
0.1uF
0.1uF
R239 33 C220 0.047uF W2 AD5 E19 U8
10uF
10uF
COMP2_Y+/AV_CVBS_IN GIN2P AUVRM GND_13 GND_118
OPT
OPT
1uF
OPT
R240 68 C221 0.047uF Y3 C249 C253 C256 C263 E22 U9
C4046
0.1uF
GIN2M 4.7uF 1uF 0.1uF 10uF GND_14 GND_119

R241 33 C222 0.047uF V1 AE5 F8 U10
COMP2_Pb+ BIN2P AUVAG GND_15 GND_120
R242 68 C223 0.047uF W3 AC6 F17 U11
C4038
C4009
C4042
C4036
BIN2M AUVRP GND_16 GND_121
C278
C281
C290
C224 1000pF W1 F18 U12
SOGIN2
AA6 H/P OUT F19
GND_17 GND_122
U13
EARPHONE_OUTL HP_LOUT GND_18 GND_123
AB6 G8 U14
CVBS In/OUT EARPHONE_OUTR HP_ROUT GND_19 GND_124
R244 33 C225 0.047uF AA8 H8 U15
TU_CVBS CVBS0 GND_20 GND_125
R245 33 C226 0.047uF Y4 AVDD_DDR1:55mA N22 U16
SC1_CVBS_IN CVBS1 GND_21 GND_126
R246 33 C227 0.047uF W4 C6 N21 U17
COMP2_Y+/AV_CVBS_IN CVBS2 ET_RXD[0]/RP/GPIO60 EPHY_RP GND_22 GND_127
AA5 C5 N20 R18
CVBS3 ET_TXD[0]/TP/GPIO57 EPHY_TP GND_23 GND_128
Y5 M22 V9
CVBS4 GND_24 GND_129
AA4 A6 M21 V10
CVBS5 ET_RXD[1]/RN/GPIO63 EPHY_RN GND_25 GND_130
Y6 C4 M20 V11
AA1
CVBSOUT0 ET_TXD[1]/LED1/GPIO56 SOC_RESET F10
GND_26 GND_131
V12
DTV/MNT_VOUT
CVBSOUT1 GND_27 GND_132
B5 V15 V14
C203 ET_TX_CLK/TN/GPIO59 EPHY_TN +3.5V_ST GND_28 GND_133
1000pF R252 68 C233 0.047uF AB4 C3 W16 V17
VCOM ET_TX_EN/GPIO58 GND_29 GND_134
OPT A3 R264 R265 R262 R263 *H/W opt : V8 T7
ET_MDC/GPIO61 49.9 49.9 49.9 49.9 GND_30 GND_135
B3 ETHERNET T18 E8
ET_MDIO/GPIO62 GND_31 GND_136
ET_COL/LED0/GPIO55
B4
C294 C295
STby 3.5V +1.10V_VDDC
MIUVDDC
Close to MSTAR 0.1uF 0.1uF
C200 AVDD_NODIE:7.362mA L228
DSUB_HSYNC DSUB_B+ BLM18PG121SN1D
4.7uF R217
N4 10V +3.5V_ST
DSUB_VSYNC DSUB_B- IRIN/GPIO4 IR 10 AVDD_NODIE
T6 R210 33 C231 0.047uF SOC_RESET
ARC0 HDMI_ARC L206
N5 HDMI_ARC D200 BLM18PG121SN1D C4071 C4062
DSUB_R+ DSUB_SOG PC_L_IN EPHY_RP HDMI_ARC 10uF 0.1uF
HWRESET SOC_RESET KDS181
DSUB_R- PC_R_IN EPHY_RN R200 C201 C286 C252
62K 0.1uF 0.1uF 0.1uF
DSUB_G+ HP_LOUT EPHY_TP
DSUB_G- SPDIF_OUT HP_ROUT EPHY_TN

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER,IN/OUT,H/W OPT 51

USB (SIDE)
USB1_DIODES
EAN61849601
L1451-*1
IC1450
MLB-201209-0120P-N2 AP2191DSG
120-ohm
NC GND +5V_USB
8 1
L1451
CIS21J121 $0.0665
OUT_2 IN_1
7 2
OPT OPT
R1458 R1459 C1451 OUT_1 IN_2 C1452
22uF C1453
2K 2K 6 3 10uF 0.1uF
1/8W 1/8W 16V 10V
5% 5%
FLG EN +3.3V_Normal
5 4
OPT
R1455
4.7K
USB1_CTL
R1454
10K
R1451
USB_1_32LS3500 USB_1_NORMAL 47
JK1450-*1 JK1450 USB1_OCD
3AU04S-305-ZC-(LG)
3AU04S-345-ZC-H-LG
1
USB DOWN STREAM
USB DOWN STREAM

2
SIDE_USB1_DM
3
SIDE_USB1_DP
4
OPT
D1451
5
RCLAMP0502BA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_OCP_DIODE_1EA 52

HDMI_2EA(NON SIDE HDMI)
5V_HDMI_1 +5V_Normal 5V_HDMI_2 +5V_Normal

5V_HDMI_1 5V_DET_HDMI_1
HDMI_1 R806
10K
A1
A2
A1
A2
HDMI_2
D821 D822
SHIELD MMBD6100 MMBD6100
C
C
R896
20 1K C R830
NON_CI_CAP 10K
Q802 B
C802 2SC3052 HPD1
19
0.1uF
R885 R889
HDMI_2
HDMI_2
16V E R884 R888
18
R804 2.7K 2.7K 2.7K 2.7K
1.8K R802
17 3.3K
DDC_SDA_1 DDC_SDA_1 DDC_SDA_2
16
DDC_SCL_1
15
DDC_SCL_1 DDC_SCL_2
14
HDMI_CEC
EAG59023302
13
CK-_HDMI1
12
11
CK+
10 CK+_HDMI1
9
D0-
D0-_HDMI1 For CEC
D0_GND
8
D0+
7 D0+_HDMI1
D1- R855
6 D1-_HDMI1 100
D1_GND HDMI_CEC CEC_REMOTE_S7
5
D1+
4 D1+_HDMI1
D2-
3 D2-_HDMI1
D2_GND
2
D2+
1 D2+_HDMI1
OPT
D802
JK802
HDMI_2 5V_HDMI_2 5V_DET_HDMI_2

HDMI_2
R807
10K
SHIELD HDMI_2
R895
1K
20 C HDMI_2
NON_CI_CAP_HDMI_2 HDMI_2 R828
C801 Q801 B 10K
19 2SC3052 HPD2
0.1uF
16V
18 HDMI_2 E
R803 HDMI_2
17 1.8K R801
3.3K
DDC_SDA_2
16
DDC_SCL_2
15 R805
HDMI_ARC
0
14 HDMI_ARC
HDMI_CEC
13
EAG59023302
CK-_HDMI2
12
11
CK+
10 CK+_HDMI2
D0-
9 D0-_HDMI2
D0_GND
8
D0+
7 D0+_HDMI2
D1-
6 D1-_HDMI2
D1_GND
5
D1+
4 D1+_HDMI2
D2-
3 D2-_HDMI2
D2_GND
2
D2+
1 D2+_HDMI2
OPT
D801
HDMI_2
JK801

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI_2EA(NON SIDE HDMI) 53

REAR JACK for non-EU (ERRC) SC1/COMP1_R_IN
SC1/COMP1_L_IN
SC1_R+/COMP1_Pr+
SC1_B+/COMP1_Pb+
SC1/COMP1_DET
COMPONENT & AV(COMMON) SC1_G+/COMP1_Y+
JK1602
PPJ234-05
6E [RD]E-LUG R1632
10K JK1102
PC AUDIO
COMP2_R_IN PEJ027-04 * Option : RGB_PC
3 E_SPRING
D1617 C1617 R1634
5.6V R1626 1000pF
5E [RD]O-SPRING_2 OPT 470K 50V

OPT
12K
6A T_TERMINAL1
R1107
7A B_TERMINAL1 15K
R1633 C245 2.2uF
PC_R_IN
10K
COMP2_L_IN OPT
R_SPRING
4E [RD]CONTACT_2 4 D1101 C1107

100pF R1102
470K
R1110
10K
D1616 5.6V 50V
5.6V R1625 C1616 R1636 5 T_SPRING
OPT 1000pF 12K
470K 50V
OPT R1108
7B B_TERMINAL2 15K
+3.3V_Normal C244 2.2uF
PC_L_IN
5D [WH]O-SPRING R1612 6B T_TERMINAL2 OPT

D1102 C1108 R1103
10K
5.6V
100pF
50V
470K
R1111
10K * Close to
main IC
COMP2_DET
4C [RD]CONTACT_1 R1615
1K
D1613
5.6V
OPT
COMP1_NON_ADC_FILTER
L1601-*1
COMP1_ADC_FILTER_L 0
5C [RD]O-SPRING_1 L1601
CM2012FR10KT
D1615
C1620
47pF
C1621
47pF
50V
COMP2_Pr+
RGB-PC D1115
+5V_Normal
20V R1621 50V COMP1_ADC_FILTER
7C [RD]E-LUG-S OPT 75 COMP1_ADC_FILTER

* Option : RGB_PC
ENKMC2838-T112
A1
C
A2
COMP1_NON_ADC_FILTER
COMP1_ADC_FILTER_L L1602-*1
0
5B [BL]O-SPRING L1602
CM2012FR10KT R1140
C1129
0.1uF
R1139
COMP2_Pb+ 2.2K 16V
2.2K
C1622 C1623
D1614 47pF 47pF
20V R1620 RGB_DDC_SCL
7B [BL]E-LUG-S OPT 75
50V
COMP1_ADC_FILTER
50V
COMP1_ADC_FILTER
+3.3V_Normal RGB_DDC_SDA
C1127 C1128
R1660 18pF 18pF
4A [GN]CONTACT 10K 50V 50V
AV_CVBS_DET
R1666
1K
D1624 C1646
5.6V 0.1uF DSUB_VSYNC1
5A [GN]O-SPRING OPT
16V COMP1_NON_ADC_FILTER
COMP1_ADC_FILTER_L L1603-*1
0 DSUB_HSYNC1
L1603 OPT
OPT OPT OPT
CM2012FR10KT C1122 C1126
D1109 68pF D1113
COMP2_Y+/AV_CVBS_IN 68pF 20V 20V
50V
6A [GN]E-LUG C1624
47pF
C1625
50V
OPT OPT
ZD1601 D1612 47pF D1114 D1116
ESD_COMP_Y_ZENER 5.1V 20V R1619 50V 50V 5.6V 5.6V
ESD_COMP_Y_20V COMP1_ADC_FILTER COMP1_ADC_FILTER OPT
75 R1148
ZD1602
ESD_COMP_Y_ZENER 5.1V 0
DSUB_B PM_RXD
OPT OPT
ESD_COMP_Y_5.6V R1133 D1110 R1149
5.6V 75 20V 0
D1612-*1 PM_TXD
R1150 R1151
0 0
L203 5.6uH
HEADPHONE DSUB_G
OPT +3.3V_Normal
HP_LOUT R1135 D1111
C1500 OPT C 75 20V
E
C268 10uF C1502 R1501
4.7uF 16V 1000pF Q1502 B Q1504 R1146
1K MMBT3904-(F)
10V 50V MMBT3904-(F) HEAD_PHONE_POP 10K
+3.5V_ST B R1147
HEAD_PHONE_POP JK1500
E +3.3V_Normal KJA-PH-0-0177 1K
C
DSUB_DET
GND 5
E
HEAD_PHONE_POP
HEAD_PHONE_POP R1504 OPT
Q1501 L 4 DSUB_R
ISA1530AC1 10K D1117
C R1500 B 5.6V
3.3K R1503
C 1K OPT
B DETECT 3
SIDE_HP_MUTE HP_DET R1137 D1112
Q1500 75 20V
2SC3052 HEAD_PHONE_POP
E R 1
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
DDC_GND
L205 5.6uH
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
HP_ROUT
BLUE
C1501 OPT C
RED
C272 E
NC
4.7uF 10uF C1503 R1502
16V 1000pF Q1503 B Q1505
10V 1K MMBT3904-(F) MMBT3904-(F)
50V HEAD_PHONE_POP B HEAD_PHONE_POP
E C
SHILED
11
12
13
14
15
* Close to main IC
16
10
6
9
* Option : HEAD_PHONE & HEAD_PHONE_POP
5
JK1104
SPDIF SPG09-DB-010
+3.3V_Normal
JK1103
* Close to main IC
SPDIF(Optic) 2F01TC1-CLM97-4F
GND 1 R4024 510

DSUB_HSYNC1 DSUB_HSYNC
Fiber Optic
R4025 510
DSUB_VSYNC1 DSUB_VSYNC
* Close to main IC VCC 2
R228 33 C204 0.047uF
DSUB_R DSUB_R+
VIN R229 68 C205 0.047uF
R296 100 3 DSUB_R-
SPDIF_OUT
SPDIF 4 R230 33 C206 0.047uF
DSUB_G DSUB_G+
OPT OPT
OPT C1109 C1131 C1121 R231 68 C207 0.047uF
C1110
SHIELD
R1104 0.1uF DSUB_G-

10K 22uF 10uF 100pF
16V 16V 16V 50V R232 33 C208 0.047uF
SPDIF SPDIF DSUB_B DSUB_B+
R4023 2.4K
R233 68 C209 0.047uF

R4026 10K
DSUB_B-
C210 1000pF
DSUB_SOG
* Option : SPDIF

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011.10. 14
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_NON_EU_ERRC 54

Serial Flash for SPI boot_NON_OS and OS
S_FLASH_NON_OS_MACRONIX
IC5601
+3.5V_ST MX25L6406EMI-12G
S_FLASH_NON_OS
R5603 HOLD# SCLK
1 16 SPI_SCK
S_FLASH_NON_OS 10K
R5602 +3.5V_ST
0.1uF VCC SI/SIO0 33 +3.5V_ST
2 15 SPI_SDI
S_FLASH_NON_OS
C5601
NC_1 NC_8 S_FLASH_OS_MACRONIX
3 14
OPT IC1401
R1404
NC_2 NC_7 +3.5V_ST 4.7K MX25L8006EM2I-12G
4 13 S_FLASH_OS
C1401
NC_3 NC_6 CS# VCC 0.1uF
5 12 /SPI_CS 1 8
OPT
R1403
NC_4 NC_5 10K SO/SIO1 HOLD#
6 11 SPI_SDO 2 7
CS# GND WP# SCLK

/SPI_CS 7 10 /FLASH_WP 3 6 SPI_SCK
R1405
SO/SIO1 WP# GND SI/SIO0 33
SPI_SDO 8 9 4 5 SPI_SDI
OPT C S_FLASH_OS
R1401
0 OPT
B
Q1401
MMBT3904(NXP)
E
S_FLASH_NON_OS_WINBOND S_FLASH_OS_WINBOND
IC5601-*1 IC1401-*1
W25Q64BVSFIG W25Q80BVSSIG
HOLD[IO3] CLK CS VCC

1 16 1 8
VCC DIO[IO0] DO[IO1] HOLD[IO3]

2 15 2 7
NC_1 NC_8 %WP[IO2] CLK

3 14 3 6
NC_2 NC_7 GND DI[IO0]

4 13 4 5
NC_3 NC_6
5 12
NC_4 NC_5
6 11
CS GND
7 10
DO[IO1] WP[IO2]
8 9

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR 2011.08.29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Serial FLASH 56

MSTART DEBUG_4PIN
P1
12505WS-04A00
1 MSTAR_DEBUG_4P
3 RGB_DDC_SCL
4 RGB_DDC_SDA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MSTAR DEBUG_4PIN 58


LG 32ls3500-Ud 32ls3510-Ua Chassis La25a mfl67454202

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

LG 32ls3500-Ud 32ls3510-Ua Chassis La25a mfl67454202

Uploaded by

Copyright:

Available Formats

Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 32LS3500 32LS3500-UD

P/NO : MFL67454202 (1203-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

EXPLODED VIEW .................................................................................. 25

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

1) Temperature : 25 C 5 C(77 9 F), CST : 40 5 C

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

5.2. HDMI Input (DTV)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

3.2. Final assembly adjustment

4.1.2. Equipment & Condition 4.2.2. Equipment

Protocol CMD 1 CMD 2 Data 1 Data 2 Remark

Manual ADC Confirmation using Service Remocon. After

EDID Block 1, Bytes 128-255 [80H-FFH]] 0 1 2 3 4 5 6 7 8 9 A B C D E F

5.1.3. Equipment connection

If TV internal pattern is used, not needed

Tool option can be reconstructed by Software

5.3. Ship-out mode check (In-stop)

7. AUDIO output check

1 Audio 9.0 10.0 12.0 W (1) Measurement

(4) Updating is staring.

(5) Updating Completed, The TV will restart automatically

* After downloading, TOOL OPTION setting is needed again.

Check Micom Voltage No

Check Inverter Control & Error Out No

Check Tuner 1.8V Power No

Check IF_P/N Signal No

Check Tuner 1.8V Power No

Check CVBS Signal No

Check AV Cable for damage

Check Component Cable

Check JK1601 or 1603 No

Check RGB Cable conductors

Check HDMI Cable conductors

Check HDCP EEPROM(IC103) No

No Check other set No

Check AMP IC(IC501) Power No

Check AMP I2C Line No

Check Mstar I2S Output No

Check Output Signal P501 No

Check speaker resistance No

Check Tuner 1.8V Power No

Check IF_P/N Signal No

Check Tuner 1.8V Power No

Check CVBS Signal No

12. Component Audio

Check JK1601, JK1603 No

13. RGB Audio

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

CVBS, Y/Pb/Pr, L/R DDR3 Add.

LGE Internal Use Only

TP for CI slot TP for SCART TP for Headphone

/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT

/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE

/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] SC1_SOG_IN HP_DET

Manual ADC Confirmation using Service Remocon. After

1 Audio 9.0 10.0 12.0 W (1) Measurement