Professional Documents
Culture Documents
Music Synthesizer
This report was originally written to get course credit for an independent study project
that I did my senior year in Electrical Engineering at Tufts University. It was written in
1977, and the device that it describes was designed and completed in the summer of
1976. It represents the first stages in my exploration of modular synthesizers. After
completing my Ph.D. work in physics four years later, I found myself drawn again into
designing and building synthesizer circuits during the early 80s, resulting in the
realization of more than twice as many modules that are considerably more advanced.
Although I have more information on my larger system posted on a website (see
http://www.media.mit.edu/~joep/synth.html ), I never formally documented the designs,
hence this is the only readable written work on synthesizer circuits that I produced (note
that my more current research directions that involve musical controllers are posted on
the project site of my group: http://www.media.mit.edu/resenv/projects.html ). In the
interest of posterity and for the benefit of hobbyists, Im posting this document publicly.
Admittedly, the designs are quite primitive compared to my subsequent modules and to
where electronics has evolved. But some of the circuits are still a bit interesting in a
quirky way Some of the designs were inspired by other devices, either on the market
as effects boxes, or circuits published in various places that I hacked and modified I
cited all such sources in this document (in effect, it served as an undergraduate thesis of
sorts). After returning to the USA following my ETH postdoc at the end of 1983, I
tweaked the design of the modules in this cabinet to improve their performance and bring
their spec up to the newer modules these changes are handscrawled atop the schematics
(apologies, as not all are entirely legible, although the drift is usually clear). This
synthesizer still exists as documented here and works wonderfully, except for the
oscillators, which I replaced during the late 80s with new designs based on the CEM
3340 VCO chips (the front panel is still the same, but the oscillator uses the Curtis chip,
which is quite stable).
Joseph Paradiso
'VWith the producion of the first operational amp'.ifiers in the mid 60's,
it became feusible to commnercially build musical instruments goverined
by analog contLro!. The manufacture and use of synthesizers has sky--
rocketed atc Robert 2Meoog's initicl rodels, and notw they are very
, \/ common in the music industry. Work is underway now to digitize
synthesizer operation, making more breakthroughs imminent.
__ "
-3-
NOTES ON CONSTRUCTION
This essay will be broken into thirty sections dealing independently with each
module of the synthesizer. These will be generally composed of five subsections
structured as follows:
A Operational amplifier
C Capacitor
D Diode (normal and zener)
LED Light emitting diode
P Potentiometer (mounted on front panel)
Q Transistor (bipolar, UJT, and FET)
R Resistor
S Switch (mounted on front panel)
T Trimmer potentiometer
The value or model number of each component is usually printed near its
alphanumeric designation. Special-purpose components and IC's are explicitly
labeled with pin diagrams. Maximum voltages are gi,en for all electrolytic
capacitors.
On most diagrams, a blue "X" indicates a point where the circuitry is external
to the main board (jacks, switches, potentiometers, LED's, etc.). Some circuits
require several drawings. In these cases, a block diagram is usually given, and
chaining between schematics is designated by a lettered green dot and arrow.
The power-supply connections are not shown for operational amplifiers. It
is assumed that they are driven by the bipolar 15 volt supply wherever possible.
In the keyboard circuitry, all operational amplifiers are driven by the +/- 9 volt
supply.
A ..
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+9 volts
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The +/- 15 volt supply drives most of the electronics, +l- 9 is primarily
used for the keyboard, +/- 5 drives most of the logic, and +18 powers much of
the transistorized circuitry. The synthesizer could be re-designed to use the +/- 15
volt supply exclusively. (The present supply developed gradually during prototype
construction, and it was frequently tailored to meet the deeds of specific circuitry
rather than vice-versa.)
Because of its simple nature, a power supply schematic is not presented. The
circuitry is quite conventional;. The output of a transformer is full-wave rectified
(a center-tap transformer is used for bi-polar supplies), and ripple is smoothed via
larqe filter capacitors (10 - 50 thousand MFD computer capacitors are used). If
the supply is to be regulated, the capacitor voltage is fed to integrated circuit
regulators (LM390 for +5 and +9 volts, LM340 for +15 volts, LM320 for -5, -9, and
-15 volts), Which are mounted on heatsinks. Oscillation in supply lines is damped
by placing anti-ringing capacitors in appropriate positions. The output of each
supply is routed to two sets of bus wires which run the full lenth of the cabinet.
A connector is provided at the rear of the synthesizer for feeding voltage to the
keyboard. The +/- 15 volt supply may also be tapped via terminals mounted on the
back panel.
The power supply requires standard 110 volt AC, and it is fused at 3 Amperes.
These components can be accessed via pin jacks, and are useful in a variety
of situations.
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---Keyboard and support circuitry---
A2 charges A3 until the output of the integrator is made equal to the input
of the comparator. This results in a linear ramp at the output of A3 in response
to a change in input-- ie. our desired linear slew. The rate at which integrator A3
charges is determined from P2 and P3, which, because of diodes D and D2, allow us
to set independent "rise" and "fall" times for our ramp.
The remainder of the circuitry in Schematic#3 was discussed quite throughly
while describing the block diagram. A4 is summer#1, the VCO is the 8038 chip,
A5 is summer#2, A6 and A7 form summer#3, and A8 is the limit comparator.
References:
--
"111-17-- n
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-16-
--- Keyboard and support circuitry---
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3) VOLTAGE CONTROLLED OSCILLATOR
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-27-
We can observe the structure of the VCO circuit from the block diagram.
Control voltages are summed with a bias determining the "rest" frequency in
summer#1. This sum is fed into the exponential converter (Volts out = exp(volts in)'
then inverted and added to the linear control input by summer#2. The output of
summer#2 is used as the control voltage for the 8038 and is monitored by the window
comparator which activates a warning LED when out of range. The 8038 outputs
sine, triangle, and square waves. A comparator has been added to the triangle
wave to produce a duty-variable pulse. A synchronization circuit allows one to
re-set the waveforms in synch with a controlling signal. Summer#3 mixes the sine,
triangle, and pulse signals together with an optional DC bias to produce complex
waveforms.
"rrrrrrrr I-
-26-
a pulse is sent through Cll, turning FET Q3 momentarily on. Since Q3 shunts the
timing capacitor, it is effectively discharged, and the 8038 waveform is re-set.
R34 provides a negative bias on the gate of Q3, keeping it normally off.
A8 is a comparator which compares the sum of the triangle wave plus a bias
voltage set through P4 against the voltage at its '+' terminal. If the "PWM" input
is not connected, this '+' voltage is grounded through R33. Thus P4 will control
the point at which the triangle wave at A8's '-' input crosses ground, controlling
the duty of the rectangular wave at the comparator's output. A signal applied to
the "PWM" input will alter the voltage at A8's '+' terminal, allowing us linear
control over pulse width. Zener diode D4 clamps the pulse output ot A8 positive,
and limits its maximum to roughly 5 volts.
P5, P6, and P7 route the sine, triangle, and pulse outputs respectively to
either A9 or A10, allowing us to mix these waveforms with inversion capability.
P8 adds a desired DC bias into the mix.
There are three 8038 VCO's in the synthesizer. Another VCO has been built,
however, which does not use the 8038, but employs a discrete UJT relaxation oscillati
instead. All input and support circuitry is similar to the 8038 case. Schematic#5
depicts thic new oscillator and labels the points at which it is tied into the
other diagrams.
A1 here mixes the exponential and linear control voltages with a bias set
from T3, performing a similar function to A5 in schematic#2. This inverted mix
is fed into the base of Q, controlling its collector current, thus controlling
the rate of charge of timing capacitor C (C2, C3, and C4 are also switch-selectable
through S and S2). This capacitor will charge until it reaches the trigger
voltage of UJT Q2. At this point, Q2 turns on and discharges C, allowing it to
charge up again after it drops below Q2's holding voltage. Thus the voltage
across C forms a linear ramp wave, which is buffered through emitter follower Q3
and output.
The ramp wave from Q3 is fed into differential pair Q4 and Q5. The original
signal at the collector of Q5 is mixed with its inversion at the collector of Q4
through diodes D1 and D2. Because of the diodes, whichever voltage (at Q4 or Q5)
is less appears at the base of Q6. This will form a triangle wave from our
original ramp. (Because of tAe.fjinite recovery time of the ramp wave, a small
"glitch" can be seen at the apex of triangle waves shaped via this method.) Q6 is
an emitter follower which buffers the triangle wave before it is output.
The ramp wave is also fed via P1 to the comparator composed of Q7 and Q8.
This produces a pulse whose duty cycle is controlled by P1. The bias on Q7 can
be altered by applying a voltage at the "PWM" input. This moves the comparator's
trip points and modulates the duty cycle of the pulse.
Because of the non-linearity of the 8038 and UJT oscillators, and because
of inaccuracies in the exponential converter, this oscillator can be kept in tune
over a fairly small (approx. 3 octave) range. I am now in the process of constructi
superior oscillators using Operational Tansconductance Amplifiers (CA3080), which
are much more linear, have a greater range, and require a much simpler exponential
converter design.
References:
_\
q~ - --
-29-
-, I--
B
Complex waveform made
from mixing the sine,
triangle, and pulse
- -- -I
-30-
Ramp waveform
Triangle waveform
Output of exponential
converter
-31-
Pulse output
Pulse input to
synchronizer
Synchronized sine
wave
; _ ic---l. - ,. .: .: I
-33-
4) PHASE-LOCKED LOOP/VCO
Uses: Used as a PLL, this module works as a "slave" tracking a master oscillator
giving interesting "glide" and "bounce" effects. It can also be used as
a linear VCO in both the audio and low LFO/clock ranqes.
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---Phase-Locked Loop/VCO---
-'\.
When used as a PLL, A3 amplifies and buffers an input signal AC coupled through
C1. The signal is input to the phase comparator of the CD4046 at pin#14. The
loop filter runs between the phase comparator output (pin 13) and the VCO input
(pin 9). The filter damping constant is set via P5, and its cutoff, thus "glide
rate" is set via the capacitor selected on S4. An error signal may be input to the
loop via R4.
R15 and R16 are timing resistors for the VCO, and its range may be altered via
S5. Similarly C3 and C4 are VCO timing capacitors, and range can also be selected
via S2.
The phase comparator loop is closed through S. If desired, S can be opened,
and the feedback loop may be completed through external circuitry (binary divider,
etc.). The rectangular wave output from pin#4 may be attenuated via P4. When the
loop achieves lock, phase pulses are output at pin#1. These are buffered via
emitter follower Q1 and fed to LED1, giving us a crude "lock" indicator. The
high impedance demodulated output at pin 10 is buffered by voltage follower A4
before being exposed to the external world.
With S3 in the "VCO" position, the output of summing network A1/A2 is fed into
the VCO input. "Rest" frequency is determined from the bias input at P1. R1
allows us a fixed control input, while P2 gives us a variable input with inversion
capability.
The oscillator may be shut down by applying a voltage at the "disable" input
through D1. A seven volt low impedance supply to drive the CD4046 is provided by
series regulator Q2 and diodes D3 and D4, filtered through capacitor C10.
References:
PLL output
"Sweeping" sinusoid
input to PLL
Demodulated output
from PLL (note ring
oscillation)
Waveform input to
PLL
---
-38-
6) INVERTING SUMMER
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---Inverting summer---
This is a straightforward inverting summer. Al sums inputs from R4, R3, and
R2 at unity gain and weights an input through R5 with a gain of 10 (20 db). A bias
may be pre-set on trimmer T1, and added to the mix via S. C3 is provided for
AC coupl i ng.
References: NONE
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-- - ----. .______- -. __,,, , _
-43-
The heart of this circuit is the bistable multivibrator composed of Q1 and Q2.
Normally Q is off and Q2 is on. When a pulse appears on the trigger or gate inputs
however, the bistable changes state; Q turns on and Q2 turns off. Thus the
voltage at the collector of Q2 goes high, and Cl, C2, (and C6 if S3 is on) charges
through P1, D, and D2. (If the attack switch is in "normal" position, C2 will
charge more quickly through current multiplier Q3, decreasing our attack time.)
The collector voltage of Q2 is output as the "attack gate" and it is buffered
through Q6 to drive LED1 as an indicator of the attack state.
The capacitors will charge until the voltage across C reaches the triggering
threshold of UJT Q4. When this occurs, C discharges through Q4, producing a pulse
across R12 which is fed back to the base of Q2. This turns Q2 on and places the
bistable back into its original state. The cllector of Q2 then goes low, and C2
(and C6 if S3 is on) discharges via D3 and P2. Thus the voltage across C2
exponentially attacks and decays with rates set by P1 and P2 respectively. This
voltage is buffered by Q5 and amplified by non-inverting amplifier A, appearing as
our envelope output. It is also fed into inverter A2, where it is mixed with a DC
offset via R20, appearing at A2's output as an "inverted" envelope. A3 is a
comparator which compares the envelope waveform against the small (0.3 volt)
potential across D10. Since D9 clamps the output positive, A3 generates a "cycle
ended" gate which goes high upon the completion of an Attack/Decay cycle (when the
envelope is less than 0.3 volts).
Q6 is an FET switch that shunts the transient capacitor, normally kept off via
biasing resistor R15. The cycle may be re-set by inputing a pulse at the "re-set"
input (or depressing S4), which is fed via C7 to the gate of Q6, turning it on
briefiy and discharging C2 (its internal resistance is too large to completely
discharge C6).
Additional notes... If the "gate input is held high, the bistable can not
re-set, thus the envelope voltage saturates at its maximum level.
When the attack cycle ends, Q turns off. The collector voltage of Q1, herefore
jumps high, and after it is differentiated by C4, we will recieve an "Attack ended"
pulse output.
References:
Some basic design ideas appeared on page 102 of Radio-FlPrfrnn;-
-44-
NOTE: Photo's 13, 14, and 15 were triggered by the same signal,
and are in synch, They may be treated as timing diagrams.
Triggering pulse
which initiates cycle
Normal attack/decay
envelope output
Inverted attack/decay
envelope output
-45-
i
I
i
^5_ . . . . . .
. . . . . . , i . . .
i
I
II
i
Slow attack, sharp decay
I
iI
I
I
Ii
i
I
-46-
Output of envelope
generator
Uses: This filter has limited range and Q. It can be used as an auxilary
filter, however, giving "wow"type sounds (typical of resonant filters),
filtering noise to simulate percussion and wind, etc.
- --
l 1-
An
C'-
V- i
. 4f
t-: i Q
- ;) t- -Z~
00 41.1 ;.~~~'--.-
i + Ld H N A H I-'X t,
3
-49-
The heart of this circuit is the paralell-T notch filter composed of R9, R10,
C3, C4, C5, and the dynamic impedance of diode D. The notch filter is connected
in feedback across amplifier Q1. This gives us a bandpass response at the collector
of Q1, which is buffered by emitter follower Q2 and is coupled to the output via
C6.
Control inputs are summed with the frequency bias set by P3, causing DC current
to flow through D, thus setting Dl's operating point on its characteristic and
determining its dynamic impedance. The impedance of D determines the center
frequency of our filter.
The resonance depends upon the gain of Q1. This can be adjusted by varying
the AC emitter bypass via P1. Q3 also shunts the emitter, and a voltage at the
"Q control" inputs will turn it on, thus increasing our resonance.
R13 and C7 provide de-coupling from the "noisy" 18 volt supply.
References:
- - ---- r- - - I
B) VOLTAGE CONTROLLED LOWPASS FILTER
)
li L I
0 I V;I
,J
/. S
.
4 -
-;
,, I
O
-52-
References:
9_1
I
- : 4 .- A
-53-
~) BANDPASS VCF WITH LFO
Uses: Filter has very limited range and Q, useful for "wows" etc. LFO sine
output is very handy as a control voltage.
i-ar
L
-54-
This circuit was based upon a diagram appearing in a 1969 issue of Popular
Electronics as a "Leslie Effect Simulator". I have long since lost all diagrams
and documentation on the circuit, and, since it is not often used, I won't attempt
to re-construct a schematic. The essence of the device is a bandpass filter, with
a frequency-controlling resistance determined by the dynamic impedance of a FET.
The circuit also outputs a low-frequency voltage-controlled sinusoid, which can
prove valuable for control applications.
fCl
-55-
Controls: P1 Control-bias
<.
. 1% fl,
.-
%0 - -
0
-X"
, 7"
I . -,j 6
-A--- 51
o
Il
4-
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VjJ
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rl)
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5,-
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c)
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la
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V)
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0
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d,'d
LI, LI-
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\j -. li . - c Ir
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4-
Hf
_, C-- ,)
It r O
r>TVi
- I t I .
'- .. ... ..` .; .. 1` 11-- 1.-.. ___ ___ _ -1
-57-
References:
- -~~~
-58-
Output of VCA
Uses: Dynamically alters harmonic spectrum via duty cycle control. Diode
shaping circuit can yeld sine wave with triangle input, or clipped
waves with other inputs.
-
s I
to
WI.
Cs 4;
%AC C% %
CM
t-V-
.Vd ;~- In
.4
.4)--
_
.4. .I
1 T4-
tm,
0
r
C,
v
0c0
QfA-,
01
laI-i' -
ts,
3-
t
-t e
%Wa Q
I-
--
Si
C-
Cd-
-c
--
>l
Y-
nc'"
nS 9,.-,
Qf _;
c6
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U
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t
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Q ' 1.. C)
-
etC~, C
If
o
'3
'I
.
n-
I3 - .1
lt "~.-- - .L
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.
-61-
----
Pulse width modulator/Sine shaper----
References:
Shaped "sinusoid"
Uses: An external audio source (ie.microphone, etc.) may be input via this
module, which pre-amplifies the signal while outputing a DC voltage
proportional to its aplitude. A comparator switches high when this
envelope exceeds a pre-set value.
-1.. -- .1-1.1-.- ..... ..- -..- - -- l-1-1- 1-1.
1.-- I Al.-
I
Vo
'I C
) V
41
!.
2-
~7
5
l.
C U
-1-1% t
p C4 -M
0 - oqzo
Q: -0
ii
RON i
. iI
U3 111.v i
1" .i~~~~~~~~~~
4 - i
ci-
- -i r
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I
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0
It
u ,,
II
0o
I 0
r
I.
1t
?-
LL
-c
er -.
-65-
---Envelope follower---
A low-level audio input is amplified by Al, with gain set by P1. The output
of Al appears as the "pre-amplified output" and is fed into dclamper A2. The sum of
the original input via R4 and the clamped output of A2 via R7 yields a
full-wave rectified signal at the input of lowpass filter A4. This
lowpass filter "detects" the amplitude envelope of the input signal,
and its output appears at the "envelope out" terminal. R12 and R13
are a voltage divider which provide a reference voltage to comparator
A4. When the envelope exceeds this reference, the output of A4 goes
high, giving us our "step output". This is differentiated by C7,
forming our "pulse output". The step is also buffered by voltage
follower A5 which drives LED1, giving us an optical indication of
comparator triggering.
R10 gives A4 a margin of hysteresis, which prevents stray
triggering on noise in the qnvelope, The V- supply of A4 is fed
through R19, which limits i.ts negative output swing.
References:
Waveform input to
envelope follower
Amplitude envelope
output
1
Photo#20 - Env'elope fol lower timing part 1
p I ""
; t
4.
La
A
-4
l-Sp
t I:
, ~
CCI'
-70-
I.:
Output of reverberator
i
i
(reverberation is
i obvious)
I
i. -
i
II
berated signal
h()sC,
I
-71-
14) DISTORTER
N t,,?v A)\,
4.I
= O
,t..
-e
i-
.- 0
I
3)
U-
4 .ll:
3- ri
06 It 'i 3
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1'
I' I 0 &C O
t *1 IO
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0-
I
,4
A-
ranll
O-
'I) VI
ra
~r
-9
11.
D"
%4 S
0
~uV Ij,-
ie
,/ '.. , I~
'Lr
-73-
--- Di storter---
References:
Distorter output
--- -.--
---- - -----.
------
--------- ----- -- - -" ` -- '
Distorter's output
15) SAMPLE/HOLD
(Nl e
1!
I,
I
V'
C) ,
:1
0(1
n
--
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r I
11
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Co:
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7^P .--~:Ti*-rT*-l- ---~'-"'~~-
:-11?---:
.- I - - "...--f.
- -" " - -' - " - - ".- -
'--. '-
--- -- - 11-.-
-" - -
-78-
--- Sample/Hold---
References: NONE
-79-
Part A:
Output of S/H when
waveforms in photo#25
are input
Part B:
Square wave applied to
the gate input of S/H
to yield pto#27
i~ Waveform at S/H's
sample input
i~~1
Output of S/H with
above wave at input
and the square wave in
Part B of Photo#26 at
the gate input
-81-
Inputs: NONE
Controls: NONE
(N;J
'Vl
i
i
i
i,
i
i
I
- - : --------r- --:- ----- - :- ---
-83-
References:
"White" noise
"Pink" noise
.. ~..___.
...- ~.------
.... - ---- I
"Random DC voltage"
(The sweep time on
this photograph is
much slower than the
rate used in photo#28
Uses: Simple FET control led all-pass network shifts the phase of
various frequency components with a control voltage. The
"shifted" signal i s mixed with the input, providing a
anged" sound.
"'fl
U
I
I
t ;,.,I
i
II
I
iz, I
n, i 01
-C
-C,
_I 11
-87-
--- Phase shifter---
References:
The original design for this circuit was used by the MXR
Corporation in thier "Micro-fazer".
~s ' i-- 4 v t is - v
-88-
`'
i
i
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II
i
a
I
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iv
I
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1
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va}
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i
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Y-10- _-
1.1 0 I
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-!
.C.- /I.-11
Q-I--fP 4- 9 'j
I.-
- -
17. - .c
"
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C-11
L I-. -1
-
_CI -
.d.,,
- .)
I o
-90-
References: NONE
-91-
Complex waveform
produced by summing
the stages of the
divider
Simpler waveform
so produced
_ ~~~~~~~
__~~~~~~~~~_______1____1_1__I~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~___~~~~
i< - ma..
-92-
_ 1_1_
'i
;4
4
4:-
-11 I ies
0.
-4
-
,- p .v
Z.
___ _____
-94-
References:
_ _
II-I1lls*r w s $44---
KL
, o
- ~~ ~ ~ - '--l (
* 0~~~~~~~~~~~~~~~~~~~~~~~~ Y
I
II
p~~~~~~~~~~~~~~~~~~
e
I.
I
I
I
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I
i
I
i
I i
ii
O'I
/
I
--. i
. 1).1z,
1-1
I -It,
..
I-
7..S
-98-
\Il
-- Transient Lag--
-- Transient Lag--
References: NONE
-99-
Output of Lag
Input waveform
I
-100-
2
e -
oiI
*-
i.
0
~J
-102-
--- Balanced (ring) modulator---
References:
1I
-
7b
C>
7E
rS
.-
:rn
0-
zy)k
11l
_s
C.,
c
1
-106-
References:
Output of VCA
- ~ ~ ~ ~
-
I
Il
it
':w- I
,'VIL
'
J.
-
c}
,
0)
-<H
o -
--\ x 4
X, 0
jn r6 m
ci q.,
-I -i
0. -
11
t
0old,^ -
J v
1t
!ll
. )"
;111
6
-I- Y-
: !
"IZ -_;
- -
tf- ";
- I
ii
-112-
---State Variable VCF---
The block diagram shows the typical setup for a second order
state-variable filter. The CA3080 chip is used as a multiplier
between the integrators in order to voltage-control the center
frequency. The controls are added with a bias determining the rest
frequency set by P5 in summer#2 (A7/A8). One of the control inputs
is variable with inversion (+/-) capability through P4.
The CA3080's are buffered by source followers Q1 and Q2 in order
to reduce output impedance and bias problems (remember that the 3080's
outputs are current sourcing!), The integrators incorporate the
FET's into their feedback loops, thus linearizing them.
The high-pass and low-pass outputs are added together in summer#3
(A6), providing a notch response, with the balance of the notch
set by P3,
References:
Output of Low-pass
with resonance added
Output of Low-pass
(square wave is still
input)
-114-
.9
. .
Notch output
I
I
I
i
I
I
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I
III
t1
HG" r-4, -,
2t I (A f rl'T
. r,;,
p . uf. IH
:1
Z LA;
IT
H
(..
-1i
Zm
ol
-1
4
II
('N
m
"-
frl
Q
WJ;o
V
y 3
i - I
j I(
a
. h P-11 N .4
-i
_.--I i
I
i
,I75 H
-4
1 ic ,.A
f% .I
'._li I
r- 7? -1.7
1-1
-4
,C)-s ,
I
I..
i'C ; 'b T.
, rag- I P% I%
(A4teL' if -4 ,1
i
i I
f
-4
I
II
z
-118-
2 Interface amplifiers
2 Pulse amplifiers
1 Relay driver
References: NONE
-119-
Controls: NONE
- I
I o
r4
I
Fl la
.J
li
L.I
.:
.
I.- ,5I .
1i
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i
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-
INi
.
's
00 0
vJ
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0,
C)
2 I,
I
I.
- e.g L.
~1s I
5) O:-1
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JU: _ I 4
',
! h :
11 ., I
.- t :
e;i v.
of iI
r '
Ii P-
(- ~i, 0
0' 3-
1-
II.;si
N. .C
$:,
V:
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0
.7-
-
4..
I:0O'
0.
11 0 i7
0 z
1b
<: r- W f4i-0 .$ .
t-
,
.H
-121-
--- Diode Crest/trough mixer---
References: NONE
-122-
ED
A
i
, Crest output
I~~~~~~
i~ruhotu
p;._ I. 4I
Crest output
7~ ~~~O
.I
A.GT.B Comparator
~~~~~~~~~~~~~3 output
_ - z
X, _ e
w, _ >- .<.B
:
r. _
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C D ' ,_ _ ,. M.
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a=~
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r -
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tc ~ __ r
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C'lC
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F;,,T.ST,d C- 5
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RING COUNTER
DURATION
I.
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Figure ,
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rr. n , w n
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2
~'L ,~~ -128-
This circuit has not been altered substantially from its original
design, so I have included modified original schematics, rather than
composing new drawings, The circuit description is also included,
so I won't go into detail here.
This sequencer is similar to the pseudo-random unit described
earlier in that it is based around a ring counter. This unit contains
its own clock, and I have installed a resistor to make it voltage
controllable. (I have also installed a switch which enables more than
one stage to go high at a time - S4,)
This module uses CDA's (LM3900) to simulate digital flip-flops.
This can cause run-through problems in clocking. The earlier CMOS
design is vastly superior in these respects, and its pseudo-random
capability makes it more versatile, The two sequencers may be chained
together to generate programmable sequences up to 21 stages long.
i
I v
. \;
4RX -F
I
:J
r
k
'b4
Li
'P.
Ir
Ir
_1
0: - _
g~~~~~~~~~~~~~~~~~
-AX
- 2
r -w
- - - *P fis .L
Fs n-w -
\ l
'tv
\\ -131-
---Quad 4 channel mixer---
There are four of these circuits in this module. This dual amplifier
mixer is u sed widely throughout the synthesizer. Four inputs are
scaled by P2-P 5, and routed to eithe r A (non-in vert ), or A2 (invert).
P1 is a master control that sets the gain for al1 four channels.
All inputs are DC coupled,
References: NONE
I
-132-
.~~~~~~~~~~~~ .
I I
-f
I
io,
A>
S
V.
A4
Al.*
c~c --
Is t- Z
-134-
The DC and AC inputs (coupled via Cl) are mixed in unity gain
summer Al. The output of Al feeds the inputs of two CA3080
transconductance amplifiers, A2 and A6, which drive current-to-voltage
converters A3 and A7. The control input signals are mixed with the
bias set via P2 in A4. The output of A4 is fed to pin#5 of A2,
determining the left channel gain, This signal is inverted in A5
and fed to pin#5 of A6, determining the right channel gain. We now
have a situation where the gain of one channel is inversely proportion~
to the gain of the other. Thus we can "pan" an input back and forth
from right to left with a control voltage.
The right and left control voltages are buffered via Q and Q2,
and fed to the LED's, giving us a monitor on the gain of each channel.
References: NONE
-135-
.
.I
I Wave fed to control
I input of VCP
i
I
i
Wave fed to audio input
of VCP
29) AGC
Uses: This module will hold the level of an input constant sith
a variable response time. When it is fed back through
resonant amplifiers, it produces interesting bird-1 ike
chirp sounds. Uses the LM370 chip.
"I
1J ,
0 C '
W A~
3 aOS .4 0 xn Io
0%
I
0 s. l
t. .
o LL 1
4-
4
r - L C
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i
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41 ,
-"
O't.
Dani 0
qSl
u\
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t
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i
,,
ci
Il
I?
d4
r
-138-
--- AGC- - -
References:
. I
ffFi i
I
~??~?~?~~~~~~~~~~~ L~ ~ i~
....~
? i~~i i~ ~~?~ ~ ~ ~ ,~~ ~ Audio wave input to
the AGC
Outputs: Low Level (about 1-5 volts p-p) audio outputs, right and lefi
Monitor output (8 ohm speakers, right and left)
Stereo headphoned (driven by monitor)
I
I- -ss R\~I
I*r--
- , rc: b11
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Audio inputs 1-4 are scaled by P1-P4, and routed to the left (A3)
or right (A4) summer. Auxilary left channel inputs can be mixed in
through R17 and R18, while auxilary right channel inputs can be mixed
through R9 and R10, The master gains are controlled via P5 (right)
and P8 (left). The mix for each channel is fed into filter networks
centered around A2 and A4, These allow one to put high/low pass
filters into the input or feedback sections of the amplifiers
(determined by the potentiometers P6, P7, P9, PO10). Thus we have
seperate control over the "bass-treble" contour and frequency
characteristics of each channel.
The low-level output of these amplifiers may be tapped at the
phone jacks for driving external amplifiers, tape recorders, etc.
The line outputs are fed via S and P11 to the LM377 two watt stereo
amplifier. The gain of the 377 is set by the R31/R32 and R29/R30
feedback networks. The output of the 377 is isolated via C14 and
C15, and fed to optional 8 ohm speakers. R33 and R34 are protection
resistors which allow the 377 to also drive stereo headphones. The
377 is not a very good power amplifier, but it is ideal for an interna
monitor and headphone driver.
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