OPEN ENDED PROJECT

In Electronic Devices & Circuits LAB

on

JFET Amplifier

Submitted to

Amity School of Engineering and Technology

Guided By: Submitted By:

Mrs. Richa Sharma Sanket Jhunjhunwala A2324614001

 Ganesh A2324614002

Amandeep Singh A2324614003

Divyansh Patni A2324614004

Vaibhav Singh
A2324614006

B.Tech EEE (2014-18)

AMITY UNIVERSITY UTTAR PRADESH

GAUTAM BUDDHA NAGAR
TABLE OF CONTENTS
1 The problem
1 Scope
2 Technical review
2 Design Description
1 JFET Amplifier
2 Characteristics Curves
3 Apparatus Required
3 Evaluation
1 Overview
2 Prototyping and Testing
3 Observation
4 Result
4 Conclusion
5 References

1.1 Scope
Common Source JFET Amplifier
An

amplifier is a circuit that increases/decrease the input signal value and in this
experiment the signal to be amplified is the voltage. In this experiment you are going to
investigate frequency response characteristic of a voltage amplifier circuit using the N-
channel JFET device.
Most amplifiers have relatively constant gain over a certain range of frequencies. This
range of frequencies is called the bandwidth of the amplifier. The bandwidth for a given
amplifier depends on the circuit component values, the type of active components and
the dc operating point of the active component. When an amplifier is operated within its
bandwidth, the current gain (Ai ), voltage gain (Av) , and power gain Ap) values are
referred to as mid band gain values. A simplified frequency-response curve that
represents the relationship between amplifier gain and operating frequency is shown in
Figure 1.
1.1 Technical Review
As the frequency-response curve shows, the power gain of an amplifier remains
relatively constant across a band of frequencies. When the operating frequency starts to
go outside this frequency range, the gain begins to drop. Two frequencies of interest,
fc1 and fc2
, are the frequencies at which power gain decreases to approximately 50% of Ap (mid
) . The frequencies labeled fc1 and fc2 are called the lower and upper cutoff frequencies
of an amplifier, respectively. These frequencies are considered to be the bandwidth
limits for the amplifier and thus bandwidth BW is given by

BW = fc2 fc1 .

The geometric average of fc1 and fc2 is called the geometric center frequency foof an
amplifier, given by

f0 = sqrt(fc1 fc2) .

When the operating frequency is equal to f0, the power gain of the amplifier is at its
maximum value.
Frequency response curves and specification sheets often list gain values that are
measured in decibels (dB). The dB power gain of an amplifier is given by
Positive and negative decibels of equal magnitude represent reciprocal gains and
losses. A +3dB gain caused power to double while a 3dB.

Using the basic power relationships, the power gain may be rewritten as,

The voltage component of the equation is referred to as dB voltage gain. When the amplifier
input and out resistances are equal

Thus, when the voltage gain of an amplifier changes by 3dB, the power gain of the
amplifier also changes by 3dB.

2 Design Discription

2.1JFET Amplifier

50

The amplifier circuit consists of an N-channel JFET, but the device could also be an
equivalent N-channel depletion-mode MOSFET as the circuit diagram would be the
same just a change in the FET, connected in a common source configuration. The JFET
gate voltage Vg is biased through the potential divider network set up by
resistors R1 and R2 and is biased to operate within its saturation region which is
equivalent to the active region of the bipolar junction transistor.

Unlike a bipolar transistor circuit, the junction FET takes virtually no input gate current
allowing the gate to be treated as an open circuit. Then no input characteristics curves
are required. We can compare the JFET to the bipolar junction transistor (BJT) in the
following table.

2.2 Common Source JFET Amplifier Characteristics Curves

As with the common emitter bipolar circuit, the DC load line for the common source
JFET amplifier produces a straight line equation whose gradient is given as: -1/(Rd +
Rs) and that it crosses the vertical Id axis at point A equal to Vdd/(Rd + Rs). The other
end of the load line crosses the horizontal axis at point B which is equal to the supply
voltage, Vdd.

The actual position of the Q-point on the DC load line is generally positioned at the mid
center point of the load line (for class-A operation) and is determined by the mean value
of Vg which is biased negatively as the JFET is a depletion-mode device. Like the
bipolar common emitter amplifier the output of the Common Source JFET Amplifier is
180o out of phase with the input signal.
One of the main disadvantages of using Depletion-mode JFET is that they need to be
negatively biased. Should this bias fail for any reason the gate-source voltage may rise
and become positive causing an increase in drain current resulting in failure of the drain
voltage, Vd.

Also the high channel resistance, Rds(on) of the junction FET, coupled with high
quiescent steady state drain current makes these devices run hot so additional heatsink
is required.

2.3 Material required

Equipment required Components required
Power Supply N-channel JFET 2N5457
Oscilloscope Resistor 10kW (1/4W)
Digital Multimeter Resistor 3.3kW (1/4W)
Breadboard Resistor 3.9kW (1/4W)
Function Generator Resistor 22kW (1/4W)
Mylar Capacitor 0.47F
Mylar Capacitor 0.1F
Mylar Capacitor 0.01F
50W potentiometer

2. Evaluation

2.1 Overview
 Common source (CS) configuration is mostly used. The advantage of using CS
configuration is that it has very high input impedance.

Circuit diagram shows the FET amplifier of common source configuration. The biasing
input and couplings are shown in the figure. The mid range voltage gain of the amplifier
is given by A = gm(rd || RL)

At the mid-frequency range, there is n effect of input and output coupling capacitors.
Therefore, the voltage gain and phase angle are constant in this frequency range. The
amplifier shown in the circuit diagram has only two RC networks that influence its low-
frequency response. One network is formed by the output coupling capacitors and the
output impedance looking at the drain. Just as in the case of BJT amplifier, the
reactance of the input coupling capacitor, reactance increases as the frequency
decreases. The phase angle also changes with change in frequency.

As the frequency is increased beyond mid-frequency range the internal transistor

capacitance effect is predominant. For JFETs is the internal capacitance between gate
and source. This is also called input capacitance, . The other internal capacitance,
which effects the performance is acts as a feedback circuit, which couples both, input
and output. The effect of both these capacitances is that it reduced the gain appreciably
as in the case of BJT.

2.2 Prototype and Testing

2.3 Observation

Table E1: Measured resistance values

R1 R2 Rg Rs Rl

Table E2: Measure VL(pp) and Vin(pp), and calculated AV

S no. Frequency Input Output

5
6

10

11

12

13

14

15

16

17

18

19

20
2.4 Result
2 Conclusion

Bandwidth is the range of frequencies that a circuit operates at in between its upper and
lower cut-off frequency points. These cut-off or corner frequency points indicate the
frequencies at which the power associated with the output falls to half its maximum
value.

4 Refrences