Ipad Air Schematic

Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation

8 7 6 5 4 3 Copyright(C)22006-2009 Foxit Corporation
1
ISP1_I2C FRONT CAMERA

GRAPE MIPI1C
SPI2
ISP0_I2C REAR CAMERA
CUMULUS CUMULUS MIPI0C
D D
HSIC1 MIMO
UART1 WIFI/BT ANT
WIFI/BT
UART2
LPDDR3 I2S4 BT_I2S WIFI/BT ANT
SIO_UART0 CSA 58
ALCATRAZ NOT ON
DISPLAY/
CSA 14
SIO_UART1 CELLULAR/ WIFI-ONLY CONFIG
TOUCH PANEL HSIC2 HSIC1
GPS
EDP PRIMARY CELLULAR ANT
IPC DIVERSITY CELLULAR ANT
I2S0 JTAG
UART3 USART GPS ANT
C USB
C
SIM CARD
CSA 31-46
BACKLIGHT
UART5
BUTTON FLEX PMU BATTERY

ANYA TRISTAR
CSA 75 USB2.0
HOME BUTTON DWI UART0
I2C0 UART6
CSA 81-84
I2C2
OSCAR
B UART4 CSA 60 B
HALL EFF 1 HALL EFF 2 I2C1 I2S2 NC
CSA 24 AMP
CSA 25 HB FLEX CSA 20 RIGHT
I2C3 AMP SPEAKER
SPI BUS
CSA 20
MBUS IO FLEX
NC SPI1 SPI3 SPI
COMPASS I2S0 AOUT2
ACCELEROMETER GYRO ASP AMP
FMI0 FMI1 I2S1 XSP AOUT1 CSA 19
LEFT
CSA 29 CSA 24 CSA 24 SPEAKER
AMP
L81 CSA 19 IO FLEX
AUDIO
A CODEC
NAND FLASH HP
PROX SENSOR CSA 17
CAM
ALS
CSA 56
CSA 16 MIC1 MIC2
8 7 6 5 4 3 2 1
1
D D
PLACE_NEAR=U0600.R18:10MM
R0600
0.00 2
62 =PP1V8_PLL_SOC 1 67 PP1V8_PLL_SOC_F =PP1V0_USB_SOC 62
1 0% 1 1
C0600 1/32W
MF
C0601 C0605 1 C0606 1 C0607 1 C0632 1 C0630 1 C0631
0.22UF 01005 0.22UF 0.01UF 0.01UF 8.2PF 8.2PF 0.01UF 0.22UF
20% 20% 10% 10% +/-0.5PF +/-0.5PF 10% 20%
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
6.3V
2 X5R
16V
2 NP0-C0G-CERM 2 16V 6.3V 2 6.3V
01005 01005 01005 01005 01005 NP0-C0G-CERM 2 X5R X5R
01005 01005 01005
=PP3V3_USB_SOC 62
62 =PP1V2_HSIC_SOC
1 1 C0611 1 C0612 1 C0615 1 C0620 1 C0641 1 C0640 1 C0645
C0610 0.22UF 0.22UF 0.01UF 8.2PF 8.2PF 0.01UF 0.22UF
0.22UF 20% 20% 10% +/-0.5PF +/-0.5PF 10% 20%
20% 6.3V 6.3V
2 6.3V 2 X5R 2 X5R 2 6.3V
X5R 2 16V
NP0-C0G-CERM
16V
2 NP0-C0G-CERM2 X5R
6.3V 2 6.3V
X5R
X5R 01005 01005 01005 01005 01005 01005 01005
0201
HSIC_VDD122 AJ30
1MA VDD_ANA_PLL_CCC AD22

HSIC_VDD121 F24
HSIC_VDD120 F23
VDD_ANA_PLL R18
5.4MA USB_DVDD F25

25MA USB_VDD330 E25
C C
6X1MA
3X13MA
64 61 46 HSIC1_WLAN_DATA A27 HSIC1_DATA OMIT_TABLE WDOG AC3 WDOG_SOC 13 67

BI OUT
64 61 46 BI HSIC1_WLAN_STB B27 HSIC1_STB U0600
ALCATRAZ XI0 A30 65 XTAL_SOC_24M_I
64 61 28 25 HSIC2_BB_DATA AJ35 HSIC2_DATA DISCRETE XO0 B30 65 XTAL_SOC_24M_O
BI 1
HSIC2_BB_STB AJ36 HSIC2_STB FBGA R0640
64 61 28 25 BI
(1 OF 14) 1.00M CRITICAL
A26 HSIC0_DATA
1%
1/32W Y0600
64 NC_HSIC0_DATA NO_TEST=TRUE MF R0641 1.60X1.20MM-SM
62 58 13 7 5 =PP1V8_SOC B26 HSIC0_STB ANALOGMUXOUT E26 TP_ANALOGMUXOUT 61
2 01005 24.000MHZ-30PPM-9.5PF-60OHM
64 NC_HSIC0_STB NO_TEST=TRUE 1.33K2
1 65 SOC_24M_O 1 3
1 1 1 USB_DP B29 USB_SOC_P BI 47 60 64
R0610 R0611 R0612 1% CRITICAL CRITICAL
60 13 IN JTAG_SOC_SEL E27 JTAG_SEL USB_DM A29 USB_SOC_N BI 47 60 64 1/32W 2 4
100K 100K 100K MF 1 C0650 1 C0651
5% 5% 5% 64 NC_JTAG_SOC_TRTCK NO_TEST=TRUED26 JTAG_TRTCK 01005
12PF 12PF
1/32W 1/32W 1/32W C29 5% 5%
MF MF MF 64 60 13 JTAG_SOC_TRST_L JTAG_TRST* USB_ANALOGTEST E23 NC_USB_ANALOGTEST
2 01005 2 01005 2 01005
IN
C28 NO_TEST=TRUE R0650 2 16V
CERM 2 16V
CERM
64 60 TP_JTAG_SOC_TDO JTAG_TDO 01005 01005
C27 JTAG_TDI
68.1K2
64 60 JTAG_SOC_TDI USB_VBUS D23 67 USB_VBUS_DETECT_R 1 USB_VBUS_DETECT IN 55 67
64 60 47 OUT JTAG_SOC_TMS D27 JTAG_TMS 1%

1/32W
64 60 47 JTAG_SOC_TCK D28 JTAG_TCK USB_ID D24 NC_USB_ID 63 MF
OUT 01005
NO_TEST=TRUE
60 13 SOC_TESTMODE AC2 TESTMODE

IN
USB_REXT E24 USB_REXT0
G17 FUSE1_FSRC PLACE_NEAR=U0600.E24:5MM
B 1
R0660
200 NOTE: NEW VALUE FOR H6 IS 200 OHM B
DISP_VSYNC AR11 DISPLAY_SYNC
TP0600
1 SOC_TST_CLKOUT AC1 TST_CLKOUT
OUT 52 60 61
1%
1/32W
TP MF
TP-P55 2 01005
13 OUT SOC_FAST_SCAN_CLK AC4 FAST_SCAN_CLK
13 SOC_HOLD_RESET D29 HOLD_RESET

IN
G24 HSIC_VSS121
AJ31 HSIC_VSS122
G23 HSIC_VSS120
67 61 60 57 47 25 13 RESET_SOC_L D30 RESET*
G25 USB_VSSA0
IN
PULLUP ON CSA 15 E28 CFSB
1 C0660 AN23 DDR0_CKEIN
0.01UF R33 DDR1_CKEIN
10%
2 10V
X5R-CERM
0201
CKEIN IS 1.2V, 1.8V TOL
8 7 6 5 4 3
1
I2S0 AND I2S2 ARE OPTIMIZED FOR LOW MCK JITTER

R0700
33.2
1%
1/32W OMIT_TABLE OMIT_TABLE
MF
01005 TO: GPIO_BTN_HOME_L AB6 GPIO0 U0600
64 15 OUT I2S0_CODEC_ASP_MCK_R 1 2 64 I2S0_CODEC_ASP_MCK F28 I2S0_MCK U0600 I2C0_SCL AN6 I2C0_SCL_1V8 OUT 5 57 60 64
60 57 50 5 IN
64 15 OUT I2S0_CODEC_ASP_BCLK AJ32 I2S0_BCLK ALCATRAZ I2C0_SDA AP4 I2C0_SDA_1V8 BI 5 57 60 64
ANYA PMU 0111100X 57 21 5 IN GPIO_BTN_ONOFF_L AD1 GPIO1 ALCATRAZ
L81 CODEC ASP AH32 DISCRETE GPIO_BTN_VOL_DOWN_L AB5 GPIO2 DISCRETE
64 15 OUT I2S0_CODEC_ASP_LRCK I2S0_LRCK 21 IN
FBGA
1.8V AG32 FBGA TO: GPIO_BTN_VOL_UP_L AC5 GPIO3
64 15 I2S0_CODEC_ASP_DIN I2S0_DIN I2C1_SCL AP5 I2C1_SOC2OSCAR_SWDCLK_1V8 5 19 64
21 IN
D 64 15
IN
OUT I2S0_CODEC_ASP_DOUT AJ33 I2S0_DOUT
(3 OF 14)
I2C1_SDA AR3 I2C1_SOC2OSCAR_SWDIO_1V8
OUT
BI 5 19 64
OSCAR SWD
NOTE: I2C1 IS ASSUMED TO USE
PUSH-PULL INSTEAD OF OPEN-DRAIN
22
61 46
IN GPIO_CAM_ALS2SOC_IRQ_L
GPIO_BT_WAKE
AC6
AD3
GPIO4
GPIO5
(2 OF 14)
TMR32_PWM0 AD35 OSCAR_TIME_SYNC_HOST_INT 19

D
OUT IN
AG33 TO: GPIO_SOC2BB_WAKE_MODEM AD4 GPIO6 TMR32_PWM1 AC34 NC_TMR32_PWM1 NO_TEST=TRUE
64 NC_I2S1_MCK NO_TEST=TRUE I2S1_MCK I2C2_SCL AR14 I2C2_SCL_1V8 OUT 5 47 64
29 OUT
AH34 TRISTAR 0011010X NC_GPIO7 NO_TEST=TRUE AE1 GPIO7 TMR32_PWM2 AD36 CLK_32K_SOC2CUMULUS
64 15 OUT I2S1_CODEC_XSP_BCLK I2S1_BCLK I2C2_SDA AT7 I2C2_SDA_1V8 BI 5 47 64 OUT 52 60 61 64
L81 CODEC XSP AH33 GPIO_SOC2BB_RST_L AE2 GPIO8
64 15 OUT I2S1_CODEC_XSP_LRCK I2S1_LRCK TO:
67 60 27 25 OUT
1.8V AG34 I2C3_SCL AA35 I2C3_SCL_1V8 OUT 5 13 22 61 64 GPIO_SOC2BB_RADIO_ON_L AD5 GPIO9 UART0_RXD AR17 UART0_SOC_RXD
64 15 IN I2S1_CODEC_XSP_DIN I2S1_DIN AD7149 PROX 0101101X
60 27 25 5 OUT IN 47 60 64
SOC DEBUG
AF32 I2C3_SDA AA36 I2C3_SDA_1V8 BI 5 13 22 61 64
FF CAM CT817 ALS 0111001X 67 29 25 IN GPIO_BB2SOC_RESET_DET_L AF1 GPIO10 UART0_TXD AP17 UART0_SOC_TXD 1.8V
64 15 OUT I2S1_CODEC_XSP_DOUT I2S1_DOUT OUT 47 60 64
NC_GPIO11 NO_TEST=TRUE AF2 GPIO11

DWI_CLK AT17 DWI_AP_CLK OUT 57 64
NC_I2S2_MCK F26 I2S2_MCK DWI_DI AT16 SOC_TST_CPUSWITCH_OUT TP0700

1 19 OUT GPIO_SOC2OSCAR_DBGEN AE4 GPIO12 UART1_CTSN AH4 UART1_BT2SOC_RTS_L IN 46 64
64 NO_TEST=TRUE A GPIO_SOC2GRAPE_RESET_L AF3 AH2 UART1_SOC2BT_RTS_L
64 NC_I2S2_BCLK NO_TEST=TRUE AG35 I2S2_BCLK DWI_DO AR16 DWI_AP_DO 57 64 TP-P55 67 61 60 52 OUT GPIO13 UART1_RTSN OUT 46 64
OUT TO BT UART
UNUSED NC_I2S2_LRCK AE32 NC_GPIO14 NO_TEST=TRUE AE5 GPIO14 UART1_RXD AG6 UART1_BT2SOC_TX IN 46 64
64 NO_TEST=TRUE I2S2_LRCK AL1 BCM4330
1.8V SEP_7816UART0_RST NC_SEP_7816UART0_RST NO_TEST=TRUE GPIO_BB2SOC_GSM_TXBURST AE6 GPIO15 UART1_TXD AG5 UART1_SOC2BT_TX
64 NC_I2S2_DIN NO_TEST=TRUE AE33 I2S2_DIN 29 IN OUT 46 64
SEP_7816UART0_SCL AK5 SEP_I2C0_SCL OUT 5 64 GPIO_BOARD_ID_3 AG1
64 NC_I2S2_DOUT NO_TEST=TRUE AF34 I2S2_DOUT 13 IN GPIO16
SEP_7816UART0_SDA AK3 SEP_I2C0_SDA GPIO_TS2SOC2PMU_INT AF4 AJ3
BI 5 64
57 47 IN GPIO17 UART2_CTSN NC_GPIO_UART2_CTSN NO_TEST=TRUE
SEP_7816UART1_RST AM1 NC_SEP_7816UART1_RST NO_TEST=TRUE GPIO_BOOT_CONFIG_0 AG3 AH5 NC_GPIO_UART2_RTSN NO_TEST=TRUE

64 61 28 25 BB_JTAG_TRST_L AD32 I2S3_MCK 13 IN GPIO18 UART2_RTSN
OUT AL4 NC_SEP_7816UART1_SCL
AF36 SEP_7816UART1_SCL NO_TEST=TRUE GPIO_BB2SOC_GPS_SYNC AF5 GPIO19 UART2_RXD AJ2 UART2_WLAN2SOC_TX
64 61 28 25 OUT BB_JTAG_TDI I2S3_BCLK 29 IN IN 46 64
WIFI DEBUG
SEP_7816UART1_SDA AL2 NC_SEP_7816UART1_SDA NO_TEST=TRUE GPIO_PROX2SOC_IRQ_L AH1 AJ1 UART2_SOC2WLAN_TX
64 61 28 25 BB_JTAG_TDO AG36 I2S3_LRCK 13 IN GPIO20 UART2_TXD OUT 46 64
IN
BB_JTAG_TCK AC32 Y32 GPIO_SOC2LCD_PWREN AG4 GPIO21
64 61 28 25 OUT I2S3_DIN SIO_7816UART0_RST HSIC1_WLAN2SOC_REMOTE_WAKE IN 46 61 64
53 OUT
BB_JTAG_TMS AD33 AB33 HSIC1_WLAN2SOC_DEVICE_RDY 57 5 OUT GPIO_SOC2PMU_KEEPACT AR10 GPIO22 UART3_CTSN AK1 UART3_BB2SOC_RTS_L IN 25 29 64
64 61 28 25 OUT I2S3_DOUT SIO_7816UART0_SCL IN 46 61 64
AA32 GPIO_PMU2SOC_IRQ_L AN14 GPIO23 UART3_RTSN AJ6 UART3_SOC2BB_RTS_L TO BB UART
SIO_7816UART0_SDA HSIC1_SOC2WLAN_HOST_RDY OUT 5 46 64
57 IN OUT 25 29 64
MDM9600
NC_I2S4_MCK AD34 AA34 HSIC2_BB2SOC_REMOTE_WAKE 15 IN GPIO_CODEC2SOC_IRQ_L AR9 GPIO24 UART3_RXD AJ5 UART3_BB2SOC_TX IN 25 29 47 64
64 NO_TEST=TRUE I2S4_MCK SIO_7816UART1_RST IN 29 64
I2S4_SOC2BT_BCLK AE36 AC36 HSIC2_BB2SOC_DEVICE_RDY 13 IN GPIO_BOOT_CONFIG_1 AP13 GPIO25 UART3_TXD AJ4 UART3_SOC2BB_TX OUT 25 29 47 64
64 46 OUT I2S4_BCLK SIO_7816UART1_SCL IN 25 29 64
I2S4_SOC2BT_LRCK AE35 AA33 HSIC2_SOC2BB_HOST_RDY 60 59 5 IN GPIO_FORCE_DFU AT14 GPIO26

BT 64 46 OUT I2S4_LRCK SIO_7816UART1_SDA OUT 25 29 64
1.8V I2S4_BT2SOC_DATA AB32 61 TP_GPIO_DFU_STATUS AT8 GPIO27 UART4_CTSN AM3 PMU_GPIO_OSCAR2PMU_HOST_WAKE IN 19 57
64 46 IN I2S4_DIN
AC33 SOCHOT0 AM20 SOCHOT0_L 5 58 GPIO_BOOT_CONFIG_2 AM17 GPIO28 UART4_RTSN AM2 GPIO_OSCAR_RESET_L
64 46 OUT I2S4_SOC2BT_DATA I2S4_DOUT 13 IN OUT 19 60 67
TO OSCAR
SOCHOT1 AM19 SOCHOT1_L OUT 5 57
13 GPIO_BOOT_CONFIG_3 AT9 GPIO29 UART4_RXD AL5 UART4_OSCAR2SOC_RXD 19 64
IN IN
GPIO_BTN_SRL_L AP14 GPIO30 UART4_TXD AL6 UART4_SOC2OSCAR_TXD
C
57 21 5
61 60 52
IN
IN GPIO_GRAPE2SOC_IRQ_L AN16 GPIO31
OUT 19 64
C
GPIO_BOARD_ID_2 AN4 NC_GPIO32 NO_TEST=TRUE AT11 GPIO32 UART5_RTXD AK4 UART5_BATT_TRXD OUT 54 57 64
13 IN SPI0_MISO
GPIO_BOARD_ID_1 AP2 16 OUT GPIO_HS3_SHUNT_EN AT10 GPIO33
13 IN SPI0_MOSI
GPIO_BOARD_ID_0 AN3 16 OUT GPIO_HS4_SHUNT_EN AP11 GPIO34
13 IN SPI0_SCLK
NC_SPI0_SSIN NO_TEST=TRUE AM9 13 IN GPIO_BRD_REV3 AN17 GPIO35
SPI0_SSIN
13 IN GPIO_BRD_REV2 AR13 GPIO36
NC_SPI1_MISO NO_TEST=TRUE AN1 13 IN GPIO_BRD_REV1 AP16 GPIO37 UART6_RXD AB36 UART6_TS_ACC_RXD IN 47 64 ACCESSORY
SPI1_MISO
NC_SPI1_MOSI NO_TEST=TRUE AM4 13 IN GPIO_BRD_REV0 AT13 GPIO38 UART6_TXD AB35 UART6_TS_ACC_TXD OUT 47 64 UART 1.8V
SPI1_MOSI
NC_SPI1_SCLK NO_TEST=TRUE AM5 SPI1_SCLK
NC_SPI1_SSIN NO_TEST=TRUE AM7 SPI1_SSIN
64 61 60 52 SPI2_GRAPE_MISO AN8 SPI2_MISO

IN
64 61 60 52 OUT SPI2_GRAPE_MOSI AN7 SPI2_MOSI
64 61 60 52 OUT SPI2_GRAPE_SCLK AN5 SPI2_SCLK
64 61 60 52 OUT SPI2_GRAPE_CS_L AN9 SPI2_SSIN
64 15 SPI3_CODEC_MISO AN13 SPI3_MISO

IN
64 15 SPI3_CODEC_MOSI AT6 SPI3_MOSI
OUT
64 15 OUT SPI3_CODEC_SCLK AR7 SPI3_SCLK
64 15 OUT SPI3_CODEC_CS_L AP10 SPI3_SSIN
SEP EEPROM I2C PULL-UPS

BUTTON PULLUPS =PP1V8_S2R_MISC =PP1V8_SOC
5 59 62
UNPROGRAMMED P/N: 335S0894 62 58 13 7 5 4
B 62 =PP1V8_ALWAYS =PP1V8_SOC 4 5 7 13 58 62
NOSTUFF NOSTUFF B
1
62 59 5 =PP1V8_S2R_MISC R0750 1R0751 1R0752 1R0753 1
R0754 1
R0755 1
R0756 1
R0757 1
R0758 1
R0759
2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K
=PP1V8_EEPROM 62 5% 5% 5% 5% 5% 5% 5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W
NOSTUFF MF MF MF MF MF MF MF MF MF MF
1 1 1 1 2 01005 2 01005 01005 01005 2 01005 2 01005 2 01005 2 01005 2 01005 2 01005
R0722 R0720 R0723 R0721 1
R0760 1
R0761
1 C9000 2 2
100K 100K 100K 100K 0.22UF
100K 100K
A1
5% 5% 5% 5% 20%
1/32W 1/32W 1/32W 1/32W 5% 5% 6.3V
2 X5R 64 60 57 5 I2C0_SDA_1V8
MF MF MF MF 1/32W 1/32W
2 01005 2 01005 2 01005 2 01005 MF MF VCC 01005 64 60 57 5 I2C0_SCL_1V8
2 01005 2 01005 CRITICAL
U9000 64 61 22 13 5 I2C3_SDA_1V8
CAT24C08C4A I2C3_SCL_1V8
57 21 5 GPIO_BTN_SRL_L WLCSP 64 61 22 13 5
SOCHOT1_L SEP_I2C0_SCL B1 SCL SDA B2 SEP_I2C0_SDA
5 GPIO_BTN_HOME_L
57 5 64 5 5 64
60 57 50
57 21 5 GPIO_BTN_ONOFF_L 58 5 SOCHOT0_L 64 47 5 I2C2_SDA_1V8
64 47 5 I2C2_SCL_1V8
VSS 64 5 SEP_I2C0_SDA
SEP_I2C0_SCL
A2
64 5
64 19 5 I2C1_SOC2OSCAR_SWDCLK_1V8
GPIO_SOC2PMU_KEEPACT 5 57
GPIO_FORCE_DFU 5 59 60
64 19 5 I2C1_SOC2OSCAR_SWDIO_1V8
GPIO_SOC2BB_RADIO_ON_L 5 25 27 60
HSIC1_SOC2WLAN_HOST_RDY 5 46 64
NOSTUFF
1 1 1 1
R0730 R0731 R0733 R0734
A 5%
100K 100K
5%
100K
5%
100K
5%
1/32W 1/20W 1/32W 1/32W
MF MF MF MF
2 01005 2 201 2 01005 2 01005
8 7 6 5 4 3 2 1
1
D D
62 6 =PP1V8_NAND_SOC
1 1
R0800 R0801
100K 100K
5% 5%
1/32W 1/32W
MF MF
2 01005 2 01005
OMIT_TABLE
66 61 60 14 OUT FMI0_CE0_L E34 PPN0_CEN0 U0600 PPN1_CEN0 J36 FMI1_CE0_L OUT 14 61 66
NC_FMI0_CE1_L NO_TEST=TRUE C35 PPN0_CEN1 ALCATRAZ PPN1_CEN1 J34 NO_TEST=TRUE NC_FMI1_CE1_L

DISCRETE
FBGA
(4 OF 14)
C C
66 61 14 BI FMI0_AD<0> A32 PPN0_IO0 PPN1_IO0 H34 FMI1_AD<0> BI 14 61 66
66 61 14 BI FMI0_AD<1> A33 PPN0_IO1 PPN1_IO1 G35 FMI1_AD<1> BI 14 66
66 61 14 BI FMI0_AD<2> B33 PPN0_IO2 PPN1_IO2 G34 FMI1_AD<2> BI 14 66
66 61 14 BI FMI0_AD<3> E32 PPN0_IO3 PPN1_IO3 J32 FMI1_AD<3> BI 14 66
66 61 14 BI FMI0_AD<4> C32 PPN0_IO4 PPN1_IO4 G33 FMI1_AD<4> BI 14 66
66 61 14 FMI0_AD<5> E33 PPN0_IO5 PPN1_IO5 E36 FMI1_AD<5> 14 66

BI BI
66 61 14 BI FMI0_AD<6> D34 PPN0_IO6 PPN1_IO6 E35 FMI1_AD<6> BI 14 66
66 61 14 BI FMI0_AD<7> D36 PPN0_IO7 PPN1_IO7 G32 FMI1_AD<7> BI 14 66
66 61 14 FMI0_ALE C31 PPN0_ALE PPN1_ALE H36 FMI1_ALE 14 61 66

OUT OUT
66 61 14 FMI0_CLE B31 PPN0_CLE PPN1_CLE J35 FMI1_CLE 14 61 66
OUT OUT
66 61 14 FMI0_WE_L A31 PPN0_WEN PPN1_WEN J33 FMI1_WE_L 14 61 66
OUT OUT
66 61 14 OUT FMI0_RE_L C34 PPN0_REN PPN1_REN G36 FMI1_RE_L OUT 14 61 66
66 61 14 BI FMI0_DQS B34 PPN0_DQS PPN1_DQS F36 FMI1_DQS BI 14 61 66
FMI0_ZQ C33 PPN0_ZQ PPN1_ZQ F34 FMI1_ZQ
1
1
R0840 R0841
240 240
1% 1%
1/32W 1/32W
MF E31 PPN0_VREF PPN1_VREF H32 66 61 PPVREF_FMI_SOC MF
2 01005 2 01005
B =PP1V8_NAND_SOC 6 62
B
1 1
R0830 C0830
51.1K 0.01UF
1% 10%
1/32W
MF 2 6.3V
X5R
2 01005 01005
1 1 C0831
R0831
51.1K 0.01UF
1% 10%
1/32W 2 6.3V
X5R
MF 01005
2 01005
8 7 6 5 4 3
1
D D
=PP1V8_MIPI_SOC 62
=PP1V0_MIPI_SOC
R0940
62
1 C0915 0
62 =PP1V8_EDP_SOC 1 2 67 PP1V8_EDP_AVDD_AUX
1.0UF 5%
1 C0900 1 C0905 1 C0906 1 C0910 20% 1 1 1 1 1 1
1.0UF 0.22UF 0.22UF 8.2PF 2 6.3V
X5R
C0940 1/20W
MF
C0946 C0941 C0950 C0951 C0952
20% 20% 20% +/-0.5PF 0201-1 56PF 201 8.2PF 56PF 0.22UF 1.0UF 1.0UF
5% +/-0.5PF 5% 20% 20% 20%
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 16V
NP0-C0G-CERM 16V 16V 16V 6.3V 6.3V 2 6.3V
0201-1 01005 01005 01005 NP0-C0G 2 2 NP0-C0G-CERM 2 NP0-C0G 2 X5R 2 X5R X5R
01005 01005 01005 01005 0201-1 0201-1
TP_PP0V4_MIPI0D 67
TP_PP0V4_MIPI1D 67
62 =PP1V0_EDP_PAD_DVDD_SOC
AL26
AL27
AL28
AL29
AL30
MIPI0D_VDD18 AN26
MIPI1D_VDD18 AM31
MIPI0D_VREG_0P4V AN27
MIPI1D_VREG_0P4V AN28
1 C0955 1 C0945
1.0UF 8.2PF
20% +/-0.5PF
DP_PAD_DVDD F18
DP_PAD_AVDDX F19
DP_PAD_AVDDP0 G20
DP_PAD_AVDD1 F20
DP_PAD_AVDD0 G21
DP_PAD_AVDD_AUX G19
DP_PAD_AVDD3 F22
DP_PAD_AVDD2 F21
MIPI_VDD10 2 6.3V 2 16V
(2X2MA)
X5R NP0-C0G-CERM
(55MA) =PP1V8_SOC 4 5 13 58 62 0201-1 01005
1
R0900 1R0901 1R0902 1R0903
2.2K 2.2K 2.2K 2.2K
(10MA)
BB_IPC_GPIO AN11 SENSOR0_ISTRB
(14MA)
29 BI 5% 5% 5% 5%
(14MA)
AR6 SENSOR0_XSHUTDOWN 1/32W 1/32W 1/32W 1/32W
NC_SENSOR0_XSHUTDOWN OMIT_TABLE MF MF MF MF
NO_TEST=TRUE
2 01005 2 01005 2 01005 2 01005
(1MA)
NC_SENSOR1_ISTRB AP9 SENSOR1_ISTRB U0600
NO_TEST=TRUE
AUD_SPKRAMP_MUTE_L AM11 SENSOR1_XSHUTDOWN
C
(50MA)
(50MA)
(50MA)
(50MA)
C 18 17 OUT ALCATRAZ
DISCRETE
FBGA
U0600
65 61 23 IN MIPI0C_CAM_REAR_DATA_P<0> AR33 MIPI0C_DPDATA0 ISP0_SCL AP7 ISP0_CAM_REAR_SCL OUT 23 64
ALCATRAZ
AT33 MIPI0C_DNDATA0 (5 OF 14) DISCRETE
65 61 23 IN MIPI0C_CAM_REAR_DATA_N<0> ISP0_SDA AM10 ISP0_CAM_REAR_SDA BI 23 64
FBGA
(6 OF 14)
65 61 23 MIPI0C_CAM_REAR_DATA_P<1> AR32 MIPI0C_DPDATA1
IN
65 61 23 IN MIPI0C_CAM_REAR_DATA_N<1> AT32 MIPI0C_DNDATA1 TP_EDP_PAD_DC_TP D19 DP_PAD_DC_TP OMIT_TABLE
ISP1_SCL AR4 ISP1_CAM_FRONT_SCL OUT 22 64
65 NC_MIPI0C_CAM_REAR_DATA_P<2> AR30 MIPI0C_DPDATA2 ISP1_SDA AN10 ISP1_CAM_FRONT_SDA 22 64

AP_EDP_R_BIAS E19 DP_PAD_R_BIAS
BI
NO_TEST=TRUE
65 NC_MIPI0C_CAM_REAR_DATA_N<2> AT30 MIPI0C_DNDATA2 NOSTUFF EDP_HPD E29 EDP_HPD 53 65
1 IN
NO_TEST=TRUE
AT4 ISP0_CAM_REAR_CLK_R 22 1 R0960
SENSOR0_CLK
64 1 2 ISP0_CAM_REAR_CLK OUT 23 64 C0960 4.99K
65 NC_MIPI0C_CAM_REAR_DATA_P<3> AR29 MIPI0C_DPDATA3 SENSOR0_RST AP8 01005 R0910 ISP0_CAM_REAR_SHUTDOWN_L OUT 23 67
0.01UF
10% 1%
NO_TEST=TRUE 1/32W
65 NC_MIPI0C_CAM_REAR_DATA_N<3> AT29 MIPI0C_DNDATA3 2 6.3V
X5R MF
NO_TEST=TRUE
AT5 ISP1_CAM_FRONT_CLK_R
22 01005 2 01005
SENSOR1_CLK
64 1 2 ISP1_CAM_FRONT_CLK OUT 22 64
PLACE_NEAR=U0600.E19:3MM DP_PAD_AUXP B20 EDP_AUX_P BI 53 65
65 61 23 IN MIPI0C_CAM_REAR_CLK_P AR31 MIPI0C_DPCLK SENSOR1_RST AM13 01005 R0911 ISP1_CAM_FRONT_SHUTDOWN_L OUT 22 67 DP_PAD_AUXN A20 EDP_AUX_N BI 53 65
65 61 23 IN MIPI0C_CAM_REAR_CLK_N AT31 MIPI0C_DNCLK
65 NC_MIPI0D_DPDATA0 AN33 MIPI0D_DPDATA0 DP_PAD_TX0P B21 EDP_DATA_P<0> 53 61 65

OUT
NO_TEST=TRUE
65 NC_MIPI0D_DNDATA0 AP33 MIPI0D_DNDATA0 DP_PAD_TX0N A21 EDP_DATA_N<0> 53 61 65
OUT
NO_TEST=TRUE
65 NC_MIPI0D_DPDATA1 AN32 MIPI0D_DPDATA1 DP_PAD_TX1P B22 EDP_DATA_P<1> OUT 53 61 65

NO_TEST=TRUE
65 NC_MIPI0D_DNDATA1 AP32 MIPI0D_DNDATA1 DP_PAD_TX1N A22 EDP_DATA_N<1> OUT 53 61 65
NO_TEST=TRUE
DP_PAD_TX2P B23 EDP_DATA_P<2>
G18 DP_PAD_AVSS_AUX
OUT 53 61 65
65 NC_MIPI0D_DPDATA2 AN30 MIPI0D_DPDATA2
DP_PAD_TX2N A23
D20 DP_PAD_AVSSP0
NO_TEST=TRUE EDP_DATA_N<2> OUT 53 61 65
E21 DP_PAD_AVSS2
E22 DP_PAD_AVSS3
H18 DP_PAD_AVSSX
D21 DP_PAD_AVSS1
E20 DP_PAD_AVSS0
65 NC_MIPI0D_DNDATA2 AP30 MIPI0D_DNDATA2
F17 DP_PAD_DVSS
NO_TEST=TRUE
MIPI1C_DPDATA0 AN35 MIPI1C_CAM_FRONT_DATA_P<0> IN 22 61 65
AN29 MIPI0D_DPDATA3 DP_PAD_TX3P B24 EDP_DATA_P<3> OUT 53 61 65
65 NC_MIPI0D_DPDATA3 MIPI1C_DNDATA0 AN36 MIPI1C_CAM_FRONT_DATA_N<0> 22 61 65
B 65 NC_MIPI0D_DNDATA3
NO_TEST=TRUE
NO_TEST=TRUE
AP29 MIPI0D_DNDATA3
IN
DP_PAD_TX3N A24 EDP_DATA_N<3> OUT 53 61 65
B
MIPI1C_DPDATA1 AL35 NC_MIPI1C_CAM_FRONT_DATA_P<1> 65
NO_TEST=TRUE
65 NC_MIPI0D_DPCLK AN31 MIPI0D_DPCLK MIPI1C_DNDATA1 AL36 NC_MIPI1C_CAM_FRONT_DATA_N<1> 65
NO_TEST=TRUE NO_TEST=TRUE
65 NC_MIPI0D_DNCLK AP31 MIPI0D_DNCLK
NO_TEST=TRUE
MIPI1C_DPCLK AM35 MIPI1C_CAM_FRONT_CLK_P IN 22 61 65
MIPI1C_DNCLK AM36 MIPI1C_CAM_FRONT_CLK_N IN 22 61 65
MIPI_VSS
AM26
AM27
AM28
AM29
AM30
8 7 6 5 4 3
1
OMIT_TABLE
U0600
ALCATRAZ
DISCRETE
FBGA
D 66 61 12 OUT DDR0_CA<0> AP27
AR27
DDR0_CA0
(14 OF 14)
DDR1_CA0 L34
L35
DDR1_CA<0> OUT 12 61 66 D
66 61 12 OUT DDR0_CA<1> DDR0_CA1 DDR1_CA1 DDR1_CA<1> OUT 12 61 66
66 61 12 OUT DDR0_CA<2> AT27 DDR0_CA2 DDR1_CA2 L36 DDR1_CA<2> OUT 12 61 66
66 61 12 OUT DDR0_CA<3> AR26 DDR0_CA3 DDR1_CA3 M35 DDR1_CA<3> OUT 12 61 66
66 61 12 DDR0_CA<4> AT26 DDR0_CA4 DDR1_CA4 M36 DDR1_CA<4> 12 61 66

OUT OUT
66 61 12 OUT DDR0_CA<5> AR20 DDR0_CA5 DDR1_CA5 V35 DDR1_CA<5> OUT 12 61 66
66 61 12 OUT DDR0_CA<6> AT20 DDR0_CA6 DDR1_CA6 V36 DDR1_CA<6> OUT 12 61 66
66 61 12 OUT DDR0_CA<7> AT19 DDR0_CA7 DDR1_CA7 W36 DDR1_CA<7> OUT 12 61 66
66 61 12 OUT DDR0_CA<8> AR19 DDR0_CA8 DDR1_CA8 W35 DDR1_CA<8> OUT 12 61 66
66 61 12 OUT DDR0_CA<9> AP19 DDR0_CA9 DDR1_CA9 W34 DDR1_CA<9> OUT 12 61 66
66 61 12 OUT DDR0_CKE<0> AR24 DDR0_CKE0 DDR1_CKE0 P35 DDR1_CKE<0> OUT 12 61 66
66 61 12 OUT DDR0_CKE<1> AT24 DDR0_CKE1 DDR1_CKE1 P36 DDR1_CKE<1> OUT 12 61 66
66 61 12 OUT DDR0_CSN<0> AR25 DDR0_CSN0 DDR1_CSN0 N35 DDR1_CSN<0> OUT 12 61 66
66 61 12 OUT DDR0_CSN<1> AT25 DDR0_CSN1 DDR1_CSN1 N36 DDR1_CSN<1> OUT 12 61 66
66 61 12 OUT DDR0_DM<0> D11 DDR0_DM0 DDR1_DM0 P4 DDR1_DM<0> OUT 12 61 66
66 61 12 OUT DDR0_DM<1> D9 DDR0_DM1 DDR1_DM1 T4 DDR1_DM<1> OUT 12 61 66
66 61 12 OUT DDR0_DM<2> C15 DDR0_DM2 DDR1_DM2 K3 DDR1_DM<2> OUT 12 61 66
66 61 12 DDR0_DM<3> D7 DDR0_DM3 DDR1_DM3 V4 DDR1_DM<3> 12 61 66

OUT OUT
66 61 12 BI DDR0_DQ<0> B15 DDR0_DQ0 DDR1_DQ0 K2 DDR1_DQ<0> BI 12 61 66
66 61 12 BI DDR0_DQ<1> D14 DDR0_DQ1 DDR1_DQ1 L4 DDR1_DQ<1> BI 12 61 66
66 61 12 BI DDR0_DQ<2> B14 DDR0_DQ2 DDR1_DQ2 L2 DDR1_DQ<2> BI 12 61 66
DDR0_DQ<3> D13 DDR0_DQ3 DDR1_DQ3 M4 DDR1_DQ<3>

62 8 =PP1V2_S2R_DDR_SOC 66 61 12 BI BI 12 61 66
66 61 12 BI DDR0_DQ<4> B13 DDR0_DQ4 DDR1_DQ4 M2 DDR1_DQ<4> BI 12 61 66
DDR0_DQ<5> D12 N4 DDR1_DQ<5>

C 1 C1090 1
R1090 1 C1092
1
R1092
10K
66 61 12
66 61 12
BI
BI DDR0_DQ<6> C12
DDR0_DQ5
DDR0_DQ6
DDR1_DQ5
DDR1_DQ6 N3 DDR1_DQ<6>
BI
BI
12 61 66
12 61 66
C
0.1UF 0.1UF 1% DDR0_DQ<7> B12 DDR0_DQ7 DDR1_DQ7 N2 DDR1_DQ<7>
20%
10K 20% 1/32W
66 61 12 BI BI 12 61 66
1% DDR0_DQ<8> C11 DDR0_DQ8 DDR1_DQ8 P3 DDR1_DQ<8>
2 6.3V
X5R-CERM 1/32W 2 6.3V
X5R-CERM
MF 66 61 12 BI BI 12 61 66
01005 MF 01005 2 01005 66 61 12 DDR0_DQ<9> B11 DDR0_DQ9 DDR1_DQ9 P2 DDR1_DQ<9> 12 61 66

BI BI
2 01005
DDR0_DQ<10> D10 DDR0_DQ10 DDR1_DQ10 R4 DDR1_DQ<10>
PPVREF_DDR1_CA_SOC 8 66
66 61 12 BI BI 12 61 66
PPVREF_DDR0_CA_SOC 8 66
66 61 12 DDR0_DQ<11> B10 DDR0_DQ11 DDR1_DQ11 R2 DDR1_DQ<11> 12 61 66
BI BI
1 66 61 12 BI DDR0_DQ<12> B9 DDR0_DQ12 DDR1_DQ12 T2 DDR1_DQ<12> BI 12 61 66
1 C1091 1
R1091 1 C1093 R1093 DDR0_DQ<13> D8 U4 DDR1_DQ<13>
10K 66 61 12 BI DDR0_DQ13 DDR1_DQ13 BI 12 61 66
0.1UF 10K 0.1UF 1% DDR0_DQ<14> C8 U3 DDR1_DQ<14>
20% 1% 20% 1/32W 66 61 12 BI DDR0_DQ14 DDR1_DQ14 BI 12 61 66
2 6.3V
X5R-CERM 1/32W 2 6.3V
X5R-CERM MF 66 61 12 DDR0_DQ<15> B8 DDR0_DQ15 DDR1_DQ15 U2 DDR1_DQ<15> 12 61 66
MF BI BI
01005 01005 2 01005 D18 G4
2 01005 66 61 12 BI DDR0_DQ<16> DDR0_DQ16 DDR1_DQ16 DDR1_DQ<16> BI 12 61 66
66 61 12 BI DDR0_DQ<17> B18 DDR0_DQ17 DDR1_DQ17 G2 DDR1_DQ<17> BI 12 61 66
66 61 12 BI DDR0_DQ<18> D17 DDR0_DQ18 DDR1_DQ18 H4 DDR1_DQ<18> BI 12 61 66
66 61 12 BI DDR0_DQ<19> B17 DDR0_DQ19 DDR1_DQ19 H2 DDR1_DQ<19> BI 12 61 66
66 61 12 BI DDR0_DQ<20> D16 DDR0_DQ20 DDR1_DQ20 J4 DDR1_DQ<20> BI 12 61 66
=PP1V2_VDDIOD_SOC 66 61 12 BI DDR0_DQ<21> C16 DDR0_DQ21 DDR1_DQ21 J3 DDR1_DQ<21> BI 12 61 66

62 9
66 61 12 BI DDR0_DQ<22> B16 DDR0_DQ22 DDR1_DQ22 J2 DDR1_DQ<22> BI 12 61 66
1 DDR0_DQ<23> D15 K4 DDR1_DQ<23>
1
R1094 1 C1096 R1096 66 61 12 BI DDR0_DQ23 DDR1_DQ23 BI 12 61 66
1 C1094 4.7K 0.1UF 4.7K 61 12 BI DDR0_DQ<24> C7 DDR0_DQ24 DDR1_DQ24 V3 DDR1_DQ<24> BI 12 61 66
0.1UF 1% 20% 1%
DDR0_DQ<25> B7 V2 DDR1_DQ<25>
20% 1/32W 66 61 12 BI DDR0_DQ25 DDR1_DQ25 BI 12 61 66
2 6.3V
1/32W
MF 2 6.3V
X5R-CERM MF
X5R-CERM DDR0_DQ<26> D6 DDR0_DQ26 DDR1_DQ26 W4 DDR1_DQ<26>
01005 2 01005
01005 2 01005 66 61 12 BI BI 12 61 66
66 61 12 DDR0_DQ<27> B6 DDR0_DQ27 DDR1_DQ27 W2 DDR1_DQ<27> 12 61 66

PPVREF_DDR1_DQ_SOC BI BI
PPVREF_DDR0_DQ_SOC 8 66
8 66
66 61 12 DDR0_DQ<28> D5 DDR0_DQ28 DDR1_DQ28 Y4 DDR1_DQ<28> 12 61 66
BI BI
66 61 12 BI DDR0_DQ<29> B5 DDR0_DQ29 DDR1_DQ29 Y2 DDR1_DQ<29> BI 12 61 66
1 1
1 C1095 R1095 1 C1097 R1097 66 61 12 BI DDR0_DQ<30> D4 DDR0_DQ30 DDR1_DQ30 AA4 DDR1_DQ<30> BI 12 61 66
0.1UF 4.7K 0.1UF 4.7K 66 61 12 DDR0_DQ<31> B4 DDR0_DQ31 DDR1_DQ31 AA2 DDR1_DQ<31> 12 61 66
B 20%
6.3V
2 X5R-CERM
1%
1/32W
MF
20%
6.3V
2 X5R-CERM
1%
1/32W
MF
BI
A14 L1
BI
B
01005 2 01005 01005 2 01005 66 61 12 BI DDR0_DQS_P<0> DDR0_PDQS0 DDR1_PDQS0 DDR1_DQS_P<0> BI 12 61 66
66 61 12 BI DDR0_DQS_P<1> A9 DDR0_PDQS1 DDR1_PDQS1 T1 DDR1_DQS_P<1> BI 12 61 66
66 61 12 BI DDR0_DQS_P<2> A18 DDR0_PDQS2 DDR1_PDQS2 G1 DDR1_DQS_P<2> BI 12 61 66
66 61 12 BI DDR0_DQS_P<3> A5 DDR0_PDQS3 DDR1_PDQS3 Y1 DDR1_DQS_P<3> BI 12 61 66
66 61 12 DDR0_DQS_N<0> A13 DDR0_NDQS0 DDR1_NDQS0 M1 DDR1_DQS_N<0> 12 61 66

BI BI
66 61 12 BI DDR0_DQS_N<1> A10 DDR0_NDQS1 DDR1_NDQS1 R1 DDR1_DQS_N<1> BI 12 61 66
66 61 12 BI DDR0_DQS_N<2> A17 DDR0_NDQS2 DDR1_NDQS2 H1 DDR1_DQS_N<2> BI 12 61 66
66 61 12 BI DDR0_DQS_N<3> A6 DDR0_NDQS3 DDR1_NDQS3 W1 DDR1_DQS_N<3> BI 12 61 66
66 61 12 OUT DDR0_CK_P AT22 DDR0_CK DDR1_CK T36 DDR1_CK_P OUT 12 61 66
66 61 12 OUT DDR0_CK_N AR22 DDR0_CKB DDR1_CKB T35 DDR1_CK_N OUT 12 61 66
62 8 =PP1V2_S2R_DDR_SOC AP23 DDR0_VDD_CKE

R34 (<1MA EACH)
DDR1_VDD_CKE
66 DDR0_CA_ZQ_SOC AN22 DDR0_RREF_CA
66 DDR1_CA_ZQ_SOC T33 DDR1_RREF_CA
66 DDR0_DQ_ZQ_SOC F12 DDR0_RREF_DQ
66 DDR1_DQ_ZQ_SOC R6 DDR1_RREF_DQ
66 8 PPVREF_DDR0_CA_SOC AP22 DDR0_VREF_CA
1 1 1 1 66 8 PPVREF_DDR1_CA_SOC
T34 DDR1_VREF_CA
1 C1001 1 C1000 R1000 R1001 R1002 R1003 F13
240 240 240 240 8 PPVREF_DDR0_DQ_SOC DDR0_VREF_DQ
0.22UF 0.22UF 66
20% 20% 1% 1% 1% 1% 66 8 PPVREF_DDR1_DQ_SOC P6 DDR1_VREF_DQ
2 6.3V
X5R 2 6.3V
X5R
1/32W
MF
1/32W
MF
1/32W
MF
1/32W
MF
01005 01005
2 01005 2 01005 2 01005 2 01005
A
(DDR IMPEDANCE CONTROL)
8 7 6 5 4 3
1
D OMIT_TABLE
M5
D
62 9 8 =PP1V2_VDDIOD_SOC AL21 Y14
AL22 U0600 Y16 M6
C1100 1
C1101 1 C1102 1 C1105 1 C1106 1
AL23 ALCATRAZ Y18 M8
1.0UF 1.0UF 1.0UF 0.47UF 0.47UF DISCRETE M10
20% 20% 20% 20% 20% AL24 FBGA Y20
6.3V 2 6.3V 2 6.3V 2 4V 4V M12
DDR0_CA0 CAPS X5R X5R X5R CERM-X5R-1 2 CERM-X5R-1 2 AL25 (9 OF 14) Y24
0201-1 0201-1 0201-1 201 201 M14
AM21 VDDIOD_DDR0CA Y26
AM23 Y28 M16
VSS
AM25 K30 M18
Y33 M20
=PP1V2_VDDIOD_SOC N30 Y34 OMIT_TABLE M22
62 9 8
P30 Y35 M24
U0600
C1110 1 C1111 1 C1112 1 C1115 1 C1116 1 M26
1.0UF 1.0UF 1.0UF 0.47UF 0.47UF
R30 Y36 ALCATRAZ
T30 M30 DISCRETE M28
20% 20% 20% 20% 20%
DDR1_CA1 CAPS 6.3V 2 6.3V 2 6.3V 2 4V 4V VDDIOD_DDR1CA FBGA AT12
X5R X5R X5R CERM-X5R-1 2 CERM-X5R-1 2 U30 V30
0201-1 0201-1 0201-1 201 201 (7 OF 14) M32
N31 Y30
R31 M33
U31 M34
N1
N5
POR CAPS 4/13/2012 POR CAPS 4/13/2012 N9
62 10 9 =PP1V8_VDDIO18_SOC AB7 G7 =PP1V2_VDDIOD_SOC 8 9 62
AC7 G8 N11
CRITICAL CRITICAL
C1120 1 C1125 1 C1126 1 C1162 1 N13
C1130 1 C1131 1 AD7 G9 C1150 1 C1155 1 C1160 1 C1161 1
4.3UF 1.0UF 1.0UF 0.47UF 0.47UF AE7 G10 15UF 4.3UF 1.0UF 1.0UF 1.0UF N15
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
4V 6.3V 2 6.3V 2 4V 4V AF7 G11 4V 4V 6.3V 2 6.3V 2 6.3V 2 N17
X5R-CERM 2 X5R X5R CERM-X5R-1 2 CERM-X5R-1 2 X5R 2 X5R-CERM 2 X5R X5R X5R
0610 0201-1 0201-1 201 201 0402 0610 0201-1 0201-1 0201-1 N19
AG7 G12
AH7 G13 N21
C AJ7 G14 VSS N23 C
AK7 G15 N25
AL7 G16 N27
AL8 H7 N29
VDDIO18_GRP1
1 1 AL9 (65MA) J7 C1163 1 C1165 1 C1166 1
C1170 1 N32
C1135 C1140 C1141 1 C1145 1
GPIO, UART, SPI, 1.0UF 0.47UF 0.47UF 8.2PF N33
1.0UF 0.22UF AL10 K7 20% 20% 20%
20% 20% 0.22UF 8.2PF I2C, SENSOR, 6.3V 2 4V 4V +/-0.5PF
N34
6.3V 2 6.3V 20% +/-0.5PF AL11 L7 X5R 16V
CERM-X5R-1 2 CERM-X5R-1 2 NP0-C0G-CERM
6.3V 16V SOCHOT, PMU 2
X5R X5R 2 X5R 2 NP0-C0G-CERM 2 0201-1 201 201 01005 P1
0201-1 01005 M7
01005 01005
AL13 N7 P5
AL14 P7 P8
VDDIOD_DDRDQ R7 P10
AL16 (1000MA) T7 P12
AL17 SHARED WITH DRAM VDDQ U7 P14
V7 P16
AL19 W7 P18
AL20 Y7 P20
F7 P22
AA30 F9 P24
AB31 F11 P26
AC30 F14 P28
AD31 F16 P31
AE30 G6 P32
AF31 VDDIO18_GRP2 J6 P33
AG30 (20MA) L6 P34
I2S, TMR, SIO,
W30 GPIO, UART N6
Y31 T6
B G29
V6
Y6
B
G30
H31
J30
K31 VDDIO18_GRP3
PLACE_NEAR=U0600.F27:2MM
L30 (31MA)
PPN, GPIO, JTAG
L1190 M31
120-OHM-25%-250MA-0.5DCR
62 10 9 =PP1V8_VDDIO18_SOC 1 2 67 PP1V8_XTAL F27 VDDIO18_GRP4 (2MA) XTAL I/O
01005
C1190 1
0.22UF
20%
6.3V 2
X5R
01005
8 7 6 5 4 3
1
POR CAPS 4/13/2012

62 =PPVDD_SOC
OMIT_TABLE
CRITICAL CRITICAL CRITICAL CRITICAL
R3 1 C1205 1 C1206 1 C1207 1 C1208 OMIT_TABLE
U0600 R5 XW1200 4.3UF 4.3UF 4.3UF 4.3UF
SHORT-10L-0.25MM-SM AB21 N22
ALCATRAZ R9 PPVDD_SOC_RAIL_SENSE 1 2
20%
2 4V
20%
4V
2 X5R-CERM
20%
4V
2 X5R-CERM
20%
4V
2 X5R-CERM U0600
DISCRETE 67 57
X5R-CERM AD21 N24
FBGA R11 (PLANE SENSE) PLACE_NEAR=U0600.N22:10MM 0610 0610 0610 0610
AF21 ALCATRAZ N26
R13 DISCRETE
(8 OF 14) AH21 FBGA N28
D
R15
R17
AK21
G26
(10 OF 14) P9
P11
D
R19 CRITICAL CRITICAL CRITICAL G28 P13
R21 1 C1220 1 C1221 1 C1222 H9 P15
R23 1UF 1UF 1UF
20% 20% 20% H11 P17
4V
2 X6S 4V
2 X6S 4V
2 X6S
R25 H13 P19
0204 0204 0204
R27 H15 P21
R29 H17 P23
R32 H19 P25
R35 H21 P27
R36 CRITICAL CRITICAL CRITICAL H23 P29
T3
1 C1223 1 C1224 1 C1225
1UF 1UF 1UF H25 R8
T5 20% 20% 20% H27 R14
4V
2 X6S 4V
2 X6S 4V
2 X6S
T10 H29 R16
0204 0204 0204
T12 J8 R20
T14 J10 R22
T16 J12 R24
T18 J14 R26
T20 CRITICAL CRITICAL J16 R28
T22 1 C1230 1 C1231 J18 T15
T24 0.47UF 0.47UF
20% 20% J20 T17
4V 4V
T26 2 X7S 2 X7S J22 VDD T19
0204 0204
T28 J24 T21
T31 J26 T23
T32 J28 T25
U1 K9 T27
U5 VDD
K11 T29
C U6
U9
1 C1240
0.22UF
1 C1241
0.22UF
1 C1245
8.2PF
K13 U8 C
20% 20% +/-0.5PF K15 U18
U11 6.3V 6.3V 16V
2 X5R 2 X5R 2 NP0-C0G-CERM K17 U20
U13 01005 01005 01005
K19 V15
POR CAPS 4/13/2012 U15 K21 V17
62 =PPVDD_SRAM_CPU AC25 U17 K23 V19
AC27 U19 K25 (VDD_SOC 1900MA) V21
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1 C1250 1 C1256 1 C1262 1 C1263 1 C1271 AC29 U21 K27 W8
15UF 4.3UF 1UF 1UF 0.47UF AD24 U23 K29 W14
20% 20% 20% 20% 20%
4V
2 X5R 4V
2 X5R-CERM 4V
2 X6S 4V
2 X6S 4V
2 X7S AD26 U25 L8 W16
0402 0610 0204 0204 0204 AD28 U27
VSS L10 W18
AE25 VDD_SRAM_CPU U32 L12 W20
AE27 U33 L14 Y17
AE29 U34 L16 Y19
AK26 U35 L18 Y21
V26 U36 L20 AA16
V1 L22 T8
62 =PPVDD_SRAM_SOC R10 V5 L24 U29
R12 V10 L26 V8
CRITICAL CRITICAL CRITICAL CRITICAL T9 V12 L28
1 C1255 1 C1260 1 C1261 1 C1270 1 C1275 T11 V14
4.3UF 1UF 1UF 0.47UF 8.2PF (1500MA) M9 VDD_SENSE V31 PPVDD_SOC_SOC_SENSE 57 61
20% 20% 20% 20% +/-0.5PF T13 V16 M11
67
2 4V 2 4V 2 4V 2 4V 2 16V (DIE SENSE)

X5R-CERM X6S X6S X7S NP0-C0G-CERM U10 V18
0610 0204 0204 0204 01005 M13
U12 V20 M15
U14 V22 M17
U16 V24 M19
VDD_SRAM_SOC
B V9
V11
V28
H30
M21
M23
B
V13 V32 M25
W10 V33 M27
W12 V34 M29
Y9 W3 N8
Y11 W5 N10
Y13 W6 N12
Y15 W9 N14
W11 N16
W13 N18
W15 N20
W17
W19
W21
W23
R1200 W25
0.00 2 PP1V8_VDD_ANA_TMPSADC AH22 (4 * 2.5MA) W27
62 9 =PP1V8_VDDIO18_SOC 1 67
VDD_ANA_TMPSADC0
0% Y22 VDD_ANA_TMPSADC1 W29
1/32W
MF 1 C1280 1 C1281 1 C1282 1 C1283 AA6 VDD_ANA_TMPSADC2 W31
01005
0.22UF 0.22UF 0.22UF 0.22UF G22 W32
20% 20% 20% 20% VDD_ANA_TMPSADC3
2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R W33
X5R X5R X5R 01005
01005 01005 01005 Y3
Y5
Y8
Y10
A Y12
8 7 6 5 4 3 2 1
1
OMIT_TABLE OMIT_TABLE
A1 AF24 AP6 E14
A2 U0600 AF26 AL15 U0600 E15
A3 ALCATRAZ AF28 AP12 ALCATRAZ E16 POR CAPS 4/13/2012
DISCRETE DISCRETE 62 =PPVDD_GPU
A4 FBGA AF30 AP15 FBGA E17
A7 (11 OF 14) AF35 AP18 (12 OF 14) E18 XW1300 1 1 1
CRITICAL
1
CRITICAL
1
CRITICAL
1
CRITICAL
1
CRITICAL
1
CRITICAL
SHORT-10L-0.25MM-SM C1350 C1351 C1355 C1356 C1357 C1358 C1359 C1360
A8 AG2 AP20 E30 67 57 PPVDD_GPU_RAIL_SENSE 1 2 15UF 15UF 4.3UF 4.3UF 4.3UF 4.3UF 4.3UF 4.3UF
A11 AG9 AP21 F1 (PLANE SENSE) 20% 20% 20% 20% 20% 20% 20% 20%
4V 4V 4V 4V 4V 4V 4V 4V
PLACE_NEAR=U0600.AA8:11MM 2 X5R 2 X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
A12 AG11 AP24 F2 0402 0402 0610 0610 0610 0610 0610 0610
A15 AG13 AP25 F3
D A16
A19
AG15
AG17
AP26
AP28
F4
F5
D
A25 AG19 AP34 F6 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
A28 AG21 AP35 F8
1 C1370 1 C1371 1 C1372 1 C1373 1 C1374 1 C1375
1UF 1UF 1UF 1UF 1UF 1UF
A34 AG23 AP36 F10 20% 20% 20% 20% 20% 20%
4V 4V 4V 4V 4V 4V
A35 AG25 AR1 F15 2 X6S 2 X6S 2 X6S 2 X6S 2 X6S 2 X6S OMIT_TABLE
0204 0204 0204 0204 0204 0204
A36 AG27 AR2 F29 AA22 AA8
AA1 AG29 AR5 F30 AA24 U0600 AA10
AA26 ALCATRAZ AA12
C4 AG31 AR8 F31 DISCRETE
AA5 AH3 AL18 F32 AA28 FBGA AA14
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL AB23 AA18
AA3 AH6 AM15 F33 1 C1380 1 C1381 1 C1382 1 C1383 1 C1384 1 C1385 (13 OF 14)
AA9 AH8 AR15 F35 0.47UF 0.47UF 0.47UF 0.47UF 0.47UF 0.47UF AB25 AA20
20% 20% 20% 20% 20% 20% AB27 AB9
AA11 AH10 AR18 G3 2 4V
X7S
4V
2 X7S 4V
2 X7S 4V
2 X7S 2 4V
X7S 2 4V
X7S
AA13 AH12 AR21 G5 0204 0204 0204 0204 0204 0204 AB29 AB11
AA15 AH14 AR23 G27 AC22 AB13
AA17 AH16 AR28 G31 AC24 AB15
AA19 AH18 AR34 H3 AC26 AB17
AA21 AH20 AR35 H5 AC28 AB19
1 C1390 1 C1391 1 C1392 1 C1393 1 C1395
AA23 AH24 AR36 H6 AD23 AC8
0.22UF 0.22UF 0.22UF 0.22UF 8.2PF
20% 20% 20% 20% +/-0.5PF AE22 AC10
AA25 AH26 AT1 H8 6.3V 6.3V 6.3V 6.3V 16V
2 X5R 2 X5R 2 X5R 2 X5R 2 NP0-C0G-CERM
AA27 AH28 AT2 H10 AE24 AC12
01005 01005 01005 01005 01005
AA29 AH30 AT3 H12 AE26 AC14
AA31 AH31 AN12 H14 AE28 AC16
AB1 AH35 AT15 H16 AF23 AC18
AB2 AH36 AT18 H20 AF25 AC20
AB3 AJ9 AT21 H22 AF27 AD9
AB4 AJ11 AT23 H24 AF29 AD11
C AB8 AJ13 AT28 H26
62 =PPVDD_CPU
POR CAPS 4/13/2012 AG22 AD13 C
AB10 AJ15 AT34 H28 AG24 AD15
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
AB12 AJ17 AT35 AN15 XW1310
SHORT-10L-0.25MM-SM
1 C1300 1 C1301 1 C1305 1 C1306 1 C1307 1 C1308 1 C1309 1 C1310 AG26 AD17
AB14 AJ19 AT36 H33 15UF 15UF 4.3UF 4.3UF 4.3UF 4.3UF 4.3UF 4.3UF AG28 VDD_CPU AD19
67 57 PPVDD_CPU_RAIL_SENSE 1 2 20% 20% 20% 20% 20% 20% 20% 20%
4V AH23 AE8
AB16 AJ21 B1 H35 (PLANE SENSE) 2 X5R 2 4V
X5R 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM
(10100MA)
AB18 AJ23 B2 J1 0402 0402 0610 0610 0610 0610 0610 0610 AH25 AE10
PLACE_NEAR=U0600.AA22:10MM
AB20 AJ25 B3 J5 AH27 AE12
AB22 AJ27 B19 J9 AH29 AE14
AB24 AJ29 B25 J11 AJ22 AE16
AB26 VSS AK2 B28 VSS VSS J13 AJ24 VDD_GPU AE18
VSS CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
AB28 AK6 B32 J15 1 C1320 1 C1321 1 C1322 1 C1323 1 C1324 1 C1325 1 C1326 1 C1327 AJ26 (6800MA) AE20
AB30 AK8 B35 J17 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF AJ28 AF9
20% 20% 20% 20% 20% 20% 20% 20%
4V
2 X6S 2 4V 4V
2 X6S 4V
2 X6S 4V
2 X6S 4V
2 X6S 4V
2 X6S 4V
2 X6S AK23 AF11
AB34 AK10 B36 J19 X6S
0204 0204 0204 0204 0204 0204 0204 0204 AK25 AF13
AC9 AK12 C1 J21
AC11 AK14 C2 J23 AK27 AF15
AC13 AK16 C3 J25 AK29 AF17
AC15 AK18 C5 J27 U22 AF19
CRITICAL CRITICAL U24 AG8
AC17 AK20 C6 J29 1 C1328 1 C1329
AC19 AK22 C9 J31 1UF 1UF U26 AG10
20% 20%
AC21 AK24 C10 K1 4V 4V U28 AG12
2 X6S 2 X6S
AC23 AK28 C13 K5 0204 0204 V23 AG14
AC31 AF33 C14 K6 V25 AG16
AC35 AK31 C17 K8 V27 AG18
AD2 AK32 C18 K10 V29 AG20
AD6 AK33 C19 K12 W22 AH9
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1 C1330 1 C1331 1 C1332 1 C1333 1 C1334 1 C1335 1 C1336 1 C1337 W24 AH11
AD8 AK34 C20 K14
B AD10
AD12
AK35
AK36
C21
C22
K16
K18
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
4V
0.47UF
20%
2 X7S
0.47UF
20%
4V
2 X7S
W26
W28
AH13
AH15
B
0204 0204 0204 0204 0204 0204 0204 0204 Y23 AH17
AD14 AL3 C23 K20
AD16 AK30 C24 K22 Y25 AH19
AD18 AL32 C25 K24 Y27 AJ8
AD20 AL33 C26 K26 Y29 AJ10
AD25 AL34 C30 K28 AJ12
1 C1340 1 C1341 1 C1342 1 C1343 1 C1345
AD27 AM6 C36 AR12 0.22UF 0.22UF 0.22UF 0.22UF 8.2PF 67 61 57 PPVDD_CPU_SOC_SENSE AL31 VDD_CPU_SENSE AJ14
20% 20% 20% 20% +/-0.5PF
6.3V (DIE SENSE) AJ16
AD29 AM8 D1 K32 2 X5R 2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R 2 16V
NP0-C0G-CERM
AD30 AL12 D2 K33 01005 01005 01005 01005 01005 AJ18
AE3 AM12 D3 K34 AJ20
AE9 AM14 D22 K35 AK9
AE11 AM16 D25 K36 AK11
AE13 AM18 D31 L3 AK13
AE15 AJ34 D32 L5 AK15
AE17 AM22 D33 L9 AK17
AE19 AM24 D35 L11 AK19
AE21 AM32 E1 L13
AE23 AM33 E2 L15 VDD_GPU_SENSE AA7
AE31 AM34 E3 L17
AE34 AN2 E4 L19
AF6 AN18 E5 L21
AF8 AN19 E6 L23
AF10 AN20 E7 L25 67 61 57 PPVDD_GPU_SOC_SENSE
AF12 AN21 E8 L27 (DIE SENSE)
AF14 AN24 E9 L29
A AF16 AN25 E10 L31
AF18 AN34 E11 L32
AF20 AP1 E12 L33
AF22 AP3 E13 M3
8 7 6 5 4 3
1
66 61 8 IN DDR0_CA<0> AE21 DDR0_CA0 OMIT_TABLE DDR1_CA0 J25 DDR1_CA<0> IN 8 61 66 A1 AG5
=PP1V2_VDDQ_DDR OMIT_TABLE
66 61 8 IN DDR0_CA<1> AF20 DDR0_CA1 U1400 DDR1_CA1 K26 DDR1_CA<1> IN 8 61 66
62 12
A2 U1400 AG23
66 61 8 IN DDR0_CA<2> AE20 DDR0_CA2 BGA DDR1_CA2 K25 DDR1_CA<2> IN 8 61 66 A5 BGA AG24
66 61 8 IN DDR0_CA<3> AE19 DDR0_CA3 (1 OF 3) DDR1_CA3 L25 DDR1_CA<3> IN 8 61 66
CRITICAL CRITICAL CRITICAL CRITICAL A8 (3 OF 3) AG25
C1400 1 C1401 1 C1402 1 C1403 1 C1405 1 C1406 C1407 1 C1408 1
H9CCNNN8KTMLER-NTM
128MX32X2
1
H9CCNNN8KTMLER-NTM
128MX32X2
DDR0_CA<4> AF18 DDR0_CA4 DDR1_CA4 M26 DDR1_CA<4> A11 AG26
66 61 8 IN IN 8 61 66
15UF 15UF 4.3UF 4.3UF 1.0UF 1.0UF 1.0UF 1.0UF
66 61 8 IN DDR0_CA<5> AF12 DDR0_CA5 DDR1_CA5 V26 DDR1_CA<5> IN 8 61 66
20% 20% 20% 20% 20% 20% 20% 20%
A13 AG27
4V 4V 4V 4V 6.3V 2 6.3V 2 6.3V 2 6.3V 2
DDR0_CA<6> AE11 W25 DDR1_CA<6> X5R 2 X5R 2 X5R-CERM 2 X5R-CERM 2 X5R X5R X5R X5R B1
66 61 8 IN DDR0_CA6 DDR1_CA6 IN 8 61 66
0402 0402 0610 0610 0201-1 0201-1 0201-1 0201-1 A15
66 61 8 IN DDR0_CA<7> AF11 DDR0_CA7 DDR1_CA7 W26 DDR1_CA<7> IN 8 61 66 A17 B2
66 61 8 IN DDR0_CA<8> AF10 DDR0_CA8 DDR1_CA8 Y26 DDR1_CA<8> IN 8 61 66 A20 B26
66 61 8 IN DDR0_CA<9> AE9 DDR0_CA9 DDR1_CA9 AA25 DDR1_CA<9> IN 8 61 66 A23 B27
D 66 61 8 IN DDR0_CK_P AF15 DDR0_CK DDR1_CK R26 DDR1_CK_P IN 8 61 66

A26
A27
C26
C27
D
DDR0_CK_N AF14 DDR0_CK* DDR1_CK* T26 DDR1_CK_N AA5 D4
66 61 8 IN IN 8 61 66
C1410 1 C1411 1 C1415 1 C1416 1 C1419 1
66 61 8 IN DDR0_CKE<0> AF16 DDR0_CKE0 DDR1_CKE0 P26 DDR1_CKE<0> IN 8 61 66 0.47UF 0.47UF 0.1UF 0.1UF 56PF AA24 D14
AE17 N25 20% 20% 20% 20% 5%
66 61 8 IN DDR0_CKE<1> DDR0_CKE1 DDR1_CKE1 DDR1_CKE<1> IN 8 61 66 4V 4V 6.3V 6.3V 16V T25 D24
CERM-X5R-1 2 CERM-X5R-1 2 X5R-CERM 2 X5R-CERM 2 NP0-C0G 2
201 201 01005 01005 01005 AF22 D25
AB5 D26
66 61 8 IN DDR0_CSN<0> AF17 DDR0_CS0 DDR1_CS0 N26 DDR1_CSN<0> IN 8 61 66 AB24 D27
66 61 8 IN DDR0_CSN<1> AE18 DDR0_CS1 DDR1_CS1 M25 DDR1_CSN<1> IN 8 61 66 AB25 E1
AC1 E5
66 61 8 IN DDR0_DM<0> D15 DDR0_DM0 DDR1_DM0 N4 DDR1_DM<0> IN 8 61 66 AC5 E6
66 61 8 IN DDR0_DM<1> D13 DDR0_DM1 DDR1_DM1 R4 DDR1_DM<1> IN 8 61 66 AC24 E7
66 61 8 IN DDR0_DM<2> D20 DDR0_DM2 DDR1_DM2 H4 DDR1_DM<2> IN 8 61 66 AC25 E8
66 61 8 IN DDR0_DM<3> D8 DDR0_DM3 DDR1_DM3 Y4 DDR1_DM<3> IN 8 61 66 AC27 E9
62 =PP1V8_S2R_DDR AF24 OMIT_TABLE A4
AD4 E10
66 61 8 BI DDR0_DQ<0> B19 DDR0_DQ0 DDR1_DQ0 J2 DDR1_DQ<0> BI 8 61 66
CRITICAL
AE2 U1400 A7
AD5 E11
1 1 1 AF6 A12
66 61 8 BI DDR0_DQ<1> C19 DDR0_DQ1 DDR1_DQ1 J3 DDR1_DQ<1> BI 8 61 66 C1420 C1425 C1426 C1428 1 C1429 1 (2 OFBGA
3)
AD6 E12
DDR0_DQ<2> B18 K2 DDR1_DQ<2> 15UF 1UF 1UF 1.0UF 1.0UF AD26 A16
66 61 8 BI DDR0_DQ2 DDR1_DQ2 BI 8 61 66
20% 10% 10% 20% 20% VDD1 AD7 E13
B3 A21
128MX32X2
H9CCNNN8KTMLER-NTM
DDR0_DQ<3> C18 K3 DDR1_DQ<3> 4V 6.3V 6.3V 6.3V 6.3V AD8 E14
66 61 8 BI DDR0_DQ3 DDR1_DQ3 BI 8 61 66
X5R 2 CERM 2 CERM 2 X5R 2 X5R 2
DDR0_DQ<4> B17 L2 DDR1_DQ<4> 0402 402 402 0201-1 0201-1 B25 A24
DDR0_DQ4 DDR1 DDR1_DQ4 AD9 E15
DDR0
66 61 8 BI BI 8 61 66
DDR0_DQ<5> C17 L3 DDR1_DQ<5> C2 AA1

66 61 8 BI DDR0_DQ5 DDR1_DQ5 BI 8 61 66 AD10 E16
DDR0_DQ<6> B16 M2 DDR1_DQ<6> F26 AA4
C16 M3 AB4
66 61 8 BI DDR0_DQ<7> DDR0_DQ7 DDR1_DQ7 DDR1_DQ<7> BI 8 61 66 AD12 E18
DDR0_DQ<8> C12 T3 DDR1_DQ<8> A3 AC4
DDR0_DQ<9> B12 T2 DDR1_DQ<9>
C1435 1 C1436 1 C1439 1
A9 AD1
AD14 E20
66 61 8 BI DDR0_DQ9 DDR1_DQ9 BI 8 61 66
0.1UF 0.1UF 56PF
DDR0_DQ<10> C11 U3 DDR1_DQ<10> 20% 20% 5% A19 AE3
66 61 8 BI DDR0_DQ10 DDR1_DQ10 BI 8 61 66
6.3V 6.3V 16V AD15 E21
DDR0_DQ<11> B11 U2 DDR1_DQ<11> X5R-CERM 2 X5R-CERM 2 NP0-C0G 2 A25 C3
66 61 8 BI DDR0_DQ11 DDR1_DQ11 BI 8 61 66 01005 01005 01005 AD16 E22
C 66 61 8
66 61 8
BI DDR0_DQ<12>
DDR0_DQ<13>
C10
B10
DDR0_DQ12
DDR0_DQ13
DDR1_DQ12
DDR1_DQ13
V3
V2
DDR1_DQ<12>
DDR1_DQ<13>
BI 8 61 66
8 61 66
V25
AC26
C25
D1
AD17
AD18
E23
E24
C
BI BI
DDR0_DQ<14> C9 W3 DDR1_DQ<14> AE1 D5
66 61 8 BI DDR0_DQ14 DDR1_DQ14 BI 8 61 66 AD19 VSS VSS E25
62 12 =PP1V2_S2R_DDR AF5 D6
66 61 8 BI DDR0_DQ<15> B9 DDR0_DQ15 DDR1_DQ15 W2 DDR1_DQ<15> BI 8 61 66 AD20 E27
DDR0_DQ<16> B24 D2 DDR1_DQ<16> CRITICAL CRITICAL CRITICAL AF7 D7
66 61 8 BI DDR0_DQ16 DDR1_DQ16 BI 8 61 66
C1446 1 AD21 F5
DDR0_DQ<17> C24 D3 DDR1_DQ<17>
C1440 1 C1442 1 C1443 1 C1445 1
AF23 D9
66 61 8 BI DDR0_DQ17 DDR1_DQ17 BI 8 61 66
15UF 4.3UF 4.3UF 1UF 1UF AD22 F24
DDR0_DQ<18> B23 E2 DDR1_DQ<18> 20% 20% 20% 10% 10% AF19 D10
66 61 8 BI DDR0_DQ18 DDR1_DQ18 BI 8 61 66
4V 4V 4V 6.3V 6.3V AD23 F25
X5R 2 X5R-CERM 2 X5R-CERM 2 CERM 2 CERM 2 AE12 D11
66 61 8 BI DDR0_DQ<19> C23 DDR0_DQ19 DDR1_DQ19 E3 DDR1_DQ<19> BI 8 61 66 402 AD24 G5
0402 0610 0610 402 VDD2
DDR0_DQ<20> B22 F2 DDR1_DQ<20> C1 D12
66 61 8 BI DDR0_DQ20 DDR1_DQ20 BI 8 61 66
VDDQ AD25 G24
C22 F3 C14 D16
66 61 8 BI DDR0_DQ<21> DDR0_DQ21 DDR1_DQ21 DDR1_DQ<21> BI 8 61 66 AD27 G25
B21 G2 E26 D17
66 61 8 BI DDR0_DQ<22> DDR0_DQ22 DDR1_DQ22 DDR1_DQ<22> BI 8 61 66 AE4 H1
DDR0_DQ<23> C21 G3 DDR1_DQ<23> G26 D18
66 61 8 BI DDR0_DQ23 DDR1_DQ23 BI 8 61 66 AE5 H5
C7 AA3 J1 D19
61 8 BI DDR0_DQ<24> DDR0_DQ24 DDR1_DQ24 DDR1_DQ<24> BI 8 61 66
C1448 1 C1449 1 C1455 1 C1456 1 C1459 1 AE6 H24
DDR0_DQ<25> B7 AA2 DDR1_DQ<25> P3 D21
66 61 8 BI DDR0_DQ25 DDR1_DQ25 BI 8 61 66 1.0UF 1.0UF 0.1UF 0.1UF 56PF AE7 H25
20% 20% 20% 20% 5% L26 D22
66 61 8 BI DDR0_DQ<26> C6 DDR0_DQ26 DDR1_DQ26 AB3 DDR1_DQ<26> BI 8 61 66 6.3V 6.3V 6.3V 6.3V 16V AE8 J5
X5R 2 X5R 2 X5R-CERM 2 X5R-CERM 2 NP0-C0G 2 W1 D23
66 61 8 BI DDR0_DQ<27> B6 DDR0_DQ27 DDR1_DQ27 AB2 DDR1_DQ<27> BI 8 61 66 0201-1 0201-1 01005 01005 01005 H26 J24
DDR0_DQ<28> C5 AC3 DDR1_DQ<28> AE26 E4
66 61 8 BI DDR0_DQ28 DDR1_DQ28 BI 8 61 66 AE14 V24
B5 AC2 AF25 F4
66 61 8 BI DDR0_DQ<29> DDR0_DQ29 DDR1_DQ29 DDR1_DQ<29> BI 8 61 66 AE15 K5
DDR0_DQ<30> C4 AD3 DDR1_DQ<30> G1
66 61 8 BI DDR0_DQ30 DDR1_DQ30 BI 8 61 66 R25 K24
DDR0_DQ<31> B4 AD2 DDR1_DQ<31> 62 12 =PP1V2_S2R_DDR AE13 G4
66 61 8 BI DDR0_DQ31 DDR1_DQ31 BI 8 61 66 Y5 L1
AF8 J4
CRITICAL Y24 L5
B15 DDR0_PDQS0 C1460 1 C1465 1 C1466 1 C1468 1 C1469 1 AE10 K4
66 61 8 BI DDR0_DQS_P<0> DDR1_PDQS0 N2 DDR1_DQS_P<0> BI 8 61 66 AE22 L24
C15 DDR0_NDQS0 15UF 1UF 1UF 1.0UF 1.0UF AE16 L4
66 61 8 BI DDR0_DQS_N<0> DDR1_NDQS0 N3 DDR1_DQS_N<0> BI 8 61 66 20% 10% 10% 20% 20% AE23 M5
4V 6.3V 6.3V 6.3V 6.3V J26 M1
X5R 2 CERM 2 CERM 2 X5R 2 X5R 2 AE24 M24
B13 DDR0_PDQS1
0402 402 402 0201-1 0201-1 U25 VDDCA M4
66 61 8 BI DDR0_DQS_P<1> DDR1_PDQS1 R2 DDR1_DQS_P<1> BI 8 61 66 AE25 N1
C13 DDR0_NDQS1 AB26 T1
66 61 8 BI DDR0_DQS_N<1> DDR1_NDQS1 R3 DDR1_DQS_N<1> BI 8 61 66 Y1 N5
P25 T4
B 66 61 8 BI DDR0_DQS_P<2> B20 DDR0_PDQS2 DDR1_PDQS2 H2 DDR1_DQS_P<2> BI 8 61 66
Y25 U4
AE27
AF1
N24
V5
B
C20 DDR0_NDQS2 AF21 V4
66 61 8 BI DDR0_DQS_N<2> DDR1_NDQS2 H3 DDR1_DQS_N<2> BI 8 61 66 AF2 P4
C1479 1 W4
C1475 1 C1476 1
56PF
AF3 P5
66 61 8 BI DDR0_DQS_P<3> B8 DDR0_PDQS3 DDR1_PDQS3 Y2 DDR1_DQS_P<3> BI 8 61 66
0.1UF 0.1UF 5% AF4 P24
20% 20% 16V
DDR0_DQS_N<3> C8 DDR0_NDQS3 DDR1_NDQS3 Y3 DDR1_DQS_N<3> 6.3V 6.3V NP0-C0G 2 W5 R1
66 61 8 BI BI 8 61 66 X5R-CERM 2 X5R-CERM 2 01005
01005 01005 W24 R5
66 12 PPVREF_DDR0_CA_DRAM AF13 DDR0_VREF_CA DDR1_VREF_CA U26 PPVREF_DDR1_CA_DRAM 12 66 AF26 R24
66 12 PPVREF_DDR0_DQ_DRAM B14 DDR0_VREF_DQ DDR1_VREF_DQ P2 PPVREF_DDR1_DQ_DRAM 12 66 AF27 T5
AG1 T24
66 DDR0_ZQ_DRAM AF9 DDR0_ZQ DDR1_ZQ AA26 66 DDR1_ZQ_DRAM AG2 U1
1 1 AG3 U5
R1498 R1499
240 240 AG4 U24
1% 1%
1/32W 1/32W
MF MF
2 01005 2 01005
62 12 =PP1V2_S2R_DDR 62 12 =PP1V2_S2R_DDR
62 12 =PP1V2_VDDQ_DDR 62 12 =PP1V2_VDDQ_DDR
1
1
R1494 R1496
1
R1490 1
R1492 10K
1 C1494 10K
1 C1496
4.7K 1 C1490 4.7K 1 C1492 1% 0.1UF 1%
1/32W
0.1UF
20%
1% 0.1UF 1% 0.1UF 1/32W 20%
A 1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
1/32W
MF
2 01005
20%
6.3V
2 X5R-CERM
MF
2 01005
6.3V
2 X5R-CERM
01005
MF
2 01005
2 6.3V
X5R-CERM
01005
01005 01005
PPVREF_DDR1_CA_DRAM 12 66
PPVREF_DDR0_CA_DRAM 12 66
PPVREF_DDR1_DQ_DRAM 12 66 PPVREF_DDR0_DQ_DRAM 12 66
1
1 1
1
R1495 1 C1495 R1497 1 C1497
R1491 1 C1491 R1493 1 C1493 10K 0.1UF 10K 0.1UF
4.7K 0.1UF 4.7K 0.1UF 1% 20% 1% 20%
6.3V 1/32W 6.3V
1% 20% 1% 20% 1/32W 2 X5R-CERM MF 2 X5R-CERM
1/32W
MF 2 6.3V
X5R-CERM
1/32W
MF 2 6.3V
X5R-CERM
MF
01005 2 01005
01005
01005 01005 2 01005
2 01005 2 01005
8 7 6 5 4 3
1
JTAG
R1510
1
240 2 JTAG_SOC_SEL OUT 4 60
1%
1/32W
BOOT CONFIG ID MF
01005
62 58 13 7 5 4 =PP1V8_SOC
NOSTUFF NOSTUFF NOSTUFF
D
1
R1500
10K
1
R1501
10K
1
R1502
10K
1
R1503
10K
D
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W
MF MF MF MF
2 01005 2 01005 2 01005 2 01005
BOOT_CONFIG[3] 5 OUT GPIO_BOOT_CONFIG_3
BOOT_CONFIG[3:0] MODE S/W READ FLOW
0000 SPI 1. SET GPIO AS INPUT

0001 SPI W/TEST 2. DISABLE PU AND ENABLE PD
0010 NAND <-- CURRENT SETTING 3. READ R1560
0011 NAND W/TEST 240
1 2 SOC_TESTMODE OUT 4 60
1%
1/32W
MF
01005
SOC_FAST_SCAN_CLK OUT 4
MAKE_BASE=TRUE
C SOC_HOLD_RESET OUT 4 C
ALIASED NETS TO ALLOW BREAKING ON DEV BOARD
5 OUT GPIO_PROX2SOC_IRQ_L =GPIO_ADUX1049_PROX2SOC_IRQ_L

BOARD ID MAKE_BASE=TRUE
=GPIO_AD7149_PROX2SOC_IRQ_L 45
62 58 13 7 5 4 =PP1V8_SOC
NOSTUFF MLB_C MLB_B DEV
1 1 1 1
R1504 R1505 R1506 R1507
10K 10K 10K 10K
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W 64 61 22 5 I2C3_SCL_1V8 =I2C3_PROX_ADUX1049_SCL_1V8
MF MF MF MF IN
MAKE_BASE=TRUE
2 01005 2 01005 2 01005 2 01005 =I2C3_PROX_AD7149_SCL_1V8 45
BOARD_ID[3] 5 OUT GPIO_BOARD_ID_3 R1530

WDOG_SOC 1
0.00 2 WDOG_SOC2PMU_RESET_IN
BOARD_ID[2] 5 OUT GPIO_BOARD_ID_2 67 4 IN OUT 57 67
0% 64 61 22 5 BI I2C3_SDA_1V8 =I2C3_PROX_ADUX1049_SDA_1V8
BOARD_ID[1] 5 OUT GPIO_BOARD_ID_1 1/32W MAKE_BASE=TRUE
MF =I2C3_PROX_AD7149_SDA_1V8 45
GPIO_BOARD_ID_0 01005
BOARD_ID[0] 5 OUT
BOARD_ID[3-0] S/W READ FLOW
B 0000
0001
MLB_A
MLB_A
AP
DEV
1.
2.
SET GPIO AS INPUT
DISABLE PU AND ENABLE PD
B
0010 MLB_B AP 3. READ
0011 MLB_B DEV
0100 MLB_C AP
0101 MLB_C DEV
62 58 13 7 5 4 =PP1V8_SOC
1
R0620
BOARD REVISION 10K
5%
5 OUT GPIO_BRD_REV3 1/32W
MF NOSTUFF
5 OUT GPIO_BRD_REV2 2 01005
5 OUT GPIO_BRD_REV1 R1535
GPIO_BRD_REV0 1
0.00 2 JTAG_SOC_TRST_L
5 OUT 67 61 60 57 47 25 4 IN RESET_SOC_L OUT 4 60 64
NOSTUFF NOSTUFF NOSTUFF 0%
1 1 1 1 1/32W
R1520 R1521 R1522 R1523 MF
01005 NOSTUFF
10K 10K 10K 10K 1
5% 5% 5% 5% R1536
1/32W 1/32W 1/32W 1/32W
MF MF MF MF SHORTING RESET TO TRST HERE SO THEY CAN BE SEPARATED ON DEV BOARD 240
2 01005 2 01005 2 01005 2 01005 NOTE: WHEN USING A0 SOC
1%
1/32W
STUFF R1535 MF
NOSTUFF R1536 2 01005
CHANGE R0620 TO 4.7K
BRD_REV[3-0]
0000 PROTO 0
A 0001 PROTO 0 + T2 S/W READ FLOW
0010 PROTO 1 + T2
0011 PROTO 1 + T1 1. SET GPIO AS INPUT
0100 PROTO 1 + T1 + B0 2. ENABLE PU AND DISABLE PD
0101 PROTO 2 + T2 + B0 3. READ
0110 EVT + T2 + B0
CURRENT SETTING ---> 0111 DVT + T2 + B1
8 7 6 5 4 3
1
D D
62 =PP3V3_NAND =PP1V8_NAND 14 57 61 62
1 C1600 1 C1601 1 C1602 1 C1640 1 C1641 1 C1642 1 C1610 1 C1611 1 C1612 1 C1613 1 C1614 1 C1615
10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2 0402-2
1 C1604 1 C1605 1 C1606 1 C1607 1 C1608 1 1 1 1 1 1

1.0UF 1.0UF 1.0UF 27PF 27PF
C1620 C1621 C1622 C1623 C1624 C1625
20% 20% 20% 5% 5% 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF
20% 20% 20% 20% 20% 20%
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V 2 6.3V 6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R 2 6.3V
0201-1 0201-1 0201-1 01005 01005 X5R X5R X5R
0201-1 0201-1 0201-1 0201-1 0201-1 0201-1
67 PPVDDI_NAND
1 C1652 1 C1651 1 C1650
27PF 1.0UF 1.0UF 1 C1630 1 C1631
5% 20% 20% 27PF 27PF
2 16V 6.3V 6.3V
C NP0-C0G
01005
2 X5R
0201-1
2 X5R
0201-1
5%
16V
2 NP0-C0G
01005
5%
2 16V
NP0-C0G
01005
C
OB8
OC8
OD8
OE0
OF8
OA8
B6
F2
M6
N1
N7
G0
VDDI
VCC VCCQ
=PP1V8_NAND 14 57 61 62
66 61 6 BI FMI0_AD<0> G3 IO0-0 OMIT_TABLE
CE0* A5 FMI0_CE0_L 6 60 61 66
IN
66 61 6 BI FMI0_AD<1> H2 IO1-0 U1600 CLE0 A3 FMI0_CLE
66 61 6 BI FMI0_AD<2> J3 IO2-0 THGBX2T0BBJLA03 IN 6 61 66
ALE0 C1 FMI0_ALE 6 61 66
FMI0_AD<3> K2 IN
66 61 6 BI IO3-0 LGA E3 NOSTUFF NOSTUFF
WE0* FMI0_WE_L 1 1
FMI0_AD<4> L5 IN 6 61 66
R1656 R1655
NAND-19NM-128GX8-MLC-PPN1.5-64G
66 61 6 BI IO4-0
66 61 6 FMI0_AD<5> K6 IO5-0 100K 100K
BI
J5 RE0 B4 NC
5%
1/32W
5%
1/32W
66 61 6 BI FMI0_AD<6> IO6-0 MF MF
H6 RE0* C7 FMI0_RE_L IN 6 61 66
66 61 6 BI FMI0_AD<7> IO7-0 2 01005 2 01005
G1 DQS0 H4 FMI0_DQS IN 6 61 66
66 61 6 BI FMI1_AD<0> IO0-1
J1 DQS0* F4 NC
66 6 BI FMI1_AD<1> IO1-1
66 6 BI FMI1_AD<2> L1 IO2-1
N3 RY/BY0* E5 NAND_SLOT0_RDYBSY_L
66 6 BI FMI1_AD<3> IO3-1
66 6 BI FMI1_AD<4> N5 IO4-1
CE1* C5 FMI1_CE0_L IN 6 61 66
66 6 FMI1_AD<5> L7 IO5-1
BI C3 FMI1_CLE
J7 CLE1 IN 6 61 66
66 6 BI FMI1_AD<6> IO6-1 D2
ALE1 FMI1_ALE IN 6 61 66
66 6 BI FMI1_AD<7> G7 IO7-1
WE1* E1 FMI1_WE_L IN 6 61 66 =PP1V8_NAND 14 57 61 62
RE1 D4 NC
RE1* D6 FMI1_RE_L IN 6 61 66
B DQS1 M4 FMI1_DQS IN 6 61 66
1
R1690 1 C1690
B
DQS1* K4 NC 51.1K 0.01UF
1% 10%
RY/BY1* E7 NAND_SLOT1_RDYBSY_L
1/32W
MF 2 6.3V
X5R
2 01005 01005
VREF G5 66 61 PPVREF_FMI_NAND
61 TP_FMI_TCKC_NAND OA0 TCKC ZQ A1 FMI_ZQ_NAND
61 TP_FMI_TMSC_NAND OB0 TMSC
VSS VSSQ
1
R1654
B2
F6
L3
A7
M2
OC0
OD0
OE8
OF0
G8
243 1 1 C1691
1% R1691
1/32W 51.1K 0.01UF
MF 1% 10%
2 01005 1/32W 2 6.3V
X5R
MF 01005
2 01005
8 7 6 5 4 3 2 1
1
SPEAKER AMPLIFIER
APN:353S3445
TURN ON TIME: 3.5MS GAIN VDD GND
D 75HZ +/- XXX% TURN ON DELAY: ?MS 12DB NC SHORT D
9DB NC 100K
EXTRA BULK
6DB SHORT NC
3DB 100K NC
62 18 17 =PPBATT_AUDIO 0DB NC NC
1 C2010 1 C2012 1 C2015 1 C2019

10UF 10UF 0.1UF 8.2PF
20% 20% 10% +/-0.5PF
2 10V
X5R-CERM 2 10V
X5R-CERM 2 6.3V
CERM-X5R 2 16V
NP0-C0G-CERM
0402-4 0402-4 0201 01005
R20201
A3
CRITICAL
0.00
C2025 PVDD 0%
1/32W
0.015UF MF
65 60 18 15 IN LEFT_CH_OUT_P 1 2 65
61 MAX98304_L2_IN_P U2020 01005 2
MAX98304D
10% WLP MIN_LINE_WIDTH=0.50MM
6.3V CRITICAL C3 IN+ OUT+ A2 SPKRAMP_L2_OUT_P MIN_NECK_WIDTH=0.20MM 49 60 65
OUT
X5R C2 IN-
0201 C2026 OUT- A1 SPKRAMP_L2_OUT_N OUT 49 60 65
0.015UF65 MIN_LINE_WIDTH=0.50MM
61 MAX98304_L2_IN_N CRITICAL MIN_NECK_WIDTH=0.20MM
LEFT_CH_OUT_N 1 2 C1 SHDN* MAX983X4_L2_GAIN
65 60 18 15 IN GAIN B3
10% B2 NC
6.3V NC NOSTUFF
X5R
0201 1 C2000
AUD_SPKRAMP_MUTE_L PGND 15PF
C
18 17 7 IN 5%
16V
2 NP0-C0G-CERM C
B1
01005
GAIN:6DB
NOSTUFF
C2001 1
15PF
5%
16V
NP0-C0G-CERM 2
01005
EXTRA BULK
62 18 17 =PPBATT_AUDIO
1 C2050 1 C2051 1 C2052 1 C2055 1 C2059

22UF 22UF 10UF 0.1UF 8.2PF
20% 20% 20% 10% +/-0.5PF
6.3V 6.3V
2 X5R-CERM-1 2 X5R-CERM-1 2 10V
X5R-CERM 2 6.3V
CERM-X5R
16V
2 NP0-C0G-CERM
603 603 0402-4 0201 01005
R20401
A3
0.00
B PVDD
0%
1/32W
MF
B
CRITICAL 01005 2
C2045 U2040
0.015UF MAX98304D
WLP MIN_LINE_WIDTH=0.50MM
65 60 18 15 LEFT_CH_OUT_P 1 2 65 61 MAX98304_L1_IN_P C3 IN+ OUT+ A2
SPKRAMP_L1_OUT_P MIN_NECK_WIDTH=0.20MM 49 60 65
IN OUT
CRITICAL C2 IN- OUT- A1 SPKRAMP_L1_OUT_N 49 60 65
10% OUT
6.3V MIN_LINE_WIDTH=0.50MM
X5R C2046 CRITICAL MIN_NECK_WIDTH=0.20MM
0201 0.015UF C1 SHDN* GAIN B3 MAX983X4_L1_GAIN NOSTUFF
1 2 65 1 C2002
65 60 18 15 IN LEFT_CH_OUT_N 61 MAX98304_L1_IN_N B2 NC
NC 15PF
10% 5%
6.3V 16V
2 NP0-C0G-CERM
X5R 01005
0201 PGND
18 17 7 AUD_SPKRAMP_MUTE_L
B1
NOSTUFF
GAIN:6DB C2003 1
15PF
5%
16V
NP0-C0G-CERM 2
01005
8 7 6 5 4 3 2 1
1
D OSCAR VDDIO = 1.8V HIBERNATE (NEED TO WAKE HOST)

OSCAR D
OSCAR CORE = 1.2V HIBERNATE (NEED TO RUN IN S2R) APN 337S4416 (A1)
62 =PP1V2_S2R_OSCAR =PP1V8_S2R_OSCAR 19 62
C2400 1 C2401 1
1.0UF 1.0UF
VDDC C1
VDDC C6
VDDIO C2
20% 20%
6.3V 2 6.3V 2
X5R X5R
0201-1 0201-1
CRITICAL
R2405
15.0 2
U2400 1 SPI_OSCAR_SCLK OUT 19 24 64
SPI_OSCAR2ACCEL_CS_L E3 LPC18A1UK-CPA1 A1 NC_OSCAR_DEBUG_SCL NO_TEST=TRUE 5%

64 19 OUT P0_0 P0_11 1/32W
E5 WLCSP B2 MF
64 19 OUT SPI_OSCAR2GYRO_CS_L P0_1 P0_12 64 SPI_OSCAR_SCLK_R
01005
19 ACCEL2OSCAR_INT1 E6 P0_2 P0_13 A4 SPI_OSCAR_MISO 19 24 64
IN IN
GYRO2OSCAR_INT2 C5 P0_3 P0_14 B3 64 SPI_OSCAR_MOSI_R
19 IN
D5 B4
R2406
19 IN GYRO2OSCAR_INT1 P0_4 P0_15 UART4_OSCAR2SOC_RXD OUT 5 64 15.0 2
E2 A5
1 SPI_OSCAR_MOSI IN 19 24 64
62 19 =PP1V8_S2R_OSCAR 19 IN ACCEL2OSCAR_INT2 P0_5 P0_16 UART4_SOC2OSCAR_TXD IN 5 64
D3 B5 5%
24 IN COMPASS2OSCAR_INT P0_6 P0_17 OSCAR2RADIO_CONTEXT_A OUT 29 46 1/32W
MF
1 R2400 64 24 SPI_OSCAR2COMPASS_CS_L D4 P0_7 P0_18 C3 OSCAR2RADIO_CONTEXT_B 29 46 01005
OUT OUT
100K 5 OSCAR_TIME_SYNC_HOST_INT E1 P0_8 P0_19 C4 I2C1_SOC2OSCAR_SWDIO_1V8 BI 5 64
OUT
5% A3 B6 NOTE: I2C1 IS ASSUMED TO USE PUSH-PULL INSTEAD OF OPEN-DRAIN
1/32W 57 5 OUT PMU_GPIO_OSCAR2PMU_HOST_WAKE P0_9 P0_20 I2C1_SOC2OSCAR_SWDCLK_1V8 IN 5 64
MF A2 D1
2 01005
NC_OSCAR_DEBUG_SDA NO_TEST=TRUE P0_10 P0_21 PMU_GPIO_CLK_32K_OSCAR IN 57 60 64
P0_22 A6 TP_OSCAR_P0_22
67 60 5 GPIO_OSCAR_RESET_L E4 RESET*
IN
DBGEN D2 60 GPIO_SOC2OSCAR_DBGEN_R
C C
VSS
VSS
R2407
0.00 2
1 GPIO_SOC2OSCAR_DBGEN 5
B1
D6
IN
0%
1/32W
MF
01005
GYRO ACCELEROMETER
FL2420 FL2450
120-OHM-25%-250MA-0.5DCR 120-OHM-25%-250MA-0.5DCR
=PP3V0_S2R_ACCEL 1 2 PP3V0_ACCEL =PP1V8_S2R_ACCEL 62
62 =PP3V0_S2R_GYRO 1 2 67 60 PP3V0_GYRO =PP1V8_S2R_GYRO 62
62 67 60
01005
01005
C2450 1
C2455 1 C2457 1
1 C2420 1 C2425 C2421 1 1.0UF 0.22UF
NOSTUFF 20% 0.22UF 20%
0.22UF 1.0UF 0.22UF
7
1 6.3V 2 20% 6.3V 2
20%
6.3V
20%
6.3V R2425 20%
6.3V X5R
0201-1
6.3V 2
X5R VDD VDD_IO
X5R
01005
2 X5R 2 X5R 0.00 X5R 2
B 01005 0201-1 0%
1/32W
MF
01005
01005
OMIT_TABLE
U2450 B
2 01005 AP2DHAA24
LGA
GYRO_RES_VDD 4 CS
64 19 IN SPI_OSCAR2ACCEL_CS_L SCL/SPC 1 SPI_OSCAR_SCLK IN 19 24 64
1
R2426 12 RES SDA/SDI/SDO 2 SPI_OSCAR_MOSI IN 19 24 64
R2457
0.00 2
0.00 11 RES SDO/SA0 3 64 SPI_OSCAR_MISO_ACCEL 1 SPI_OSCAR_MISO 19 24 64
0%
1/32W 0%
MF 10 RES 1/32W
MF
2 01005 01005
19 ACCEL2OSCAR_INT1 6 INT1 RES 13
OUT
19 OUT ACCEL2OSCAR_INT2 5 INT2 RES 14
15
VDD 16
RES/VDD VDD_IO GND
9
OMIT_TABLE
U2420
AP3GDL20HAB18TR
LGA
64 19 SPI_OSCAR2GYRO_CS_L 5 CS SCL/SPC 2 SPI_OSCAR_SCLK 19 24 64
IN IN
19 OUT GYRO2OSCAR_INT2 6 DRDY/
INT2 SDA/SDI/SDO 3 SPI_OSCAR_MOSI IN 19 24 64
R2427
8 0.00 2
GYRO_DEN DEN SDO/SA0 4 64 SPI_OSCAR_MISO_GYRO 1 SPI_OSCAR_MISO 19 24 64
0%
7 INT1 1/32W
1
R2428 19 OUT GYRO2OSCAR_INT1 RES0 9 MF
01005
0.00 RES1 10
0%
1/32W RES2 11
MF
13 GND
12 GND
2 01005 CAP 14 GYRO_PUMP

OMIT_TABLE
CHARGE PUMP 1 C2422
A 0.01UF
10%
25V
2 X5R-CERM
0201
8 7 6 5 4 3
1
D D
HALL EFFECT
BIPOLAR ONE OUTPUT APN 353S3687
C-PANEL HALL EFFECT SENSOR

(B-PANEL HALL EFFECT SENSOR ON HB)
67 60 50 PP3V0_S2R_HALL_FILT
C2560 1
B1
0.22UF
C 20%
6.3V 2
X5R VDD
CRITICAL
C
01005
PLACE_NEAR=U2560.B1:10MM U2560
BU52054GWZ
UCSP
OUT B2 PMU_GPIO_MB_HALL1_IRQ OUT 57 60
GND
A1
A2
B B
8 7 6 5 4 3
1
D D
APN: 518S0692
CRITICAL
L2610
BUTTON CONNECTOR J2610
FF18-6A-R11AD-B-3H
F-RT-SM
240-OHM-25%-0.20A-1.0DCR R2610 1
C 5 OUT GPIO_BTN_VOL_DOWN_L 1 2 GPIO_BTN_VOL_DOWN_R_L 1
1.00K2
60 GPIO_BTN_VOL_DOWN_L_FILT 2 C
01005 3
5% 60 GPIO_BTN_VOL_UP_L_FILT
L2611 1/32W
240-OHM-25%-0.20A-1.0DCR MF
01005
R2611 60 GPIO_BTN_SRL_L_FILT 4
1 2
1.00K2 60 GPIO_BTN_ONOFF_L_FILT 5
5 OUT GPIO_BTN_VOL_UP_L GPIO_BTN_VOL_UP_R_L 1
01005 6
5%
L2612 1/32W
240-OHM-25%-0.20A-1.0DCR MF
01005
R2612
1 2
1.00K2
57 5 OUT GPIO_BTN_SRL_L GPIO_BTN_SRL_R_L 1
01005
5%
L2613 1/32W
240-OHM-25%-0.20A-1.0DCR MF
01005
R2613
1 2
1.00K2
57 5 OUT GPIO_BTN_ONOFF_L GPIO_BTN_ONOFF_R_L 1
01005
5%
1/32W
MF 2 DZ2612 2
01005 DZ2610 201-1
201-1
12.8V-100PF 12.8V-100PF
1 1 DZ2611 2 2
C2610 C2611 1 C2612 1 C2613 DZ2613
82PF 82PF 201-1 201-1
5% 5% 82PF 82PF 1 12.8V-100PF 1 12.8V-100PF
25V 25V 5% 5%
2 CERM 2 CERM 2 25V
CERM 2 25V
CERM
0201 0201 0201 0201
1 1
B B
8 7 6 5 4 3 2 1
1
FRONT CAMERA CONNECTOR

J65 CAMERA CONNECTOR
APN:MLB 516S0876
APN:FLEX 516S0869
D CRITICAL
J2700 D
503548-1820
F-ST-SM
20 19
64 60 22 I2C3_CAM_ALS_SCL_1V8_F 2 1 I2C3_CAM_ALS_SDA_1V8_F 22 60 64
60 22 GPIO_CAM_ALS2SOC_IRQ_L_F 4 3 ISP1_CAM_FRONT_CLK_F 22 60 64
67 60 22 PP3V0_ALS_FILT 6 5
8 7 ISP1_CAM_FRONT_SHUTDOWN_L_F 22 60 67
65 61 22 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 10 9 ISP1_CAM_FRONT_SDA_F 22 60 64
65 61 22 MIPI1C_CAM_FRONT_DATA_FILT_N<0> 12 11 ISP1_CAM_FRONT_SCL_F 22 60 64
14 13 PP2V9_AVDD_CAM_FRONT_FILT 22 60 67
65 61 22 MIPI1C_CAM_FRONT_CLK_FILT_P 16 15 GND_AVDD_CAM_FRONT 22 67
65 61 22 MIPI1C_CAM_FRONT_CLK_FILT_N 18 17 PP1V8_CAM_FRONT_FILT 22 60 67
L2780
80-OHM-25%-500MA
PP1V8_CAM_FRONT_FILT 22 21
62 =PP1V8_CAM_FRONT 1 2 22 60 67
0201
1 C2780 1 C2781
100PF 1.0UF
5% 20%
16V 6.3V
XW2780 XW2781 2 NP0-C0G 2 X5R
SM SM 01005 0201-1
1 2 67 GND_PP1V8_CAM_FRONT 1 2
L2700 CRITICAL
C 62 =PP2V9_CAM_FRONT
80-OHM-25%-500MA
1 2 PP2V9_AVDD_CAM_FRONT_FILT 22 60 67
65 61 22 MIPI1C_CAM_FRONT_CLK_FILT_P 2
L2710
3 MIPI1C_CAM_FRONT_CLK_P OUT 7 61 65
C
0201
1 C2700 1 C2701 MIPI1C_CAM_FRONT_CLK_FILT_N 1 4 MIPI1C_CAM_FRONT_CLK_N
100PF 1.0UF 65 61 22 OUT 7 61 65
5% 20% SYM_VER-2
TCM0605-1
XW2700 XW2701 2 16V
NP0-C0G 2 6.3V
X5R 90-OHM-50MA
SM SM 01005 0201-1
1 2 67 GND_PP2V9_CAM_FRONT 1 2 GND_AVDD_CAM_FRONT 22 67
CRITICAL
L2711
65 61 22 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 2 3 MIPI1C_CAM_FRONT_DATA_P<0> 7 61 65
OUT
65 61 22 MIPI1C_CAM_FRONT_DATA_FILT_N<0> 1 4 MIPI1C_CAM_FRONT_DATA_N<0> 7 61 65
L2702 OUT
SYM_VER-2
80-OHM-25%-500MA TCM0605-1
90-OHM-50MA
62 =PP3V0_ALS 1 2 PP3V0_ALS_FILT 22 60 67
0201
1 C2706 1 C2707
100PF 1.0UF
5% 20%
16V
2 NP0-C0G
6.3V
2 X5R
01005 0201-1
B FL2730 DCR 0.45

B
70-OHM-300MA FL2750 DCR 0.45
70-OHM-300MA
64 61 13 5 I2C3_SCL_1V8 1 2 I2C3_CAM_ALS_SCL_1V8_F 22 60 64
IN ISP1_CAM_FRONT_SCL 1 2 ISP1_CAM_FRONT_SCL_F
64 7 IN 22 60 64
01005-1
01005-1
1 C2730 1 C2750
27PF
5% 27PF
2 16V
NP0-C0G
5%
01005 2 16V
NP0-C0G
01005
FL2731 DCR 0.45 FL2751 FL2770

70-OHM-300MA DCR 0.45 DCR 0.45
70-OHM-300MA 70-OHM-300MA
64 61 13 5 I2C3_SDA_1V8 1 2 I2C3_CAM_ALS_SDA_1V8_F 22 60 64
IN ISP1_CAM_FRONT_SDA 1 2 ISP1_CAM_FRONT_SDA_F GPIO_CAM_ALS2SOC_IRQ_L 1 2 GPIO_CAM_ALS2SOC_IRQ_L_F
64 7 IN 22 60 64 5 IN 22 60
01005-1
01005-1 01005-1
1 C2731 1 C2751
27PF
5%
16V
27PF
2 NP0-C0G 5%
01005 2 16V
NP0-C0G
01005
FL2740 FL2760
70-OHM-300MA DCR 0.45 DCR 0.70
150OHM-25%-200MA-0.7DCR
ISP1_CAM_FRONT_SHUTDOWN_L 1 2 ISP1_CAM_FRONT_SHUTDOWN_L_F 1 2
67 7 IN 22 60 67
64 7 IN ISP1_CAM_FRONT_CLK ISP1_CAM_FRONT_CLK_F 22 60 64
A 01005-1 01005 A
1
R2740 1 C2740
100K 27PF
1 C2760
5% 5% 56PF
1/32W 5%
MF 2 16V
NP0-C0G 2 16V
2 01005 01005 NP0-C0G
01005
8 7 6 5 4 3 2 1
1
L2860
80-OHM-25%-500MA
62
=PP2V9_CAM_REAR 1 2 PP2V9_AVDD_CAM_REAR_FILT 23 60 67
0201
1 C2860 1 C2861
100PF 1.0UF
5% 20%
16V
2 NP0-C0G
01005
6.3V
2 X5R
0201-1 REAR CAMERA CONNECTOR
FLEX: 516S0974
D MLB: 516S0973 D
L2870
80-OHM-25%-500MA
CRITICAL
=PP2V6_CAM_REAR_AF 1 2 PP2V6_CAM_REAR_AF_FILT
62 23 60 67
J2800
0201 AA07-S022VA1
1 C2870 1 C2875 1 C2876 24
F-ST-SM
27PF 100PF 1.0UF
5% 5% 20% 23
2 16V
NP0-C0G
16V
2 NP0-C0G 6.3V
2 X5R
01005 01005 0201-1
64 60 23 ISP0_CAM_REAR_SCL_F 1 2 ISP0_CAM_REAR_CLK_F 23 60 64
64 60 23 ISP0_CAM_REAR_SDA_F 3 4
67 60 23 ISP0_CAM_REAR_SHUTDOWN_L_F 5 6 MIPI0C_CAM_REAR_DATA_FILT_P<0> 23 61 65
67 60 23 PP1V3_CAM_REAR_FILT 7 8 MIPI0C_CAM_REAR_DATA_FILT_N<0> 23 61 65
9 10
L2880 67 60 23 PP1V8_CAM_REAR_FILT 11 12 MIPI0C_CAM_REAR_CLK_FILT_P 23 61 65
80-OHM-25%-500MA CAM_REAR_VSYNC 13 14 MIPI0C_CAM_REAR_CLK_FILT_N 23 61 65
PP2V9_AVDD_CAM_REAR_FILT 15 16
62 =PP1V8_CAM_REAR 1 2 PP1V8_CAM_REAR_FILT 23 60 67
67 60 23
0201
17 18 MIPI0C_CAM_REAR_DATA_FILT_P<1> 23 61 65
19 20 MIPI0C_CAM_REAR_DATA_FILT_N<1>
1 C2885 1 C2886 21 22
23 61 65
100PF 1.0UF 67 60 23 PP2V6_CAM_REAR_AF_FILT

5% 20%
2 16V
NP0-C0G 2 6.3V
X5R
01005 0201-1 25
1 C2800 26
1000PF
10%
2 6.3V
X5R-CERM
01005
C L2890
80-OHM-25%-500MA
C
62 =PP1V3_CAM_REAR 1 2 PP1V3_CAM_REAR_FILT 23 60 67
0201
1 C2890 1 C2895 1 C2896
27PF 100PF 1.0UF
5% 5% 20%
2 16V
NP0-C0G
16V
2 NP0-C0G 2 6.3V
X5R
01005 01005 0201-1
CRITICAL
L2812
65 61 23 MIPI0C_CAM_REAR_CLK_FILT_P 2 3 MIPI0C_CAM_REAR_CLK_P 7 61 65
IN
65 61 23 MIPI0C_CAM_REAR_CLK_FILT_N 1 4 MIPI0C_CAM_REAR_CLK_N 7 61 65
IN
SYM_VER-2
TCM0605-1
90-OHM-50MA
CRITICAL
L2813
65 61 23 MIPI0C_CAM_REAR_DATA_FILT_P<0> 2 3 MIPI0C_CAM_REAR_DATA_P<0> 7 61 65
IN
65 61 23 MIPI0C_CAM_REAR_DATA_FILT_N<0> 1 4 MIPI0C_CAM_REAR_DATA_N<0> IN 7 61 65
SYM_VER-2
TCM0605-1
90-OHM-50MA
CRITICAL
L2814
B 65 61 23 MIPI0C_CAM_REAR_DATA_FILT_P<1> 2 3 MIPI0C_CAM_REAR_DATA_P<1> IN 7 61 65 B
65 61 23 MIPI0C_CAM_REAR_DATA_FILT_N<1> 1 4 MIPI0C_CAM_REAR_DATA_N<1> IN 7 61 65
SYM_VER-2
TCM0605-1
90-OHM-50MA
FL2850 DCR 0.45 FL2851 DCR 0.45

70-OHM-300MA 70-OHM-300MA
64 7 ISP0_CAM_REAR_SCL 1 2 ISP0_CAM_REAR_SCL_F 23 60 64 64 7 ISP0_CAM_REAR_SDA 1 2 ISP0_CAM_REAR_SDA_F 23 60 64
IN IN
01005-1 01005-1
1 C2850 1 C2851
27PF 27PF
5% 5%
16V
2 NP0-C0G 16V
2 NP0-C0G
01005 01005
DCR 0.7
FL2852 FL2853
70-OHM-300MA DCR 0.45
150OHM-25%-200MA-0.7DCR
A 67 7 IN ISP0_CAM_REAR_SHUTDOWN_L 1
01005-1
2 ISP0_CAM_REAR_SHUTDOWN_L_F 23 60 67
64 7 IN ISP0_CAM_REAR_CLK 1
01005
2 ISP0_CAM_REAR_CLK_F 23 60 64
1
R2850 1 C2852 1
100K 27PF
C2854
5% 5% 56PF
1/32W 16V 5%
MF 2 NP0-C0G 16V
2 NP0-C0G
2 01005 01005 01005
8 7 6 5 4 3
1
D D
COMPASS
APN 338S1014
FL2940 FL2941
120-OHM-25%-250MA-0.5DCR 120-OHM-25%-250MA-0.5DCR
62 =PP3V0_S2R_COMP 1 2 67 60 PP3V0_COMP 67 60 24 PP1V8_COMP 1 2 =PP1V8_S2R_COMP 62
01005 01005
1 C2940
B1
C4
C2945 1 1 C2946
1.0UF 0.1UF 0.1UF
20% 20% VDD VID 20%
6.3V 2 2 6.3V CRITICAL 2 6.3V
X5R-CERM
X5R X5R-CERM U2940 01005
0201-1 01005
GND_COMP AK8963C GND_COMP 24 67
67 24
CSP
D1 CAD0 SCL/SK A3 SPI_OSCAR_SCLK IN 19 64
D2 CAD1 SDA/SI A4 SPI_OSCAR_MOSI IN 19 64
C NC_COMPASS_TST1 NO_TEST=TRUE C2 TST1 CSB* A2 SPI_OSCAR2COMPASS_CS_L IN 19 64

R2947
C
B3 RSV
15.0 2
NC_COMPASS_RSV NO_TEST=TRUE SO B4 64 SPI_OSCAR_MISO_COMP1 1 SPI_OSCAR_MISO OUT 19 64
5%
1/32W
NC_COMPASS_TRG NO_TEST=TRUE C3 TRG DRDY A1 COMPASS2OSCAR_INT OUT 19 MF
01005
67 60 24 PP1V8_COMP D4 RST*
VSS
TO VID WHEN NOT USED XW2940
C1
SHORT-10L-0.25MM-SM
67 24 GND_COMP 1 2
TIE CSB* TO VID FOR I2C MODE
B B
A A
8 7 6 5 4 3 2 1
1
AP INTERFACE & DEBUG CONNECTOR

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
DEBUG CONNECTOR
D
=PPBATT_VCC_BB
IN 26 34 35 36 37 38 39 40 62 D
NOSTUFF
J3003
AXE654124
M-ST-SM
56 55
PROBE POINTS 2 1
4 3
6 5
PP3000
P4MM 60 27 OUT PS_HOLD_PMIC 8 7 GPIO_SOC2BB_RST_L
OUT 5 27 60 67
SM
1 BB_ERROR_FLAG 60 27 5 OUT GPIO_SOC2BB_RADIO_ON_L 10 9 PP_SMPS3_MSME_1V8 IN 25 26 28 29 31 60
PP 29 68
XW3002 67 60 57 27 OUT PMU_GPIO_PMU2BBPMU_RST_L 12 11 RESET_SOC_L OUT 4 13 47 57 60 61 67
PP3001
P4MM
SHORT-10L-0.25MM-SM
68 28 27 IN PMIC_RESOUT_L 14 13
SM 64 47 BI USB_BB_N 1 2
16 15
1 SLEEP_CLK_32K 27 28 68
UART3_BB2SOC_TX IN 5 29 47 64
PP
18 17 GPIO_DEBUG_LED 29
IN
PP3002
P4MM 64 61 28 BI USB_BB_DEBUG_N 20 19
SM
1 PMIC_SSBI 64 61 28 USB_BB_DEBUG_P 22 21 UART3_SOC2BB_TX 5 29 47 64
PP 27 28 68 BI OUT
XW3003
SHORT-10L-0.25MM-SM
67 61 28 OUT DEBUG_RST_L 24 23 UART3_BB2SOC_RTS_L IN 5 29 64
BB_JTAG_TMS 26 25 UART3_SOC2BB_RTS_L
PP3003
P4MM 64 47 BI USB_BB_P 1 2
64 61 28 5 OUT OUT 5 29 64
64 61 28 5 BB_JTAG_TRST_L 28 27
SM OUT
1 19P2M_MDM 30 29
PP 27 28 68
64 61 28 5 OUT BB_JTAG_TCK
64 61 28 5 BB_JTAG_TDO 32 31
IN
PP3008
P4MM 64 61 28 5 OUT BB_JTAG_TDI 34 33 PMU_GPIO_BB_VBUS_DET OUT 28 57 61 67
SM
1 WTR_SSBI_TX_GPS 28 BB_JTAG_RTCLK 36 35
PP 29 30 OUT
38 37
C PP3009
P4MM
SM
68 29 25 OUT LAT_SW1_CTL
GPIO48/BOOT_CONFIG_6 40
42
39
41
C
1 WTR_SSBI_PRX_DRX 29 30
PP GPIO54/BOOT_CONFIG_0 44 43
68 40 29 OUT 2G_FEM_S1
PP3010
P4MM 60 57 29 IN
PMU_GPIO_BB2PMU_HOST_WAKE 46 45 HSIC2_BB2SOC_DEVICE_RDY IN 5 29 64
SM GPIO53/BOOT_CONFIG_1 48 47
1 WTR_RX_ON 29 30 68
68 40 29 25 OUT 2G_FEM_S4
PP GPIO51/BOOT_CONFIG_3 50 49
29 OUT GPIO_51 GPIO_BB2SOC_RESET_DET_L IN 5 29 67
PP3011
P4MM
52 51 HSIC2_SOC2BB_HOST_RDY
IN 5 29 64
SM
1 WTR_RF_ON 54 53
PP 29 30 68
PP3012
P4MM
58 57
SM
1 UART_WLAN2BB_LTE_COEX 29 46
PP
PP3013
P4MM
SM GPIO/BOOT_CONFIG CONFIGURATION
1 UART_BB2WLAN_LTE_COEX 29 46
PP
PP_SMPS3_MSME_1V8 25 BOOT_CONFIG 6 5 4 3 2 1 0
26 28 29 31 60 BOOT OPTIONS SW REGISTER
VALUE 47 48 49 50 51 52 53 54 55
NOSTUFF NOSTUFF BOOT_DEFAULT_OPTION
1 1 0X00 X 0 0 0 0 0 0 0 X
R3002 R3003
10K 10K
5% 5% BOOT_NAND_OPTION 0X01 X 1 0 0 0 0 0 1 X
1/32W 1/32W
MF MF
2 01005 2 01005
BOOT_HSIC_OPTION 0X02 X 1 0 0 0 0 1 0 X
BOOT_USB_OPTION 0X03 X 1 0 0 0 0 1 1 X
LAT_SW1_CTL GPIO48/BOOT_CONFIG_6
68 29 25
GPIO53/BOOT_CONFIG_1 ENABLE SAHARA PROTOCOL 0X08 X 1 0 0 1 0 X X X
68 40 29 25 2G_FEM_S4
B J3002
MM4829-2702
F-ST-SM
B
NOSTUFF
1 HSIC2_BB_DATA 4 28 61 64
2
3
4
J3001
MM4829-2702
F-ST-SM
NOSTUFF 1 HSIC2_BB_STB 4 28 61 64
2
3
4
A
8 7 6 5 4 3
1
BASEBAND PMU (1 OF 2)
D PP_LVS1 28 68
D
OUT
PP_VREG 68
INTERNAL USE ONLY
1 C3230
1.0UF
20%
6.3V
2 X5R
L3200 0201-1
2.2UH-20%-1.2A-0.15OHM
1 2 PP_SMPS1_MSMC_1V05 OUT 28 60 68
0806
CRITICAL 1 C3229
22UF
20%
6.3V
2 X5R-CERM-1
603
L3201 S1_GND 26 27
2.2UH-20%-1.2A-0.15OHM
1 2 PP_SMPS2_RF1_1V3 OUT 28 31 60 68
0806
CRITICAL 1 C3228
22UF
20%
6.3V
2 X5R-CERM-1
603
L3202 S2_GND 26 27
REF_BYP U3300 2.2UH-20%-1.2A-0.15OHM
PM8018-0 1 2 PP_SMPS3_MSME_1V8
C 1 C3209
0.1UF
BGA
VREG
0806
CRITICAL
OUT 25 26 28 29 31 60
C
20% (SYM 5 OF 5) 1 1 C3227
XW3200 6.3V
2 X5R-CERM CRITICAL C3226 0.1UF
SHORT-10L-0.1MM-SM
28 REF_BYP VOUT_LVS1 53 22UF
01005 20% 20%
1 2 34 REF_GND 6.3V 4V
2 X5R-CERM-1 2 X5R
REF_GND VREG_RFCLK 13 603 01005
S3_GND NOSTUFF
26 27
=PPBATT_VCC_BB 104 VDD_S1 92 68 PP_VSW_S1 L3203

62 40 39 38 37 36 35 34 25 IN 2.2UH-20%-1.2A-0.15OHM
VSW_S1 97
1 2 PP_SMPS4_RF2_2V05 OUT 26 31 60 68
1 C3200 1 C3201 1 C3202 1 C3203 VREG_S1 79
0806
10UF 10UF 10UF 56PF 95 VDD_S2 90 68 PP_VSW_S2 CRITICAL
20% 20% 20% 5%
2 6.3V 2 6.3V 2 6.3V 2 16V VSW_S2 102 1 C3225
CERM-X5R CERM-X5R CERM-X5R NP0-C0G
0402-2 0402-2 0402-2 01005
VREG_S2 83 22UF
20%
6 42 6.3V
2 X5R-CERM-1
18 VSW_S3 48 68 PP_VSW_S3 603
VDD_S3 S4_GND
24 VSW_S5_2 100 L3204 26 27
VREG_S3 12 2.2UH-20%-2.34A-0.113OHM
98 VDD_S4 81 68 PP_VSW_S4 1 2 PP_SMPS5_DSP_1V05 OUT 26 60 68
VSW_S4 87 2520-SM
105 CRITICAL
VREG_S4 1 C3224
89 82 68 PP_VSW_S5 22UF
VDD_S5 VSW_S5 20%
101 88 6.3V
2 X5R-CERM-1
VREG_S5 76 603
1 C3204 1 C3205 1 C3206 1 C3207 1 C3208 S5_GND
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 26 27
20% 20% 20% 20% 20%
10V 10V 10V 10V 10V INTERNAL USE ONLY
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 8 VDD_XO 20 PP_LDO1
0402 0402 0402 0402 0402 VREG_XO 60 68
44 VDD_L2_L3 VREG_L2 31 PP_LDO2_XO_HS_1V8 28 68
B 26
27
S1_GND 26
27
S2_GND 26
27
S3_GND 26
27
S4_GND 26
27
S5_GND
78 VDD_L4
VREG_L3 32
84
PP_LDO3_AMUX_1V8
PP_LDO4_VDDA_3V3
OUT
OUT 27 28 68 B
VREG_L4 OUT 28 68
VREG_L5 11 PP_LDO5_GPS_LNA_2V5 OUT 42 68

5 VDD_L5_L6_L13_L14 VREG_L6 17 PP_LDO6_RUIM_1V8 OUT 28 44 60 68
VREG_L13 23 PP_LDO13_VDDPX_2V95 OUT 28 68
VREG_L14 29 PP_LDO14_2V65 OUT 33 40 41 68
68 60 31 26 IN
PP_SMPS4_RF2_2V05 75 VDD_L7 VREG_L7 63 PP_LDO7_DAC_1V8
OUT 28 68
60 31 29 28 26 25 IN
PP_SMPS3_MSME_1V8 58 VDD_L8 VREG_L8 54 PP_LDO8_VDDPX_1V2 OUT 28 68
70 VDD_L9 VREG_L9 77 PP_LDO9_PLL_1V05 OUT 28 68
68 60 26 IN
PP_SMPS5_DSP_1V05 59 VDD_L10_L11 VREG_L10 65 PP_LDO10_ADSP_1V05 OUT 28 68
VREG_L11 55 PP_LDO11_MDSP_FW_1V05 OUT 28 68

64 VDD_L12 VREG_L12 43 PP_LDO12_MDSP_SW_1V05 OUT 28 68
1 C3211 1 C3213 1 C3215 1 C3216 1 C3218 1 C3220 1 C3222 1 C3231

1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF 10UF 1.0UF
20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 X5R
0201-1 0201-1 0201-1 0201-1 0402-2 0402-2 0402-2 0201-1
1 C3210 1 C3212 1 C3214 1 C3217 1 C3219 1 C3221 1 C3223

1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF
20% 20% 20% 20% 20% 20% 20%
6.3V
2 X5R 2 6.3V
X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
0201-1 0201-1 0201-1 0201-1 0201-1 0402-2 0402-2
8 7 6 5 4 3
1
BASEBAND PMU (2 OF 2)
PA_ID MAV VER
0.1V 8.7
68 28 27 26 PP_LDO3_AMUX_1V8 0.3V 8.6

IN
D 1
R3304
1
R3306
0.5V 8.5 D
BOARD_ID REVISION 100K 1%
1.00M
1.1V 7.7
1% 1/32W
1/32W
0.7V PROTO1 MF MF
2 01005
2 01005 1.3V 7.6
0.9V PROTO2 1.5V BOARD_ID PA_ID 0.1V
1.5V 7.5
1 1
1.1V EVT1 R3305 R3307
499K 50K
1% 1%
1.3V EVT2 1/32W
MF
1/32W
MF U3300
2 01005 2 01005 PM8018-0
1.5V DVT BGA
MPP MISC
(SYM 4 OF 5)
1.7V PVT 85 MPP_01 GPIO_01 33
NC
67 MPP_02 GPIO_02 38
NC
VDDPX_BIAS 66 MPP_03 GPIO_03 50
28 OUT NC
72 MPP_04 GPIO_04 60
NC NC
BB GPIO_29 PRODUCT_ID NC
73 MPP_05 GPIO_05 71
NC
VREF_DAC_BIAS 80 MPP_06 GPIO_06 49
29 IN NC
1 (1.8V) JXX
R3300 0 (NC, PD) NXX
1.00K2 PA THERMISTOR REMOVED TO MATCH N41, AP SECTION
67 60 25 5 IN GPIO_SOC2BB_RST_L 1
NEEDS ITS OWN THERMISTOR PLACED NEAR THE PAS.
5%
1/32W
MF
U3300
01005 PM8018-0
BGA
C R3301
20.0K2
CONTROL
(SYM 1 OF 5) C
68 29 PS_HOLD 1 60 25 PS_HOLD_PMIC 47 PS_HOLD LED_DRV_N 86
IN NC
5%
1/32W
MF
01005
60 25 5 GPIO_SOC2BB_RADIO_ON_L 69 KPD_PWR* PON_RESET* 4 PMIC_RESOUT_L 25 28 68
IN OUT
67 60 57 25 IN PMU_GPIO_PMU2BBPMU_RST_L16 PM_RESIN_N
PM_USR_INT_N 21 PM_USR_IRQ_L OUT 29
NC 62 OPT_1 PM_MDM_INT_N 14 PM_MDM_IRQ_L OUT 29

74 OPT_2
NC
PON_TRIG 41
68 28 25 BI PMIC_SSBI 68 SSBI BAT_ID 35
GND NEEDS TO BE CLEARED UNDER THIS CRYSTAL

TO MINIMIZE THERMAL DRIFT
Y3300
19.200MHZ
2.0X1.6-SM
1 3 19P2M_XTAL_IN
4 2 U3300
CRITICAL PM8018-0
BGA
CLOCKS
(SYM 2 OF 5)
1 XTAL_19M_IN
B 19P2M_XTAL_OUT 2 XTAL_19M_OUT XO_OUT_A0 19 19P2M_WTR
19P2M_MDM
OUT 30 68 B
PP_LDO3_AMUX_1V8 XO_OUT_D0 25 OUT 25 28 68
68 28 27 26 IN
XW3300
SM
U3300 1 2
1
R3303 3 XTAL_32K_IN XO_OUT_A1 37
PM8018-0 NC
100K 15 XTAL_32K_OUT
BGA 1% NC
INPUT PWR XW3301 1/32W XO_OUT_D0_EN 9 19P2M_CLK_EN 28 68
(SYM 3 OF 5) MF IN
SHORT-10L-0.25MM-SM 45 GND1
91 1 2 2 01005
GND_S1 26 S1_GND
103
27 GND0 SLEEP_CLK 26 SLEEP_CLK_32K OUT 25 28 68
GND_S2 96 26 S2_GND XW3302 XO_THERM_Y1 10 XO_THERM
30 SM
S3_GND 1 2 1 22 XOADC_GND
GND_S3 36
26
C3300
93 1000PF RSVD 7
10%
GND_S4 99
26 S4_GND XW3303 6.3V
2 X5R-CERM
SHORT-10L-0.25MM-SM
01005
GND_S5 94 26 S5_GND 1 2
39 XW3304
SM XO_GND
51
1 2
57 VCOIN 61
NC
56 2
GND
46 XW3305
52 SHORT-10L-0.1MM-SM
40 1
8 7 6 5 4 3
1
BASEBAND (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. U3400
68 60 28 26 IN PP_SMPS1_MSMC_1V05 MDM9615M
68 28 26 IN PP_LDO8_VDDPX_1V2 68 28 26 IN PP_LDO4_VDDA_3V3 BGA
1 C3400 1 C3401 1 C3402 1 C3403 1 C3404 (6 OF 6)
1.0UF
20% 20%
1.0UF 1.0UF
20%
1.0UF
20%
1.0UF
20%
1 C3431 1 C3432 1 C3433 1 C3434 A21 GND M14
6.3V 6.3V 6.3V 6.3V 6.3V 1.0UF 0.22UF 1.0UF 0.22UF CRITICAL
2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 20% 20% 20% 20% AA1 M15
0201-1 0201-1 0201-1 0201-1 0201-1 6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R
AA21 M16
0201-1 01005 0201-1 0201
B2 M17
D B7
B11
M19
N6
D
PP_LDO9_PLL_1V05 PP_LDO10_ADSP_1V05 68
PP_LDO11_MDSP_FW_1V05
68 28 26 IN 68 28 26 IN 28 26 IN B14 N7
1 C3414 B15 N10
1 C3405 1 C3406 1 C3407 1 C3408 1 C3413 1.0UF
1 C3418 1 C3419 1 C3420
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 20% 1.0UF 1.0UF 1.0UF C19 N11
20% 20% 20% 20% 20% 6.3V 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 2 X5R 6.3V 6.3V 6.3V F6 N14
2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 0201-1 2 X5R 2 X5R 2 X5R
0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 F7 P6
F10 P10
F15 P11
F16 GND R6
PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8 PP_LDO12_MDSP_SW_1V05 F19 R10
60 31 29 28 26 25 IN 28 26 25 IN 68 28 26 IN
60 31 29 G2 R11
1 C3409 1 C3410 1 C3411 1 C3412 1 C3415 1 C3416 1 C3417 G6 R15
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF G10 R16
20% 20% 20% 20% 20% 20% 20%
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R G11 R17
0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1
G15 R19
G16 T10
G17 T12
G20 T13 U3400
H6 T14 MDM9615M
BGA
U3400 H10 GND U2 (2 OF 6) R3403
MDM9615M H11 V19 EBI1_EBI2
EBI1_CAL C21 EBI1_CAL 1
240 2
BGA H15
(5 OF 6) 1%
H16 F11 1/32W
PWR D21 EBI2_NAND_CS* EBI2_AD_0 J20 MF
68 60 28 26 IN
PP_SMPS1_MSMC_1V05 F8 AA20 PP_SMPS3_MSME_1V8 IN 25 26 28 29 31 60 J6 J16 NC NC 01005
E19 EBI2_OE* EBI2_AD_1 J19
F9 B19 J7 K16 NC NC
PP_SMPS1_MSMC_1V05 D20 EBI2_WE* EBI2_AD_2 G19
F12 VDD_DDR F20 J10 L16 NC NC
C 68 60 28 26 IN
F13 M20 J11 T6 NC
D19 EBI2_BUSY* EBI2_AD_3
EBI2_AD_4
H20
J21
NC C
1 C3421 F14 J14 T7 NC
EBI2_AD_5 H19
1.0UF G9 C5 PP_LDO10_ADSP_1V05 IN 26 28 68 J15 T11 NC
20% C20 EBI2_CLE* EBI2_AD_6 H21
6.3V
2 X5R G12 C6 K6 U9 NC NC
GND_ANA E20 EBI2_ALE* EBI2_AD_7 E21
0201-1 H9 E6 K7 U12 NC NC
VDD_ADSP
H12 E7 K10 W7
J8 F5 K11 W14
J9 K14 Y7
J12 T15 PP_LDO11_MDSP_FW_1V05 IN 26 28 68
K15 Y11
J13 T16 K20 Y15
K8 T17 L2 Y18
K9 U14 L6 U13
K12 VDD_MDSP_FW U15 L7 W13
K13 U16 L10
L8 U17 L11
VDD_CORE
L9 U19 L14
L12 T19 L15
L13 M6
M8 N15 PP_LDO12_MDSP_SW_1V05 IN 26 28 68 M7
M9 N16 M10
M12 N17 PP_LVS1 IN 26 68 M11
M13 N19
1
N8 VDD_MDSP_SW P15 R3400
N9 P16
470K
5%
N12 P17 1/32W
MF
N13 P19 2 01005 U3400
B P9
P12
MDM9615M
BGA
B
VDD_QFUSE_PRG B13
R9 (1 OF 6)
R12 PP_LDO2_XO_HS_1V8 DIGITAL
VDD_USB_1P8 E12 IN 26 68 68 27 25 IN PMIC_RESOUT_L Y20 RESIN* RESOUT* U20 NC
T8 VDD_USB_3P3 E10 PP_LDO4_VDDA_3V3 IN 26 28 68 67 61 25 IN DEBUG_RST_L Y4 SRST*
T9 1 C3422 68 27 25 SLEEP_CLK_32K AA19 SLEEP_CLK
IN
VDD_HVPAD_BIAS E16 VDDPX_BIAS 27
1.0UF
IN 20%
68 28 26 IN
PP_LDO9_PLL_1V05 C17 6.3V
2 X5R 64 61 25 5 IN BB_JTAG_TCK Y3 TCK TDO AA3 BB_JTAG_TDO OUT 5 25 61 64
C18 K17 PP_LDO9_PLL_1V05
1 C3423 0201-1 BB_JTAG_TDI AA2 TDI RTCK Y2 BB_JTAG_RTCLK
IN 26 28 68
0.1UF 64 61 25 5 IN OUT 25
E17 VDD_PLL1 L17 20% 64 61 25 5 IN BB_JTAG_TMS W4 TMS R3402
PP_LDO3_AMUX_1V8 2 4V 240
F17 VDD_PLL2 W12 IN 26 27 68
X5R
01005 64 61 25 5 IN BB_JTAG_TRST_L AA4 TRST* HSIC_CAL A8 68 50_HSIC_CAL 1 2
G7 NOSTUFF HSIC_DATA C7 HSIC2_BB_DATA 4 25 61 64 1%
BI 1/32W
G8 VDD_A2 U6 PP_LDO7_DAC_1V8 IN 26 68 60 TP_BB_TEST_MODE_0 W20 MODE_0 HSIC_STB B8 HSIC2_BB_STB BI 4 25 61 64 MF
01005
G13 VDD_A2 U7
PP_SMPS2_RF1_1V3 60 TP_BB_TEST_MODE_1 Y19 MODE_1
IN 26 31 60 68
G14 GND AA11
H7 GND AA18 1 C3424 1 C3425 68 27 25 IN
19P2M_MDM V20 CXO
H8 1.0UF 1.0UF 19P2M_CLK_EN U21 CXO_EN
20% 20% 68 27 OUT
6.3V 6.3V
H13 VDD_A1 W9 2 X5R 2 X5R 68 27 25 PMIC_SSBI Y21 SSBI_PMIC
VDD_MEM 0201-1 0201-1 BI
H14 VDD_A1 AA7 E8
NC
P7 GND AA15 64 61 25 USB_BB_DEBUG_P C11 USB_HS_DP C8
BI NC
P8 USB_BB_DEBUG_N E11 USB_HS_DM DNC B9
PP_SMPS3_MSME_1V8
64 61 25 BI NC
P13 A15 RREFEXT A12 USB_HS_REXT A9
IN 25 26 28 29 31 60
NC
P14 G1 C12 USB_HS_ID
NC
R7 G21 1 C3426 B12 USB_HS_SYSCLK
R8 VDD_P3 L1 1.0UF 61
25 IN PMU_GPIO_BB_VBUS_DET C10 USB_HS_VBUS
20% 57
R13 U1 6.3V 67 E9
A R14 W19
2 X5R
0201-1 C9
NC
NC A
DNC B10
1 NC
PP_SMPS3_MSME_1V8 A14 VDD_P4 A2 PP_LDO6_RUIM_1V8 R3401 A10
60 31 29 28 26 25 IN IN 26 44 60 68
NC
A19 VDD_P5 A3 PP_SMPS3_MSME_1V8 25 26 28 29 31 60
200
IN 1%
F21 VDD_P6 A7 PP_LDO8_VDDPX_1V2 26 28 68
1/32W SDC1_CMD K19
VDD_P1 IN MF NC
M1 VDD_P7 A11 PP_SMPS3_MSME_1V8 2 01005 SDC1_CLK L21
IN 25 26 28 29 31 60
NC
M21
SDC1_DATA0 L19
NC
PP_LDO13_VDDPX_2V95 K21 VDD_P2 SDC1_DATA1 L20
68 26 IN NC
SDC1_DATA2 N20
NC
SDC1_DATA3 N21
NC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8 7 6 5 4 3 2 1
1
BASEBAND (2 OF 2)
60 31 29 28 26 25 PP_SMPS3_MSME_1V8
D CELL
1 CELL
D
U3400 R3502 CELL
MDM9615M 10K
5%
U3400
BGA 1/32W MDM9615M
(4 OF 6) MF BGA
ANALOG 2 01005 (3 OF 6)
DAC0_VREF W5 VREF_DAC_BIAS OUT 27
CELL B6 GPIO P3
1 C3500 60 44 IN SIM_TRAY_DETECT GPIO_0 GRFC_14 GPIO_44 PA_R1 OUT 34 35 36 37 38 68
68 30 IN PRX_BB_I_P U8 BBRX_IP_CH0 0.1UF 60 44 OUT SIMCRD_RST_CONN A6 GPIO_1 GRFC_15 GPIO_45 R1 DRX_ASM_V2 OUT 41 68
20%
PRX_BB_I_N W8 BBRX_IM_CH0 6.3V SIMCRD_CLK_CONN A5 GPIO_2 GRFC_18,SW GPIO_46 N5
68 30 IN 2 X5R-CERM 60 44 OUT NC
68 30 IN PRX_BB_Q_P Y8 BBRX_QP_CH0 TX_DAC1_QP Y13 NC 01005 60 44 BI SIMCRD_IO_CONN B5 GPIO_3 GRFC_19,SW GPIO_47 N3 2G_FEM_S6 OUT 40 68
PRX_BB_Q_N AA8 BBRX_QM_CH0 TX_DAC1_QM AA13 C4 GPIO_4 GRFC_20 GPIO_48 P2 LAT_SW1_CTL BOOT_CONFIG_6
68 30 IN NC BB_SPI_TO_PAC_CLK NC OUT 25 68
B3 GPIO_5 GRFC_21 GPIO_49 M2 GPIO_BB2SOC_GSM_TXBURST BOOT_CONFIG_5
BB_SPI_TO_PAC_CS NC OUT 5
DRX_BB_I_P Y10 BBRX_IP_CH1 TX_DAC0_IP Y6 TX_BB_I_P B4 GPIO_6 GRFC_22 GPIO_50 N1 ELNA CONTROL BOOT_CONFIG_4
68 30 IN BI 30 68
PAC_TO_BB_SPI_DATA_MISO NC NC
DRX_BB_I_N AA10 BBRX_IM_CH1 TX_DAC0_IM AA6 TX_BB_I_N A4 GPIO_7 GRFC_23 GPIO_51 N2 GPIO_51 BOOT_CONFIG_3
68 30 IN OUT 30 68
BB_SPI_TO_PAC_DATA)MOSI NC IN 25
68 30 DRX_BB_Q_P Y9 BBRX_QP_CH1 TX_DAC0_QP Y5 TX_BB_Q_P 30 68 29 SPI_CLK A16 GPIO_8 GRFC_24,SW GPIO_52 M3 2G_FEM_S5 BOOT_CONFIG_2 40 68
IN OUT OUT OUT
68 30 DRX_BB_Q_N AA9 BBRX_QM_CH1 TX_DAC0_QM AA5 TX_BB_Q_N 30 68 29 SPI_CS_L A13 GPIO_9 GRFC_25,SW GPIO_53 L3 2G_FEM_S4 BOOT_CONFIG_1 25 40 68
IN OUT OUT OUT
TX_DAC0_IREF W6 WTR_BB_TX_DAC_IREF OUT 30 29 IN SPI_DATA_MISO E14 GPIO_10 GRFC_26,SW GPIO_54 M5 2G_FEM_S1 BOOT_CONFIG_0
OUT 25 40 68
W17 BBRX_IP_CH2 29 SPI_DATA_MOSI E13 GPIO_11 GRFC_27,SW GPIO_55 L5 2G_FEM_S0 40 68
NC OUT OUT
W18 BBRX_IM_CH2 TX_DAC1_IP Y14 NC UART3_BB2SOC_RTS_L C14 GPIO_12 GRFC_28,SW GPIO_56 K1 DRX_ASM_V3
NC 64 25 5 OUT OUT 41 68
W15 BBRX_QP_CH2 TX_DAC1_IM AA14 UART3_SOC2BB_RTS_L C13 GPIO_13 GRFC_29,SW GPIO_57 K5 2G_FEM_S2
NC NC 64 25 5 IN OUT 33 40 68
W16 BBRX_QM_CH2 64 47 25 5 UART3_SOC2BB_TX E15 GPIO_14 GRFC_30,SW GPIO_58 K3 2G_FEM_S3 33 40 68
NC OUT OUT
CELL 64 47 25 5 IN UART3_BB2SOC_TX A18 GPIO_15 GRFC_31 GPIO_59 K2
NC
H17
NC
R3531 NC
C15 GPIO_16 GRFC_32 GPIO_60 J2 DCDC_EN OUT 39
0.00
J17 OSCAR2RADIO_CONTEXT_A 1 2 OSCAR_CONTEXT_A_MDM B16 GPIO_17 GRFC_33 GPIO_61 J5 DCDC_MODE
NC 46 19 IN OUT 39 68
68 30 IN GPS_BB_I_P W10 GNSS_BB_IP 0% 5 IN GPIO_SOC2BB_WAKE_MODEM B18 GPIO_18 GRFC_34 GPIO_62 J1 DRX_ASM_V4 OUT 41 68
1/32W
GPS_BB_I_N U10 GNSS_BB_IM V21 MF GPIO_DEBUG_LED C16 GPIO_19 GRFC_35,SWGPIO_63 J3
68 30 IN NC 01005
25 OUT NC
GPS_BB_Q_P W11 W21 A17 H3 BB_PDM
C 68 30
68 30
IN
IN GPS_BB_Q_N U11
GNSS_BB_QP
GNSS_BB_QM
DNC
Y12
NC
NC
NC
NC
B21
GPIO_20
GPIO_21
GRFC_36 GPIO_64
GRFC_37 GPIO_65 H5 UART_WLAN2BB_LTE_COEX
OUT
IN
39 68
25 46
C
Y16 B20 GPIO_22 GRFC_38 GPIO_66 G5 UART_BB2WLAN_LTE_COEX 25 46
NC NC OUT
Y17 A20 GPIO_23 GRFC_39 GPIO_67 H1 LTE_ACTIVE
NC NC NC
AA12 B17 GPIO_24 GPIO_68 H2 HSIC2_BB2SOC_REMOTE_WAKE
NC NC OUT 5 64
AA16 P21 GPIO_25 GPIO_69 F3 BB_IPC_GPIO 7
NC NC BI
AA17 R21 GPIO_26 GPIO_70 F1 WTR_SSBI_PRX_DRX
NC NC BI 25 30
P20 GPIO_27 GPIO_71 G3 WTR_SSBI_TX_GPS
NC BI 25 30
GPIO_29 PRODUCT_ID NC R20 GPIO_28 GPIO_72 V3

NC
60 31 29 28 26 25 PP_SMPS3_MSME_1V8 T20 GPIO_29 GPIO_73 W3 BB_ERROR_FLAG 25 68
IN OUT
T21 W2 WTR_GP_DATA0 GPH
1 (1.8V) JXX RESERVED FOR FUTURE PRODUCT ID USE NC
U5
GPIO_30 GPIO_74
W1 WTR_GP_DATA1 GPH
OUT 30 68
GSM_PA_LB_EN NC GPIO_31 GRFC_0,PA_ON GPIO_75 OUT 30 68

V2 Y1 WTR_GP_DATA2
0 (NC, PD) NXX GSM_PA_HB_EN NC
PA_ON_B2_B3 V1
GPIO_32 GRFC_1,PA_ON GPIO_76
F2
NC
WLAN_TX_BLANK R3530
CELL
68 35 OUT GPIO_33 GRFC_2,PA_ON GPIO_77 IN 46
0.00
68 34 OUT PA_ON_B1_B4 U3 GPIO_34 GRFC_3,PA_ON GPIO_78 E2 OSCAR_CONTEXT_B_MDM 1 2 OSCAR2RADIO_CONTEXT_B IN 19 46
T3 GPIO_35 GRFC_4,PA_ON GPIO_79 E3 HSIC2_BB2SOC_DEVICE_RDY 0%
NC OUT 5 25 64
1/32W
68 37 OUT PA_ON_B5_B8 T1 GPIO_36 GRFC_5,PA_ON GPIO_80 D1 HSIC2_SOC2BB_HOST_RDY IN 5 25 64 MF
01005
68 36 OUT PA_ON_B7_B20 T5 GPIO_37 GRFC_6,PA_ON GPIO_81 E1 PM_MDM_IRQ_L OUT 27
68 38 OUT PA_ON_B13_B17 R5 GPIO_38 GRFC_7,PA_ON GPIO_82 D2 GPIO_BB2SOC_RESET_DET_L OUT 5 25 67
68 38 37 36 35 34 OUT PA_BS R3 GPIO_39 GRFC_8,PA_ON GPIO_83 D3 PS_HOLD OUT 27 68
DRX_ASM_V1 T2 GPIO_40 GRFC_9,SW GPIO_84 C1

68 41 OUT NC
68 30 25 OUT WTR_RX_ON R2 GPIO_41 GRFC_10 GPIO_85 B1 GPIO_BB2SOC_GPS_SYNC OUT 5
68 30 25 WTR_RF_ON P5 GPIO_42 GRFC_11 GPIO_86 C2 PMU_GPIO_BB2PMU_HOST_WAKE 25 57 60

OUT OUT
P1 GPIO_43 GRFC_13 GPIO_87 C3 PM_USR_IRQ_L
PA_R0 NC OUT 27
B B
CELL
L3520
70-OHM-300MA
PP_SMPS3_MSME_1V8 1 2
68 PP_SMPS3_MSME_1V8_FILT
60 31 29 28 26 25 IN
01005-1 CELL
1 C3520
0.1UF
20%
6.3V
2 X5R-CERM
01005
B2
VCC
CELL
U3520
SERIAL-SPI-2MX8-1.8V
WLCSP
MX25U1635EBAI-10G B3 SPI_CS_L
D3 CRITICAL CS* IN 29
WP*/SIO2
C3 SPI_DATA_MISO
A 29 IN SPI_DATA_MOSI E2 SI/SIO0
SO/SIO1
A4
OUT 29
A
29 IN SPI_CLK D2 SCLK NC
F1
C2
NC NC
NC/SIO3 F4
GND NC
E3
8 7 6 5 4 3
1
RF TRANSCEIVER (1 OF 2)
TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS

D PRX TRANSCEIVER RF AND IQ PORTS
CELL
D
CELL U3600
U3600 WTR1605
WTR1605 SM
SM SYM 2 OF 5
SYM 3 OF 5 TX
PRX TX_BB_I_P 130 TX_BB_IP CRITICAL TX_LB1 140 50_XCVR_B13_B17_B20_TX
68 33
100_XCVR_B13_B17_B20_PRX_P 78 PRX_LB1_INP PRX_BB_IP 84 PRX_BB_I_P 29 68
68 29 IN OUT 33 68
IN OUT
68 29
TX_BB_I_N 138 TX_BB_IM TX_LB2 132 50_XCVR_2G_LB_TX 40 68
68 33
100_XCVR_B13_B17_B20_PRX_N 69 PRX_LB1_INM PRX_BB_IM 92 PRX_BB_I_N 29 68
IN OUT
IN OUT
TX_LB3 141 50_XCVR_B8_TX 33 68
TX_BB_Q_P 131 TX_BB_QP
OUT
68 32
100_XCVR_B8_PRX_N 61 PRX_LB2_INP PRX_BB_QP 91 PRX_BB_Q_P 29 68
68 29 IN
TX_LB4 133 50_XCVR_B5_B18_TX 33 68
IN OUT
68 29
TX_BB_Q_N 139 TX_BB_QM
OUT
68 32
100_XCVR_B8_PRX_P 54 PRX_LB2_INM PRX_BB_QM 82 PRX_BB_Q_N 29 68
IN
IN OUT
TX_MB1 126 50_XCVR_B2_B25_TX 32 68
29
WTR_BB_TX_DAC_IREF 109 DAC_REF
OUT
100_XCVR_B5_B18_PRX_P 48 PRX_LB3_INP DNC 86
IN
TX_MB2 119 50_XCVR_2G_HB_TX
68 32 IN NC OUT 40 68
68 32
100_XCVR_B5_B18_PRX_N 43 PRX_LB3_INM 68 29
WTR_GP_DATA0 GPH 105 GP_DATA0 TX_MB3 112 50_XCVR_B3_B4_TX 32 68
IN IN OUT
68 29
WTR_GP_DATA1 GPH 121 GP_DATA1 TX_MB4 95 50_XCVR_B1_TX 32 68
68 32
100_XCVR_B2_B25_PRX_P 36 PRX_MB1_INP
IN OUT
IN 88 GP_DATA2
68 32 IN
100_XCVR_B2_B25_PRX_N 30 PRX_MB1_INM WTR_GP_DATA2 NC 114 TX_HB 103 50_XCVR_B7_TX OUT 36 68
NC DNC CELL
23 96 C3602 CELL
68 32 IN
100_XCVR_B3_PRX_P PRX_MB2_INP NC DNC DNC 93 NC R3602
100_XCVR_B3_PRX_N 17 56PF
68 32 PRX_MB2_INM CELL 90 2 68 50_PDET_PAD_OUT
47
PDET_IN 101 68 50_PDET_IN 50_PDET_PAD_IN
IN 1 1 2
R3600 NC DNC IN 40 68
68 32
100_XCVR_B1_B4_PRX_N 8 PRX_MB3_INP 4.75K2 5%
IN 1 WTR_RBIAS 60 RBIAS 5% 1/32W
68 32
100_XCVR_B1_B4_PRX_P 16 PRX_MB3_INM 16V CELL MF CELL
IN 1% NP0-C0G 01005
79 1 1
100_XCVR_B7_PRX_P 7 1/32W
MF WTR_VTUNE NC VTUNE_PRX 01005 R3601 R3603
68 32 IN PRX_HB_INP 130 130
100_XCVR_B7_PRX_N 15 01005
WTR_RX_ON 45 DC-BLOCK NEEDED 1% 1%
68 32 IN PRX_HB_INM 68 29 25 IN RX_ON FOR SELF CAL 1/32W 1/32W
68 29 25
WTR_RF_ON 100 RF_ON MF MF
IN
SWAPPED B1/4 AND B7 PRX INPUTS WTR_SSBI_TX_GPS 89 2 01005 2 01005
29 25 BI SSBI_TX_GNSS
WTR_SSBI_PRX_DRX 80 SSBI_PRX_DRX
DRX TRANSCEIVER RF AND IQ PORTS 29 25 BI
C CELL
U3600 CELL
134 GND 7 DB ATTENUATOR C
C3600 120 XO_IN
WTR1605 100PF
SM 68 27
19P2M_WTR 1 2 19P2M_WTR_IN
IN
SYM 1 OF 5
DRX_GPS 5%
68 41
100_XCVR_B8_B20_DRX_P 5 DRX_LB1_INP DRX_BB_IP 63 DRX_BB_I_P 29 68
16V
IN OUT NP0-C0G 1
100_XCVR_B8_B20_DRX_N 14 C3601
68 41 IN DRX_LB1_INM DRX_BB_IM 72 DRX_BB_I_N OUT 29 68
01005
10PF
5%
68 41
100_XCVR_B5_B18_B13_B17_DRX_P 4 DRX_LB2_INP DRX_BB_QP 50 DRX_BB_Q_P 29 68 2 16V
IN OUT CERM
68 41
100_XCVR_B5_B18_B13_B17_DRX_N 13 DRX_LB2_INM DRX_BB_QM 57 DRX_BB_Q_N 29 68
01005
IN OUT NOSTUFF
68 41
100_XCVR_B2_B25_B3_DRX_P 3 DRX_MB_INP
IN
68 41
100_XCVR_B2_B25_B3_DRX_N 12 DRX_MB_INM
IN
100_XCVR_B1_B4_DRX_P 2 DRX_HB_INP
B7 DIFF PAIR NET NAME 68 41 IN
TO BE UPDATED 68 41
100_XCVR_B1_B4_DRX_N 11 DRX_HB_INM
IN
68 41
100_XCVR_GPS_RX_P 10 GNSS_INP GNSS_BB_IP 56 GPS_BB_I_P 29 68
IN OUT
68 41
100_XCVR_GPS_RX_N 18 GNSS_INM GNSS_BB_IM 62 GPS_BB_I_N 29 68
IN OUT
GNSS_BB_QP 70 GPS_BB_Q_P OUT 29 68
GNSS_BB_QM 71 GPS_BB_Q_N OUT 29 68
GND 1
TRANSCEIVER GROUND CONNECTIONS

CELL
B U3600 B
WTR1605
SM
SYM 5 OF 5
GND
46 GND
77 GND 125
GND
47 GND 124
GND
68 GND GND 123
29 GND GND 110
22 GND GND 102
27 GND GND 99
21 GND GND 129
20 GND GND 94
33 GND GND 115
6 GND
GND 137
75 GND
GND 122
38 GND
GND 107
41 GND GND 106
58 GND GND 135
74 GND GND 128
59 GND GND 104
52 GND GND 113
39 GND
73 GND 19
GND
34 GND 32
A 64
GND
GND
GND 49
81 GND
35 GND
142 GND GND 9
8 7 6 5 4 3
1
RF TRANSCEIVER (2 OF 2)
CELL
RF1_1V3 CELL
RF2_2V05
R3700 STAR ROUTING STAR ROUTING R3702 STAR ROUTING
PP_SMPS2_RF1_1V3 1
0 2 31 PP_SMPS2_RF1_1V3_FILT PP_RF1_1V3_PRX_PLL PP_SMPS4_RF2_2V05 1
0 2 PP_SMPS4_RF2_2V05_FILT PP_RF2_2V05_DRX_BB
60 28 26 31 68 60 26 31 68
D
68
5%
1/20W 1
CELL
C3701
ALIAS
1
CELL
C3702
5%
1/20W
CELL
ALIAS
D
MF MF 1 C3715
201 10UF 0.1UF 201 ALIAS
PP_RF2_2V05_TX_DA 31
20% 20% 10UF
2 10V 2 6.3V
X5R-CERM 20% NOSTUFF
X5R-CERM 10V
01005 2 X5R-CERM 1
0402-1
PLACE NEAR U3600.66 0402-1
C3716
100PF
5%
2 16V
NP0-C0G
PP_RF1_1V3_SHDR_PLL 31
01005
ALIAS PLACE NEAR U3600.111
CELL
1 C3703
0.1UF
20%
6.3V
RF1_1V3 STAR ROUTING STAR ROUTING
STAR ROUTING
ALIAS
PP_RF2_2V05_PRX_BB
31
2 X5R-CERM
01005 PP_RF1_1V3_GPS_LNA PP_RF2_2V05_TX_BB
PLACE NEAR U3600.65 31 PP_SMPS2_RF1_1V3_FILT ALIAS 31 ALIAS 31
CELL
PP_RF1_1V3_PRX_VCO
1 C3713 STAR ROUTING
ALIAS 31
0.1UF ALIAS
PP_RF1_1V3_GPS_DIG 31 PP_RF2_2V05_PRX_VCO
CELL 20% 31
6.3V ALIAS
1 C3704 2 X5R-CERM
01005 CELL
0.1UF PLACE NEAR U3600.24 AND U3.31 1 C3717
20%
6.3V
2 X5R-CERM 0.1UF
STAR ROUTING 20%
01005 6.3V
PLACE NEAR U3600.76 2 X5R-CERM
ALIAS PP_RF1_1V3_GPS_VCO 31 01005
PLACE NEAR U3600.67
CELL
PP_RF1_1V3_SHDR_VCO 31
1 C3714 PP_RF2_2V05_SHDR_VCO
ALIAS
0.1UF ALIAS
PP_RF1_1V3_GPS_PLL 31 ALIAS 31
CELL 20%
1 C3705 2 6.3V CELL
X5R-CERM
0.1UF
20%
01005
PLACE NEAR U3600.37 AND U3.55
1 C3718
6.3V 0.1UF
2 X5R-CERM 20%
2 6.3V
C 01005
PLACE NEAR U3600.40 X5R-CERM
01005 C
ALIAS
PP_RF1_1V3_TX_DA 31
RF1_1V8 PLACE NEAR U3600.51
PP_RF2_2V05_TX_VCO
1 C3706 60 29 28 26 25 PP_SMPS3_MSME_1V8 PP_RF1_1V8_DIG 31 68
ALIAS 31
ALIAS
0.1UF CELL
CELL
20%
2 6.3V
1 C3700 1 C3719
X5R-CERM
01005 1.0UF 0.1UF
20% 20%
PLACE NEAR U3600.118 10V 2 6.3V
CELL 2 X5R-CERM X5R-CERM
01005
STAR ROUTING 0201-1 PLACE NEAR U3600.136
PLACE NEAR U3600.87
ALIAS
PP_RF1_1V3_TX_SYNTH 31
CELL ALIAS
PP_RF2_2V05_TX_PLL 31
1 C3707
0.1UF
20%
2 6.3V
X5R-CERM ALIAS
PP_RF2_2V05_XO_FILT 31
01005
PLACE NEAR U3600.98 CELL
1 C3720
0.1UF
PP_RF1_1V3_TX_LO 20%
ALIAS 31 6.3V
2 X5R-CERM
CELL 01005
PLACE NEAR U3600.127
1 C3708
0.1UF
20%
2 6.3V
X5R-CERM
01005
PLACE NEAR U3600.116
PP_RF1_1V3_TX_UPCONVERTER TRANSCEIVER POWER CONNECTIONS

ALIAS 31
CELL
B 1
CELL
C3709 U3600 B
5%
100PF WTR1605
16V
2 NP0-C0G SM
01005 SRM 4 OF 5
PLACE NEAR U3600.117 PWR
31 PP_RF1_1V3_PRX_FELO1 53 VDD_RF1_P_FELO VDD_RF2_T_DA 111 PP_RF2_2V05_TX_DA 31
STAR ROUTING STAR ROUTING PP_RF1_1V3_PRX_FELO2 42 118 PP_RF1_1V3_TX_DA
31 VDD_RF1_P_FELO VDD_RF1_T_DA 31
PP_RF1_1V3_PRX_FELO1 PP_RF1_1V3_DRX_LBLO 28 117
CELL
ALIAS 31
31 VDD_RF1_D_LBLO VDD_RF1_T_UPC PP_RF1_1V3_TX_UPCONVERTER 31
31 PP_RF1_1V3_DRX_FE
26 VDD_RF1_D_FE VDD_RF1_T_LO 116 PP_RF1_1V3_TX_LO
1 C3710 68
25 108
31
0.1UF 31
PP_RF1_1V3_DRX_MBLO VDD_RF1_D_MBLO VDD_RF2_T_BB PP_RF2_2V05_TX_BB 31
20% PP_RF1_1V3_DRX_FE 31 68 PP_RF1_1V3_JAM_DET 85
6.3V ALIAS 31 VDD_RF1_JDET 136
2 X5R-CERM
83 VDD_RF2_T_VCO PP_RF2_2V05_TX_VCO 31
01005 31 PP_RF2_2V05_PRX_BB VDD_RF2_P_BB 127
PLACE NEAR U3600.53 AND U3.26 44 VDD_RF2_XO PP_RF2_2V05_XO_FILT 31
68 31 PP_RF2_2V05_DRX_BB VDD_RF2_D_BB 98
VDD_RF1_T_SYN PP_RF1_1V3_TX_SYNTH 31
PP_RF2_2V05_PRX_VCO 67 VDD_RF2_P_VCO VDD_RF2_T_PLL 97 PP_RF2_2V05_TX_PLL
PP_RF1_1V3_PRX_FELO2 31
PP_RF1_1V3_PRX_VCO
31
ALIAS 31
31
76 VDD_RF1_P_VCO
CELL VDD_RF1_G_LNA 24 PP_RF1_1V3_GPS_LNA
PP_RF1_1V3_PRX_PLL 66 VDD_RF1_P_PLL
31
1 C3711 31
51 VDD_RF1_G_VCO 37 PP_RF1_1V3_GPS_VCO 31
0.1UF 31 PP_RF2_2V05_SHDR_VCO VDD_RF2_S_VCO 55
20% 40 VDD_RF1_G_PLL PP_RF1_1V3_GPS_PLL 31
6.3V 31 PP_RF1_1V3_SHDR_VCO VDD_RF1_S_VCO
2 X5R-CERM VDD_RF1_G_BB 31 PP_RF1_1V3_GPS_DIG
01005 31
PP_RF1_1V3_SHDR_PLL 65 VDD_RF1_S_PLL
31
PLACE NEAR U3600.42

VDD_DIO 87 PP_RF1_1V8_DIG 31 68
STAR ROUTING
PP_RF1_1V3_DRX_LBLO 31
ALIAS
CELL
1 C3712
0.1UF PP_RF1_1V3_DRX_MBLO 31
ALIAS
A 20%
6.3V
2 X5R-CERM
01005
PLACE NEAR U3600.25 AND U3.28
ALIAS
PP_RF1_1V3_JAM_DET 31
8 7 6 5 4 3
1
TRANSCEIVER TX AND RX MATCHING NETWORKS

TX MATCHING NETWORKS
CELL
R3800
D 68 30 IN
50_XCVR_B1_TX 1
0.00 2 50_B1_TX_SAW_IN OUT 33 68 D
0%
1/32W
MF
01005
68 36 IN 50_B7_DUPLX_RX
1
CELL
CELL CELL CELL
R3801 L3825 C3806 L3813
50_XCVR_B3_B4_TX
1
0.00 2 50_B3_B4_TX_SAW_IN OUT 9.1NH-3%-220MA 27PF 33PF
68 30 IN 33 68 CELL 1 2 1 2
0201 68 100_B7_PRX_BALUN_OUT_N 68 100_B7_PRX_MATCH_N 100_XCVR_B7_PRX_N OUT 30 68
0%
1/32W
CRITICAL U3803
MF 2.3-2.69GHZ 5% 5%
01005 2 LLP 16V 1 25V
NP0-C0G NPO-C0G
UNBAL_PORT 2 01005 CELL 0201
L3814
BAL_PORT1 3 2.5NH+/-0.1NH-500MA
BAL_PORT2 4 0201
CRITICAL CELL CELL
CELL
R3802 C3807 2 L3815
50_XCVR_B2_B25_TX
1
0.00 2 50_B2_B25_TX_SAW_IN GND 27PF 33PF
68 30 IN OUT 33 68
1 2 1 2
100_XCVR_B7_PRX_P
100_B7_PRX_BALUN_OUT_P 100_B7_PRX_MATCH_P
1
68 68 30 68
0% OUT
1/32W
MF 5% 5%
01005 16V 25V
NP0-C0G NPO-C0G
01005 0201
CELL
L3805
C 68 34 IN
100_B1_B4_DUPLX_RX_P
100PF
1 2 100_XCVR_B1_B4_PRX_N
OUT 30 68
C
5%
CELL 16V
NP0-C0G
1 L3804 01005
CRITICAL
0.8PF
+/-0.05PF
16V
2 C0G-CERM
RX MATCHING NETWORKS 01005
CRITICAL CELL
L3806
100PF
68 34
100_B1_B4_DUPLX_RX_N 1 2 100_XCVR_B1_B4_PRX_P 30 68
IN OUT
5%
CELL 16V
NP0-C0G CELL
C3800 01005
0.6PF CRITICAL L3808
68 35
50_B2_DUPLX_RX 1 2 100_XCVR_B2_B25_PRX_N 30 68
5.6NH-3%-0.35A
IN OUT
68 37
100_B5_B18_DUPLX_RX_N 1 2 100_XCVR_B5_B18_PRX_N 30 68
+/-0.05PF IN OUT
1 16V 1 CELL 0201
CERM CRITICAL CRITICAL
CELL 01005 1
NO_XNET_CONNECTION=TRUE
L3800 CRITICAL L3801 NO_XNET_CONNECTION=TRUE
13NH-5%-0.28A 6.8NH-5%-0.5A L3807
0201DS 0201DS
CRITICAL 10NH-3%-140MA
CELL 01005
C3801 CELL
2 2 CRITICAL
27PF C3808
50_B2_RX_BALUN 1 2 100_XCVR_B2_B25_PRX_P 2
68
OUT 30 68 7.0PF
50_B5_RX_BAL_TERM 1 2
5%
CELL 16V
NP0-C0G +/-0.1PF
B 1 C3802
0.6PF
+/-0.05PF
01005
1
16V
NP0-C0G
01005
B
CELL
2 16V
CERM L3816 CRITICAL
01005 10NH-3%-140MA
CRITICAL CELL 01005
C3803 CELL
CRITICAL CELL
0.9PF L3809
50_B3_DUPLX_RX 1 2 100_XCVR_B3_PRX_N 2
68 35 IN OUT 30 68 5.6NH-3%-0.35A
+/-0.05PF 68 37
100_B5_B18_DUPLX_RX_P 1 2 100_XCVR_B5_B18_PRX_P 30 68
1 16V 1 IN OUT
CERM 0201
CELL 01005 CELL CRITICAL
CRITICAL
L3802 L3803 L3810
8.2NH+/-3%-0.25A-0.7OHM 5.1NH-3%-0.35A 10NH-3%-250MA
0201 0201
CRITICAL CRITICAL 68 37
100_B8_DUPLX_RX_P 1 2 100_XCVR_B8_PRX_P 30 68
IN OUT
CELL 0201
2 C3804 2 1 CRITICAL
27PF
68 50_B3_RX_BALUN 1 2 100_XCVR_B3_PRX_P CELL
OUT 30 68 CELL
5% L3811
16V 18NH+/-3%-0.2A-0.8OHM
CELL NP0-C0G 0201
01005 CELL
1 C3805 CRITICAL
NO_XNET_CONNECTION=TRUE L3812
1.5PF 2 10NH-3%-250MA
+/-0.1PF
2 16V
NP0-C0G 100_B8_DUPLX_RX_N 1 2 100_XCVR_B8_PRX_N
01005-1 68 37 IN OUT 30 68
CRITICAL 0201
CRITICAL
8 7 6 5 4 3
1
SAW BANK
D D
HB TX SAW BANK +
B13/B17/B20 DP6T SWITCH AND MATCHING
68 40 29
2G_FEM_S3
IN
68 40 29
2G_FEM_S2
IN
PP_LDO14_2V65
68 41 40 26 IN
LB TX SAW BANK
CELL
FL3901
LMTPFJGA-E50
LGA
CRITICAL
7
8
9
VDD V1 V2 V3 68 30 IN 50_XCVR_B5_B18_TX 1 B5/18/BC10_TX_IN B5/18/BC10_TX_OUT 11 50_B5_TX_SAW_OUT OUT 37 68
CELL
U3900 68 30 50_XCVR_B8_TX 2 B8_TX_IN B8_TX_OUT 10
50_B8_TX_SAW_OUT 37 68
IN OUT
HFQSMXXFA 68 30 50_XCVR_B13_B17_B20_TX 3 B13/17/20_TX_IN B13_TX_OUT 9
50_B13_TX_SAW_OUT 38 68
IN OUT
50_B1_TX_SAW_IN 3 B1TXIN LGA 14 50_B1_TX_SAW_OUT
68 32 IN CRITICALBAND1TXOUT OUT 34 68
B17_TX_OUT 8
50_B17_TX_SAW_OUT
OUT 38 68
B25TXOUT 11
50_B2_TX_SAW_OUT
50_B2_B25_TX_SAW_IN 5 B25_TXIN OUT 35 68
B20_TX_OUT 7
50_B20_TX_SAW_OUT
68 32 IN GND OUT 36 68
B3TXOUT 12
68 32 50_B3_B4_TX_SAW_IN 4 B3/4_TXIN
OUT
IN
4
5
6
12
13
BAND4TXOUT 13
50_B4_TX_SAW_OUT
C OUT 34 68
C
68 38 100_B13_DUPLX_RX_N 15 B13_RXIN
IN
68 38 IN 100_B13_DUPLX_RX_P 16 B13_RXIN B13_17_20_RXOUT0 1 100_XCVR_B13_B17_B20_PRX_N OUT 30 68
17 B13_17_20_RXOUT1 2 100_XCVR_B13_B17_B20_PRX_P OUT 30 68

68 38 IN 100_B17_DUPLX_RX_P B17_RXIN
68 38 100_B17_DUPLX_RX_N 18 B17_RXIN
IN
68 36 100_B20_DUPLX_RX_P 19 B20_RXIN
IN
68 36 100_B20_DUPLX_RX_N 20 B20_RXIN
IN
GND THRM
PAD
10
21
22
23
BAND V3=V2 V1
B3 TX HIGH X
B4 TX LOW X
B13 RX HIGH HIGH
B B17 RX HIGH LOW B
B20 RX LOW HIGH
8 7 6 5 4 3
1
BAND 1/4 PAD

D D
PA_ON_B1_B4 IN 29 68
PA_BS IN 29 35 36 37 38 68
PA_R1 29 35 36 37 38 68
68 40 39 38 37 36 35 IN
PP_PA IN
=PPBATT_VCC_BB CELL CELL CELL
62 40 39 38 37 36 35 26 25 IN
CELL CELL CELL CELL 1 C4009 1 C4010 1 C4011
1 C4005 1 C4006 1 C4007 1 C4008 56PF 56PF 56PF
5% 5% 5%
0.1UF 1000PF 1.0UF 27PF 16V
2 NP0-C0G
16V
2 NP0-C0G
16V
2 NP0-C0G
20% 10% 20% 5%
6.3V 6.3V 6.3V 25V 01005 01005 01005
2 X5R-CERM 2 X5R-CERM 2 X5R 2 NP0-C0G
01005 01005 0201-1 0201
CELL
C4001
VBATT 29
VEN_B1_B4 24
VCC 22
BS 25
VMODE 30
2.2NH+/-0.1NH-200MA
68 33 50_B1_TX_SAW_OUT 1 2
IN
01005
CELL CRITICAL CELL
CELL
1 C4000 1 C4002 CELL L4000 R4000
0.6PF 1.2PF 3.3NH+/-0.1NH-0.45A
+/-0.05PF +/-0.1PF 68 50_B1_TX_PAD_IN 28 RFIN_B1 U4000 GND 4 0
2 16V
CERM 2 16V
NP0-C0G 68 50_B4_TX_PAD_IN 68 50_B1_B4_DPLX_ANT 1 2 68 50_B1_B4_ANT_PHASESHIFT 1 2 50_B1_B4_ANT BI 40 68
26 RFIN_B4 TQF6514 GND 20
01005 01005 0201 5%
CRITICAL NOSTUFF SM CRITICAL 1/20W
CELL 9 RX_P_B1_B4 MF
CRITICAL CELL CELL 201 1
C4003 8 RX_N_B1_B4 R4001
C 3.0NH+/-0.1NH-200MA
1 2
ANT_B1_4 16 1 C4012
1.3PF
1 C4013
1.5PF
CRITICAL
5%
0
1/20W
C
50_B4_TX_SAW_OUT
31 THRM
68 33 IN +/-0.1PF +/-0.1PF MF
PAD
25V 25V
01005 GND 2 C0G-CERM 2 C0G-CERM 2 201
CELL
CRITICAL 201 0201 NOSTUFF
1 C4004 CRITICAL CRITICAL
1
2
3
5
6
7
10
11
12
13
14
15
17
18
19
21
23
27
0.7PF
+/-0.05PF
2 16V
NP0-C0G
01005
CRITICAL
100_B1_B4_DUPLX_RX_N OUT 32 68
100_B1_B4_DUPLX_RX_P 32 68
OUT
B B
BAND PA POWER MODE PA_BS PA_ON_B1_B4 PA_R1

============================================================
POWER DOWN X 0 0 0
STANDBY X X 0 X
B4 HPM 0 1 0
B4 LPM 0 1 1
B1 HPM 1 1 0
B1 LPM 1 1 1
A
8 7 6 5 4 3
1
BAND 2/3 PAD

D D
68 40 39 38 37 36 34 IN
PP_PA PA_ON_B2_B3 IN 29 68
62 40 39 38 37 36 34 26 25
=PPBATT_VCC_BB
IN PA_BS 29 34 36 37 38 68
IN
CELL CELL
1 C4105 1 C4106 PA_R1
IN 29 34 36 37 38 68
0.1UF 1000PF
20% 10%
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM
01005 01005 CELL CELL CELL
1 C4113 1 C4114 1 C4115
VBATT 25
VEN_B2_B3 30
BS 29
VMODE 24
56PF 56PF 56PF
VCC 2
CELL 5% 5% 5%
16V 16V 16V
2 NP0-C0G 2 NP0-C0G 2 NP0-C0G
C4101 01005 01005 01005
2.0NH+/-0.1NH-0.2A-1.35OHM
68 33 50_B3_TX_SAW_OUT 1 2
IN
CELL 01005 CELL CELL CELL
CRITICAL 50_B3_TX_PAD_IN 26 RFIN_B3
1 C4100 68
AFEM-792503 CPL_IN 4 NC L4100 R4102
0.5PF 68 50_B2_TX_PAD_IN 28 RFIN_B2 LGA CPL_OUT 20
3.9NH+/-0.1NH-0.40A 3.6NH+/-0.1NH-400MA
+/-0.05PF NC 68 50_B3_ANT_PHASESHIFT
2 16V U4100 50_B3_DPLX_ANT 1 2 1 2 50_B3_ANT
C C0G-CERM
01005
CRITICAL CELL
13 RX_B3
14 GND
CRITICAL
68
0201
CRITICAL
0201
CRITICAL
BI 40 68
C
ANT_B3 16
C4103 11 RX_B2 CELL
3.9NH+/-0.1NH-180MA ANT_B2 8 1
10 GND C4111
68 33 IN 50_B2_TX_SAW_OUT 1 2 GND THRM_PAD 1.8PF
+/-0.1PF
01005 25V
2 C0G
1
3
5
6
7
9
12
15
17
18
19
21
22
23
27
31
32
33
34
35
36
37
38
39
40
41
42
CELL CRITICAL CELL 201
1 C4102 1 C4104 CRITICAL
1.0PF 0.5PF
+/-0.1PF +/-0.05PF
16V 16V
2 NP0-C0G 2 C0G-CERM
01005 01005
CRITICAL CRITICAL CELL
CELL
L4101 R4100
3.8NH+/-0.1NH-0.4A-0.30OHM
68 50_B2_DPLX_ANT 1 2
0
68 50_B2_ANT_PHASESHIFT 1 2 50_B2_ANT BI 40 68
50_B2_DUPLX_RX 32 68 0201 5%
OUT 1/20W
50_B3_DUPLX_RX CRITICAL
OUT 32 68 MF
CELL 201
1 C4110 CELL CRITICAL 1
R4101
1.8PF 1 C4112 0
+/-0.1PF 5%
2 25V 1.3PF 1/20W
C0G +/-0.1PF
201 25V MF
2 C0G-CERM 2 201
CRITICAL 201 NOSTUFF
CRITICAL
B B

============================================================
POWER DOWN X 0 0 0
A STANDBY X X 0 X
B3 HPM 0 1 0
B3 LPM 0 1 1
B2 HPM 1 1 0
B2 LPM 1 1 1
8 7 6 5 4 3
1
BAND 20/7 PAD

D D
PP_PA BULK BYPASSING SHARED WITH B1/4 PAD
68 40 39 38 37 35 34
PP_PA
IN PA_ON_B7_B20 29 68
IN
62 40 39 38 37 35 34 26 25
=PPBATT_VCC_BB
IN PA_BS 29 34 35 37 38 68
IN
CELL CELL CELL CELL
1 C4202 1 C4203 1 C4213 1 C4204 PA_R1 IN 29 34 35 37 38 68
0.1UF 1000PF 1.0UF 0.1UF CELL CELL CELL
20% 10% 20% 10%
6.3V 6.3V 6.3V 6.3V
2 X5R-CERM 2 X5R-CERM 2 X5R 2 CERM-X5R 1 C4205 1 C4214 1 C4206
01005 01005 0201-1 0201 56PF 56PF 56PF CELL
5% 5% 5%
2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G C4207
01005 01005 01005
1.0PF
1 2
VBATT 25
VEN_B7_B20 30
BS 29
VMODE 24
+/-0.1PF
VCC 2
16V
NP0-C0G
01005
CRITICAL
CELL CELL
C4201 CELL L4200
3.0PF U4200 8.2NH+/-3%-0.25A-0.7OHM
68 33
50_B20_TX_SAW_OUT 1 2 68 50_B20_TX_PAD_IN 26 RFIN_B20 CPL_IN 4
IN 1 2 50_B20_ANT
50_B7_TX_PAD_IN 28 RFIN_B7 AFEM-790720 BI 40 68
+/-0.1PF
68
LGA CPL_OUT 20 0201
16V 68 50_B20_DPLX_ANT
C 1
NP0-C0G
01005
CRITICAL
1
12 RX_P_B20
13 RX_N_B20
CRITICAL CRITICAL
1
CELL
C4208
C
ANT_B20 16 4.7PF
CELL CELL 11 RX_B7
C4209 ANT_B7 8 +/-0.1PF
C4200 2 25V
COG-CERM
8.2NH-3%-140MA 10 GND
8.2NH-3%-140MA 01005
GND THRM_PAD 0201
01005 CRITICAL
CRITICAL CRITICAL
1
3
5
6
7
9
14
15
17
18
19
21
22
23
27
31
32
33
34
35
36
37
38
39
40
41
42
2 2
CRITICAL
L4204
3.0NH+/-0.1NH-0.45A
68 50_B7_DPLX_ANT 1 2 50_B7_ANT 40 68
BI
0201
CELL
CRITICAL
CELL 50_B7_DUPLX_RX OUT 32 68
1 C4211 CRITICAL
FL4200 0.3PF 1 C4212
+/-0.05PF
SAW-BAND7-TX 100_B20_DUPLX_RX_N OUT 33 68
25V
2 C0G-CERM 1.0PF
CRITICAL SAFFB2G53KA0F57 +/-0.1PF
0201 2 25V
C4210 LGA R4202 100_B20_DUPLX_RX_P
OUT 33 68 CELL C0G
201
0.8PF 2.0PF
1 2 1 2 CELL
68 30 IN 50_XCVR_B7_TX 68 50_B7_TX_SAW_IN 1 UNB_PORT1 UNB_PORT2 4 68 50_B7_TX_SAW_OUT
+/-0.05PF GND +/-0.1PF
16V 16V
C0G-CERM 1 NP0-C0G 1
01005 01005
2
3
5
CELL CELL CELL

CRITICAL
1 1 L4205 L4203
2.4NH+/-0.1NH-200MA 3.3NH+/-0.1NH-180MA
CRITICAL 01005 01005
CELL CRITICAL
B L4201
2.2NH+/-0.1NH-200MA
L4202
3.3NH+/-0.1NH-180MA 2
CRITICAL
2
B
01005 01005
NOSTUFF CELL
2 2
BAND PA POWER MODE PA_ON_B20 PA_R1

=====================================================
A POWER DOWN LPM 0 0
STANDBY X 0 X
B20 HPM 1 0
B20 LPM 1 1
8 7 6 5 4 3
1
BAND 5/8 PAD

D D
68 40 39 38 36 35 34 IN
PP_PA PA_ON_B5_B8
IN 29 68
62 40 39 38 36 35 34 26 25
=PPBATT_VCC_BB
IN
CELL CELL CELL PA_BS 29 34 35 36 38 68
IN
1 CELL 1 1
C4306 1 C4307 C4308 C4309 PA_R1
0.1UF 1.0UF 27PF CELL CELL CELL
IN 29 34 35 36 38 68
20% 1000PF 20% 5%
6.3V 6.3V 25V
2 X5R-CERM 10%
2 6.3V
2 X5R 2 NP0-C0G 1 C4310 1 C4311 1 C4312
01005 X5R-CERM 0201-1 0201 56PF 56PF 56PF
01005 5% 5% 5%
16V
2 NP0-C0G 16V
2 NP0-C0G 2 16V
NP0-C0G
01005 01005 01005
CELL
C4301
VBATT 29
VEN_B5_B8 24
BS 25
VMODE 30
VCC 2
4.3NH-3%-180MA
68 33 IN
01005
CRITICAL CELL CELL
1 C4300 1 C4302
1.2PF 0.7PF CELL R4300
+/-0.1PF +/-0.05PF U4300 6.2NH-3%-140MA
16V 16V 68 50_B5_TX_PAD_IN 26 RFIN_B5 CPL_IN 4
2 NP0-C0G 2 NP0-C0G SKY77493 NC 50_B5_DPLX_ANT 1 2 50_B5_ANT
C 01005
NOSTUFF
CELL
01005
CRITICAL
68 50_B8_TX_PAD_IN 28 RFIN_B8
LGA CPL_OUT 20 NC
68
01005
CRITICAL
BI 40 68
C
C4304 13 RX_P_B5 CRITICAL
4.3NH-3%-180MA 14 RX_N_B5 CELL
ANT_B5 16 1 C4315
68 33 IN 11 RX_P_B8 ANT_B8 8 4.8PF
+/-0.1PF
01005 10 RX_N_B8 16V
CRITICAL CELL GND THRM_PAD 2 NP0-C0G
1 C4303 1 C4305 01005
CRITICAL
1.2PF 0.7PF
1
3
5
6
7
9
12
15
17
18
19
21
22
23
27
31
32
33
34
35
36
37
38
39
40
41
42
+/-0.1PF +/-0.05PF
16V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
NOSTUFF CRITICAL CELL CELL
L4301 R4302
5.1NH-3%-0.35A
1 2 0
68 50_B8_DPLX_ANT 68 50_B8_ANT_PHASESHIFT 1 2 50_B8_ANT BI 40 68
100_B8_DUPLX_RX_NOUT 32 68 0201 5%
CRITICAL 1/20W
100_B8_DUPLX_RX_POUT CELL MF 1
32 68 201 R4303
1 C4314 1 C4316 CRITICAL 0
100_B5_B18_DUPLX_RX_N 32 68 2.0PF 27PF 5%
OUT
+/-0.1PF 5% 1/20W
25V 25V MF
100_B5_B18_DUPLX_RX_P 2 C0G-CERM 2 NP0-C0G
OUT 32 68
0201 0201 2 201
NOSTUFF
CRITICAL NOSTUFF
B B

============================================================
POWER DOWN X 0 0 0
A STANDBY X X 0 X
B5 HPM 0 1 0
B5 LPM 0 1 1
B8 HPM 1 1 0
B8 LPM 1 1 1
8 7 6 5 4 3
1
BAND 13/17 PAD

D D
PA_ON_B13_B17 29 68
IN
68 40 39 37 36 35 34 IN
PP_PA PA_BS
IN 29 34 35 36 37 68
62 40 39 37 36 35 34 26 25
=PPBATT_VCC_BB PA_R1 29 34 35 36 37 68
IN IN
CELL CELL CELL CELL CELL CELL CELL
1 C4407 1 C4413 1 C4412 1 C4414
1 C4404 1 C4405 1 C4406 27PF 56PF 56PF 56PF
0.1UF 1000PF 1.0UF 5% 5% 5% 5%
20% 10% 20% 16V 16V 16V 16V CELL
6.3V 6.3V 6.3V 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G
2 X5R-CERM 2 X5R-CERM 2 X5R CRITICAL
01005 01005 0201-1 01005 01005 01005 01005
L4402
CELL
4.7NH-3%-0.35A
VBATT 25
VEN_B13_B17 30
BS 29
VCC 22
VMODE 24
C4400 1 2
5.1NH-3%-0.16A 0201
68 33 50_B13_TX_SAW_OUT 1 2
IN
01005 CELL CELL
1 CRITICAL CRITICAL
C4401
1.5PF
50_B13_TX_PAD_IN 26 RFIN_B13
L4400 R4402
+/-0.1PF
16V
68
U4400 CPL_IN 4 2.2PF
2 NP0-C0G 50_B17_TX_PAD_IN 28 RFIN_B17 50_B13_DPLX_ANT 1 2 50_B13_LPF_IN 0 50_B13_ANT
CPL_OUT 20
68 68 68 1 2
BI 40 68
01005
CELL
SKY77494 CELL CELL 5%
CELL 13 RX_P_B13 LGA +/-0.05PF 1/20W
1 C4408 25V 1 C4410 MF
C4402 14 RX_N_B13 CELL 2.0PF
C0G-CERM
2.0PF 201
6.2NH-3%-140MA CRITICAL ANT_B13 16 +/-0.1PF
0201
+/-0.1PF
1 R4403
11 RX_P_B17 ANT_B17 8 25V
2 C0G-CERM
25V
2 C0G-CERM 2.0PF
50_B17_TX_SAW_OUT 1 2 +/-0.1PF
C 68 33 IN
01005
10 RX_N_B17
GND THRM_PAD
0201
CRITICAL
0201
CRITICAL
25V
2 C0G-CERM
0201
C
1 C4403 NOSTUFF
1
2
3
5
6
7
9
12
15
17
18
19
21
23
27
31
32
33
34
35
36
37
38
39
40
41
42
2.0PF
+/-0.1PF
16V
2 NP0-C0G
01005 CELL
CELL CRITICAL CELL
CRITICAL
L4401
3.3NH+/-0.1NH-180MA R4400
100_B17_DUPLX_RX_N 1 2
0.00 2
OUT 33 68 68 50_B17_DPLX_ANT 68 50_B17_ANT_PHASESHIFT 1 50_B17_ANT BI 40 68
01005 0%
100_B17_DUPLX_RX_P OUT 33 68 1/32W 1
1
MF R4401
100_B13_DUPLX_RX_N 1 C4409 C4411 01005 0.00
OUT 33 68
56PF 0%
1.0PF 5% 1/32W
100_B13_DUPLX_RX_P OUT 33 68
+/-0.1PF 16V
2 NP0-C0G MF
2 16V
NP0-C0G 01005 2 01005
01005 NOSTUFF NOSTUFF
CRITICAL
CELL
B B

============================================================
POWER DOWN X 0 0 0
A STANDBY X X 0 X
B17 HPM 0 1 0
B17 LPM 0 1 1
B13 HPM 1 1 0
B13 LPM 1 1 1
8 7 6 5 4 3 2 1
1
PA DC/DC CONVERTER
D D
STAR ROUTE INTO IN1 AND IN2
62 40 38 37 36 35 34 26 25
=PPBATT_VCC_BB
IN
C 1
CELL
C4502 1
CELL
C4503 1
CELL
C4504 CELL 1
CELL
C4506
C
56PF 0.01UF 10UF 1 C4505 0.01UF
5% 10% 20% 10%
2 16V
NP0-C0G
6.3V
2 X5R 2 10V
X5R-CERM
1.0UF 2 6.3V
X5R
20%
01005 01005 0402-1 6.3V 01005
2 X5R
0201-1
39 DCDC_PGND DCDC_PGND 39
IN1 B2
IN2 C2
PLACE NEAR U3400.H3 PLACE NEAR U4500.A2
CELL CELL
R4500 R4501
1.00K BB_PDM_FILT 1.00K DCDC_ADJ A2 REFIN CELL CELL
68 29 IN BB_PDM 1 2 68 1 2 68
OUT C3
1% 1%
U4500 L4500
CELL CELL DCDC_EN B1 EN MAX77100 2.2UH-20%-1.5A-0.160OHM
1/32W 1 1/32W
MF C4500 MF 1 C4501
29 IN
WLP
01005 6800PF 01005
4700PF DCDC_MODE C1 MODE CRITICAL LX B3 DCDC_OUT 1 2 PP_PA OUT 34 35 36 37 38 40 68
10% 10% 68 29 IN
6.3V MAKK2016-SM
2 X5R 6.3V
A1 AGND
A3 PGND
2 X5R
01005 01005 CRITICAL
CELL CELL
1 C4507 1 C4508
4.7UF 1000PF
20% 10%
XW4501 6.3V 2 6.3V
X5R-CERM
SHORT-10L-0.25MM-SM 2 X5R
402 01005
39 DCDC_PGND 1 2
NOSTUFF DCDC_PGND 39
XW4502
SHORT-10L-0.25MM-SM
1 2
NOSTUFF
B B
8 7 6 5 4 3
1
2G FEM
D 2G FEM D
68 41 33 26 IN
PP_LDO14_2V65
68 39 38 37 36 35 34 IN
PP_PA
CELL
FL4600
70-OHM-300MA
=PPBATT_VCC_BB
62 39 38 37 36 35 34 26 25
1 2 68 PP_BATT_VCC_2G_FEM
IN 2G_FEM_S6 IN 29 68
CELL 01005-1 CELL CELL CELL CELL CELL CELL CELL 2G_FEM_S5 29 68
IN
1 C4600 1 C4601 1 C4602 1 C4603 1 C4604 1 C4605 1 C4606 1 C4607 2G_FEM_S4
56PF 0.1UF 10UF 0.1UF 0.01UF 0.1UF 0.01UF 56PF IN 25 29 68
5% 20% 20% 20% 10% 20% 10% 5% 2G_FEM_S3 29 33 68
16V 6.3V 10V 6.3V 6.3V 6.3V 6.3V 16V IN
2 NP0-C0G 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R 2 X5R-CERM 2 X5R 2 NP0-C0G 2G_FEM_S2
IN 29 33 68
01005 01005 0402-1 01005 01005 01005 01005 01005
2G_FEM_S1 IN 25 29 68
2G_FEM_S0 29 68
IN
CELL CELL CELL CELL CELL CELL CELL CELL
C4610 1 C4613 1 C4614 1 C4615 1 C4616 1 C4617 1 C4618 1 C4619
56PF
C 68 30 IN
50_XCVR_2G_LB_TX 1 2 5%
56PF
2 16V
5%
56PF
2 16V
5%
56PF
2 16V
5%
56PF
16V
2 NP0-C0G
5%
56PF
16V
2 NP0-C0G
5%
56PF
2 16V
5%
56PF
2 16V
C
NP0-C0G NP0-C0G NP0-C0G NP0-C0G NP0-C0G
01005 01005 01005 01005 01005 01005 01005
1 C4609 5%
16V
1.5PF NP0-C0G
+/-0.1PF 01005
16V
2 NP0-C0G
01005
29
34
27
38
NOSTUFF
6
5
4
3
2
1
CELL
CELL
VBATT
VCC
VDD_SWITCH
S6
S5
S4
S3
S2
S1
S0
R4601 C4612 50_2G_LB_PA_IN 32 LB_RFIN 13
56PF 68
NC_0
0.00 2 68 50_XCVR_2G_HB_TX_MATCH1 2 50_2G_HB_PA_IN 36 HB_RFIN 19 50_B7_ANT
68 30 IN 50_XCVR_2G_HB_TX
1 68
T2 BI 36 68
CELL
0%
1/32W 5% 50_B1_B4_ANT 25 TRX1 U4600
MF
1 C4611 16V
NP0-C0G
68 34 BI
50_B8_ANT 24 TRX2 FL4630
01005 1.5PF 01005 68 37 BI SKY77575 FIL-COUPLER+LPF-BROADBAND
+/-0.1PF 50_B5_ANT 23 TRX3 LGA
2 16V 68 37 BI LDJ21832M22HC036
NP0-C0G
22 TRX4 CRITICAL 0805-6SM
01005 50_PRI_ANT_ASM 50_PRI_ANT_COAX
NOSTUFF ANT1 15 68 3 IN CELL MAIN OUT 6 43 68
68 35
50_B2_ANT 21 TRX5 BI
BI 17 CRITICAL
11 TRX6 NC_1
4 COUPLE OUT TERMINATE 1 COUPLER_TERM
68 35
50_B3_ANT 10 TRX7
BI GND 1
68 36
50_B20_ANT 9 TRX8
BI
1 CELL
2
5
50_B17_ANT 8 TRX9
68 38 BI R4620 L4630
50_B13_ANT 7 TRX10 49.9
68 38 BI
1% 56NH-100MA-3.9OHM
1/32W 0201
GND THRM_PAD MF
2 01005
12
14
16
18
20
26
28
30
31
33
35
37
39
40
41
42
43
44
45
46
47
48
49
50
2
B 68 30 OUT
50_PDET_PAD_IN B
A
1
RX DIVERSITY
D D
DRX_ASM_V1 29 68
IN
DRX_ASM_V2 IN 29 68
DRX_ASM_V3 29 68
IN
DRX_ASM_V4 IN 29 68
CRITICAL CRITICAL CRITICAL CELL

CELL CELL CELL CRITICAL
PP_LDO14_2V65 100PF BYPASS INCLUDED IN MODULE

1 C4701 1 C4702 1 C4703 1 C4704
68 40 33 26 IN 12PF 12PF 12PF 12PF
5% 5% 5% 5%
16V 16V 16V 16V
2 CER 2 CER 2 CER 2 CER
01005 01005 01005 01005
VDD 4
5
6
7
8
V1
V2
V3
V4
C U4700
HFQSWKFUA-227
C
LGA
L4700 CELL GPS/GNSS OUT_P 13 100_XCVR_GPS_RX_N
OUT 30 68
0 1 ANT 100_XCVR_GPS_RX_P
68 43 IN 50_DRX_ANT_TEST 1 2 68 50_DIVERSITY_SWITCH_MATCH CRITICAL GPS/GNSS OUT_N 14 OUT 30 68
5%
1/20W NOSTUFF
MF BAND7 OUT_P 16 100_XCVR_B1_B4_DRX_P 30 68
1 OUT
201 C4700 50_GPS_LNA_OUT 10 GPS/GNSS IN BAND7 OUT_N 17 100_XCVR_B1_B4_DRX_N B7 DIFF PAIR NET NAME TO BE UPDATED
1.0PF 68 42 IN OUT 30 68
+/-0.1PF
25V
2 C0G 100_XCVR_B5_B18_B13_B17_DRX_P
201 B5/18/13/17 OUT_P 20 OUT 30 68
B5/18/13/17 OUT_N 21 100_XCVR_B5_B18_B13_B17_DRX_N

CRITICAL OUT 30 68
B8/20 OUT_P 22 100_XCVR_B8_B20_DRX_P 30 68

OUT
B8/20 OUT_N 23 100_XCVR_B8_B20_DRX_N 30 68
OUT
B1/4/25/3 OUT_P 18 100_XCVR_B2_B25_B3_DRX_P OUT 30 68
B1/4/25/3 OUT_N 19 100_XCVR_B2_B25_B3_DRX_N 30 68

OUT
THRM
GND PAD
2
3
9
11
12
15
24
25
26
27
28
29
30
31
32
33
34
35
36
B B
NEED TO UPDATE
BAND DRX_ASM_V4 DRX_ASM_V3 DRX_ASM_V2 DRX_ASM_V1
B1/B4 LOW LOW LOW LOW
B2/25 LOW HIGH LOW LOW
B3 HIGH LOW LOW LOW
B5/6/18 LOW LOW HIGH LOW
B8 LOW LOW LOW HIGH
B13/17 LOW HIGH HIGH HIGH
B20 LOW HIGH HIGH LOW
A OFF LOW LOW HIGH HIGH
SWITCH IS TERMINATED IN ALL OTHER POSSIBLE STATES
8 7 6
1
GPS
D D
CKPLUS_WAIVE=TERMSHORTED
NOSTUFF BYPASSING INCLUDED IN MODULE
R4802 L4801
1
0 2 150OHM-25%-200MA-0.7DCR
VCC_GPS_LNA_2V5_INPUT 1 2
PP_LDO5_GPS_LNA_2V5
5% IN 26 68
C 1/10W
MF-LF
603
01005 C
J4802 1 C4803
GPS_ANT MS-180 5%
27PF
2 16V
6
F-ST-SM NP0-C0G
01005
J4800 VCC
G 3
MM5829-2700 G
A
U4800
F-ST-SM 2 SKY65736
1 68 50_GPS_ANT_COAX C 1 68 50_GPS_LNA_IN 8 RFIN LGA RFOUT 4 50_GPS_LNA_OUT 41 68
B CRITICAL OUT
G 4
G
2
3
4
GND
THRM_PAD
1
2
3
5
7
9
10
11
12
13
BOTTOM MOUNT TOP MOUNT
B B
8 7 6 5 4 3 2 1
1
ANTENNA FEEDS
D D
DRX_ANT COAX
CRITICAL
J4900 FL4900
MM5829-2700 LFE21832MHC1D765 R4901
F-ST-SM 0805-SM
68 50_DRX_ANT_FEED 1 3 68 50_DRX_ANT_PHASESHIFT 1
0 2 50_DRX_ANT_TEST
1 OUT 41 68
GND 5%
1/20W
2
3
4
2 MF
201
1
1
R4900 C4900
0.00
0.00 0%
0% 1/32W
1/32W MF
C MF
2 01005
NOSTUFF
2 01005
NOSTUFF C
PRI_ANT COAX
J4910
MM5829-2700
F-ST-SM
50_PRI_ANT_COAX
1 40 68
BI
2
3
4
B B
8 7 6 5 4 3
1
D D
SIM CARD FLEX CONN
L5100
80-OHM-25%-500MA
26 PP_LDO6_RUIM_1V8 PP_LDO6_RUIM_1V8_FILT
68 60 28
1 2 68
0201
C5101 1 1 C5100 1
R5100
1.0UF 12V-33PF
01005-1 15.00K
20% 1%
6.3V 2 2 1/32W
X5R MF
0201-1
2 01005
APN: 518S0692
FL5120
150OHM-25%-200MA-0.7DCR CRITICAL
60 29
SIMCRD_RST_CONN 1 2 J5100
IN
01005 FF18-6A-R11AD-B-3H
F-RT-SM
FL5121 1
150OHM-25%-200MA-0.7DCR 44 SIMCRD_RST_CONN_FILT 2
C 60 29 IN
SIMCRD_CLK_CONN 1
01005
2 44 SIMCRD_CLK_CONN_FILT
44 SIMCRD_IO_CONN_FILT
3
4
C
44 SIM_TRAY_DETECT_FILT 5
FL5122 6
150OHM-25%-200MA-0.7DCR
SIMCRD_IO_CONN 1 2
1 C5102
60 29 BI 100PF
01005 5%
2 6.3V
CERM
01005
FL5123
150OHM-25%-200MA-0.7DCR
60 29
SIM_TRAY_DETECT 1 2
OUT
01005
SIM CARD ESD PROTECTION

U5100
ESDAVLC5-4BX4-TPD4E101DPWR
LGA-COMBO
44 SIMCRD_IO_CONN_FILT 1 4 SIM_TRAY_DETECT_FILT 44
B B
5 GND
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

PART NUMBER
44 SIMCRD_RST_CONN_FILT 2 3 SIMCRD_CLK_CONN_FILT 44 TABLE_ALT_ITEM
377S0130 377S0159 ? U5100 RDAR://PROBLEM/12840016
8 7 6 5 4 3
1
D PROX SENSOR D
62 45 =PP1V8_PROX_AD7149 VDRIVE FOR: I2C AND GPIO
C5604 1 C5605 1
0.1UF 68PF
20% 5%
6.3V 6.3V
X5R-CERM 2 NP0-C0G 2
01005 01005
L5600
120-OHM-25%-250MA-0.5DCR
62
=PP3V0_PROX_AD7149 2 1 67 60 PP3V0_SENSOR_PROX_AD7149_FILT 1.8 MA MAX
01005
C5600 1 C5601 1 C5606 1
2.2UF 0.1UF 68PF
10% 20% 5%
6.3V 2 6.3V 6.3V
X5R X5R-CERM 2 NP0-C0G 2
402 01005 01005 I2C ADDRESS: 0101100+R/W
READ: 0X59, WRITE: 0X58
APN: 516S0872
=PP1V8_PROX_AD7149
C 62 45 FLEX: 516S0865
C
D2
C2
R56001
2.2K VCC VDRIVE CRITICAL
5% J5600
1/32W
MF U5600 503548-0620
01005 2 AD7149 F-ST-SM
WLCSP CRITICAL CRITICAL 8 7
61 PROX_AD7149_BIAS E3 BIAS 353S2964 CIN0 D3
L5604 L5603
CRITICAL CIN1 A3 220NH-2%-0.16A-3.1OHM 68NH-2%-320MA-1.0OHM
13
=I2C3_PROX_AD7149_SDA_1V8 E1 SDA 61 PROX_AD7149_ACSHIELD_CONN 2 1 NC_J2800_1 NO_TEST=TRUE
BI
CIN2 B3 2 1 2 1
61 PROX_AD7149_CIN7_FILT 61 PROX_AD7149_CIN7_CONN 4 3 NC_J2800_3 NO_TEST=TRUE
=I2C3_PROX_AD7149_SCL_1V8 C1 SCLK CIN3 A4
13 IN 0402 0402 61 PROX_AD7149_CIN9_CONN 6 5 NC_J2800_5 NO_TEST=TRUE
C3
VDRIVE RAIL
D1 CIN4
ADD0 A5
CIN5 61 PROX_AD7149_CIN5 10 9
B1 ADD1 CIN6 B4 CRITICAL CRITICAL
CIN7 B5 61 PROX_AD7149_CIN7 L5602 L5601
=GPIO_AD7149_PROX2SOC_IRQ_L A1 INT*
13 OUT
CIN8 C4 220NH-2%-0.16A-3.1OHM 68NH-2%-320MA-1.0OHM
A2 C5 2 1 2 1 CIN7 DUMMY
61 PROX_AD7149_GPIO GPIO CIN9 61 PROX_AD7149_CIN9 61 PROX_AD7149_CIN9_FILT CIN9 SENSOR ELECTRODE
INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE D4 0402 0402
B2 CIN10
NC TP D5
CIN11
ACSHIELD
E5
INT IS 1.8V LEVEL. R56011 CIN12
PCB: ACSHIELD NEEDS TO BE
C5602 1 C5607 1 100K PROX_AD7149_CIN_UNUSED
0.1UF 27PF 5% A PLANE UNDER PROX_CIN NETS
GND
1/32W
PROX GPIO WILL NOT BE USED.
10%
16V
5%
25V MF
C5610 1 C5603 1 AND ALSO TIE TO CONNECTOR.
THEREFORE,PROX GPIO IS NOT X5R-CERM 2 NP0-C0G 2 01005 2
0.5 PF
0201 0201 0.1UF 0.5PF
E4
E2
CONNECTED TO MLB INTERCONNECT. 10% +/-0.05PF JUST IN CASE
16V 25V NEED EXTERNAL
X5R-CERM 2 COG-CERM 2 REF CAP TO MEASURE
0201 0201
CHOSE CIN NUMBERS FOR LAYOUT EASE

B B
CRITICAL CRITICAL
L5608 L5607
220NH-2%-0.16A-3.1OHM 68NH-2%-320MA-1.0OHM
61 ACSHIELD_SB 2 1 61 ACSH_SB 2 1
0402 0402
PCB: ENSURE ACSHIELD PLANE UNDER

U3200, NO GND PLANE NEAR PROX_CIN NETS..
8 7 6 5 4 3 2 . 1
1
WIFI/BT: MODULE
D
MODULE ISOLATION
D
XW5890
SHORT-10L-0.25MM-SM
61 57 IN PMU_GPIO_WLAN_REG_ON 1 2 PMU_GPIO_WLAN_REG_ON_R 46 60
62 =PPVCC_MAIN_WLAN
XW5891 =PP3V3_S2R_WIFI_PA 61 62
SHORT-10L-0.25MM-SM
61 57 IN PMU_GPIO_BT_REG_ON 1 2 PMU_GPIO_BT_REG_ON_R 46 60
1 C5880 1 C5881 1 C5882
10UF 10UF 10UF 1 C5800 1 C5801
20% 20% 20%
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
4.7UF 4.7UF
XW5892 20% 20%
0402-2 0402-2 0402-2 6.3V 6.3V
SHORT-10L-0.25MM-SM 2 X5R-CERM1 2 X5R-CERM1
PMU_GPIO_CLK_32K_WLAN 1 2 PMU_GPIO_CLK_32K_WLAN_R 402 402
64 57 IN 46 60
VBAT 16
VBAT 17
RF_VCC_FEM 70
RF_VCC_FEM 71
XW5893
SHORT-10L-0.25MM-SM
29 25 OUT UART_WLAN2BB_LTE_COEX 1 2 UART_WLAN2BB_LTE_COEX_R 46 61
BT_GPIO5/LTE_COEX_UART_TX 51 UART_WLAN2BB_LTE_COEX_R 46 61
60 46 PMU_GPIO_CLK_32K_WLAN_R 33 CLK_32K
BT_GPIO4/LTE_COEX_UART_RX 50 UART_BB2WLAN_LTE_COEX_R 46 61
XW5894 55 PMU_GPIO_BT_HOST_WAKE
SHORT-10L-0.25MM-SM BT_GPIO1/HOSTWAKE OUT 57
29 25 UART_BB2WLAN_LTE_COEX 1 2 UART_BB2WLAN_LTE_COEX_R 46 61 BT_GPIO0/BTWAKE 56 GPIO_BT_WAKE 5 61

IN IN
XW5895 CRITICAL
SHORT-10L-0.25MM-SM
64 5 UART2_WLAN2SOC_TX 1 2 UART2_WLAN2SOC_TX_R 46 61 64
60 46 PMU_GPIO_WLAN_REG_ON_R 4 WL_REG_ON U5800
OUT
WIFI-BT-DOPPELBOCK
60 46 PMU_GPIO_BT_REG_ON_R 3 BT_REG_ON BT_UART_RXD 37 UART1_SOC2BT_TX 5 64
LGA IN
XW5896 BT_UART_TXD 38 UART1_BT2SOC_TX 5 64
JTAG_WLAN_SEL 23 OUT
SHORT-10L-0.25MM-SM 61 JTAG_SEL 36 UART1_BT2SOC_RTS_L
BT_UART_RTS* OUT 5 64
UART2_SOC2WLAN_TX 1 2 UART2_SOC2WLAN_TX_R
C 64 5 IN 46 61 64
1
R5800
10K
BT_UART_CTS* 39 UART1_SOC2BT_RTS_L
IN 5 64 C
5% I2S4_SOC2BT_BCLK
XW5897 HSIC1_WLAN_DATA 13 HSIC_DATA BT_PCM_CLK 41
SHORT-10L-0.25MM-SM
1/32W
MF
64 61 4 BI
14 42 I2S4_SOC2BT_LRCK
IN 5 64
R5804
HSIC1_SOC2WLAN_HOST_RDY 1 2 HSIC1_SOC2WLAN_HOST_RDY_R 2 01005 64 61 4 BI HSIC1_WLAN_STB HSIC_STROBE BT_PCM_SYNC IN 5 64 0.00 2
64 5 IN 46 61 64
43 I2S4_BT2SOC_DATA
1 WLAN_TX_BLANK IN 29
7 BT_PCM_OUT OUT 5 64
SDIO_CLK 0%
NC BT_PCM_IN 44 I2S4_SOC2BT_DATA IN 5 64 1/32W
6 SDIO_CMD MF
NC 01005
8 SDIO_DATA0 GPIO0/WL_HOST_WAKE 22 PMU_GPIO_WLAN_HOST_WAKE
NC OUT 57
NC
9 SDIO_DATA1 GPIO1/HOST_READY 20 HSIC1_SOC2WLAN_HOST_RDY_R 46 61 64
R5801
CRITICAL 10 27 TP_JTAG_WLAN_TCK 1
0.00 2 OSCAR2RADIO_CONTEXT_A
NC SDIO_DATA2 GPIO2/WL_TCK 61 64 IN 19 29
U5811 NC
11 SDIO_DATA3 GPIO3/WL_TMS 28 64
61 JTAG_WLAN_TMS_TX_BLANK 0%
1/32W
BAW-2436MHZ CRITICAL 77 GPIO4/WL_TDI 26 64
61 JTAG_WLAN_TDI_OSCAR_A MF
885061 RF_SW_CTRL11 01005
CRITICAL CRITICAL LGA C5811 NC GPIO5/WL_TDO 24 64
61 JTAG_WLAN_TDO_OSCAR_B
R5811 2.5NH+/-0.1NH-500MA 47 25 TP_JTAG_WLAN_TRST_L 61 64 R5802

U5810 0.00 2 NC I2SWS GPIO12/WL_TRST*
0.00 2 OSCAR2RADIO_CONTEXT_B
2.4-5.0GHZ 69 RF_G_0_DIPLEXER 1 69 RF_G_0_BAW_ANT 4 OUT IN
69 1 RF_G_0_BAW_MOD 1 2 69 RF_G_0_MATCH_MOD 46 I2SDO GPIO9/AGG_CHANNEL 19 1
SM
NC NC IN 19 29
1% 1 1 0201 CRITICAL 48 I2SDI GPIO10/HSIC_DEVICE_READY 1 HSIC1_WLAN2SOC_DEVICE_RDY 0%

LOW(2.4GHZ) 3 1/20W GND NC OUT 5 61 64
1/32W
MF
0201 CRITICAL CRITICAL
1 C5810 NC
49 I2SCLK GPIO11/HSIC_RESUME 2 HSIC1_WLAN2SOC_REMOTE_WAKE OUT 5 61 64 MF
01005
5
3
2
HIGH(5.0GHZ) 1 0.5PF 52 UART2_WLAN2SOC_TX_R

L5811 L5810 +/-0.05PF
25V
67 RF_A_0
GPIO15/WLAN_UART_TX
53
46 61 64
10NH-3%-250MA 8.2NH+/-3%-0.25A-0.7OHM 2 CERM 79 GPIO14/WLAN_UART_RX UART2_SOC2WLAN_TX_R 46 61 64

ANT(COMMON) 5 0201 0201 201 RF_A_1 30 =PP1V8_S2R_VDDIO_WLAN_BT 46 62
GPIO6 NC
GND 62 RF_G_0 GPIO7 29 WLAN_GPIO7
74 31 1
2 2 R5803
6
4
2
RF_G_1 GPIO8 NC
10K
VIO 35 =PP1V8_S2R_VDDIO_WLAN_BT 46 62
5%
1/32W
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
CRITICAL MF
C5814 DUMMY 57 NC 2 01005
1.0NH+/-0.1NH-0.75A
CRITICAL 69 RF_A_0_DIPLEXER 1 2 69 RF_A_0_MATCH
B J5810
MM4829-2702
F-ST-SM
CRITICAL
R5810 1
NOSTUFF
C5815
0201
1
CRITICAL
C5813
B
0.00 2 0.2PF 0.2PF
5
12
15
18
21
32
34
40
45
54
58
59
60
61
63
64
65
66
68
69
72
73
75
76
78
80
81
82
83
84
85
86
87
88
1 69 RF_0_ANT 1 69 RF_0_ANT_MATCH_T +/-0.1PF +/-0.05PF
NOSTUFF 1% NOSTUFF 2 25V
COG-CERM
25V
2 COG-CERM
1 C5817 1/20W 1 C5816 201 0201
2
3
4
MF
0.2PF 0201 0.2PF
+/-0.1PF +/-0.1PF
25V 25V
2 COG-CERM 2 COG-CERM
201 201
CRITICAL
CRITICAL U5820
J5820 CRITICAL DPX205850DT-9038A1SJ
MM4829-2702 SM
F-ST-SM R5820
0.00 2 5 COM CRITICAL
1 69 RF_1_ANT 1 69 RF_1_ANT_MATCH_T HI 1 C5821
NOSTUFF 1% NOSTUFF 0.00 2
1 C5827 1/20W 1 C5826 LO 3 69 RF_G_1_DIPLEXER 1 69 RF_G_1_MATCH_MOD
2
3
4
0.2PF MF
0.2PF NOSTUFF CRITICAL
0201 1%
+/-0.1PF
25V
2 COG-CERM
+/-0.1PF
25V
2 COG-CERM
GND 1 C5822 1/20W
MF
1 C5820
0.2PF 0201 1.0PF
6
4
2
201 201 +/-0.1PF +/-0.05PF

25V 25V
2 COG-CERM 2 C0G-CERM
201 0201
CRITICAL
C5824
A 69 RF_A_1_DIPLEXER
0.8NH-+/-0.1NH-0.8MA
1 2 69 RF_A_1_MATCH
0201
CRITICAL NOSTUFF
1 C5825 1 C5823
0.2PF 0.2PF
+/-0.05PF +/-0.05PF
2 25V
COG-CERM
25V
2 COG-CERM
0201 0201
8 7 6 5 4 3 2 1
1
D D
TABLE_ALT_HEAD

62 =PP3V0_S2R_TRISTAR =PP3V3_ACC 62
PART NUMBER
TABLE_ALT_ITEM
377S0155 377S0104 ? RDAR://PROBLEM/12840267

1 C6030 1 C6035 1 C6040 1 C6042 1 C6032 DZ6000,DZ6001,DZ6002,DZ6003,DZ6090
1.0UF 0.22UF 8.2PF 8.2PF 0.22UF
20% 20% +/-0.5PF +/-0.5PF 20%
2 6.3V
X5R 2 6.3V
X5R 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM
6.3V
2 X5R
0201-1 0201 01005 01005 0201
62 =PP1V8_S2R_TRISTAR
1 C6031 1 C6041 CRITICAL
VDD_1V8 F3
VDD_3V0 F4
ACC_PWR D5
0.22UF 8.2PF L6030
20% +/-0.5PF PPVBUS_PROT 55 60 67 90-OHM-50MA
2 6.3V
X5R 2 16V
NP0-C0G-CERM TCM0605-1
SYM_VER-1
0201 01005 1 1
C6043 C6034 1 C6045 1 4 E75_DPAIR1_CONN_P BI 49 60 64
8.2PF 1UF 1UF
+/-0.25PF 10% 10%
2 25V 2 25V 2 X5R
25V
U6000 NP0-C0G
0201
X5R
0402 0402 2 3 E75_DPAIR1_CONN_N BI 49 60 64
CBTL1610A1UK
C3 WLCSP
65 15 BI MIKEY_TS_P DIG_DP P_IN F6
C4 CRITICAL CRITICAL
65 15 BI MIKEY_TS_N DIG_DN ACC1 C5 PPOUT_E75_ACC_ID1 48 67 2 2
A1 ACC2 E5 PPOUT_E75_ACC_ID2 48 67
DZ6000 DZ6001
64 25 BI USB_BB_P USB1_DP ESD0P2RF-02LS ESD0P2RF-02LS
TO BB USB B1 TSSLP-2-1 TSSLP-2-1
64 25 BI USB_BB_N USB1_DN DP1 A2 64 E75_DPAIR1_P
DN1 B2 64 E75_DPAIR1_N 0.4PF
C 57 OUT PMU_USB_BRICKID C2 BRICK_ID
DP2 A4 64 E75_DPAIR2_P
1 1 0.4PF
C
ACCESSORY USB USB_SOC_P A3
64 60 4 BI USB0_DP
B3 DN2 B4 64 E75_DPAIR2_N
64 60 4 BI USB_SOC_N USB0_DN
CON_DET_L E3 60 TS_E75_ACC_DET_L CRITICAL
UART6_TS_ACC_TXD E2 UART0_TX
ACCESSORY UART
64 5 IN
E1 L6031
64 5 OUT UART6_TS_ACC_RXD UART0_RX POW_GATE_EN* D6 OVP_SW_EN_L OUT 55 90-OHM-50MA
TCM0605-1
SYM_VER-1
64 60 5 UART0_SOC_TXD F2 UART1_TX SWITCH_EN E4 RESET_SOC_L 4 13 25 57 60 61 67

IN IN 1 4 E75_DPAIR2_CONN_P
AP DEBUG UART F1 BI 49 60 64
64 60 5 OUT UART0_SOC_RXD UART1_RX HOST_RESET B6 TS2PMU_RESET_IN OUT 57 67
BB DEBUG UART 64 29 25 5 UART3_BB2SOC_TX D2 UART2_TX SDA D3 I2C2_SDA_1V8 5 64

IN OUT 2 3 E75_DPAIR2_CONN_N
(TS OFF TO SOC UART3) UART3_SOC2BB_TX D1 UART2_RX SCL D4 I2C2_SCL_1V8 BI 49 60 64
64 29 25 5 OUT IN 5 64
INT C6 GPIO_TS2SOC2PMU_INT
JTAG_SOC_TCK_R A5 OUT 5 57
JTAG_CLK E6
B5 BYPASS BYPASS_U5900 CRITICAL CRITICAL
JTAG_SOC_TMS_R JTAG_DIO 2 2
DZ6002 DZ6003
DVSS
DVSS
DVSS
R6030 1 ESD0P2RF-02LS ESD0P2RF-02LS
0.00 2 C6033 TSSLP-2-1 TSSLP-2-1
64 60 4 OUT JTAG_SOC_TCK 1 1.0UF
20% 0.4PF 0.4PF
0%
F5
C1
A6
6.3V
2 X5R 1 1
1/32W
MF 0201-1
01005
R6031
0.00 2
64 60 4 BI JTAG_SOC_TMS 1
0%
1/32W PPVCC_MAIN
MF 55 56 57 58 60 62 67
01005
TRISTAR 2:
AS OF 10/11/12 STILL PLAN TO STUFF CAP EVEN WITH TRISTAR2 NOSTUFF
B RDAR://PROBLEM/12580126 1
R6091
100K
1 C6091
8.2PF
B
5% +/-0.5PF
1/32W
MF 2 16V
NP0-C0G-CERM
2 01005 01005
XW6000
SHORT-10L-0.25MM-SM
15 OUT L81_MBUS_REF 1 2
FL6090
PLACE_NEAR=U6000.F5:5MM R6090 120-OHM-25%-250MA-0.5DCR
10K 1 2
1 2 E75_ACC_DET_R_L E75_ACC_DET_CONN_L IN 49 60
5% 01005 CRITICAL
1/32W NOSTUFF 2
MF 1 C6090 DZ6090
01005
8.2PF ESD0P2RF-02LS
+/-0.5PF TSSLP-2-1
K CRITICAL 16V
2 NP0-C0G-CERM
D6090 01005 1
SM-201
DSF01S30SC
A
TRISTAR 2:
FOR PULSED CON_DET_L SUPPORT
NOSTUFF R6080, STUFF R6081
NOSTUFF
R6080
A 60 57 PMU_E75_ACC_DET_L 1
0.00 2
A
0%
1/32W
1 MF
R6081 01005
0.00
0%
1/32W
MF
2 01005
8 7 6 5 4 3
1
L6100
FERR-22-OHM-1A-0.065-OHM
67 47 PPOUT_E75_ACC_ID1 1 2 PPOUT_E75_ACC_ID1_CONN 49 60 67
0201
0.055 OHM DCR C
1
DZ6191 C6170
14.2V-6PF 8.2PF
D A
0201-1
+/-0.5PF
2 16V
NP0-C0G-CERM
01005
D
TABLE_ALT_HEAD

PART NUMBER
L6101 TABLE_ALT_ITEM
FERR-22-OHM-1A-0.065-OHM 377S0116 377S0108 DZ6160 RDAR:8370432

TABLE_ALT_ITEM
67 47 PPOUT_E75_ACC_ID2 1 2 PPOUT_E75_ACC_ID2_CONN 49 60 67 155S0320 155S0513 L6100,L6101 RDAR://PROBLEM/9625601

0201 C TABLE_ALT_ITEM
0.055 OHM DCR 1 C6171 155S0741 155S0397 L6157

DZ6192 8.2PF
RDAR://PROBLEM/11238851
14.2V-6PF +/-0.5PF
0201-1 2 16V
NP0-C0G-CERM
A 01005
L6157
FERR-70-OHM-4A
62 =PPVBUS_USB_EMI 1 2 PPVBUS_E75_USB_CONN 49 60 67
0603
2 1 1
1 C6122 1
R6190 DZ6160 C6183 C6172
15PF 100K 27V-100PF 0.01UF 15PF
5% 10% 5%
5% 0402 2 50V 2 16V
2 16V
NP0-C0G-CERM 1/20W X7R NP0-C0G-CERM
C 01005 MF
2 201 1
402 01005
C
B B
8 7 6 5 4 3
1
D D
IO FLEX HOTBAR PADS

MLB 998-5877
FLEX 998-5876
OMIT
J6200
PCB-X110
HB-SM
1
2
3
4
C 65 60 17 IN SPKRAMP_R2_OUT_N 6
5
7
E75_DPAIR1_CONN_N
E75_DPAIR1_CONN_P
BI 47 60 64
47 60 64
C
SPKRAMP_R1_OUT_N 8 BI
65 60 17 IN 9
65 60 17 SPKRAMP_R2_OUT_P 10
IN 11 E75_ACC_DET_CONN_L OUT 47 60
65 60 17 SPKRAMP_R1_OUT_P 12
IN 13
65 60 18 SPKRAMP_L1_OUT_P 14
IN 15 PPOUT_E75_ACC_ID2_CONN 48 60 67
65 60 18 SPKRAMP_L2_OUT_P 16
IN 17
65 60 18 SPKRAMP_L1_OUT_N 18
IN 19
65 60 18 SPKRAMP_L2_OUT_N 20
IN 21
22
23 E75_DPAIR2_CONN_P 47 60 64
24 BI
25 E75_DPAIR2_CONN_N 47 60 64
PPOUT_E75_ACC_ID1_CONN 26 BI
67 60 48
27
28
29
30
31
67 60 49 48 PPVBUS_E75_USB_CONN 32
33
34
36
35 PPVBUS_E75_USB_CONN 48 49 60 67
37
38
39
40
41
42
43
44
45
46
47
B PINOUT MATCHES IO_FLEX 4.2.0 3/12/13 B
8 7 6 5 4 3
1
HOME BUTTON FILTERS D

D
FL6310
240-OHM-25%-0.20A-1.0DCR R6311
GPIO_BTN_HOME_L 1 2 GPIO_BTN_HOME_CONN_R_L 1
100 2
60 57 5 61
OUT
01005 5%
1/20W
1 MF
C6311 201 MLB: 518S0888
27PF FLEX: 998-5374
5%
2 16V
NP0-C0G
01005 CRITICAL
J6300
TF13BS-14S-0.4SH
F-RT-SM
15
FL6304 GPIO_BTN_HOME_CONN_L 1
C 240-OHM-25%-0.20A-1.0DCR
NC
2 C
60 57 PMU_GPIO_MB_HALL2_IRQ 1 2 PMU_GPIO_MB_HALL2_IRQ_FILT 3
OUT
01005 4
5
NC
6
NC
7
NC
8
NC
9
NC
10
NC
L6330 11
120-OHM-25%-250MA-0.5DCR 12
PP3V0_S2R_HALL_FILT NC
62 =PP3V0_S2R_HALL 1 2 67 60 20 13
01005 14
1 C6331 1 C6333 16
1.0UF 8.2PF
20% +/-0.5PF
2 6.3V
X5R 2 16V
NP0-C0G-CERM
0201-1 01005
PINOUT MATCHES HOME BUTTON ALT 3.0.0 5/9/13
B B
8 7 6 5 4 3
1
D D
GRAPE CONNECTOR SUPPORT
62 =PP1V8_S2R_GRAPE
62
=PPVCC_MAIN_GRAPE 1 C6515
1.0UF
20%
CRITICAL 6.3V
1
2 X5R
1 C6500 0201-1
0.1UF VDD
10%
2 16V
X5R-CERM
U6500
0201 SLG5AP1443V
TDFN
C 60 VCC_MAIN_GRAPE_RAMP 7 CAP D 3
C
62 =PP1V8_GRAPE 2 ON S 5 PP1V8_GRAPE_SW 52 60 61 67
1 GND CRITICAL
R6505 CRITICAL 1
1 C6505 C6510
8
100K 10UF
5% 4700PF 20%
1/32W 10%
MF 2 10V 2 10V
X5R-CERM
2 01005
X7R 0402-2
201
LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2300 IN CASE OF SHORTED CONDITION
B B
8 7 6 5 4 3
1
CUMULUS C1 (CSP) IN MASTER-SLAVE CONFIG

MASTER CUMULUS SLAVE CUMULUS
PP1V8_GRAPE_SW 51 52 60 61 67
=PP5V25_GRAPE 62 61 52
=PP5V25_GRAPE PP1V8_GRAPE_SW
62 61 52 51 52 60 61 67
1 C6603
0.1UF 1 C6652 1 C6653
1 C6602 1 C6609 10%
16V 1UF 0.1UF
1UF 100PF 2 X5R-CERM 10% 10%
10% 5% 0201 2 25V
X5R 16V
2 X5R-CERM
25V 6.3V
2 X5R 2 CERM 0402 0201
D
0402 01005
D
CUMULUS_M_VDDCORE PP1V8_GRAPE_SW 51 52 60 61 67
CUMULUS_S_VDDCORE PP1V8_GRAPE_SW 51 52 60 61 67
CUMULUS_M_VDDANA CUMULUS_S_VDDANA
1 C6604 1 C6605 1 C6606 1 C6654 1 C6656
4.7UF 0.1UF 100PF 0.1UF 100PF
1 C6600 1 C6601 20% 10% 5% 1 C6650 1 10% 5%
2.2UF 2.2UF 10V
2 X5R-CERM
16V
2 X5R-CERM
6.3V
2 CERM 2.2UF
C6651 16V
2 X5R-CERM
6.3V
2 CERM
10% 2.2UF
VDDANA B1
VDDCORE C1
VDDH C8
C5
F4
VDDLDO A1
VDDANA B1
VDDCORE C1
VDDH C8
C5
F4
VDDLDO A1
10% 0402 0201 01005 10% 0201 01005
10V
2 X5R-CERM 2 10V
X5R-CERM 10V
2 X5R-CERM
10%
10V
0402 2 X5R-CERM
0402 0402 0402
VDDIO VDDIO
65 61 52 MT_PANEL_IN<15> B9 IN0_0 U6600 VSTM_0 E9 MT_PANEL_OUT<0> 52 61 65 65 61 52 MT_PANEL_IN<0> B9 IN0_0 U6650 VSTM_0 E9 MT_PANEL_OUT<20> 52 61 65
65 61 52 MT_PANEL_IN<16> B8 IN1_0 CUMULUS-C1 VSTM_1 E5 MT_PANEL_OUT<1> 52 61 65 65 61 52 MT_PANEL_IN<1> B8 IN1_0 CUMULUS-C1 VSTM_1 E5 MT_PANEL_OUT<21> 52 61 65
65 61 52 MT_PANEL_IN<17> A9 IN2_0 WLBGA VSTM_2 F7 MT_PANEL_OUT<2> 52 61 65 65 61 52 MT_PANEL_IN<2> A9 IN2_0 WLBGA VSTM_2 F7 MT_PANEL_OUT<22> 52 61 65
65 61 52 MT_PANEL_IN<18> B7 IN3_0 VSTM_3 E6 MT_PANEL_OUT<3> 52 61 65 65 61 52 MT_PANEL_IN<3> B7 IN3_0 VSTM_3 E6 MT_PANEL_OUT<23> 52 61 65
65 61 52 MT_PANEL_IN<19> B6 IN4_0 VSTM_4 E7 MT_PANEL_OUT<4> 52 61 65 65 61 52 MT_PANEL_IN<4> B6 IN4_0 VSTM_4 E7 MT_PANEL_OUT<24> 52 61 65
65 61 52 MT_PANEL_IN<20> A8 IN5_0 CRITICAL VSTM_5 F8 MT_PANEL_OUT<5> 52 61 65 65 61 52 MT_PANEL_IN<5> A8 IN5_0 CRITICAL VSTM_5 F8 MT_PANEL_OUT<25> 52 61 65
65 61 52 MT_PANEL_IN<21> B5 IN6_0 VSTM_6 G9 MT_PANEL_OUT<6> 52 61 65 65 61 52 MT_PANEL_IN<6> B5 IN6_0 VSTM_6 G9 MT_PANEL_OUT<26> 52 61 65
65 61 52 MT_PANEL_IN<22> B4 IN7_0 VSTM_7 D6 MT_PANEL_OUT<7> 52 61 65 65 61 52 MT_PANEL_IN<7> B4 IN7_0 VSTM_7 D6 MT_PANEL_OUT<27> 52 61 65
65 61 52 MT_PANEL_IN<23> A7 IN8_0 VSTM_8 D7 MT_PANEL_OUT<8> 52 61 65 65 61 52 MT_PANEL_IN<8> A7 IN8_0 VSTM_8 D7 MT_PANEL_OUT<28> 52 61 65
65 61 52 MT_PANEL_IN<24> B3 IN9_0 VSTM_9 D8 MT_PANEL_OUT<9> 52 61 65 65 61 52 MT_PANEL_IN<9> B3 IN9_0 VSTM_9 D8 MT_PANEL_OUT<29> 52 61 65
65 61 52 MT_PANEL_IN<25> A6 IN10_0 VSTM_10 F9 MT_PANEL_OUT<10> 52 61 65 65 61 52 MT_PANEL_IN<10> A6 IN10_0 VSTM_10 F9 MT_PANEL_OUT<30> 52 61 65
65 61 52 MT_PANEL_IN<26> A3 IN11_0 VSTM_11 D5 MT_PANEL_OUT<11> 52 61 65 65 61 52 MT_PANEL_IN<11> A3 IN11_0 VSTM_11 D5 MT_PANEL_OUT<31> 52 61 65
PP1V8_GRAPE_SW 65 61 52 MT_PANEL_IN<29> B2 IN14_0 VSTM_14 G4 MT_PANEL_OUT<14> 52 61 65 65 61 52 MT_PANEL_IN<14> B2 IN14_0 VSTM_14 G4 MT_PANEL_OUT<34> 52 61 65

60 52 51
67 61 NC_CUMULUS_M_IN14_1 A2 IN14_1 VSTM_15 E8 MT_PANEL_OUT<15> 52 61 65 NC_CUMULUS_S_IN14_1 A2 IN14_1 VSTM_15 E8 MT_PANEL_OUT<35> 52 61 65
NO_TEST=TRUE NO_TEST=TRUE
C 64 61 60 5 SPI2_GRAPE_CS_L E4 H_CS*
VSTM_16
VSTM_17
G8
G7
MT_PANEL_OUT<16> 52 61 65
MT_PANEL_OUT<17> 52 61 65
67 61 60 52 51
PP1V8_GRAPE_SW
61 TP_CUMULUS_S_H_CS_L E4 H_CS*
VSTM_16
VSTM_17
G8
G7
MT_PANEL_OUT<36>
MT_PANEL_OUT<37>
52 61 65
52 61 65
C
61 60 5 GPIO_GRAPE2SOC_IRQ_L F1 H_INT* VSTM_18 G6 MT_PANEL_OUT<18> 52 61 65 R6650 1 NC_CUMULUS_S_H_INT_L
NO_TEST=TRUE
F1 H_INT* VSTM_18 G6 MT_PANEL_OUT<38> 52 61 65
64 61 60 5 SPI2_GRAPE_SCLK D3 H_SCLK VSTM_19 G5 MT_PANEL_OUT<19> 52 61 65 4.7K 61 TP_CUMULUS_S_H_SCLK D3 H_SCLK VSTM_19 G5 MT_PANEL_OUT<39> 52 61 65

1%
64 61 60 5 SPI2_GRAPE_MOSI D2 H_SDI 1/32W 61 TP_CUMULUS_S_H_SDI D2 H_SDI
MF
R66001 1
R6601 61 60 5 SPI2_GRAPE_MISO E1 H_SDO GPIO_1/CK
64 61 52 G1 CUMULUS_MS_CK 01005 61 TP_CUMULUS_S_H_SDO E1 H_SDO GPIO_1/CK G1 CUMULUS_MS_CK 52 61 64
4.7K 4.7K 64
D4 CUMULUS_MS_SD 52 61 64
2
D4 CUMULUS_MS_SD
1% 1% GPIO_2/SD GPIO_2/SD 52 61 64
1/32W 1/32W C4 F2 C4 F2
MF MF 64 61 TP_JTAG_CUMULUS_M_TCK JTAG_TCK GPIO_3 DISPLAY_SYNC 4 60 61 1 NC_JTAG_CUMULUS_S_TCK JTAG_TCK GPIO_3 NC_AG_TEST_GND_SNS
01005 2 2 01005 TP_JTAG_CUMULUS_M_TDI C3 JTAG_TDI GPIO_4 F3 NC_ESD_SENSE_R
R6604 NO_TEST=TRUE
NC_JTAG_CUMULUS_S_TDI C3 JTAG_TDI GPIO_4 F3
NO_TEST=TRUE
NC_AG_TEST_GND_DRV
64 61
NO_TEST=TRUE 100K NO_TEST=TRUE NO_TEST=TRUE
64 61 TP_JTAG_CUMULUS_M_TDO E2 JTAG_TDO 5% NC_JTAG_CUMULUS_S_TDO E2 JTAG_TDO
1/32W NO_TEST=TRUE
64 61 JTAG_CUMULUS_M_TMS C6 JTAG_TMS TM_ACS* C2 NC_CUMULUS_M_TM_ACS_L MF JTAG_CUMULUS_S_TMS C6 JTAG_TMS TM_ACS* C2 NC_CUMULUS_S_TM_ACS_L
NO_TEST=TRUE
2 01005 NO_TEST=TRUE
TM_OVR G3 TM_OVR G3
CUMULUS_M_BCFG_RTCK E3 BCFG_RTCK CUMULUS_S_BCFG_RTCK E3 BCFG_RTCK
61 60 52 5 CLK_32K_SOC2CUMULUS D1 CLKIN/RESET* 64 61 60 52 5 CLK_32K_SOC2CUMULUS D1 CLKIN/RESET*
67 64
61 60 52 5 GPIO_SOC2GRAPE_RESET_L D9 RSTOVR* 1
R6651 60 52 5 GPIO_SOC2GRAPE_RESET_L D9 RSTOVR*
67 61
GND 4.7K GND
1 1%
R6603 1/32W
4.7K MF
C7
C9
G2
C7
C9
G2
1% 01005
2
1/32W
MF
2 01005
B PINOUT MATCHES GRAPE_FLEX_DRIVE_ALT 0.1.0 1/8/13 PINOUT MATCHES GRAPE_FLEX_SENSE_ALT 0.1.0 1/8/13
B
CRITICAL
CRITICAL
J6640
J6620 AA03-S034VA1
AA03-S042VA1 F-ST-SM
F-ST-SM 35 36
43 44
1 2
1 2
65 61 52 MT_PANEL_IN<14> 3 4 MT_PANEL_IN<29> 52 61 65
65 61 52 MT_PANEL_OUT<12> 3 4 MT_PANEL_OUT<13> 52 61 65
65 61 52 MT_PANEL_OUT<27> 31 32 MT_PANEL_OUT<38> 52 61 65 33 34
A 65 61 52
65 61 52
MT_PANEL_OUT<28>
MT_PANEL_OUT<29>
33
35
34
36
MT_PANEL_OUT<37>
MT_PANEL_OUT<36>
52 61 65
52 61 65 37 38
45 46
8 7 6 5 4 3
1
EDP CONNECTOR SUPPORT

62 =PPVCC_MAIN_LCD
1 C7040 1
0.1UF
C7039
10% 0.1UF
10%
2 16V
X5R-CERM 2 16V
1
0201 X5R-CERM
0201
VDD
U7000 CRITICAL
SLG5AP304V
D LCD_RAMP 7 CAP
TDFN
CRITICAL
D 3
L7001
FERR-120-OHM-1.5A D
5 IN GPIO_SOC2LCD_PWREN 2 ON S 5 67 60 53 PPVCC_MAIN_LCD_SW 1 2 PPVCC_MAIN_LCD_SW_CONN 53 60 67
1 0402A
R7005 GND
100K CRITICAL 1 C7032
1 C7041 1 C7003 1 C7002 1 C7030
8
5% 15PF
1/32W 3900PF 0.1UF 10UF 82PF 5%
MF
2 01005
10% LAYOUT NOTE: 10% 20% 5% 2 16V
2 50V
X7R PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION
16V
2 X5R-CERM 2 6.3V
CERM-X5R
25V
2 CERM NP0-C0G-CERM
01005
0402 0201 0402 0201
67 60 53
PPVCC_MAIN_LCD_SW
NOSTUFF
1
R7040
100K
5%
1/32W
MF HPD VOLTAGE DIVIDER 2.5V TO 1.8V
2 01005 CRITICAL
EDP_AUX_P C7050 1 20.1UF 65 EDP_AUX_EMI_P L7042 EDP_AUX_EMI_CONN_P L7090
65 7 IN
010056.3V 20%
X5R-CERM 2 3
OUT 53 65
R7090 240-OHM-25%-0.20A-1.0DCR
7.5K 2 1 2
0.1UF 53 EDP_HPD_EMI_CONN 1 EDP_HPD_EMI EDP_HPD OUT 7 65
65 7 IN EDP_AUX_N C7051 1 2 65 EDP_AUX_EMI_N 1 4 EDP_AUX_EMI_CONN_N OUT 53 65 5% 01005
010056.3V 20%
X5R-CERM SYM_VER-2
TAM0605-4SM 1/32W
1
1
R7041 1
R7043
3.25-OHM-0.1A-2.4GHZ MF
01005 R7091 1 C7090
100K 100K 20.0K 27PF
5% 5% 5% 5%
1/32W 1/32W 1/32W 16V
2 NP0-C0G
MF
C MF
2 01005
MF
2 01005 2 01005
01005
C
CRITICAL
65 61 7 IN EDP_DATA_N<0> C7043 1 2 0.1UF65 61 EDP_DATA_EMI_N<0> L7012 EDP_DATA_EMI_CONN_N<0> 53 61 65
010056.3V 20%
X5R-CERM 2 3
65 61 7 IN EDP_DATA_P<0> C7042 1 2 0.1UF65 61 EDP_DATA_EMI_P<0> 1 4 EDP_DATA_EMI_CONN_P<0> 53 61 65

010056.3V 20%
X5R-CERM TAM0605-4SM
SYM_VER-2
3.25-OHM-0.1A-2.4GHZ
CRITICAL
EDP_DATA_N<1> C7044 1 2 0.1UF 65 EDP_DATA_EMI_N<1> L7022 EDP_DATA_EMI_CONN_N<1>
EDP CONNECTOR
65 61 7 61 53 61 65
IN
010056.3V 20%
X5R-CERM 2 3
65 61 7 IN EDP_DATA_P<1> C7045 1 2 0.1UF 65 61 EDP_DATA_EMI_P<1> 1 4 EDP_DATA_EMI_CONN_P<1> 53 61 65

010056.3V 20%
X5R-CERM SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ PINOUT MATCHES DISPLAY_EDP_FLEX 1.0.0 1/7/13
CRITICAL
CRITICAL
C7046 1 2 0.1UF 65 L7032 J7000
65 61 7 IN EDP_DATA_N<2> 61 EDP_DATA_EMI_N<2> EDP_DATA_EMI_CONN_N<2> 53 61 65 AA03-S042VA1
010056.3V 20%
X5R-CERM 2 3 F-ST-SM
43 44
65 61 7 IN EDP_DATA_P<2> C7047 1 2 0.1UF65 61 EDP_DATA_EMI_P<2> 1 4 EDP_DATA_EMI_CONN_P<2> 53 61 65

010056.3V 20%
X5R-CERM SYM_VER-2
TAM0605-4SM
3.25-OHM-0.1A-2.4GHZ 1 2
R7080 LED_IO_1_B 3 4 LED_IO_6_A
1.00M2
1
65 60 56 OUT OUT 56 60 65
EDP_DATA_EMI_CONN_N<0> 53 61 65
65 60 56 LED_IO_2_B 5 6 LED_IO_5_A 56 60 65
OUT OUT
B 01005
65 61 7 EDP_DATA_N<3> C7048 1 2 0.1UF65 61 EDP_DATA_EMI_N<3>
CRITICAL
L7002 EDP_DATA_EMI_CONN_N<3> 53 61 65
65 60 56
65 60 56
OUT LED_IO_3_B
LED_IO_4_B
7
9
8
10
LED_IO_4_A
LED_IO_3_A
OUT 56 60 65
56 60 65
B
IN OUT OUT
010056.3V 20%
X5R-CERM 2 3
65 60 56 OUT LED_IO_5_B 11 12 LED_IO_2_A OUT 56 60 65
R7081 LED_IO_6_B 13 14 LED_IO_1_A
1.00M2 EDP_DATA_EMI_CONN_P<0>
1 65 61 7 IN EDP_DATA_P<3> C7049 1 2 0.1UF65 61 EDP_DATA_EMI_P<3> 1 4 EDP_DATA_EMI_CONN_P<3> 53 61 65
65 60 56 OUT OUT 56 60 65
53 61 65
010056.3V 20%
X5R-CERM SYM_VER-2
TAM0605-4SM
15 16 EDP_HPD_EMI_CONN 53
01005 3.25-OHM-0.1A-2.4GHZ 17 18
67 60 53 PPVCC_MAIN_LCD_SW_CONN
19 20 EDP_DATA_EMI_CONN_N<0> 53 61 65
21 22 EDP_DATA_EMI_CONN_P<0> 53 61 65
R7082 23 24
1.00M2
1 EDP_DATA_EMI_CONN_N<1> 53 61 65 25 26 EDP_DATA_EMI_CONN_N<1> 53 61 65
01005 27 28 EDP_DATA_EMI_CONN_P<1> 53 61 65
CRITICAL 65 53 EDP_AUX_EMI_CONN_N 29 30
L7080 65 53 EDP_AUX_EMI_CONN_P 31 32 EDP_DATA_EMI_CONN_N<2> 53 61 65

R7083 120-OHM-25%-450MA 33 34 EDP_DATA_EMI_CONN_P<2>
1.00M2 NC 53 61 65
1 EDP_DATA_EMI_CONN_P<1> 53 61 65 PPLED_BACK_REG_A 35 36
62 =PPLED_REG_B 1 2 PPLED_BACK_REG_B 53 60 67
67 60 53
01005 37 38 EDP_DATA_EMI_CONN_N<3>
0201 53 61 65
1 C7080 1 C7081 67 60 53 PPLED_BACK_REG_B 39 40 EDP_DATA_EMI_CONN_P<3> 53 61 65
8.2PF 56PF 41 42
R7084 +/-0.5PF 2%
1.00M2 2 50V
C0G-CERM 2 50V
NP0-C0G-CERM
1 EDP_DATA_EMI_CONN_N<2> 53 61 65 201 0201 45 46
01005
R7085
1.00M2
1
CRITICAL
EDP_DATA_EMI_CONN_P<2>
01005
53 61 65
L7085
120-OHM-25%-450MA
A 62 =PPLED_REG_A 1 2 PPLED_BACK_REG_A 53 60 67
0201
R7086 1 1
1
1.00M2
EDP_DATA_EMI_CONN_N<3>
C7085 C7086
53 61 65
8.2PF 56PF
01005 +/-0.5PF 2%
2 50V
C0G-CERM 2 50V
NP0-C0G-CERM
201 0201
R7087
1.00M2
1 EDP_DATA_EMI_CONN_P<3> 53 61 65
01005
8 7 6 5 4 3 2 1
1
D D
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
155S0644 155S0823 ? RDAR://PROBLEM/11282371
FL7500,L1920
C C
62 =PPBATT_POS_CONN CRITICAL
J7500
BATT-J72
F-ST-TH
FL7500 6
240-OHM-0.2A-0.8-OHM
64 57 5 UART5_BATT_TRXD 1 2 64 60 BATT_SWI_CONN 1 HDQ
BI
0201-2 2 THERM
3 PACK_NEG
4 PACK_POS
67 60 57 BI BATT_NTC 1 C7522 1 C7523 1 C7524 1 C7525 1 C7526 1 C7527 1 C7528 5 SENSE
33PF 33PF 18PF 56PF 68PF 82PF 56PF
5% 5% 5% 5% 5% 5% 5%
2 25V
NPO-C0G 2 25V
NPO-C0G 2 25V 25V 50V
NP0-C0G-CERM2 NP0-C0G-CERM2 CERM 2 50V
CERM 2 25V
NP0-C0G-CERM
7
0201 0201 0201 0201 402-1 0402 0201
67 55 BATT_SNS
APN:516-0254
B B
8 7 6 5 4 3
1
PLACEMENT_NOTE=PLACE NEAR L8225.1
PPVCC_MAIN 47 55 56 57 58 60 62 67
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
C8140 1
C8141 1 1 C8144 1 C8142 1 C8143 CRITICAL
1 C8150 1 C8151 1 C8152 1 C8153 1 C8154 1 C8155 1 C8156 1 C8157 1 C8158 1 C8159 L8100
150UF 150UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 1.0UF 82PF 18PF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V
5% 5% 1.0UH-3.51A-0.036OHM
6.3V 2 6.3V 2 6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R 2 X5R 2 25V
CERM
25V
2 NP0-C0G-CERM
TANT-1 TANT-1
B15G B15G 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0201-1 0201 0201 67 BUCK0_LX0 1 2 PPVDD_CPU 60 62
MIN_LINE_WIDTH=0.60MM 67
MIN_NECK_WIDTH=0.20MM PILE25201D CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
ESR MAX=70MOHM ESR MAX=70MOHM CRITICAL
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM
1 C8100 1 C8101 1 C8102 1 C8103 1 C8104
DIDT=TRUE SWITCH_NODE=TRUE L8101 15UF 15UF 15UF 15UF 15UF
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 1.0UH-3.51A-0.036OHM 20%
4V
20% 20% 20% 20%
VCC_MAIN BYPASS 1 1 1 1 1 1 1 1 1 1 1 1 1 2 X5R 2 4V
X5R 2 4V
X5R 2 4V
X5R 2 4V
X5R
C8160 C8161 C8162 C8163 C8164 C8165 C8166 C8167 C8168 C8169 C8170 C8171 C8172 67 BUCK0_LX1 1 2 0402 0402 0402 0402 0402
PLACE TWO 10UF CAP 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF MIN_LINE_WIDTH=0.60MM
PILE25201D
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% MIN_NECK_WIDTH=0.20MM
AT EACH VDD INPUT 6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R NET_SPACING_TYPE=PWR CRITICAL
D 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 DIDT=TRUE SWITCH_NODE=TRUE
L8102
1.0UH-3.51A-0.036OHM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL D
67 BUCK0_LX2 1 2
1 C8105 1 C8106 1 C8107 1 C8108 1 C8109
MIN_LINE_WIDTH=0.60MM 15UF 15UF 15UF 15UF 15UF
MIN_NECK_WIDTH=0.20MM PILE25201D 20% 20% 20% 20% 20%
4V 4V 4V 4V 4V
NET_SPACING_TYPE=PWR CRITICAL 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
CRITICAL OMIT_TABLE MAX_NECK_LENGTH=0.5 MM
DIDT=TRUE SWITCH_NODE=TRUE L8103 0402 0402 0402 0402 0402
L8112 1.0UH-3.51A-0.036OHM
2.2UH-20%-5.6A-0.03OHM U8100 1 2
D2089A0 67 BUCK0_LX3
67 62 60 58 57 56 55 47 PPVCC_MAIN 1 2 SW_CHGA
67 61 MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM PILE25201D
NOSTUFF PILE101D-SM
MIN_LINE_WIDTH=0.6 MM FCBGA NET_SPACING_TYPE=PWR
CRITICAL CRITICAL
CRITICAL K MIN_NECK_WIDTH=0.20 MM
SYM 1 OF 4
R8170 1 2 3 DCR=30MOHM MAX
D8100 NET_SPACING_TYPE=PWR
G19 E1
DIDT=TRUE SWITCH_NODE=TRUE XW8101
1 C8110 1 C8111
4.7K 2 SOD-123W
DIDT=TRUE
CHG_LX0 15UF 15UF
55 47 OVP_SW_EN_L 1 S SWITCH_NODE=TRUE
H19 BUCK0_LX0 E2 67 BUCK0_FB 1 2 20% 20%
CRITICAL PMEG4030ER CHG_LX1 MIN_LINE_WIDTH=0.25MM SM 4V
2 X5R 4V
2 X5R
5% 4 G J19 G1 MIN_NECK_WIDTH=0.20MM
1/20W A CHG_LX2 CRITICAL 0402 0402
MF Q8104 PLACE_NEAR=U8100.R17:2MM
K19 G2
201 FDMC6683 CHG_LX3 BUCK0_LX1 L8104
R8172 J1 1.0UH-3.51A-0.036OHM
MLP3.3X3.3
BATT_SNS 1
0 2 BATT_SNS_R R17
67 54 67 VBAT BUCK0_LX2 J2
PLACE_NEAR=U8100.R17:10MM P17 67 BUCK1_LX0 1 2 PPVDD_GPU 60 62 67
D 5% IBAT_S MIN_LINE_WIDTH=0.60MM
1/20W NOSTUFF 1 PLACE_NEAR=U8100.R17:10MM L1 PILE25201D CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
RDSON=0.0136@VGS=-2.5V 5 MF 1 C8149 R8173 MIN_NECK_WIDTH=0.20MM
ID=12.0A LAYOUT NOTE -

201
0.022UF 499 M19 IBAT0 BUCK0_LX3 L2 NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM CRITICAL 1 C8112 1 C8113 1 C8114 1 C8115 1 C8116
1% N19 DIDT=TRUE SWITCH_NODE=TRUE
L8105 15UF 15UF 15UF 15UF 15UF
R8172- PLACE NEAR PMU 10%
25V 1/20W IBAT1 BUCK0_FB H6 20% 20% 20% 20% 20%
C8149- PLACE NEAR PMU 2 X7R MF P19 1.0UH-3.51A-0.036OHM 4V
2 X5R 2 4V 2 4V 2 4V 2 4V
R8173- PLACE NEAR PMU 0402 2 201 IBAT2 N1 X5R X5R X5R X5R
R19 67 BUCK1_LX1 1 2 0402 0402 0402 0402 0402
IBAT3 BUCK1_LX0 N2 MIN_LINE_WIDTH=0.60MM
67 62 60 55 PPBATT_VCC MIN_NECK_WIDTH=0.20MM PILE25201D
ACT_DIO N17 ACT_DIO R1 NET_SPACING_TYPE=PWR CRITICAL
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM
BUCK1_LX1 R2 DIDT=TRUE SWITCH_NODE=TRUE
L8106
XW8114 PMU_VCENTER F18
NET_SPACING_TYPE=ANLG
SHORT-0201
67 60
U1 1.0UH-3.51A-0.036OHM CRITICAL CRITICAL CRITICAL CRITICAL
MIN_LINE_WIDTH=0.60MM F19 1 1 1 1
MOSFET FDMC6676BZ 67 4 USB_VBUS_DETECT 2 1 MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR G18
BUCK1_LX2 U2 67 BUCK1_LX2 1 2 C8117 C8118 C8119 C8120
MIN_LINE_WIDTH=0.60MM 15UF 15UF 15UF 15UF
MIN_LINE_WIDTH=0.20MM MAX_NECK_LENGTH=3 MM
H18 BUCK1_FB M6 MIN_NECK_WIDTH=0.20MM PILE25201D 20% 20% 20% 20%
USB/BAT
CHANNEL P-TYPE MIN_NECK_WIDTH=0.15MM PLACE_NEAR=U8100.F18:2MM PLACE_NEAR=U8100.L18:2MM VOLTAGE=6.0V 4V 4V 4V 4V
BUCK
NET_SPACING_TYPE=PWR CRITICAL CRITICAL NET_SPACING_TYPE=PWR 2 X5R 2 X5R 2 X5R 2 X5R
VCENTER MAX_NECK_LENGTH=0.5 MM
C RDS(ON) 27 MOHM @-4.5V
MAX_NECK_LENGTH=3 MM
VOLTAGE=6.0V 1 C8148
4.7UF
1 C8147
4.7UF LAYOUT NOTE: PLACE
J18
K18 BUCK2_LX0
U7
V7
67
DIDT=TRUE
BUCK1_FB
SWITCH_NODE=TRUE
1
XW8102
2
0402 0402 0402 0402
C
10% 10% L18
IMAX 6.9 A 35V
2 X5R-CERM
35V
2 X5R-CERM RIGHT AT THE PIN BUCK2_FB P7 MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM SM
0603 0603 L19 CRITICAL
VGS MAX +/- 25V A5
L8107 ADDITIONAL DISTRIBUTED
67 60 47 PPVBUS_PROT F16 BUCK3_LX0 B5 1.0UH-3.51A-0.036OHM 27UF (NO DERATING)
NOSTUFF CRITICAL MIN_LINE_WIDTH=0.20MM PLACE_NEAR=U8100.F16:10MM F17 BUCK3_FB E6 PPVDD_SOC
K
MIN_NECK_WIDTH=0.15MM CRITICAL 67 BUCK2_LX0 1 2

DZ8120 60 62 67
3
2
1
G16
R81161 CRITICAL
BZT52C10LP
MAX_NECK_LENGTH=3 MM C8145 1 A7
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM PILE25201D CRITICAL CRITICAL CRITICAL
470K Q8123 VOLTAGE=6.0V 2.2UF G17 NET_SPACING_TYPE=PWR 1 C8121 1 C8122 1 C8123
1% S LLP
10% BUCK4_LX0 B7 MAX_NECK_LENGTH=0.5 MM
1/20W FDMC6676BZ 25V H16 DIDT=TRUE SWITCH_NODE=TRUE XW8103 15UF 15UF 15UF
NOTE: 10V ZENER BUCK4_FB E7
A
MF MLP3.3X3.3 G 4 X5R-CERM 2 H17 VBUS BUCK2_FB 1 2

20% 20% 20%
2 4V 2 4V 2 4V
67
201 2 603
MIN_LINE_WIDTH=0.25MM X5R X5R X5R
J17 U5 MIN_NECK_WIDTH=0.20MM SM 0402 0402 0402
VBUS_PROT_G 60 CRITICAL
MIN_LINE_WIDTH=0.20MM K16 BUCK5_LX0 V5
MIN_NECK_WIDTH=0.1MM LAYOUT NOTE: PLACE L8108 ADDITIONAL DISTRIBUTED
D 1 NET_SPACING_TYPE=ANLG RIGHT AT THE PIN K17 BUCK5_FB P6 1.0UH-3.51A-0.036OHM
R8130 L16
64UF (NO DERATING)
5
220K C1 67 BUCK3_LX0 1 2 PP1V8_S2R 55 56 60 62 67

1% L17
67 62 60 PPVBUS_USB_DCIN 1/20W R8146 BUCK6_LX0 C2
MIN_NECK_WIDTH=0.20MM PILE25201D CRITICAL CRITICAL CRITICAL
MF
201 2
OVP_SW_EN_L 1
4.7K 2 OVP_SW_EN_L_R C16 VBUS_OVP_OFF F6
1 C8124 1 C8125 1 C8126
55 47 BUCK6_FB 15UF 15UF 15UF
USB REVERSE VOLTAGE PROTECTION NOSTUFF A1
DIDT=TRUE SWITCH_NODE=TRUE XW8104 20% 20% 20%
5% BUCK6_BYP0 BUCK3_FB 1 2
1 D17 HV_CHG_DIS 67 4V 4V 4V
1/20W
MF
C8146 TP_HV_CHG_EN
BUCK6_BYP1 A2 MIN_LINE_WIDTH=0.25MM SM
2 X5R 2 X5R 2 X5R
201 0.01UF MIN_NECK_WIDTH=0.20MM 0402 0402 0402
LAYOUT NOTE: 10% 62 55 =PPVCC_MAIN_CPU F1 BUCK6_BYP2 A3 CRITICAL
25V
R8146, C8146 CAN BE 2 X5R-CERM F2 VDD_BUCK0_01 L8109 ADDITIONAL DISTRIBUTED
ANYWHERE BET.TRISTAR 0201 B13 1.0UH-3.51A-0.036OHM
K1 27UF (NO DERATING)
AND PMU B14
K2 VDD_BUCK0_23 VBUCK3 67 BUCK4_LX0 1 2 PP1V2_S2R 55 56 60 62 67
C14 MIN_LINE_WIDTH=0.60MM PILE25201D CRITICAL CRITICAL CRITICAL
MIN_NECK_WIDTH=0.20MM
62 55
=PPVCC_MAIN_GPU P1 A12 NET_SPACING_TYPE=PWR 1 C8127 1 C8128 1 C8129
P2 VDD_BUCK1_01 B12 DIDT=TRUE SWITCH_NODE=TRUE
XW8105 15UF 15UF 15UF
20% 20% 20%
V1 BUCK3_SW1 C12 67 BUCK4_FB 1 2 4V
2 X5R
4V
2 X5R
4V
2 X5R
B V2
V3
VDD_BUCK1_2
C13
BUCK3_SW2 A13
MIN_NECK_WIDTH=0.20MM
CRITICAL
SM 0402 0402 0402
B
L8110 ADDITIONAL DISTRIBUTED
U8 BUCK3_SW3 A14 1.0UH-3.7A-0.055OHM 64UF (NO DERATING)
62 55 =PPVCC_MAIN_SOC
VDD_BUCK2 B10 BUCK5_LX0 1 2 PPVDD_SRAM
V8 67 60 62 67
MIN_LINE_WIDTH=0.60MM PILE20161D-SM CRITICAL CRITICAL CRITICAL
B11 MIN_NECK_WIDTH=0.20MM
67 62 60 58 57 56 55 47 PPVCC_MAIN A4 VBUCK4 NET_SPACING_TYPE=PWR 1 C8130 1 C8131 1 C8132
C11 MAX_NECK_LENGTH=0.5 MM
15UF 15UF 15UF
SWITCHED POWER
B4 VDD_BUCK3
VCC-MAIN
A9
DIDT=TRUE SWITCH_NODE=TRUE
XW8106 20% 20% 20%
62 55 =PPVCC_MAIN_CPU 67 BUCK5_FB 1 2 4V
2 X5R
4V
2 X5R
4V
2 X5R
A8 B9 MIN_LINE_WIDTH=0.25MM SM
MIN_NECK_WIDTH=0.20MM 0402 0402 0402
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL B8 VDD_BUCK4 BUCK4_SW1 C9 CRITICAL
1 C8175 1 C8176 1 C8177 1 C8178 1 C8179 1 C8180 1 C8181 C10 L8111 ADDITIONAL DISTRIBUTED
10UF 10UF 10UF 10UF 10UF 10UF 10UF U4 2.2UH-2.35A-0.073OHM
20% 20% 20% 20% 20% 20% 20%
V4 VDD_BUCK5 BUCK4_SW2 A10 32UF (NO DERATING)
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 67 BUCK6_LX0 1 2 PP3V3_S2R 60 62 67
0402 0402 0402 0402 0402 0402 0402 B1 VPUMP A11 MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM PILE25201D CRITICAL CRITICAL CRITICAL CRITICAL
NET_SPACING_TYPE=PWR 1 C81A0 1 C81A1 1 C81A2 1 C81A3
B2 MAX_NECK_LENGTH=0.5 MM
VDD_BUCK6 DIDT=TRUE SWITCH_NODE=TRUE XW8107 10UF 10UF 10UF 10UF
B3 20% 20% 20% 20%
67 BUCK6_FB 1 2 6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
6.3V
2 CERM-X5R
62 55 =PPVCC_MAIN_GPU T16 VCC_MAIN_S MIN_NECK_WIDTH=0.20MM SM 0402 0402 0402 0402
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL M18

1 C8182 1 C8183 1 C8184 1 C8185 1 C8186 N18 PP1V8_S2R 55 56 60 62 67
10UF 10UF 10UF 10UF 10UF PP1V8_SW1 57 59 60 62 67
20% 20% 20% 20% 20% P18 VCC_MAIN CRITICAL CRITICAL CRITICAL CRITICAL
6.3V 6.3V 6.3V 6.3V 6.3V PP1V8_SW2
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 60 62 67
0402 0402 0402 0402 0402
R18
PP1V8_S2R_SW3
1 C81A4 1 C81A5 1 C81A6 1 C81A7
60 62 67
10UF 10UF 10UF 10UF
20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V
NOTE: FOR NO BATTERY SITUATION 2 CERM-X5R
0402
2 CERM-X5R
0402
2 CERM-X5R
0402
2 CERM-X5R
0402
=PPVCC_MAIN_SOC 67 62 60 55 PPBATT_VCC
62 55 PP1V2_S2R 55 56 60 62 67
A 1
CRITICAL
C8187 1
CRITICAL
C8188
CRITICAL CRITICAL PMU_VPUMP
PP1V2_SW1
PP1V2_S2R_SW2
60 62 67
1 C8193 1 C8194 MIN_LINE_WIDTH=0.30MM

60 62 67
10UF 10UF 10UF 10UF MIN_NECK_WIDTH=0.20MM
20% 20% 20% 20% NET_SPACING_TYPE=PWR
6.3V 6.3V
2 CERM-X5R 2 CERM-X5R 6.3V
2 CERM-X5R
6.3V
2 CERM-X5R MAX_NECK_LENGTH=3 MM
VOLTAGE=4.6V
1 C8196 1 C8135 1 C8136 1 C8137 1 C81A8 1 C8138 1 C8139 1 C81A9
0402 0402 0402 0402 0.22UF 1.0UF 1UF 1.0UF 1.0UF 1.0UF 1UF 1.0UF
20% 20% 10% 20% 20% 20% 10% 20%
60 PPBATT_POS_RC 6.3V
2 X5R
6.3V
2 X5R
6.3V
2 CERM
6.3V
2 X5R
6.3V
2 X5R
6.3V
2 X5R
6.3V
2 CERM
6.3V
2 X5R
MIN_NECK_WIDTH=0.20MM 0201 0201-1 402 0201-1 0201-1 0201-1 402 0201-1
R81001 NET_SPACING_TYPE=PWR
0.5 VOLTAGE=4.7V
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 1%

PART NUMBER 1/16W
TABLE_ALT_ITEM MF C8137 0201 OKAY IF GRAPE HAS EXT FET
128S0339 128S0279 ? C8140,C8141 RDAR://PROBLEM/8967213 402 2
8 7 6 5 4 3
1
OMIT_TABLE
LDO INPUTS U8100

D2089A0
67 62 60 55 PP1V8_S2R
1 CAP PER PIN
FCBGA
SYM 2 OF 4
LDO OUTPUTS
1 C8200 1 C8203
1UF 1UF PPVCC_MAIN T18 U19 (50MA; 2.5-3.3V) PP3V0_SPARE1
D 10%
2 6.3V
CERM
10%
2 6.3V
CERM
62 60 58 57 56 55 47
67
B16
VDD_LDO1_3_4
VDD_LDO2
VLDO1
VLDO2 A16 (100MA; 1.65-1.805V; BUCK3) PP1V7_VA_VCP
56 60 62 67
56 60 62 67
D
402 402 67 62 60 58 57 56 55 47 PPVCC_MAIN U9 VDD_LDO5 VLDO3 U18 (50MA; 2.5-3.3V) PP3V0_S2R_SENSOR 56 60 62 67
U10 T19 (50MA; 2.5-3.3V) PP3V0_ALS
LDO INPUT
VDD_LDO6 VLDO4 56 60 62 67
67 62 60 55 PP1V2_S2R U14 VDD_LDO7 VLDO5 V9 (1000MA; 2.5-3.6V) PP3V0_UVLO 56 60 62 67
LDO
U15 VDD_LDO8 VLDO6 V10 (150MA; 2.5-3.6V) PP3V3_ACC 56 60 62 67
1 C8201 B15 VDD_LDO9 VLDO7 V14 (300MA; 1.7-3.0V) PP3V0_S2R_TRISTAR
1UF 56 60 62 67
10% B17 VDD_LDO10 VLDO8 V15 (300MA; 1.7-3.0V) PP3V0_S2R_HALL
2 6.3V
56 60 62 67
CERM 67 62 60 58 57 56 55 47 PPVCC_MAIN U16 VDD_LDO11 VLDO9 A15 (300MA; 1.2-3.0V) PP1V3_CAM 56 60 62 67
402
T17 VDD_LDO13 VLDO10 A17 (150MA; 0.6-1.3V) PP1V0_SOC 56 60 62 67 CRITICAL
CRITICAL CRITICAL V16 (300MA; 1.7-3.0V)
L8225 C18 VLDO11 PP2V6_CAM_AF 62 67
56 L8229 MIN_LINE_WIDTH=0.4 MM
D8228 67 61 WLED_LX_A
MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=PWR
WLED_LXA0
VLDO13 U17 (300MA; 1.7-3.0V) PP2V9_CAM
60
2.2UH-1.05A-0.195OHM MIN_NECK_WIDTH=0.2 MM
4.7UH-3.4A-0.075OHM PMEG4010BEA DIDT=TRUE C19 56 60 62 67
MIN_NECK_WIDTH=0.20 MM SWITCH_NODE=TRUE WLED_LXA1 T10 (5MA; 1.8V; ON_BUFF) 1 2 DIDT=TRUE
(PPLED_OUT_A) D16 ON_BUF PP1V8_ALWAYS 56 60 62 67
62 56 =PPVCC_MAIN_LED 1 2
A K VOUT_WLED_A MAKE_BASE=TRUE CRITICAL
VOLTAGE=6.0V VLS201612E-SM
PILE051D-SM-COMBO-J72 65 LED_IO1_A_R E14 WLED1_A VDD_LCM_SW C17 =PPVCC_MAIN_VDD_LCM 62 MIN_LINE_WIDTH=0.4MM D8230
CRITICAL DCR=106MOHM MAX SOD-323 MIN_NECK_WIDTH=0.2MM
C8226 1 R8270 65 LED_IO2_A_R F14 WLED2_A VDD_BOOST_LCM A18 67 61 PP6V0_LCM_HI (NOTE: 2MHZ) NET_SPACING_TYPE=PWR PMEG2005AEL
10UF 1.00 2 MAKE_BASE=TRUE
LCD BACKLIGHT
65 60 53 LED_IO_1_A 1 65 LED_IO3_A_R G14 WLED3_A BOOST_LCM_LX B19 67 LCM_LX
VOLTAGE=6.0V
20% IN A K MIN_LINE_WIDTH=0.4MM
LCM/GRAPE
6.3V 1% LED_IO4_A_R H14 C15 MIN_NECK_WIDTH=0.2MM
CERM-X5R 2 1/32W
65 WLED4_A LCM_FB
SOD882 NET_SPACING_TYPE=PWR
0402 R8271 MF 65 LED_IO5_A_R J14 WLED5_A VDD_LCM U11 67 60 PP6V0_LCM_VBOOST MAX_NECK_LENGTH=3 MM
1.00 2 01005 J16 V11 (100MA; 5.0-6.0V)
65 60 53 IN LED_IO_2_A 1 65 LED_IO6_A_R WLED6_A VLCM1 PP5V25_GRAPE 60 62 67
67 62 60 PPLED_OUT_A 1% VLCM2 V12 (100MA; 5.0-6.0V) NO_TEST=TRUE NC_VLCM2
1/32W E18 WLED_LXB0
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL MF NET_SPACING_TYPE=PWR LCM2_EN E8 LCM2_EN CRITICAL
1 1 1 1 1 1 01005
1 C8271 1 C8270 DIDT=TRUE E19 WLED_LXB1 1 C8212 1 1 C8211
C8250 C8251 C8252 C8253 C8254 C8259 56PF 56PF
SWITCH_NODE=TRUE
E16 VLCM3 U12 (5MA; 5.0-6.0V) NO_TEST=TRUE NC_VLCM3 C8210 10UF
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 56PF 2% 2% VOUT_WLED_B 10UF 2.2UF 20%
10% 10% 10% 10% 10% 2% 50V 50V K14 20% 20%
2 35V 2 35V 2 35V 2 35V 2 35V 2 50V
2 NP0-C0G-CERM 2 NP0-C0G-CERM 65 LED_IO1_B_R WLED1_B 2 25V 10V
2 X5R-CERM 2 10V
X5R-CERM
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM NP0-C0G-CERM 0201 0201 L14 X5R-CERM 0402-2
0603 0603 0603 0603 0603 0201 65 LED_IO2_B_R WLED2_B 0603 402
M14 XTAL1 V18 PMU_XTAL 65
XTAL
65 LED_IO3_B_R WLED3_B
M16 XTAL2 V17 PMU_EXTAL 65
65 LED_IO4_B_R WLED4_B
C R8272
1.00 2
65 LED_IO5_B_R
65 LED_IO6_B_R
N14
P14
WLED5_B
WLED6_B
C
65 60 53 IN LED_IO_3_A 1 1
1%
R8250
1/32W 1K
R8273 MF CRITICAL 5%
1/20W
1
1.00 2 01005 Y8200 MF
65 60 53 IN LED_IO_4_A
32.768K-20PPM-12.5PF 2 201
1% 2 1
1/32W
MF CRITICAL CRITICAL
01005 1 C8273 1 C8272 C8215 1 2012-1 1 C8216
56PF 56PF 18PF 18PF
TABLE_ALT_HEAD
2% 2% 5% 5%
PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS: 2 50V 50V
NP0-C0G-CERM 2 NP0-C0G-CERM
25V
C0G-CERM 2 2 25V
C0G-CERM
TABLE_ALT_ITEM
0201 0201 0201 0201 TABLE_ALT_HEAD
152S1837 152S1789 ? L8225,L8255 RDAR://PROBLEM/13487208 PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER
TABLE_ALT_ITEM
197S0399 197S0392 ? Y8200 RDAR://PROBLEM/9936684

R8274
1.00 2
65 60 53 IN LED_IO_5_A 1 LDO BYPASS
1%
R8275 1/32W PP3V0_SPARE1
MF 67 62 60 56
1.00 2 01005 PP1V7_VA_VCP
65 60 53 IN LED_IO_6_A 1 67 62 60 56
1% 67 62 60 56 PP3V0_S2R_TRISTAR
1/32W PP3V0_ALS
MF 67 62 60 56
01005 PP3V0_UVLO
1 C8275 1 C8274 67 62 60 56
56PF 56PF 67 62 60 56 PP3V3_ACC

2% 2%
2 50V 50V 67 62 60 56 PP3V0_S2R_HALL
NP0-C0G-CERM 2 NP0-C0G-CERM
0201 0201 67 62 60 56 PP3V0_S2R_SENSOR
B CRITICAL
C8237 1
CRITICAL
C8236 1
CRITICAL
1
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL B
2.2UF 10UF
C8235 C8234 1 C8233 1 C8232 1 C8231 1 C8230 1
10% 20% 4.7UF 10UF 2.2UF 10UF 10UF 2.2UF
6.3V 2 6.3V 20% 20% 10% 20% 20% 10%
X5R 6.3V 2
CERM-X5R 2 X5R-CERM1 6.3V 6.3V 2 6.3V 6.3V 6.3V 2
67 61 WLED_LX_B 402 0402 CERM-X5R 2 X5R CERM-X5R 2 CERM-X5R 2 X5R
402 0402 402 0402 0402 402
MIN_LINE_WIDTH=0.6 MM
CRITICAL CRITICAL MIN_NECK_WIDTH=0.20 MM
L8255 D8258
4.7UH-3.4A-0.075OHM PMEG4010BEA 67 62 60 56 PP1V3_CAM
=PPVCC_MAIN_LED 1 2 (PPLED_OUT_B) 67 62 60 56 PP1V0_SOC
62 56
A K
PILE051D-SM-COMBO-J72 67 62 60 56 PP2V6_CAM_AF
CRITICAL DCR=106MOHM MAX SOD-323 R8280
C8256 1 67 62 60 56 PP2V9_CAM
1.00 2
10UF 65 60 53 IN LED_IO_1_B 1 67 62 60 56 PP1V8_ALWAYS
20%
6.3V 1%
CERM-X5R 2 R8281 1/32W
0402 MF
1.00 2 01005
65 60 53 IN LED_IO_2_B 1
1%
67 62 60 PPLED_OUT_B 1/32W R8282
MF
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 01005 1.00 2 CRITICAL CRITICAL CRITICAL CRITICAL
1 1 1 1 1 1 65 60 53 IN LED_IO_3_B 1
1 1
C8260 C8261 C8262 C8263 C8264 C8269 1%
C8242 C8241 C8240 1 C8239 1 C8238 1
4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 56PF 1/32W 0.22UF 10UF 4.7UF 4.7UF 4.7UF
10% 10% 10% 10% 10% 2% MF 20% 20% 20% 20% 20%
2 35V
X5R-CERM 2 35V
X5R-CERM 2 35V
X5R-CERM 2 35V
X5R-CERM 2 35V
X5R-CERM 2 50V
NP0-C0G-CERM 01005 1 C8280 1 C8281 1 C8282 6.3V 2
X5R
6.3V 6.3V 2
CERM-X5R 2 X5R-CERM1 6.3V 6.3V
0603 0603 0603 0603 0603 0201 56PF 56PF 56PF 0201 0402 X5R-CERM1 2 X5R-CERM1 2
2% 2% 2% 402 402 402
2
50V 50V 50V
NP0-C0G-CERM 2 NP0-C0G-CERM 2 NP0-C0G-CERM
0201 0201 0201
R8283
LED_IO_4_B 1
1.00 2
A 65 60 53 IN
1%
1/32W
MF R8284
LED_IO_5_B
01005
1
1.00 2
65 60 53 IN
1%
R8285 1/32W
MF
LED_IO_6_B 1
1.00 2 01005
65 60 53 IN
1%
1/32W
MF
01005 1 C8283 1 C8284 1 C8285
56PF 56PF 56PF
2% 2% 2%
50V 50V 50V
2 NP0-C0G-CERM 2 NP0-C0G-CERM 2 NP0-C0G-CERM
0201 0201 0201
8 7 6 5 4 3
8 7 6 5 4 3 Copyright(C) 2006-2009 Foxit Corporation
1
R8303
1
R8398 I2C ADDRESS: 0111100X (0X78) 1 C8305 200K
0.1UF 1%
0.00 10% 1/20W
0% 6.3V MF
1/32W OMIT_TABLE 2 CERM-X5R 2 201
MF 0201
2 01005
U8100
D D2089A0
FCBGA
D
SYM 3 OF 4 PLACE_NEAR=U8100.T11:3MM
PLACE_NEAR=U8100.M17:4MM
1 C8300 1 C8301 1 C8302 GPIO_BTN_HOME_L D5 BUTTON1 IREF T12 PMU_IREF
1 C8306 1 C8307 1 C8308
0.01UF 0.01UF 0.01UF
60 50 5 IN NET_SPACING_TYPE=ANLG 0.1UF 1UF 1.0UF
ANALOG
1 D6 V13 10% 10% 20%
GPIO_BTN_ONOFF_L PMU_VREF
32K REFRENCES
BUTTON2 VREF
INPUT
10% 10% 10% 21 5 IN
CRITICAL
PLACE_NEAR=U8100.R9:10MM 6.3V
2 X5R 6.3V
2 X5R 2 6.3V D7 M17
2 6.3V
CERM-X5R 2 10V
X5R 2 10V
X5R-CERM
1 C8327 X5R 21 5 IN GPIO_BTN_SRL_L BUTTON3 VDD_REF PMU_VDD_REF 0201 402-1 0201-1
R8327 100PF
65
60 PA_NTC_P 01005 01005 01005
GPIO_BTN_BUTTON4 D8 BUTTON4 VDD_REF_A T11
10KOHM-1%-0.31MA 5% T7 U13
16V
2 NP0-C0G
65 PA_NTC_N 60 47 IN PMU_E75_ACC_DET_L ACC_DET VDD_RTC PMU_VDD_RTC
0201 T13
PLACE_NEAR=U4000.1:10MM 01005
R8399 R12 ADC_REF PMU_ADC_REF NET_SPACING_TYPE=ANLG
DIGITAL
PLACE_SIDE=TOP 2 PMU_ACC_ID ACC_ID MIN_LINE_WIDTH=0.1MM
0
CLK
INPUT
P16 MIN_NECK_WIDTH=0.1MM
(TEMP1 - NEAR BB) 47 IN PMU_USB_BRICKID 1 2 PMU_USB_BRICKID_R BRICK_ID OUT_32K T14 PMU_OUT_32K_CLK_GPS OUT 64 68 1 C8310
TRISTAR1 USE 6.34K 5% ADC_IN7 N16 ADC_IN7 1000PF
1/20W GPIO1 T6 PMU_GPIO_CLK_32K_OSCAR 19 60 64 10%
MF R11 ADC_IN31
OUT 6.3V
201 GPIO2 T5 PMU_GPIO_CLK_32K_WLAN 46 64
2 X5R-CERM
OUT
T8 T4 01005
WDOG
5 IN GPIO_SOC2PMU_KEEPACT KEEPACT GPIO3 PMU_GPIO_BT_REG_ON OUT 46 61
1
59 IN PMU_SHDWN (INTERNAL PULL-DOWN) T9 SHDN GPIO4 R3 PMU_GPIO_WLAN_REG_ON OUT 46 61
R8330
CRITICAL
P3 1.00K2
1 C8328 BOARD_TEMP2_P (INTERNAL PULL-DOWN) R5 GPIO5 67 PMU_GPIO_PMU2BBPMU_RST_R_L 1 PMU_GPIO_PMU2BBPMU_RST_L OUT 25 27 60 67
R8328 65 60
67 13 IN WDOG_SOC2PMU_RESET_IN RESET_IN1 N3 UART5_BATT_TRXD
100PF PLACE XW AND CAP TS2PMU_RESET_IN R6 GPIO6 IN 5 54 64 5%
1/32W
10KOHM-1%-0.31MA 5% 67 47 IN RESET_IN2 M3
RESET
2 16V
65 BOARD_TEMP2_N CLOSE TO PMU R7 GPIO7 PMU_GPIO_BT_HOST_WAKE IN 46 MF
0201 NP0-C0G 5 IN
SOCHOT1_L RESET_IN3 L3 01005
PLACE_NEAR=U5600.D2:10MM 01005 PLACE_NEAR=U8100.R9:10MM
R8 GPIO8 PMU_GPIO_WLAN_HOST_WAKE IN 46
PLACE_SIDE=TOP 2 XW8327 67 61 60 47 25 13 4 OUT RESET_SOC_L RESET* K3
GPIO
(PULLUP INSIDE SOC)T15 GPIO9 PMU_GPIO_BB2PMU_HOST_WAKE IN 25 29 60
(TEMP2 - NEAR PROX) 1 2 5 GPIO_PMU2SOC_IRQ_L
OUT IRQ* J3
SM GPIO10 PMU_GPIO_CODEC_HS_INT_L IN 15 60
64 60 5 I2C0_SCL_1V8 E12 SCL GPIO11 H3 PMU_GPIO_MB_HALL1_IRQ 20 60

PLACE_NEAR=U8100.R10:10MM IN IN
I2C & DWI

XW8328 64 60 5 I2C0_SDA_1V8 E13 SDA GPIO12 G3 GPIO_TS2SOC2PMU_INT 5 47
BI IN
1 2 F3 PMU_GPIO_MB_HALL2_IRQ
(INTERNAL PULL-DOWN) E11 GPIO13 IN 50 60
SM 64 5 IN DWI_AP_CLK DWI_CK E3
1 65 (INTERNAL PULL-DOWN) E10 GPIO14 PMU_GPIO_CODEC_RST_L OUT 15 67
60 BOARD_TEMP3_P 64 5 IN DWI_AP_DO DWI_DI D3
E9 GPIO15 NC_PMU_GPIO15 NO_TEST=TRUE
CRITICAL 64 NC_DWI_AP_DI NO_TEST=TRUE DWI_DO C3
R8321 1 C8321 65 BOARD_TEMP3_N GPIO16 PMU_GPIO_OSCAR2PMU_HOST_WAKE IN 5 19
C 10KOHM-1%-0.31MA 5%
2 16V
100PF NET_SPACING_TYPE=BOARD_TEMP
NET_SPACING_TYPE=BOARD_TEMP
R9
R10
TDEV1
TDEV2
GPIO17 C4 PMU_GPIO_BB_VBUS_DET OUT 25 28 61 67 C
0201 NP0-C0G AMUX_A0 E4 PPVDD_CPU_SOC_SENSE 11 61 67
PLACE_NEAR=U5800.30:10MM
01005 NET_SPACING_TYPE=BOARD_TEMP R13 TDEV3 IN
PLACE_SIDE=TOP 2 PLACE_NEAR=U8100.R13:10MM AMUX_A1 F4 PPVDD_GPU_SOC_SENSE 11 61 67
NET_SPACING_TYPE=BOARD_TEMP R14 IN
TDEV4
TEMPERATURE
(TEMP3 - TOP SIDE NEAR WIFI) XW8321 AMUX_A2 G6 PPVDD_SOC_SOC_SENSE
1 2 NET_SPACING_TYPE=BOARD_TEMP L4 TDEV5 IN 10 61 67
ANALOG MUX
AMUX_A3 J6 TP_AMUX_A3
SM NET_SPACING_TYPE=BOARD_TEMP M4 TDEV6
65 AMUX_AY G4 TP_AMUX_AY
1
60 BOARD_TEMP4_P NET_SPACING_TYPE=BOARD_TEMP N4 TDEV7
AMUX_B0 K4 PPVDD_CPU_RAIL_SENSE
CRITICAL XW8322 NET_SPACING_TYPE=BOARD_TEMP P4 TDEV8 IN 11 67
1 C8322 BOARD_TEMP4_N 1 2 R16 AMUX_B1 J4 PPVDD_GPU_RAIL_SENSE IN 11 67
R8322 100PF
65
SM
67 60 54 IN BATT_NTC NET_SPACING_TYPE=ANLG
TBAT
AMUX_B2 K6 PPVDD_SOC_RAIL_SENSE 10 67
5% PMU_TCALNET_SPACING_TYPE=ANLG R15 IN
10KOHM-1%-0.31MA 16V
60 TCAL L6
2 NP0-C0G AMUX_B3 TP_AMUX_B3
0201 01005 CRITICAL H4
PLACE_NEAR=U8100.L4:10MM
2 AMUX_BY TP_AMUX_BY
PLACE_NEAR=J1800.18:10MM
PLACE_SIDE=TOP 2 XW8323 C8340 1 R8340
1 2 100PF 3.92K
(TEMP4 - TOP SIDE NEAR AJ FLEX CONN) 5% 0.1%
SM 16V 0201
NP0-C0G 2 1/20W
MF
01005 1
65
60 BOARD_TEMP5_P PLACE_NEAR=U8100.M4:10MM
1 PLACE_NEAR=U8100.L4:10MM XW8324
CRITICAL 1 C8323 65 BOARD_TEMP5_N 1 2 RESISTOR FOR TEMP CALIBRATION
R8323 5%
100PF SM
10KOHM-1%-0.31MA 2 16V
NP0-C0G
01005 PLACE_NEAR=U8100.N4:10MM
0201
PLACE_NEAR=U1600.A1:10MM
XW8325
PLACE_SIDE=TOP 2 1 2
(TEMP5 - TOP SIDE NEAR NAND) SM
PLACE_NEAR=U8100.P4:10MM
65 XW8326
1 60 BOARD_TEMP6_P 1 2
PLACE_NEAR=U8100.M4:10MM
CRITICAL 65 BOARD_TEMP6_N SM SWITCH TO GATE POWER TO SOC AND NAND. NEEDED FOR J72 ROUTING.
B R8324
10KOHM-1%-0.31MA
1
5%
C8324
100PF CRITICAL
B
0201 2 16V
NP0-C0G U8360
01005
PLACE_SIDE=TOP 2 TPS22924X
CSP
(TEMP6 TOP SIDE NEAR REAR CAM) 62 =PP1V8_S2R_EXT_SWITCH A2 A1 PP1V8_EXT_SW 60 62 67
B2 VIN VOUT B1
1 C8360
1
65 60 BOARD_TEMP7_P 10UF PP1V8_SW1 C2 ON
20% 67 62 60 59 55
10V
2 X5R-CERM GND
CRITICAL PLACE_NEAR=U8100.N4:10MM 65 BOARD_TEMP7_N
R8325 0402-2
C1
1 C8325
10KOHM-1%-0.31MA 100PF 1 C8365
5% 0.01UF
0201
PLACE_NEAR=U0600.W19:10MM
2 16V
NP0-C0G 10%
PLACE_SIDE=BOTTOM 2 01005 6.3V
2 X5R
(TEMP7 - BOTTOM SIDE NEAR SOC) 01005
1 65 60 BOARD_TEMP8_P
PLACE_NEAR=U8100.P4:10MM BUCK6 POWER IS ON IN HIBERNATE DUE TO WIFI PAS
CRITICAL BOARD_TEMP8_N SWITCH NEEDED TO GATE POWER TO NAND AND SOC
R8326
1 C8326 65
100PF
10KOHM-1%-0.31MA 5%
16V
0201 2 NP0-C0G
PLACE_NEAR=U8100.K9:10MM 01005
PLACE_SIDE=BOTTOM 2
62 =PP3V3_S2R_SWITCH
(TEMP8 - BOTTOM SIDE NEAR PMU)
67 62 60 58 56 55 47
PPVCC_MAIN 1 C8355
1.0UF
20%
CRITICAL 6.3V
1
2 X5R
1 C8550
A 0.1UF
10%
VDD
0201-1
A
16V
2 X5R-CERM U8350
0201 SLG5AP1443V
VCC_MAIN_PP3V3SW_RAMP 7
TDFN 3
CAP D
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 62 61 14 =PP1V8_NAND 2 ON S 5 PP3V3_SW 60 62 67
PART NUMBER
TABLE_ALT_ITEM
1 CRITICAL GND CRITICAL

107S0150 107S0208 ? RDAR://PROBLEM/8380367 R8352 1 C8552 1 C8356
8
R8321,R8322,R8323,R8324,R8325,R8326 100K 10UF

5% 4700PF 20%
1/32W 10% 10V
MF 10V
2 X7R 2 X5R-CERM
2 01005 201 0402-2
8 7 6 5 4 3 2 1
1
OMIT_TABLE
U8100
D2089A0
FCBGA
SYM 4 OF 4
D M1 H10 D
M2 VSS_BUCK01 H11
H12
T1
H13
T2 VSS_BUCK1_12
J7
H1 J8
H2 VSS_BUCK0_12 J9
J10
U6
J11
V6 VSS_BUCK25
J12
A6 J13
B6 VSS_BUCK34 K7
K8
THROTTLER D1
D2 VSS_BUCK06
K9
K10
D18 VSS_WLED K11
D19 K12
K13
B18 VSS_LCM
L7
62 13 7 5 4 =PP1V8_SOC A19 L8
ADDITIONAL PARALLEL RESISTORS D15 L9
XW8410 TO INCREASE RESISTANCE OPTIONS STUFF EITHER R8440 OR R8445 BUT NOT BOTH V19 L10
SHORT-10L-0.1MM-SM
67 62 60 57 56 55 47 PPVCC_MAIN 1 2 61 VCC_MAIN_UVLO_SENSE =PP3V0_SPARE1 NOSTUFF D4 L11
62 1
R8440 C5 L12
100K C6 L13
1 C8400 5%
0.1UF 1/32W C7 M7
R84101 R84121 20% MF
C 100K
1%
392K
1%
6.3V
2 X5R-CERM
01005
2 01005
R8445
0.00 2
C8
D9 VSS
M8
M9
C
1/32W 1/32W 61 SOCHOT0_R_L 1 SOCHOT0_L 5
MF MF OUT D10 M10
01005 2 01005 2 0%
3 1/32W D11 M11
NOSTUFF
A3
U8400 MF
01005 D12 M12
R8420 MAX9039BEBT+ D D13 M13
150K 2 UCSP
VCC
=PP3V0_UVLO 1 61 UVLO_COMP_NEG B2 APN 353S4103
62
Q8440 D14 N6
1% A2 61 THROTTLER_OUT 2 G DMN2990UFA E17 N7
REF
1/32W
MF NOSTUFF B1 S DFN0806-VML0806-COMBO-N78
F7 N8
01005 R84131
VEE
R84111 51.1K
B3 1
R8435 F8 N9
51.1K 1% A1 100K
1% 1/32W 5% 1 F9 N10
1/32W MF 1/32W
MF 01005 2 UVLO_COMP_REF 58 61 MF
F10 N11
01005 2
2 01005 F11 N12
VSS
F12 N13
F13 P8
G7 P9
R8425 R8430 G8 P10
UVLO_COMP_REF 1
1.00K2 61 UVLO_COMP_POS 1
187K 2 G9 P11
61 58
1% 1% G10 P12
1/32W 1/32W
MF MF G11 P13
01005 01005
G12 R4
G13 T3
H7 U3
H8
H9
B B
ADD A VIA PER PIN FOR ALL VSS_* AND VSSA_* PINS
A A
8 7 6 5 4 3
1
D D
DEBUG RESET ACCESS

62 5 =PP1V8_S2R_MISC
NOSTUFF
1
R9000 PP1V8_SW1
1K 67 62 60 57 55
5%
1/16W NOSTUFF
MF-LF
2 402 1
R9001
1K
TP9000 5%
GPIO_FORCE_DFU 1 1/16W
60 5 OUT A MF-LF
TP-P55 2 402
PLACE_SIDE=TOP
PMU_SHDWN TP9001
1
57 OUT A
TP-P55
C C
B B
8 7 6 5 4 3
1
POWER PLATED THROUGH HOLES
SMT TEST FIXTURE TP DRILL SIZE: 1.1MM X 0.4MM
PLATING SIZE: 1.4MM X 0.7MM
I211
PPVDD_CPU FUNC_TEST=TRUE
55 62 67 BACKLIGHT
I212
PPVDD_GPU FUNC_TEST=TRUE 55 62 67
I215
PPVDD_SOC FUNC_TEST=TRUE 55 62 67 GPIO PPLED_BACK_REG_A FUNC_TEST=TRUE
I216
PP1V8_S2R FUNC_TEST=TRUE 55 56 62 67 I273
GPIO_CAM_ALS2SOC_IRQ_L_F FUNC_TEST=TRUE 22 I79
LED_IO_1_A FUNC_TEST=TRUE
53 67
SL9300
TH-NSP
PP1V8_SW1 FUNC_TEST=TRUE 55 57 59 62 67 GPIO_FORCE_DFU FUNC_TEST=TRUE 5 59 I50
FUNC_TEST=TRUE
53 56 65
I219
PP1V8_SW1_FOREHEAD FUNC_TEST=TRUE
I274
GPIO_GRAPE2SOC_IRQ_FILT_L FUNC_TEST=TRUE LED_IO_2_A 53 56 65 1
I218
PP1V8_EXT_SW FUNC_TEST=TRUE
62 67 I275
I51
LED_IO_3_A FUNC_TEST=TRUE 53 56 65
SL9301
TH-NSP
57 62 67 I52
FUNC_TEST=TRUE SL-1.1X0.4-1.4X0.7
I217
PP1V8_SW2 FUNC_TEST=TRUE 55 62 67 GPIO_SOC2BB_RADIO_ON_L FUNC_TEST=TRUE 5 25 27 I53
LED_IO_4_A 53 56 65 1
I220 I277
LED_IO_5_A FUNC_TEST=TRUE
PP1V8_S2R_SW3 FUNC_TEST=TRUE 55 62 67 GPIO_SOC2BB_RST_L FUNC_TEST=TRUE 5 25 27 67 I54
53 56 65
I221
I222
PP1V8_S2R_SW3_COMP FUNC_TEST=TRUE 62 67
I278
I279
GPIO_SOC2GRAPE_RESET_FILT_L FUNC_TEST=TRUE I55
LED_IO_6_A FUNC_TEST=TRUE 53 56 65 SL9302
TH-NSP
SL-1.1X0.4-1.4X0.7
D I223
I225
PP1V2_S2R
PP1V2_SW1
FUNC_TEST=TRUE
FUNC_TEST=TRUE
55 56 62 67
55 62 67
I286
I292
GPIO_OSCAR_RESET_L
CLK_32K_SOC2CUMULUS_FILT
FUNC_TEST=TRUE
FUNC_TEST=TRUE
5 19 67
64
1
SL9310 D
I224
PP1V2_S2R_SW2 FUNC_TEST=TRUE 55 62 67 I293
HP_ALS_IRQ_L_CONN_FILT FUNC_TEST=TRUE
I80
PPLED_BACK_REG_B FUNC_TEST=TRUE 53 67 SL-1.1X0.4-1.4X0.7 TH-NSP
1
I227
PPVDD_SRAM FUNC_TEST=TRUE 55 62 67 I56
LED_IO_1_B FUNC_TEST=TRUE 53 56 65
I228
PP3V3_S2R FUNC_TEST=TRUE 55 62 67 I59
SL9311 SL-1.1X0.4-1.4X0.7
I229
PP3V3_SW FUNC_TEST=TRUE 57 62 67 PMU GPIO I58
LED_IO_3_B FUNC_TEST=TRUE 53 56 65 TH-NSP
I230
PP3V0_SPARE1 FUNC_TEST=TRUE 56 62 67 I280
PMU_GPIO_BB2PMU_HOST_WAKE FUNC_TEST=TRUE 25 29 57 I57
LED_IO_4_B FUNC_TEST=TRUE 53 56 65 1
I233
PP1V7_VA_VCP FUNC_TEST=TRUE 56 62 67 I281
PMU_GPIO_BT_REG_ON_R FUNC_TEST=TRUE 46 I60
SL-1.1X0.4-1.4X0.7
I232
PP3V0_S2R_SENSOR FUNC_TEST=TRUE 56 62 67 I283
PMU_GPIO_CLK_32K_OSCAR FUNC_TEST=TRUE 19 57 64 I61
I231
PP3V0_ALS FUNC_TEST=TRUE 56 62 67 I282
PMU_GPIO_CLK_32K_WLAN_R FUNC_TEST=TRUE
46
PP3V3_ACC FUNC_TEST=TRUE 56 62 67 PMU_GPIO_CODEC_HS_INT_L FUNC_TEST=TRUE 15 57
I234
I235
PP3V0_S2R_TRISTAR FUNC_TEST=TRUE 56 62 67
I284
BATTERY
I237
PP3V0_S2R_HALL FUNC_TEST=TRUE 56 62 67 I285
PMU_GPIO_PMU2BBPMU_RST_L FUNC_TEST=TRUE 25 27 57 67 I63
BATT_SWI_CONN FUNC_TEST=TRUE 54 64
I236
PP1V3_CAM FUNC_TEST=TRUE 56 62 67 I287
PMU_GPIO_WLAN_REG_ON_R FUNC_TEST=TRUE
46 I64
BATT_NTC FUNC_TEST=TRUE
54 57 60 67
I238
PP1V0_SOC FUNC_TEST=TRUE 56 62 67 I291
PMU_TCAL FUNC_TEST=TRUE 57
E75 FOREHEAD B2B STANDOFFS
PP2V6_CAM_AF FUNC_TEST=TRUE
56 62 67 PMU_E75_ACC_DET_L FUNC_TEST=TRUE
47 57
I239
I240
PP2V9_CAM FUNC_TEST=TRUE 56 62 67
I353
I408
TS_E75_ACC_DET_L FUNC_TEST=TRUE 47 I65
E75_ACC_DET_CONN_L FUNC_TEST=TRUE 47 49 60
STD9300
I241
PP5V25_GRAPE FUNC_TEST=TRUE 56 60 62 67 I66
PPOUT_E75_ACC_ID1_CONN FUNC_TEST=TRUE 48 49 60 67 STDOFF-3.3X1.8R1.17H-SM-1
I244
PPVCC_MAIN FUNC_TEST=TRUE 47 55 56 57 58 62 67 I354
PMU_GPIO_MB_HALL1_IRQ FUNC_TEST=TRUE 20 57 I67
PPOUT_E75_ACC_ID2_CONN FUNC_TEST=TRUE 48 49 60 67 1
I243
PPBATT_VCC FUNC_TEST=TRUE 55 60 62 67 I355
PMU_GPIO_MB_HALL2_IRQ FUNC_TEST=TRUE 50 57 I68
E75_DPAIR1_CONN_P FUNC_TEST=TRUE 47 49 60 64
I242
PPVBUS_USB_DCIN FUNC_TEST=TRUE 55 62 67 I69
E75_DPAIR1_CONN_N FUNC_TEST=TRUE 47 49 60 64
I245
PP1V8_ALWAYS FUNC_TEST=TRUE 56 62 67 I71
I246
PPLED_OUT_A FUNC_TEST=TRUE 56 62 67 I70
I247
PPLED_OUT_B FUNC_TEST=TRUE 56 62 67 I72
PPVBUS_E75_USB_CONN FUNC_TEST=TRUE 48 49 60 67
STD9301
PP6V0_LCM_VBOOST FUNC_TEST=TRUE 56 67
STDOFF-3.3X1.8R1.17H-SM-1
I145
REEST JTAG/CONFIG
FUNC_TEST=TRUE
PPBATT_POS_RC FUNC_TEST=TRUE 55 I73
JTAG_SOC_SEL 4 13 1
I402
FUNC_TEST=TRUE JTAG_SOC_TCK FUNC_TEST=TRUE
PMU_VCENTER 55 67 I74
FUNC_TEST=TRUE
4 47 64
I349
PPVBUS_PROT FUNC_TEST=TRUE 47 55 67 I76
JTAG_SOC_TDI 4 64
I352
FUNC_TEST=TRUE TP_JTAG_SOC_TDO FUNC_TEST=TRUE
VBUS_PROT_G 55 I75
FUNC_TEST=TRUE
4 64
I407
AUDIO I78
JTAG_SOC_TMS 4 47 64
JTAG_SOC_TRST_L FUNC_TEST=TRUE
I298
PP1V2_CAM_FRONT_FILT FUNC_TEST=TRUE 67
CONN_HP_HEADSET_DET_FILT FUNC_TEST=TRUE
I77 4 13 64
STD9302
PP1V3_CAM_REAR_FILT FUNC_TEST=TRUE
23 67 I267
FUNC_TEST=TRUE
15 16 SOC_TESTMODE FUNC_TEST=TRUE
4 13 STDOFF-3.3X1.8R1.02H-SM
I297
PP1V7_VCP FUNC_TEST=TRUE 15 67 I266
CONN_HP_HS3_FILT 15 16 60 65
I309
RESET_SOC_L FUNC_TEST=TRUE 4 13 25 47 57 61 67
I347
CONN_HP_HS3_REF_FILT FUNC_TEST=TRUE I290
1 NOTE: BOTTOM OF FOREHEAD
PP1V8_CAM_FRONT_FILT FUNC_TEST=TRUE
22 67 I265
FUNC_TEST=TRUE
15 16 60 65
PS_HOLD_PMIC FUNC_TEST=TRUE
I296
PP1V8_CAM_REAR_FILT FUNC_TEST=TRUE CONN_HP_HS3_FILT 15 16 60 65 I310 25 27
C
23 67 I268
C I299
I401
PP1V8_DMIC_FILT
PP1V8_GRAPE_SW
FUNC_TEST=TRUE
FUNC_TEST=TRUE
16 67
51 52 61 67
I269
I324
CONN_HP_HS3_REF_FILT
CONN_HP_HS4_FILT
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
15 16 60 65
15 16 65
I345
I323
CONN_HP_HS4_REF_FILT 15 16 65
CONN_HP_LEFT_FILT FUNC_TEST=TRUE
PP1V8_COMP FUNC_TEST=TRUE 24 67 I270
FUNC_TEST=TRUE
15 16 65
BUTTONS
I339
PP2V6_CAM_REAR_AF_FILT FUNC_TEST=TRUE CONN_HP_RIGHT_FILT 15 16 65
FUNC_TEST=TRUE
I295
23 67 I271
SPKRAMP_L1_OUT_N FUNC_TEST=TRUE GPIO_BTN_ONOFF_L_FILT 21
PP2V9_AVDD_CAM_FRONT_FILTFUNC_TEST=TRUE 22 67 I158
FUNC_TEST=TRUE
18 49 65 I124
GPIO_BTN_HOME_L FUNC_TEST=TRUE
I302
PP2V9_AVDD_CAM_REAR_FILT FUNC_TEST=TRUE SPKRAMP_L1_OUT_P 18 49 65 I125
FUNC_TEST=TRUE
5 50 57
I303
23 67 I159
SPKRAMP_R1_OUT_N FUNC_TEST=TRUE GPIO_BTN_VOL_UP_L_FILT 21
PP3V0_ALS_FILT FUNC_TEST=TRUE 22 67 I162
FUNC_TEST=TRUE
17 49 65 I126
GPIO_BTN_VOL_DOWN_L_FILT FUNC_TEST=TRUE
I304
PP3V0_HP_ALS_FILT FUNC_TEST=TRUE SPKRAMP_R1_OUT_P 17 49 65 I127 21
I305
PP3V0_IO_ALS_FILT FUNC_TEST=TRUE
67
67
I163
I358
SPKRAMP_L2_OUT_N FUNC_TEST=TRUE 18 49 65 I128
GPIO_BTN_SRL_L_FILT FUNC_TEST=TRUE 21 GRAPE AND DISPLAY B2B STANDOFFS
I306
SPKRAMP_L2_OUT_P FUNC_TEST=TRUE
I307
PP3V0_S2R_HALL_FILT FUNC_TEST=TRUE 20 50 67 I359
SPKRAMP_R2_OUT_N FUNC_TEST=TRUE
18 49 65
STD9305
I360
SPKRAMP_R2_OUT_P FUNC_TEST=TRUE
17 49 65
17 49 65
I361
PP3V0_GYRO FUNC_TEST=TRUE 1
I334 19 67
PP3V0_ACCEL FUNC_TEST=TRUE 19 67
FUNC_TEST=TRUE
I337
PP3V0_COMP FUNC_TEST=TRUE LEFT_CH_OUT_P 15 18 65
I336
PP3V0_SENSOR_PROX_FILT FUNC_TEST=TRUE
24 67 I387
I388
LEFT_CH_OUT_N FUNC_TEST=TRUE 15 18 65
STD9306
I338
PP3V0_SENSOR_PROX_ADUX1049_FILT
FUNC_TEST=TRUE
67
67 I389
RIGHT_CH_OUT_P FUNC_TEST=TRUE 15 17 65 STDOFF-3.3X1.8R1.17H-SM-1
I380
RIGHT_CH_OUT_N FUNC_TEST=TRUE
PP3V0_SENSOR_PROX_AD7149_FILT
FUNC_TEST=TRUE 45 67 I390
FUNC_TEST=TRUE
15 17 65 1
I381
PP5V25_GRAPE FUNC_TEST=TRUE
56 60 62 67 I391
AIN3P 15
I308
AIN3N FUNC_TEST=TRUE
PPVCC_MAIN_LCD_SW_CONN FUNC_TEST=TRUE 53 67 I392 15
I311
PPVCC_MAIN_LCD_SW FUNC_TEST=TRUE
53 67
STD9307
I346
I396
GND_AUDIO_CODEC FUNC_TEST=TRUE
FUNC_TEST=TRUE
15 67 BOARD TEMPFUNC_TEST=TRUE 1
I399
DMIC1_FF_SCLK_FILT 16 64 I395
PA_NTC_P 57 65
DMIC1_FF_SD_FILT FUNC_TEST=TRUE 16 64 BOARD_TEMP2_P FUNC_TEST=TRUE 57 65
I330
PP_SMPS1_MSMC_1V05 FUNC_TEST=TRUE
26 28 68
I400
L81_SPEAKER_VQ FUNC_TEST=TRUE 15
I166
BOARD_TEMP3_P FUNC_TEST=TRUE 57 65
I397
PP_SMPS2_RF1_1V3 FUNC_TEST=TRUE 26 28 31 68
I414 I167
I331
PP_SMPS3_MSME_1V8 FUNC_TEST=TRUE
25 26 28 29 31
I168
I398
PP_SMPS4_RF2_2V05 FUNC_TEST=TRUE 26 31 68
I169
I333
PP_SMPS5_DSP_1V05 FUNC_TEST=TRUE
26 68
I170
I171
I172
I384
PP_LDO1 FUNC_TEST=TRUE 26 68
PP3V0_UVLO FUNC_TEST=TRUE USB

B I419 56 62 67
GRAPE
FUNC_TEST=TRUE USB_SOC_N FUNC_TEST=TRUE
B
GPIO_GRAPE2SOC_IRQ_L 5 52 61 I288
FUNC_TEST=TRUE
4 47 64
I364
GPIO_SOC2GRAPE_RESET_L FUNC_TEST=TRUE USB_SOC_P 4 47 64
I363
CLK_32K_SOC2CUMULUS FUNC_TEST=TRUE
5 52 61 67 I289
FID9300
TP_BB_TEST_MODE_0 FUNC_TEST=TRUE I368
FUNC_TEST=TRUE
5 52 61 64
FID
I340
TP_BB_TEST_MODE_1 FUNC_TEST=TRUE
28
I375
DISPLAY_SYNC
FUNC_TEST=TRUE
4 52 61
CAMERA 0P5SM1P0SQ-NSP FID9301
I341 28
I154
SPI2_GRAPE_SCLK 5 52 61 64 1 FID
SPI2_GRAPE_MISO FUNC_TEST=TRUE 5 52 61 64 0P5SM1P0SQ-NSP
I155
ISP0_CAM_REAR_CLK_F FUNC_TEST=TRUE
SPI2_GRAPE_MOSI FUNC_TEST=TRUE 5 52 61 64 I259 23 64 1
I369
GPIO_SOC2OSCAR_DBGEN_RFUNC_TEST=TRUE 19
I156
SPI2_GRAPE_CS_L FUNC_TEST=TRUE 5 52 61 64 I260
ISP0_CAM_REAR_SCL_F FUNC_TEST=TRUE 23 64
I157
ISP0_CAM_REAR_SDA_F FUNC_TEST=TRUE
I404
VCC_MAIN_GRAPE_RAMP FUNC_TEST=TRUE 51 I258
ISP0_CAM_REAR_SHUTDOWN_L_F FUNC_TEST=TRUE
23 64
FID9302
I262
FUNC_TEST=TRUE
23 67
FID
TP9300 UART I263
ISP1_CAM_FRONT_CLK_F
FUNC_TEST=TRUE
22 64 0P5SM1P0SQ-NSP FID9303
1 PPBATT_VCC PLACE_NEAR=J7500.4:10MM ISP1_CAM_FRONT_SCL_F 22 64 1 FID
A 55 60 62 67 I261
ISP1_CAM_FRONT_SDA_F FUNC_TEST=TRUE 22 64 0P5SM1P0SQ-NSP
TP-1P0-TOP UART0_SOC_RXD FUNC_TEST=TRUE
I409
ISP1_CAM_FRONT_SHUTDOWN_L_F FUNC_TEST=TRUE 1
5 47 64 22 67
TP9301
1 PPBATT_VCC PLACE_NEAR=J7500.4:10MM
I405
UART0_SOC_TXD FUNC_TEST=TRUE 5 47 64
I410
A 55 60 62 67 I406
FID9304
TP-1P0-TOP
NAND FID
TP9302
1 PPBATT_VCC PLACE_NEAR=J7500.4:10MM 0P5SM1P0SQ-NSP FID9305
A 55 60 62 67
FMI0_CE0_L FUNC_TEST=TRUE 6 14 61 66 1 FID
TP-1P0-TOP I272
0P5SM1P0SQ-NSP
TP9305
1 PLACE_NEAR=J7500.3:10MM DISPLAY RF FIXTURE 1
A
TP-1P0-TOP DISPLAY_SYNC_FILT FUNC_TEST=TRUE
I313
TP9306
1 PLACE_NEAR=J7500.3:10MM I2C I314
A I315
TP-1P0-TOP E75_DPAIR2_CONN_N FUNC_TEST=TRUE
I194 47 49 60 64
I2C3_CAM_ALS_SCL_1V8_F FUNC_TEST=TRUE E75_DPAIR2_CONN_P FUNC_TEST=TRUE
TP9307
1 PLACE_NEAR=J7500.3:10MM I253 22 64 I195 47 49 60 64
A I252
I2C3_CAM_ALS_SDA_1V8_F FUNC_TEST=TRUE 22 64 I196
PPVBUS_E75_USB_CONN FUNC_TEST=TRUE 48 49 60 67
TP-1P0-TOP I254
I2C0_HP_ALS_SCL_1V8_FILT FUNC_TEST=TRUE 64 I197
PPOUT_E75_ACC_ID1_CONN FUNC_TEST=TRUE 48 49 60 67
I2C0_HP_ALS_SDA_1V8_FILT FUNC_TEST=TRUE 64 PPOUT_E75_ACC_ID2_CONN FUNC_TEST=TRUE 48 49 60 67
I255 I198
I2C0_SCL_1V8 FUNC_TEST=TRUE 5 57 64 E75_ACC_DET_CONN_L FUNC_TEST=TRUE 47 49 60
I420 I199
I2C0_SDA_1V8 FUNC_TEST=TRUE BATT_NTC FUNC_TEST=TRUE
TP9310
1 PPVBUS_E75_USB_CONN
I421 5 57 64 I316 54 57 60 67
A 48 49 60 67
A TP-1P0-TOP
TP9311
A
A 1 PPVBUS_E75_USB_CONN 48 49 60 67
TP-1P0-TOP
TP9312
1 PPVBUS_E75_USB_CONN
A PLACE_NEAR=J6200.9:20MM
48 49 60 67
SIM
TP-1P0-TOP
TP9315
1 SIMCRD_RST_CONN FUNC_TEST=TRUE 29 44
A PLACE_NEAR=TP9310.1:30MM
I370
SIMCRD_CLK_CONN FUNC_TEST=TRUE 29 44
TP-1P0-TOP I371
SIMCRD_IO_CONN FUNC_TEST=TRUE 29 44
TP9316
1 TEST POINT RULES:
I372
SIM_TRAY_DETECT FUNC_TEST=TRUE 29 44
I373
PP_LDO6_RUIM_1V8 FUNC_TEST=TRUE 26 28 44 68
TP-1P0-TOP CENTER TO CENTER SPACING >= 1MM
I374
TP9317
1 DIAMETER >= 0.5MM
TP-1P0-TOP EDGE TO SHIELD >=0.55MM
8 7 6 5 4 3 2 1
1
FOR FRANK (SEG)
EE CHARACTERIZATION TP
PP9400 PP
1 PPVDD_SOC_SOC_SENSE PLACE_NEAR=U0600.V31:1MM 10 57 67
NAND P4MM SM
PLACE_SIDE=BOTTOM
PP9401 PP
1 PPVDD_CPU_SOC_SENSE PLACE_NEAR=U0600.AL31:1MM 11 57 67
P4MM SM
BOTTOM SIDE PP9460
P4MM SM PP
1 FMI0_AD<0> PLACE_NEAR=U0600.A32:2MM 6 14 61 66
PP9402 1 PPVDD_GPU_SOC_SENSE PLACE_NEAR=U0600.AA7:1MM
NO_XNET_CONNECTION=TRUE PLACE_SIDE=BOTTOM PP 11 57 67
P4MM SM
BOTTOM SIDE PP9461
P4MM SM PP
1 FMI0_DQS PLACE_NEAR=U0600.B34:2MM 6 14 61 66
FMI0_AD<0..7> EE_TEST=TRUE FUNC_TEST=TRUE 6 14 61 66
I37
FMI0_CE0_L FUNC_TEST=TRUE 6 14 60 66
I39
D I38
I40
FMI0_ALE
FMI0_CLE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
6 14 66
6 14 66
D
I41
FMI0_WE_L 6 14 66
FMI0_RE_L FUNC_TEST=TRUE 6 14 66
I42
I43
FMI0_DQS FUNC_TEST=TRUE 6 14 61 66
DRAM GRAPE
FMI1_AD<0> FUNC_TEST=TRUE 6 14 66
I44
FMI1_CE0_L NEAR DRAM
I45
I46
FMI1_ALE
FMI1_CLE
6 14 66
6 14 66
PP9410 1 DDR0_CK_N PLACE_NEAR=U1400.AF14:1MM
CONVERT TO PROBE POINTS IF NOT ABLE TO PLACE TESTPOINT
WIFI
I47 6 14 66
P4MM SM PP
8 12 61 66 TP_JTAG_CUMULUS_M_TCK 52 64
I48
FMI1_WE_L 6 14 66
I237
TP_JTAG_CUMULUS_M_TDI 52 64 JTAG_WLAN_TMS_TX_BLANK FUNC_TEST=TRUE 46 64
I49
FMI1_RE_L 6 14 66 PP9411
P4MM SM PP
1 DDR0_CK_P PLACE_NEAR=U1400.AF15:1MM 8 12 61 66
I238
JTAG_CUMULUS_M_TMS 52 64
I58
TP_JTAG_WLAN_TCK FUNC_TEST=TRUE 46 64
FMI1_DQS NO_XNET_CONNECTION=TRUE I239 I59
FUNC_TEST=TRUE
I50 6 14 66 TP_JTAG_CUMULUS_M_TDO 52 64 JTAG_WLAN_TDI_OSCAR_A 46 64
PP9412
P4MM SM PP
1 DDR0_CKE<0> PLACE_NEAR=U1400.AF16:1MM
8 12 61 66
I240
DISPLAY_SYNC 4 52 60
I60
JTAG_WLAN_TDO_OSCAR_B FUNC_TEST=TRUE 46 64
I51
PPVREF_FMI_SOC FUNC_TEST=TRUE 6 66
NO_XNET_CONNECTION=TRUE I243
CUMULUS_MS_CK 52 64
I61
TP_JTAG_WLAN_TRST_L FUNC_TEST=TRUE 46 64
I53
PPVREF_FMI_NAND FUNC_TEST=TRUE 14 66 PP9413
P4MM SM PP
1 DDR0_CKE<1> PLACE_NEAR=U1400.AE17:1MM 8 12 61 66
I242
CUMULUS_MS_SD 52 64
I62
JTAG_WLAN_SEL FUNC_TEST=TRUE 46
NO_XNET_CONNECTION=TRUE I241 I63
FUNC_TEST=TRUE
TOP SIDE
UART2_SOC2WLAN_TX_R 46 64
PP9440
P4MM SM PP
1 TP_FMI_TCKC_NAND PLACE_SIDE=TOP 14 PP9414
P4MM SM PP
1 DDR0_CA<0> PLACE_NEAR=U1400.AE21:1MM 8 12 61 66
I64
UART2_WLAN2SOC_TX_R FUNC_TEST=TRUE 46 64
FUNC_TEST=TRUE
TOP SIDE
GPIO_GRAPE2SOC_IRQ_L 5 52 60 UART_BB2WLAN_LTE_COEX_R 46
PP9441
P4MM SM PP
1 TP_FMI_TMSC_NAND PLACE_SIDE=TOP 14 PP9415
P4MM SM PP
1 DDR0_DQ<2> PLACE_NEAR=U1400.B18:1MM 8 12 61 66
I246
GPIO_SOC2GRAPE_RESET_L 5 52 60 67
I66
UART_WLAN2BB_LTE_COEX_R FUNC_TEST=TRUE 46
NO_XNET_CONNECTION=TRUE I247 I67
TOP SIDE
CLK_32K_SOC2CUMULUS 5 52 60 64 =PP3V3_S2R_WIFI_PA FUNC_TEST=TRUE 46 62
PP9442
P4MM SM PP
1 =PP1V8_NAND PLACE_SIDE=TOP 14 57 62 PP9416
P4MM SM PP
1 DDR0_DQS_N<3> PLACE_NEAR=U1400.C8:1MM 8 12 61 66
I248
SPI2_GRAPE_MOSI 5 52 60 64
I68
SPI2_GRAPE_MISO 5 52 60 64
TOP SIDE PP9443
P4MM SM PP
1 GND PLACE_SIDE=TOP PP9417
P4MM SM PP
1 DDR0_DQS_P<3> PLACE_NEAR=U1400.B8:1MM 8 12 61 66
I258
SPI2_GRAPE_SCLK 5 52 60 64 HSIC1_SOC2WLAN_HOST_RDY_R FUNC_TEST=TRUE
NO_XNET_CONNECTION=TRUE I250 46 64
SPI2_GRAPE_CS_L 5 52 60 64
I69
HSIC1_WLAN2SOC_DEVICE_RDY FUNC_TEST=TRUE
PP9418
P4MM SM PP
1 DDR0_DQS_N<0> PLACE_NEAR=U1400.C15:1MM 8 12 61 66
I251
TP_CUMULUS_S_H_CS_L 52
I70
HSIC1_WLAN2SOC_REMOTE_WAKE FUNC_TEST=TRUE
5 46 64
NO_XNET_CONNECTION=TRUE I254 5 46 64
TP_CUMULUS_S_H_SCLK 52
I71
EE PP9419
P4MM SM PP
1 DDR0_DQS_P<0> PLACE_NEAR=U1400.B15:1MM 8 12 61 66
I253
TP_CUMULUS_S_H_SDI 52
TOP SIDE PP9450 1 RESET_SOC_L 4 13 25 47 57 60 67 TP_CUMULUS_S_H_SDO 52
P4MM SM PP I245
PP9451SM PP
1 TP_ANALOGMUXOUT 4 =PP5V25_GRAPE 52 62 FOR HSIC CHARACTERIZATION
P4MM I252
PP9420
P4MM SM PP
1 DDR1_CK_N PLACE_NEAR=U1400.T26:1MM 8 12 61 66 I255
PP1V8_GRAPE_SW 51 52 60 67 PP9480
P4MM SM PP
1 HSIC1_WLAN_DATA PLACE_NEAR=U0600.A27:3MM 4 46 61 64
TOP SIDE PP9452 1 SOCHOT0_R_L 58
P4MM SM PP PP9421 1 DDR1_CK_P PLACE_NEAR=U1400.R26:1MM 8 12 61 66 PP9481 1 HSIC1_WLAN_STB PLACE_NEAR=U0600.B27:3MM 4 46 61 64
PP
P4MM SM NO_XNET_CONNECTION=TRUE P4MM SM PP
TP_GPIO_DFU_STATUS FUNC_TEST=TRUE
C I266
5
PP9422
P4MM SM PP
1 DDR1_CKE<0>
PLACE_NEAR=U1400.P26:1MM 8 12 61 66 GRAPE NO_TEST
MT_PANEL_IN<0..29> NO_TEST=TRUE
52 65
PP9482
P4MM SM PP
1 HSIC1_WLAN_DATA PLACE_NEAR=U5800.13:3MM 4 46 61 64
C
PP9423
P4MM SM PP
1 DDR1_CKE<1> PLACE_NEAR=U1400.N25:1MM 8 12 61 66
I259
MT_PANEL_OUT<0..39> NO_TEST=TRUE
52 65
PP9483
P4MM SM PP
1 HSIC1_WLAN_STB PLACE_NEAR=U5800.14:3MM 4 46 61 64
PP9424 1 DDR1_CA<0> PLACE_NEAR=U1400.J25:1MM 8 12 61 66

CAMERA P4MM SM PP
PMU_GPIO_WLAN_REG_ON FUNC_TEST=TRUE
FUNC_TEST=TRUE
46 57
PP9425 1 DDR1_CA<1> PLACE_NEAR=U1400.K26:1MM 8 12 61 66 I75

PMU_GPIO_BT_REG_ON 46 57
PP9470
P4MM SM PP
1 MIPI1C_CAM_FRONT_CLK_P PLACE_NEAR=U0600.AM35:3MM
7 22 61 65 P4MM SM PP
GPIO_BT_WAKE FUNC_TEST=TRUE
5 46
PP9471 1 MIPI1C_CAM_FRONT_CLK_N PLACE_NEAR=U0600.AM36:3MM
PP9426
P4MM SM PP
1 DDR1_CA<2> PLACE_NEAR=U1400.K25:1MM 8 12 61 66
P4MM SM PP
PP9472 1
MIPI1C_CAM_FRONT_DATA_P<0> PLACE_NEAR=U0600.AN35:3MM
7 22 61 65
7 22 61 65
PP9427
P4MM SM PP
1 DDR1_CA<3>
PLACE_NEAR=U1400.L25:1MM 8 12 61 66
AUDIO
P4MM SM PP NO_XNET_CONNECTION=TRUE L81_DMIC1_FF_SD FUNC_TEST=TRUE 15
PP9473 1 MIPI1C_CAM_FRONT_DATA_N<0> PLACE_NEAR=U0600.AN36:3MM

PP9428
P4MM SM PP
1 DDR1_CSN<0> PLACE_NEAR=U1400.N35:1MM 8 12 61 66
I282
7 22 61 65 NO_XNET_CONNECTION=TRUE
P4MM SM PP NO_XNET_CONNECTION=TRUE
PP9474
P4MM SM PP
1 MIPI0C_CAM_REAR_CLK_P PLACE_NEAR=U0600.AR31:3MM 7 23 61 65
PP9475
P4MM SM PP
1 MIPI0C_CAM_REAR_CLK_N
PLACE_NEAR=U0600.AT31:3MM 7 23 61 65 BASEBAND
NEAR SOC
PP9476
P4MM SM PP
1 MIPI0C_CAM_REAR_DATA_P<0> PLACE_NEAR=U0600.AR33:3MM 7 23 61 65 I27
BB_JTAG_TMS FUNC_TEST=TRUE 5 25 28 64
NO_XNET_CONNECTION=TRUE BB_JTAG_TCK FUNC_TEST=TRUE
PP9435 PP
1 DDR0_DQ<28> PLACE_NEAR=U0600.D5:1MM 8 12 61 66 I28 5 25 28 64
PP9477
P4MM SM PP
1 MIPI0C_CAM_REAR_DATA_N<0> PLACE_NEAR=U0600.AT33:3MM 7 23 61 65 P4MM SM NO_XNET_CONNECTION=TRUE I29
BB_JTAG_TDI FUNC_TEST=TRUE 5 25 28 64
NO_XNET_CONNECTION=TRUE BB_JTAG_TDO FUNC_TEST=TRUE
PP9436 PP
1 DDR0_DQS_N<3> PLACE_NEAR=U0600.A6:1MM 8 12 61 66 I30
BB_JTAG_TRST_L FUNC_TEST=TRUE
5 25 28 64
P4MM SM NO_XNET_CONNECTION=TRUE I31 5 25 28 64
USB_BB_DEBUG_P FUNC_TEST=TRUE
PP9437 PP
1 DDR0_DQS_P<3> PLACE_NEAR=U0600.A5:1MM 8 12 61 66 I192
USB_BB_DEBUG_N FUNC_TEST=TRUE
25 28 64
P4MM
SM NO_XNET_CONNECTION=TRUE I193 25 28 64
DEBUG_RST_L FUNC_TEST=TRUE 25 28 67
I296
PMU_GPIO_BB_VBUS_DET FUNC_TEST=TRUE 25 28 57 67
I297
FOR HSIC CHARACTERIZATION
HIGH SPEED, NO TEST NO TEST DUE TO LAYOUT PP9485

P4MM SM PP
1 HSIC2_BB_DATA PLACE_NEAR=U0600.AJ35:3MM 4 25 28 61 64
I1
DDR0_CA<0..9>
DDR0_CK_P
NO_TEST=TRUE
NO_TEST=TRUE
8 12 61 66
POWER, NO TEST I2C3 TP AT ALS FILTER SIDE
PP9486
P4MM SM PP
1 HSIC2_BB_STB PLACE_NEAR=U0600.AJ36:3MM 4 25 28 61 64
8 12 61 66 I2C3_SCL_1V8 NO_TEST=TRUE PP9487 1 HSIC2_BB_DATA PLACE_NEAR=U3400.C7:3MM

B I2
I3
I4
DDR0_CK_N
DDR0_CA<0..9>
NO_TEST=TRUE
NO_TEST=TRUE
8 12 61 66
8 12 61 66
I194
I199
PP6V0_LCM_HI
SW_CHGA
NO_TEST=TRUE
NO_TEST=TRUE
56 67
55 67
I307
I308 I2C3_SDA_1V8 NO_TEST=TRUE

5 13 22 64
5 13 22 64
P4MM SM PP
PP9488 1 HSIC2_BB_STB PLACE_NEAR=U3400.B8:3MM
4 25 28 61 64
4 25 28 61 64
B
I5
DDR0_CKE<0..1> NO_TEST=TRUE 8 12 61 66 I201
WLED_LX_A NO_TEST=TRUE 56 67 MAX98304_L1_IN_N NO_TEST=TRUE P4MM SM PP
18 65
DDR0_CSN<0..1> NO_TEST=TRUE WLED_LX_B NO_TEST=TRUE I274
NO_TEST=TRUE
I267
NO_TEST=TRUE
8 12 66 I200 56 67 MAX98304_L1_IN_P 18 65
I6
DDR0_DM<0..3> 8 12 66
I275
MAX98304_R1_IN_N NO_TEST=TRUE 17 65
DDR0_DQ<0..31> NO_TEST=TRUE I276
I8 8 12 61 66 MAX98304_R1_IN_P NO_TEST=TRUE 17 65
DDR0_DQS_P<0..3> NO_TEST=TRUE I277
NO_TEST=TRUE
I7
NO_TEST=TRUE
8 12 61 66 MAX98304_L2_IN_N 18 65
I9
DDR0_DQS_N<0..3> 8 12 61 66 L81_PVCP NO_TEST=TRUE 15 65
I278
MAX98304_L2_IN_P NO_TEST=TRUE 18 65
I272 I279
DDR1_CA<0..9> NO_TEST=TRUE 8 12 61 66 L81_NVCP NO_TEST=TRUE 15 65 MAX98304_R2_IN_N NO_TEST=TRUE 17 65
I10 I273 I280
DDR1_CK_P NO_TEST=TRUE 8 12 61 66 MAX98304_R2_IN_P NO_TEST=TRUE 17 65
I11 I281
DDR1_CK_N NO_TEST=TRUE 8 12 61 66
I12
NO_TEST=TRUE CHARGE PUMP OUTPUTS
I13
DDR1_CA<0..9> 8 12 61 66 L81_FLYC NO_TEST=TRUE 15 65
DDR1_CKE<0..1> NO_TEST=TRUE I269
NO_TEST=TRUE
I14
NO_TEST=TRUE
8 12 61 66 L81_FLYN 15 65 GPIO_BTN_HOME_CONN_R_L NO_TEST=TRUE
I268
DDR1_CSN<0..1> 8 12 61 66
I270
L81_FLYP NO_TEST=TRUE 15 65
I306 50
DDR1_DM<0..3> NO_TEST=TRUE 8 12 66
I271
I15
DDR1_DQ<0..31> NO_TEST=TRUE 8 12 66
I16
DDR1_DQS_P<0..3> NO_TEST=TRUE 8 12 66
I17
DDR1_DQS_N<0..3> NO_TEST=TRUE NO_TEST=TRUE
I18 8 12 66
I300
THROTTLER_OUT 58
NO_TEST=TRUE
I141
I140
MIPI0C_CAM_REAR_CLK_P
MIPI0C_CAM_REAR_CLK_N
NO_TEST=TRUE
NO_TEST=TRUE
7 23 61 65
7 23 61 65
I301
I302
I303
UVLO_COMP_NEG
UVLO_COMP_POS
UVLO_COMP_REF
NO_TEST=TRUE
NO_TEST=TRUE
58
58
58
NO TEST ON PROX
MIPI0C_CAM_REAR_DATA_P<0..1> NO_TEST=TRUE 7 23 61 65 VCC_MAIN_UVLO_SENSE NO_TEST=TRUE 58
I139 I304
MIPI0C_CAM_REAR_DATA_N<0..1> NO_TEST=TRUE 7 23 61 65
I138
MIPI0C_CAM_REAR_CLK_FILT_P NO_TEST=TRUE 23 65 PROX_AD7149_CIN5 NO_TEST=TRUE 45
I142 I285
MIPI0C_CAM_REAR_CLK_FILT_N NO_TEST=TRUE 23 65 PROX_AD7149_CIN7 NO_TEST=TRUE 45
I144 I286
MIPI0C_CAM_REAR_DATA_FILT_P<0..3> NO_TEST=TRUE 23 65 PROX_AD7149_CIN9 NO_TEST=TRUE 45
I145 I288
MIPI0C_CAM_REAR_DATA_FILT_N<0..3> NO_TEST=TRUE 23 65 PROX_AD7149_CIN7_FILT NO_TEST=TRUE 45
I143 I287
MIPI1C_CAM_FRONT_CLK_P NO_TEST=TRUE 7 22 61 65 PROX_AD7149_CIN9_FILT NO_TEST=TRUE 45
I146 I289
MIPI1C_CAM_FRONT_CLK_N NO_TEST=TRUE 7 22 61 65 PROX_AD7149_CIN7_CONN NO_TEST=TRUE 45
I149 I290
MIPI1C_CAM_FRONT_DATA_P<0> NO_TEST=TRUE 7 22 61 65 PROX_AD7149_CIN9_CONN NO_TEST=TRUE 45
I150 I291
MIPI1C_CAM_FRONT_DATA_N<0> NO_TEST=TRUE 7 22 61 65 PROX_AD7149_ACSHIELD_CONN NO_TEST=TRUE 45
I148 I292
MIPI1C_CAM_FRONT_CLK_FILT_P NO_TEST=TRUE 22 65 PROX_AD7149_BIAS NO_TEST=TRUE 45
I147 I293
MIPI1C_CAM_FRONT_CLK_FILT_N NO_TEST=TRUE 22 65 ACSHIELD_SB NO_TEST=TRUE 45
I152 I294
MIPI1C_CAM_FRONT_DATA_FILT_P<0> NO_TEST=TRUE ACSH_SB NO_TEST=TRUE
A I151
I153
MIPI1C_CAM_FRONT_DATA_FILT_N<0> NO_TEST=TRUE
22 65
22 65
I295
I298
PROX_AD7149_GPIO NO_TEST=TRUE
45
45
EDP_DATA_P<0..3> NO_TEST=TRUE 7 53 65
I187
EDP_DATA_N<0..3> NO_TEST=TRUE
I185 7 53 65
EDP_DATA_EMI_P<0..3> NO_TEST=TRUE 53 65
I186
EDP_DATA_EMI_N<0..3> NO_TEST=TRUE 53 65
I188
EDP_DATA_EMI_CONN_P<0..3> NO_TEST=TRUE 53 65
I190
EDP_DATA_EMI_CONN_N<0..3> NO_TEST=TRUE 53 65
I189
8 7 6 5 4 3
1
POWER CONNECTIONS
BUCK0
67 60 55 PPVDD_CPU =PPVDD_CPU 11
CHARGER MAIN
MAKE_BASE=TRUE
67 60 58 57 56 55 47 PPVCC_MAIN =PPVCC_MAIN_AUDIO 15
MAKE_BASE=TRUE
D BUCK1 =PPVCC_MAIN_LED 56
D
PPVDD_GPU =PPVDD_GPU
BUCK5 LDO7 =PPVCC_MAIN_CPU 55
67 60 55
MAKE_BASE=TRUE
11 =PPVCC_MAIN_GPU 55
67 60 55 PPVDD_SRAM =PPVDD_SRAM_CPU 10 67 60 56 PP3V0_S2R_TRISTAR =PP3V0_S2R_TRISTAR 47 =PPVCC_MAIN_SOC 55

MAKE_BASE=TRUE MAKE_BASE=TRUE
=PPVDD_SRAM_SOC 10 =PPVCC_MAIN_GRAPE 51
BUCK2 =PPVCC_MAIN_LCD 53
67 60 55 PPVDD_SOC =PPVDD_SOC 10 =PPVCC_MAIN_VDD_LCM 56

MAKE_BASE=TRUE
=PPVCC_MAIN_WLAN 46
BUCK3 BUCK6
PP1V8_S2R =PP1V8_S2R_MISC
67 60 56 55
MAKE_BASE=TRUE
5 59
=PP1V8_S2R_VDDIO_WLAN_BT 46
67 60 55 PP3V3_S2R
MAKE_BASE=TRUE
=PP3V3_S2R_SWITCH 57 LDO8
=PP1V8_S2R_TRISTAR 47
=PP3V3_S2R_WIFI_PA 46 61
=PP1V8_S2R_DDR 12 67 60 56 PP3V0_S2R_HALL =PP3V0_S2R_HALL 50

MAKE_BASE=TRUE
=PP1V8_S2R_GRAPE 51
=PP1V8_S2R_EXT_SWITCH 57
BATTERY
67 60 57 PP3V3_SW =PP3V3_EDP_PU
MAKE_BASE=TRUE
=PP3V3_NAND 14
=PP3V3_USB_SOC 4 67 60 55 PPBATT_VCC =PPBATT_POS_CONN 54

MAKE_BASE=TRUE
LDO9 BACKUP RAIL. CAN BE BOOSTED TO MEET

=PPBATT_VCC_BB
=PPBATT_AUDIO
25 26 34 35 36 37 38 39 40
17 18
1.1V MIN ON CAMERA IF NEEDED.
BUCK3_SW PP1V3_CAM =PP1V3_CAM_REAR
C PP1V8_SW1 =PP1V8_AUDIO
67 60 56
MAKE_BASE=TRUE
23
C
67 60 59 57 55
MAKE_BASE=TRUE
15
LDO1 USB POWER INPUT

XWC130
SM 67 60 56 PP3V0_SPARE1 =PP3V0_SPARE1 58
1 2 PP1V8_SW1_FOREHEAD 60 62 67
MAKE_BASE=TRUE
67 62 60 PP1V8_SW1_FOREHEAD =PP1V8_DMIC 16
67 60 55 PPVBUS_USB_DCIN =PPVBUS_USB_EMI 48
=PP1V8_CAM_FRONT
=PP1V8_CAM_REAR
22
23 LDO10
=PP1V8_PROX_AD7149 45
67 60 56 PP1V0_SOC =PP1V0_USB_SOC 4
MAKE_BASE=TRUE
=PP1V0_MIPI_SOC
LDO2 =PP1V0_EDP_PAD_DVDD_SOC
7
67 60 57 PP1V8_EXT_SW =PP1V8_VDDIO18_SOC 9 10
MAKE_BASE=TRUE
=PP1V8_SOC 4 5 7 13 58 67 60 56 PP1V7_VA_VCP =PP1V7_VA_VCP 15
=PP1V8_MIPI_SOC 7
MAKE_BASE=TRUE
ON_BUF
=PP1V8_EDP_SOC
=PP1V8_NAND_SOC
7
6
LDO11 67 60 56 PP1V8_ALWAYS
MAKE_BASE=TRUE
=PP1V8_ALWAYS 5
=PP1V8_NAND 14 57 61
=PP1V8_PLL_SOC 4
=PP1V8_EEPROM PP2V6_CAM_AF =PP2V6_CAM_REAR_AF

5
LDO3 67 60 56
MAKE_BASE=TRUE
23
67 60 55 PP1V8_SW2 =PP1V8_GRAPE 51 67 60 56 PP3V0_S2R_SENSOR =PP3V0_S2R_GYRO 19

=PP3V0_S2R_ACCEL 19
67 60 55 PP1V8_S2R_SW3
MAKE_BASE=TRUE
=PP1V8_S2R_GYRO 19
=PP3V0_S2R_COMP 24
BACKLIGHT BOOST
=PP1V8_S2R_ACCEL 19
B =PP1V8_S2R_OSCAR 19
LDO13 67 60 56 PPLED_OUT_A
MAKE_BASE=TRUE
=PPLED_REG_A 53 B
XWC133
SM PP2V9_CAM =PP2V9_CAM_FRONT
1 2 PP1V8_S2R_SW3_COMP 60 62 67 LDO4 67 60 56
MAKE_BASE=TRUE
=PP2V9_CAM_REAR
22
23
67 62 60 PP1V8_S2R_SW3_COMP =PP1V8_S2R_COMP 24
67 60 56 PPLED_OUT_B =PPLED_REG_B 53
MAKE_BASE=TRUE
MAKE_BASE=TRUE
67 60 56 PP3V0_ALS =PP3V0_ALS 22
MAKE_BASE=TRUE
=PP3V0_PROX_AD7149 45
BUCK4
67 60 56 55 PP1V2_S2R =PP1V2_S2R_DDR 12
MAKE_BASE=TRUE
=PP1V2_S2R_DDR_SOC 8
LDO5
67 60 56 PP3V0_UVLO =PP3V0_UVLO 58
MAKE_BASE=TRUE
BUCK4_SW VLCM1
67 60 55 PP1V2_SW1 =PP1V2_VDDQ_DDR 12
MAKE_BASE=TRUE
=PP1V2_VDDIOD_SOC 67 60 56 PP5V25_GRAPE =PP5V25_GRAPE 52 61
A =PP1V2_HSIC_SOC
8 9
4
MAKE_BASE=TRUE
LDO6
67 60 55 PP1V2_S2R_SW2 =PP1V2_S2R_OSCAR 19
MAKE_BASE=TRUE
67 60 56 PP3V3_ACC =PP3V3_ACC 47
MAKE_BASE=TRUE
8 7 6 5 4 3
1
Clock Signal Constraints JTAG
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_HEAD TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET

NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET I2C TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
JTAG * * 2:1_SPACING
CLK_50S * 45_OHM_SE CLK * * 3:1_SPACING TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET

TABLE_PHYSICAL_ASSIGNMENT_ITEM NET_TYPE
NET_TYPE I2C_50S * 45_OHM_SE ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
JTAG_SOC_TCK
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET I16 JTAG 4 47 60
I63 CLK_50S CLK CLK_32K_SOC2CUMULUS 5 52 60 61

JTAG JTAG_SOC_TMS 4 47 60
CLK_50S CLK CLK_32K_SOC2CUMULUS_FILT 60
I2C * *
TABLE_SPACING_ASSIGNMENT_ITEM
1.5:1_SPACING
I15
I371
CLK_50S CLK CUMULUS_MS_CK 52 61 I14

JTAG JTAG_SOC_TDI 4 60
I381
CLK_50S CLK CUMULUS_MS_SD 52 61 JTAG TP_JTAG_SOC_TDO 4 60
D
I380
ELECTRICAL_CONSTRAINT_SET
NET_TYPE
I13
I20 RST JTAG_SOC_TRST_L 4 13 60 D

PHYSICAL SPACING
I289
JTAG NC_JTAG_SOC_TRTCK 4
CLK_50S CLK PMU_GPIO_CLK_32K_WLAN 46 57 I2C_50S I2C I2C0_SDA_1V8 5 57 60 I316 JTAG BB_JTAG_TMS 5 25 28 61

I162 I1
PMU_GPIO_CLK_32K_OSCAR I2C0_SCL_1V8 JTAG BB_JTAG_TCK 5 25 28 61

I268 CLK_50S CLK 19 57 60 I2 I2C_50S I2C 5 57 60 I315
CLK_50S CLK PMU_OUT_32K_CLK_GPS 57 68 I2C_50S I2C I2C3_CAM_ALS_SDA_1V8_F 22 60 I317

JTAG BB_JTAG_TDO 5 25 28 61
I372 I3
I2C_50S I2C I2C3_CAM_ALS_SCL_1V8_F 22 60 I319 JTAG BB_JTAG_TDI 5 25 28 61

I4
I88
CLK_50S CLK ISP1_CAM_FRONT_CLK_R 7
I2C_50S I2C I2C0_HP_ALS_SDA_1V8_FILT 60 I318
RST BB_JTAG_TRST_L 5 25 28 61
I305
I89 CLK_50S CLK ISP1_CAM_FRONT_CLK 7 22

I2C_50S I2C I2C0_HP_ALS_SCL_1V8_FILT 60 I365 JTAG JTAG_WLAN_TMS_TX_BLANK 46 61
I306
I96 CLK_50S CLK ISP1_CAM_FRONT_CLK_F 22 60 I364 JTAG TP_JTAG_WLAN_TCK 46 61
I299
I2C_50S I2C I2C1_SOC2OSCAR_SWDCLK_1V8 5 19 I366
JTAG JTAG_WLAN_TDO_OSCAR_B 46 61
I94 CLK_50S CLK ISP0_CAM_REAR_CLK_R 7

I2C_50S I2C I2C1_SOC2OSCAR_SWDIO_1V8 5 19 JTAG JTAG_WLAN_TDI_OSCAR_A 46 61
I300 I368
I130 CLK_50S CLK ISP0_CAM_REAR_CLK 7 23

RST TP_JTAG_WLAN_TRST_L 46 61
I367
I131 CLK_50S CLK ISP0_CAM_REAR_CLK_F 23 60 I61 I2C_50S I2C I2C2_SDA_1V8 5 47

JTAG TP_JTAG_CUMULUS_M_TCK 52 61
I373
I62 I2C_50S I2C I2C2_SCL_1V8 5 47

JTAG TP_JTAG_CUMULUS_M_TDI 52 61
I374
JTAG JTAG_CUMULUS_M_TMS
UART NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE
SPACING_RULE_SET
I295 I2C_50S I2C I2C3_SDA_1V8 5 13 22 61
I375
JTAG TP_JTAG_CUMULUS_M_TDO
52 61
52 61
TABLE_PHYSICAL_ASSIGNMENT_HEAD TABLE_SPACING_ASSIGNMENT_ITEM
I296 I2C_50S I2C I2C3_SCL_1V8 5 13 22 61
I376
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET UART * * 3:1_SPACING

UART_50S * 45_OHM_SE UART UART * 2:1_SPACING
I301 I2C_50S I2C DMIC1_FF_SD_FILT 16 60

NET_TYPE

I302 I2C_50S I2C DMIC1_FF_SCLK_FILT 16 60 USB
I303
I2C_50S I2C DMIC1_FF_SD 15 16
I237 UART_50S UART UART0_SOC_RXD 5 47 60

I2C_50S I2C DMIC1_FF_SCLK 15 16 NET_PHYSICAL_TYPE AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE

SPACING_RULE_SET
I304
I236
UART_50S UART UART0_SOC_TXD 5 47 60 TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
UART_50S UART UART3_SOC2BB_RTS_L 5 25 29 I2C_50S I2C SEP_I2C0_SCL 5

USB_90D * 90_OHM_DIFF USB * * 4:1_SPACING
I174 I307
I173 UART_50S UART UART3_BB2SOC_RTS_L 5 25 29 I308 I2C_50S I2C SEP_I2C0_SDA 5
C I175
I176
UART_50S
UART_50S
UART
UART
UART3_SOC2BB_TX
UART3_BB2SOC_TX
5 25 29 47
5 25 29 47 I98 I2C_50S I2C ISP0_CAM_REAR_SCL 7 23 ELECTRICAL_CONSTRAINT_SET PHYSICAL

NET_TYPE
SPACING
C
UART_50S UART UART4_OSCAR2SOC_RXD I2C_50S I2C ISP0_CAM_REAR_SDA 7 23
I177 5 19 I99
USB USB_90D USB USB_SOC_P 4 47 60
UART_50S UART UART4_SOC2OSCAR_TXD I2C_50S I2C ISP0_CAM_REAR_SCL_F 23 60
I5
I178
5 19 I312
USB USB_90D USB USB_SOC_N 4 47 60
UART_50S UART UART1_SOC2BT_RTS_L I2C_50S I2C ISP0_CAM_REAR_SDA_F 23 60
I6
I179 5 46 I311
I248 USB USB_90D USB USB_BB_P 25 47
I182 UART_50S UART UART1_BT2SOC_RTS_L 5 46

USB USB_90D USB USB_BB_N 25 47
UART_50S UART UART1_SOC2BT_TX I2C_50S I2C ISP1_CAM_FRONT_SCL 7 22
I249
I181 5 46 I100
USB USB_90D USB USB_BB_DEBUG_P 25 28 61
UART_50S UART UART1_BT2SOC_TX I2C_50S I2C ISP1_CAM_FRONT_SDA 7 22
I369
I180 5 46 I101
USB USB_90D USB USB_BB_DEBUG_N 25 28 61
UART_50S UART UART2_SOC2WLAN_TX 5 46 I102
I2C_50S I2C ISP1_CAM_FRONT_SCL_F 22 60
I370
I298
UART_50S UART UART2_WLAN2SOC_TX 5 46 I103 I2C_50S I2C ISP1_CAM_FRONT_SDA_F 22 60

I297
USB USB_90D USB E75_DPAIR1_CONN_P 47 49 60
UART_50S UART UART2_SOC2WLAN_TX_R 46 61
I258
I377
USB USB_90D USB E75_DPAIR1_CONN_N 47 49 60
UART_50S UART UART2_WLAN2SOC_TX_R 46 61
I259
I378
USB USB_90D USB E75_DPAIR2_CONN_P 47 49 60
UART_50S UART UART6_TS_ACC_RXD 5 47
I260
I269
USB USB_90D USB E75_DPAIR2_CONN_N 47 49 60
UART_50S UART UART6_TS_ACC_TXD 5 47
I261
I270
USB USB_90D USB E75_DPAIR1_P 47
UART UART5_BATT_TRXD 5 54 57
I263
I310
USB USB_90D USB E75_DPAIR1_N 47
UART BATT_SWI_CONN 54 60
I262
I337
SPI I265
USB USB_90D USB E75_DPAIR2_P 47
I264 USB USB_90D USB E75_DPAIR2_N 47
I2S NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE
SPACING_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SPI_50S * 45_OHM_SE NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET

TABLE_PHYSICAL_ASSIGNMENT_HEAD TABLE_SPACING_ASSIGNMENT_ITEM
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET I2S * * 3:1_SPACING TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET HSIC * * 4:1_SPACING

I2S_50S * 45_OHM_SE I2S I2S * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM
SPI * *
2:1_SPACING
HSIC HSIC GND * 1.5:1_SPACING
NET_TYPE TABLE_PHYSICAL_ASSIGNMENT_HEAD
HSIC_RDY * * 2:1_SPACING
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING NET_TYPE NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET TABLE_SPACING_ASSIGNMENT_ITEM

HSIC_RDY GND * 1.5:1_SPACING

I2S_50S CLK I2S0_CODEC_ASP_MCK_R 5 15
HSIC * 45_OHM_SE
B I157
I158
I2S_50S CLK I2S0_CODEC_ASP_MCK 5 I240
SPI_50S SPI SPI3_CODEC_MISO 5 15 B
I140 I2S_50S I2S I2S0_CODEC_ASP_BCLK 5 15 I241 SPI_50S SPI SPI3_CODEC_MOSI 5 15
NET_TYPE
I2S_50S I2S I2S0_CODEC_ASP_LRCK 5 15 SPI_50S SPI SPI3_CODEC_SCLK 5 15

I143 I242
I142
I2S_50S I2S I2S0_CODEC_ASP_DIN 5 15 I243
SPI_50S SPI SPI3_CODEC_CS_L 5 15
HSIC HSIC HSIC1_WLAN_DATA 4 46 61
I191
I141 I2S_50S I2S I2S0_CODEC_ASP_DOUT 5 15

HSIC HSIC HSIC1_WLAN_STB 4 46 61
I194
I159 I2S_50S I2S I2S0_CODEC_ASP_SDOUT 15

HSIC HSIC HSIC2_BB_DATA 4 25 28 61
I193
HSIC HSIC HSIC2_BB_STB 4 25 28 61

I2S_50S I2S NC_I2S1_MCK 5
I192
I161
HSIC HSIC NC_HSIC0_DATA 4
I2S_50S I2S I2S1_CODEC_XSP_BCLK 5 15
SPI_50S SPI SPI2_GRAPE_MISO
I287
I145
I291
5 52 60 61 64
HSIC HSIC NC_HSIC0_STB 4
I149 I2S_50S I2S I2S1_CODEC_XSP_LRCK 5 15
SPI_50S SPI SPI2_GRAPE_MOSI 5 52 60 61 64
I288
I292
I150 I2S_50S I2S I2S1_CODEC_XSP_DIN 5 15

SPI_50S SPI SPI2_GRAPE_SCLK 5 52 60 61 64 I195 HSIC HSIC_RDY HSIC1_WLAN2SOC_REMOTE_WAKE 5 46 61
I293
I151
I2S_50S I2S I2S1_CODEC_XSP_DOUT 5 15
SPI_50S SPI SPI2_GRAPE_CS_L 5 52 60 61 64 I196
HSIC HSIC_RDY HSIC1_WLAN2SOC_DEVICE_RDY 5 46 61
I294
I309 I2S_50S I2S I2S1_CODEC_XSP_SDOUT 15 I197 HSIC HSIC_RDY HSIC1_SOC2WLAN_HOST_RDY 5 46
I379 HSIC HSIC_RDY HSIC1_SOC2WLAN_HOST_RDY_R 46 61

I234 I2S_50S CLK NC_I2S2_MCK_R
I235 I2S_50S CLK NC_I2S2_MCK 5
HSIC HSIC_RDY HSIC2_BB2SOC_REMOTE_WAKE 5 29
I198
I276
I2S_50S I2S NC_I2S2_BCLK 5
HSIC HSIC_RDY HSIC2_BB2SOC_DEVICE_RDY 5 25 29
I199
I277 I2S_50S I2S NC_I2S2_LRCK 5 I346 SPI_50S SPI SPI2_GRAPE_MISO 5 52 60 61 64

HSIC HSIC_RDY HSIC2_SOC2BB_HOST_RDY 5 25 29
I286
I278 I2S_50S I2S NC_I2S2_DIN 5 I347 SPI_50S SPI SPI2_GRAPE_MOSI 5 52 60 61 64
I279
I2S_50S I2S NC_I2S2_DOUT 5 I348
SPI_50S SPI SPI2_GRAPE_SCLK 5 52 60 61 64
I349 SPI_50S SPI SPI2_GRAPE_CS_L 5 52 60 61 64
I290 I2S_50S I2S NC_I2S4_MCK 5
I2S_50S I2S I2S4_SOC2BT_BCLK 5 46 I351 SPI_50S SPI SPI_OSCAR_MISO 19 24

I281
I2S_50S I2S I2S4_SOC2BT_LRCK 5 46 I350 SPI_50S SPI SPI_OSCAR_MOSI 19 24

I280
I2S_50S I2S I2S4_SOC2BT_DATA 5 46 I352

SPI_50S SPI SPI_OSCAR_SCLK 19 24
I282
I2S_50S I2S I2S4_BT2SOC_DATA 5 46 I353 SPI_50S SPI SPI_OSCAR_MISO_GYRO 19
A I283
I356 SPI_50S
SPI_50S
SPI
SPI
SPI_OSCAR_MISO_ACCEL
SPI_OSCAR_MISO_COMP1
19
DWI I357
24

I354 SPI_50S SPI SPI_OSCAR_MOSI_R 19

DWI * * 2:1_SPACING
I355 SPI_50S SPI SPI_OSCAR_SCLK_R 19
NET_TYPE I360
SPI_50S SPI SPI_OSCAR2ACCEL_CS_L 19
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING I361 SPI_50S SPI SPI_OSCAR2GYRO_CS_L 19
SPI_50S SPI_OSCAR2COMPASS_CS_L 19 24
I152 DWI DWI_AP_CLK 5 57
I362
I324 DWI NC_DWI_AP_DI 57
I156
DWI DWI_AP_DO 5 57
8 7 6 5 4 3
1
MIPI NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET AUDIO/SPEAKER

NET_PHYSICAL_TYPE AREA_TYPE
PHYSICAL_RULE_SET MIPI0C * * 4:1_SPACING

NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE

SPACING_RULE_SET EMBEDDED DISPLAYPORT

TABLE_PHYSICAL_ASSIGNMENT_HEAD TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
MIPI_90D * 90_OHM_DIFF MIPI1C * * 4:1_SPACING AUDIO * * 3:1_SPACING NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_PHYSICAL_ASSIGNMENT_ITEM
AUDIO AUDIO * 2:1_SPACING EDP_90D * 90_OHM_DIFF EDP_50S * 45_OHM_SE

NET_TYPE
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING NET_TYPE NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET

I315 MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_CLK_P 7 23 61 EDP * * 4:1_SPACING

I316 MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_CLK_N 7 23 61
NET_TYPE
I343
MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_P<0> 7 23 61
I342 MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_N<0> 7 23 61
D I311 MIPI0C
MIPI0C
MIPI_90D
MIPI_90D
MIPI0C
MIPI0C
MIPI0C_CAM_REAR_DATA_P<1>
MIPI0C_CAM_REAR_DATA_N<1>
7 23 61
7 23 61
I435 EDP_90D
EDP_90D
EDP
EDP
EDP_AUX_P
EDP_AUX_N
7 53
7 53
D
I312 I436
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_P<2> EDP_50S EDP EDP_HPD

I395 7
I564 SPKR_DIFF SPEAKER AUDIO SPKRAMP_L1_OUT_P 18 49 60 I437 7 53
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_N<2> EDP EDP_90D EDP EDP_DATA_P<0>

I394
7
I565 SPKR_DIFF SPEAKER AUDIO SPKRAMP_L1_OUT_N 18 49 60 I439
7 53 61
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_P<3> EDP EDP_90D EDP EDP_DATA_N<0>

I519 7
I639
SPKR_DIFF SPEAKER AUDIO SPKRAMP_L2_OUT_P 18 49 60 I438 7 53 61
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_N<3> EDP EDP_90D EDP EDP_DATA_P<1>

I518 7
I640 SPKR_DIFF SPEAKER AUDIO SPKRAMP_L2_OUT_N 18 49 60 I440 7 53 61
MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_CLK_FILT_P EDP EDP_90D EDP EDP_DATA_N<1>

I521
23 61
I558
SPKR_DIFF SPEAKER AUDIO SPKRAMP_R1_OUT_P 17 49 60 I442
7 53 61
MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_CLK_FILT_N EDP EDP_90D EDP EDP_DATA_P<2>

I520 23 61
I560 SPKR_DIFF SPEAKER AUDIO SPKRAMP_R1_OUT_N 17 49 60 I441 7 53 61
MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_FILT_P<0> EDP EDP_90D EDP EDP_DATA_N<2>

I345 23 61
I641 SPKR_DIFF SPEAKER AUDIO SPKRAMP_R2_OUT_P 17 49 60 I444 7 53 61
MIPI0C_PP MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_FILT_N<0> EDP EDP_90D EDP EDP_DATA_P<3>

I346
23 61
I642
SPKR_DIFF SPEAKER AUDIO SPKRAMP_R2_OUT_N 17 49 60 I443
7 53 61
MIPI0C MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_FILT_P<1> 23 61

EDP EDP_90D EDP EDP_DATA_N<3> 7 53 61
I347 I445
MIPI0C MIPI_90D MIPI0C MIPI0C_CAM_REAR_DATA_FILT_N<1> 23 61 I570

USB_90D USB MIKEY_TS_P 15 47
EDP_90D EDP EDP_AUX_EMI_P 53
I348 I447
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_FILT_P<2> I569 USB_90D USB MIKEY_TS_N 15 47

EDP_90D EDP EDP_AUX_EMI_N 53
I706 MAXIMUM_NECK_LENGTH=0.5 MM I446
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_FILT_N<2> MIN_NECK_WIDTH=0.06 MM EDP EDP_90D EDP EDP_DATA_EMI_P<0>

I707
I600 USB_90D USB L81_MBUS_P 15 I449 53 61
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_FILT_P<3> EDP EDP_90D EDP EDP_DATA_EMI_N<0>

I708
I601 USB_90D USB L81_MBUS_N 15 I448
53 61
MIPI0C MIPI_90D MIPI0C NC_MIPI0C_CAM_REAR_DATA_FILT_N<3> EDP EDP_90D EDP EDP_DATA_EMI_P<1> 53 61

I709 I450
SPKR_DIFF AUDIO_DIFF AUDIO LEFT_CH_OUT_P 15 18 60

EDP EDP_90D EDP EDP_DATA_EMI_N<1> 53 61
I702 I451
I606 MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_CLK_P 7 22 61

SPKR_DIFF AUDIO_DIFF AUDIO LEFT_CH_OUT_N 15 18 60
EDP EDP_90D EDP EDP_DATA_EMI_P<2> 53 61
I703 I452
I607 MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_CLK_N 7 22 61

SPKR_DIFF AUDIO_DIFF AUDIO RIGHT_CH_OUT_P 15 17 60
I705 I454
I608
MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_DATA_P<0> 7 22 61
SPKR_DIFF AUDIO_DIFF AUDIO RIGHT_CH_OUT_N 15 17 60
EDP EDP_90D EDP EDP_DATA_EMI_P<3> 53 61
I704 I453
I610 MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_DATA_N<0> 7 22 61

SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_L1_IN_P 18 61
I711 I455
I609 MIPI1C MIPI_90D MIPI1C NC_MIPI1C_CAM_FRONT_DATA_P<1> 7

SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_L1_IN_N 18 61 EDP_90D EDP EDP_AUX_EMI_CONN_P 53
I710 I457
MIPI1C MIPI_90D MIPI1C NC_MIPI1C_CAM_FRONT_DATA_N<1> 7 MAX98304_R1_IN_P EDP EDP_AUX_EMI_CONN_N
I611
I713 SPKR_DIFF AUDIO_DIFF AUDIO 17 61 I456 EDP_90D 53
I612 MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_CLK_FILT_P 22 61

SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_R1_IN_N 17 61
EDP EDP_90D EDP EDP_DATA_EMI_CONN_P<0> 53 61
I712 I458
I613 MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_CLK_FILT_N 22 61

SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_L2_IN_P 18 61
EDP EDP_90D EDP EDP_DATA_EMI_CONN_N<0> 53 61
I714 I460
I614
MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_DATA_FILT_P<0> 22 61
SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_L2_IN_N 18 61
EDP EDP_90D EDP EDP_DATA_EMI_CONN_P<1> 53 61
I715 I459
MIPI1C_PP MIPI_90D MIPI1C MIPI1C_CAM_FRONT_DATA_FILT_N<0> 22 61
SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_R2_IN_P EDP EDP_90D EDP EDP_DATA_EMI_CONN_N<1>
C
I616 17 61 53 61
C MIPI_90D MIPI1C NC_MIPI0D_DPCLK

I716
I717 SPKR_DIFF AUDIO_DIFF AUDIO MAX98304_R2_IN_N 17 61

I462
I461
EDP
EDP
EDP_90D EDP
EDP
EDP_DATA_EMI_CONN_P<2> 53 61
I657 7
I463
EDP_90D EDP_DATA_EMI_CONN_N<2> 53 61
MIPI_90D MIPI1C NC_MIPI0D_DNCLK 7 EDP EDP_90D EDP EDP_DATA_EMI_CONN_P<3>
I658
AUDIO_DIFF AUDIO SPKR_L1_VSNS_P I464 53 61
MIPI_90D MIPI1C NC_MIPI0D_DPDATA0 7
I673
EDP EDP_90D EDP EDP_DATA_EMI_CONN_N<3>
I659
AUDIO_DIFF AUDIO SPKR_L1_VSNS_N I465 53 61
I660 MIPI_90D MIPI1C NC_MIPI0D_DNDATA0 7

I674
I661 MIPI_90D MIPI1C NC_MIPI0D_DPDATA1 7 I675 AUDIO_DIFF AUDIO SPKR_R1_VSNS_P

I662
MIPI_90D MIPI1C NC_MIPI0D_DNDATA1 7 I676
AUDIO_DIFF AUDIO SPKR_R1_VSNS_N
I663 MIPI_90D MIPI1C NC_MIPI0D_DPDATA2 7
MIPI_90D MIPI1C NC_MIPI0D_DNDATA2 MAXIMUM_NECK_LENGTH=15 MM

I664 7
I684 PWR_0P5MM AUDIO CODEC_HP_HS3 15
I665
MIPI_90D MIPI1C NC_MIPI0D_DPDATA3 7
I683
PWR_0P5MM AUDIO CODEC_HP_HS4 15
TEMP SENSORS
I666 MIPI_90D MIPI1C NC_MIPI0D_DNDATA3 7
PWR_0P5MM AUDIO CONN_HP_HS3_FILT 15 16 60
I685
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET
PWR_0P5MM AUDIO CONN_HP_HS4_FILT 15 16 60
MIPI_90D MIPI0C MIPI_CAM0_CLKCON_P I686 TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
I648
PWR_0P2MM AUDIO CODEC_HP_LEFT 15 BOARD_TEMP * TEMP_SENSE BOARD_TEMP * * 3:1_SPACING
MIPI_90D MIPI0C MIPI_CAM0_CLKCON_N I689
I647
PWR_0P2MM AUDIO CODEC_HP_RIGHT 15
MIPI_90D MIPI0C MIPI_CAM0_D0CON_P I690
I649
PWR_0P2MM AUDIO CONN_HP_LEFT_FILT 15 16 60
MIPI_90D MIPI0C MIPI_CAM0_D0CON_N I688
I650
PWR_0P2MM AUDIO CONN_HP_RIGHT_FILT 15 16 60
I651 MIPI_90D MIPI0C MIPI_CAM0_D1CON_P I687
NET_TYPE
I652 MIPI_90D MIPI0C MIPI_CAM0_D1CON_N
I653 MIPI_90D MIPI0C MIPI_CAM0_D2CON_P
I654
MIPI_90D MIPI0C MIPI_CAM0_D2CON_N I682
BOARD_TEMP BOARD_TEMP BOARD_TEMP PA_NTC_P 57 60
I656 MIPI_90D MIPI0C MIPI_CAM0_D3CON_P I681 BOARD_TEMP BOARD_TEMP BOARD_TEMP PA_NTC_N 57
MIPI_90D MIPI0C MIPI_CAM0_D3CON_N DEV L81_NVCP

I655
I696 PP_PWR PWR 15 61
MIPI_90D MIPI1C MIPI_CAM1_CLKCON_P PP_PWR PWR L81_PVCP
I667
I695 15 61
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP2_P 57 60
I668 MIPI_90D MIPI1C MIPI_CAM1_CLKCON_N PP_PWR PWR L81_FLYP
I726
I697 15 61
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP2_N 57
I669 MIPI_90D MIPI1C MIPI_CAM1_D0CON_P PP_PWR PWR L81_FLYN
I725
I698 15 61
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP3_P 57 60
MIPI_90D MIPI1C MIPI_CAM1_D0CON_N PP_PWR PWR L81_FLYC
I576
I670
I700
15 61
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP3_N 57
MIPI_CAM1_D1CON_P I577
B I671
I672
MIPI_90D
MIPI_90D
MIPI1C
MIPI1C MIPI_CAM1_D1CON_N
I699
I701
PP_PWR
PP_PWR
PWR
PWR
SPEAKER_VQ
L81_FILT 15
I578
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP
BOARD_TEMP4_P
BOARD_TEMP4_N
57 60
57
B
I579
I580 BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP5_P 57 60
I581 BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP5_N 57
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP6_P

BACKLIGHT I582
BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP6_N

57 60
57
I583
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET I602 BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP7_P 57 60
I603 BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP7_N 57
LED * LED LEDA * * 2.4:1_SPACING BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP8_P 57 60
I604
LEDB * * 2.4:1_SPACING I605 BOARD_TEMP BOARD_TEMP BOARD_TEMP BOARD_TEMP8_N 57
I584
PWR_0P1MM AUDIO HP_MIC_POS 15
NET_TYPE I585 PWR_0P1MM AUDIO HP_MIC_NEG 15

I587 PWR_0P1MM AUDIO L81_AIN2_POS 15
GRAPE
I482 LED LEDA LED_IO1_A_R 56 I586 PWR_0P1MM AUDIO L81_AIN2_NEG 15

I484
LED LEDB LED_IO1_B_R 56 I691
PWR_0P1MM AUDIO CODEC_HP_HS3_REF 15 TABLE_PHYSICAL_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
LED LEDA LED_IO2_A_R 56 PWR_0P1MM AUDIO CODEC_HP_HS4_REF 15

GRAPE * GRAPE_SE GRAPE * * 2:1_SPACING
I483 I693
I485 LED LEDB LED_IO2_B_R 56 I692 PWR_0P1MM AUDIO CONN_HP_HS3_REF_FILT 15 16 60

NET_TYPE
I487
LED LEDA LED_IO3_A_R 56 I694
PWR_0P1MM AUDIO CONN_HP_HS4_REF_FILT 15 16 60
I486 LED LEDB LED_IO3_B_R 56
I489
LED LEDA LED_IO4_A_R 56 I723
GRAPE GRAPE MT_PANEL_IN<0..29> 52 61
I488 LED LEDB LED_IO4_B_R 56 I724 GRAPE GRAPE MT_PANEL_OUT<0..39> 52 61
I490 LED LEDA LED_IO5_A_R 56
I491
LED LEDB LED_IO5_B_R 56
I492 LED LEDA LED_IO6_A_R 56

XTAL
I493 LED LEDB LED_IO6_B_R 56 TABLE_SPACING_ASSIGNMENT_HEAD
LED_IO_1_A NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET

A I494
I495
LED
LED
LEDA
LEDB LED_IO_1_B
53 56 60
53 56 60
CRYSTAL * * 5:1_SPACING
I496 LED LEDA LED_IO_2_A 53 56 60
I497
LED LEDB LED_IO_2_B 53 56 60
NET_TYPE
I498 LED LEDA LED_IO_3_A 53 56 60
I499
LED LEDA LED_IO_4_A 53 56 60 I718 CRYSTAL XTAL_SOC_24M_I 4

I500
LED LEDB LED_IO_4_B 53 56 60 I719 CRYSTAL XTAL_SOC_24M_O 4

I501
LED LEDA LED_IO_5_A 53 56 60 I720

CRYSTAL SOC_24M_O 4
I502
LED LEDB LED_IO_5_B 53 56 60 I721 CRYSTAL PMU_XTAL 56

I503
LED LEDA LED_IO_6_A 53 56 60 I722 CRYSTAL PMU_EXTAL 56

I504
I505
8 7 6 5 4 3
1
DDR
NET_PHYSICAL_TYPE AREA_TYPE
PHYSICAL_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE

SPACING_RULE_SET
NAND

DDR_50S * DRAM_SE DDR * * 3:1_SPACING TABLE_PHYSICAL_ASSIGNMENT_ITEM
NAND_50S * 45_OHM_SE
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET TABLE_SPACING_ASSIGNMENT_HEAD

DDR_90D * DRAM_DIFF TABLE_SPACING_ASSIGNMENT_ITEM
NAND * * 3:1_SPACING
NET_TYPE
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING NET_TYPE
D ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING

D
I333
DDR_50S DDR DDR0_CA<0> 8 12 61
I221 DDR_50S DDR DDR0_CA<9..1> 8 12 61 I68 FMI0_AD_CTRL_PP NAND_50S NAND FMI0_AD<0> 6 14 61
I222 DDR_50S DDR DDR0_DM<3..0> 8 12 61 I69 FMI0_AD_CTRL NAND_50S NAND FMI0_AD<1> 6 14 61
I223
DDR_90D DDR DDR0_CK_P 8 12 61 I70
FMI0_AD_CTRL NAND_50S NAND FMI0_AD<2> 6 14 61
I225 DDR_90D DDR DDR0_CK_N 8 12 61 I71 FMI0_AD_CTRL NAND_50S NAND FMI0_AD<3> 6 14 61
I226
DDR_50S DDR DDR0_CKE<1..0> 8 12 61 I72
I224 DDR_50S DDR DDR0_CSN<1..0> 8 12 61 I73 FMI0_AD_CTRL NAND_50S NAND FMI0_AD<5> 6 14 61
I74 FMI0_AD_CTRL NAND_50S NAND FMI0_AD<6> 6 14 61
I329
DDR DDR0_CA_ZQ_SOC 8
I75
I327 DDR DDR0_DQ_ZQ_SOC 8

FMI0_AD_CTRL NAND_50S NAND FMI0_ALE 6 14 61
I76
I294 DDR DDR0_ZQ_DRAM 12

FMI0_CE NAND_50S NAND FMI0_CE0_L 6 14 60 61
I77
I230 DDR_50S DDR DDR0_DQ<1..0> 8 12 61

FMI0_AD_CTRL NAND_50S NAND FMI0_CLE 6 14 61
I126
I334 DDR_50S DDR DDR0_DQ<2> 8 12 61

NAND_50S NAND FMI0_DQS 6 14 61
I128
I335 DDR_50S DDR DDR0_DQ<7..3> 8 12 61

FMI0_AD_CTRL NAND_50S NAND FMI0_RE_L 6 14 61
I131
I229 DDR_90D DDR DDR0_DQS_P<0> 8 12 61

FMI0_AD_CTRL NAND_50S NAND FMI0_WE_L 6 14 61
I133
I231 DDR_90D DDR DDR0_DQS_N<0> 8 12 61
I232
DDR_50S DDR DDR0_DQ<15..8> 8 12 61 I135
I233 DDR_90D DDR DDR0_DQS_P<1> 8 12 61 I136 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<1> 6 14
I235 DDR_90D DDR DDR0_DQS_N<1> 8 12 61 I137 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<2> 6 14
I234
DDR_50S DDR DDR0_DQ<23..16> 8 12 61 I138
FMI1_AD_CTRL NAND_50S NAND FMI1_AD<3> 6 14
I236 DDR_90D DDR DDR0_DQS_P<2> 8 12 61 I139 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<4> 6 14
I237 DDR_90D DDR DDR0_DQS_N<2> 8 12 61 I140 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<5> 6 14
I337 DDR_50S DDR DDR0_DQ<27..25> 8 12 61 I141 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<6> 6 14
I238 DDR_50S DDR DDR0_DQ<28> 8 12 61 I142 FMI1_AD_CTRL NAND_50S NAND FMI1_AD<7> 6 14
I336 DDR_50S DDR DDR0_DQ<31..29> 8 12 61 I143

FMI1_AD_CTRL NAND_50S NAND FMI1_ALE 6 14 61
DDR_90D DDR DDR0_DQS_P<3> FMI1_CE NAND_50S NAND FMI1_CE0_L

C I239
I240 DDR_90D DDR DDR0_DQS_N<3>

8 12 61
8 12 61
I144
I152 FMI1_AD_CTRL NAND_50S NAND FMI1_CLE

6 14 61
6 14 61 C
I154
FMI1_AD_CTRL NAND_50S NAND FMI1_DQS 6 14 61
I338 DDR_50S DDR DDR1_CA<3..0> 8 12 61 I156 FMI1_AD_CTRL NAND_50S NAND FMI1_RE_L 6 14 61
I201 DDR_50S DDR DDR1_CA<9..4> 8 12 61 I160 FMI1_AD_CTRL NAND_50S NAND FMI1_WE_L 6 14 61
I202
DDR_50S DDR DDR1_DM<3..0> 8 12 61
I203 DDR_90D DDR DDR1_CK_P 8 12 61
I205 DDR_90D DDR DDR1_CK_N 8 12 61
I206 DDR_50S DDR DDR1_CKE<1..0> 8 12 61
DDR_50S DDR DDR1_CSN<0>

I204
DDR_50S DDR DDR1_CSN<1>

8 12 61
8 12 61
NAND DEV
I339
NET_TYPE
I330
DDR DDR1_CA_ZQ_SOC 8
I331 DDR DDR1_DQ_ZQ_SOC 8
I332 DDR DDR1_ZQ_DRAM 12 I295 NAND_50S NAND FMI0_AD_BUF<0>

I210
DDR_50S DDR DDR1_DQ<7..0> 8 12 61 I297
NAND_50S NAND FMI0_AD_BUF<1>
I209 DDR_90D DDR DDR1_DQS_P<0> 8 12 61 I296 NAND_50S NAND FMI0_AD_BUF<2>
I211 DDR_90D DDR DDR1_DQS_N<0> 8 12 61 I298 NAND_50S NAND FMI0_AD_BUF<3>
I212
DDR_50S DDR DDR1_DQ<15..8> 8 12 61 I299
I213 DDR_90D DDR DDR1_DQS_P<1> 8 12 61 I300 NAND_50S NAND FMI0_AD_BUF<5>
I215 DDR_90D DDR DDR1_DQS_N<1> 8 12 61 I302 NAND_50S NAND FMI0_AD_BUF<6>
I214
DDR_50S DDR DDR1_DQ<23..16> 8 12 61 I301
I216 DDR_90D DDR DDR1_DQS_P<2> 8 12 61 I303 NAND_50S NAND FMI0_ALE_BUF
I217
DDR_90D DDR DDR1_DQS_N<2> 8 12 61 I305
NAND_50S NAND FMI0_CE0_BUF_L
I218 DDR_50S DDR DDR1_DQ<31..24> 8 12 61 I304 NAND_50S NAND FMI0_CLE_BUF
DDR_90D DDR DDR1_DQS_P<3> 8 12 61 NAND_50S NAND FMI0_DQS_BUF
B I219
I220
DDR_90D DDR DDR1_DQS_N<3> 8 12 61
I306
I307
NAND_50S NAND FMI0_DQSN_BUF B
I308 NAND_50S NAND FMI0_REP_BUF
I309 NAND_50S NAND FMI0_RE_BUF_L
I310
NAND_50S NAND FMI0_WE_BUF_L
VREF (DDR/FMI) I311 NAND_50S NAND FMI1_AD_BUF<0>

I312
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET NAND_50S NAND FMI1_AD_BUF<2>
I314
VREF * * 5:1_SPACING I313

I315 NAND_50S NAND FMI1_AD_BUF<4>
NET_TYPE I316 NAND_50S NAND FMI1_AD_BUF<5>
VOLTAGE PHYSICAL SPACING I317
MIN_NECK_WIDTH=0.15 MM I318 NAND_50S NAND FMI1_AD_BUF<7>
I166 0.6V PP_PWR PWR PPVREF_DDR0_CA_SOC 8
NAND_50S NAND FMI1_ALE_BUF
I319
I167 0.6V PP_PWR PWR PPVREF_DDR0_DQ_SOC 8

NAND_50S NAND FMI1_CE0_BUF_L
I320
I169 0.6V PP_PWR PWR PPVREF_DDR1_CA_SOC 8

NAND_50S NAND FMI1_CLE_BUF
I322
I168
0.6V PP_PWR PWR PPVREF_DDR1_DQ_SOC 8
NAND_50S NAND FMI1_DQS_BUF
I323
I244 0.6V PP_PWR PWR PPVREF_DDR0_CA_DRAM 12

NAND_50S NAND FMI1_DQSN_BUF
I321
I243 0.6V PP_PWR PWR PPVREF_DDR0_DQ_DRAM 12

NAND_50S NAND FMI1_REP_BUF
I324
I241
0.6V PP_PWR PWR PPVREF_DDR1_CA_DRAM 12
NAND_50S NAND FMI1_RE_BUF_L
I325
I242 0.6V PP_PWR PWR PPVREF_DDR1_DQ_DRAM 12

NAND_50S NAND FMI1_WE_BUF_L
I326
I291 0.9V PP_PWR VREF PPVREF_FMI_SOC 6 61
PPVREF_FMI_NAND
A I292
0.9V PP_PWR VREF 14 61
8 7 6 5 4 3
1
GND
NET_TYPE
VOLTAGE PHYSICAL SPACING
MAX_LINE_WIDTH=0.6 MM
0V GND GND GND_AUDIO_CODEC 15 60
PWR I200
I376
0V
MAX_LINE_WIDTH=0.6
GND
MM
GND GND_AVDD_CAM_FRONT 22
I392 0V GND GND GND_PP1V8_CAM_FRONT 22
NET_TYPE NET_TYPE I393 0V GND GND GND_PP2V9_CAM_FRONT 22
VOLTAGE PHYSICAL SPACING VOLTAGE PHYSICAL SPACING MAX_LINE_WIDTH=0.6 MM
0V GND GND GND_COMP 24
BUCKS I369
D I221 4.7V PP_PWR PWR BUCK0_LX0 55 I61 1.8V PP_PWR PWR PP1V8_PLL_SOC_F 4
I338
I382
0V
0V
GND
GND
GND
GND
GND_PMU
GND_SPKR_AMP_L1
D
4.7V PP_PWR PWR BUCK0_LX1 55 I64
1.8V PP_PWR PWR PP1V8_EDP_AVDD_AUX 7
0V GND GND GND_SPKR_AMP_L2
I1 I383
4.7V PP_PWR PWR BUCK0_LX2 55 I263 0.4V PP_PWR PWR TP_PP0V4_MIPI0D 7

0V GND GND GND_SPKR_AMP_R1
I2 I384
4.7V PP_PWR PWR BUCK0_LX3 55 I264 0.4V PP_PWR PWR TP_PP0V4_MIPI1D 7

0V GND GND GND_SPKR_AMP_R2
I3 I385
1.1V PP_PWR PWR BUCK0_FB 55

I4
1.8V PWR_0P2MM PWR PP1V8_XTAL 9
4.7V PP_PWR PWR BUCK1_LX0 I380
I5
4.7V PP_PWR PWR BUCK1_LX1

55
RST
I6 55
I301 1.8V PP_PWR PWR PP1V8_VDD_ANA_TMPSADC 10
I7
4.7V PP_PWR PWR BUCK1_LX2 55

I8
1.2V PP_PWR PWR PPVDDI_NAND 14
4.7V PP_PWR PWR BUCK2_LX0 55

I346
RST * * 3:1_SPACING
I9
1.8V PP_PWR PWR PP1V8_DMIC_FILT 16 60
I226
I12
3.0V PP_PWR PWR PP3V0_HP_ALS_FILT 60
I11 4.7V PP_PWR PWR BUCK3_LX0 55
I255
NET_TYPE
I10 1.8V PP_PWR PWR BUCK3_FB 55 ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
4.7V PP_PWR PWR BUCK4_LX0 55 I276 8.75V PP_PWR PWR SPKR_L1_SWITCH

I13
1.2V PP_PWR PWR BUCK4_FB 55 I277 8.75V PP_PWR PWR SPKR_R1_SWITCH RST BB_TRST_L
I15 I165
I14 4.7V PP_PWR PWR BUCK5_LX0 55 I166 RST DBG_RST DEV

I16 1.0V PP_PWR PWR BUCK5_FB 55 I167 RST DEBUG_RST_L 25 28 61
4.7V PP_PWR PWR BUCK6_LX0 55 I377 1.8V PP_PWR PWR PPDVDD_SPKRAMP RST GSM_TXBURST_IND
I17 I171
I18
3.3V PP_PWR PWR BUCK6_FB 55 I170
RST RST_AP_1V8_L
I168 RST RESET_SOC_L 4 13 25 47 57 60 61
I172 RST GPIO_SOC2BB_RST_L 5 25 27 60

RAILS I174
RST RST_BB_PMU_L
MIN_NECK_WIDTH=0.15 MM RST RST_BT_L
1.1V PWR_15MM PWR PPVDD_CPU 55 60 62
I173
I268
MIN_NECK_WIDTH=0.15 MM 1.7V PP_PWR PWR PP1V7_VCP RST RST_DET_L
1.1V PWR_10MM PWR PPVDD_GPU 55 60 62 I357 15 60 I175
I19
MIN_NECK_WIDTH=0.15 MM 4.2V PP_PWR PWR PPVCC_VPROG_CP RST GPIO_SOC2GRAPE_RESET_L 5 52 60 61
1.0V PWR_2MM PWR PPVDD_SOC 55 60 62 I358
15 I176
I20
MAXIMUM_NECK_LENGTH=5 MM 4.2V PP_PWR PWR PPVCC_VPROG_MB RST PMU_GPIO_CODEC_RST_L 15 57
PP1V8_S2R
C
I177
C I21
1.8V
1.8V
PP_PWR
PWR_0P3MM
PWR
PWR PP1V8_SW1
55 56 60 62
55 57 59 60 62
I359
I360 4.2V PP_PWR PWR PPVCC_VPROG_MB_F 15 I178 RST

RST
TS2PMU_RESET_IN
GPIO_BB2SOC_RESET_DET_L
47 57
5 25 29
I26
MAXIMUM_NECK_LENGTH=10 MM 4.7V PWR_1MM PWR PPVCC_MAIN_LCD_SW 53 60
I375
1.8V PWR_0P5MM PWR PP1V8_SW1_FOREHEAD 60 62

I347
RST SIMCRD_RST
I364
MIN_NECK_WIDTH=0.15 MM 4.7V PWR_1MM PWR PPVCC_MAIN_LCD_SW_CONN 53 60
I181
I30
1.8V PP_PWR PWR PP1V8_EXT_SW 57 60 62
I348
I261
RST WDOG_SOC 4 13
1.8V PWR_0P1MM PWR PP1V8_SW2 55 60 62 I381 4.7V PWR_1MM PWR PPVCC_MAIN_GRAPE_FILT RST WDOG_SOC2PMU_RESET_IN 13 57
I28 I262
1.8V PP_PWR PWR PP1V8_S2R_SW3 55 60 62 I234 5.25V PP_PWR PWR PP5V25_GRAPE_FILT RST GPIO_OSCAR_RESET_L 5 19 60
I34 I275
MAX_LINE_WIDTH=0.5 MM I231 1.8V PP_PWR PWR PP1V8_GRAPE_SW 51 52 60 61
RST ISP1_CAM_FRONT_SHUTDOWN_L 7 22
MAXIMUM_NECK_LENGTH=10 MM I182
I365 1.8V PWR_0P3MM PWR PP1V8_S2R_SW3_COMP 60 62 I232 1.8V PP_PWR PWR PP1V8_GRAPE_FILT RST ISP0_CAM_REAR_SHUTDOWN_L 7 23
I183
I367 RST ISP1_CAM_FRONT_SHUTDOWN_L_F 22 60

MAXIMUM_NECK_LENGTH=5 MM
I23
1.2V PP_PWR PWR PP1V2_S2R 55 56 60 62 I368
RST ISP0_CAM_REAR_SHUTDOWN_L_F 23 60
1.2V PWR_1MM PWR PP1V2_SW1 55 60 62 I236 3.0V PP_PWR PWR PP3V0_GYRO 19 60

I29
MAXIMUM_NECK_LENGTH=15 MM 3.0V PP_PWR PWR PP3V0_ACCEL
1.2V PP_PWR PWR PP1V2_S2R_SW2 55 60 62 I235
19 60
I267
I331 RST PMU_GPIO_PMU2BBPMU_RST_L 25 27 57 60
MIN_NECK_WIDTH=0.1 MM 3.0V PWR_0P3MM PWR PP3V0_S2R_HALL_FILT RST PMU_GPIO_PMU2BBPMU_RST_R_L 57

3.3V PWR_1MM PWR PPVDD_SRAM 55 60 62 I298 20 50 60 I332
I22
RST JTAG_AP_TRST_L
3.3V PWR_1P2MM PWR PP3V3_S2R 55 60 62
I373
I24
MAXIMUM_NECK_LENGTH=15 MM RST GPIO_BB_RST_L
3.3V PP_PWR PWR PP3V3_SW 57 60 62
I374
I35
I335
RST RST_PMU_IN
LDOS RST UD881_RST
PP3V0_SPARE1
I337 DEV
3.0V PP_PWR PWR 56 60 62
RST UD882_RST
I269
I31 1.7V PP_PWR PWR PP1V7_VA_VCP 56 60 62

I336 DEV
I36
3.0V PWR_0P3MM PWR PP3V0_S2R_SENSOR 56 60 62
I271 3.0V PWR_0P3MM PWR PP3V0_ALS 56 60 62
1.2V PWR_0P3MM PWR PP1V2_CAM_FRONT_FILT 60
I285
I345 3.0V PWR_0P4MM PWR PP3V0_UVLO 56 60 62

1.8V PP_PWR PWR PP1V8_CAM_FRONT_FILT 22 60
I244
I272 3.3V PP_PWR PWR PP3V3_ACC 56 60 62

2.9V PP_PWR PWR PP2V9_AVDD_CAM_FRONT_FILT 22 60
I240
I33 3.0V PWR_0P3MM PWR PP3V0_S2R_TRISTAR 56 60 62

3.0V PWR_0P3MM PWR PP3V0_ALS_FILT 22 60
I242
I32
3.0V PWR_0P3MM PWR PP3V0_S2R_HALL 56 60 62
B I37
I38
1.3V
1.0V
PP_PWR
PP_PWR
PWR
PWR
PP1V3_CAM
PP1V0_SOC
56 60 62
56 60 62 I247 2.6V PP_PWR PWR PP2V6_CAM_REAR_AF_FILT 23 60

B
I39
2.6V PP_PWR PWR PP2V6_CAM_AF 56 60 62 I246
1.28V PP_PWR PWR PP1V3_CAM_REAR_FILT 23 60
I40 2.9V PP_PWR PWR PP2V9_CAM 56 60 62 I243 1.8V PP_PWR PWR PP1V8_CAM_REAR_FILT 23 60
I274 5.25V PP_PWR PWR PP5V25_GRAPE 56 60 62 I300 1.28V PP_PWR PWR PP1V3_CAM_REAR
I245
2.8V PP_PWR PWR PP2V9_AVDD_CAM_REAR_FILT 23 60
PMU SENSE
I238
3.0V PP_PWR PWR PP3V0_COMP 24 60
INPUT/MAIN/ALWAYS 1.8V PP_PWR PWR PP1V8_COMP 24 60
I239 PMU_SENSE * * 3:1_SPACING
4.7V PWR_15MM PWR PPVCC_MAIN 47 55 56 57 58 60 62
I43
MAXIMUM_NECK_LENGTH=15 MM 3.0V PP_PWR PWR PP3V0_SENSOR_PROX_FILT 60 PMU_SENSE GND * 1.5:1_SPACING
4.7V PWR_10MM PWR PPBATT_VCC 55 60 62
I241
I59
3.0V PP_PWR PWR PP3V0_SENSOR_PROX_ADUX1049_FILT 60
6.0V PWR_2MM PWR PPVBUS_USB_DCIN 55 60 62
I388
I58
MAX_LINE_WIDTH=0.6 MM 3.0V PP_PWR PWR PPAVDD_SENSOR_PROX_ADUX1049
1.8V PWR_0P2MM PWR PP1V8_ALWAYS 56 60 62
I389 NET_TYPE
I41
3.0V PP_PWR PWR PP3V0_SENSOR_PROX_AD7149_FILT 45 60 VOLTAGE
I390 4.7V PWR_10MM PWR PPBATT_AUDIO_AMP I391 PHYSICAL SPACING
6.0V PWR_2MM PWR PPVBUS_E75_USB_CONN 48 49 60

1.1V
I254
PWR_SENSE PMU_SENSE PPVDD_CPU_SOC_SENSE 11 57 61
3.3V PP_PWR PWR PPOUT_E75_ACC_ID1_CONN 48 49 60
I290
1.1V
PMU I252
PWR_SENSE PMU_SENSE PPVDD_GPU_SOC_SENSE 11 57 61
3.3V PP_PWR PWR PPOUT_E75_ACC_ID2_CONN 48 49 60
I291
1.0V
I253
PWR_SENSE PMU_SENSE PPVDD_SOC_SOC_SENSE 10 57 61
20.4V PP_PWR PWR WLED_LX_B 56 61 3.3V PP_PWR PWR PPOUT_E75_ACC_ID1 47 48
I292
1.1V
I51 I352
PWR_SENSE PMU_SENSE PPVDD_CPU_RAIL_SENSE 11 57
20.4V PP_PWR PWR WLED_LX_A 56 61 3.3V PP_PWR PWR PPOUT_E75_ACC_ID2 47 48
I342
1.1V
I47
I351
PWR_SENSE PMU_SENSE PPVDD_GPU_RAIL_SENSE 11 57
20.4V PWR_0P5MM PWR PPLED_OUT_A 56 60 62
I343
1.0V
I49
MAX_LINE_WIDTH=0.6 MM 3.0V PP_PWR PWR PP3V0_IO_ALS_FILT PWR_SENSE PMU_SENSE PPVDD_SOC_RAIL_SENSE 10 57
I50
20.4V PWR_0P5MM PWR PPLED_OUT_B 56 60 62 I297
60 I344
1.05V MIN_NECK_WIDTH=0.053 MM
I229 20.4V PWR_PMU PWR PPLED_BACK_REG_A 53 60 I371 PWR_SENSE PMU_SENSE ADC_SMPS1_MSMC_1V05
ANLG BATT_NTC 1.8V MIN_NECK_WIDTH=0.053 MM
I230 20.4V PWR_PMU PWR PPLED_BACK_REG_B 53 60 I356
54 57 60
I372 PWR_SENSE PMU_SENSE ADC_SMPS3_MSME_1V8
I355
PP_PWR ANLG BATT_SNS 54 55
I361 PP_PWR ANLG BATT_SNS_R 55
6.0V PP_PWR PWR PP6V0_LCM_VBOOST 56 60
A I54
I55 6.0V PWR_0P2MM PWR PPVBUS_PROT 47 55 60
I57 6.0V PP_PWR PWR PMU_VCENTER 55 60
I53 6.0V PP_PWR PWR PP6V0_LCM_HI 56 61
I52
20.4V PP_PWR PWR LCM_LX 56
I60 4.7V PP_PWR PWR SW_CHGA 55 61
I56
6.0V PWR_0P2MM PWR USB_VBUS_DETECT 4 55
I289 6.0V PWR_0P2MM PWR USB_VBUS_DETECT_R 4
I256 6.0V PWR PMU_GPIO_BB_VBUS_DET 25 28 57 61
8 7 6 5 4 3
1
RF NET_TYPE
NET_TYPE NET_TYPE PHYSICAL SPACING

PHYSICAL SPACING PHYSICAL SPACING
I107
RF_DIFF RF_DIFF RF_60 TX_BB_Q_P 29 30
RF_50S * 50_OHM_RF 100_RF * * 100_RF_CLEAR_SPACING
RF_50S 50_RF_CLEAR 50_B1_TX_PAD_IN 34
RF_60 WTR_GP_DATA0 29 30 I109 RF_DIFF RF_DIFF RF_60 TX_BB_Q_N 29 30
I89 I272
50_RF * * 50_RF_SPACING RF_50S 50_RF_CLEAR 50_B4_TX_PAD_IN 34

RF_60 WTR_GP_DATA1 29 30 I108 RF_DIFF RF_DIFF RF_60 DRX_BB_Q_P 29 30
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET I87 I273
RF_50S 50_RF_CLEAR 50_B1_B4_DPLX_ANT 34

RF_60 BB_ERROR_FLAG 25 29 I110
RF_DIFF RF_DIFF RF_60 DRX_BB_Q_N 29 30
50_RF_CLEAR * * 50_RF_CLEAR_SPACING I88 I274

RF_100D * 100_OHM_RF RF_50S 50_RF_CLEAR 50_B1_B4_ANT 34 40
RF_60 PA_ON_B1_B4 29 34 I112 RF_DIFF RF_DIFF RF_60 GPS_BB_Q_P 29 30
I86 I276
RF_60 * * 1.2:1_SPACING RF_50S 50_RF_CLEAR 50_B1_B4_ANT_PHASESHIFT 34
RF_60 PA_ON_B2_B3 29 35 I111 RF_DIFF RF_DIFF RF_60 GPS_BB_Q_N 29 30
I226 I275
RF_60 PA_ON_B5_B8 29 37 I113
RF_DIFF RF_DIFF RF_60 PRX_BB_Q_P 29 30
I277
RF_60 PA_ON_B7_B20 29 36 I114 RF_DIFF RF_DIFF RF_60 PRX_BB_Q_N 29 30
I278
RF_50S 50_RF_CLEAR 50_B2_TX_PAD_IN RF_60 RF_DIFF RF_DIFF RF_60 DRX_BB_I_P
I85 35
I279 PA_ON_B13_B17 29 38 I115 29 30
RF_50S 50_RF_CLEAR 50_B3_TX_PAD_IN DRX_BB_I_N
D VOLTAGE PHYSICAL
NET_TYPE
SPACING
I94
I91
RF_50S 50_RF_CLEAR 50_B2_DUPLX_RX
35
32 35
I280
I285
RF_60
RF_60
PA_BS
LAT_SW1_CTL
29 34 35 36
37 38
25 29
I116
I117
RF_DIFF
RF_DIFF
RF_DIFF
RF_DIFF
RF_60
RF_60 GPS_BB_I_P
29 30
29 30
D
RF_50S 50_RF_CLEAR 50_B3_DUPLX_RX RF_60 RF_DIFF RF_DIFF RF_60 GPS_BB_I_N
4.7V MAX_LINE_WIDTH=1 MM I90
32 35
I286 PS_HOLD 27 29 I118
29 30
PWR_RF PWR_RF PP_BATT_VCC_2G_FEM 40 RF_50S 50_RF_CLEAR 50_B2_DPLX_ANT RF_60 RF_DIFF RF_DIFF RF_60 PRX_BB_I_P
I3
3.8V MAX_LINE_WIDTH=1 MM I92 35
I284
WTR_RF_ON 25 29 30 I119 29 30
PWR_RF PWR_RF PP_PA 34 35 36 37 38 39 40 RF_50S 50_RF_CLEAR 50_B3_DPLX_ANT RF_60 RF_DIFF RF_DIFF RF_60 PRX_BB_I_N
I4
I93 35
I283 WTR_RX_ON 25 29 30 I120 29 30
MIN_NECK_WIDTH=0.06 MM RF_50S 50_RF_CLEAR 50_B2_ANT RF_60 RF_DIFF RF_DIFF RF_60 TX_BB_I_P
1.8V MAX_LINE_WIDTH=1 MM I100
35 40
I282
DCDC_MODE 29 39 I122
29 30
PWR_0P1MM PWR_RF PP_LVS1 26 28 RF_50S 50_RF_CLEAR 50_B3_ANT RF_60 RF_DIFF RF_DIFF RF_60 TX_BB_I_N
I7
I96 35 40
I281 DCDC_ENABLE I121 29 30
RF_50S 50_RF_CLEAR 50_B2_RX_BALUN RF_60
I293
DRX_ASM_V1 29 41
PWR_RF PWR_RF PP_RF1_1V3_DRX_FE 31 RF_50S 50_RF_CLEAR 50_B3_RX_BALUN RF_60
I5
4.7V UNDEFINED MAX_LINE_WIDTH=1 MM I73

32
I294
DRX_ASM_V2 29 41
RF_DIFF RF_100D 100_RF 100_XCVR_B13_B17_B20_PRX_P 30 33
PWR_RF PWR_RF PP_VREG 26 RF_50S 50_RF_CLEAR 50_B2_ANT_PHASESHIFT RF_60
I169
I6
I292
DRX_ASM_V3 29 41
RF_DIFF RF_100D 100_RF 100_XCVR_B13_B17_B20_PRX_N 30 33
PWR_RF PWR_RF PP_RF2_2V05_DRX_BB 31 RF_50S 50_RF_CLEAR 50_B3_ANT_PHASESHIFT RF_60
I170
I8
I291
DRX_ASM_V4 29 41
RF_DIFF RF_100D 100_RF 100_XCVR_B8_PRX_P
PWR_RF PWR_RF PP_BATT_VCC_PA_DCDC RF_60
I171 30 32
I9
MIN_NECK_WIDTH=0.06 MM I290
19P2M_CLK_EN 27 28
RF_DIFF RF_100D 100_RF 100_XCVR_B8_PRX_N 30 32
1.8V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR RF_60
I172
I10 PWR_0P1MM PWR_RF PP_LDO1 26 60 I98

50_B20_TX_PAD_IN 36 I289
PMIC_RESOUT_L 25 27 28
RF_DIFF RF_100D 100_RF 100_XCVR_B5_B18_PRX_P 30 32
1.8V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR RF_60
I173
I11 PWR_0P1MM PWR_RF PP_LDO2_XO_HS_1V8 26 28 I97

50_B20_DPLX_ANT 36 I288 PMIC_SSBI 25 27 28
RF_DIFF RF_100D 100_RF 100_XCVR_B5_B18_PRX_N 30 32
1.8V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR
I174
I12
PWR_0P1MM PWR_RF PP_LDO3_AMUX_1V8 26 27 28 I99
50_B20_ANT 36 40
3.3V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR
I175
I13 PWR_0P25MM PWR_RF PP_LDO4_VDDA_3V3 26 28 I229

50_B20_ANT_PHASESHIFT RF_DIFF RF_100D 100_RF 100_XCVR_B2_B25_PRX_N 30 32
2.5V MAX_LINE_WIDTH=1 MM RF_DIFF RF_100D 100_RF 100_XCVR_B3_PRX_P

PWR_0P1MM PWR_RF PP_LDO5_GPS_LNA_2V5 26 42
RF_50S 50_RF_CLEAR
I177 30 32
I14
50_B5_TX_PAD_IN 37
MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR 50_B8_TX_PAD_IN
1.8V PWR_0P3MM PWR_RF PP_LDO6_RUIM_1V8 26 28 44 60
I101 37
I178 RF_DIFF RF_100D 100_RF 100_XCVR_DCS_PCS_PRX_P
I15
MIN_NECK_WIDTH=0.15 MM RF_50S 50_RF_CLEAR 50_B5_DPLX_ANT
MAX_LINE_WIDTH=1 MM
I104
37
I181 RF_DIFF RF_100D 100_RF 100_XCVR_DCS_PCS_PRX_N
1.8V PWR_0P3MM PWR_RF PP_LDO6_RUIM_1V8_FILT RF_50S 50_RF_CLEAR 50_B8_DPLX_ANT
I269 44 I103 37
I182
RF_50S 50_RF_CLEAR 50_B5_ANT
1.8V MAX_LINE_WIDTH=1 MM I105 37 40
RF_DIFF RF_100D 100_RF 100_XCVR_B1_B4_PRX_N 30 32
PWR_0P25MM PWR_RF PP_LDO7_DAC_1V8 26 28 RF_50S 50_RF_CLEAR 50_B8_ANT
I180
I17
37 40
I184 RF_DIFF RF_100D 100_RF 100_XCVR_B8_B20_DRX_P 30 41
1.2V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR 50_B5_ANT_PHASESHIFT
I18 PWR_0P3MM PWR_RF PP_LDO8_VDDPX_1V2 26 28 I230
I183 RF_DIFF RF_100D 100_RF 100_XCVR_B8_B20_DRX_N 30 41
1.05V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR 50_B8_ANT_PHASESHIFT
I19 PWR_0P75MM PWR_RF PP_LDO9_PLL_1V05 26 28 I231 37
I185 RF_DIFF RF_100D 100_RF 100_XCVR_B5_B18_B13_B17_DRX_P 30 41
1.05V MAX_LINE_WIDTH=1 MM
I16
PWR_0P75MM PWR_RF PP_LDO10_ADSP_1V05 26 28 I187
RF_DIFF RF_100D 100_RF 100_XCVR_B5_B18_B13_B17_DRX_N 30 41
1.05V MAX_LINE_WIDTH=1 MM RF_50S 50_RF_CLEAR 50_B7_ANT

PWR_0P75MM PWR_RF PP_LDO11_MDSP_FW_1V05 36 40
RF_DIFF RF_100D 100_RF 100_XCVR_B2_B25_B3_DRX_P 30 41
C
26 28 I253
C I20
I24
1.05V
2.95V
MAX_LINE_WIDTH=1 MM
PWR_0P75MM
MAX_LINE_WIDTH=1 MM
PWR_RF PP_LDO12_MDSP_SW_1V05 26 28 I254
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_B7_BALUN_IN_RX
50_B7_DPLX_ANT
I186
I189 RF_DIFF RF_100D 100_RF 100_XCVR_B2_B25_B3_DRX_N 30 41

I23
PWR_0P1MM PWR_RF PP_LDO13_VDDPX_2V95 26 28 I255 36
I190
RF_DIFF RF_100D 100_RF 100_XCVR_B1_B4_DRX_P 30 41
MAXIMUM_NECK_LENGTH=4 MM RF_50S 50_RF_CLEAR 50_B7_DUPLX_RX
MAX_LINE_WIDTH=1 MM
I256 32 36
I188 RF_DIFF RF_100D 100_RF 100_XCVR_B1_B4_DRX_N 30 41
2.65V PWR_0P1MM PWR_RF PP_LDO14_2V65 RF_50S 50_RF_CLEAR 50_B7_TX_PAD_IN
I22
26 33 40 41 I257
36
I192 RF_DIFF RF_100D 100_RF 100_XCVR_GPS_RX_P 30 41
RF_50S 50_RF_CLEAR 50_B7_TX_SAW_IN
MAX_LINE_WIDTH=1 MM
I258 36
I191
RF_DIFF RF_100D 100_RF 100_XCVR_GPS_RX_N 30 41
1.05V PWR_RF PWR_RF PP_VSW_S1 RF_50S 50_RF_CLEAR 50_B7_TX_SAW_OUT
I26
MAX_LINE_WIDTH=1 MM
26 I259 36
I195 RF_DIFF RF_100D 100_RF 100_B13_DUPLX_RX_P 33 38
1.05V PWR_0P75MM PWR_RF PP_SMPS1_MSMC_1V05 RF_50S 50_RF_CLEAR
I27
MAX_LINE_WIDTH=1 MM
26 28 60
I262
50_XCVR_B7_TX 30 36 I193 RF_DIFF RF_100D 100_RF 100_B13_DUPLX_RX_N 33 38
1.3V PWR_RF PWR_RF PP_VSW_S2 RF_50S 50_RF_CLEAR
I25
MAX_LINE_WIDTH=1 MM
26
I123
50_B13_TX_PAD_IN 38 I194 RF_DIFF RF_100D 100_RF 100_B17_DUPLX_RX_P 33 38
1.3V PWR_RF PWR_RF PP_SMPS2_RF1_1V3 RF_50S 50_RF_CLEAR
I29
MAX_LINE_WIDTH=1 MM
26 28 31 60
I124
50_B17_TX_PAD_IN 38 I197 RF_DIFF RF_100D 100_RF 100_B17_DUPLX_RX_N 33 38
I28
MAX_LINE_WIDTH=1 MM
26
I126
50_B13_DPLX_ANT 38 I196
RF_DIFF RF_100D 100_RF 100_B20_DUPLX_RX_P 33 36
1.8V PWR_RF PWR_RF PP_RF1_1V8_DIG RF_50S 50_RF_CLEAR
I30
MAX_LINE_WIDTH=1 MM
31
I125
50_B17_DPLX_ANT 38 I199 RF_DIFF RF_100D 100_RF 100_B20_DUPLX_RX_N 33 36
1.8V PWR_RF PWR_RF PP_SMPS3_MSME_1V8_FILT RF_50S 50_RF_CLEAR
I218
MAX_LINE_WIDTH=1 MM
29
I127
50_B13_LPF_IN 38 I198 RF_DIFF RF_100D 100_RF 100_DCS_PCS_RX_FILTER_P
I32
MAX_LINE_WIDTH=1 MM
26
I130
50_B13_ANT 38 40 I200
RF_DIFF RF_100D 100_RF 100_DCS_PCS_RX_FILTER_N
2.05V PWR_RF PWR_RF PP_SMPS4_RF2_2V05 RF_50S 50_RF_CLEAR
I31
MAX_LINE_WIDTH=1 MM
26 31 60
I128
50_B17_ANT 38 40 I205 RF_DIFF RF_100D 100_RF 100_B1_B4_DUPLX_RX_P 32 34
I33
MAX_LINE_WIDTH=1 MM
26
I232
50_B13_ANT_PHASESHIFT I206 RF_DIFF RF_100D 100_RF 100_B1_B4_DUPLX_RX_N 32 34
1.05V PWR_RF PWR_RF PP_SMPS5_DSP_1V05 RF_50S 50_RF_CLEAR
I34 26 60
I233
50_B17_ANT_PHASESHIFT 38 I207
RF_DIFF RF_100D 100_RF 100_B8_DUPLX_RX_P 32 37
4.7V MAX_LINE_WIDTH=1 MM RF_DIFF RF_100D 100_RF 100_B8_DUPLX_RX_N

PWR_RF PWR_RF PP_BATT_VCC_PA_DCDC_IN2 RF_50S 50_RF_CLEAR
I210 32 37
I234
I135
50_XCVR_2G_LB_TX_MATCH RF_DIFF RF_100D 100_RF 100_B5_B18_DUPLX_RX_P 32 37
I211
RF_50S 50_RF_CLEAR 50_XCVR_2G_HB_TX_MATCH
I134 40
I209 RF_DIFF RF_100D 100_RF 100_B5_B18_DUPLX_RX_N 32 37
RF_50S 50_RF_CLEAR 50_2G_LB_PA_IN
NET_TYPE I132 40
I265 RF_DIFF RF_100D 100_RF 100_B7_PRX_BALUN_OUT_P 32
RF_50S 50_RF_CLEAR 50_2G_HB_PA_IN
PHYSICAL SPACING I133
40
I264
RF_DIFF RF_100D 100_RF 100_B7_PRX_BALUN_OUT_N 32
RF_DIFF RF_100D 100_RF 100_B7_PRX_MATCH_P 32

45_OHM_SE RF_60 50_HSIC_CAL 28
I263
I201
RF_50S 50_RF_CLEAR 50_PRI_ANT_ASM 40 I267 RF_DIFF RF_100D 100_RF 100_B7_PRX_MATCH_N 32
I225
I268
RF_DIFF RF_100D 100_RF 100_XCVR_B7_PRX_P 30 32

I53
RF_50S 50_RF_CLEAR 50_XCVR_B13_B17_B20_TX 30 33 RF_50S 50_RF_CLEAR 50_DRX_ANT_TEST 41 43
I266
I149
50_XCVR_2G_LB_TX
B I55
I56
RF_50S
RF_50S
50_RF
50_RF_CLEAR 50_XCVR_B8_TX
30 40
30 33
I221
I222
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_DRX_ANT_PHASESHIFT
50_DRX_ANT_FEED
43
43
B
I57 RF_50S 50_RF_CLEAR 50_XCVR_B5_B18_TX 30 33
RF_50S 50_RF 50_XCVR_2G_HB_TX 30 40

RF_50S 50_RF_CLEAR 50_COUPLER_TERM
I60 I157

RF_50S 50_RF_CLEAR 50_DIVERSITY_SWITCH_MATCH
I59 RF_50S 50_RF_CLEAR 50_XCVR_B1_TX 30 32 I156 41
RF_CLK SLEEP_CLK_32K 25 27 28
RF_50S 50_RF_CLEAR 50_GPS_LNA_OUT I250
I62
RF_50S 50_RF 50_PDET_IN 30 I159
41 42
RF_CLK 19P2M_WTR 27 30
I252
I66 RF_50S 50_RF_CLEAR 50_PDET_PAD_OUT 30

RF_CLK 19P2M_MDM 25 27 28
RF_50S 50_RF_CLEAR 50_GPS_ANT_COAX I251
I67 RF_50S 50_RF_CLEAR 50_PDET_PAD_IN 30 40 I158

42
RF_50S 50_RF_CLEAR 50_GPS_ANT_MATCH
I160
RF_50S 50_RF_CLEAR 50_GPS_ANT_TEST

I65 RF_50S 50_RF_CLEAR 50_B1_TX_SAW_IN 32 33 I162 TABLE_SPACING_RULE_HEAD TABLE_SPACING_ASSIGNMENT_HEAD
RF_50S 50_RF_CLEAR 50_GPS_LNA_IN SPACING_RULE_SET LAYER LINE-TO-LINE SPACING WEIGHT NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET
I64 RF_50S 50_RF_CLEAR 50_B3_B4_TX_SAW_IN 32 33 I220
42
TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
I63 RF_50S 50_RF_CLEAR 50_B2_B25_TX_SAW_IN 32 33 50_RF_SPACING TOP,BOTTOM 0.178 MM ? GND 50_RF * 50_RF_CLEAR_SPACING
RF_50S 50_RF_CLEAR 50_PRI-ANT_COUPLER TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
I260
RF_50S 50_RF_CLEAR 50_PRI-ANT_PHASE 50_RF_SPACING ISL3 0.130 MM ? GND 50_RF_CLEAR * 50_RF_CLEAR_SPACING
I261
RF_50S 50_RF_CLEAR 50_PRI_ANT_TEST 50_RF_SPACING * 0.092 MM ? GND 100_RF * 100_RF_CLEAR_SPACING

I219
RF_50S 50_RF_CLEAR 50_PRI_ANT_TEST_IN TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
I223
RF_50S 50_RF_CLEAR 50_RF_CLEAR_SPACING TOP,BOTTOM 0.178 MM ? GND RF_60 * 1.2:1_SPACING
I224
50_PRI_ANT_COAX 40 43
RF_50S 50_RF_CLEAR 50_ANT2_TERM 50_RF_CLEAR_SPACING ISL3 0.130 MM ? GND PWR_RF * 1.2:1_SPACING

I235
RF_50S 50_RF_CLEAR 50_B1_TX_SAW_OUT 33 34
RF_50S 50_RF_CLEAR 50_DRX_ANT_TERM TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
I74 I236
50_RF_CLEAR_SPACING * 0.138 MM ? PWR_RF PWR_RF * 1.2:1_SPACING
I72
RF_50S 50_RF_CLEAR 50_B2_TX_SAW_OUT 33 35
I71 RF_50S 50_RF_CLEAR 50_B3_TX_SAW_OUT 33 35 100_RF_CLEAR_SPACING TOP,BOTTOM 0.143 MM ? RF_CLK * * 3:1_SPACING

I75 RF_50S 50_RF_CLEAR 50_B4_TX_SAW_OUT 33 34
50_B5_TX_SAW_OUT 100_RF_CLEAR_SPACING * 0.118 MM ? RF_CLK GND * 1.2:1_SPACING

I78 RF_50S 50_RF_CLEAR 33 37 RF_60 2G_FEM_S0 29 40
I237
I79 RF_50S 50_RF_CLEAR 50_B8_TX_SAW_OUT 33 37 RF_60 2G_FEM_S1 25 29 40

I238
A I77
I76
RF_50S
RF_50S
50_RF_CLEAR
50_RF_CLEAR
50_B13_TX_SAW_OUT
50_B17_TX_SAW_OUT
33 38
33 38
I239
RF_60
RF_60
2G_FEM_S2
2G_FEM_S3
29 33 40
29 33 40
RF_50S 50_RF_CLEAR 50_B20_TX_SAW_OUT
I240
RF_60
NC_PMU_OUT_32K_CLK_GPS PMU_OUT_32K_CLK_GPS IN 57
I84 33 36
I241
2G_FEM_S4 25 29 40 NO_TEST=TRUE 64
MAKE_BASE=TRUE
RF_60 2G_FEM_S5 29 40
I242
RF_50S 50_RF_CLEAR 50_PCS_RX RF_60 2G_FEM_S6 29 40

I81 I243
RF_50S 50_RF 50_PCS_RX_MATCH RF_60 BB_PDM 29 39

I80 I244
RF_50S 50_RF_CLEAR 50_DCS_RX RF_60 BB_PDM_FILT 39

I82 I245
RF_50S 50_RF_CLEAR 50_DCS_RX_MATCH RF_60 DCDC_ADJ 39

I83 I246
RF_60 PA_R1 29 34 35 36 37 38
I247
8 7 6 5 4 3 2 1
1
RF

WIFI_50S * 50_OHM_RF

WIFI * * 4:1_SPACING
D D
NET_TYPE
PHYSICAL SPACING
I2
WIFI_50S WIFI RF_G_0_MATCH_MOD 46
I52 WIFI_50S WIFI RF_G_0_MATCH_ANT

I53 WIFI_50S WIFI RF_G_0_BAW_MOD 46
I54
WIFI_50S WIFI RF_G_0_BAW_ANT 46
I1 WIFI_50S WIFI RF_G_0_DIPLEXER 46
I42 WIFI_50S WIFI RF_A_0_MATCH 46
I43 WIFI_50S WIFI RF_A_0_DIPLEXER 46
I44 WIFI_50S WIFI RF_G_1_MATCH_MOD 46
I55
WIFI_50S WIFI RF_G_1_MATCH_ANT
I56 WIFI_50S WIFI RF_G_1_BAW_MOD
I57 WIFI_50S WIFI RF_G_1_BAW_ANT
I45
WIFI_50S WIFI RF_G_1_DIPLEXER 46
I46 WIFI_50S WIFI RF_A_1_MATCH 46
I47 WIFI_50S WIFI RF_A_1_DIPLEXER 46
I48 WIFI_50S WIFI RF_0_ANT_MATCH_T 46
I50 WIFI_50S WIFI RF_0_ANT 46
I51
WIFI_50S WIFI RF_1_ANT_MATCH_T 46
I49 WIFI_50S WIFI RF_1_ANT 46
C C
B B
8 7 6 5 4 3

Ipad Air Schematic

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Ipad Air Schematic

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Edited by Foxit Reader ActiveX For Evaluation Only.

Copyright(C) 2006-2009 Foxit Corporation

ISP1_I2C FRONT CAMERA

BUTTON FLEX PMU BATTERY

1MA VDD_ANA_PLL_CCC AD22

5.4MA USB_DVDD F25

64 61 46 HSIC1_WLAN_DATA A27 HSIC1_DATA OMIT_TABLE WDOG AC3 WDOG_SOC 13 67

64 60 47 OUT JTAG_SOC_TMS D27 JTAG_TMS 1%

60 13 SOC_TESTMODE AC2 TESTMODE

13 SOC_HOLD_RESET D29 HOLD_RESET

CKEIN IS 1.2V, 1.8V TOL

I2S0 AND I2S2 ARE OPTIMIZED FOR LOW MCK JITTER

TMR32_PWM0 AD35 OSCAR_TIME_SYNC_HOST_INT 19

NC_GPIO11 NO_TEST=TRUE AF2 GPIO11

NC_I2S2_MCK F26 I2S2_MCK DWI_DI AT16 SOC_TST_CPUSWITCH_OUT TP0700

SEP_7816UART1_RST AM1 NC_SEP_7816UART1_RST NO_TEST=TRUE GPIO_BOOT_CONFIG_0 AG3 AH5 NC_GPIO_UART2_RTSN NO_TEST=TRUE

I2S4_SOC2BT_LRCK AE35 AA33 HSIC2_SOC2BB_HOST_RDY 60 59 5 IN GPIO_FORCE_DFU AT14 GPIO26

64 61 60 52 SPI2_GRAPE_MISO AN8 SPI2_MISO

64 15 SPI3_CODEC_MISO AN13 SPI3_MISO

SEP EEPROM I2C PULL-UPS

66 61 60 14 OUT FMI0_CE0_L E34 PPN0_CEN0 U0600 PPN1_CEN0 J36 FMI1_CE0_L OUT 14 61 66

NC_FMI0_CE1_L NO_TEST=TRUE C35 PPN0_CEN1 ALCATRAZ PPN1_CEN1 J34 NO_TEST=TRUE NC_FMI1_CE1_L

66 61 14 BI FMI0_AD<1> A33 PPN0_IO1 PPN1_IO1 G35 FMI1_AD<1> BI 14 66

66 61 14 BI FMI0_AD<2> B33 PPN0_IO2 PPN1_IO2 G34 FMI1_AD<2> BI 14 66

66 61 14 BI FMI0_AD<3> E32 PPN0_IO3 PPN1_IO3 J32 FMI1_AD<3> BI 14 66

66 61 14 BI FMI0_AD<4> C32 PPN0_IO4 PPN1_IO4 G33 FMI1_AD<4> BI 14 66

66 61 14 FMI0_AD<5> E33 PPN0_IO5 PPN1_IO5 E36 FMI1_AD<5> 14 66

66 61 14 BI FMI0_AD<7> D36 PPN0_IO7 PPN1_IO7 G32 FMI1_AD<7> BI 14 66

66 61 14 FMI0_ALE C31 PPN0_ALE PPN1_ALE H36 FMI1_ALE 14 61 66

66 61 14 BI FMI0_DQS B34 PPN0_DQS PPN1_DQS F36 FMI1_DQS BI 14 61 66

FMI0_ZQ C33 PPN0_ZQ PPN1_ZQ F34 FMI1_ZQ

65 NC_MIPI0C_CAM_REAR_DATA_P<2> AR30 MIPI0C_DPDATA2 ISP1_SDA AN10 ISP1_CAM_FRONT_SDA 22 64

65 61 23 IN MIPI0C_CAM_REAR_CLK_N AT31 MIPI0C_DNCLK

65 NC_MIPI0D_DPDATA0 AN33 MIPI0D_DPDATA0 DP_PAD_TX0P B21 EDP_DATA_P<0> 53 61 65

65 NC_MIPI0D_DPDATA1 AN32 MIPI0D_DPDATA1 DP_PAD_TX1P B22 EDP_DATA_P<1> OUT 53 61 65

DP_PAD_TX2P B23 EDP_DATA_P<2>

MIPI1C_DNCLK AM36 MIPI1C_CAM_FRONT_CLK_N IN 22 61 65

66 61 12 OUT DDR0_CA<2> AT27 DDR0_CA2 DDR1_CA2 L36 DDR1_CA<2> OUT 12 61 66

66 61 12 OUT DDR0_CA<3> AR26 DDR0_CA3 DDR1_CA3 M35 DDR1_CA<3> OUT 12 61 66

66 61 12 DDR0_CA<4> AT26 DDR0_CA4 DDR1_CA4 M36 DDR1_CA<4> 12 61 66

66 61 12 OUT DDR0_CA<6> AT20 DDR0_CA6 DDR1_CA6 V36 DDR1_CA<6> OUT 12 61 66

66 61 12 OUT DDR0_CA<7> AT19 DDR0_CA7 DDR1_CA7 W36 DDR1_CA<7> OUT 12 61 66

66 61 12 OUT DDR0_CA<8> AR19 DDR0_CA8 DDR1_CA8 W35 DDR1_CA<8> OUT 12 61 66

66 61 12 OUT DDR0_CA<9> AP19 DDR0_CA9 DDR1_CA9 W34 DDR1_CA<9> OUT 12 61 66

66 61 12 OUT DDR0_CKE<0> AR24 DDR0_CKE0 DDR1_CKE0 P35 DDR1_CKE<0> OUT 12 61 66

66 61 12 OUT DDR0_CKE<1> AT24 DDR0_CKE1 DDR1_CKE1 P36 DDR1_CKE<1> OUT 12 61 66

66 61 12 OUT DDR0_CSN<0> AR25 DDR0_CSN0 DDR1_CSN0 N35 DDR1_CSN<0> OUT 12 61 66

66 61 12 OUT DDR0_CSN<1> AT25 DDR0_CSN1 DDR1_CSN1 N36 DDR1_CSN<1> OUT 12 61 66

66 61 12 OUT DDR0_DM<0> D11 DDR0_DM0 DDR1_DM0 P4 DDR1_DM<0> OUT 12 61 66

66 61 12 OUT DDR0_DM<1> D9 DDR0_DM1 DDR1_DM1 T4 DDR1_DM<1> OUT 12 61 66

66 61 12 OUT DDR0_DM<2> C15 DDR0_DM2 DDR1_DM2 K3 DDR1_DM<2> OUT 12 61 66

66 61 12 DDR0_DM<3> D7 DDR0_DM3 DDR1_DM3 V4 DDR1_DM<3> 12 61 66

66 61 12 BI DDR0_DQ<0> B15 DDR0_DQ0 DDR1_DQ0 K2 DDR1_DQ<0> BI 12 61 66

66 61 12 BI DDR0_DQ<1> D14 DDR0_DQ1 DDR1_DQ1 L4 DDR1_DQ<1> BI 12 61 66

66 61 12 BI DDR0_DQ<2> B14 DDR0_DQ2 DDR1_DQ2 L2 DDR1_DQ<2> BI 12 61 66

DDR0_DQ<3> D13 DDR0_DQ3 DDR1_DQ3 M4 DDR1_DQ<3>

66 61 12 BI DDR0_DQ<4> B13 DDR0_DQ4 DDR1_DQ4 M2 DDR1_DQ<4> BI 12 61 66

DDR0_DQ<5> D12 N4 DDR1_DQ<5>

01005 MF 01005 2 01005 66 61 12 DDR0_DQ<9> B11 DDR0_DQ9 DDR1_DQ9 P2 DDR1_DQ<9> 12 61 66

66 61 12 BI DDR0_DQ<17> B18 DDR0_DQ17 DDR1_DQ17 G2 DDR1_DQ<17> BI 12 61 66

66 61 12 BI DDR0_DQ<18> D17 DDR0_DQ18 DDR1_DQ18 H4 DDR1_DQ<18> BI 12 61 66

66 61 12 BI DDR0_DQ<19> B17 DDR0_DQ19 DDR1_DQ19 H2 DDR1_DQ<19> BI 12 61 66

66 61 12 BI DDR0_DQ<20> D16 DDR0_DQ20 DDR1_DQ20 J4 DDR1_DQ<20> BI 12 61 66