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TRKA-10D815R

Power Systems Controller Functional Description


And Command Interface Documentation
Contents
1. Revision History ..................................................................................................................................................................4
2. Code Compliance.................................................................................................................................................................5
3. Introduction..........................................................................................................................................................................6
4. Reporting Data and Receiving Data.....................................................................................................................................7
5. Addressing ...........................................................................................................................................................................8
6. Communication Protocol .....................................................................................................................................................9
7. Page Mode .........................................................................................................................................................................10
8. Command Hierarchy..........................................................................................................................................................11
9. Command Listing ..............................................................................................................................................................12
Page Command: 0x00...........................................................................................................................................................12
Operation Command: 0x01...................................................................................................................................................12
ON/OFF Configuration Command: 0x02 .............................................................................................................................13
Clear Faults: 0x03.................................................................................................................................................................14
PMBus Pointer Command: 0x04 ..........................................................................................................................................14
Running Time Read Command: 0x05 ..................................................................................................................................14
Get Logging Data Command: 0x06......................................................................................................................................14
Upgrading selection command: 0x07 ....................................................................................................................................14
Firmware Download command: 0x08 ...................................................................................................................................15
Firmware Upgrade command: 0x09 ......................................................................................................................................15
Restore All Defaults: 0x12 ....................................................................................................................................................15
Store User Data: 0x15............................................................................................................................................................15
Restore User Data: 0x16 ........................................................................................................................................................15
Vout Mode Command: 0x20 ................................................................................................................................................16
Vout Command: 0x21...........................................................................................................................................................16
Vout Max: 0x24....................................................................................................................................................................16
Vout Margin High: 0x25.......................................................................................................................................................16
Vout Margin Low: 0x26 .......................................................................................................................................................16
Read Back Trim Logic Command: 0x2F..............................................................................................................................16
Vout OV Fault Limit: 0x40 ..................................................................................................................................................17
Vout OV Warn Limit: 0x42..................................................................................................................................................17
Vout UV Warn Limit: 0x43..................................................................................................................................................17
Vout UV Fault Limit: 0x44 ..................................................................................................................................................18
Vin OV Fault Limit: 0x55 ....................................................................................................................................................18
Vin OV Warn Limit: 0x57....................................................................................................................................................18
Vin UV Fault Limit: 0x59 and 0xBA ...................................................................................................................................18
Read Back POL Fault Flags: 0x68.........................................................................................................................................18
Read Back Analog Fault Flags: 0x69 ....................................................................................................................................19
Read Back Thermal Conditions: 0x79 ...................................................................................................................................19
Read Back Working Status: 0x7F..........................................................................................................................................20
Read Vin Command: 0x88 ...................................................................................................................................................21
Read Vout Command: 0x8B.................................................................................................................................................21
Get Revision Command: 0xB0 ..............................................................................................................................................21
Get Date Code: 0xB1.............................................................................................................................................................21
Get Manufacturer PN Code: 0xB2.........................................................................................................................................21
Get Identified Board: 0xB3....................................................................................................................................................21
Get Check Sum: 0xB4 ...........................................................................................................................................................22
Get Configuration Data Saved Counter: 0xB5.......................................................................................................................22
Thermal Trip Command: 0xC0.............................................................................................................................................22
VR HOT Command: 0xC1 ...................................................................................................................................................22
Thermal Trip Delay: 0xCD...................................................................................................................................................22
VR_HOT Delay: 0xCE.........................................................................................................................................................22
IO_PIF_ENA Delay: 0xCF...................................................................................................................................................23
Initial PWM Value Command: 0xE0....................................................................................................................................23
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Vout_ADC_Full_Scale Command: 0xE9..............................................................................................................................23
Vin_ADC_Full_Scale Command: 0xEA ...............................................................................................................................23
ADC_Reference Command: 0xEB ........................................................................................................................................24
Vout OV Power Good Limit: 0xEC......................................................................................................................................24
Vout UV Power Good Limit: 0xED .....................................................................................................................................24
Reboot Command: 0xEF .......................................................................................................................................................24
Reset In Command / Warning Output Command: 0xF6........................................................................................................24
Open Drain Select Command: 0xF7 .....................................................................................................................................25
Output Logic Select Command: 0xF8 ..................................................................................................................................26
Input Logic Select Command: 0xF9 .....................................................................................................................................26
Condition Response Command: 0xFA .................................................................................................................................27
Get Thermal Flags: 0xFB ......................................................................................................................................................28
Get Input Pin Flags: 0xFC .....................................................................................................................................................28
Get Output Pin Flags: 0xFD ..................................................................................................................................................28
Setting up Reset Signals: 0xDC thru 0xDE and 0xF3 thru 0xF5...........................................................................................30
Setting up Power Good and Warning: 0xD9 thru 0xDA and 0xF1 thru 0xF2 .......................................................................32
Setting up Sequencing: 0xD0 thru 0xD8, 0x0A thru 0x0F, 0xAB thru 0xAE and 0xE1 thru 0xE8, 0x19 thru 0x1F, 0x2B
thru 0x2E ...............................................................................................................................................................................33
Simple read command: 0xFF.................................................................................................................................................36
10. Boot Loader.................................................................................................................................................................37
11. Data Logging Format ..................................................................................................................................................39
Logging Data .........................................................................................................................................................................39
Logging Data Format Description .........................................................................................................................................41
Board ID ............................................................................................................................................................................41
Power down counter ..........................................................................................................................................................41
POL Fault flag bits.............................................................................................................................................................41
Analog Fault flag bits ........................................................................................................................................................42
CMD Flag Bits...................................................................................................................................................................42
CMD Flag_1 Bits...............................................................................................................................................................42
Thermal Flag Bits ..............................................................................................................................................................43
External Flag Bits ..............................................................................................................................................................43
Comparator Output Flag Bits.............................................................................................................................................44
Input Pin Flag Bits .............................................................................................................................................................44
Condition Flag Bits............................................................................................................................................................44
Condition Flag_1 Bits........................................................................................................................................................45
POL Trim Logic Flag Bits .................................................................................................................................................45
Output Pin Flag Bits 1 .......................................................................................................................................................45
Output Pin Flag Bits 2 .......................................................................................................................................................46
Command Flag Bits ...........................................................................................................................................................46
Watchdog and Reset Status................................................................................................................................................47
PMBus Command 0x01 Status ..........................................................................................................................................47
PMBus Command 0x02 Status ..........................................................................................................................................47
Bootloader Status...............................................................................................................................................................47
Input, APoL, DPoL, and Analog Voltages ........................................................................................................................48
Running Time ....................................................................................................................................................................48
Configuration Data Saved Counter ....................................................................................................................................48

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1. Revision History
Rev Description By Date
G1 Generic version (from B2) S. Moore Nov 16, 2011

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2. Code Compliance
Rev Code Compliant Since
G1 TBD

Refer to TRKA-10D815R Errata document for additional information specific to each code release.

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3. Introduction
This document describes the interface specification for the TRKA-10D815R power system controller.

Digital I/Os
Margin Up/Down, Reset In,
Power Good Out, Warning Out,
Reset Out, etc.

External Reference

Analog Vin Monitor


Voltage
Monitoring DPoL, VRM, or Other voltages to monitor

APoL Vout Monitors

Digital I/O
Control

PWM
Output
Main Active Trim
Engine Control Trim

I2C APoL Converters


1 of n Vout
Clock I2C Engine
Data

Enable

Sequence
Up/Down
Control
DPoL or VRM Enables

Power System
Controller
Figure 1.
Sequence and Margin Controller Functional Block Diagram

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4. Reporting Data and Receiving Data
With the exception of values related to output voltage the controller will use the 2 byte literal format as defined by
the PMBus system management protocol. The literal data format contains 2 bytes which include a 5 bit 2s
complement exponent and an 11 bit 2s complement mantissa. The communicated value Y is received and
reported as Y = X*2N

High Data Byte Low Data Byte

76543 21076543210
N X
MSB MSB

The controller will assume full scale equal to the applied reference and assume that the monitored signals are
connected directly to the ADC inputs with no attenuation. If the monitored signals are delivered to the device by
a resistor divider the system interface will need to scale the values accordingly.

The controller will receive output voltage parameters and report output voltage values using the PMBus linear
mode. The voltage will be in the form Voltage = V*2N. The Mantissa and exponent in this equation will be read
and reported using 3 bytes. The first byte is the VOUT_MODE byte which will always contain 000 in the 3 MSBs.
The 5 LSBs are the exponent. The other 2 bytes will contain the Mantissa.

VOUT_MODE
Data Byte High Data Byte Low Data Byte

76543210 7654321076543210
Mode N V
000

In the above format N is a 5 bit 2s complement binary integer and V is a 16 bit unsigned binary integer. All 16 bits
are reported to be compatible with the PMBus protocol. The actual resolution will be based on 10 bit analog to
digital conversions. If using a 3.0V external reference the minimum actual voltage slice will be 2.93mV with a
3.0V full scale. All reported and read parameters will be truncated based on these limitations. The controller will
assume full scale equal to the applied reference and assume that the monitored signals are connected directly to
the ADC inputs with no attenuation. If the monitored signals are delivered to the device by a resistor divider the
system interface will need to scale the values accordingly.

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5. Addressing
The CMD uses 7 bit addressing with the LSB used to define whether the traffic is requesting a write to or read
from the device. The device is interrupted upon an address match. If the LSB = 0 it is being written to. If LSB =1
it is being read from. This device is a slave with the following address convention:
(The device does not support general call.)

When the CMD is powered on it determines the type of board it is installed on. It sets its address depending on
the type of board as follows:

Address Board Name


0x24/0x25 (binary 0010 010x) All boards

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6. Communication Protocol
The protocol between Master and Slave (TRKx series) is described as follows:

Legend
<ST> Start Bit SCL=H, SDA=H->L
<RS> Repeated Start Bit
<SP> Stop Bit SCL=H, SDA=L->H
<R> Read Bit (1) SDA=H, SCL=L->H
<W> Write Bit (0) SDA=L, SCL=L->H
<M:xxx> Master communication
<S:xxx> Slave communication
<S:ACK> Slave acknowledge S:SDA=L, SCL=L->H
<M:NACK> Master not acknowledge M:SDA=H, SCL=L->H
<ADDR> 7-bit I2C address
<CMD> Command
<LSB> Low data byte
<MSB> High data byte

Command Write Operation


<M:ST><M:ADDR><M:W><S:ACK> Send write address
<M:CMD><S:ACK> Send command
<M:MSB><S:ACK> Write high data byte
<M:LSB><S:ACK> Write low data byte
<M:SP>

Command Read Operation


<M:ST><M:ADDR><M:W><S:ACK> Send write address
<M:CMD><S:ACK> Send command
<M:RS><M:ADDR><M:R><S:ACK> Send read address
<S:MSB><M:ACK> Read high data byte
<S:LSB><M:NACK> Read low data byte
<M:SP>

Commands with 2 Data Bytes:

The expected order for writing or reading the bytes is transmitting or receiving the high data byte first.

When a write command is followed by 2 data bytes is as follows:

<M:ST> <M:ADDR><M:W><S:ACK>
<M:CMD><S:ACK>
<M:MSB><S:ACK>
<M:LSB><S:ACK>
<M:SP>

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7. Page Mode
The CMD controls multiple PoL converters from one I2C address. The CMD uses page mode to set up the
operating conditions and to read the output voltage for each PoL under CMD control.

Set up and monitoring parameters that are not specific to an individual PoL converter are always available and
can be sent and received across all pages.

To set up the parameters specific to a given PoL and to receive its voltage readback the CMD page pointer has to
be set to point to the page that corresponds to the converter that is to be set up or monitored.

The page command is a single byte command with command code 0x00.

The page command can be used to write the desired page pointer to the CMD. If read from it will return the active
page pointer.

The diagram below shows how the paging is configured relative to each PoL channel supported by the CMD.

Page 0

Not Used
Hard Coded
I2C Address

Page 1-8
APoL1-8
Set Point Control
Scaling
Margin Limits
I2C Engine PGD/Warning Limits
Voltage Reads

&
I2C Bus
Page Page 9-27
Switch DPoL1-19
Scaling
PGD/Warning Limits
Voltage Reads

Page 28-29
Analog x-y
Scaling
PGD/Warning Limits
Voltage Reads

Page Assignment

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8. Command Hierarchy
Both the enable and the margin commands could be in conflict with their corresponding hardware signals. B1:0 of
the operation command (0x01) are used to resolve these conflicts. The state of these bits will determine if these
signals are under hardware control or command control. The default setting is hardware control. If command
control is desired for either of these signals the correct settings for these bits needs to be sent to the sequencer
via the operation command.

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9. Command Listing
Page Command: 0x00
Not page specific.
Writes or reads a single byte. This data byte is an unsigned binary integer.
If write it sets the page pointer. When page pointer is great than 29, page pointer will be set to 29.
If read it returns the active page pointer.

Operation Command: 0x01


Not page specific.
Writes or reads a single byte.
If write it commands turn on/off and margin control.
If read it returns current command status.

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 On State Margin State
0 0 x x x x x 1 Immediate Off No Sequencing N/A
0 1 x x x x x 1 Turn Off in Reverse Sequence N/A
Turn Off in Reverse Sequence then
0 1 1 1 0 0 0 1 N/A
Restore User Data
1 0 0 0 x x x 1 On Sequenced Start Up Off
1 0 0 1 0 1 1 x On Sequenced Start Up Margin Low Fault Detect Off
1 0 0 1 1 0 1 x On Sequenced Start Up Margin Low Fault Detect On
1 0 1 0 0 1 1 x On Sequenced Start Up Margin High Fault Detect Off
1 0 1 0 1 0 1 x On Sequenced Start Up Margin High Fault Detect On
The operation command is used to send the operation control word (OCW). The operation control word is used
as the software equivalent of the hardware board seated signal and hardware margining signals. The control
action as a function of the individual OCW bits is defined in the above table and is summarized as a function of
HEX values below.

OCW Values Action


Immediate turn off of all controlled PoLs and VRMs. This is will initiate an
0x01 OCW 0x3F
abrupt turn off without de-sequencing action.
Controlled turn off of all controlled PoLs and VRMs. This is will initiate a turn off
in reverse sequence order.
0x41 OCW 0x7F
If OCW=0x71 then the Restore User Data (0x16) command will occur after the
power down.
If system is off this will initiate a sequenced start up. If system is on the system
0x81 OCW 0x8F
will remain on. No margin.
If system is off this will initiate a sequenced start up. If system is on the system
0x96 OCW 0x97 will remain on. Output Voltages will go to margin low values. Fault detection will
be turned off.
If system is off this will initiate a sequenced start up. If system is on the system
0x9A OCW 0x9B will remain on. Output Voltages will go to margin low values. Fault detection will
be turned on.
If system is off this will initiate a sequenced start up. If system is on the system
0xA6 OCW 0xA7 will remain on. Output Voltages will go to margin high values. Fault detection will
be turned off.
If system is off this will initiate a sequenced start up. If system is on the system
0xAA OCW 0xAB will remain on. Output Voltages will go to margin high values. Fault detection will
be turned on.
Note 1: This command value is not saved with the Store User Data (0x15) command.

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Note 2: This command causes the CMD to perform a flash memory erase/write operation to save the
power down log information. The host application should delay at least the power down time (which is equivalent
to the sequence up delays) plus 100ms after using this command before executing other commands to allow the
CMD sufficient time to perform the power down and flash memory operations. If a master attempts to
communicate with the slave CMD during this required delay, the CMD may not generate an acknowledgement to
the master. Also note that since the number of flash erase/write cycles is limited by the device, the host
application should not issue this command unnecessarily.

ON/OFF Configuration Command: 0x02


This command defines how the system is turned on and off.
Not page specific.
Writes or reads a single byte.
If write it commands turn on/off and margin control.
If read it returns current command status.

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Enable Method
0 0 0 x x x x 0 Not Supported
0 0 0 x x x x 1 Immediate Turn Off
0 0 1 x x x x 0 Active Low Control Pin (Board Seated)
0 0 1 x x x x 1 Active High Control Pin (Board Seated)
0 1 0 x x x x 0 On/Off Controlled by OPERATION Command only
0 1 0 x x x x 1 On/OFF Controlled by the Control Pin Only
0 1 1 x x x x 0 On/OFF Portion of the Operation Command is Ignored
0 1 1 x x x x 1 On/Off Portion of the Operation Command is Active
1 0 0 x x x x 0 Ignores Enable Commands - System Powers up on Valid Vin
1 0 0 x x x x 1 Enable uses OPERATION Command and Control Pin
The ON/OFF configuration command is used to send the ON/OFF configuration word (OOCW). The ON/OFF
configuration word is used modify how the device responds to various ON/OFF stimuli. The control configuration
as a function of the individual OOCW bits is defined in the above table and is summarized as a function of HEX
values below.

OOCW Values Action


0x00 OOCW 0x1E Not Supported - Ignored
Board Seated de-assertion will result in an immediate turn off without de-
0x01 OOCW 0x1F
sequencing.
0x20 OOCW 0x3E Board Seated is Active Low
Even Values Only
0x21 OOCW 0x3F Board Seated is Active High
Odd Values Only
0x40 OOCW 0x5E ON/OFF only under I2C Control. Board Seated is Ignored. Operation Command
Even Values Only controls ON/OFF function.
0x41 OOCW 0x5F ON/OFF only under Board Seated Control. Only the Board Seated signal
Odd Values Only controls ON/OFF function.
0x60 OOCW 0x6E The CMD will ignore the ON/OFF portion of the Operation Command.
Even Values Only
0x61 OOCW 0x6F The CMD will use the ON/OFF portion of the Operation Command.
Odd Values Only
0x80 OOCW 0x8E Hardware and Software enables both ignored. System will power up when Vin is
Even Values Only above Vin ON. Will Power down when Vin drops below UVLO threshold.
0x81 OOCW 0x8F Both the Operation command and the Board Seated signal control ON/OFF.
Odd Values Only Both need to be asserted for ON or both de-asserted for OFF.
The default value for ON/OFF configuration is 0x61.

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Clear Faults: 0x03
Not page specific.
Write only.
One data byte 0x55 is followed by this command to verify this operation.
Clears warning if latched and clears all fault bits.

PMBus Pointer Command: 0x04


Not page specific.
Writes or reads a single byte.
If PMBus pointer is 1, then the read or write operation will manipulate the low word.
If PMBus pointer is 2, it will manipulate the high word.
Refer to each command for detailed information.

If its used in reading/writing dual setpoint:


PMBus pointer 1 indicates the read/write operation of setting A;
PMBus pointer 2 indicates the read/write operation of setting B.

Running Time Read Command: 0x05


Not page specific.
Read only. If read, it will return 5 bytes as follows:
1st Byte 2nd Byte 3rd Byte 4th Byte 5th Byte
Minute Hour Low byte of Day High Byte of Day Year

Get Logging Data Command: 0x06


Not page specific.
If write, one byte is followed by the command to select the power down data logging buffer.
0x06 0x00----Read power down data logging 0
0x06 0x01----Read power down data logging 1
0x06 0x02----Read power down data logging 2
0x06 0x55----Clear all power down log data
0x06 0xFF----Read the latest power down data logging
Others---------Reserved
If read, it return 120 bytes logging data at current buffer.
Byte1:Byte120 Byte121:Byte240 Byte241:Byte360
Power-down data logging 0 Power-down data logging 1 Power-down data logging 2

Note: The Clear all power down log data command (0x06 0x55) causes the CMD to perform a flash
memory erase operation to clear the log data. The host application should delay at least 100ms after using this
command before executing other commands to allow the CMD sufficient time to perform the flash memory
operations. If a master attempts to communicate with the slave CMD during this required delay, the CMD may
not generate an acknowledgement to the master. Also note that since the number of flash erase cycles is limited
by the device, the host application should not issue this command unnecessarily.

Upgrading selection command: 0x07


Not page specific.
Write only. For boot loader use. See Section 10, Boot Loader.
One byte is followed by this command to select upgrading code.
0x55---Upgrading boot block
0xAA---Upgrading configuration tables
0xFF---Upgrading application code

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Others---No operation.

Firmware Download command: 0x08


For boot loader use. See Section 10, Boot Loader.

Firmware Upgrade command: 0x09


For boot loader use. See Section 10, Boot Loader.

Restore All Defaults: 0x12


Not page specific.
Write Only.
One data byte 0x55 is followed by this command to verify this operation.
Replaces all user entered configuration data with default configuration constants.

Note: This command causes the CMD to perform a flash memory erase/write operation to save the
configuration information. The host application should delay at least 100ms after using this command
before executing other commands to allow the CMD sufficient time to perform the flash memory
operations. If a master attempts to communicate with the slave CMD during this required delay, the CMD
may not generate an acknowledgement to the master. Also note that since the number of flash
erase/write cycles is limited by the device, the host application should not issue this command
unnecessarily.

Store User Data: 0x15


Not page specific.
Write Only.
One data byte 0x55 is followed by this command to verify this operation.
Writes user entered parameters to non volatile memory. The stored parameters are loaded on all future
power ups until either new user data is stored with this same command or unless the default parameters
are restored.

Note: This command causes the CMD to perform a flash memory erase/write operation to save the
configuration information. The host application should delay at least 100ms after using this command
before executing other commands to allow the CMD sufficient time to perform the flash memory
operations. If a master attempts to communicate with the slave CMD during this required delay, the CMD
may not generate an acknowledgement to the master. Also note that since the number of flash
erase/write cycles is limited by the device, the host application should not issue this command
unnecessarily.

Restore User Data: 0x16


Not page specific.
Write Only.
One data byte 0x55 is followed by this command to verify this operation.
If using the programmed defaults this command will switch operation to the last stored user data.

Note: This command causes the CMD to perform a flash memory read operation to restore configuration
information. The host application should delay at least 50ms after using this command before executing
other commands to allow the CMD sufficient time to perform the read and restore operation. If a master
attempts to communicate with the slave CMD during this required delay, the CMD may not generate an
acknowledgement to the master.

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Vout Mode Command: 0x20
Not page specific.
Writes or reads a single byte. This data byte is an unsigned binary integer.
Bits 7-5 of VOUT_MODE are always zero.
If write it sets the VOUT_MODE.
If read it returns the active VOUT_MODE.
VOUT_MODE
Data Byte High Data Byte Low Data Byte

76543210 7654321076543210
Mode N V
000

The default value for Vout Mode is 0x18.

Vout Command: 0x21


Page specific. The command applies to the active page.
If write it enters the desired voltage for the output that corresponds to the selected page.
If read it returns the current desired value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vout Max: 0x24


Page specific. The command applies to the active page.
Read only.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

The Vout Max default is the power good high limit.

Vout Margin High: 0x25


Page specific. The command applies to the active page. Applies to APoL pages only.
If write it enters the margin high voltage for the output that corresponds to the selected page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vout Margin Low: 0x26


Page specific. The command applies to the active page. Applies to APoL pages only.
If write it enters the margin low voltage for the output that corresponds to the selected page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Read Back Trim Logic Command: 0x2F


Not page specific.
Read only.
Revision G1 TRKA-10D815R Page 16 of 48
Two data bytes.

A 1 in a corresponding bit location indicates the corresponding POL trim logic is positive. The higher trim
voltage, the higher POL output voltage.
Bit Name Description
B0 Reserved Not used.
B1 APoL 1 1 = Positive trim logic, 0 = Negative trim logic
B2 APoL 2 1 = Positive trim logic, 0 = Negative trim logic
B3 APoL 3 1 = Positive trim logic, 0 = Negative trim logic
B4 APoL 4 1 = Positive trim logic, 0 = Negative trim logic
B5 APoL 5 1 = Positive trim logic, 0 = Negative trim logic
B6 APoL 6 1 = Positive trim logic, 0 = Negative trim logic
B7 APoL 7 1 = Positive trim logic, 0 = Negative trim logic
B8 APoL 8 1 = Positive trim logic, 0 = Negative trim logic
B9 Reserved 1 = Positive trim logic, 0 = Negative trim logic
B10 Reserved 1 = Positive trim logic, 0 = Negative trim logic
B11 Reserved 1 = Positive trim logic, 0 = Negative trim logic
B12 Reserved Not used.
B13 Reserved Not used.
B14 Reserved Not used.
B15 Reserved Not used.

Vout OV Fault Limit: 0x40


Page specific. The command applies to the active page. Applies to APoL pages only.
Read only.
If read it returns the over voltage value for the output that corresponds to the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

The output OV value is used for setting the initial value for the Vout Max value (0x24 command) which is
used to limit the output voltage set point (0x21 command) or margin high value (0x25 command).

Note that this command does not change the value used for output power-good monitoring. Use the Vout
OV Power Good Limit (0xEC command) for that purpose.

Vout OV Warn Limit: 0x42


Page specific. The command applies to the active page.
If write it enters the Vout over voltage warning limit for the output that corresponds to the selected page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vout UV Warn Limit: 0x43


Page specific. The command applies to the active page.
If write it enters the Vout under voltage warning limit for the output that corresponds to the selected page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.
Revision G1 TRKA-10D815R Page 17 of 48
Vout UV Fault Limit: 0x44
Page specific. The command applies to the active page. Applies to APoL pages only.
Read only.
If read it returns the under voltage value for the output that corresponds to the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Note that this command does not change the value used for output power-good monitoring. Use the Vout
UV Power Good Limit (0xED command) for that purpose.

Vin OV Fault Limit: 0x55


Not page specific.
Read only.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vin OV Warn Limit: 0x57


Not page specific.
Read only.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vin UV Fault Limit: 0x59 and 0xBA


Not page specific.
If write 0x59 enters the Vin under voltage shutdown limit for power down.
If write 0xBA enters the Vin limit for power up.
If the power up limit (0xBA) is not greater than power down limit (0x59) the sequencer will make them
equal and overwrite the entered value for 0x59.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Read Back POL Fault Flags: 0x68


Not page specific.
Read only.
Two data bytes.

A 1 in a corresponding bit location indicates the corresponding APoL or DPoL error.


Bit Name Description
B0 APoL 1 1 = fault, 0 = no fault
B1 APoL 2 1 = fault, 0 = no fault
B2 APoL 3 1 = fault, 0 = no fault
B3 APoL 4 1 = fault, 0 = no fault
B4 APoL 5 1 = fault, 0 = no fault
B5 APoL 6 1 = fault, 0 = no fault
B6 APoL 7 1 = fault, 0 = no fault
B7 APoL 8 1 = fault, 0 = no fault

Revision G1 TRKA-10D815R Page 18 of 48


Bit Name Description
B8 DPoL 1 1 = fault, 0 = no fault
B9 DPoL 2 1 = fault, 0 = no fault
B10 DPoL 3 1 = fault, 0 = no fault
B11 DPoL 4 1 = fault, 0 = no fault
B12 DPoL 5 1 = fault, 0 = no fault
B13 DPoL 6 1 = fault, 0 = no fault
B14 DPoL 7 1 = fault, 0 = no fault
B15 DPoL 8 1 = fault, 0 = no fault

Read Back Analog Fault Flags: 0x69


Not page specific.
Read only.
Two data bytes.

A 1 in a corresponding bit location indicates the corresponding DPoL or analog input error.
Bit Name Description
B0 DPoL 9 1 = fault, 0 = no fault
B1 DPoL 10 1 = fault, 0 = no fault
B2 DPoL 11 1 = fault, 0 = no fault
B3 DPoL 12 1 = fault, 0 = no fault
B4 DPoL 13 1 = fault, 0 = no fault
B5 DPoL 14 1 = fault, 0 = no fault
B6 DPoL 15 1 = fault, 0 = no fault
B7 DPoL 16 1 = fault, 0 = no fault
B8 DPoL 17 1 = fault, 0 = no fault
B9 DPoL 18 1 = fault, 0 = no fault
B10 DPoL 19 1 = fault, 0 = no fault
B11 Analog x 1 = fault, 0 = no fault
B12 Analog y 1 = fault, 0 = no fault
B13 Reserved
B14 Reserved
B15 Reserved

Read Back Thermal Conditions: 0x79


Not page specific.
Read only.
Two data bytes.

A 1 in a corresponding bit location indicates the corresponding thermal error.


Bit Name Description
B0 Thermal Trip 0 Thermal Trip input with MUX set to 0. 1 = fault, 0 = no fault
B1 Thermal Trip 1 Thermal Trip input with MUX set to 1. 1 = fault, 0 = no fault
B2 Thermal Trip 2 Thermal Trip input with MUX set to 2. 1 = fault, 0 = no fault
B3 Thermal Trip 3 Thermal Trip input with MUX set to 3. 1 = fault, 0 = no fault
B4 Thermal Trip 4 Thermal Trip input with MUX set to 4. 1 = fault, 0 = no fault
B5 Thermal Trip 5 Thermal Trip input with MUX set to 5. 1 = fault, 0 = no fault
B6 Thermal Trip 6 Thermal Trip input with MUX set to 6. 1 = fault, 0 = no fault
B7 Thermal Trip 7 Thermal Trip input with MUX set to 7. 1 = fault, 0 = no fault
B8 VR Hot 0 VR Hot input with MUX set to 0. 1 = fault, 0 = no fault
B9 VR Hot 1 VR Hot input with MUX set to 1. 1 = fault, 0 = no fault
Revision G1 TRKA-10D815R Page 19 of 48
Bit Name Description
B10 VR Hot 2 VR Hot input with MUX set to 2. 1 = fault, 0 = no fault
B11 VR Hot 3 VR Hot input with MUX set to 3. 1 = fault, 0 = no fault
B12 VR Hot 4 VR Hot input with MUX set to 4. 1 = fault, 0 = no fault
B13 VR Hot 5 VR Hot input with MUX set to 5. 1 = fault, 0 = no fault
B14 VR Hot 6 VR Hot input with MUX set to 6. 1 = fault, 0 = no fault
B15 VR Hot 7 VR Hot input with MUX set to 7. 1 = fault, 0 = no fault

Read Back Working Status: 0x7F


Not page specific.
Read only.
Two data bytes.

If PMBus pointer is 1, the read operation will return/enter the value as below;
B0 Is_Up 1 = System is powered up
B1 Pwr_Good 1 = Power is Good based on Power Good Conditions
B2 Warning 1 = Warning Condition Exists
B3 Vin_UVLO 1 = Vin at or below Under Voltage Lockout limit
B4 Vin_MIN 1 = Vin at or below Minimum Vin limit
B5 Vin_MAX 1 = Vin at or above Maximum Vin limit
B6 Vout_OK 1 = Vout is OK
B7 Enable_State 1 = Board seated is asserted
B8 OVP 1 = Output OVP has occurred on at least one Vout
B9 Failed_Pwr_Up 1 = Unit failed to power up during sequence up event
B10 Reset_A 1 = Reset A fault check is passed
B11 Reset_B 1 = Reset B fault check is passed
B12 Reset_C 1 = Reset C fault check is passed
B13 AD_WNG 1 = AD reference voltage is wrong
B14 Low_Power 1 = In Low Power Mode
B15 Mfg_Mode 1 = In Manufacturing Mode

If PMBus pointer is 2, the read operation will return/enter the value as below;
B0 PIF_Ramp_Fail 1 = Indicates that the PIF ramp test failed
B1 Config_Data_Changed 1 = Indicates that configuration settings have been changed and may be
different than the default settings. Using the 0x12 Restore All Defaults
command will clear this flag and restore the default settings.
B2 Fault_Latch_Off 1 = Indicates that a fault has the board latched off.
B3 Heat_Event 1 = Indicates that either Thermal Trip or VR Hot are set and shut down is
active.
B4 Dual_SP_Setting Indicates alternate setpoint setting: 0 = setting A, 1 = setting B
B5 Reserved
B6 Reserved
B7 Reserved
B8 Reserved
B9 Reserved
B10 Reserved
B11 Reserved
B12 Reserved
B13 Reserved
B14 Reserved
B15 Reserved

Revision G1 TRKA-10D815R Page 20 of 48


Read Vin Command: 0x88
Not page specific.
Read only.
If read it returns the current input voltage value.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Read Vout Command: 0x8B


Page specific. The command applies to the active page.
Read only.
If read it returns the current Vout value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Get Revision Command: 0xB0


Not page specific.
Read only.
Three data bytes
Data is in binary format.

B20:B23 B16:B19 B8:B15


Major Core Revision Minor Core Revision Loaded Configuration File Release Number
B0:B7
Bootloader Revision

Get Date Code: 0xB1


Not page specific.
Read only.
Three data bytes
Device Date Code are programmed at shipment
Data is in binary format.

B16:B23 B8:B15 B0:B7


Day Month Year

Get Manufacturer PN Code: 0xB2


Not page specific.
Read only.
Sixteen data bytes
Data is in ASCII format.

Get Identified Board: 0xB3


Not page specific.
Read only.
One or two data byte
If read two byte, the 1st byte is the lower byte and the 2nd byte is the higher byte.
Returns binary code for identified board.

Revision G1 TRKA-10D815R Page 21 of 48


Get Check Sum: 0xB4
Not page specific.
Read only.
32 data bytes

Get Configuration Data Saved Counter: 0xB5


Not page specific.
Read only.
Two data bytes (Byte 1 is MSB, Byte 2 is LSB).
Returns the number of times that the configuration data has been saved (through the Store User Data or
Restore All Defaults command) or boot loaded.

Thermal Trip Command: 0xC0


Not page specific.
If write it enters the shut down or warning configuration of Thermal Trip while triggered.
0xFFFFShut Down
0x0000Warning
If the written value is not 0xFFFF or 0x0000, it will use the default value 0x0000.
If read it returns the current value.
Two data bytes.
Byte 1 is MSB, Byte 2 is LSB.

VR HOT Command: 0xC1


Not page specific.
If write it enters the shut down or warning configuration of VR HOT while triggered.
0xFFFFShut Down
0x0000Warning
If the written value is not 0xFFFF or 0x0000, it will use the default value 0x0000.
If read it returns the current value.
Two data bytes.
Byte 1 is MSB, Byte 2 is LSB.

Thermal Trip Delay: 0xCD


Not page specific.
Read only.
If read it returns the current value.
Two data bytes.
Byte 1 is MSB, Byte 2 is LSB.
MSB and LSB form 16 bit unsigned integer that defines this delay in 10us increments.

VR_HOT Delay: 0xCE


Not page specific.
Read only.
If read it returns the current value.
Two data bytes.
Byte 1 is MSB, Byte 2 is LSB.
MSB and LSB form 16 bit unsigned integer that defines this delay in 10us increments.

Revision G1 TRKA-10D815R Page 22 of 48


IO_PIF_ENA Delay: 0xCF
Not page specific.
If write it enters the delay from system start up condition to asserting IO_PIF_ENABLE signal.
If read it returns the current value.
Two data bytes.
Byte 1 is MSB, Byte 2 is LSB.
MSB and LSB form 16 bit unsigned integer that defines this delay in 10us increments.

Initial PWM Value Command: 0xE0


Page specific. Applies to APoL pages only.
If write it enters the initial PWM value for the trim PWM corresponding to the PoL controlled on the
selected page.
If read it returns the current value.
Two data bytes.
The value of PWM period is 100% Duty Cycle. If larger than it, CMD sets DC = 100%. If less than it, DC
= value/PWM period. PWM period value please refer to the configuration head file.

Vout_ADC_Full_Scale Command: 0xE9


Page specific.
If write it enters the ADC channel full scale for the PoL controlled on the selected page.
If read it returns the current value.
Two data bytes.

If Vout connects directly to ADC input, use 1023 for 10-bit ADC mode or 4095 for 12-bit ADC mode.
If voltage divider is used, enter 1023*(1+Ra/Rb) for 10-bit ADC mode or 4095*(1+Ra/Rb) for 12-bit ADC
mode.

Vin_ADC_Full_Scale Command: 0xEA


Not page specific.
If write it enters the ADC channel full scale for Vin monitoring.
If read it returns the current value.
Two data bytes.

With voltage divider enter 1023*(1+Ra/Rb) for 10-bit ADC mode or 4095*(1+Ra/Rb) for 12-bit ADC mode.

Revision G1 TRKA-10D815R Page 23 of 48


ADC_Reference Command: 0xEB
Not page specific.
Read only.
If read it returns the current value.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vout OV Power Good Limit: 0xEC


Page specific. The command applies to the active page.
If write it enters the Vout over voltage power good limit for the output that corresponds to the selected
page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Vout UV Power Good Limit: 0xED


Page specific. The command applies to the active page.
If write it enters the Vout under voltage power good limit for the output that corresponds to the selected
page.
If read it returns the current value for the selected page.
Two data bytes.
Data received and returned as 2 byte PMBUS linear format as defined in the Reporting Data and
Receiving Data section of this manual.

Reboot Command: 0xEF


Not page specific.
Write only.
One data byte 0x55 is followed to verify this operation.

Upon receipt system is powered down in reverse sequence order. After a delay of approximately 3
seconds the system is re-started in proper sequenced order.

Reset In Command / Warning Output Command: 0xF6


Not page specific.
Write only.
One or two data bytes.

This command is the I2C equivalent to the hardware reset input signal as defined below:

0xF6 0x55 The equivalent action will be taken as if the hardware reset in is asserted.
0xF6 0xAA The equivalent action will be taken as if the hardware reset in is de-asserted.

0xF6 0x01 0x55 Assert Reset A output.


0xF6 0x01 0xAA De-assert Reset A output.

0xF6 0x02 0x55 Assert Reset B output.


0xF6 0x02 0xAA De-assert Reset B output.

0xF6 0x03 0x55 Assert Reset C output.


Revision G1 TRKA-10D815R Page 24 of 48
0xF6 0x03 0xAA De-assert Reset C output.

This command can also be used to assert or de-assert the Warning output:
0xF6 0x10 0x55 Assert Warning output.
0xF6 0x10 0xAA De-assert Warning output.

Open Drain Select Command: 0xF7


Not page specific.
If write it enters the selection map to select open drain signals.
If read it returns the current value.
Two data bytes.

A 1 in a corresponding bit location makes the corresponding output pin an open drain signal. A 0
makes the signal driven.

If PMBus pointer is 1, the read/write operation will return/enter the value for Open Drain Selects 1;
Bit Name Description
B0 Therm Mux Sel 0 1 = open drain signal, 0 = signal driven
B1 Therm Mux Sel 1 1 = open drain signal, 0 = signal driven
B2 Therm Mux Sel 2 1 = open drain signal, 0 = signal driven
B3 Reset A Out 1 = open drain signal, 0 = signal driven
B4 Reserved
B5 Reserved
B6 Power Good 1 = open drain signal, 0 = signal driven
B7 Reserved 1 = open drain signal, 0 = signal driven
B8 APoL 1 Enable 1 = open drain signal, 0 = signal driven
B9 APoL 2 Enable 1 = open drain signal, 0 = signal driven
B10 APoL 3 Enable 1 = open drain signal, 0 = signal driven
B11 APoL 4 Enable 1 = open drain signal, 0 = signal driven
B12 APoL 5 Enable 1 = open drain signal, 0 = signal driven
B13 APoL 6 Enable 1 = open drain signal, 0 = signal driven
B14 APoL 7 Enable 1 = open drain signal, 0 = signal driven
B15 APoL 8 Enable 1 = open drain signal, 0 = signal driven

If PMBus pointer is 2, the read/write operation will return/enter the value for Open Drain Selects 2;
Bit Name Description
B0 DPoL 1 Enable 1 = open drain signal, 0 = signal driven
B1 DPoL 2 Enable 1 = open drain signal, 0 = signal driven
B2 DPoL 3 Enable 1 = open drain signal, 0 = signal driven
B3 DPoL 4 Enable 1 = open drain signal, 0 = signal driven
B4 DPoL 5/9 Enable 1 = open drain signal, 0 = signal driven
B5 DPoL 6/10 Enable 1 = open drain signal, 0 = signal driven
B6 DPoL 7/11 Enable 1 = open drain signal, 0 = signal driven
B7 DPoL 8/12 Enable 1 = open drain signal, 0 = signal driven
B8 DPoL 13/15 Enable 1 = open drain signal, 0 = signal driven
B9 DPoL 14/16 Enable 1 = open drain signal, 0 = signal driven
B10 DPoL 17 Enable 1 = open drain signal, 0 = signal driven
B11 DPoL 18 Enable 1 = open drain signal, 0 = signal driven
B12 DPoL 19 Enable 1 = open drain signal, 0 = signal driven
B13 Reserved
B14 Reserved
Revision G1 TRKA-10D815R Page 25 of 48
B15 Warning 1 = open drain signal, 0 = signal driven

Output Logic Select Command: 0xF8


Not page specific.
If write it enters the selection map to select assertion state for specified signals.
If read it returns the current value.
Two data bytes.

A 1 in a corresponding bit location makes the corresponding output pin positive logic. A 0 makes the
signal negative logic.

If PMBus pointer is 1, the read/write operation will return/enter the value for Output Logic Selects 1;
Bit Name Description
B0 Therm Mux Sel 0 1 = positive logic, 0 = negative logic
B1 Therm Mux Sel 1 1 = positive logic, 0 = negative logic
B2 Therm Mux Sel 2 1 = positive logic, 0 = negative logic
B3 Reset A Out 1 = positive logic, 0 = negative logic
B4 Reset B Out / Analog x Comparator 1 = positive logic, 0 = negative logic
B5 Reset C Out 1 = positive logic, 0 = negative logic
B6 Power Good 1 = positive logic, 0 = negative logic
B7 Reserved 1 = positive logic, 0 = negative logic
B8 APoL 1 Enable 1 = positive logic, 0 = negative logic
B9 APoL 2 Enable 1 = positive logic, 0 = negative logic
B10 APoL 3 Enable 1 = positive logic, 0 = negative logic
B11 APoL 4 Enable 1 = positive logic, 0 = negative logic
B12 APoL 5 Enable 1 = positive logic, 0 = negative logic
B13 APoL 6 Enable 1 = positive logic, 0 = negative logic
B14 APoL 7 Enable 1 = positive logic, 0 = negative logic
B15 APoL 8 Enable 1 = positive logic, 0 = negative logic

If PMBus pointer is 2, the read/write operation will return/enter the value for Output Logic Selects 2;
Bit Name Description
B0 DPoL 1 Enable 1 = positive logic, 0 = negative logic
B1 DPoL 2 Enable 1 = positive logic, 0 = negative logic
B2 DPoL 3 Enable 1 = positive logic, 0 = negative logic
B3 DPoL 4 Enable 1 = positive logic, 0 = negative logic
B4 DPoL 5/9 Enable 1 = positive logic, 0 = negative logic
B5 DPoL 6/10 Enable 1 = positive logic, 0 = negative logic
B6 DPoL 7/11 Enable 1 = positive logic, 0 = negative logic
B7 DPoL 8/12 Enable 1 = positive logic, 0 = negative logic
B8 DPoL 13/15 Enable 1 = positive logic, 0 = negative logic
B9 DPoL 14/16 Enable 1 = positive logic, 0 = negative logic
B10 DPoL 17 Enable 1 = positive logic, 0 = negative logic
B11 DPoL 18 Enable 1 = positive logic, 0 = negative logic
B12 DPoL 19 Enable 1 = positive logic, 0 = negative logic
B13 Reserved
B14 Reserved
B15 Warning 1 = positive logic, 0 = negative logic

Input Logic Select Command: 0xF9


Not page specific.
Revision G1 TRKA-10D815R Page 26 of 48
If write it enters the selection map to select input polarity for specified signals.
If read it returns the current value.
Two data bytes.

Bit Name Description


B0 Reserved
B1 Reserved
B2 Reserved
B3 Board Seated 1 = active high, 0 = active low
B4 Manufacturing Mode 1 = active high, 0 = active low
B5 Margin High 1 = active high, 0 = active low
B6 Margin Low 1 = active high, 0 = active low
B7 Reset In 1 = active high, 0 = active low
B8 Thermal Trip 1 = active high, 0 = active low
B9 VR Hot 1 = active high, 0 = active low
B10 Alternate Voltage Setpoint Control 1 = active high, 0 = active low
B11 Reserved 1 = active high, 0 = active low
B12 Reserved
B13 Reserved
B14 Reserved
B15 Reserved

Condition Response Command: 0xFA


Not page specific.
If write it enters the selection map to set up the desired response for the specified signals.
If read it returns the current value.
Two data bytes.

If PMBus pointer is 1, the read/write operation will return/enter the value as below;
Bit Name Description
B0 Thermal Trip 0 1 = On, 0 = Off
B1 Thermal Trip 1 1 = On, 0 = Off
B2 Thermal Trip 2 1 = On, 0 = Off
B3 Thermal Trip 3 1 = On, 0 = Off
B4 Thermal Trip 4 1 = On, 0 = Off
B5 Thermal Trip 5 1 = On, 0 = Off
B6 Thermal Trip 6 1 = On, 0 = Off
B7 Thermal Trip 7 1 = On, 0 = Off
B8 VR Hot 0 1 = On, 0 = Off
B9 VR Hot 1 1 = On, 0 = Off
B10 VR Hot 2 1 = On, 0 = Off
B11 VR Hot 3 1 = On, 0 = Off
B12 VR Hot 4 1 = On, 0 = Off
B13 VR Hot 5 1 = On, 0 = Off
B14 VR Hot 6 1 = On, 0 = Off
B15 VR Hot 7 1 = On, 0 = Off

If PMBus pointer is 2, the read/write operation will return/enter the value as below;
B0 IO PIF 1 = On, 0 = Off
B1 Manufacturing Mode 1 = On, 0 = Off
B2 Ramp Test Fail SD 1 = Shut down board if PIF ramp fails; 0 = Dont shut down if fails
B3 PIF Ramp Test Input 1 = Analog X is selected for PIF ramp test; 0 = Analog Y is selected
Revision G1 TRKA-10D815R Page 27 of 48
B4 Alternate Voltage 1 = Disable alternate voltage support;
Setpoint Support 0 = Enable alternate voltage support (controlled by Alternate Voltage Setpoint
Control input)
B5 Reserved
B6 Reserved
B7 Reserved
B8 Reserved
B9 Reserved
B10 Reserved
B11 Reserved
B12 Reserved
B13 Reserved
B14 Reserved
B15 Reserved

Get Thermal Flags: 0xFB


Not page specific.
Read only.
Two data bytes.

Same as Read Back Thermal Conditions (0x79) command.

Get Input Pin Flags: 0xFC


Not page specific.
Read only.
Two data bytes.

Bit Name Description


B0 Board ID 0 Board ID 0 input
B1 Board ID 1 Board ID 1 input
B2 Board ID 2 Board ID 2 input
B3 Board Seated 1 = Board Seated is asserted
B4 Manufacturing Mode 1 = Manufacturing Mode is asserted
B5 Margin High 1 = Margin High is asserted
B6 Margin Low 1 = Margin Low is asserted
B7 Reset In 1 = Reset Input is asserted
B8 Thermal Trip 1 = One of Thermal Trip 0-7 inputs is asserted
B9 VR Hot 1 = One of VR Hot 0-7 inputs is asserted
B10 Dual_SP_Selection Indicates alternate setpoint selection: 0 = setting A, 1 =
setting B
B11 Reserved 1 = Low power mode input is asserted
B12 Reserved
B13 Reserved
B14 Reserved
B15 Reserved

Get Output Pin Flags: 0xFD


Not page specific.
Read only.
Two data bytes.

Revision G1 TRKA-10D815R Page 28 of 48


If PMBus pointer is 1, the read/write operation will return/enter the value for Output Pin Flags 1;
Bit Name Description
B0 Therm Mux Sel 0 1 = Asserted, 0 = Deasserted
B1 Therm Mux Sel 1 1 = Asserted, 0 = Deasserted
B2 Therm Mux Sel 2 1 = Asserted, 0 = Deasserted
B3 Reset A Out 1 = Asserted, 0 = Deasserted
B4 Reset B Out / Analog x Comparator 1 = Asserted, 0 = Deasserted
B5 Reset C Out 1 = Asserted, 0 = Deasserted
B6 Power Good 1 = Asserted, 0 = Deasserted
B7 Reserved 1 = Asserted, 0 = Deasserted
B8 APoL 1 Enable 1 = Asserted, 0 = Deasserted
B9 APoL 2 Enable 1 = Asserted, 0 = Deasserted
B10 APoL 3 Enable 1 = Asserted, 0 = Deasserted
B11 APoL 4 Enable 1 = Asserted, 0 = Deasserted
B12 APoL 5 Enable 1 = Asserted, 0 = Deasserted
B13 APoL 6 Enable 1 = Asserted, 0 = Deasserted
B14 APoL 7 Enable 1 = Asserted, 0 = Deasserted
B15 APoL 8 Enable 1 = Asserted, 0 = Deasserted

If PMBus pointer is 2, the read/write operation will return/enter the value for Output Pin Flags 2;
Bit Name Description
B0 DPoL 1 Enable 1 = Asserted, 0 = Deasserted
B1 DPoL 2 Enable 1 = Asserted, 0 = Deasserted
B2 DPoL 3 Enable 1 = Asserted, 0 = Deasserted
B3 DPoL 4 Enable 1 = Asserted, 0 = Deasserted
B4 DPoL 5/9 Enable 1 = Asserted, 0 = Deasserted
B5 DPoL 6/10 Enable 1 = Asserted, 0 = Deasserted
B6 DPoL 7/11 Enable 1 = Asserted, 0 = Deasserted
B7 DPoL 8/12 Enable 1 = Asserted, 0 = Deasserted
B8 DPoL 13/15 Enable 1 = Asserted, 0 = Deasserted
B9 DPoL 14/16 Enable 1 = Asserted, 0 = Deasserted
B10 DPoL 17 Enable 1 = Asserted, 0 = Deasserted
B11 DPoL 18 Enable 1 = Asserted, 0 = Deasserted
B12 DPoL 19 Enable 1 = Asserted, 0 = Deasserted
B13 Reserved
B14 Reserved
B15 Warning 1 = Asserted, 0 = Deasserted

Revision G1 TRKA-10D815R Page 29 of 48


Setting up Reset Signals: 0xDC thru 0xDE and 0xF3 thru 0xF5
The CMD can generate 3 reset signals and corresponding delays. Each of these signals has a
corresponding delay prior to de-assertion.
These commands are not page specific.

Each command is read/write.

Each command has 2 data bytes.

Each delay command is followed by 2 data bytes. The first data byte contains the MSB the second the
LSB. The corresponding 16 bit B0 integer represents the delay in 10us increments. The delay
commands are 0xDC through 0xDE.

Each reset has an associated bit map command each of which is followed by 2 data bytes. A 1 in the
bit that maps to a given converter will attach that converter to the reset condition for a given reset signal.
A 0 will ignore that converter for the specific signal.

If PMBus pointer is 1, the read/write operation will return/enter the value for Reset Mask x 1 (x=A, B, C);

Bit Map and Delay Chart for Reset Set Up

Revision G1 TRKA-10D815R Page 30 of 48


If PMBus pointer is 2, the read/write operation will return/enter the value for Reset Mask x 2 (x=A, B, C);

Bit Map and Delay Chart for Reset Set Up

Revision G1 TRKA-10D815R Page 31 of 48


Setting up Power Good and Warning: 0xD9 thru 0xDA and 0xF1 thru 0xF2
The CMD generates a Power Good and Warning Signal. Each of these signals has a corresponding
delay prior to assertion. The Warning Signal and Power Good Signal and corresponding flags are
mapped to the state of each monitored output.

These commands are not page specific.

Each command is read/write.

Each command has 2 data bytes.

Each delay command is followed by 2 data bytes. The first data byte contains the MSB the second the
LSB. The corresponding 16 bit B0 integer represents the delay in 10us increments. The delay
commands are 0xD9 through 0xDA.

The Power Good and Warning commands send a bit map that is 2 data bytes in length. A 1 in the bit
that maps to a given converter will attach that converter to the corresponding Power Good or Warning
checks. A 0 will ignore that converter for the specific signal.

If PMBus pointer is 1, the read/write operation will return/enter the value for Power Good Mask 1 or
Warning Mask 1;

Bit Map and Delay Chart for Power Good and Warning Set Up

If PMBus pointer is 2, the read/write operation will return/enter the value for Power Good Mask 2 or Warning
Mask 2;

Bit Map and Delay Chart for Power Good and Warning Set Up

Revision G1 TRKA-10D815R Page 32 of 48


Setting up Sequencing: 0xD0 thru 0xD8, 0x0A thru 0x0F, 0xAB thru 0xAE
and 0xE1 thru 0xE8, 0x19 thru 0x1F, 0x2B thru 0x2E
The CMD generates 19 sequencing maps, Sequence 1 through Sequence 19, each sequence map is
followed by a corresponding delay. Each sequence has two variables. One is Sequence n 1, the other is
sequence n 2. (n=1,2,,19).

If PMBus pointer is 1, the read/write operation will return/enter the value for Sequence n 1;
If PMBus pointer is 2, the read/write operation will return/enter the value for Sequence n 2;

These commands are not page specific.

Each command is read/write.

Each command has 2 data bytes.

There are a total of 20 delay commands for sequencing followed by 2 data bytes. The first data byte
contains the MSB the second the LSB. The corresponding 16 bit B0 integer represents the delay in 10us
increments. The delay commands are 0xD0 through 0xD8, 0x0A thru 0x0F and 0xAB thru 0xAE.

There are a total of 19 bit map commands for sequencing followed by 2 data bytes. A 1 in the bit that
maps to a given converter will enable that converter in the desired sequence. A 0 will ignore that
converter in a given sequence. Once a converter is enabled in a previous sequence a 0 in its location in
subsequent sequences will not turn it off. The sequence bit maps are ORed together as the sequencing
proceeds.

Revision G1 TRKA-10D815R Page 33 of 48


Bit Map and Delay Chart for Sequence Set Up
(PMBus Pointer = 1)

Revision G1 TRKA-10D815R Page 34 of 48


Bit Map and Delay Chart for Sequence Set Up
(PMBus Pointer = 2)

Revision G1 TRKA-10D815R Page 35 of 48


Simple read command: 0xFF
For boot loader use. See Boot Loader Section.

Revision G1 TRKA-10D815R Page 36 of 48


10. Boot Loader
This section describes how to use the boot loader commands to update the firmware application code or board
configuration data. For additional details of the boot loading process, see the Application Code I2C Firmware
Upgrade Requirements document.

Bel provides three boot load .hex files with each code release. Using the boot loader commands and the contents
of the .hex files, the user application has the ability to update the firmware boot block, configuration data, and
application code. When each of the sections are downloaded, they are stored in download buffers and are only
used if the download is successful.

The boot loading process is performed as follows:

1. Send the Firmware Upgrade Command (0x09) specifying which code section is to be downloaded:
Command Subcommand Description Required Delay
0x09 0x02 Prepare for Application Code Download 750ms
0x09 0x03 Prepare for Configuration Data Download 450ms
0x09 0x05 Prepare for Boot Block Code Download 50ms
Once the CMD receives this command it erases the flash memory download buffers. Since this operation takes
some time to complete, the host should not attempt communication with the CMD during the required delay
indicated in the table.

2. Send packets of data (from the .hex files) using the Firmware Download Command (0x08). Each packet is 21
bytes containing the command, address (three bytes), boot data (16 bytes), and a checksum byte. After the CMD
receives 16 of these packets it writes a row to flash memory and the host should not attempt communication with
the CMD during this write time (5ms).

3. Send the Firmware Upgrade Command (0x09) with the image checksum. If the image checksum matches the
image checksum calculated by the CMD code, the CMD code will set flags to indicate that the data in the
download buffers are valid for upgrading.
Command Subcommand Description Required Delay
0x09 0x06 Send image checksum <5ms

4. Optionally send the Firmware Upgrade Command (0x09) specifying which code section is to be upgraded:
Command Subcommand Description Required Delay
0x09 0x00 Upgrade Application Code 1.5s
0x09 0x01 Upgrade Configuration Data 50ms
0x09 0x04 Upgrade Boot Block Code 100ms
Once the CMD receives this command it copies the information from download buffer segment to the working
segment of flash memory. Since this operation takes some time to complete, the host should not attempt
communication with the CMD during the required delay indicated in the table.

If this command is not sent, the upgrade is deferred until the next reboot or until the Upgrading Selection
Command (0x07) is sent:
Command Subcommand Description Required Delay
0x07 0xFF Upgrade Application Code 1.5s
0x07 0xAA Upgrade Configuration Data 50ms
0x07 0x55 Upgrade Boot Block Code 100ms

Note: The boot block code is to be upgraded first. After that, either the configuration data or application code can
be downloaded. You can download all three parts before performing the upgrade operation.

Revision G1 TRKA-10D815R Page 37 of 48


Errors may be checked by performing the Simple Read Command (0xFF) after the Firmware Download (0x08) or
Firmware Upgrade (0x09) commands:
Error Code Description
0xB0 No Error
0xB1 Checksum Error on Previous Transaction
0xB2 Unused
0xB3 Error Writing to Flash after last Block Write
0xB4 Unused
0xB5 Secondary Image Checksum Failure
0xB6-0xB7 Unused
0xB8 Tried to write to Invalid Flash Address
0xB9-0xBB Unused
0xBC Downloaded image not valid
0xBD Packet Missing From Block
0xBE Upgrade Command Conflicts with Download Command
0xBF Incorrect Packet Length Error

Note: Lower revisions can be upgraded to higher revisions, but downgrading the boot block code from higher
version to lower versions is not supported. Downgrading of application code or configuration data may not be
supported. Any boot loading restrictions are documented in the release notices.

Revision G1 TRKA-10D815R Page 38 of 48


11. Data Logging Format
The data logging circular buffer consists of 360 bytes and contains the last 3 power-down log data. Each power-
down log data consists of 120 bytes and is listed below.

The logging data can be read back from CMD via PMBus command 0x06 (Read back logging data command).

Logging Data
Byte Description
Byte1 ID bits low byte
Byte2 ID bits high byte
Byte3 Power down counter low byte
Byte4 Power down counter high byte
Byte5 POL fault flag low byte
Byte6 POL fault flag high byte
Byte7 Analog fault flag low byte
Byte8 Analog fault flag high byte
Byte9 CMD Flag bits low byte
Byte10 CMD Flag bits high byte
Byte11 CMD Flag_1 bits low byte
Byte12 CMD Flag_1 bits high byte
Byte13 Thermal flag bits high byte
Byte14 Thermal flag bits high byte
Byte15 External flag bits low byte
Byte16 External flag bits high byte
Byte17 Comparator Output flag bits low byte
Byte18 Comparator Output flag bits high byte
Byte19 Input Pin flag bits low byte
Byte20 Input Pin flag bits high byte
Byte21 Condition Response Flag bits low byte
Byte22 Condition Response Flag bits high byte
Byte23 Condition Response Flag_1 bits low byte
Byte24 Condition Response Flag_1 bits high byte
Byte25 POL trim logic flag bits low byte
Byte26 POL trim logic flag bits high byte
Byte27 Output Pin flag bits 1 low byte
Byte28 Output Pin flag bits 1 high byte
Byte29 Output Pin flag bits 2 low byte
Byte30 Output Pin flag bits 2 high byte
Byte31 Command flag bits low byte
Byte32 Command flag bits high byte
Byte33 Watchdog and reset status low byte
Byte34 Watchdog and reset status high byte
Byte35 PMBus command 0x01 low byte
Byte36 PMBus command 0x01 high byte
Byte37 PMBus command 0x02 low byte
Byte38 PMBus command 0x02 high byte
Byte39 Boot loader status low byte
Byte40 Boot loader status high byte
Revision G1 TRKA-10D815R Page 39 of 48
Byte Description
Byte41 Input voltage low byte
Byte42 Input voltage high byte
Byte43 APoL 1 output voltage low byte
Byte44 APoL 1 output voltage high byte
Byte45 APoL 2 output voltage low byte
Byte46 APoL 2 output voltage high byte
Byte47 APoL 3 output voltage low byte
Byte48 APoL 3 output voltage high byte
Byte49 APoL 4 output voltage low byte
Byte50 APoL 4 output voltage high byte
Byte51 APoL 5 output voltage low byte
Byte52 APoL 5 output voltage high byte
Byte53 APoL 6 output voltage low byte
Byte54 APoL 6 output voltage high byte
Byte55 APoL 7 output voltage low byte
Byte56 APoL 7 output voltage high byte
Byte57 APoL 8 output voltage low byte
Byte58 APoL 8 output voltage high byte
Byte59 DPoL 1 output voltage low byte
Byte60 DPoL 1 output voltage high byte
Byte61 DPoL 2 output voltage low byte
Byte62 DPoL 2 output voltage high byte
Byte63 DPoL 3 output voltage low byte
Byte64 DPoL 3 output voltage high byte
Byte65 DPoL 4 output voltage low byte
Byte66 DPoL 4 output voltage high byte
Byte67 DPoL 5 output voltage low byte
Byte68 DPoL 5 output voltage high byte
Byte69 DPoL 6 output voltage low byte
Byte70 DPoL 6 output voltage high byte
Byte71 DPoL 7 output voltage low byte
Byte72 DPoL 7 output voltage high byte
Byte73 DPoL 8 output voltage low byte
Byte74 DPoL 8 output voltage high byte
Byte75 DPoL 9 output voltage low byte
Byte76 DPoL 9 output voltage high byte
Byte77 DPoL 10 output voltage low byte
Byte78 DPoL 10 output voltage high byte
Byte79 DPoL 11 output voltage low byte
Byte80 DPoL 11 output voltage high byte
Byte81 DPoL 12 output voltage low byte
Byte82 DPoL 12 output voltage high byte
Byte83 DPoL 13 output voltage low byte
Byte84 DPoL 13 output voltage high byte
Byte85 DPoL 14 output voltage low byte
Byte86 DPoL 14 output voltage high byte
Byte87 DPoL 15 output voltage low byte
Byte88 DPoL 15 output voltage high byte
Byte89 DPoL 16 output voltage low byte
Revision G1 TRKA-10D815R Page 40 of 48
Byte Description
Byte90 DPoL 16 output voltage high byte
Byte91 DPoL 17 output voltage low byte
Byte92 DPoL 17 output voltage high byte
Byte93 DPoL 18 output voltage low byte
Byte94 DPoL 18 output voltage high byte
Byte95 DPoL 19 output voltage low byte
Byte96 DPoL 19 output voltage high byte
Byte97 Analog x voltage low byte
Byte98 Analog x voltage high byte
Byte99 Analog y voltage low byte
Byte100 Analog y voltage high byte
Byte101 Running minute time low byte before power down
Byte102 Running minute time high byte before power down
Byte103 Running hour time low byte before power down
Byte104 Running hour time high byte before power down
Byte105 Running day time low byte before power down.
Byte106 Running day time high byte before power down.
Byte107 Running year time low byte before power down.
Byte108 Running year time high byte before power down.
Byte109 Configuration Data Saved Counter low byte
Byte110 Configuration Data Saved Counter high byte
Byte111- Reserved
Byte120

Logging Data Format Description

Board ID
Board ID number.

Power down counter


The power down counter will indicate the number of power down times of CMD.

POL Fault flag bits


Bit Name Description
B0 APoL 1 1 = Bad
B1 APoL 2 1 = Bad
B2 APoL 3 1 = Bad
B3 APoL 4 1 = Bad
B4 APoL 5 1 = Bad
B5 APoL 6 1 = Bad
B6 APoL 7 1 = Bad
B7 APoL 8 1 = Bad
B8 DPoL 1 1 = Bad
B9 DPoL 2 1 = Bad
B10 DPoL 3 1 = Bad
B11 DPoL 4 1 = Bad
B12 DPoL 5 1 = Bad
B13 DPoL 6 1 = Bad
Revision G1 TRKA-10D815R Page 41 of 48
Bit Name Description
B14 DPoL 7 1 = Bad
B15 DPoL 8 1 = Bad

Analog Fault flag bits


Bit Name Description
B0 DPoL 9 1 = Bad
B1 DPoL 10 1 = Bad
B2 DPoL 11 1 = Bad
B3 DPoL 12 1 = Bad
B4 DPoL 13 1 = Bad
B5 DPoL 14 1 = Bad
B6 DPoL 15 1 = Bad
B7 DPoL 16 1 = Bad
B8 DPoL 17 1 = Bad
B9 DPoL 18 1 = Bad
B10 DPoL 19 1 = Bad
B11 Analog x 1 = Bad
B12 Analog y 1 = Bad
B13 AF13 Reserved
B14 AF14 Reserved
B15 AF15 Reserved

CMD Flag Bits


Note: These flags are the same as the Working Status (0x7F) Command when PMBPointer=1.
B0 Is_Up 1 = System is powered up
B1 Pwr_Good 1 = Power is Good based on Power Good Conditions
B2 Warning 1 = Warning Condition Exists
B3 Vin_UVLO 1 = Vin at or below Under Voltage Lockout limit
B4 Vin_MIN 1 = Vin at or below Minimum Vin limit
B5 Vin_MAX 1 = Vin at or above Maximum Vin limit
B6 Vout_OK 1 = Vout is OK
B7 Enable_State 1 = Board seated is asserted
B8 OVP 1 = Output OVP has occurred on at least one Vout
B9 Failed_Pwr_Up 1 = Unit failed to power up during sequence up event
B10 Reset_A 1 = Reset A fault check is passed
B11 Reset_B 1 = Reset B fault check is passed
B12 Reset_C 1 = Reset C fault check is passed
B13 AD_WNG 1 = AD reference voltage is wrong
B14 Low_Power 1 = In Low Power Mode
B15 Mfg_Mode 1 = In Manufacturing Mode

CMD Flag_1 Bits


Note: These flags are the same as the Working Status (0x7F) Command when PMBPointer=2.
B0 PIF_Ramp_Fail 1 = Indicates that the PIF ramp test failed
B1 Config_Data_Changed 1 = Indicates that configuration settings have been changed and may be
different than the default settings.
B2 Fault_Latch_Off 1 = Indicates that a fault has the board latched off.
B3 Heat_Event 1 = Indicates that either Thermal Trip or VR Hot are set and shut down is active.
B4 Dual_SP_Setting Indicates alternate setpoint setting: 0 = setting A, 1 = setting B

Revision G1 TRKA-10D815R Page 42 of 48


B5 Reserved
B6 Reserved
B7 Reserved
B8 Reserved
B9 Reserved
B10 Reserved
B11 Reserved
B12 Reserved
B13 Reserved
B14 Reserved
B15 Reserved

Thermal Flag Bits


Bit Name Description
B0 Thermal Trip 0 Thermal Trip input with MUX set to 0. 1 = fault, 0 = no fault
B1 Thermal Trip 1 Thermal Trip input with MUX set to 1. 1 = fault, 0 = no fault
B2 Thermal Trip 2 Thermal Trip input with MUX set to 2. 1 = fault, 0 = no fault
B3 Thermal Trip 3 Thermal Trip input with MUX set to 3. 1 = fault, 0 = no fault
B4 Thermal Trip 4 Thermal Trip input with MUX set to 4. 1 = fault, 0 = no fault
B5 Thermal Trip 5 Thermal Trip input with MUX set to 5. 1 = fault, 0 = no fault
B6 Thermal Trip 6 Thermal Trip input with MUX set to 6. 1 = fault, 0 = no fault
B7 Thermal Trip 7 Thermal Trip input with MUX set to 7. 1 = fault, 0 = no fault
B8 VR Hot 0 VR Hot input with MUX set to 0. 1 = fault, 0 = no fault
B9 VR Hot 1 VR Hot input with MUX set to 1. 1 = fault, 0 = no fault
B10 VR Hot 2 VR Hot input with MUX set to 2. 1 = fault, 0 = no fault
B11 VR Hot 3 VR Hot input with MUX set to 3. 1 = fault, 0 = no fault
B12 VR Hot 4 VR Hot input with MUX set to 4. 1 = fault, 0 = no fault
B13 VR Hot 5 VR Hot input with MUX set to 5. 1 = fault, 0 = no fault
B14 VR Hot 6 VR Hot input with MUX set to 6. 1 = fault, 0 = no fault
B15 VR Hot 7 VR Hot input with MUX set to 7. 1 = fault, 0 = no fault

External Flag Bits


B0 Reboot 1 = PMBus reboot command
B1 Store_User_Data 1 = PMBus store user data command
B2 Restore_User_Data 1 = PMBus restore user data command
B3 Restore_All_Defaults 1 = PMBus restore all defaults command
B4 EF4 Reserved
B5 EF5 Reserved
B6 EF6 Reserved
B7 EF7 Reserved
B8 EF8 Reserved
B9 EF9 Reserved
B10 EF10 Reserved
B11 EF11 Reserved
B12 EF12 Reserved
B13 EF13 Reserved
B14 EF14 Reserved
B15 EF15 Reserved

Revision G1 TRKA-10D815R Page 43 of 48


Comparator Output Flag Bits
Bit Name Description
B0 DPoL1 1 = Asserted
B1 DPoL2 1 = Asserted
B2 DPoL3 1 = Asserted
B3 DPoL4 1 = Asserted
B4 DPoL5 1 = Asserted
B5 DPoL6 1 = Asserted
B6 DPoL7 1 = Asserted
B7 DPoL8 1 = Asserted
B8 DPoL13 1 = Asserted
B9 DPoL14 1 = Asserted
B10 DPoL17 1 = Asserted
B11 DPoL18 1 = Asserted
B12 DPoL19 1 = Asserted
B13 Analog x Reserved
B14 COF14 1 = Asserted
B15 COF15 Reserved

Input Pin Flag Bits


Bit Name Description
B0 Board ID 0 Board ID 0 input
B1 Board ID 1 Board ID 1 input
B2 Board ID 2 Board ID 2 input
B3 Board Seated 1 = Board Seated is asserted
B4 Manufacturing Mode 1 = Manufacturing Mode is asserted
B5 Margin High 1 = Margin High is asserted
B6 Margin Low 1 = Margin Low is asserted
B7 Reset In 1 = Reset Input is asserted
B8 Thermal Trip 1 = One of Thermal Trip 0-7 inputs is asserted
B9 VR Hot 1 = One of VR Hot 0-7 inputs is asserted
B10 Dual_SP_Selection Indicates alternate setpoint selection: 0 = setting A, 1 =
setting B
B11 IP11 1 = Low power mode is asserted
B12 IP12 Reserved
B13 IP13 Reserved
B14 IP14 Reserved
B15 IP15 Reserved

Condition Flag Bits


Bit Name Description
B0 Thermal Trip 0 Thermal Trip input with MUX set to 0. 1 = fault, 0 = no fault
B1 Thermal Trip 1 Thermal Trip input with MUX set to 1. 1 = fault, 0 = no fault
B2 Thermal Trip 2 Thermal Trip input with MUX set to 2. 1 = fault, 0 = no fault
B3 Thermal Trip 3 Thermal Trip input with MUX set to 3. 1 = fault, 0 = no fault
B4 Thermal Trip 4 Thermal Trip input with MUX set to 4. 1 = fault, 0 = no fault
B5 Thermal Trip 5 Thermal Trip input with MUX set to 5. 1 = fault, 0 = no fault
B6 Thermal Trip 6 Thermal Trip input with MUX set to 6. 1 = fault, 0 = no fault
B7 Thermal Trip 7 Thermal Trip input with MUX set to 7. 1 = fault, 0 = no fault
B8 VR Hot 0 VR Hot input with MUX set to 0. 1 = fault, 0 = no fault

Revision G1 TRKA-10D815R Page 44 of 48


Bit Name Description
B9 VR Hot 1 VR Hot input with MUX set to 1. 1 = fault, 0 = no fault
B10 VR Hot 2 VR Hot input with MUX set to 2. 1 = fault, 0 = no fault
B11 VR Hot 3 VR Hot input with MUX set to 3. 1 = fault, 0 = no fault
B12 VR Hot 4 VR Hot input with MUX set to 4. 1 = fault, 0 = no fault
B13 VR Hot 5 VR Hot input with MUX set to 5. 1 = fault, 0 = no fault
B14 VR Hot 6 VR Hot input with MUX set to 6. 1 = fault, 0 = no fault
B15 VR Hot 7 VR Hot input with MUX set to 7. 1 = fault, 0 = no fault

Condition Flag_1 Bits


B0 IO PIF 1 = On, 0 = Off
B1 Manufacturing Mode 1 = On, 0 = Off
B2 Ramp Test Fail SD 1 = Shut down board if PIF ramp fails; 0 = Dont shut down if fails
B3 PIF Ramp Test Input 1 = Analog X is selected for PIF ramp test; 0 = Analog Y is selected
B4 Alternate Voltage 1 = Disable alternate voltage support;
Setpoint Support 0 = Enable alternate voltage support (controlled by Alternate Voltage Setpoint
Control input)
B5 CF1_5 Reserved
B6 CF1_6 Reserved
B7 CF1_7 Reserved
B8 CF1_8 Reserved
B9 CF1_9 Reserved
B10 CF1_10 Reserved
B11 CF1_11 Reserved
B12 CF1_12 Reserved
B13 CF1_13 Reserved
B14 CF1_14 Reserved
B15 CF1_15 Reserved

POL Trim Logic Flag Bits


Bit Name Description
B0 TLF0 Reserved
B1 APoL 1 1 = Positive trim logic, 0 = Negative trim logic
B2 APoL 2 1 = Positive trim logic, 0 = Negative trim logic
B3 APoL 3 1 = Positive trim logic, 0 = Negative trim logic
B4 APoL 4 1 = Positive trim logic, 0 = Negative trim logic
B5 APoL 5 1 = Positive trim logic, 0 = Negative trim logic
B6 APoL 6 1 = Positive trim logic, 0 = Negative trim logic
B7 APoL 7 1 = Positive trim logic, 0 = Negative trim logic
B8 APoL 8 1 = Positive trim logic, 0 = Negative trim logic
B9 TLF9 Reserved
B10 TLF10 Reserved
B11 TLF11 Reserved
B12 TLF12 Reserved
B13 TLF13 Reserved
B14 TLF14 Reserved
B15 TLF15 Reserved

Output Pin Flag Bits 1


Bit Name Description
Revision G1 TRKA-10D815R Page 45 of 48
B0 Therm Mux Sel 0 1 = Asserted, 0 = Deasserted
B1 Therm Mux Sel 1 1 = Asserted, 0 = Deasserted
B2 Therm Mux Sel 2 1 = Asserted, 0 = Deasserted
B3 Reset A Out 1 = Asserted, 0 = Deasserted
B4 Reset B Out / Analog x Comparator 1 = Asserted, 0 = Deasserted
B5 Reset C Out 1 = Asserted, 0 = Deasserted
B6 Power Good 1 = Asserted, 0 = Deasserted
B7 OF_1_7 1 = Asserted, 0 = Deasserted
B8 APoL 1 Enable 1 = Asserted, 0 = Deasserted
B9 APoL 2 Enable 1 = Asserted, 0 = Deasserted
B10 APoL 3 Enable 1 = Asserted, 0 = Deasserted
B11 APoL 4 Enable 1 = Asserted, 0 = Deasserted
B12 APoL 5 Enable 1 = Asserted, 0 = Deasserted
B13 APoL 6 Enable 1 = Asserted, 0 = Deasserted
B14 APoL 7 Enable 1 = Asserted, 0 = Deasserted
B15 APoL 8 Enable 1 = Asserted, 0 = Deasserted

Output Pin Flag Bits 2


Bit Name Description
B0 DPoL 1 Enable 1 = Asserted, 0 = Deasserted
B1 DPoL 2 Enable 1 = Asserted, 0 = Deasserted
B2 DPoL 3 Enable 1 = Asserted, 0 = Deasserted
B3 DPoL 4 Enable 1 = Asserted, 0 = Deasserted
B4 DPoL 5/9 Enable 1 = Asserted, 0 = Deasserted
B5 DPoL 6/10 Enable 1 = Asserted, 0 = Deasserted
B6 DPoL 7/11 Enable 1 = Asserted, 0 = Deasserted
B7 DPoL 8/12 Enable 1 = Asserted, 0 = Deasserted
B8 DPoL 13/15 Enable 1 = Asserted, 0 = Deasserted
B9 DPoL 14/16 Enable 1 = Asserted, 0 = Deasserted
B10 DPoL 17 Enable 1 = Asserted, 0 = Deasserted
B11 DPoL 18 Enable 1 = Asserted, 0 = Deasserted
B12 DPoL 19 Enable 1 = Asserted, 0 = Deasserted
B13 OP_2_13 Reserved
B14 OP_2_14 Reserved
B15 Warning 1 = Asserted, 0 = Deasserted

Command Flag Bits


B0 SU 1 = Sequence up
B1 SD 1 = Sequence down
B2 ID 1 = Immediate off
B3 MU 1 = Margin high
B4 MD 1 = Margin low
B5 FD_OFF 1 = Fault detect off
B6 CF6 Reserved
B7 CF7 Reserved
B8 CF8 Reserved
B9 CF9 Reserved
B10 CF10 Reserved
B11 CF11 Reserved
B12 CF12 Reserved
B13 CF13 Reserved
Revision G1 TRKA-10D815R Page 46 of 48
B14 CF14 Reserved
B15 CF15 Reserved

Watchdog and Reset Status


B0 POR 1 = Power-on reset occurred
B1 BOR 1 = Brown-out reset occurred
B2 WR1 Reserved
B3 WR2 Reserved
B4 WDTO 1 = Watchdog timer time-out has occurred
B5 WR4 Reserved
B6 SWR 1 = A reset instruction has been executed
B7 EXTR 1 = A master clear reset has occurred
B8 WR8 Reserved
B9 WR9 Reserved
B10 WR10 Reserved
B11 WR11 Reserved
B12 WR12 Reserved
B13 WR13 Reserved
B14 IOPUWR 1=An illegal opcode detection caused a reset
B15 TRAPR 1=A trap conflict reset has occurred

PMBus Command 0x01 Status


Bit Bit Bit Bit Bit Bit Bit Bit On State
7 6 5 4 3 2 1 0
0 0 x x x x x 1 Immediate Off No Sequencing
0 1 x x x x x 1 Turn Off in Reverse Sequence
1 0 0 0 x x x 1 On Sequenced Start Up
1 0 0 1 0 1 1 x On Sequenced Start Up
1 0 0 1 1 0 1 x On Sequenced Start Up
1 0 1 0 0 1 1 x On Sequenced Start Up
1 0 1 0 1 0 1 x On Sequenced Start Up

PMBus Command 0x02 Status


Bit Bit Bit Bit Bit Bit Bit Bit Enable Method
7 6 5 4 3 2 1 0
0 0 0 x x x x 0 Not Supported
0 0 0 x x x x 1 Immediate Turn Off
0 0 1 x x x x 0 Active Low Control Pin (Board Seated)
0 0 1 x x x x 1 Active High Control Pin (Board Seated)
0 1 0 x x x x 0 On/Off Controlled by OPERATION Command only
0 1 0 x x x x 1 On/OFF Controlled by the Control Pin Only
0 1 1 x x x x 0 On/OFF Portion of the Operation Command is Ignored
0 1 1 x x x x 1 On/Off Portion of the Operation Command is Active
1 0 0 x x x x 0 Ignores Enable Commands - System Powers up on Valid Vin
1 0 0 x x x x 1 Enable uses OPERATION Command and Control Pin

Bootloader Status
010 = Prepare CMD for Application Firmware Download
000 = Reboot CMD and Upgrade Application Firmware
011 = Prepare CMD Configuration Table Download
Revision G1 TRKA-10D815R Page 47 of 48
001 = Reboot CMD and Upgrade Configuration Table
Others = Reserved
101 = Prepare CMD for boot block download
100 = Reboot CMD and upgrade boot block

Input, APoL, DPoL, and Analog Voltages


10-bit ADC:
Converted Analog Voltage = (256*voltage high byte + voltage low byte)/1023*3*(Ra+Rb)/Rb Unit: V
12-bit ADC:
Converted Analog Voltage = (256*voltage high byte + voltage low byte)/4095*3*(Ra+Rb)/Rb Unit: V

Running Time
CMD running time before power down.

Configuration Data Saved Counter


Indicates the number of times that the configuration data has been saved (through the Store User Data or Restore
All Defaults command) or boot loaded.

Revision G1 TRKA-10D815R Page 48 of 48

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