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+
VDD
VGG
+
Fig. 1
2. Set VDD to +20V, increase the value of VGG until ID just reaches 0 to get VGS(off). Note that ID is also
equal to voltage across RD divided by RD.
3. Set VGG to 0V and record the values of ID and VDS as VDD is increased from 0 to 20V in increments
of 1V.
4. Change VGG to -1V and repeat step 3. Note your Results.
5. Change VGG to -2V and repeat step 3. Note your Results.
6. Using MS Excel, plot the graph of ID vs VDS from the results obtained in step 3, 4, and 5 above.
7. Use your results to plot the transfer characteristics curve.
8. From the graph obtained in step 7, obtain the value of IDSS.
1
EE212 | Analog Electronics I Name:
First Name Surname
Lab 7
ID #:
RD
1.5k C3
10uF
+
C1
10uF
Vin
+
RL
RG RS 10k
+
10M 560 C2
1uF
Fig. 2
2. Using one trace of the CRO, adjust the signal generator to 100mVp-p at 10kHz.
3. Using the other trace of the CRO, check that the output waveform is not distorted. (Reduce the
output of the signal generator, as necessary, until an undistorted amplifier output waveform is
obtained.)
4. Measure and record this value of peak-peak signal generator output voltage which represents the
input voltage to the amplifier, Vin.
5. Measure and record the corresponding value of peakpeak amplifier output voltage, Vout. (Vout should
be approximately 10 times Vin)
6. Determine the voltage gain of the amplifier as Av = Vout/Vin.
7. Using both traces of the CRO, measure and record the phase shift, between the input and output
signals.
8. Show the procedure for calculating the forward transconductance, gm for the JFET and the voltage
gain, Av of the amplifier.
9. What will be the equation for voltage gain without the bypass capacitor?