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Lecture 01
Introduction to
Microcomputers
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Definitions - basic
AAiT
Cycle
-Period of the CPU clock
-The fundamental unit of time for CPU activity
Instruction
A meaningful command to be executed by the CPU along with
the data operands.
Register
The fastest temporary data storage in the memory hierarchy
ALU
A digital logic circuit to process logic and arithmetic
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Definitions - basic
AAiT
Memory
-One of the two basic elements of a computer system
(paging, virtual and physical memory, MMU)
Memory hierarchy
Register Cache(levels)RAMDisks
Cache
-fast static memory to hold most frequently used data/instruction
-Multiple levels of cache
- Cache coherency
- Cache flushing
- Cache replacement
- Hit ratio
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Definitions - arch
AAiT
CISC
-Complex instructions, Simpler compiler, complex and large
hardware
RISC
-Few and simple instructions, complex compilers, small and
simple hardware
Pipeline
- A structure just like a product assembly line
- Process the next task while the current one is in progress
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Definitions - Arch
AAiT
Scalar Vs Superscalar
Executing multiple instruction in a single cycle using a single
CPU by Utilizing computing resources effectively
(SIMD, MIMD, )
In-Order Vs Out-of-order
Instructions can be executed in order sequentially or out of
order depending on the availability of data.
Issue
A term used to describe as to how the instruction execution
should flow determining branch targets
Branch prediction
Dual-issue
Speculative-issue,
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Definitions - Hardware
AAiT
Process
Determines the kind of layout used to implement the digital
logic cells. (CMOS, HMOS, LP-CMOS, DMS, )
Bonding
Metal interconnection inside the chip
Packaging
How the chip is delivered
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Definitions - Systems
AAiT
Microprocessor,
Microcontroller,
System on Chip,
DSP and
ASIC
What is the difference anyway??
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Definitions - Systems
AAiT
Microcontroller
Small General purpose control
A computer on a single chip
On-chip memory, I/O ports, controllers,
Easy to work with
Low power consumption
Very Low cost
Usually low speed
Limited memory size
Microprocessor
General purpose intensive computation
Unlimited memory size
highest power consumption
higher cost
Usually contains only CPU, control & cache on chip
requires lot of external hardware
(e.g. 8086, Pentium, Core i7, MIPS, ARM Cortex, )
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Definitions - Systems
AAiT
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Definitions - Systems
AAiT
Applications
Middleware/Frameworks
Operating System
Firmware/Drivers
Hardware
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Evolution of the P
AAiT
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Evolution of the P
AAiT
Intel 8086/8088
1978, 16 bit: 8088, 1979, 8-bit external bus
IBM PC; 1981
29,000 Trs.
Intel 80286
1982, 16-bit architecture
24-bit addressing, memory protection and virtual memory
16 MB of physical MEM and 1 GB of virtual mem
130,000 Trs. onto a single chip
IBM PC/AT in 1984, IBM PS/2 Model 50 and 60
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History of Intels Pcntd AAiT
Intel 80386
1985, 32 bits
3-5 MIPS (7 MIPS on the 25 MHz chip)
memory paging and enhanced I/O permission features
4GB programming model
Intel 80486
1,200,000 Trs.
386+387+8K data and instruction cache, paging and MMU
Intel Pentium III
1999; MMX + Internet Streaming SIMD Instructions
0.25 micron, 9.5 million Trs., 600 MHz, Superscalar arch.
32 K(16K/16K) non-blocking level 1 cache
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History of Intels Pcntd
AAiT
Intel Core i7
March 2008, Nehalem micro-architecture, 3.066GHZ
45nm CMOS process, 731 million trs., up to 8cores/chip
Integrated Memory, graphics and direct media interface controller
Simultaneous hyper-treading, turbo-boost technology,
32K instruction & 32K L1 data cache/core, 256K L2 cache/core
8MB L3 cache,
Speculative-issue, out-of-order, superscalar microprocessor
(More on www.intel.com/products/processors/corei7)
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ARM History - ARM Ltd AAiT
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ARM History 1985-1995
AAiT
1985
Acorn Computer Group develops the world's rst commercial RISC processor
1987
Acorn's ARM processor debuts as the rst RISC processor for low-cost PCs
1990
Advanced RISC Machines (ARM) spins out of Acorn and Apple Computer's
collaboration efforts with a charter to create a new microprocessor standard.
VLSI Technology becomes an investor and the first licensee
1993
ARM introduces the ARM7 core
1994
Samsung license ARM technology
1995
ARM's Thumb architecture extension gives 32-bit RISC performance at 16-bit
system cost and offers industry-leading code density
ARM extends family with ARM8 high-performance solution
ARM launches the ARM7100 "PDA-on-a-chip
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ARM History 1996-2002
AAiT
1997
ARM and MicrosoE work together to extend Windows CE to the ARM architecture
1998
ARM Partners ship more than 50 million ARM Powered products
Intel licensees the ARM X-Scale Architecture
2000
ARM introduces Jazelle technology for Java applications
ARM introduces the ARM926EJ-S soft macrocell with enhanced DSP
2002
ARM introduces the SecurCore SC200 and SC210 microprocessor cores
2003
ARM partners ships more than 1 billion ARM powered devices!
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ARM History Present
AAiT
ARM Cortex
Cortex A8
in-order, dual-issue, Superscalar, 13 stage pipeline
32k/32k instruction/data L1 cache, 256K unified L2 cache
Neon SIMD Multimedia engine, Vector floating point coprocessor
Jazzele Java technology
600MHz 1.2GHz speed, 2.0 instruction/cycle
(Apple A4, Samsung Hamming Bird, TI OMAP3, Motorola Dragon Ball, etc.)
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Compare/contrast
AAiT
In modern Ps, the best features from the different types
is taken to achieve the maximum performance.
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Compare/contrastRISC Vs CISC
AAiT
CISC
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RISC Vs CISCcntd
AAiT
RISC
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Compare/contrastperformance
AAiT
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AAiT
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Trends - Hardware
AAiT
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Trends - Architecture
AAiT
Computing in hardware
Dedicate a HW unit for a certain frequent function
Layered Architecture
- Keep system functions in a hierarchy
- Precedence dependency and order
- Stochastic execution paradigm
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Trends - Computing
AAiT
Heterogeneous Computing
Mixed platforms mixed algorithm mixed solution
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Next Lecture: AAiT
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