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Colour Television Chassis

Q552.2E
LA

19100_000_110214.eps
110505

Contents Page Contents Page


1. Revision List 2 B02 313912365192 148
2. Technical Specifications, Diversity, and Connections2 B03 313912365192 157
3. Precautions, Notes, and Abbreviation List 9 B04 313912365192 165
4. Mechanical Instructions 13 B05 313912365192 170
5. Service Modes, Error Codes, and Fault Finding 24 B06 313912365192 171
6. Alignments 43 B07 313912365192 175
7. Circuit Descriptions 51 B08 313912365192 176
8. IC Data Sheets 58 B09 313912365192 178
9. Block Diagrams B10 313912365192 179
Wiring diagram Blockbuster 32" 71 313912365192 SSB Layout 180
Wiring diagram Blockbuster 37" 72 E 27221719026x IR/LED/Key Board 182
Wiring diagram Blockbuster 40" - 55" 73 E 27221719027x IR/LED/Key Board 183
Wiring diagram Sundance 32" 74 E 27221719028x IR/LED/Key Board 184
Wiring diagram Sundance 42" - 47" 75 E 27221719029x IR/LED/Key Board 185
Block Diagram Video 76 AL1 820400091574 186
Block Diagram Audio 77 AL3 820400091562 188
Block Diagram Control & Clock Signals 78 AL3 820400091583 189
Block Diagram I2C 79 AL3 820400091592 192
Supply Lines Overview 80 AL 310431364792 AmbiLight Layout 195
10. Circuit Diagrams and PWB Layouts Drawing AL 310431364803 AmbiLight Layout 196
A01 272217190337 PSU 81 AL 310431364812 AmbiLight Layout 197
A01 272217190338 PSU 85 TS1 313912365252 198
A01 272217190339 PSU 89 11. Styling Sheets
B01 393912364954 93 Blockbuster 32" 199
B02 393912364954 104 Blockbuster 37" 200
B03 393912364954 113 Blockbuster 40"& 46" 201
B04 393912364954 121 Blockbuster 55" 202
B05 393912364954 126 Sundance 32" 203
B06 393912364954 127 Sundance 42" & 47" 204
B07 393912364954 131
B08 393912364954 132
B09 393912364954 134
313912364954 SSB Layout 135
B01 313912365192 137

Copyright 2011 Koninklijke Philips Electronics N.V.


All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

Published by ER/TY 1165 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 19103
2011-Jun-01
EN 2 1. Q552.2E LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
First release.

Manual xxxx xxx xxxx.1


Chapter 2: Table 2-1 updated (added CTNs).
Chapter 6: added Option codes at bit level;
see 6.4.6 Option Bit Overview.
Chapter 11: added 55" styling sheet.

Manual xxxx xxx xxxx.2


Chapter 2: Table 2-1 updated (added CTNs).

Manual xxxx xxx xxxx.3


Chapter 2: added connection overview; see Figure 2-1.
Chapter 6: added White tone alignment values see Table
6-1 to Table 6-15.
Chapter 7 + 10: revelation of detailed Power Supply Unit
information to support component level repair;
see Table 2-1.

2. Technical Specifications, Diversity, and Connections


Index of this chapter: 2.1 Technical Specifications
2.1 Technical Specifications
2.2 Directions for Use
For on-line product support please use the CTN links in Table
2.3 Connections
2-1. Here is product information available, as well as getting
2.4 Chassis Overview started, user manuals, frequently asked questions and
software & drivers.
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).

Table 2-1 Described Model Numbers and Diversity

SSB 2 4 7 9 10
Mechanics Descriptions Schematics
TS (Temperature Sensor)
ALxx (Ambilight) LiteOn

B06 (non-DVBS-LVDS)

B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Connection Overview

E (IR/LED/Key Board)
Assembly Removal

B08 (DVBS-Supp.)
B02 (PNX85500)
Wiring Diagram
3139 123 xxxxx

B07 (DVBS-FE)
Wire Dressing

LCD Removal

B01 (Tuner)
AmbiLight

B05 (DDR)
B04 (I/O)
A (PSU)

DVBT-2
TCON
PSU

CTN Styling
32PFL6606H/12 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6606H/60 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-26 -
11-1
32PFL6606K/02 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6606M/08 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6626H/12 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6626K/02 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6626M/08 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6636H/12 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6636K/02 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL6636M/08 Blockbuster 64954 2-2 4-1 4.3 4.3.7 7.2.2 - - 9-1 10-1 - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-1
32PFL7406H/12 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7406K/02 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7406M/08 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7476H/12 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30

2011-Jun-01 back to
div. table
Technical Specifications, Diversity, and Connections Q552.2E LA 2. EN 3

SSB 2 4 7 9 10
Mechanics Descriptions Schematics

TS (Temperature Sensor)
ALxx (Ambilight) LiteOn

B06 (non-DVBS-LVDS)

B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Connection Overview

E (IR/LED/Key Board)
Assembly Removal

B08 (DVBS-Supp.)
B02 (PNX85500)
Wiring Diagram
3139 123 xxxxx

B07 (DVBS-FE)
Wire Dressing

LCD Removal

B01 (Tuner)

B05 (DDR)
AmbiLight

B04 (I/O)
A (PSU)

DVBT-2
TCON
PSU
CTN Styling
32PFL7476K/02 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7486H/12 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7486K/02 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7486M/08 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7496H/12 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
32PFL7496K/02 Sundance 65192 2-1 - 4.4 4.4.8 7.2.3 - - 9-4 - 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-5 10-30
37PFL6606H/12 Blockbuster 64954 2-2 4-2 4.3 4.3.7 7.2.3 - - 9-2 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-2
37PFL6606H/60 Blockbuster 64954 2-2 - 4.4 4.4.8 7.2.3 - - 9-2 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-26 -
11-2
37PFL6606K/02 Blockbuster 64954 2-2 4-2 4.3 4.3.7 7.2.3 - - 9-2 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-2
37PFL6606M/08 Blockbuster 64954 2-2 4-2 4.3 4.3.7 7.2.3 - - 9-2 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-2
40PFL6606H/12 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6606H/60 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-26 -
11-3
40PFL6606K/02 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6606M/08 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6626H/12 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6626K/02 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6626M/08 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6636H/12 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6636K/02 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
40PFL6636M/08 Blockbuster 64954 2-2 4-3 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
42PFL7406H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7406K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7406M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7456H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7456K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7456M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7486H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7486K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7486M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-2 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7606H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7606K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7606M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7666H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7666K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7676H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7676K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31

back to 2011-Jun-01
div. table
EN 4 2. Q552.2E LA Technical Specifications, Diversity, and Connections

SSB 2 4 7 9 10
Mechanics Descriptions Schematics

TS (Temperature Sensor)
ALxx (Ambilight) LiteOn

B06 (non-DVBS-LVDS)

B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Connection Overview

E (IR/LED/Key Board)
Assembly Removal

B08 (DVBS-Supp.)
B02 (PNX85500)
Wiring Diagram
3139 123 xxxxx

B07 (DVBS-FE)
Wire Dressing

LCD Removal

B01 (Tuner)

B05 (DDR)
AmbiLight

B04 (I/O)
A (PSU)

DVBT-2
TCON
PSU
CTN Styling
42PFL7696H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7696K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
42PFL7696M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-31
46PFL6606H/12 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-25 -
11-3
46PFL6606H/60 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-26 -
11-3
46PFL6606K/02 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-3
46PFL6606M/08 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-3
46PFL6626H/12 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-3
46PFL6626K/02 Blockbuster 64954 2-2 4-4 4.3 4.3.7 7.2.5 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-3
47PFL7606H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7606K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7606M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7666H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7666K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7696H/12 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7696K/02 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
47PFL7696M/08 Sundance 65192 2-1 - 4.4 4.4.8 - - - 9-5 10-3 10-29 10-14 10-15 10-16 10-17 10-18 10-19 10-20 10-21 10-22 10-23 10-28 10-36
11-6 10-32
55PFL6606H/12 Blockbuster 64954 2-2 4-5 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-4
55PFL6606H/60 Blockbuster 64954 2-2 4-5 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-26 -
11-4
55PFL6606K/02 Blockbuster 64954 2-2 4-5 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-4
55PFL6606M/08 Blockbuster 64954 2-2 4-5 4.3 4.3.7 7.2.4 - - 9-3 - - 10-4 10-5 10-6 10-7 10-8 10-9 10-10 10-11 10-12 - 10-27 -
11-4

2.2 Directions for Use

You can download this information from the following websites:


http://www.philips.com/support
http://www.p4c.philips.com

2011-Jun-01 back to
div. table
Technical Specifications, Diversity, and Connections Q552.2E LA 2. EN 5

2.3 Connections

REAR CONNECTORS SIDE CONNECTORS

PFL7XX6K

5
15
Optional

2
EXT 1
(RGB/CVBS)

3
16
BOTTOM REAR CONNECTORS

7 9 10 10 11 12 13 14
17

17

19

19103_001_110525.eps
110525

Figure 2-1 Connection overview (Sundance)

back to 2011-Jun-01
div. table
EN 6 2. Q552.2E LA Technical Specifications, Diversity, and Connections

REAR CONNECTORS SIDE CONNECTORS

15

16
BOTTOM REAR CONNECTORS
7 8 10 11 13 14
17

18

19

19100_043_110214.eps
110525

Figure 2-2 Connection overview (Blockbuster)

Note: The following connector colour abbreviations are used 15 - Video Red 0.7 VPP / 75 ohm j
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= 16 - Status/FBL 0 - 0.4 V: INT
Grey, Rd= Red, Wh= White, Ye= Yellow. 1 - 3 V: EXT / 75 ohm j
17 - Ground Video Gnd H
2.3.1 Rear Connections 18 - Ground FBL Gnd H
19 - Video CVBS/Y 1 VPP / 75 ohm k
20 - Video CVBS 1 VPP / 75 ohm j
1 - EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out
21 - Shield Gnd H
20 2

2 - Service Connector (UART)


21 1
1 - Ground Gnd H
10000_001_090121.eps
090121
2 - UART_TX Transmit k
3 - UART_RX Receive j
Figure 2-3 SCART connector
3 - EXT2: Cinch: Video YPbPr - In, Audio - In
1 - Audio R 0.5 VRMS / 1 kohm k Gn - Video Y 1 VPP / 75 ohm jq
2 - Audio R 0.5 VRMS / 10 kohm j Bu - Video Pb 0.7 VPP / 75 ohm jq
3 - Audio L 0.5 VRMS / 1 kohm k Rd - Video Pr 0.7 VPP / 75 ohm jq
4 - Ground Audio Gnd H Rd - Audio - R 0.5 VRMS / 10 kohm jq
5 - Ground Blue Gnd H Wh - Audio - L 0.5 VRMS / 10 kohm jq
6 - Audio L 0.5 VRMS / 10 kohm j
7 - Video Blue 0.7 VPP / 75 ohm jk 4 - Cinch: Audio - In (VGA/DVI)
8 - Function Select 0 - 2 V: INT Rd - Audio R 0.5 VRMS / 10 kohm jq
4.5 - 7 V: EXT 16:9 Wh - Audio L 0.5 VRMS / 10 kohm jq
9.5 - 12 V: EXT 4:3 j
9 - Ground Green Gnd H
5 - SAT - In
10 - n.c.
- - F-type Coax, 75 ohm D
11 - Video Green 0.7 VPP / 75 ohm j
12 - n.c.
13 - Ground Red Gnd H 6 - Head phone (Output)
14 - Ground P50 Gnd H Bk - Head phone 32 - 600 ohm / 10 mW ot

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Technical Specifications, Diversity, and Connections Q552.2E LA 2. EN 7

2.3.2 Rear Connections - Bottom 10 - CLK+ Data channel j


11 - Shield Gnd H
7 - RJ45: Ethernet 12 - CLK- Data channel j
13 - Easylink/CEC Control channel jk
12345678 14 - ARC Audio Return Channel k
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
10000_025_090121.eps
090121 18 - +5V j
19 - HPD Hot Plug Detect j
Figure 2-4 Ethernet connector 20 - Ground Gnd H

1 - TD+ Transmit signal k 12 - Cinch: Audio - In (VGA/DVI)


2 - TD- Transmit signal k Rd - Audio R 0.5 VRMS / 10 kohm jq
3 - RD+ Receive signal j Wh - Audio L 0.5 VRMS / 10 kohm jq
4 - CT Centre Tap: DC level fixation
5 - CT Centre Tap: DC level fixation 13 - Aerial - In
6 - RD- Receive signal j - - IEC-type (EU) Coax, 75 ohm D
7 - GND Gnd H
8 - GND Gnd H
14 - VGA: Video RGB - In
1 5

8 - Cinch: S/PDIF - Out 6


10

kq 11 15
Bk - Coaxial 0.4 - 0.6VPP / 75 ohm
10000_002_090121.eps
090127
9 - Optical: S/PDIF - Out
Bk - Coaxial Optical signal k Figure 2-7 VGA Connector

10 - HDMI 2: Digital Video, Digital Audio - In 1 - Video Red 0.7 VPP / 75 ohm j
2 - Video Green 0.7 VPP / 75 ohm j
19 1
3 - Video Blue 0.7 VPP / 75 ohm j
18 2
4 - n.c.
10000_017_090121.eps
090428
5 - Ground Gnd H
6 - Ground Red Gnd H
Figure 2-5 HDMI (type A) connector 7 - Ground Green Gnd H
8 - Ground Blue Gnd H
1 - D2+ Data channel j 9 - +5VDC +5 V j
2 - Shield Gnd H 10 - Ground Sync Gnd H
3 - D2- Data channel j 11 - n.c.
4 - D1+ Data channel j 12 - DDC_SDA DDC data j
5 - Shield Gnd H 13 - H-sync 0-5V j
6 - D1- Data channel j 14 - V-sync 0-5V j
7 - D0+ Data channel j 15 - DDC_SCL DDC clock j
8 - Shield Gnd H
9 - D0- Data channel j 2.3.3 Side Connections
10 - CLK+ Data channel j
11 - Shield Gnd H 15 - Common Interface
12 - CLK- Data channel j 68p - See diagram B01A B01 393912364954 jk
13 - Easylink/CEC Control channel jk
14 - n.c. 16 - SD-Card: Secure Digital Card - In/Out (optional)
15 - DDC_SCL DDC clock j
14
16 - DDC_SDA DDC data jk GND
17 - Ground Gnd H WP 12
18 - +5V j GND 11
19 - HPD Hot Plug Detect j
CD 10
20 - Ground Gnd H
8 DAT1/IRQ
7 DAT0/D0
11 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/ 6 GND2
Out
5 CLOCK
19 1 4 VDD
18 2
3 GND1
10000_017_090121.eps 2 CMD/DI
090428
1 DAT3/CS
Figure 2-6 HDMI (type A) connector 9 DAT2/NC

GND
13
1 - D2+ Data channel j 10000_049_100210.eps
2 - Shield Gnd H 100210
3 - D2- Data channel j
4 - D1+ Data channel j Figure 2-8 SD-Card connector
5 - Shield Gnd H
6 - D1- Data channel j 1 - DAT3/CS Signal jk
7 - D0+ Data channel j 2 - CMD/DI Signal k
8 - Shield Gnd H 3 - GND1 Gnd H
9 - D0- Data channel j 4 - Vdd Supply k

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EN 8 2. Q552.2E LA Technical Specifications, Diversity, and Connections

5 - CLOCK Signal k 1 - +5V k


6 - GND2 Gnd H 2 - Data (-) jk
7 - DAT0/D0 Signal jk 3 - Data (+) jk
8 - DAT1/IRQ Signal jk 4 - Ground Gnd H
9 - DAT2/NC Signal jk
10 - CD Signal j 18 - Head phone (Output)
11 - GND Gnd H Bk - Head phone 32 - 600 ohm / 10 mW ot
12 - WP Signal j
13 - GND Gnd H 19 - HDMI : Digital Video, Digital Audio - In
14 - GND Gnd H
See 10 - HDMI 2: Digital Video, Digital Audio - In

17 - USB2.0

1 2 3 4
10000_022_090121.eps
090121

Figure 2-9 USB (type A)

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

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Precautions, Notes, and Abbreviation List Q552.2E LA 3. EN 9

3. Precautions, Notes, and Abbreviation List


Index of this chapter: Where necessary, measure the waveforms and voltages
3.1 Safety Instructions with (D) and without (E) aerial signal. Measure the
3.2 Warnings voltages in the power supply section both in normal
3.3 Notes operation (G) and in stand-by (F). These values are
3.4 Abbreviation List indicated by means of the appropriate symbols.

3.3.2 Schematic Notes


3.1 Safety Instructions
All resistor values are in ohms, and the value multiplier is
Safety regulations require the following during a repair:
often used to indicate the decimal point location (e.g. 2K2
Connect the set to the Mains/AC Power via an isolation
indicates 2.2 k).
transformer (> 800 VA).
Resistor values with no multiplier may be indicated with
Replace safety components, indicated by the symbol h,
either an E or an R (e.g. 220E or 220R indicates 220 ).
only by components identical to the original ones. Any
All capacitor values are given in micro-farads ( = 10-6),
other component substitution (other than original type) may
nano-farads (n = 10-9), or pico-farads (p = 10-12).
increase risk of fire or electrical shock hazard.
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
Safety regulations require that after a repair, the set must be
An asterisk (*) indicates component usage varies. Refer
returned in its original condition. Pay in particular attention to
to the diversity tables for the correct values.
the following points:
The correct component values are listed on the Philips
Route the wire trees correctly and fix them with the
Spare Parts Web Portal.
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage. 3.3.3 Spare Parts
Check the strain relief of the Mains/AC Power cord for
proper function. For the latest spare part overview, consult your Philips Spare
Check the electrical DC resistance between the Mains/AC Part web portal.
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply): 3.3.4 BGA (Ball Grid Array) ICs
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug. Introduction
2. Set the Mains/AC Power switch to the on position For more information on how to handle BGA devices, visit this
(keep the Mains/AC Power cord unplugged!). URL: http://www.atyourservice-magazine.com. Select
3. Measure the resistance value between the pins of the Magazine, then go to Repair downloads. Here you will find
Mains/AC Power plug and the metal shielding of the Information on how to deal with BGA-ICs.
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
BGA Temperature Profiles
4. Switch off the set, and remove the wire between the
For BGA-ICs, you must use the correct temperature-profile.
two pins of the Mains/AC Power plug.
Where applicable and available, this profile is added to the IC
Check the cabinet for defects, to prevent touching of any
Data Sheet information section in this manual.
inner parts by the customer.

3.3.5 Lead-free Soldering


3.2 Warnings
Due to lead-free technology some rules have to be respected
All ICs and many other semiconductors are susceptible to by the workshop during a repair:
electrostatic discharges (ESD w). Careless handling Use only lead-free soldering tin. If lead-free solder paste is
during repair can reduce life drastically. Make sure that, required, please contact the manufacturer of your soldering
during repair, you are connected with the same potential as equipment. In general, use of solder paste within
the mass of the set by a wristband with resistance. Keep workshops should be avoided because paste is not easy to
components and tools also at this same potential. store and to handle.
Be careful during measurements in the high voltage Use only adequate solder tools applicable for lead-free
section. soldering tin. The solder tool must be able:
Never replace modules or other components while the unit To reach a solder-tip temperature of at least 400C.
is switched on. To stabilize the adjusted temperature at the solder-tip.
When you align the set, use plastic rather than metal tools. To exchange solder-tips for different applications.
This will prevent any short circuits and the danger of a Adjust your solder tool so that a temperature of around
circuit becoming unstable. 360C - 380C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400C, otherwise wear-out of
3.3 Notes tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch off unused equipment or
3.3.1 General reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering
Measure the voltages and waveforms with regard to the tin/parts is possible but PHILIPS recommends strongly to
chassis (= tuner) ground (H), or hot ground (I), depending avoid mixed regimes. If this cannot be avoided, carefully
on the tested area of circuitry. The voltages and waveforms clear the solder-joint from old tin and re-solder with new tin.
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo 3.3.6 Alternative BOM identification
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for It should be noted that on the European Service website,
NTSC (channel 3). Alternative BOM is referred to as Design variant.
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EN 10 3. Q552.2E LA Precautions, Notes, and Abbreviation List

The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number 1 algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a 2 (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit
AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g.
AP Asia Pacific
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AR Aspect Ratio: 4 by 3 or 16 by 9
code, digit 4 refers to the Service version change code, digits 5
ASF Auto Screen Fit: algorithm that adapts
and 6 refer to the production year, and digits 7 and 8 refer to
aspect ratio to remove horizontal black
production week (in example below it is 2010 week 10 / 2010 bars without discarding video
week 17). The 6 last digits contain the serial number.
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
B-TXT Blue TeleteXT
10000_053_110228.eps
110228
C Centre channel (audio)
CEC Consumer Electronics Control bus:
Figure 3-1 Serial number (example) remote control bus on HDMI
connections
3.3.7 Board Level Repair (BLR) or Component Level Repair CL Constant Level: audio output to
(CLR) connect with an external amplifier
CLR Component Level Repair
If a board is defective, consult your repair procedure to decide ComPair Computer aided rePair
if the board has to be exchanged or if it should be repaired on CP Connected Planet / Copy Protection
component level. CSM Customer Service Mode
If your repair procedure says the board should be exchanged CTI Color Transient Improvement:
completely, do not solder on the defective board. Otherwise, it manipulates steepness of chroma
cannot be returned to the O.E.M. supplier for back charging! transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions Synchronization
DAC Digital to Analogue Converter
It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See E-DDC
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion

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Precautions, Notes, and Abbreviation List Q552.2E LA 3. EN 11

DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A key encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a snow vision mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP software key VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I 2C Inter IC bus software upgrade via RF transmission.
I2D Inter IC Data bus Upgrade software is broadcasted in
I2S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (colour
Telecommunication Union relating to carrier = 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (colour carrier

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EN 12 3. Q552.2E LA Precautions, Notes, and Abbreviation List

PAL M = 3.575612 MHz and SVGA 800 600 (4:3)


PAL N = 3.582056 MHz) SVHS Super Video Home System
PCB Printed Circuit Board (same as PWB) SW Software
PCM Pulse Code Modulation SWAN Spatial temporal Weighted Averaging
PDP Plasma Display Panel Noise reduction
PFC Power Factor Corrector (or Pre- SXGA 1280 1024
conditioner) TFT Thin Film Transistor
PIP Picture In Picture THD Total Harmonic Distortion
PLL Phase Locked Loop. Used for e.g. TMDS Transmission Minimized Differential
FST tuning systems. The customer Signalling
can give directly the desired frequency TS Transport Stream
POD Point Of Deployment: a removable TXT TeleteXT
CAM module, implementing the CA TXT-DW Dual Window with TeleteXT
system for a host (e.g. a TV-set) UI User Interface
POR Power On Reset, signal to reset the uP uP Microprocessor
PSDL Power Supply for Direct view LED UXGA 1600 1200 (4:3)
backlight with 2D-dimming V V-sync to the module
PSL Power Supply with integrated LED VESA Video Electronics Standards
drivers Association
PSLS Power Supply with integrated LED VGA 640 480 (4:3)
drivers with added Scanning VL Variable Level out: processed audio
functionality output toward external amplifier
PTC Positive Temperature Coefficient, VSB Vestigial Side Band; modulation
non-linear resistor method
PWB Printed Wiring Board (same as PCB) WYSIWYR What You See Is What You Record:
PWM Pulse Width Modulation record selection that follows main
QRC Quasi Resonant Converter picture and sound
QTNR Quality Temporal Noise Reduction WXGA 1280 768 (15:9)
QVCP Quality Video Composition Processor XTAL Quartz crystal
RAM Random Access Memory XGA 1024 768 (4:3)
RGB Red, Green, and Blue. The primary Y Luminance signal
color signals for TV. By mixing levels Y/C Luminance (Y) and Chrominance (C)
of R, G, and B, all colors (Y/C) are signal
reproduced. YPbPr Component video. Luminance and
RC Remote Control scaled color difference signals (B-Y
RC5 / RC6 Signal protocol from the remote and R-Y)
control receiver YUV Component video
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorcepteurs et
Tlviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see ITU-656
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mmoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY

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Mechanical Instructions Q552.2E LA 4. EN 13

4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Blockbuster Styling (xxPFL66xx/xx series)
4.2 Service Positions
4.3 Assy/Panel Removal Blockbuster Styling (xxPFL6xxx/xx
series)
4.4 Assy/Panel Removal Sundance Styling (xxPFL7xxx/xx
series)
4.5 Set Re-assembly
Notes:
Figures below can deviate slightly from the actual situation,
due to the different set executions.

4.1 Cable Dressing Blockbuster Styling (xxPFL66xx/xx series)

19100_044_110214.eps
110214

Figure 4-1 Cable dressing 32PFL6606x/xx (Blockbuster)

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EN 14 4. Q552.2E LA Mechanical Instructions

19100_045_110214.eps
110214

Figure 4-2 Cable dressing 37PFL6606x/xx (Blockbuster)

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Mechanical Instructions Q552.2E LA 4. EN 15

19100_046_110214.eps
110214

Figure 4-3 Cable dressing 40PFL6606x/xx (Blockbuster)

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EN 16 4. Q552.2E LA Mechanical Instructions

19101_001_110407.eps
110407

Figure 4-4 Cable dressing 46PFL6606x/xx (Blockbuster)

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Mechanical Instructions Q552.2E LA 4. EN 17

19101_002_110407.eps
110407

Figure 4-5 Cable dressing 55PFL6606x/xx (Blockbuster)

4.2 Service Positions Additional instructions for Blockbuster 40-/46PFL6606x/xx


40"and 46"Blockbuster (40-/46PFL6606x/xx) sets have a
dedicated method to open the bottom catches when removing
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop the rear cover.
Refer to Figure 4-6 and Figure 4-7 for details.
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.

4.3 Assy/Panel Removal Blockbuster Styling


(xxPFL6xxx/xx series)
1 1
For the 40" and 46" Blockbuster sets, additional instructions
19100_048_110216.eps
(rear cover removal) apply. Refer to subsection Additional 110216
instructions for Blockbuster 40-/46PFL6606x/xx.
Figure 4-6 Bottom catches 40" and 46" Blockbuster sets -1-
The instructions apply to the 37PFL6606H/12.

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove


the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.

1. Remove all screws of the rear cover.


2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
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EN 18 4. Q552.2E LA Mechanical Instructions

2 2
1

1
2

19100_049_110216.eps
110216

Figure 4-7 Bottom catches 40" and 46" Blockbuster sets -2- 2 2

It is advised to lay the set with front facing down before


19101_008_110407.eps
executing this operation. 110407
1. Remove all screws from the rear cover.
2. Use a round rod (diameter 2 mm) and insert it in one of the Figure 4-9 Main Power Supply
holes [1].
3. Push the catch located inside the rear cover away by 1. Unplug all connectors [1].
inserting the rod [2] through the hole and lifting the rear 2. Remove the fixation screws [2].
cover at the same time. 3. Take the board out.
4. Repeat the same procedure on the other hole. When defective, replace the whole unit.

4.3.2 Speakers 4.3.5 Small Signal Board (SSB)

Tweeters Refer to Figure 4-18 for details.


Each tweeter unit is mounted with two screws.
When defective, replace the whole unit.

Subwoofer
The central subwoofer is located in the centre of the set and is
secured by two bosses.
When defective, replace the whole unit.
2 2
1
4.3.3 Mains Switch

Refer to Figure 4-16 for details.


2 2

2 2

19101_007_110407.eps
110407

19100_047_110216.eps Figure 4-10 SSB


110216
1. Unplug all connectors [1].
Figure 4-8 Mains switch 2. Remove the fixation screws [2].
3. Take the board out.
The mains switch is mounted on a plastic subframe and can be When remounting, ensure that the side shielding is positioned
removed without removing the subframe. correctly.
1. Use a screwdriver and push the switch out of its casing [1].
2. Unplug the connectors.
When defective, replace the whole unit.

4.3.4 Main Power Supply

Refer to Figure 4-17 for details.

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Mechanical Instructions Q552.2E LA 4. EN 19

4.3.6 Keyboard Control, IR & LED Board

Refer to Figure 4-19 and Figure 4-20 for details.


2 2

1 1

1 1

19101_009_110407.eps
110407
2 2
2 3 3 2
Figure 4-11 Keyboard control, IR & LED board [1/2]

19101_006_110407.eps
110407

Figure 4-12 Keyboard control, IR & LED board [2/2]

1. Remove the stand [1].


2. Remove the stand subframe [2].
3. Remove the screws [3], unplug the connector and take the
board out.
When defective, replace the whole unit.

19101_005_110407.eps
110407

Figure 4-13 LCD panel [1/3]

1. Remove the SSB as described earlier. 6. Remove the mains switch subframe [2].
2. Remove the PSU as described earlier. 7. Remove the keyboard control-, and IR & LED board as
3. Remove the tweeters with their subframes and subwoofer described earlier.
as described earlier. 8. Remove all remaining cables and subframes.
4. Remove the stand and -subframe as described earlier. 9. Use a screwdriver to release the catches [3] that secure the
5. Remove the cables [1]. panel.

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EN 20 4. Q552.2E LA Mechanical Instructions

10. Use a screwdriver to release the catches and remove the 4.4.2 Speakers
sidewings [4] that secure the panel.
11. Take the panel out. Tweeters
Remove the clamps from the panel before sending the panel in Each tweeter unit is mounted with one screw.
for Service. When defective, replace the whole unit.

Subwoofer
The central subwoofer is located in the centre of the set and is
3 secured by two bosses.
When defective, replace the whole unit.

4.4.3 Mains Switch

Refer to Figure 4-16 for details.

19101_004_110407.eps
110407
1
Figure 4-14 LCD panel [2/3]

19100_047_110216.eps
110216

Figure 4-16 Mains switch

The mains switch is mounted on a plastic subframe and can be


removed without removing the subframe.
1. Use a screwdriver and push the switch out of its casing [1].
2. Unplug the connectors.
When defective, replace the whole unit.

4 4.4.4 Main Power Supply

Refer to Figure 4-17 for details.

2 2
19101_003_110407.eps
110407

Figure 4-15 LCD panel [3/3] 1

4.4 Assy/Panel Removal Sundance Styling


(xxPFL7xxx/xx series)

The instructions apply to the 32PFL7406K/02.


2 2
4.4.1 Rear Cover
1

Warning: Disconnect the mains power cord before you remove


19100_050_110216.eps
the rear cover. 110216
Note: it is not necessary to remove the stand while removing
the rear cover. Figure 4-17 Main Power Supply

1. Remove all screws of the rear cover. 1. Unplug all connectors [1].
2. Lift the rear cover from the TV. Make sure that wires and 2. Remove the fixation screws [2].
flat coils are not damaged while lifting the rear cover from 3. Take the board out.
the set. When defective, replace the whole unit.

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Mechanical Instructions Q552.2E LA 4. EN 21

4.4.5 Small Signal Board (SSB) 1. Remove the stand and the plastic support [1].
2. Unplug the connector [2].
Refer to Figure 4-18 for details. 3. Remove the screws [3] and take the board out.
When defective, replace the whole unit.

4.4.7 Ambilight Units

The Ambilight units can be lifted from the subframes without


the use of tools.
2 2 Refer to Figure 4-21 for details.
1

2 2

1
2 1 2

19100_051_110216.eps
110216

Figure 4-18 SSB


19100_054_110216.eps
1. Unplug all connectors [1]. 110216

2. Remove the fixation screws [2].


3. Take the board out. Figure 4-21 Ambilight units
When remounting, ensure that the side shielding is positioned
correctly. 1. Unplug the connector [1].
2. Carefully lift the board [2] and take the board out.
When defective, replace the whole unit.
4.4.6 Keyboard Control, IR & LED Board

Refer to Figure 4-19 and Figure 4-20 for details.

1 1
1

1
1 1

19100_052_110216.eps
110216

Figure 4-19 Keyboard control, IR & LED board [1/2]

3
2 2 2

19100_053_110216.eps
110216

Figure 4-20 Keyboard control, IR & LED board [2/2]

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EN 22 4. Q552.2E LA Mechanical Instructions

4.4.8 LCD Panel

Refer to Figure 4-22 and Figure 4-23 for details.

4 4 4

2 2

1
4 4 4 4
2 2

19100_055_110216.eps
110216

Figure 4-22 LCD panel [1/2]

1. Remove the SSB as described earlier.


2. Remove the PSU as described earlier.
3. Remove the tweeters with their subframes and subwoofer
as described earlier.
4. Remove the stand and -support as described earlier.
5. Remove the cables [1].
6. Remove the stand subframe [2].
7. Remove the mains switch subframe [3].
8. Remove the Ambilight units together with their subframes
as described earlier.
9. Unplug the connector from the keyboard control-, and IR &
4
LED board as described earlier.
10. Remove all remaining cables and subframes. 19100_056_110217.eps
11. Use a screwdriver to release the clamps [4] that secure the 110217
panel and take the panel out.
Remove the clamps from the panel before sending the panel in Figure 4-23 LCD panel [2/2]
for Service.

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Mechanical Instructions Q552.2E LA 4. EN 23

4.5 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse


order.

Notes:
While re-assembling, make sure that all cables are placed
and connected in their original position.
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.

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EN 24 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding


Index of this chapter: All service-unfriendly modes (if present) are disabled, like:
5.1 Test Points (Sleep) timer.
5.2 Service Modes Child/parental lock.
5.3 Stepwise Start-up Picture mute (blue mute or black mute).
5.4 Service Tools Automatic volume levelling (AVL).
5.5 Error Codes Skip/blank of non-favourite pre-sets.
5.6 The Blinking LED Procedure
5.7 Protections How to Activate SDM
5.8 Fault Finding and Repair Tips For this chassis there are two kinds of SDM: an analogue SDM
5.9 Software Upgrading and a digital SDM. Tuning will happen according Table 5-1.
Analogue SDM: use the standard RC-transmitter and key
in the code 062596, directly followed by the MENU (or
5.1 Test Points
HOME) button.
Note: It is possible that, together with the SDM, the main
As most signals are digital, it will be difficult to measure menu will appear. To switch it off, push the MENU (or
waveforms with a standard oscilloscope. However, several key "HOME") button again.
ICs are capable of generating test patterns, which can be Analogue SDM can also be activated by grounding for a
controlled via ComPair. In this way it is possible to determine moment the solder path on the SSB, with the indication
which part is defective. SDM (see Service mode pad).
Digital SDM: use the standard RC-transmitter and key in
Perform measurements under the following conditions: the code 062593, directly followed by the MENU (or
Service Default Mode. "HOME") button.
Video: Colour bar signal. Note: It is possible that, together with the SDM, the main
Audio: 3 kHz left, 1 kHz right. menu will appear. To switch it off, push the MENU (or
"HOME") button again.
5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode


(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.
SDM
This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.4.1 ComPair).
19100_057_110217.eps
Note: For the new model range, a new remote control (RC) is 110217

used with some renamed buttons. This has an impact on the


activation of the Service modes. For instance the old MENU Figure 5-1 Service mode pad
button is now called HOME (or is indicated by a house icon).
After activating this mode, SDM will appear in the upper right
5.2.1 Service Default Mode (SDM) corner of the screen (when a picture is available).

Purpose How to Navigate


To create a pre-defined setting, to get the same When the MENU (or HOME) button is pressed on the RC
measurement results as given in this manual. transmitter, the TV set will toggle between the SDM and the
To override SW protections detected by stand-by normal user menu.
processor and make the TV start up to the step just before
protection (a sort of automatic stepwise start-up). See How to Exit SDM
section 5.3 Stepwise Start-up. Use one of the following methods:
To start the blinking LED procedure where only LAYER 2 Switch the set to STAND-BY via the RC-transmitter.
errors are displayed. (see also section 5.5 Error Codes). Via a standard customer RC-transmitter: key in 00-
sequence.
Specifications
5.2.2 Service Alignment Mode (SAM)
Table 5-1 SDM default settings
Purpose
To perform (software) alignments.
Default
To change option settings.
Region Freq. (MHz) system
To easily identify the used software version.
Europe, AP(PAL/Multi) 475.25 PAL B/G To view operation hours.
Europe, AP DVB-T 546.00 PID DVB-T To display (or clear) the error code buffer.
Video: 0B 06 PID
PCR: 0B 06 PID How to Activate SAM
Audio: 0B 07 Via a standard RC transmitter: Key in the code 062596
directly followed by the INFO or OK button. After activating
All picture settings at 50% (brightness, colour, contrast). SAM with this method a service warning will appear on the
Sound volume at 25%. screen, continue by pressing the OK button on the RC.

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 25

Contents of SAM
Hardware Info.
A. SW Version. Displays the software version of the
main software (example: Q555X-1.2.3.4 =
AAAAB_X.Y.W.Z). Display Option
Code
AAAA= the chassis name.
B= the SW branch version. This is a sequential
number (this is no longer the region indication, as
39mm
the software is now multi-region).
PHILIPS 040

X.Y.W.Z= the software version, where X is the

27mm
MODEL:
32PF9968/10
main version number (different numbers are not PROD.SERIAL NO:

compatible with one another) and Y.W.Z is the sub AG 1A0620 000001

(CTN Sticker)
version number (a higher number is always
compatible with a lower number). 10000_038_090121.eps
B. STBY PROC Version. Displays the software 090819
version of the stand-by processor.
C. Production Code. Displays the production code of Figure 5-2 Location of Display Option Code sticker
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is Store - go right. All options and alignments are stored
initialized after corruption, this production code has to when pressing cursor right (or the OK button) and then
be re-written to NVM. ComPair will foresee in a the OK-button.
possibility to do this. Operation hours display. Displays the accumulated total
Operation Hours. Displays the accumulated total of of operation hours of the screen itself. In case of a display
operation hours (not the stand-by hours). Every time the replacement, reset to 0 or to the consumed operation
TV is switched on/off, 0.5 hours is added to this number. hours of the spare display.
Errors (followed by maximum 10 errors). The most recent SW Maintenance.
error is displayed at the upper left (for an error explanation SW Events. In case of specific software problems, the
see section 5.5 Error Codes). development department can ask for this info.
Reset Error Buffer. When cursor right (or OK button) HW Events. In case of specific software problems, the
pressed here, followed by the OK button, the error buffer development department can ask for this info :
is reset. - Event 26: refers to a power dip, this is logged after
Alignments. This will activate the ALIGNMENTS sub- the TV set reboots due to a power dip.
menu. See Chapter 6. Alignments. - Event 17: refers to the power OK status, sensed even
Dealer Options. Extra features for the dealers. before the 3 x retry to generate the error code.
Options. Extra features for Service. For more info Test settings. For development purposes only.
regarding option codes, see chapter 6. Alignments. Development file versions. Not useful for Service
Note that if the option code numbers are changed, these purposes, this information is only used by the development
have to be confirmed with pressing the OK button before department.
the options are stored, otherwise changes will be lost. Upload to USB. To upload several settings from the TV to
Initialize NVM. The moment the processor recognizes a an USB stick, which is connected to the SSB. The items are
corrupted NVM, the initialize NVM line will be highlighted. Channel list, Personal settings, Option codes,
Now, two things can be done (dependent of the service Alignments, Identification data (includes the set type
instructions at that moment): and prod code + all 12NC like SSB, display, boards),
Save the content of the NVM via ComPair for History list. The All item supports to upload all several
development analysis, before initializing. This will give items at once.
the Service department an extra possibility for First a directory repair\ has to be created in the root
diagnosis (e.g. when Development asks for this). of the USB stick.
Initialize the NVM. To upload the settings, select each item separately, press
cursor right (or the OK button), confirm with OK and
Note: When the NVM is corrupted, or replaced, there is a high wait until the message Done appears. In case the
possibility that no picture appears because the display code is download to the USB stick was not successful, Failure will
not correct. So, before initializing the NVM via the SAM, a be displayed. In this case, check if the USB stick is
picture is necessary and therefore the correct display option connected properly and if the directory repair is present in
has to be entered. Refer to Chapter 6. Alignments for details. the root of the USB stick. Now the settings are stored onto
To adapt this option, its advised to use ComPair (the correct the USB stick and can be used to download into another TV
values for the options can be found in Chapter 6. Alignments) or other SSB. Uploading is of course only possible if the
or a method via a standard RC (described below). software is running and preferably a picture is available.
Changing the display option via a standard RC: Key in the This method is created to be able to save the customers
code 062598 directly followed by the MENU (or "HOME") TV settings and to store them into another SSB.
button and XXX (where XXX is the 3 digit decimal display Download from USB. To download several settings from
code as mentioned on the sticker in the set). Make sure to key the USB stick to the TV, same way of working needs to be
in all three digits, also the leading zeros. If the above action is followed as described in Upload to USB. To make sure
successful, the front LED will go out as an indication that the that the download of the channel list from USB to the TV is
RC sequence was correct. After the display option is changed executed properly, it is necessary to restart the TV and
in the NVM, the TV will go to the Stand-by mode. If the NVM tune to a valid preset if necessary. The All item supports
was corrupted or empty before this action, it will be initialized to download all several items at once.
first (loaded with default values). This initializing can take up to NVM editor. For NET TV the set type number must be
20 seconds. entered correctly.
Also the production code (AG code) can be entered here
via the RC-transmitter.
Correct data can be found on the side/rear sticker.

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EN 26 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

How to Navigate How to Navigate


In SAM, the menu items can be selected with the By means of the CURSOR-DOWN/UP knob on the RC-
CURSOR UP/DOWN key on the RC-transmitter. The transmitter, can be navigated through the menus.
selected item will be highlighted. When not all menu items
fit on the screen, move the CURSOR UP/DOWN key to Contents of CSM
display the next/previous menu items. The contents are reduced to 3 pages: General, Software
With the CURSOR LEFT/RIGHT keys, it is possible to: versions and Quality items. The group names itself are not
(De) activate the selected menu item. shown anywhere in the CSM menu.
(De) activate the selected sub menu.
With the OK key, it is possible to activate the selected
General
action.
Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
How to Exit SAM is not necessary for the customer to look at the rear of the
Use one of the following methods: TV-set. Note that if an NVM is replaced or is initialized after
Switch the TV set to STAND-BY via the RC-transmitter. corruption, this set type has to be re-written to NVM.
Via a standard RC-transmitter, key in 00 sequence, or ComPair will foresee in a possibility to do this. The update
select the BACK key. can also be done via the NVM editor available in SAM.
Production Code. Displays the production code (the serial
5.2.3 Customer Service Mode (CSM) number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, this production code has to be
Purpose re-written to NVM. ComPair will foresee in a possibility to
When a customer is having problems with his TV-set, he can do this. The update can also be done via the NVM editor
call his dealer or the Customer Helpdesk. The service available in SAM.
technician can then ask the customer to activate the CSM, in Installed date. Indicates the date of the first installation of
order to identify the status of the set. Now, the service the TV. This date is acquired via time extraction.
technician can judge the severity of the complaint. In many Options 1. Gives the option codes of option group 1 as set
cases, he can advise the customer how to solve the problem, in SAM (Service Alignment Mode).
or he can decide if it is necessary to visit the customer. Options 2. Gives the option codes of option group 2 as set
The CSM is a read only mode; therefore, modifications in this in SAM (Service Alignment Mode).
mode are not possible. 12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
When in this chassis CSM is activated, a test pattern will be corruption, this identification number has to be re-written to
displayed during 5 seconds (1 second Blue, 1 second Green NVM. ComPair will foresee in a possibility to do this. This
and 1 second Red, then again 1 second Blue and 1 second identification number is the 12nc number of the SSB.
Green). This test pattern is generated by the PNX51X0 12NC display. Shows the 12NC of the display.
(located on the 200Hz board as part of the display). So if this 12NC supply. Shows the 12NC of the power supply.
test pattern is shown, it could be determined that the back end 12NC 200Hz board. Shows the 12NC of the 200Hz Panel
video chain (PNX51X0 and display) is working.For TV sets (when present).
without the PNX51X0 inside, every menu from CSM will be 12NC AV PIP. Shows the 12NC of the AV PIP board
used as check for the back end chain video. (when present).

When CSM is activated and there is a USB stick connected to Software versions
the TV set, the software will dump the CSM content to the USB Current main SW. Displays the build-in main software
stick. The file (CSM_model number_serial number.txt) will be version. In case of field problems related to software,
saved in the root of the USB stick. This info can be handy if no software can be upgraded. As this software is consumer
information is displayed. upgradeable, it will also be published on the Internet.
Example: Q55xx1.2.3.4
When in CSM mode (and a USB stick connected), pressing Stand-by SW. Displays the build-in stand-by processor
OK will create an extended CSM dump file on the USB stick. software version. Upgrading this software will be possible
This file (Extended_CSM_model number_serial number.txt) via ComPair or via USB (see section 5.9 Software
contains: Upgrading).
The normal CSM dump information, Example: STDBY_83.84.0.0.
All items (from SAM load to USB, but in readable format), e-UM version. Displays the electronic user manual SW-
Operating hours, version (12NC version number). Most significant number
Error codes, here is the last digit.
SW/HW event logs. AV PIP software.
3D dongle software version.
To have fast feedback from the field, a flashdump can be
requested by development. When in CSM, push the red Quality items
button and key in serial digits 2679 (same keys to form the Signal quality. Bad / average /good (not for DVB-S).
word COPY with a cellphone). A file Dump_model Ethernet MAC address. Displays the MAC address
number_serial number.bin will be written on the connected present in the SSB.
USB device. This can take 1/2 minute, depending on the Wireless MAC address. Displays the wireless MAC
quantity of data that needs to be dumped. address to support the Wi-Fi functionality.
BDS key. Indicates if the set is in the BDS status.
Also when CSM is activated, the LAYER 1 error is displayed via CI module. Displays status if the common interface
blinking LED. Only the latest error is displayed (see also module is detected.
section 5.5 Error Codes). CI + protected service. Yes/No.
Event counter :
How to Activate CSM S : 000X 0000(number of software recoveries : SW
EVENT-LOG #(reboots)
Key in the code 123654 via the standard RC transmitter. S : 0000 000X (number of software events : SW EVENT-
Note: Activation of the CSM is only possible if there is no (user) LOG #(events)
menu on the screen! H : 000X 0000(number of hardware errors)

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 27

H : 0000 000X (number of hardware events : SW EVENT- in this mode with a faulty FET 7U0X is done, you can destroy
LOG #(events). all ICs supplied by the +1V8 and +1v1, due to overvoltage (12V
on XVX-line). It is recommended to measure first the FET
How to Exit CSM 7U0X or others FETs on shortcircuit before activating SDM via
Press MENU (or "HOME") / Back key on the RC-transmitter. the service pads.

5.3 Stepwise Start-up


The abbreviations SP and MP in the figures stand for:
When the TV is in a protection state due to an error detected by SP: protection or error detected by the Stand-by
stand-by software (error blinking is displayed) and SDM is Processor.
activated via shortcutting the SDM solder path on the SSB, the MP: protection or error detected by the MIPS Main
TV starts up until it reaches the situation just before protection. Processor.
So, this is a kind of automatic stepwise start-up. In combination
with the start-up diagrams below, you can see which supplies
are present at a certain moment. Caution: in case the start-up

Mains
off Mains
on

- WakeUp requested
WakeUp
- Acquisition needed
requested
- Tact switch pushed

St by Semi Active
- stby requested and
no data Acquisition St by - St by requested
required - tact SW pushed

Tact switch
pushed
WakeUp
requested
- Tact switch pushed
(SDM)
- last status is hibernate
GoToProtection
after mains ON
Hibernate
GoToProtection

Protection

18770_250_100216.eps
100402

Figure 5-3 Transition diagram

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EN 28 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

Off
Mains is applied
Stand by or
Protection
Standby Supply starts running.
All standby supply voltages become available.

st-by P resets

If the protection state was left by short circuiting the


Initialise I/O pins of the st-by P:
SDM pins, detection of a protection condition during
- Switch reset-AVC LOW (reset state)
startup will stall the startup. Protection conditions in a
- Switch reset-system LOW (reset state)
- Switch reset-Ethernet LOW (reset state) playing set will be ignored. The protection mode will
not be entered.
- Switch reset-USB LOW (reset state)
- Switch reset-DVBs LOW (reset state)
- keep Audio-reset and Audio-Mute-Up HIGH

- Switch Audio-Reset high.


start keyboard scanning, RC detection. Wake up reasons are It is low in the standby mode if the standby
off. mode lasted longer than 10s.

Switch ON Platform and display supply by switching


LOW the Standby line.

+12V, +24Vs, AL and Bolt-on power


is switched on, followed by the +1V2 DCDC converter
Detect2 is moved to an interrupt. To be checked if
the detection on interrupt base is feasible or not or if
we should stick to the standard 40ms interval. 12V error:
Detect2 high received
No Layer1: 3
within 2 seconds?
Layer2: 16

Yes
Enter protection
Enable the DCDC converters
(ENABLE-3V3n LOW)

Wait 50ms

Enable the supply detection algorithm

Set IC slave address


of Standby P to (A0h)

Detect EJTAG debug probe


(pulling pin of the probe interface to An EJTAG probe (e.g. WindPower ICE probe) can be
ground by inserting EJTAG probe) connected for Linux Kernel debugging purposes.

EJTAG probe
Yes
connected ?

No

No No Cold boot?

Yes

Release AVC system reset Release AVC system reset Release AVC system reset
Feed warm boot script Feed cold boot script Feed initializing boot script
disable alive mechanism

18770_251_100216.eps
100216

Figure 5-4 Off to Semi Stand-by flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 29

Reset-system is switched HIGH by the Reset-system is switched HIGH by the


AVC at the end of the bootscript AVC at the end of the bootscript

No

AVC releases Reset-Ethernet, Reset-USB and AVC releases Reset-Ethernet, Reset-USB and
This cannot be done through the bootscript, Reset-DVBs when the end of the AVC boot- Reset-DVBs when the end of the AVC boot-
the I/O is on the standby P script is detected script is detected

Reset-Audio and Audio-Mute-Up are Reset-Audio and Audio-Mute-Up are


switched by MIPS code later on in the switched by MIPS code later on in the
Timing need to be updated if startup process startup process
more mature info is available.

Bootscript ready
No
in 1250 ms?

Yes

Set IC slave address


of Standby P to (60h)

RPC start (comm. protocol)


Timing needs to
be updated if more
Flash to Ram mature info is
No image transfer succeeded available.
within 30s?
Code =
Layer1: 2
Layer2: 15 Yes
Timing needs to be
updated if more
Code = mature info is
Switch AVC PNX85500 in SW initialization
Layer1: 2 No available.
reset (active low) succeeded
Layer2: 53
within 20s?

Wait 10ms Yes

Enable Alive check mechanism


Disable all supply related protections and
switch off the +3V3 +5V DC/DC converter.

MIPS reads the wake up reason Wait until AVC starts to


from standby P. communicate
Wait 5ms

Startup screen shall only be visible when there is a coldboot to


an active state end situation. The startup screen shall not be
Wake up reason visible when waking up for reboot reasons or waking up to semi-
switch off the remaining DC/DC coldboot & not semi-
converters standby? standby conditions or waking up to enter Hibernate mode..

yes
Switch Standby I/O line high
3-th try?
and wait 4 seconds
The first time after the option turn on of the startup screen or
Startup screen cfg file when the set is virgin, the cfg file is not present and hence
present? the startup screen will not be shown.
Yes

yes
Blink Code as
error code
200Hz set? yes

No
Enter protection
85500 sends out startup screen 85500 sends out startup screen

No
200Hz Tcon has started up the
85500 starts up the display.
display.
No

To keep this flowchart readable, the exact Startup screen visible 85500 requests Lamp on
display turn on description is not copied
here. Please see the Semi-standby to On
description for the detailed display startup
Startup screen visible
During the complete display time of the
Startup screen, the preheat condition of
sequence.
100% PWM is valid. Initialize audio

initialize tuner and channel decoders

Initialize source selection

Initialize video processing ICs

initialize AutoTV by triggering CHS AutoTV Init interface

Initialize Ambilight with Lights off.

Semi-Standby
18770_252_100216.eps
100216

Figure 5-5 Off to Semi Stand-by flowchart (part 2)

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EN 30 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the EEFL backlight, the backlight should be driven with a maximum PWM duty
cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output
level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts,
the picture should only be unblanked after these first seconds.

The assumption here is that a fast toggle (<2s) can


only happen during ON->SEMI ->ON. In these states,
Semi Standby
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
Wait until previous on-state is left more than 2
made in less than 2s, because the standby state will
seconds ago. (to prevent LCD display problems)
be maintained for at least 4s.

Assert RGB video blanking


CPipe already generates a valid output and audio mute
clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.

Display already on?


(splash screen)

No

Switch on the display power by


The exact timings to switching LCD-PWR-ON low
switch on the
display (LVDS Yes
Wait x ms
delay, lamp delay)
are defined in the Initialize audio and video
display file. Switch on LVDS output in the 85500 processing IC's and functions
according needed use case.
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set


the BOOST control to nominal and make sure
PWM output is set to maximum allowed PWM

Switch on LCD backlight (Lamp-ON)

Start POK line Wait until valid and stable audio and video, corresponding to the
detection algorithm requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
return

Switch Audio-Reset low and wait 5ms

A LED set does not normally need a


Release audio mute and wait 100ms before any other audio
preheat time. The preheat remains present
handling is done (e.g. volume change)
but is set to zero in the display file.

Restore dimming backlight feature, PWM and BOOST output


The higher level requirement is that audio and video
and unblank the video.
should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
Switch on the Ambilight functionality according the last status
settings.

Startup screen Option


and Installation setting
Photoscreen ON?

Yes

Display cfg file present


and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_253_100216.eps
100216

Figure 5-6 Semi Stand-by to Active flowchart (EEFL or LED backlight 50/100 Hz only)

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 31

The assumption here is that a fast toggle (<2s)


can only happen during ON->SEMI ->ON. In
Semi Standby
these states, the AVC is still active and can
provide the 2s delay. If the transition ON->SEMI-
>STBY->SEMI->ON can be made in less than 2s, Wait until previous on-state is left more than 2
we have to delay the semi -> stby transition until seconds ago. (to prevent LCD display problems)
the requirement is met.

Assert RGB video blanking


and audio mute

There is no need to define the Backlight already on?


display timings since the timing (splash screen)
implementation is part of the Tcon. Yes

No Initialize audio and video


processing IC's and functions
according needed use case.
Request Tcon to Switch on the backlight in a
direct LED or
set Lamp-on I/O line in case of a side LED

Start POK line


detection algorithm

Wait until valid and stable audio and video, corresponding to


the requested output is delivered by the AVC.

return
Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio
The higher level requirement is that audio and handling is done (e.g. volume change)
video should be demuted without transient
effects and that the audio should be demuted
maximum 1s before or at the same time as the
unblank the video.
unblanking of the video.

Switch on the Ambilight functionality according the last status


settings.

Startup screen Option


and Installation setting
Photoscreen ON?

Yes

Display cfg file present


and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_254_100216.eps
100216

Figure 5-7 Semi Stand-by to Active flowchart (LED backlight 200 Hz)

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EN 32 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

Active

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground


(I/O: audio reset)
And wait 5ms

switch off Ambilight

Wait until Ambilight has faded out: Output power


Observer should be zero

Switch off POK line


detection algorithm

switch off LCD backlight


(I/O or IC)

Mute all video outputs

Yes 200Hz set?

No

Wait x ms (display file)

Instruct 200Hz
The exact timings to
Tcon to turn off Switch off LVDS output in 85500
switch off the
the display
display (LVDS
delay, lamp delay)
Wait x ms
are defined in the
display file.

Switch off the display power by


switching LCD-PWR-ON high

Semi Standby
18770_255_100216.eps
100216

Figure 5-8 Active to Semi Stand-by flowchart

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 33

Semi Stand by

If ambientlight functionality was used in semi-standby


(lampadaire mode), switch off ambient light (see CHS
ambilight)

Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by P.

Switch Memories to self-refresh (this creates a more


stable condition when switching off the power).

Switch AVC system in reset state (reset-system and


reset-AVC lines)
Switch reset-USB, Reset-Ethernet and Reset-DVBs
LOW

Wait 10ms

Disable all supply related protections and switch off


the DC/DC converters (ENABLE-3V3n)

Wait 5ms

Switch OFF all supplies by switching HIGH the


Standby I/O line

Important remarks:

release reset audio 10 sec after entering


standby to save power

Also here, the standby state has to be


maintained for at least 4s before starting
another state transition.
Stand by

18770_256_100216.eps
100216

Figure 5-9 Semi Stand-by to Stand-by flowchart

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EN 34 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

5.4 Service Tools 5.5 Error Codes

5.4.1 ComPair 5.5.1 Introduction

Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from left to
Consumer Electronics products. and offers the following: right, new errors are logged at the left side, and all other errors
1. ComPair helps to quickly get an understanding on how to shift one position to the right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When an error occurs and the error buffer is
capable of accurately indicating problem areas. No full, then the new error is not added, and the error buffer stays
knowledge on I2C or UART commands is necessary, intact (history is maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the P operation.
is working) and all repair information is directly available. When multiple errors occur (errors occurred within a short time
4. ComPair features TV software up possibilities. span), there is a high probability that there is some relation
between them.
Specifications
ComPair consists of a Windows based fault finding program New in this chassis is the way errors can be displayed:
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an If no errors are there, the LED should not blink at all in
USB cable. For the TV chassis, the ComPair interface box and CSM or SDM. No spacer must be displayed as well.
the TV communicate via a bi-directional cable via the service There is a simple blinking LED procedure for board
connector(s). level repair (home repair) so called LAYER 1 errors
The ComPair fault finding program is able to determine the next to the existing errors which are LAYER 2 errors (see
problem of the defective television, by a combination of Table 5-2).
automatic diagnostics and an interactive question/answer LAYER 1 errors are one digit errors.
procedure. LAYER 2 errors are 2 digit errors.
In protection mode.
From consumer mode: LAYER 1.
How to Connect
From SDM mode: LAYER 2.
This is described in the chassis fault finding database in
ComPair. Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
From consumer mode: LAYER 1.
TO TV
From SDM mode: LAYER 2.
TO
UART SERVICE
TO
I2C SERVICE
TO
UART SERVICE In CSM mode.
CONNECTOR CONNECTOR CONNECTOR
When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
ComPair II
Multi In SDM mode.
RC in function
RC out
When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Optional Power Link/ Mode
Switch Activity I2C RS232 /UART
Error display on screen.
In CSM no error codes are displayed on screen.
In SAM the complete error list is shown.
PC
Basically there are three kinds of errors:
Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section 5.6 The Blinking LED Procedure).
ComPair II Developed by Philips Brugge
Errors detected by the Stand-by software which not
Optional power
HDMI 5V DC lead to protection. In this case the front LED should blink
I2C only
the involved error. See also section 5.5 Error Codes, 5.5.4
Error Buffer. Note that it can take up several minutes
10000_036_090121.eps
091118 before the TV starts blinking the error (e.g. LAYER 1
error = 2, LAYER 2 error = 15 or 53).
Figure 5-10 ComPair II interface connection Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
Caution: It is compulsory to connect the TV to the PC as out via ComPair, via blinking LED method LAYER 1-2
shown in the picture above (with the ComPair interface in error, or in case picture is visible, via SAM.
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs can be 5.5.2 How to Read the Error Buffer
blown!
Use one of the following methods:
How to Order On screen via the SAM (only when a picture is visible).
ComPair II order codes: E.g.:
ComPair II interface: 3122 785 91020. 00 00 00 00 00: No errors detected
Software is available via the Philips Service web portal. 23 00 00 00 00: Error code 23 is the last and only
ComPair UART interface cable for Q55x.x. detected error.
(using 3.5 mm Mini Jack connector): 3138 188 75051. 37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note: When you encounter problems, contact your local Note that no protection errors can be logged in the
support desk. error buffer.

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 35

Via the blinking LED procedure. See section 5.5.3 How to content, as this history can give significant information). This to
Clear the Error Buffer. ensure that old error codes are no longer present.
Via ComPair. If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
5.5.3 How to Clear the Error Buffer code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Use one of the following methods:
Via error bits in the status registers of ICs.
By activation of the RESET ERROR BUFFER command
in the SAM menu. Via polling on I/O pins going to the stand-by processor.
Via sensing of analog values on the stand-by processor or
If the content of the error buffer has not changed for 50+
the PNX8550.
hours, it resets automatically.
Via a not acknowledge of an I2C communication.
5.5.4 Error Buffer
Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
In case of non-intermittent faults, clear the error buffer before
problems wait 2 minutes from start-up onwards, and then
starting to repair (before clearing the buffer, write down the check if the front LED is blinking or if an error is logged.

Table 5-2 Error code overview

Monitored Error/ Error Buffer/


Description Layer 1 Layer 2 by Prot Blinking LED Device Defective Board
I2C3 2 13 MIPS E BL / EB SSB SSB
I2C2 2 14 MIPS E BL / EB SSB SSB
I2C4 2 18 MIPS E BL / EB SSB SSB
PNX doesnt boot (HW cause) 2 15 Stby P P BL PNX8550 SSB
12V 3 16 Stby P P BL / Supply
Inverter or display supply 3 17 MIPS E EB / Supply
PNX51X0 2/9 21 MIPS E EB PNX51X0 200 Hz board
HDMI mux 2 23 MIPS E EB Sil9x87A SSB
I2C switch 2 24 MIPS E EB PCA9540 SSB
Channel dec DVB-S 2 28 MIPS E EB STV0903 SSB
Lnb controller 2 31 MIPS E EB LNBH23 SSB
Tuner 2 34 MIPS E EB DTT 71300 SSB
Main nvm 2 35 MIPS E EB STM24C64 SSB
Tuner DVB-S 2 36 MIPS E EB STV6110 SSB
T sensor SSB/set 2 42 MIPS E EB LM 75 T sensor
T sensor LED driver/Tcon 7 42 MIPS E EB LM 75 T sensor
PNX doesnt boot (SW cause) 2 53 Stby P P BL PNX8550 SSB
Display 5 64 MIPS E BL / EB Altera Display

Extra Info Other root causes for this error can be due to hardware
Rebooting. When a TV is constantly rebooting due to problems regarding the DDRs and the bootscript reading
internal problems, most of the time no errors will be logged from the PNX8550.
or blinked. This rebooting can be recognized via a ComPair Error 16 (12V). This voltage is made in the power supply
interface and Hyperterminal (for Hyperterminal settings, and results in protection (LAYER 1 error = 3) in case of
see section 5.8 Fault Finding and Repair Tips, 5.8.7 absence. When SDM is activated we see blinking LED
Logging). Its shown that the loggings which are generated LAYER 2 error = 16.
by the main software keep continuing. In this case Error 17 (Invertor or Display Supply). Here the status of
diagnose has to be done via ComPair. the Power OK is checked by software, no protection will
Error 13 (I2C bus 3, SSB bus blocked). Current situation: occur during failure of the invertor or display supply (no
when this error occurs, the TV will constantly reboot due to picture), only error logging. LED blinking of LAYER 1
the blocked bus. The best way for further diagnosis here, is error = 3 in CSM, in SDM this gives LAYER 2 error = 17.
to use ComPair. Error 21 (PNX51X0). When there is no I2C communication
Error 14 (I2C bus 2, TV set bus blocked). Current towards the PNX51X0 after start-up, LAYER 2 error = 21
situation: when this error occurs, the TV will constantly will be logged and displayed via the blinking LED
reboot due to the blocked bus. The best way for further procedure if SDM is switched on. This device is located on
diagnosis here, is to use ComPair. the 200 Hz panel from the display.
Error 18 (I2C bus 4, Tuner bus blocked). In case this bus Error 23 (HDMI). When there is no I2C communication
is blocked, short the SDM solder paths on the SSB during towards the HDMI mux after start-up, LAYER 2 error = 23
startup, LAYER error 2 = 18 will be blinked. will be logged and displayed via the blinking LED
Error 15 (PNX8550 doesnt boot). Indicates that the main procedure if SDM is switched on.
processor was not able to read his bootscript. This error will Error 24 (I2C switch). When there is no I2C
point to a hardware problem around the PNX8550 communication towards the I2C switch, LAYER 2
(supplies not OK, PNX 8550 completely dead, I2C link error = 24 will be logged and displayed via the blinking LED
between PNX and Stand-by Processor broken, etc...). procedure when SDM is switched on. Remark: this only
When error 15 occurs it is also possible that I2C1 bus is works for TV sets with an I2C controlled screen included.
blocked (NVM). I2C1 can be indicated in the schematics as Error 28 (Channel dec DVB-S). When there is no I2C
follows: SCL-UP-MIPS, SDA-UP-MIPS. communication towards the DVB-S channel decoder,

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EN 36 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

LAYER 2 error = 28 will be logged and displayed via the 2. Two short blinks of 250 ms followed by a pause of 3 s
blinking LED procedure if SDM is switched on. 3. Eight short blinks followed by a pause of 3 s
Error 31 (Lnb controller). When there is no I2C 4. Six short blinks followed by a pause of 3 s
communication towards this device, LAYER 2 error = 31 5. One long blink of 3 s to finish the sequence (spacer).
will be logged and displayed via the blinking LED 6. The sequence starts again.
procedure if SDM is activated.
Error 34 (Tuner). When there is no I2C communication 5.6.2 How to Activate
towards the tuner during start-up, LAYER 2 error = 34 will
be logged and displayed via the blinking LED procedure Use one of the following methods:
when SDM is switched on.
Activate the CSM. The blinking front LED will show only
Error 35 (main NVM). When there is no I2C
the latest layer 1 error, this works in normal operation
communication towards the main NVM during start-up,
mode or automatically when the error/protection is
LAYER 2 error = 35 will be displayed via the blinking LED
monitored by the Stand-by processor.
procedure when SDM is switched on. All service modes
In case no picture is shown and there is no LED blinking,
(CSM, SAM and SDM) are accessible during this failure,
read the logging to detect whether error devices are
observed in the Uart logging as follows: "<< ERRO >>>
mentioned. (see section 5.8 Fault Finding and Repair
PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".
Tips, 5.8.7 Logging).
Error 36 (Tuner DVB-S). When there is no I2C Activate the SDM. The blinking front LED will show the
communication towards the DVB-S tuner during start-up,
entire content of the LAYER 2 error buffer, this works in
LAYER 2 error = 36 will be logged and displayed via the
normal operation mode or when SDM (via hardware pins)
blinking LED procedure when SDM is switched on. is activated when the tv set is in protection.
Error 42 (Temp sensor). Only applicable for TV sets
equipped with temperature devices.
Error 53. This error will indicate that the PNX8550 has 5.7 Protections
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because 5.7.1 Software Protections
of hardware problems (NAND flash, ...) or software
initialization problems. Possible cause could be that there
Most of the protections and errors use either the stand-by
is no valid software loaded (try to upgrade to the latest main
microprocessor or the MIPS controller as detection device.
software version). Note that it can take a few minutes
Since in these cases, checking of observers, polling of ADCs,
before the TV starts blinking LAYER 1 error = 2 or in SDM,
and filtering of input values are all heavily software based,
LAYER 2 error = 53.
these protections are referred to as software protections.
Error 64. Only applicable for TV sets with an I2C controlled
There are several types of software related protections, solving
screen.
a variety of fault conditions:
Related to supplies: presence of the +5V, +3V3 and 1V2
5.6 The Blinking LED Procedure needs to be measured, no protection triggered here.
Protections related to breakdown of the safety check
5.6.1 Introduction mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
The blinking LED procedure can be split up into two situations:
guaranteed any more.
Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
Remark on the Supply Errors
This will be only one digit error, namely the one that is
The detection of a supply dip or supply loss during the normal
referring to the defective board (see table 5-2 Error code
overview) which causes the failure of the TV. This playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
approach will especially be used for home repair and call
the TV will go to protection.
centres. The aim here is to have service diagnosis from a
distance.
Blinking LED procedure LAYER 2 error. Via this Protections during Start-up
procedure, the contents of the error buffer can be made During TV start-up, some voltages and IC observers are
visible via the front LED. In this case the error contains actively monitored to be able to optimise the start-up speed,
2 digits (see table 5-2 Error code overview) and will be and to assure good operation of all components. If these
displayed when SDM (hardware pins) is activated. This is monitors do not respond in a defined way, this indicates a
especially useful for fault finding and gives more details malfunction of the system and leads to a protection. As the
regarding the failure of the defective board. observers are only used during start-up, they are described in
Important remark: the start-up flow in detail (see section 5.3 Stepwise Start-up).
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed. 5.7.2 Hardware Protections

When one of the blinking LED procedures is activated, the front The only real hardware protection in this chassis appears in
LED will show (blink) the contents of the error buffer. Error case of an audio problem e.g. DC voltage on the speakers. This
codes greater then 10 are shown as follows: protection will only affect the Class D audio amplifier (item
1. n long blinks (where n = 1 to 9) indicating decimal digit 7D10; see diagram B03A) and puts the amplifier in a
2. A pause of 1.5 s continuous burst mode (cyclus approximately 2 seconds).
3. n short blinks (where n= 1 to 9)
4. A pause of approximately 3 s, Repair Tip
5. When all the error codes are displayed, the sequence There still will be a picture available but no sound. While
finishes with a LED blink of 3 s (spacer). the Class D amplifier tries to start-up again, the cone of the
6. The sequence starts again. loudspeakers will move slowly in one or the other direction
until the initial failure shuts the amplifier down, this cyclus
Example: Error 12 8 6 0 0. starts over and over again. The headphone amplifier will
After activation of the SDM, the front LED will show: also behaves similar.
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 37

5.8 Fault Finding and Repair Tips +5V-TUN supply voltage (5V nominal) for tuner and IF
amplifier.
Read also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra
Info. +3V3-STANDY (3V3 nominal) is the permanent voltage,
supplying the Stand-by microprocessor inside PNX855xx.
5.8.1 Ambilight
Supply voltage +1V1 is started immediately when +12V voltage
becomes available (+12V is enabled by STANDBY signal when
Due to degeneration process of the LEDs fitted on the ambi "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN
module, there can be a difference in the colour and/or light are switched "on" by signal ENABLE-3V3 when "low", provided
output of the spare ambilight modules in comparison with the that +12V (detected via 7U40 and 7U41) is present.
originals ones contained in the TV set. Via SAM => alignments
=> ambilight, the spare module can be adjusted. +12V is considered OK (=> DETECT2 signal becomes "high",
+12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter
5.8.2 Audio Amplifier can be started up) if it rises above 10V and doesnt drop below
9V5. A small delay of a few milliseconds is introduced between
The Class D-IC 7D10 has a powerpad for cooling. When the IC the start-up of 12V to +1V8 DC-DC converter and the two other
is replaced it must be ensured that the powerpad is very well DC-DC converters via 7U48 and associated components.
pushed to the PWB while the solder is still liquid. This is needed
to insure that the cooling is guaranteed, otherwise the Class D- Description DVB-S2:
IC could break down in short time. LNB-RF1 (0V = disabled, 14V or 18V in normal operation)
LNB supply generated via the second conversion channel
5.8.3 AV PIP of 7T03 followed by 7T50 LNB supply control IC. It provides
supply voltage that feeds the outdoor satellite reception
equipment.
To check the AV PIP board (if present) functionality, a
+3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal)
dedicated tespattern can be invoke as follows: select the
and +1V-DVBS (1.03V nominal) power supply for the
multiview icon in the User Interface and press the OK
silicon tuner and channel decoder. +1V-DVBS is generated
button. Apply for the main picture an extended source, e.g.
via a 5V to 1V DC-DC converter and is stabilized at the
HDMI input. Proceed by entering CSM (push 123654 on the
point of load (channel decoder) by means of feedback
remote control) and press the yellow button. A coloured
signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS
testpattern should appear now, generated by the AV PIP board
are generated via linear stabilizers from +5V-DVBS that by
(this can take a few seconds).
itself is generated via the first conversion channel of 7T03.

5.8.4 CSM At start-up, +24V becomes available when STANDBY signal is


"low" (together with +12V for the basic board), when +3V3 from
When CSM is activated and there is a USB stick connected to the basic board is present the two DC-DC converters channels
the TV, the software will dump the complete CSM content to the inside 7T03 are activated. Initially only the 24V to 5V converter
USB stick. The file (Csm.txt) will be saved in the root of the USB (channel 1 of 7T03 generating +5V-DVBS) will effectively work,
stick. If this mechanism works it can be concluded that a large while +V-LNB is held at a level around 11V7 via diode 6T55.
part of the operating system is already working (MIPS, USB...) After 7T05 is initialized, the second channel of 7T03 will start
and generates a voltage higher then LNB-RF1 with 0V8. +5V-
5.8.5 DC/DC Converter DVBS start-up will imply +3V3-DVBS start-up, with a small
delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will
be enabled.
Description basic board

If +24V drops below +15V level then the DVB-S2 supply will
The basic board power supply consists of 4 DC/DC converters
stop, even if +3V3 is still present.
and 5 linear stabilizers. All DC/DC converters have +12V input
voltage and deliver:
+1V1 supply voltage (1.15V nominal), for the core voltage Debugging
of PNX855xx, stabilized close to the point of load; The best way to find a failure in the DC/DC converters is to
SENSE+1V1 signal provides the DC-DC converter the check their start-up sequence at power on via the mains cord,
needed feedback to achieve this. presuming that the stand-by microprocessor and the external
+1V8 supply voltage, for the DDR2 memories and DDR2 supply are operational. Take STANDBY signal "high"-to-"low"
interface of PNX855xx. transition as time reference.
+3V3 supply voltage (3.30V nominal), overall 3.3 V for When +12V becomes available (maximum 1 second after
onboard ICs, for non-5000 series SSB diversities only. STANDBY signal goes "low") then +1V1 is started immediately.
+5V (5.15V nominal) for USB, WIFI and Conditional After ENABLE-3V3 goes "low", all the other supply voltages
Access Module and +5V5-TUN for +5V-TUN tuner should rise within a few milliseconds.
stabilizer.
Tips
The linear stabilizers are providing: Behaviour comparison with a reference TV550 platform
+1V2 supply voltage (1.2V nominal), stabilized close to can be a fast way to locate failures.
PNX855xx device, for various other internal blocks of If +12V stays "low", check the integrity of fuse 1U40.
PNX855xx; SENSE+1V2 signal provides the needed Check the integrity (at least no short circuit between drain
feedback to achieve this. and source) of the power MOS-FETs before starting up the
+2V5 supply voltage (2.5V nominal) for LVDS interface and platform in SDM, otherwise many components might be
various other internal blocks of PNX855xx; for 5000 series damaged. Using a ohmmeter can detect short circuits
SSB diversities the stabilizer is 7UD2 while for the other between any power rail and ground or between +12V and
diversities 7UC0 is used. any other power rail.
+3V3 supply voltage (3V3 nominal) for 5000 series SSB Short circuit at the output of an integrated linear stabilizer
diversities, provided by 7UD3; in this case the 12V to 3V3 (7UC0, 7UD2 or 7UD3) will heat up this device strongly.
DC-DC converter is not present. Switching frequencies should be 500 kHz ...600 kHz for
12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,

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EN 38 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC Uart loggings reporting fault conditions, error messages, error
converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V codes, fatal errors:
LNB DC-DC converters operates at 300 kHz while for 5 V Failure messages should be checked and investigated.For
to 1.1 V DC-DC converter 900 kHz is used. instance fatal error on the PNX51x0: check startup of the
back-end processor, supplies..reset, I2C bus. => error
5.8.6 Exit Factory Mode mentioned in the logging as: *51x0 failed to start by itself*.
Some failures are indicated by error codes in the logging,
check with error codes table (see Table 5-2 Error code
When an F is displayed in the screens right corner, this
means the set is in Factory mode, and it normally overview).e.g. => <<<ERROR>>>PLFPOW_MERR.C :
First Error (id=10,Layer_1=2,Layer_2=23).
happens after a new SSB is mounted. To exit this mode, push
I2C bus error mentioned as e.g.: I2C bus 4 blocked.
the VOLUME minus button on the TVs local keyboard for 10
seconds (this disables the continuous mode). Not all failures or error messages should be interpreted as
fault.For instance root cause can be due to wrong option
Then push the SOURCE button for 10 seconds until the F
codes settings => e.g. DVBS2Suppoprted : False/True.
disappears from the screen.
In the Uart log startup script we can observe and check the
enabled loaded option codes.
5.8.7 Logging
Defective sectors (bad blocks) in the Nand Flash can also be
When something is wrong with the TV set (f.i. the set is reported in the logging.
rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every Startup in the SW upgrade application and observe the Uart
Windows application via Programs, Accessories, logging:
Communications, Hyperterminal. Connect a ComPair UART- Starting up the TV set in the Manual Software Upgrade mode
cable (3138 188 75051) from the service connector in the TV to will show access to USB, meant to copy software content from
the multi function jack at the front of ComPair II box. USB to the DRAM.Progress is shown in the logging as follows:
Required settings in ComPair before starting to log: cosupgstdcmds_mcmdwritepart: Programming 102400 bytes,
- Start up the ComPair application. 40505344 of 40607744 bytes programmed.
- Select the correct database (open file Q55X.X, this will set
the ComPair interface in the appropriate mode). Startup in Jett Mode:
- Close ComPair Check Uart logging in Jet mode mentioned as : JETT UART
After start-up of the Hyperterminal, fill in a name (f.i. logging) READY.
in the Connection Description box, then apply the following
settings: Uart logging changing preset:
1. COMx => COMMAND: calling DFB source = RC6, system=0, key = 4.
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5.8.9 Loudspeakers
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed. Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
This is also the case during rebooting of the TV set (the same
audio amplifier can be damaged by disconnecting the speakers
logging appears time after time). Also available in the logging
is the Display Option Code (useful when there is no picture), during ON-state of the set!
look for item DisplayRawNumber in the beginning of the
logging. Tip: when there is no picture available during rebooting 5.8.10 PSL
you are able to check for error devices in the logging (LAYER
2 error) which can be very helpful to determine the failure cause In case of no picture when CSM (test pattern) is activated and
of the reboot. For protection state, there is no logging. backlight doesnt light up, its recommended first to check the
inverter on the PSL + wiring (LAYER 2 error = 17 is displayed
5.8.8 Guidelines Uart logging in SDM).

Description possible cases: 5.8.11 Tuner

Uart loggings are displayed: Attention: In case the tuner is replaced, always check the tuner
When Uart loggings are coming out, the first conclusion we options!
can make is that the TV set is starting up and
communication with the flash RAM seems to be supported. 5.8.12 Display option code
The PNX855xx is able to read and write in the DRAMs.
We can not yet conclude : Flash RAM and DRAMs are fully Attention: In case the SSB is replaced, always check the
operational/reliable.There still can be errors in the data display option code in SAM, even when picture is available.
transfers, DRAM erros, read/write speed and timing Performance with the incorrect display option code can lead to
control. unwanted side-effects for certain conditions.

No Uart logging at all:


New in this chassis:
In case there is no Uart logging coming out, check if the
While in the download application (start up in TV mode + OK
startup script can be send over the I2C bus (3 trials to
button pressed), the display option code can be changed via
startup) + power supplies are switched on and stable.
062598 HOME XXX special SAM command (XXX=display
No startup will end up in a blinking LED status : error
LAYER 1 = 2, error LAYER 2 = 53 (startup with SDM option in 3 digits).
solder paths short).
Error LAYER 2 = 15 (hardware cause) is more related to
a supply issue while error LAYER 2 = 53 (software cause)
refers more to boot issues.

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 39

5.8.13 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be


exchanged. See figure SSB replacement flowchart. Refer
also to section Table 5.8.14.

In st ru ct io n n o t e SSB rep lacem en t Q543.x, Q548.x, Q549.x, and Q55x.x

Before starting: ST AR T
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder upgrades in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in Set is still oper ating?
case there are more than one "autorun.upg" files on the USB stick.
No

Yes

C onnect the U SB stick to the set,


go to SAM and save the current TV settings via Upload to USB

1. D isconnect the WiF i module fr om the PC I connector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.

Start-up the set


Due to a possible wrong display option code in the received Service
SSB (NVM), its possible that no picture is displayed. Due to this
the download application will not be shown either. This tree enables you
to load the main software step-by-step via the UART logging on the PC
(this for visual feedback). Set behaviour?
No pictur e displayed Pictur e displayed
Set is starting up without software
upgrade menu appearing on screen

1) Start up the TV set, equiped with the Service SSB,


and enable the UART logging on the PC. Pictur e displayed
Set is starting up with software
upgrade menu appearing on screen
2) The TV set will start-up automatically in the
download application if main TV software is not loaded.

1) Plug the USB stick into the TV set and select


3) Plug the prepared USB stick into the TV set. Follow the the autorun .upg file in the displayed browser.
instructions in the UART log file, press Right cursor key to enter
the list. Navigate to the autorun.upg file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press Ok.
2) Now the main software will be loaded automatically,
supported by a progress bar.
4) Press "Down" cursor and Ok to start flashing the main
TV software. Printouts like: L: 1-100%, V: 1-100% and
P: 1-100% should be visible now in the UART logging.

3) Wait until the message Operation successful ! is displayed


5) Wait until the message Operation successful ! is logged in and remove all inserted media. Restart the TV set.
the UART log and remove all inserted media. Restart the TV set.

Set the correct Display code via 062598 -HOME- xxx where
xxx is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)

After entering the Display Option code, the set is going to


Standby
(= validation of code)

Restart the set


No

Connect PC via the ComPair interface to Service connector.


Saved settings
on USB stick?

Start TV in Jett mode (DVD I + (OSD)) Yes


Open ComPair browser Q54x
In case of settings reloaded from USB, the set type,
Go to SAM and reload settings serial number, display 12 NC, are automatically stored
via Download from USB function. when entering display options.
Program set type number, serial number, and display 12 NC
Program E - DFU if needed.

If not already done:


Check latest software on Service website. - Check if correct display option code is programmed.
Update main and Stand-by software via USB. - Verify option codes according to sticker inside the set.
- Default settings for white drive > see Service Manual.
Attention point for Net TV: If the set type and serial number are not
filled in, the Net TV functionality will not work. It will not be possible
to connect to the internet.
Check and perform alignments in SAM according to the
Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.


Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.

End Q54x.E SSB Board swap VDS


Updated 22-03-2010

H_16771_007a.eps
100402

Figure 5-11 SSB replacement flowchart

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EN 40 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

Set is st art in g u p in F act o ry m o d e

Set is starting up in F actory m ode?

Noisy picture with bands/lines is visible and the An F is displayed (and the HDMI 1
RED LED is continuous on. input is displayed).

- Press the volume minus button on the TVs local keyboard for 5 ~10
seconds

- Press the SOURCE button for 10 seconds until the F disappears


from the screen or the noise on the screen is replaced by blue mute

The noise on the screen is replaced


with the blue mute or the F is disappeared!

Unplug the mains cord to verify the correct


disabling of the Factory mode.

Program display option code


via 062598 MENU, followed by
the 3 digits code of the display
(this code can be found
on a sticker on - or inside - the set).

After entering display option code, the set is


going in stand-by mode (= validation of code)

R estart the set

H_16771_007b.eps
100322

Figure 5-12 SSB replacement flowchart - Factory mode

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Service Modes, Error Codes, and Fault Finding Q552.2E LA 5. EN 41

18753_211_100811.eps
100811

Figure 5-13 SSB start-up

5.8.14 Swapping SSBs in Sundance sets (series xxPFL7xxx) description on how to upgrade the main software can be found
in the electronic User Manual.
Earlier sets in the Sundance range have an additional
Temperature sensor board located near the SSB. Later Important: When the NAND-Flash must be replaced, a new
(service-) SSBs lack the presence of the dedicated connector SSB must be ordered, due to the presence of the security keys!
on the SSB (no. 1M71). (CI +, MAC address, ...).
Perform the following actions after SSB replacement:
Upon mounting of such an SSB, remove the entire 1. Set the correct option codes (see sticker inside the TV).
Temperature sensor board and set option code Temp. sensor 2. Update the TV software => see the eUM (electronic User
in Option no. 7 to 00. Refer to table 6-16 Option codes at bit Manual) for instructions.
level (Option 1 - Option 8). 3. Perform the alignments as described in chapter 6 (section
6.5 Reset of Repaired SSB).
4. Check in CSM if the CI + key, MAC address.. are valid.
5.9 Software Upgrading For the correct order number of a new SSB, always refer to the
Spare Parts list!
Attention!
Software version numbers for 2011 sets are all defined below 5.9.2 Main Software Upgrade
number 0.40.x.x. This might confuse servicers who store
software versions for more than one set and/or platform on the The UpgradeAll.upg file is only used in the factory.
same storage device (USB stick).
Automatic Software Upgrade
Always check the latest software version on the servicer In normal conditions, so when there is no major problem with
website in relation to the actual CTN!!! the TV, the main software and the default software upgrade
application can be upgraded with the AUTORUN.UPG
5.9.1 Introduction (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS
_Q555X_ x.x.x.x_prod.zip). This can also be done by the
The set software and security keys are stored in a NAND- consumers themselves, but they will have to get their software
Flash, which is connected to the PNX855xx. from the commercial Philips website or via the Software Update
Assistant in the user menu (see eUM). The autorun.upg file
It is possible for the user to upgrade the main software via the must be placed in the root of the USB stick.
USB port. This allows replacement of a software image in a How to upgrade:
stand alone set, without the need of an E-JTAG debugger. A 1. Copy AUTORUN.UPG to the root of the USB stick.

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EN 42 5. Q552.2E LA Service Modes, Error Codes, and Fault Finding

2. Insert USB stick in the set while the set is operational. The StandbySW_Q555X_x.x.x.x_prod.zip. Contains the
set will restart and the upgrading will start automatically. As StandbyFactory software in upg format.
soon as the programming is finished, a message is shown ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM
to remove the USB stick and restart the set. content. Must be programmed via ComPair or can be
loaded via USB, be aware that all alignments stored in
Manual Software Upgrade NVM are overwritten here.
In case that the software upgrade application does not start
automatically, it can also be started manually. 5.9.5 UART logging 2K10 (see section 5.8 Fault Finding and
How to start the software upgrade application manually: Repair Tips, 5.8.7 Logging)
1. Disconnect the TV from the Mains/AC Power.
2. Press the OK button on a Philips TV remote control or a
Philips DVD RC-6 remote control (it is also possible to use
a TV remote in DVD mode). Keep the OK button
pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.

Attention!
In case the download application has been started manually,
the autorun.upg will maybe not be recognized.
What to do in this case:
1. Create a directory UPGRADES on the USB stick.
2. Rename the autorun.upg to something else, e.g. to
software.upg. Do not use long or complicated names,
keep it simple. Make sure that AUTORUN.UPG is no
longer present in the root of the USB stick.
3. Copy the renamed upg file into this directory.
4. Insert USB stick into the TV.
5. The renamed upg file will be visible and selectable in the
upgrade application.

Back-up Software Upgrade Application


If the default software upgrade application does not start (could
be due to a corrupted boot sector) via the above described
method, try activating the back-up software upgrade
application.
How to start the back-up software upgrade application
manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the CURSOR DOWN-button on a Philips TV
remote control while reconnecting the TV to the Mains/AC
Power.
3. The back-up software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software


via a USB stick. The method is similar to upgrading the main
software via USB.
Use the following steps:
1. Create a directory UPGRADES on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbyFactory_88.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section
Manual Software Upgrade.
5. Select the appropriate file and press the OK button to
upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and


instructions on how and when to use it.
AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the
program instruction and software content, needed to
upgrade the ambilight CPLD on the TV550 platform.
BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the
BalanceFPGA software in upg format.
FUS_Q555X_x.x.x.x_prod.zip. Contains the
autorun.upg which is needed to upgrade the TV main
software and the software download application.
PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the
PNX5130 software in upg format.

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Alignments Q552.2E LA 6. EN 43

6. Alignments
Index of this chapter: EU/AP-PAL models: a PAL B/G TV-signal with a signal
6.1 General Alignment Conditions strength of at least 1 mV and a frequency of 475.25 MHz
6.2 Hardware Alignments US/AP-NTSC models: an NTSC M/N TV-signal with a
6.3 Software Alignments signal strength of at least 1 mV and a frequency of 61.25
6.4 Option Settings MHz (channel 3).
6.5 Reset of Repaired SSB LATAM models: an NTSC M TV-signal with a signal
6.6 Total Overview SAM modes strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).

6.1 General Alignment Conditions


6.3.1 White Point

Perform all electrical adjustments under the following


Choose TV menu, Setup, More TV Settings and then
conditions:
Picture and set picture settings as follows:
Power supply voltage (depends on region):
AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). Picture Setting
AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). Contrast 100
EU: 230 VAC / 50 Hz ( 10%). Brightness 50
LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). Colour 0
US: 120 VAC / 60 Hz ( 10%). Light Sensor Off
Connect the set to the mains via an isolation transformer Picture format Unscaled
with low internal resistance.
Allow the set to warm up for approximately 15 minutes. In menu Picture, choose Pixel Plus HD and set picture
Measure voltages and waveforms in relation to correct settings as follows:
ground (e.g. measure audio signals in relation to Picture Setting
AUDIO_GND). Dynamic Contrast Off
Caution: It is not allowed to use heat sinks as ground. Dynamic Backlight Off
Test probe: Ri > 10 M, Ci < 20 pF. Colour Enhancement Off
Use an isolated trimmer/screwdriver to perform Gamma 0
alignments.
Go to the SAM and select Alignments-> White point.
6.1.1 Alignment Sequence
White point alignment LCD screens:
First, set the correct options: Use a 100% white screen (format: 720p50) to the HDMI
In SAM, select Option numbers. input and set the following values:
Fill in the option settings for Group 1 and Group 2 Colour temperature: Cool.
according to the set sticker (see also paragraph 6.4 All White point values to: 127.
Option Settings).
Press OK on the remote control before the cursor is In case you have a colour analyser:
moved to the left. Measure, in a dark environment, with a calibrated
In submenu Option numbers select Store and press contactless colour analyser (Minolta CA-210 or Minolta
OK on the RC. CS-200) in the centre of the screen and note the x, y value.
OR: Change the pattern to 90% white screen. If a Quantum
In main menu, select Store again and press OK on Data generator is used, select the GreyAll test pattern at
the RC. level = 230.
Switch the set to Stand-by. Adjust the correct x, y coordinates (while holding one of the
Warming up (>15 minutes). White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see Table 6-1 White D alignment
6.2 Hardware Alignments values - LED - Minolta CA-210, or 6-2 White D alignment
values - LED - Minolta CS-200). Tolerance: dx: 0.002, dy:
Not applicable. 0.002.
Repeat this step for the other colour temperatures that
need to be aligned.
6.3 Software Alignments When finished press OK on the RC and then press STORE
(in the SAM root menu) to store the aligned values to the
Put the set in SAM mode (see Chapter 5. Service Modes, Error NVM.
Codes, and Fault Finding). The SAM menu will now appear on Restore the initial picture settings after the alignments.
the screen. Select ALIGNMENTS and go to one of the sub
menus. The alignments are explained below. Table 6-1 White D alignment values - LED - Minolta CA-210
The following items can be aligned:
White point Value Cool (9420K) Normal (8120K) Warm (6080K)
Ambilight. x 0.282 0.292 0.320
y 0.298 0.311 0.345
To store the data:
Press OK on the RC before the cursor is moved to the
left Table 6-2 White D alignment values - LED - Minolta CS-200
In main menu select Store and press OK on the RC
Switch the set to stand-by mode. Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.276 0.287 0.313
For the next alignments, supply the following test signals via a y 0.282 0.296 0.329
video generator to the RF input:

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EN 44 6. Q552.2E LA Alignments

If you do not have a colour analyser, you can use the default Table 6-10 White tone default setting 47" (Sundance)
values. This is the next best solution. The default values are
average values coming from production. White Tone e.g. 47PFL74x6x
Select a COLOUR TEMPERATURE (e.g. COOL, Colour Temp R G B
NORMAL, or WARM). Normal t.b.d. t.b.d. t.b.d.
Set the RED, GREEN and BLUE default values according Cool t.b.d. t.b.d. t.b.d.
to the values in Table 6-3 to Table 6-15. Warm t.b.d. t.b.d. t.b.d.
When finished press OK on the RC, then press STORE (in
the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments. Table 6-11 White tone default setting 32" (Sundance 3D)

White Tone e.g. 32PFL76x6x


Table 6-3 White tone default setting 32" (Blockbuster)
Colour Temp R G B
Normal 108 114 127
White Tone e.g. 32PFL66x6x
Cool 90 103 127
Colour Temp R G B
Warm 127 121 103
Normal 127 125 104
Cool 123 127 119
Warm 127 116 62 Table 6-12 White tone default setting 37" (Sundance 3D)

White Tone e.g. 37PFL76x6x


Table 6-4 White tone default setting 37" (Blockbuster)
Colour Temp R G B
Normal 126 125 127
White Tone e.g. 37PFL66x6x
Cool 112 112 127
Colour Temp R G B
Warm 127 113 86
Normal 122 104 127
Cool 103 91 127
Warm 127 98 84 Table 6-13 White tone default setting 42" (Sundance 3D)

White Tone e.g. 42PFL76x6x


Table 6-5 White tone default setting 40" (Blockbuster)
Colour Temp R G B
Normal 122 125 126
White Tone e.g. 40PFL66x6x
Cool 111 113 127
Colour Temp R G B
Warm 127 117 84
Normal 124 126 109
Cool 118 126 123
Warm 127 120 69 Table 6-14 White tone default setting 47" (Sundance 3D)

White Tone e.g. 47PFL76x6x


Table 6-6 White tone default setting 46" (Blockbuster)
Colour Temp R G B
Normal t.b.d. t.b.d. t.b.d.
White Tone e.g. 46PFL66x6x
Cool t.b.d. t.b.d. t.b.d.
Colour Temp R G B
Warm t.b.d. t.b.d. t.b.d.
Normal 127 123 96
Cool 126 126 113
Warm 127 120 54 Table 6-15 White tone default setting 55" (Sundance 3D)

White Tone e.g. 55PFL76x6x


Table 6-7 White tone default setting 55" (Blockbuster)
Colour Temp R G B
Normal t.b.d. t.b.d. t.b.d.
White Tone e.g. 55PFL66x6x
Cool t.b.d. t.b.d. t.b.d.
Colour Temp R G B
Warm t.b.d. t.b.d. t.b.d.
Normal t.b.d. t.b.d. t.b.d.
Cool t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d. 6.4 Option Settings

Table 6-8 White tone default setting 32" (Sundance) 6.4.1 Introduction

White Tone e.g. 32PFL74x6x The microprocessor communicates with a large number of I2C
Colour Temp R G B ICs in the set. To ensure good communication and to make
Normal 112 110 127 digital diagnosis possible, the microprocessor has to know
Cool 74 98 127 which ICs to address. The presence / absence of these
Warm 127 111 95 PNX51XX ICs (back-end advanced video picture improvement
IC which offers motion estimation and compensation features
Table 6-9 White tone default setting 42" (Sundance) (commercially called HDNM) plus integrated Ambilight control)
is made known by the option codes.
White Tone e.g. 42PFL74x6x
Notes:
Colour Temp R G B
After changing the option(s), save them by pressing the OK
Normal 111 115 127
button on the RC before the cursor is moved to the left,
Cool 94 104 127
select STORE in the SAM root menu and press OK on the
Warm 127 118 96
RC.
The new option setting is only active after the TV is
switched off / stand-by and on again with the mains
switch (the NVM is then read again).

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Alignments Q552.2E LA 6. EN 45

6.4.2 Dealer Options When all the correct options are set, the sum of the decimal
values of each Option Byte (OB) will give the option number.
For dealer options, in SAM select Dealer options.
See Table 6-17 SAM mode overview. Diversity
Not all sets with the same Commercial Type Number (CTN)
6.4.3 (Service) Options necessarily have the same option code!
Use of Alternative BOM => an alternative BOM number usually
From 2011 onwards, it is not longer possible to change indicates the use of an alternative display or power supply. This
individual option settings in SAM. Options can only be changed results in another display code thus in another Option code.
all at once by using the option codes as described in section Refer to Chapter 2. Technical Specifications, Diversity, and
Connections.
6.4.4.

6.4.5 Option Code Overview


6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in Refer to the sticker in the set for the correct option codes.
Important: after having edited the option numbers as
two long strings of numbers).
described above, you must press OK on the remote control
An option number (or option byte) represents a number of
different options. When you change these numbers directly, before the cursor is moved to the left!
you can set all options very quickly. All options are controlled
via eight option numbers. 6.4.6 Option Bit Overview
When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you For test purposes, please find below an overview of the Option
must set both option number lines. You can find the correct Codes on bit level. With a bin/dec converter, you can calculate
option numbers on a sticker inside the TV set. the Option Code.
Example: The options sticker gives the following option
numbers: Caution
32776 00001 15421 02235 When manipulating option codes, know what youre doing.
43847 36615 33024 00012 Wrong option codes could damage the set.
The first line (group 1) indicates hardware options 1 to 4, the Prescribed option codes below are an example, not valid for all
second line (group 2) indicate software options 5 to 8. sets and are subject to modification.
Every 5-digit number represents 16 bits (so the maximum value The correct option codes are always present on a sticker inside
will be 65536 if all options are set). the set!

Table 6-16 Option codes at bit level (Option 1 - Option 8)

Option & Bit Dec. Value Option Name Prescribed Value1) Description
Option 1 (prescribed value 327761))
Bit 15 (MSB) 32768 Video Store Streaming 11) 0 = OFF
1 = ON
Bit 14 16384 Multi App 001) 00 = none
01 = multi app (Multiview BASIC)
Bit 13 8192
10 = AVPIP + multi app (Multiview ENHANCED)
11 = future use
Bit 12 4096 Perfect Pixel 001) 00 = Pixel Plus HD
01 = Pixel Precise HD
Bit 11 2048
10 = Perfect Pixel HD
11 = future use
Bit 10 1024 Tuner Type 0001) 000 = TH2603 (Europe/AP)
001 = FA2307 (Brazil)
Bit 9 512
010 = VA1E1ED2411
Bit 8 256 011 = future use
100 = future use
101 = future use
110 = future use
111 = future use
Bit 7 128 PQ Profiles 0001) 000 = profile 0
001 = profile 1
Bit 6 64
010 = profile 2
Bit 5 32 011 = profile 3
100 = profile 4
101 = profile 5
110 = profile 6
111 = profile 7
Bit 4 16 DNM 011) 00 = Perfect Natural Motion
01 = HD Natural Motion
Bit 3 8
10 = future use
11 = future use
Bit 2 4 MOP AL 01) CPLD, not used in 2011
Bit 1 2 AL Optical Syst 001) 00 = 140 nit
01 = 200 nit
Bit 0 (LSB) 1
10 = future use
11 = future use
Option 2 (prescribed value 000011))
Bit 15 (MSB) 32768 AL Shop Mode 01) 0 = boost mode in shop is OFF
1 = boost mode in shop is ON
Bit 14 16384 AL settings storage location 01) 0 = stored in AL modules
1 = stored in SSB
Bit 13 8192 Wall Adaptive AL 01) 0 = OFF
1 = ON
Bit 12 4096 Sunset 01) 0 = OFF
1 = ON

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EN 46 6. Q552.2E LA Alignments

Option & Bit Dec. Value Option Name Prescribed Value1) Description
Bit 11 2048 Ambient Light 00001) 0000 = none
0001 = 2-sided (3/3)
Bit 10 1024
0010 = 2-sided (4/4)
Bit 9 512 0011 = 2-sided (5/5)
Bit 8 256 0100 = 2-sided (6/6)
0101 = 2-sided (7/7)
0110 = 3-sided (5/5/5)
0111 = 3-sided (6/6/6)
1000 = 3-sided (3/6/3)
1001 = 3-sided (6/9/6)
1010 = 2-sided (8/8)
1011 = 3-sided (4/4/4)
1100 = 2-sided (1/1)
1101 = 2-sided (2/2)
1110 = future use
1111 = future use
Bit 7 128 FPGA3Dact/1Ddimm 01) 0 = OFF
1 = ON
Bit 6 64 AL Select 01) 0 = AL2k10
1 = AL2k11
Bit 5 32 3D Passive 01) 0 = 2D
1 = 3D passive
Bit 4 16 Smart Bit Enhancement (SBE) 01) 0 = off
1 = on (200 Hz board present)
1)
Bit 3 8 Super Resolution 0 0 = Super Resolution SD
1 = Super Resolution HD
Bit 2 4 Light Sensor LUT 001) 00 = Lut 0
01 = Lut 1
Bit 1 2
10 = Lut 2
11 = Lut 3
Bit 0 (LSB) 1 Light Sensor 11) 0 = OFF
1 = ON
Option 3 (prescribed value 154211))
Bit 15 (MSB) 32768 Side IO 01) 0 = not present
1 = present
Bit 14 16384 AV3 0111) 000 = none
001 = CVBS
Bit 13 8192
010 = YPbPr
Bit 12 4096 011 = YPbPr/LR
100 = YPbPr/HV/LR
101 = CVBS/LR
110 = CVBS/Yc/LR
111 = future use
Bit 11 2048 AV2 111) 00 = Scart/CVBS/RGB/LR
01 = CVBS/LR
Bit 10 1024
10 = YPbPr/LR
11 = none
Bit 9 512 AV1 001) 00 = Scart/CVBS/RGB/LR
01 = CVBS/YC/YPbPr/HV/LR
Bit 8 256
10 = CVBS/YC/YPbPr/LR
11 = YPbPr/LR
Bit 7 128 3D Prepared 01) 0 = not prepared
1 = prepared
Bit 6 64 Sound in Stand 01) 0 = Sound in Cabinet
1 = Sound in Stand
Bit 5 32 Headphone 11) 0 = OFF
1 = ON
Bit 4 16 Seamless System 11) 0 = OFF
1 = ON
Bit 3 8 ViewPort 21_9/PQL 11) 0 = OFF
1 = ON
Bit 2 4 HDMI Side 11) 0 = OFF
1 = ON
Bit 1 2 HDMI 3 01) 0 = OFF
1 = ON
1)
Bit 0 (LSB) 1 HDMI 2 1 0 = OFF
1 = ON
Option 4 (prescribed value 022351))
Bit 15 (MSB) 32768 Cabinet 000011) Cabinet type
(no detailed info available)
Bit 14 16384
Bit 13 8192
Bit 12 4096
Bit 11 2048
Bit 10 1024 Region 0001) 000 = Europe (/02, /05 & /12)
001 = AP PAL multi
Bit 9 512
010 = AP NTSC
Bit 8 256 011 = Russian (/60)
100 = Latam (/78 & /77)
101 = Australia
110 = China (/93)
111 = future use
Bit 7 128 Display MSB 11) 0 = display option =< 255
1 = display option > 255
Bit 6 64 S Video 01) 0 = OFF
1 = ON
Bit 5 32 Video Store SD Card 11) 0 = OFF
1 = ON
Bit 4 16 Internet SW Upgrade 11) 0 = OFF
1 = ON (automatic software upgradable via internet)
1)
Bit 3 8 Online Service 1 0 = OFF
1 = ON (connection to internet provider Philips)

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Alignments Q552.2E LA 6. EN 47

Option & Bit Dec. Value Option Name Prescribed Value1) Description
Bit 2 4 WiFi 01) 0 = OFF
1 = ON (wireless connection to ethernet; no link with Ethernet op-
tion bit 0)
Bit 1 2 DLNA 11) 0 = OFF
1 = PC link
Bit 0 (LSB) 1 Ethernet 11) 0 = OFF
1 = Ethernet vonnector and HW present
Option 5 (prescribed value 438471))
Bit 15 (MSB) 32768 8 Days EPG 11) 0 = OFF
1 = ON (country dependent)
Bit 14 16384 DVBC Installation 011) 00 = OFF
01 = Country dependent
Bit 13 8192
10 = ON
11 = future use
Bit 12 4096 DVBT Installation 011) 00 = OFF
01 = Country dependent
Bit 11 2048
10 = ON
11 = future use
Bit 10 1024 DVB-S 01) 0 = OFF
1 = ON (ATSC/DVB should be ON)
Bit 9 512 DVB-C 11) 0 = OFF
1 = ON (ATSC/DVB should be ON)
Bit 8 256 DVB 11) 0 = analogue only
1 = DVBT (and C/S depending DVBC/S option)
1)
Bit 7 128 Display Type 01000111 Display Type (ex.: 327)
Bit 6 64
Bit 5 32
Bit 4 16
Bit 3 8
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Option 6 (prescribed value 366151))
Bit 15 (MSB) 32768 E-sticker 11) 0 = OFF
1 = ON
Bit 14 16384 Hotel Mode 001) 00 = OFF
01 = 1V1
Bit 13 8192
10 = 1V2
11 = future use
Bit 12 4096 Virgin 01) 0 = ON
1 = OFF
Bit 11 2048 USB Time Shift 11) 0 = OFF
1 = ON
Bit 10 1024 Auto Store Mode 111) 00 = none
01 = PDC_VPS
Bit 9 512
10 = TXT page
11 = PDC_VPS_TXT
Bit 8 256 PVR 11) 0 = OFF
1 = ON
Bit 7 128 Ginga 001) 00 = OFF
01 = Country dependent
Bit 6 64
10 = ON
11 = future use
Bit 5 32 MHP 001) 00 = OFF
01 = Country dependent
Bit 4 16
10 = ON
11 = future use
Bit 3 8 Over the Air Download 011) 00 = OFF
01 = Country dependent
Bit 2 4
10 = ON
11 = future use
Bit 1 2 DVBC light 11) 0 = OFF
1 = ON (when DVBC Installation is OFF or when ON but selected
country is OFF, this option is used)
Bit 0 (LSB) 1 DVBT light 11) 0 = OFF
1 = ON (when DVBT Installation is OFF or Country depend to a
country is OFF, this option is used)
Option 7 (prescribed value 330241))
Bit 15 (MSB) 32768 Visual Identity 11) 0 = User Interface 2k10
1 = User Interface 2k11
Bit 14 16384 Red LED Config LUT 0001) 000 = LED config LUT 0
001 = LED config LUT 1
Bit 13 8192
010 = LED config LUT 2
Bit 12 4096 011 = LED config LUT 3
100 = LED config LUT 4
101 = LED config LUT 5
110 = LED config LUT 6
111 = LED config LUT 7
Bit 11 2048 Board Identifier 001) not used, should always be 00
Bit 10 1024
Bit 9 512 Manet 01) 0 = all sets except Manet
1= Manet
Bit 8 256 Auto Power Down 11) 0 = OFF
1 = ON
Bit 7 128 Light Guide 01) 0 = OFF
1 = ON
Bit 6 64 E-box 01) 0 = integrated set
1 = e-box/monitor

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EN 48 6. Q552.2E LA Alignments

Option & Bit Dec. Value Option Name Prescribed Value1) Description
Bit 5 32 Temp LUT 0001) 000 = temp lut 0
001 = temp lut 1
Bit 4 16
010 = temp lut 2
Bit 3 8 011 = temp lut 3
100 = future use
101 = future use
110 = future use
111 = future use
Bit 2 4 Temp Sensor 001) 00 = no temp sensor
01 = temp sensor in display
Bit 1 2
10 = temp sensor on additional board
11 = temp sensor in AL module
Bit 0 (LSB) 1 FAN 01) 0 = no fan
1 = fan(s) present)
Option 8 (prescribed value 000121))
Bit 15 (MSB) 32768 Test 8 01) -
Bit 14 16384 Test 7 01) -
Bit 13 8192 Test 6 01) -
Bit 12 4096 Test 5 01) -
Bit 11 2048 Test 4 (Trick Mode) 01) 0 = OFF
1 = ON
1)
Bit 10 1024 Test 3 (XRay) 0 0 = OFF
1 = ON
Bit 9 512 Test 2 (DBV-T light) 01) 0 = OFF
1 = ON
Bit 8 256 Test 1 (Monitor out) 01) 0 = OFF
1 = ON
Bit 7 128 not used 00001) -
Bit 6 64
Bit 5 32
Bit 4 16
Bit 3 8 WM DRM10 11) 0 = OFF
1 = ON
Bit 2 4 HBBTV 11) 0 = OFF
1 = ON
1)
Bit 1 2 DVB-T2 Installation 0 0 = OFF
1 = ON
Bit 0 (LSB) 1 DVB-T2 01) 0 = OFF
1 = ON

Note 6.5.1 SSB identification


1). Example
Whenever ordering a new SSB, it should be noted that the
correct ordering number (12nc) of a SSB is located on a sticker
6.5 Reset of Repaired SSB
on the SSB. The format is <12nc SSB><serial number>. The
ordering number of a Service SSB is the same as the ordering
A very important issue towards a repaired SSB from a Service number of an initial factory SSB.
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
00PF0000000000 and Production code 00000000000000.
Also the virgin bit is to be set. To set all this, you can use the
ComPair tool or use the NVM editor and Dealer options
items in SAM (do not forget to store).

After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
the TV has to be set according to the type plate of the set. For
this, you can use the NVM editor in SAM. This action also
ensures the correct functioning of the Net TV feature and
access to the Net TV portals. The loading of the CTN and
production code can also be done via ComPair (Model number
programming).

After a SSB repair, the original channel map can be restored,


18310_221_090318.eps
provided that the original channel map was stored on a USB 090319
stick before repair was commenced and that basic functionality
of the TV, needed for this procedure, was not hampered as a
Figure 6-1 SSB identification
result of the defect. The procedure of channel map cloning is
clearly described in the (electronic) user manual.

In case of a display replacement, reset the Operation hours


display to 0, or to the operation hours of the replacement
display.

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Alignments Q552.2E LA 6. EN 49

6.6 Total Overview SAM modes

Table 6-17 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Hardware Info A. SW version e.g. Q5551_0.9.1.0 Display TV & Stand-by SW version and CTN serial
B. Stand-by processor version e.g. STDBY_83.84.0.0 number

C. Production code e.g. see type plate


Operation hours Displays the accumulated total of operation hours.TV
switched on/off & every 0.5 hours is increase one
Errors Displayed the most recent errors
Reset error buffer Clears all content in the error buffer
Alignment White point Colour temperature Normal 3 different modes of colour temperature can be
Warn selected

Cool
White point red LCD White Point Alignment. For values,
White point green see Table 6-3 White tone default setting 32"
(Blockbuster) to 6-15 White tone default setting 55"
White point blue
(Sundance 3D)
Ambilight Select module
Brightness
Select matrix
Dealer options Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not
start up (once) with a language selection menu after
the mains switch is turned on for the first time (virgin
mode)
E-sticker Off/On Select E-sticker On/Off (USPs on-screen)
Auto store mode None
PDC/VPS
TXT page
PDC/VPS/TXT
Option numbers Group 1 e.g. 00008.00001.15421.02239 The first line (group 1) indicates hardware options 1
to 4
Group 2 e.g. 44816.34311.33024.00000 The second line (group 2) indicates software options
5 to 8
Store Store after changing
Initialise NVM N.A.
Store Select Store in the SAM root menu after making any
changes
Operation hours display 0003 In case the display must be swapped for repair, you
can reset the Display operation hours to 0. So,
this one does keeps up the lifetime of the display
itself (mainly to compensate the degeneration
behaviour)
Software maintenance Software events Display Display information is for development purposes
Clear
Test reboot
Test cold reboot
Test application crash
Hardware events Display Display information is for development purposes
Clear
Test setting Digital info Current frequency: 538
QAM modulation: 64-qam Display information is for development purposes
Symbol rate:
Original network ID: 12871
Network ID: 12871
Transport stream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: 8191
Install start frequency 000 Install start frequency from 0 MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before
Digital + Analogue installation

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EN 50 6. Q552.2E LA Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Development file Development 1 file version Display parameters DISPT5.0.9.29 Display information is for development purposes
versions Acoustics parameters ACSTS
5.0.6.20
PQ - TV550 1.0.27.22
PQS- Profile set
PQF - Fixed settings
PQU - User styles
Ambilight parameters PRFAM 5.0.5.2
Development 2 file version 12NC one zip software Display information is for development purposes
Initial main software
NVM version Q55x1_0.4.5.0
Flash units software
Temp com file version none
Upload to USB Channel list To upload several settings from the TV to an USB
Personal settings stick

Option codes
Alignments
Identification data
History list
All (options included)
Download from USB Channel list To download several settings from the USB stick to
Personal settings the TV

Option codes
Alignments
Identification data
All (options included)
NVM editor Type number see type plate NVM editor; re key-in type number and production
AG code see type plate code after SSB replacement

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Circuit Descriptions Q552.2E LA 7. EN 51

7. Circuit Descriptions
Index of this chapter: implementation of passive 3D
7.1 Introduction removal of TCON from the SSB (comes with the display)
7.2 Power Supply changed power architecture
7.3 DC/DC Converters new USB hub (for Sundance xxPFL76xx/xx sets).
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception The Q552.2E LA chassis comes with the following stylings:
7.6 HDMI Blockbuster (series xxPFL66xx),
7.7 Video and Audio Processing - PNX855xx Sundance (series xxPFL76xx).

Notes: 7.1.1 Implementation


Only new circuits (circuits that are not published recently)
are described. Key components of this chassis are:
Figures can deviate slightly from the actual situation, due
PNX855xx System-On-Chip (SOC) TV Processor
to different set executions.
TX26xx Hybrid Tuner (DVB-T/C, analogue)
For a good understanding of the following circuit STV6110AT DVB-S Satellite Tuner
descriptions, please use the wiring-, block- (see chapter
SII9x87 HDMI Switch
9. Block Diagrams) and circuit diagrams (see chapter
TPA312xD2PWP Class D Power Amplifier
10. Circuit Diagrams and PWB Layouts).Where necessary, LAN8710 Dual Port Gigabit Ethernet media access
you will find a separate drawing for clarification.
controller.

7.1 Introduction 7.1.2 TV550 Architecture Overview

The Q552.2E LA is part of the TV550 platform, is a derivative For details about the chassis block diagrams refer to chapter 9.
from the Q552.1E LA and uses the (same) PNX855xx chipset. Block Diagrams. An overview of the TV550 2011 architecture
The major deltas versus its predecessor Q551 are: can be found in Figure 7-1.
support of DVB-T2 (second generation DVBT)

FLASH
512MB

DDR2 NVM SPI


4x 128MB -533 8kB 64kB
32
LVDS only
Matrix
FHD@120p
FHD@100p
DVB-C (EU+HK)
DVB-T (EU)

Hybrid
Tuner NXP
PNX85500
DVB-S2 SOC AL CPLD
DVB-S2 (EU)
Tuner

HDMI 1.3 CLASS-D


mux

Ethernet
Stdby 3V3 PHY USB 3D
1V1
1V8 buffer
DC/DC 2V5
SD-CARD
WIFI

3V3
IR

5V CI

19100_059_110217.eps
110217

Figure 7-1 Architecture of TV550 platform 2011

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EN 52 7. Q552.2E LA Circuit Descriptions

7.1.3 SSB Cell Layout

1M95 1M99 1M59

DVB-S DC/DC

DC/DC
C
1M71

PCMCIA
LONG
Ambilight
CPLD

DDR2
1G50

13.65mm
FLASH

F-type
DVB-S2
CD Tuner
DDR2
LVDS-OUT
DDR

CA
PNX85500
M1
27x27 TS-IN

1.00mm USB
HDMI
DVB-S DC/DC
DDR2 ETH Heatsink GPIO

IS ANA ANA STDBY


SPDIF AUD VID
1735

Class-D

SD-SLOT
1D38

DDR2

1F24

USB2.0
1G51

SCART1/YPbPr SVC
Phone
Head

1E32 Hybrid
7E01

Tuner
R L Y Pb Pr L/R
1M21

Process Support Wire


1M20

T
U
O

HDMI
C
TR
L
0

87
91
1

3
2

3D

SPDIF
HDMI

HDMI

HDMI

Output
VGA

19100_058_110217.eps
110217

Figure 7-2 SSB layout cells (top view)

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Circuit Descriptions Q552.2E LA 7. EN 53

7.2 Power Supply Table 7-2 Connector overview 37" sets

7.2.1 Power Supply Unit Blockbuster sets Connector


no. 1308 1316 1M95
Descr. Mains to display to SSB
Where detailed information for power supply boards is given in
Pin CN1 CN2 CN4
this manual, the boards should be repaired where possible.
1 N Anode_R +3V3stdby
2 L n.c. Standby
In this manual, detailed board schematics are given for Delta 3 - R5 Cathode GND1
power supply units (refer to schematics 10-1, 10-2 and 10-3), 4 - R4 Cathode GND1
where for FSP- and LGIT power supply units the functional 5 - R3 Cathode +12V
block diagrams are given (refer to Figure 7-3 , Figure 7-4 and 6 - R2 Cathode +12V
Figure 7-5). 7 - R1 Cathode +Vsnd (+24V)
8 - L1 Cathode GND_SND
In future releases of the manual, more schematics will be 9 - L2 Cathode BL-ON-OFF
published. 10 - L3 Cathode BL-DIM1 (Vsync)
11 - L4 Cathode BL-I-CTRL
7.2.2 Connector overview Blockbuster (series xxPFL6600/xx) 12 - L5 Cathode POK
13 - n.c. +24V (AL2_DVBS)

Table 7-1 Connector overview 32" sets 14 - Anode_L GND1


15 - - -

Connector
no. 1308 1316 1M95 Table 7-3 Connector overview 40" sets
Descr. Mains to display to SSB
Pin CN1 CN2 CN4 Connector
1 N A2 +3V3SB no. 1308 1316 1M95
2 L n.c. Standby Descr. Mains to display to SSB
3 - pin 5 GND1 Pin CN1 CN2 CN4
4 - n.c. GND1 1 N Anode 1+ +3V3stdby
5 - pin 3 +12V3 2 L n.c. Standby
6 - n.c. +12V3 3 - Cathode 1- GND1
7 - OCD +Vsnd 4 - n.c. GND1
8 - n.c. GND1 5 - Anode 2+ +12V
9 - A1 BL-ON-OFF 6 - n.c. +12V
10 - n.c. BL-DIM1 7 - Cathode 2- +Vsnd (+24V)
11 - pin 13 BL-I-CTRL 8 - n.c. GND_SND
12 - n.c. POK 9 - Anode 3+ BL-ON-OFF
13 - pin 11 +24V 10 - n.c. BL-DIM1 (Vsync)
14 - n.c. GND1 11 - Cathode 3- BL-I-CTRL
15 - GND1 - 12 - n.c. POK

7.2.3 Functional block diagram FSP Supply Units FPS096-4FS01(REV01) & FSP110-4FS01B

Mains Filter and Rectifier Mains Converter Output Rectifier and filter
Vsnd
AC INPUT EMI MAINS
FUSE FILTER RECTIFIER 24V
POWER RECTIFIER
TRANSFORMER &
+
FILTER Val
Mains CAP.
12Vssb BL_ON_OFF
RECTIFIER
&
FILTER
PWM DRIVER
CIRCUIT
RECTIFIER BL_ON
&
FILTER
LED Controller 2
Feedback Circuit

BOOST AL_LED Output


CONSTANT CONVERTER
VOLTAGE + CAP. AR_LED Output
AUX POWER

CIRCUIT

LED DRIVER
OVP DETECT BL_DIM
STB
POK
STB ON STB ON

CONSTANT
Standby Power Converter CURRENT
CIRCUIT

POWER BL_I_CTL
TRANSFORMER RECTIFIER 3V3stdby
&
FILTER Backlight
Current
Controller
PWM DRIVER
Brown In/Out sense SWITCH
CIRCUIT

CONSTANT
VOLTAGE
CIRCUIT

19103_002_110531.eps
110601

Figure 7-3 Functional block diagram FSP supply units FPS096-4FS01(REV01) & FSP110-4FS01B

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EN 54 7. Q552.2E LA Circuit Descriptions

7.2.4 Functional block diagram LGIT Supply Units PLDE-P007A B & PLDK-P011AB

LED Driver 1
Line LED Backlight
filter PFC Resonant
converter LED Driver 2
ACin
198 V - 264 V Diode
VSSB (12.3 V)
90 V - 276 V bridge

Boost VSND (24.5 V)


STBY VSTB (3.3 V)

19103_003_110531.eps
110531

Figure 7-4 Functional block diagram LGIT supply units PLDE-P007A B & PLDK-P011AB

7.2.5 Functional block diagram LGIT Supply Unit PLDG-P009A(1.1)

LED Driver 1
Line LED Backlight
filter PFC Resonant
converter LED Driver 2
ACin
198 V - 264 V Diode
VSSB (12.3 V)
90 V - 276 V bridge

Reg VSND (24.5 V)

STBY VSTB (3.3 V)

19103_004_110531.eps
110531

Figure 7-5 Functional block diagram LGIT supply unit PLDG-P009A(1.1)

7.3 DC/DC Converters +3V3-DVBS, clean voltage for silicon tuner and DVB-S2
channel decoder
The on-board DC/DC converters deliver the following voltages +2V5-DVBS, clean voltage for DVB-S2 channel decoder
(depending on set execution): +1V-DVBS, core voltage for DVB-S2 channel decoder.
+3V3-STANDBY, permanent voltage for the Stand-by
controller, LED/IR receiver and controls; connector 1M95 A +12 V under-voltage detector (see diagram B03C) enables
pin 1 the 12V to 3.3V and 12V to 5V DC/DC converters via the
+12V, input from the power supply for TV550 common ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter
(active mode); connector 1M95 pins 6, 7 and 8 via the ENABLE-1V8 line. DETECT2 is the signal going to the
+24V, input from the power supply for DVB-S2 (in active Stand-by microcontroller and ENABLE-3V3n is the signal
mode); connector 1M09 pins 1 and 2 coming from the Stand-by microcontroller.
+1V1, core voltage supply for PNX855xx; has to be started
up first and switched "off" last (diagram B03B) Diagram B03D contains the following linear stabilisers:
+1V2, supply voltage for analogue blocks inside PNX855xx +2V5 stabiliser, built around item no. 7UCO
+1V8, supply voltage for DDR2 (diagram B03B) +5V-TUN stabiliser, built around items no. 7UA6 and 7UA7
+2V5, supply voltage for analogue blocks inside PNX855xx +1V2 stabiliser, built around items no. 7UA3 and 7UA4.
(see diagram B03E)
+3V3, general supply voltage (diagram B03E) Diagram B08A contains the DVB-S2-related DC/DC
+5V, supply voltage for USB and CAM (diagram B03E) converters and -stabilisers:
+5V-TUN, supply voltage for tuner (diagram B03E) a +24V under-voltage detection circuitry is built around
+V-LNB, input voltage for LNB supply IC (item no. 7T50) item no. 7T04
+5V-DVBS, input intermediate supply voltage for DVB-S2 the switching frequency of the 24 to 14...20V switched
(diagram B08A) mode converter is 350 kHz (item no. 7T03 and +V-LNB
lines)

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Circuit Descriptions Q552.2E LA 7. EN 55

the output signal on the +V-LNB line goes to the LNBH23Q


(item no. 7T50)
the LNBH23Q (item no. 7T50) sends a feedback signal via
the V0-CNTRL line
the switching frequency of the +5V-DVBS to +1-DVBS
switched mode converter is 900 kHz (item no. 7T00)
a delay line for the +2V5-DVBS and +1V-DVBS lines is
created with item no. 3T03 (R=10k) and 2T06 (C=100n)
a 3.3V to 2.5V linear stabiliser is built around item no. 7T01
a 5V to 3.3V linear stabiliser is built around item no. 7T02.

Diagram B08B contains the DVB-S2 LNB supply:


the +V-LNB signal comes from item no. 7T03
the V0-CTRL signal goes to item no. 7T03 18770_235_100127.eps
the LNB-RF1 goes to the LNB. 100219

Figures gives a graphical representation of the DC/DC Figure 7-7 Front-End block diagram European/China region
converters with its current consumptions:
7.5 Front-End DVB-S(2) reception
+ 5V 5-TUN
196 m A
+ 5V + 5V 5-TUN + 5V -TUN
+ 5V
dc -dc
2179 m A
+ 5V -TUN
s tabiliz er
196 m A The Front-End for the DVB-S(2) application consist of the
following key components:

+ 12V
+ 3V 3
+ 3V 3 + 3V 3
+ 2V 5
+ 2V 5 Satellite Tuner; I2C address 0xC6 (bridged via channel
2919 m A 2371 m A 450 m A
dc -dc s tabiliz er
decoder)
Channel decoder; I2C address 0xD0
LNB switching regulator; I2C address 0x14
+ 1V 8 + 1V 2
+ 1V 8
+ 1V 8
2450 m A
+ 1V 2
550 m A
Amplifier
dc -dc s tabiliz er
PNX855xx SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.
+ 1V 1
+ 1V 1
dc -dc
5100 m A
Below find a block diagram of the front-end application for
DVB-S(2) reception.
18770_226_100127.eps
100426

Figure 7-6 DC/DC converters

7.4 Front-End Analogue and DVB-T, DVB-C;


ISDB-T reception

7.4.1 European/China region

The Front-End for the European/China region consist of the


following key components:

Hybrid Tuner 18770_237_100127.eps


100219
Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter
(8 MHz) (China)
Bandpass filter Figure 7-8 Front-End block diagram DVB-S(2) reception
Amplifier
PNX855xx SoC TV processor with integrated DVB-T and This application supports the following protocols:
DVB-C channel decoder and analogue demodulator. Polarization selection via supply voltage (18V = horizontal,
13V = vertical)
Band selection via toneburst (22 kHz): tone on = high
Below find a block diagram of the front-end application for this
band, tone off = low band
region.
Satellite (LNB) selection via DiSEqC 1.0 protocol
Reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.

7.6 HDMI

In this platform, the Silicon Image Sil9x87 HDMI multiplexer is


implemented. Refer to figure 7-9 HDMI input configuration for
the application.

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EN 56 7. Q552.2E LA Circuit Descriptions

and vivid colour management. High flat panel screen


resolutions and refresh rates are supported with formats
including 1366 768 @ 100Hz/120Hz and 1920 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.

For a functional diagram of the PNX855xx, refer


to Figure 7-10.

18770_243_100203.eps
100203

Figure 7-9 HDMI input configuration

The following multiplexers can be used:


Sil9187A (does not support Instaport technology for fast
switching between input signals)
Sil9287B (supports Instaport technology for fast
switching between input signals).
The hardware default I2C addresses are:
Sil9187A: 0xB0/0xB2 (random: software workaround)
Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:


+5V detection mechanism
Stable clock detection mechanism
Integrated EDID
RT control
HPD control
Sync detection
TMDS output control
CEC control
EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.

7.7 Video and Audio Processing - PNX855xx

The PNX855xx is the main audio and video processor (or


System-on-Chip) for this platform. It has the following features:

Multi-standard digital video decoder (MPEG-2, H.264,


MPEG-4)
Integrated DVB-T/DVB-C channel decoder
Integrated CI+
Integrated motion accurate picture processing (MAPP2)
High definition ME/MC
2D LED backlight dimming option
Embedded HDMI HDCP keys
Extended colour gamut and colour booster
Integrated USB2.0 host controller
Improved MPEG artefact reduction compared with
PNX8543
Security for customers own code/settings (secure flash).

The TV550 combines front-end video processing functions,


such as DVB-T channel decoding, MPEG-2/H.264 decode,
analog video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
generation Motion Accurate Picture Processing (MAPP2). The
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness

2011-Jun-01 back to
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Circuit Descriptions Q552.2E LA 7. EN 57

PNX85500x
MEMORY
CONTROLLER

TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)

DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT

Low-IF DIGITAL IF MPEG/H.264


VIDEO Motion-accurate
DECODER pixel processing

SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION

AUDIO DACS analog audio


SPDIF AUDIO IN
AUDIO DSP
I 2S
AUDIO OUT
HDMI SPDIF
HDMI 450 MHz
RECEIVER AV-DSP

SYSTEM 560 MHz DRAWING


CONTROLLER MIPS32 ENGINE
(8051) 24KEf CPU

DMA BLOCK

I2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x8 Memory MAC
Card

18770_241_100201.eps
100219

Figure 7-10 PNX855xx functional diagram

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EN 58 8. Q552.2E LA IC Data Sheets

8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of memory and logic
configurations of ICs that are drawn as black boxes in the ICs).

8.1 Diagram USB Hub B01C, USB2513B (IC 7F25)

Block diagram
To EEPROM or
To Upstream Upstream SMBus Master
24 MHz
VBUS USB Data SDA SCL
Crystal
3.3 V

Bus- Serial
Power Upstream Regulator PLL Interface
Detect/ PHY
Vbus Pulse
Serial
Repeater Interface Controller
Engine

3.3 V

Regulator
TT
#1
... TT
#x
Port
Controller

CRFILT

Routing & Port Re-Ordering Logic

PHY#1
Port #1
OC Sense
Switch Driver/
LED Drivers
... PHY#x
Port #x
OC Sense
Switch Driver/
LED Drivers

USB Data OC Port USB Data OC Port


Downstream Sense Power Downstream Sense Power
Switch/ Switch/
LED LED
Drivers Drivers

The x indicates the number of available downstream ports: 2, 3, 4, or 7.


Note : The LED port indicators only apply to USB2513i.

Pinning information
SDA / SMBDATA / NON_REM[1]
SCL / SMBCLK / CFG_SEL[0]
HS_IND / CFG_SEL[1]
VBUS_DET

RESET_N

VDD33

NC

NC

NC
27
26
25
24
23
22
21
20
19

SUSP_IND / LOCAL_PWR / NON_REM[0] 28 18 NC

VDD33 29 17 OCS_N[2]

USBDM_UP 30 16 PRTPWR[2] / BC_EN[2]*

USBDP_UP 31
SMSC 15 VDD33
USB2512/12A/12B
XTALOUT 32 14 CRFILT
USB2512i/12Ai/12Bi
XTALIN / CLKIN 33 13 OCS_N[1]
(Top View QFN-36)
PLLFILT 34 12 PRTPWR[1] / BC_EN[1]*
Ground Pad
RBIAS 35 (must be connected to VSS) 11 TEST

VDD33 36 10 VDD33
1
2
3
4
5
6
7
8
9
USBDM_DN[1]

USBDM_DN[2]
USBDP_DN[1]

USBDP_DN[2]

VDD33

NC

NC

NC

NC

Indicates pins on the bottom of the device.

18770_301_100217.eps
100217

Figure 8-1 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 59

8.2 Diagram Temp sensor & headphone B01J, LM75BDP (IC 7FD1)

Block diagram
VCC

LM75B
BIAS POINTER CONFIGURATION
REFERENCE REGISTER REGISTER

TEMPERATURE
BAND GAP COUNTER
REGISTER
TEMP SENSOR 11-BIT
SIGMA-DELTA
A-to-D TOS
TIMER
CONVERTER REGISTER
OSCILLATOR
COMPARATOR/ THYST
INTERRUPT REGISTER
POWER-ON
RESET OS

LOGIC CONTROL AND INTERFACE

A2 A1 A0 SCL SDA GND

Pinning information

SDA 1 8 VCC
SCL 2 7 A0
LM75BDP
OS 3 6 A1
GND 4 5 A2

18770_300_100217.eps
100217

Figure 8-2 Pin configuration

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EN 60 8. Q552.2E LA IC Data Sheets

8.3 Diagram NANDflash - conditional access B02A, PNX855xx (IC7S00)

Block diagram

PNX8550x
MEMORY
CONTROLLER

TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)

DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO analog CVBS
VIDEO ENCODER
OUTPUT analog Y/C
Low-IF
DIGITAL IF MULTI-
Direct-IF STANDARD Motion-accurate
VIDEO pixel processing
DECODER

SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION

AUDIO DACS analog audio


SPDIF AUDIO IN
AUDIO DSP
I2S
AUDIO OUT
HDMI SPDIF
HDMI 450 MHz
RECEIVER AV-DSP

SYSTEM 500 MHz DRAWING


CONTROLLER MIPS32 ENGINE
(8051) 24KEf CPU

Scatter/Gather
TS Demux

I2C PWM Px_x IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x 10 Memory MAC
Card

Pinning information
ball A1 PNX8550xE
index area 2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF

Transparent top view


18770_308_100217.eps
100217

Figure 8-3 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 61

8.4 Diagram Audio B03A, TPA312xD2PWP (IC7D10)

Block diagram

TPA3120D2
1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR

PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F

PVCCL
AVCC
PVCCR

VCLAMP
Shutdown
SD 1 F
Control

MUTE
GAIN0

GAIN1
} Control

Pinning information
PWP (TSSOP) PACKAGE
(TOP VIEW)

PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR

I_18020_142.eps
100402

Figure 8-4 Internal block diagram and pin configuration

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EN 62 8. Q552.2E LA IC Data Sheets

8.5 Diagram DC/DC B03B, TPS53126PW (IC7U03)

Block diagram

Pinning information
VBST1 1 28 DRVH1
NC 2 27 LL1
EN1 3 26 DRVL1
VO1 4 25 PGND1
VFB1 5 24 TRIP1
NC
TPS53124

6 23 VIN
GND 7 22 VREG5
TEST1 8 21 V5FILT
NC 9 20 TEST2
VFB2 10 19 TRIP2
VO2 11 18 PGND2
EN2 12 17 DRVL2
NC 13 16 LL2
VBST2 14 15 DRVH2

18310_300_090319.eps
100416

Figure 8-5 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 63

8.6 Diagram DC/DC B03E, ST1S10PH (IC 7UD0)

Block diagram

ST1S10PH

Pinning information

DFN8 (4 4) PowerSO-8

I_18010_083.eps
110601

Figure 8-6 Internal block diagram and pin configuration

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EN 64 8. Q552.2E LA IC Data Sheets

8.7 Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)

Block diagram
LD1117DT

Pinning information

DPAK

F_15710_166.eps
100402

Figure 8-7 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 65

8.8 Diagram Ethernet & Service B04C, LAN8710A-EZKH (IC 7E10)

Block diagram
MODE0 HP Auto-MDIX
MODE1 Auto- 10M Tx 10M
MODE Control
MODE2 Negotiation Logic Transmitter TXP / TXN
Reset Transmit Section
nRST Control RXP / RXN
Management 100M Tx 100M
RMIISEL SMI Logic Transmitter
Control
MDIX
Control
TXD[0:3] XTAL1/CLKIN
TXEN PLL
100M Rx DSP System: Analog-to-
TXER XTAL2
TXCLK Logic Clock Digital
Data Recovery
Interrupt
Equalizer nINT
Generator
RMII / MII Logic

RXD[0:3]
RXDV 100M PLL
RXER Receive Section
RXCLK LED1
LED Circuitry
LED2
10M Rx Squelch &
CRS Logic Filters
COL/CRS_DV
Central
RBIAS
MDC 10M PLL Bias
MDIO
PHY
Address PHYAD[0:2]
Latches

Pinning information
VDD1A
RBIAS

RXDV

TXD3
RXN
RXP

TXN
TXP
32

31

30

29

28

27

26

25

VDD2A 1 24 TXD2

LED2/nINTSEL 2 23 TXD1

LED1/REGOFF 3 22 TXD0
SMSC
XTAL2 4 LAN8710/LAN8710i 21 TXEN

XTAL1/CLKIN 5 32 PIN QFN 20 TXCLK

VDDCR 6
(Top View) 19 nRST

RXCLK/PHYAD1 7 18 nINT/TXER/TXD4
VSS
RXD3/PHYAD2 8 17 MDC
10

11

12

13

14

15

16
9

RXD0/MDE0
RXD2/RMIISEL

RXD1/MODE1

CRS

COL/CRS_DV/MODE2

MDIO
VDDIO

RXER/RXD4/PHYAD0

18770_302_100217.eps
100217

Figure 8-8 Internal block diagram and pin configuration

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EN 66 8. Q552.2E LA IC Data Sheets

8.9 Diagram HDMI B04D, SiI9x87B (IC 7EC1)

Block diagram

Pinning information

18770_303_100217.eps
100217

Figure 8-9 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 67

8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)

Block diagram

VDD 8

VDD/2
2 IN 1 VO1 1

+
3 BYPASS

TPA6111A2

6 IN 2
VO2 7
+

5 SHUTDOWN Bias 4
Control

Pinning information
D OR DGN PACKAGE
(TOP VIEW)

VO1 1 8 VDD
IN1 2 7 VO2
BYPASS 3 6 IN2
GND 4 5 SHUTDOWN

18770_309_100217.eps
110602

Figure 8-10 Internal block diagram and pin configuration

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EN 68 8. Q552.2E LA IC Data Sheets

8.11 Diagram DVBS-FE B07A, STV6110AT (IC 7R02)

Block diagram
STV6110AT RF_OUT

IP
RF_IN
IN
QP
AGC
QN

PLL, dividers DC offset compensation


SCL
XTAL_IN
XTAL_INN Amplifier I2C bus interface

XTAL_OUT SDA

18770_304_100217.eps
110601

Figure 8-11 Internal block diagram and pin configuration

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IC Data Sheets Q552.2E LA 8. EN 69

8.12 Diagram DVBS supply B08A, TPS54283PWP (IC 7T03)

Block diagram
TPS54283PWP 2 BOOT1
BP
CLK1 Level
1 PVDD1
Shift
Current
f(IDRAIN1) + DC(ofst) Comparator
S Q
+
GND 4 R
R Q
+
f(IDRAIN1)
FB1 7 Overcurrent Comp
0.8 VREF + 3 SW1
RCOMP f(ISLOPE1) BP
f(IMAX1)

Soft Start Weak


SD1 CLK1 Pull-Down
1 CCOMP Anti-Cross
Conduction MOSFET

VDD2 f(ISLOPE1)
Ramp
Gen 1
TSD 1.2 MHz Divide CLK1
6 A 6 A Oscilator by 2/4 f(ISLOPE2)
EN1 5 SD1 Ramp
Gen 2
Internal
EN2 6 SD2 CLK2
Control
UVLO
150 k
SEQ 10 BP
FB1 Output
150 k Undervoltage 13 BOOT2
FB2 Detect
BP
CLK2 Level
14 PVDD2
Shift
Current
Comparator FET
f(IDRAIN2) + DC(ofst)
S Q Switch
+
GND 4 R
R Q
+
f(IDRAIN2)
FB2 8
Overcurrent Comp
0.8 VREF + 12 SW2
RCOMP f(ISLOPE2) BP
f(IMAX2)

Soft Start Weak


SD2 CLK2 Pull-Down
2 CCOMP Anti-Cross
Conduction MOSFET

5.25-V
BP 11 PVDD2
Regulator
150 k
BP
Level
ILIM2 9
Select

150 k 0.8 VREF


References
IMAX2 (Set to one of two limits)

UDG-07007

18770_305_100217.eps
110601

Figure 8-12 Internal block diagram and pin configuration

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EN 70 8. Q552.2E LA IC Data Sheets

8.13 Diagram DVBS supply B08B, LNBH23Q (IC 7T50)

Block diagram
ISEL TTX ADDR SDA SCL Vcc Byp Vcc- L

LX
Preregulator
+U.V.lockout
+P.ON reset
Controller
PWM

Rsense EN

P-GND VSEL
VSEL
TTX EN

ITEST I2C interface


Vup
VOUT Control

TEN
Linear Post-reg
+Modulator
VoRX +Protections
+Diagnostics I2C Diagnostics

VoTX
22KHz
Oscill. 22KHz Tone
TTX DETIN
Amp. Diagn.
EXTM
22KHz Tone
Freq. Detector
DSQOUT
DSQIN

V CTRL LNBH23
A-GND

Pinning information
1 n.c .
2 n.c .
3 n.c .
4 LX
5 P -G ND
6 S DA Epad Connected with power grounds and to
7 n.c . the ground layer through vias
8 n.c .
to dissipate the heat.
9 S CL
10 A D D R
11 D S Q out
12 D S Q IN
13 E XTM
14 TTX
15 B Y P
16 n.c .
17 n.c .
18 V c c -L
19 V c c
20 A -G N D
21 V oR X
22 V oTX
23 n.c .
24 n.c .
25 n.c .
26 n.c .
27 V up
28 IS E L
29 D E TIN
30 V CTRL
31 n.c .
32 n.c .

18770_306_100217.eps
100217

Figure 8-13 Internal block diagram and pin configuration

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Block Diagrams Q552.2E LA 9. EN 71

9. Block Diagrams
9-1 Wiring diagram Blockbuster 32"
WIRING DIAGRAM 32" BLOCKBUSTER

8M95

TO DISPLAY
SUPPLY
1M95
14P

LOUDSPEAKER
(5213)

1G50
SSB

41P
B 3139 123 6495.x
(1150)
1316 1M95
10P 14P

1735 1D38
3P

SD-CARD
READER
4P
8G50

MAIN POWER SUPPLY

USB
SCART

1G51
51P
32" DPS-93BP 8G51

HDMI
TUNER
(1005)

1M19
LCD DISPLAY

8P

ETHER
TO DISPLAY TO DISPLAY

PHONE
NET

SPDIF
51P (1004) 41P
2P HDMI HDMI HDMI VGA
130
8
LOUDSPEAKER

LOUDSPEAKER
8308
(5216)

(5216)
INLET

C2 C1
MAINS
SWITCH

(8308) IR/LED/CONTROL BOARD J1


(1108) 8P
1316 (PSU) 1M95 (PSU) 1308 (PSU) 1M95 (B03C) 1735 (B03A)
1D38 (B03A) 1M19 (B09A) 1G51 (B06B)
1. ANODE 1 1. +3V3STDBY 1. N LEADING EDGE 1. +3V3-STANDBY 1. LEFT-SPEAKER 1. LIGHT-SENSOR 1. +VDISP
2. NC 2. STANDBY 2. L 2. STANDBY 2. GND-AUDIO 2. GND 2. +VDISP
3. CATHODE 1 3. GND 3. GND 3. GND-AUDIO
RIGHT-SPEAKER 3. RC 3. +VDISP
4. GND 4. GND 4. GND 4. RIGHT-SPEAKER 4. LED-2 4. +VDISP
5. ANODE 2 5. +12V 5. +12VIN 5. +3V3-STANDBY |
6. NC 6. +12V 6. +12VIN 6. LED-1 |
7. CATHODE 2 7. +VSND 7. +24V-AUDIO-POWER 1735 (B03A) 7. KEYBOARD 51. CTRL-DISP
8. NC 8. GND_SND 8. GND 1. LEFT-SPEAKER 8. +5V
9. ANODE 3 9. BL-ON-OFF 9. LAMP-ON 2. GND-AUDIO
10. NC 10. BL-DIM1 10. BACKLIGHT-PWM_BL-VS 3. GND-AUDIO
11. CATHODE 3 11. BL-I-CTRL 11. BACKLIGHT-BOOST 4. RIGHT-SPEAKER
12. NC 12. POK 12. POWER-OK
13. ANODE 4 13. +24V 13. +24V
14. NC 14. GND1 GND 19100_808_110211.eps
15. CATHODE 4 110322

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Block Diagrams Q552.2E LA 9. EN 72

9-2 Wiring diagram Blockbuster 37"


WIRING DIAGRAM 37" BLOCKBUSTER

TO DISPLAY
SUPPLY

8M95

LOUDSPEAKER 1M95
(5213) 14P

1G50
SSB

41P
B 3139 123 6495.x
(1150)
1316 1M95
10P 14P

1735 1D38
8G50

3P

SD-CARD
READER
4P
8G51

MAIN POWER SUPPLY

USB
SCART

1G51
51P
37" FSP110-4FS01

HDMI
(1005)

TUNER
1M19
LCD DISPLAY

8P

ETHER
TO DISPLAY TO DISPLAY

PHONE
NET

SPDIF
51P (1004) 41P HDMI HDMI HDMI VGA
2P
13
08

LOUDSPEAKER
LOUDSPEAKER

(5216)
(5216)

8308

C2 C1
INLET

MAINS IR / LED BOARD J1


SWITCH (1108) 8P
1316 (PSU) 1M95 (PSU) 1308 (PSU) 1M95 (B03C) 1D38 (B03A) 1M19 (B09A) 1G51 (B06B)
1. ANODE 1 1. +3V3STDBY 1. N (8308) 1. +3V3-STANDBY 1. LEFT-SPEAKER 1. LIGHT-SENSOR 1. +VDISP
2. NC 2. STANDBY 2. L 2. STANDBY 2. GND-AUDIO 2. GND 2. +VDISP
3. CATHODE 1 3. GND 3. GND 3. RIGHT-SPEAKER 3. RC 3. +VDISP
4. GND 4. GND 4. GND 4. LED-2 4. +VDISP
5. ANODE 2 5. +12V 5. +12VIN 5. +3V3-STANDBY |
6. NC 6. +12V 6. +12VIN 6. LED-1 |
7. CATHODE 2 7. +VSND 7. +24V-AUDIO-POWER 1735 (B03A) 7. KEYBOARD 51. CTRL-DISP
8. NC 8. GND_SND 8. GND 1. LEFT-SPEAKER 8. +5V
9. ANODE 3 9. BL-ON-OFF 9. LAMP-ON 2. GND-AUDIO
10. NC 10. BL-DIM1 10. BACKLIGHT-PWM_BL-VS 3. GND-AUDIO
11. CATHODE 3 11. BL-I-CTRL 11. BACKLIGHT-BOOST 4. RIGHT-SPEAKER
12. NC 12. POK 12. POWER-OK
13. ANODE 4 13. +24V 13. +24V
14. NC 14. GND1 GND 19100_809_110211.eps
15. CATHODE 4 110309

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 73

9-3 Wiring diagram Blockbuster 40" - 55"


WIRING DIAGRAM 40"- 55" BLOCKBUSTER

TO DISPLY
SUPPLT

1316
10P

1M99
14P
8M95

1M95
MAIN POWER SUPPLY 14P

40" PLDE-P007A
46" PLDG-P009A
55" PLDK-P011A
(1005)

1G50
SSB

41P
B 3139 123 6495.x
(1150)

1735 1D38
3P

SD-CARD
READER
1308

4P
2P

USB
1G51
SCART

51P

HDMI
TUNER
LOUDSPEAKER 8G51
(5213) 8G50

1M19
8P

ETHER

PHONE
NET

SPDIF
HDMI HDMI HDMI VGA

TO DISPLAY LCD DISPLAY TO DISPLAY


51P (1004) 41P

8308

INLET

LOUDSPEAKER LOUDSPEAKER
(5216) (5216)

MAINS C2 C1
SWITCH

(8308)
IR/LED/CONTROL BOARD J1
1316 (PSU) 1M95 (PSU) 1308 (PSU) (1108) 8P 1M95 (B03C) 1735 (B03A) 1M19 (B09A) 1G51 (B06B)
1. ANODE 1 1. +3V3STDBY 1. N 1. +3V3-STANDBY 1. LEFT-SPEAKER 1. LIGHT-SENSOR 1. +VDISP
2. NC 2. STANDBY 2. L LEADING EDGE 2. STANDBY 2. GND-AUDIO 2. GND 2. +VDISP
3. CATHODE 1 3. GND 3. GND 3. GND-AUDIO 3. RC 3. +VDISP
4. GND 4. GND 4. GND 4. RIGHT-SPEAKER 4. LED-2 4. +VDISP
5. ANODE 2 5. +12V 5. +12VIN 5. +3V3-STANDBY |
6. NC 6. +12V 6. +12VIN 6. LED-1 |
7. CATHODE 2 7. +VSND 7. +24V-AUDIO-POWER 1D38 (B03A) 7. KEYBOARD 51. CTRL-DISP
8. NC 8. GND_SND 8. GND 1. LEFT-SPEAKER 8. +5V
9. ANODE 3 9. BL-ON-OFF 9. LAMP-ON 2. GND-AUDIO
10. NC 10. BL-DIM1 10. BACKLIGHT-PWM_BL-VS 3. RIGHT-SPEAKER
11. CATHODE 3 11. BL-I-CTRL 11. BACKLIGHT-BOOST
12. NC 12. POK 12. POWER-OK
13. ANODE 4 13. +24V 13. +24V
14. NC 14. GND1 GND 19100_807_110211.eps
15. CATHODE 4 110404

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 74

9-4 Wiring diagram Sundance 32"


WIRING DIAGRAM 32" SUNDANCE

8M84

TO DISPLAY
TEMP. SENSOR
SUPPLY TS (1027)

1T02
4P
8M71

8M09
8M59
8M59
1M86

1M95 1M99 1M59


18P

1M85
18P
8M95
14P 4P 26P
LOUDSPEAKER
SSB

1M71
(5213)
B

4P
3139 123 6519.x
(1150)

1G50
41P

AMBILIGHT MODULE
AMBILIGHT MODULE

1316 1M95
10P 14P

SD-CARD
READER
1735 1D38
3P
INLET

4P

USB
1M
09

(1161)
(1162)

4P

MAIN POWER SUPPLY

USB
32" FSP096-4FS01 8G50

1G51
SCART

AL
AL

51P
(1005) 8G51

HDMI
TUNER
1M20
8P

1M83
26P
LCD DISPLAY

ETHER
TO DISPLAY TO DISPLAY

NET

SPDIF
51P (1004) 41P HDMI HDMI HDMI VGA
8308

2P
13
08

CN1 CN2

8M20
LOUDSPEAKER LOUDSPEAKER
(5216) MAINS (5216)
SWITCH

(8318)
IR/LED/CONTROL BOARD J1
(1108) 8P
1M95 (B03C) 1M59 (B09A)
1. +3V3-STANDBY 1. AMBI-SPI-CLK-OUT 15. GND_AL
2. STANDBY 2. GND 16. GND_AL
1D38 (B03A)
1735 (B03A) 3. GND 3. AMBI-SPI-SDO-OUT 17. GND_AL
1. LEFT-SPEAKER
1. LEFT-SPEAKER 4. GND 4. AMBI-SPI-SDI-OUT-GI 18. GND_AL
2. GND-AUDIO
3. RIGHT-SPEAKER 2. GND-AUDIO 1M20 (B09A) 5. +12VIN 5. V-AMBI 19. GND_AL
3. GND-AUDIO 1. LIGHT-SENSOR 6. +12VIN 6. AMBI-PWM-CLK_B2 20. N.C.
1G51 (B06B) 4. RIGHT-SPEAKER 2. LED-1 7. +24V-AUDIO-POWER 7. GND 21. +12V_AL
1. +VDISP 3. LED-2 8. GND 8. AMBI-SPI-CS-OUTn_R2 22. +12V_AL
2. +VDISP 1F24 (B01C) 4. GND 9. LAMP-ON 9. AMBI-LATCH1_G2 23. +12V_AL
3. +VDISP 1M71 (B09A) 1. +5V 1M99 (B03C) 5. KEYBOARD 10. BACKLIGHT-PWM_BL-VS 10. V-AMBI 24. +12V_AL
4. +VDISP 1. SCL-BL 2. USB-WIFI-DDn 1. GND_AL 6. +3V3-STANDBY 11. BACKLIGHT-BOOST 11. AMBI-BLANK_R1 25. +12V_AL
| 2. GND 3. USB-WIFI-DDP 2. +12V_AL 7. RC 12. POWER-OK 12. AMBI-PROG_B1 26. +12V_AL
| 3. SDA-BL 4. GND 3. GND_AL 8. SCL-SET 13. AMBI-LATCH2_DIS 19100_819_110505.eps
13. +24V
51. N.C. 4. +3V3 5. GND 4. +12V_AL 9. SDA-SET 14. AMBI-TEMP 110506
GND

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 75

9-5 Wiring diagram Sundance 42" - 47"


WIRING DIAGRAM 42"- 47" SUNDANCE
LED
POWER
8M84

TEMP. SENSOR
TS (1027)
1316 1319
8M71
10P 10P

1T02
4P
1M09
8M99

4P
1M83
26P

1M84
8M59

26P
8M95
MAIN POWER SUPPLY
42" DPS-139AP 1M95
14P
1M99
4P
1M59
26P
1F24
5P

1M99
14P
47" DPS-186FP

1M71
4P
(1005)
SSB
B 3139 123 6519.x
(1150)

1G50
41P
LOUDSPEAKER

AMBILIGHT MODULE
AMBILIGHT MODULE

(5213)

1735 1D38
3P

SD-CARD
READER
1308
2P

4P

(1163)
(1163)

USB
1G51
SCART

51P

TUNER

AL
AL

USB
1M20
8P

HDMI
ETHER
NET

SPDIF
HDMI HDMI HDMI VGA

1M83
8G50

26P
8G51

8308

INLET TO DISPLAY LCD DISPLAY TO DISPLAY


41P (1004) 51P

LOUDSPEAKER LOUDSPEAKER
(5216) (5216)
CN1 CN2
MAINS
SWITCH 8M20

(8318)
IR/LED/CONTROL BOARD J1 WIFI MODULE
(1108) 8P (1115) 1M59 (B09A)
1M95 (B03C)
1. +3V3-STANDBY 1. AMBI-SPI-CLK-OUT 15. GND_AL
2. STANDBY 2. GND 16. GND_AL
1D38 (B03A)
1735 (B03A) 3. GND 3. AMBI-SPI-SDO-OUT 17. GND_AL
1. LEFT-SPEAKER
1. LEFT-SPEAKER 4. GND 4. AMBI-SPI-SDI-OUT-GI 18. GND_AL
2. GND-AUDIO
3. RIGHT-SPEAKER 2. GND-AUDIO 1M20 (B09A) 5. +12VIN 5. V-AMBI 19. GND_AL
3. GND-AUDIO 1. LIGHT-SENSOR 6. +12VIN 6. AMBI-PWM-CLK_B2 20. N.C.
1G51 (B06B) 4. RIGHT-SPEAKER 2. LED-1 7. +24V-AUDIO-POWER 7. GND 21. +12V_AL
1. +VDISP 3. LED-2 8. GND 8. AMBI-SPI-CS-OUTn_R2 22. +12V_AL
2. +VDISP 1F24 (B01C) 4. GND 9. LAMP-ON 9. AMBI-LATCH1_G2 23. +12V_AL
3. +VDISP 1M71 (B09A) 1. +5V 1M99 (B03C) 5. KEYBOARD 10. BACKLIGHT-PWM_BL-VS 10. V-AMBI 24. +12V_AL
4. +VDISP 1. SCL-BL 2. USB-WIFI-DDn 1. GND_AL 6. +3V3-STANDBY 11. BACKLIGHT-BOOST 11. AMBI-BLANK_R1 25. +12V_AL
| 2. GND 3. USB-WIFI-DDP 2. +12V_AL 7. RC 12. POWER-OK 12. AMBI-PROG_B1 26. +12V_AL
| 3. SDA-BL 4. GND 3. GND_AL 8. SCL-SET 13. +24V 13. AMBI-LATCH2_DIS
51. N.C. 4. +3V3 5. GND 4. +12V_AL 9. SDA-SET 14. AMBI-TEMP 19100_818_110505.eps
GND
110505

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 76

9-6 Block Diagram Video


VIDEO
B01A COMMON INTERFACE 1P00 B02 PNX85500 B06B VIDEO OUT - LVDS
17
+5VCA
18
51 7F01 7S00
52 74LVC245APW PNX85537EB 1G50
20
PCMCIA +3V3 B02A VIDEO STREAM 1

68P
2
B02F LVDS
CA-MDO(0-7) 3
CONDITIONAL MDO(0-7) BUFFER MD0
ACCESS LOUT1 PX1
CA-MDI(0-7) MDI
TO DISPLAY
B07A DVBS-FE 7R02 7R01
STV6110A STV0903BAC
LOUT2 PX2
1R01 3
4 DVB-S 21 IP 7 DVB-S 78 TS-DVBS-VALID 9R03-1 TS-FE-VALID R23 TNR_SER1_MIVAL
TUNER IM CHANNEL 75 TS-DVBS-SOP 9R03-2 TS-FE-SOP R22
SAT IN 20 8 TNR_SER1_SOP 41
XTAL
DECODER TS-DVBS-CLOCK 9R04 TS-FE-CLOCK N.C.
32 122 74 T22
TNR_SER1_MICLK
30 18 QP 12 73 TS-DVBS-DATA 9R03-4 TS-FE-DATA T21 TNR_SER1_DATA
19 QM 11
1R10

16M

2 AGC 16 B10A DVBT2 7FJ0 1G51


31 CXD2820R 51
N.C.
50
7FJ1 TS-FE-VALID
4 I2C 49
53 DVBT2
3 TS-FE-SOP
CHANNEL
DECODER 5 TS-FE-CLOCK 40
DVBT2-IFN 49
B01F TUNER
DVBT2-IFP
7 TS-FE-DATA LOUT3 PX3
1T01 50
TH2627 IF-AGC 64 B02I ANALOG VIDEO
MAIN HYBRID 7F75 TO DISPLAY
+5V-TUN-PIN UPC3221GV
TUNER RF-AGC
SSB 3104 313 6519.x
3 1 LOUT4 PX4
RF IN RF_AGC VCC 40
4 5F73 1 2F90 1F75 2F74 2 AGC AMPLIFIER 7 IF-P-DVBT2 3F79-1 PNX-IF-P AE12
10 TUN-IF-P 1 5 TUNER_P
IF-OUT1 4

PNX85537
BANDPASS
5F70

2F78 3 6 3F79-4 FILTER AF12 3


11 TUN-IF-N 3 2 2 4 IF-P-DVBT2 PNX-IF-N
IF-OUT2 TUNER_N 2
SAW 36MHZ17 4 IN OUT
AGC CONTROL 1
7F70 +VDISP
SELECT-SAW
B02E
CONTROL PNX-IF-AGC AD12
IF_AGC

B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A


*7EC1
SII9187BC
SII9287BC 1E01 B01C USB HUB
1P05 15 AV1-R AC13
AV1_R
1 DRX2+ 26 1 11 AV1-G AE13
3 AV1_G +5V-USB1
DRX2- 25 7 AVI-B AD13
AV1_B B02E CONROL
1P08
1

1
4
2

DRX1+ 24 7 20 AV1-CVBS AB15


CVBS_Y1 1

3 2
6 DRX1- 23 EXT 1 7E05 7E06
RXD 11
R26 USB-DM 9F26 USB1-DM 2
7 DRX0+ 22 19 EF EF AF11 USB_DN

4
CVBS-MON-OUT1 9F25 3
15 CVBS1_OUT R25 USB-DP USB1-DP
9 DRX0- 21 16 USB_DP
18

8 AV1-STATUS 4
19

10 DRXC+ 20 B02G SIDE USB


20
21
HDMI SIDE 12 DRXC- 19 CONTROL CONNECTOR
SCART1 16 7E09-1
CONNECTOR
AV1-BLK B02A FLASH B01B FLASH 7FL5
B02G CY7C65631 +5V-USB2
HDMI CONTROL
7F20 9 1P07
USB

1
1P04 1
SWITCH H27U4G8F2DTR 10

3 2
1 ARX2+ 72 17 HUB 5 USB2-DM 2
3 ARX2- 71 18 3

4
6 USB2-DP
1
2

4 ARX1+ 70 B01I VGA XIO_D XIO-D(00-07) NAND 4


6 ARX1- 69 1E05 SIDE USB
7
RXA FLASH 21 CONNECTOR
ARX0+ 68 1 R-VGA AF16 VGA_R +5V 1F24
E21 NAND-CE1n 9

1FL5

24M
9 67 2 G-VGA NAND_CE1
18

ARX0- AD16 1
10
19

15

VGA_G F21 NAND-RDY1n 7


5

10 ARXC+ 66 3 B-VGA AE16 NAND_RDY1 2


VGA_B A21 NAND-WPn 19 22 13 USB-WIFI-DDn
HDMI 3 12 ARXC- 65 13 H-SYNC-VGA AB18 NAND_WP_ USB-WIFI-DDP 3
HSYNC_IN 14
1

CONNECTOR
11

14 V-SYNC-VGA AC18 VCC 4


OPTIONAL VSYNC_IN
12,37 5
VGA +3V3
1P03 B02B MEMORY
CONNECTOR A2
1 8 VREF_1 DDR2-VREF-CTRL2
BRX2+ V1 SSB 3139 123 6519.x
3 BRX2- 7 B04B ANALOGUE EXTERNALS B VREF_2 DDR2-VREF-CTRL3
1
2

4 BRX1+ 6
6 BRX1- 5 1E04 B05A DDR
RXB 2 AV3-PR AC15
7 BRX0+ 4 PR PR_R_C1
9 BRX0- 3 1E08 DQ DDR2-D(0-31)
18

2 AV3-Y AE15
19

10 EXT 3 Y Y_G1
BRXC+ 2
7B00 7B02 7B03 7B01

D(16-23)

D(24-31)
D(8-15)
D(0-7)
HDMI 2 12 BRXC- 1 1E03 H5PS1G83E H5PS1G83E H5PS1G83E H5PS1G83E
2 AV3-PB AD15
CONNECTOR PB_B1
PB
SDRAM SDRAM SDRAM SDRAM
1P02 128Mx8 128Mx8 128Mx8 128Mx8
1 CRX2+ 18
B02C HDMI_DV
3 CRX2- 17

VDDL
VREF

VDDL
VREF

VDDL
VREF

VDDL
VREF
62 HDMIA-RXC+ W25
1

4 CRX1+ 16 TXC_P RXC_A_P


2

63 HDMIA-RXC- W26
6 CRX1- 15 TXC_N RXC_A_N
RXC 60 HDMIA-RX0+ V25 A1 E2 A1 E2 A1 E2 A1 E2
7 CRX0+ 14 TX0_P RX2_A_P
61 HDMIA-RX0- V26 A DDR2-A(0-14)
9 CRX0- 13 TX0_N RX2_A_N
18

58 HDMIA-RX1+ U25
19

10 CRXC+ 12 TX1_P RX1_A_P +1V8


59 HDMIA-RX1- U26
HDMI 1 12 CRXC- 11 TX1_N RX1_A_N DDR2-VREF-DDR
56 HDMIA-RX2+ T25
CONNECTOR TX2_P RX0_A_P
57 HDMIA-RX2- T26
9,27,64 TX2_N RX0_A_N
+3V3-HDMI VCC33 3S0W W24
+3V3 RREF

*6000 SERIE MUX SII9187 NON INSTAPORT


7000 SERIE MUX SII9287 INSTAPORT

19100_811_110214.eps
110414

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 77

9-7 Block Diagram Audio


AUDIO
B01A COMMON INTERFACE 1P00 B02 PNX85500 B02D PNX85500: AUDIO B03A AUDIO
17
+5VCA
18
51 7F01
52 74LVC245APW 7D10
20 7S00 TPA3123D2PWP
PCMCIA +3V3 PNX85537EB

68P
B02A VIDEO STREAM
CLASS D
B02D AUDIO
7S05 POWER
LM324P AMPLIFIER
CONDITIONAL MDO(0-7) BUFFER CA-MDO(0-7) MD0
AD7 ADAC(1) 12 14 +AUDIO-L 5 1,3 5D07
ACCESS PVCC_L +24V-AUDIO-POWER
ADAC_1 IN-L
10,12 5D08
CA-MDI(0-7) MDI PVCC_R
1735
22 LEFT-SPEAKER
B07A DVBS-FE 7R02 7R01 OUT-L
1
STV6110A STV0903BAC AE7 ADAC(2) 10 8 -AUDIO-R 6
ADAC_2 IN-R
1R01 2
4 DVB-S 21 IP 7 DVB-S 78 TS-DVBS-VALID 9R03-1 TS-FE-VALID R23 7D15
TUNER CHANNEL TNR_SER1_MIVAL A-PLOP SPEAKER L
20 IM 75 TS-DVBS-SOP 9R03-2 TS-FE-SOP R22 A-PLOP B04E
SAT IN 8 3
XTAL
DECODER TS-DVBS-CLOCK 9R04 TS-FE-CLOCK TNR_SER1_SOP B02G STANDBY
32 122 74 T22
TNR_SER1_MICLK AC19 AUDIO-MUTE-UP 4 MUTE
30 18 QP 12 73 TS-DVBS-DATA 9R03-4 TS-FE-DATA T21 PO_7
TNR_SER1_DATA 15 RIGHT-SPEAKER 4
19 QM 11 OUT-R
1R10

16M

A-STBY 2
2 AGC 16 B10A DVBT2 7FJ0 SD SPEAKER R
31 CXD2820R 1D38
7D11 7D03
1
DVBT2 DETECT2 MAINS SWITCH A-STBY STANDBY &
DVBT2-IFN 49 CHANNEL 4 TS-FE-VALID B03C PROTECTION 5D03 2
DETECT
DECODER 3 TS-FE-SOP
3
5 TS-FE-CLOCK
B01F TUNER DVBT2-IFP 50 7 TS-FE-DATA SPEAKER
WOOFER
1T01
TH2627
7F75 B02I ANALOG VIDEO
B04E HEADPHONE B01J TEMP SENSOR + HEADPHONE
+5V-TUN-PIN UPC3221GV
MAIN HYBRID SSB 3139 123 6519.x 7EE0-1 7EE0-2
1
TUNER VCC
PO_6
AB19 RESET-AUDIO A-PLOP B03A
2F90 1F75 2F74 AGC AMPLIFIER 7 3F79-1
RF IN
IF-OUT1
10 TUN-IF-P 4 5F73 1 1 5 2 IF-P-DVBT2 PNX-IF-P AE12 B04A
TUNER_P
BANDPASS
5F70

7EE1
11 TUN-IF-N 3 2 2 4 2F78 3 6 3F79-4 IF-P-DVBT2 FILTER PNX-IF-N AF12 TPA6111A2DGN
IF-OUT2 TUNER_N
SAW 36MHZ17 4 IN OUT

PNX85537
7F70 AGC CONTROL
HEADPHONE
SELECT-SAW AMPLIFIER
B02E 5
CONTROL SHUTDOWN 1328
PNX-IF-AGC AD12
IF_AGC 1 AMP1 2
VO_1
AF7 ADAC(3) 2
ADAC3 IN-1 7 AMP2
B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A B02D PNX85500: AUDIO VO_2
3
B02D AUDIO 1 HEADPHONE
*7EC1
AD6 ADAC(4) 6 8 OUT 3.5mm
SII9187BCNU 1E01-1 ADAC4 IN-2 VDD +3V3
SII9287BCNU 3 AP-SCART-OUT-L 3EA7-1 7S05
AUDIO-OUT-L 1 3 ADAC(5) AE6
1 ADAC_5
1P05
1 AP-SCART-OUT-R 3EA7-4
1 DRX2+ 26 7
AUDIO-OUT-R 7 5 ADAC(6) AF6 ADAC_6 B01C USB HUB
3 DRX2- 25
11 B02E CONROL +5V-USB1
6
1

4 AUDIO-IN1-L AE10 AIN1_L


2

DRX1+ 24 1P08
6 DRX1- 23 16
15 1
RXD

1
7 DRX0+ 22 2 AUDIO-IN1-R AF10 R26 USB-DM 9F26 USB1-DM 2
AIN1_R USB_DN USB 1 SIDE

3 2
20
9 DRX0- 21 21
R25 USB-DP 9F25 USB1-DP 3 CONNECTOR
18

USB_DP
19

10 SCART1 4
DRXC+ 20

4
7E01
HDMI SIDE 12 DRXC- 19 A-PLOP
A-PLOP B04E
CONNECTOR
HDMI B01B FLASH
7FL5
CY7C65631 +5V-USB2
1P04 SWITCH B04B ANALOGUE EXTERNALS B USB
9 1P07
B02A FLASH 7F20 10 1
1 ARX2+ 72 17 HUB

1
1E08 H27U4G8F2DTR-BC 5 USB2-DM 2
3 ARX2- 71 USB 2 SIDE

3 2
6 18 3
1

AUDIO-IN3-L AE9 USB2-DP CONNECTOR


2

4 70 AIN3_L 6
ARX1+
4

4
6 ARX1- 69 AUDIO IN
L+R 4 AUDIO-IN3-R AF9 XIO_D XIO-D(00-07)
7 ARX0+ 68 RXA AIN3_R NAND 21
+5V 1F24
FLASH

1FL5
9 67
18

ARX0-

24M
19

E21 NAND-CE1n 9 1
10 ARXC+ 66 1E09 NAND_CE1
F21 NAND-RDY1n 7 22 13 USB-WIFI-DDn 2
HDMI 3 12 ARXC- 65 2 AUDIO-IN4-L AD9 NAND_RDY1
AIN4_L A21 NAND-WPn 19 3 TO WIFI MODULE
CONNECTOR VGA (OR DVI) NAND_WP_ 14 USB-WIFI-DDP
21,37 (OPTIONAL)
AUDIO 3 AUDIO-IN4-R AC9 VCC +3V3 4
OPTIONAL AIN4_R
1 RESET-USBn 5
42 B02G
1P03
1 BRX2+ 8 SSB 3139 123 6519.x
1E10
3 7 2
BRX2- +3V3 SPDIF-OPT
1 +3V3
1
2

4 BRX1+ 6 3
B02B MEMORY
6 BRX1- 5
RXB DIGITAL 7S09 B05A DDR
SSB 3139 123 6519.x 2
7 BRX0+ 4 AUDIO 3 &
1E07 1 SPDIF-OUT-PNX AF5
9 BRX0- 3 OUT SPDIF_OUT DDR2-D(0-31)
DQ
18
19

10 1 SPDIF-OUT 4
BRXC+ 2 B02G STANDBY
7B00 7B02 7B03 7B01

D(16-23)

D(24-31)
HDMI 2 12 8 5 SEL-HDMI-ARC

D(8-15)
BRXC- 1 AF18

D(0-7)
SSB 3139 123 6495.x P0_4 H5PS1G83EFR H5PS1G83EFR H5PS1G83EFR H5PS1G83EFR
CONNECTOR
9,27,64
+3V3-HDMI VCC33
B02C HDMI_DV SDRAM SDRAM SDRAM SDRAM
1P02
62 HDMIA-RXC+ W25 128Mx8 128Mx8 128Mx8 128Mx8
1 CRX2+ 18 TXC_P RXC_A_P
63 HDMIA-RXC- W26
3 CRX2- 17 TXC_N RXC_A_N
HDMIA-RX0+ V25

VDDL
VREF

VDDL
VREF

VDDL
VREF

VDDL
VREF
60
1

4 CRX1+ 16 TX0_P RX2_A_P


2

61 HDMIA-RX0- V26
6 CRX1- 15 TX0_N RX2_A_N
RXC 58 HDMIA-RX1+ U25
7 CRX0+ 14 TX1_P RX1_A_P A1 E2 A1 E2 A1 E2 A1 E2
59 HDMIA-RX1- U26
9 CRX0- 13 TX1_N RX1_A_N A DDR2-A(0-14)
18

56 HDMIA-RX2+ T25
19

10 CRXC+ 12 TX2_P RX0_A_P


57 HDMIA-RX2- T26 +1V8
HDMI 1 12 CRXC- 11 TX2_N RX0_A_N
DDR2-VREF-DDR
CONNECTOR A2
3S0W VREF_1 DDR2-VREF-CTRL2
14 ARC-eHDMI+ 5EC2 eHDMI+ W24 V1
+3V3 RREF VREF_2 DDR2-VREF-CTRL3

*6000 SERIE MUX SII9187 NON INSTAPORT


7000 SERIE MUX SII9287 INSTAPORT

19100_812_110215.eps
110324

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 78

9-8 Block Diagram Control & Clock Signals


CONTROL + CLOCK SIGNALS
B01D SD-CARD B02A PNX85500 B05A DDR
7S00
PNX85537EB
1P09 B02E ETHERNET B02B MEMORY
DDR2-D(0-31)
DQ
1 SDIO-DAT3 W2 7B00 7B02 7B03 7B01

D(16-23)

D(24-31)
CC_DAT3

D(8-15)
D(0-7)
2 SDIO-CMD W6 H5PS1G83EFR H5PS1G83EFR H5PS1G83EFR H5PS1G83EFR

Pin9
CMD

Pin1
5 SDIO-CLK W1

Pin2
CLK

Pin3
Pin4
7 SDIO-DAT0 W5 SDRAM SDRAM SDRAM SDRAM

Pin6 Pin5
DAT_0

Pin8 Pin7
8 SDIO-DAT1 W4 128Mx8 128Mx8 128Mx8 128Mx8
DAT_1
9 SDIO-DAT2 W3
SD-CARD DAT_2
10 SDIO-CDn U6
CONNECTOR SDCD
12 SDIO-WP V6
SDWP
F8 E8 F8 E8 F8 E8 F8 E8
DDR2-A(0-13)
B04C ETHERNET + SERVICE A
DDR-CLK_N
CLK_N N5
7E10 N4 DDR-CLK_P
CLK_P
1N00 LAN8710A-EZK
ETH-RXD RXD
ETHERNET ETH-TXD TXD B06C AMBILIGHT CPLD 7GA0 B09A NON DVBS CONNECTOR BOARD
XC9572XL
7 ETH-RXCLK AA3 B02H POWER AF1 SENSE+1V1
RXCLK VDD_1V1 B03B
20 ETH-TXCLK AA2 AA15 SENSE+1V2
TXCLK VDDA_1V2 B03D
ETHERNET 5 1M59
CONNECTOR 22 AMBI-SPI-CLK-OUT 1

1E70
CPLD

25M
RJ45 PNX-SPI-CSBn 5 27 AMBI-SPI-SDO-OUT 3
4 PNX-SPI-CLK 41 23 AMBI-SPI-SDI-OUT_G1 4
B02E CONTROL PNX-SPI-SDI 40 29 AMBI-PWM-CLK_B2 6
PNX-SPI-SDO 39 30 AMBI-SPI-CS-OUTn_R2 8
19 RESET-ETHERNETn TO AMBILIGHT
B02G 31 AMBI-LATCH1_G2 9 MODULE
B07A DVBS-FE
7R02 7R01 B02A VIDEO STREAM 20 AMBI-BLANK_R1 11
STV6110A STV0903BAC B02G AMBI-PROG_B1 12
19
32 XTAL 122 73 TS-DVBS-DATA 9R03-4 TS-FE-DATA T21 13
TNR_SER1_DATA AC5 PXCLK54 43 28 AMBI-LATCH2_DIS
18 QP 12 74 TS-DVBS-CLOCK 9R04 TS-FE-CLOCK T22 CLK_54_OUT
SATELLITE MULTI TNR_SER1_MICLK V22 PNX-SPI-CS-BLn 3 32 AMBI-TEMP 14
19 QM 11 STANDARD 75 TS-DVBS-SOP 9R03-2 TS-FE-SOP R22 GPI0_7 VCCIO
TUNER IP 7 DEMODULATOR 78 TS-DVBS-VALID 9R03-1
TNR_SER1_SOP
21 TS-TS-VALID R23
TNR_SER1_MIVAL 26
20 IM 8 FOR SAT DIG TV 62 RESET-DVBS VIO
B02G
SENSE+1V0-DVBS 52 AD5 BACKLIGHT-PWM 9GA0 BACKLIGHT-PWM_BL-VS
BL_PWM

PNX85537
B08A B03C
B10A DVBT2 7FJ0 OPTIONAL
CXD2820R
4 TS-FE-VALID B02E PNX85500: MIPS B01C USB HUB
+5V-USB1
DVBT2 3 TS-FE-SOP

1
DVBT2-IFN 49 1P08
B01F
CHANNEL 5 TS-FE-CLOCK

3 2
DVBT2-IFP 50 1
B01F DECODER 7 TS-FE-DATA 9F26
R26 USB-DM USB-DM1 2

4
USB_DN 9F25 3
RESET-SYSTEMn R25 USB-DP USB-DP1
B02E USB_DP
4 SIDE USB
B01B FLASH B01A COMMON INTERFACE
RESET_SYS
AE4 RESET-SYSTEMn
B01K B02G
SSB 3139 123 6495.x CONNECTOR
1P00 7F00 U23 SELECT-SAW
GPI0_11 B01F 7FL5
1 20 MOCLK CA-MOCLK K24
VS_2 CY7C65631 +5V-USB2
62 MOVAL CA-MOVAL L23 B04C ETHERNET + SERVICE

1
MOVAL 9 1P07
63 MOSTRT CA-MOSTRT L22 USB

3 2
10 1
MOSTRT
17 HUB 5 USB-DM2 2

4
CA-MDI(0-7) MDI 18 USB-DP2 3
6
7F01 4
1E06 SIDE USB
Y23 RXD1-MIPS 2 CONNECTOR
GPI0_2 21
UART +5V 1F24

1FL5
TXD1-MIPS

24M
MDO(0-7) CA-MDO(0-7) MDO Y24 3 SERVICE
GPI0_3 1
COMMON INTERFACE

1 CONNECTOR
7F02 22 13 USB-DM3 2
7F03 B02A FLASH
7F20 14 USB-DP3 3
H27U4G8F2DTR PCMCIA
4
5
NAND CA-A(00-14) XIO-A(0-15) XIO_A
FLASH CONDITIONAL 7F04
12,37 ACCESS 7F05
VCC +3V3 SSB 3139 123 6519.x

CA-D(0-7) XIO-D(00-15) XIO_D B02G PNX85500: STANDBY CONTROLLER B01E PNX85500-CONTROL


68
XIO-D(00-07)
B02G STANDBY V23 BOOST-PWM 9CH0 BACKLIGHT-BOOST
GPIO_10 B03C
B06C
7F52
B09A CONNECTORS COMP B03C DC / DC M25P05-AVMN6P
1M19
1 LIGHT-SENSOR AE26 AF24 PNX-SPI-CLK 6
P5_1 SPI_CLK FLASH
2 AE22 PNX-SPI-WPn 3
P6_5 8
AF23 PNX-SPI-CSBn 1 VCC +3V3-STANDBY
3 RC AD19 SPI_CSB
P1_0 512K
4 LED-2 9U41 LED2 AC25 AE23 PNX-SPI-SDO 5
PWM_1 SPI_SDO
TO IR / LED BOARD AND 5 AF25 PNX-SPI-SDI 2
+3V3-STANDBY 7U43 SPI_SDI
KEYBOARD CONTROL 6 LED-1 LED1 1F51
AD26 PWM_0
AE21 RXD-UP 3
P3_0
7 KEYBOARD P5_0 AF21 TXD-UP 1 LEVEL SHIFTED
AD23 P3_1
AB20 SDM FF04 2 FOR
8 P1_7
+5V SDM 4 DEBUG USE
RESET_IN AA26 RESET-STBYn
FF29 5 ONLY
P6_4 AF22 SPI-PROG
+3V3-STANDBY SPI-PROG
B02G PNX85500: STANDBY CONTROLLER 7S20 RES
DETECT2 AA22 AE17 NCP303LSN28G
B03C P3_2 XTAL_IN
RESET-SYSTEMn AB22 1 B03C DC / DC
1S02

RESET-STBYn
54M

B02E P3_3 2
INP OUTP

CONTROL
AV1-BLK AD22 ENABLE-3V3-5V
B04A P3_5 3 B03E
AF17 GND ENABLE-1V8
XTAL_OUT
B03B B03D
AV1-STATUS AE25 +12V
B04A CADC_2 DETECT2
AD18 RESET-USBn +3V3-STANDBY B02G B03A
P1_1 B01C
LCD-PWR-ONn AC20 AD21 ENABLE-3V3n
B03H P2_0 P2_7
AF18 SEL-HDMI-ARC 1M95
P0_4 B02D
B04D HDMI P2_2 AE20 LAMP-ON 9
TO PIN: AA18 RESET-DVBS BACKLIGHT-PWM_BL-VS 10
7EC0 P0_1 B06C TO
1P02-13 B07A 11 POWER SUPPLY
EF AE18 RESET-ETHERNETn
1P03-13 PCEC-HDMI CEC-HDMI AF19
P1_2 P0_3 B04C B01E
BACKLIGHT-BOOST
1P04-13 7EC1 AC21 POWER-OK 12
P2_6
1
2

1P05-13 SII9187ACNU AF20 STANDBY 2


P2_3
SII9287BCNU B02C HDMI_DV AB19 RESET-AUDIO
P0_6 B04E
ARX-HOTPLUG 31 AC19 AUDIO-MUTE-UP
1P02-19 HDMI HDMIA-RX RX
18

P0_7 B03A
19

BRX-HOTPLUG 35
1P03-19
CRX-HOTPLUG 41 SWITCH
4x HDMI 1P04-19 3S0W
CONNECTOR DRX-HOTPLUG 45 W24
1P05-19 +3V3 RREF
19100_813_110216.eps
110318

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 79

9-9 Block Diagram I2C


IC
B01E PNX85500: CONTROL B02E PNX85500: MIPS B01E PNX85500-CONTROL B01J TEMP SENSOR + B04D HDMI B01K TUNER BRAZIL B07A DVBS-FE B08B DVBS-SUPPLY B10A DVBT2
HEADPHONE
7S00 +3V3
PNX85537EB

3S6D

3S6E
B02E
B25 3S5Y SDA-SSB
3_SDA
A24 3S5Z SCL-SSB
3_SCL

3EC5

3EC3
3FD3

3FD4

3FE9

3FE8

3R00

3R01

3FJH
+3V3 +3V3RF

3T61

3T51
AIN-5V

3FJJ
ERR
PNX85537 13
1 2 53 54 46 45 98 97 6 9 29 30

3EC1-1

3EC1-3
3S6A

3R15

3R14
3S69
CONTROL 1P04
C25 3S56 SDA-UP-MIPS 7FD1 7EC1 7FE0 7R01 18 SDAT 7T50 7FJ0
29 ARX-DDC-SDA 16

1
2
1_SDA LM75BDP SII9287B TC90517FG STV903BAC LNBH23QT CXD2820R
C26 3S57 SCL-UP-MIPS SII9187A 19 SCLT
30 ARX-DDC-SCL 15
1_SCL TEMP DEMODULATOR CHANEL DEC LNB DVBT
7F52

18
19
SENSOR HDMI BIN-5V DVBS RES CONTROLLER CHANNEL

3F60

3F59
M25P05-AVMN6P B02G B02G PNX85500: STANDBY MUX HDMI DECODER
CONTROLER
5 6 CONNECTOR 3 13 12

3ECA-1

3ECA-2
ERR ERR ERR
FLASH 6 PNX-SPI-CLK AF24 +3V3-STANDBY 42 ERR 1P03 28 31
8 SPI_CLK 23
3 PNX-SPI-WPn AE22 STANDBY 7F58 33 BRX-DDC-SDA 16 7R02

1
+3V3-STANDBY VCC

2
P6_5
M24C64 STV6110A

3S6W
512K 1 PNX-SPI-CSBn AF23

3S6V
SPI_CSB 34 BRX-DDC-SCL 15
5 PNX-SPI-SDO AE23 ERR ERR 3S2F

18
SPI_SDO

19
15 53 AC23 EEPROM CIN-5V SATELITE
2 PNX-SPI-SDI AF25 SPI_SDI MC_SDA (NVM) RES TUNER
3S2G HDMI RES
STANDBY AC24 CONNECTOR 2
MC_SCL B01H

3ECA-3

3ECA-4
SW ERR
1F52 HDMI ERR
RES 3F63 1P02
35 3 36
39 CRX-DDC-SDA 16

1
DEBUG

2
+3V3-STANDBY 3F62 1
MAIN NVM ONLY
40 CRX-DDC-SCL 15
SW
B01B

18
FLASH

19
DIN-5V

3S1G

3S1H
1F51 HDMI
AE21 RXD-UP 3F65 3 uP
CONNECTOR 1

3FBF-2

3FBF-1
7F20 P3_0 LEVEL SHIFTED +3V3 1P05
AF21 TXD-UP 3F64 1 FOR DEBUG
H27U4G8F2DTR DRX-DDC-SDA 16
P3_1 43

1
HDMI

2
USE ONLY

3ECU-2

3ECU-4
CONNECTOR
FLASH RES 44 DRX-DDC-SCL 15
B02A B02C SIDE

18
Y25 DDCA-SDA

19
(4Gx16) DDC_A_SDA
FLASH OPTIONAL OPTIONAL
Y26 DDCA-SCL
XIO-D(00-07) XIO_D DDC_A_SCL +3V3 B01I VGA
HDMI_DV B04C ETHERNET + SERVICE +5V-EDID +5V-VGA
MAIN

3S83

3S84
1E06

3ECP-3

3ECP-1
SW

3FC1

3FC2
Y23 RXD1-MIPS 3E53-4 3E53-3 1E05
3
GPIO_2 9FC1 12

10
47 VGA-SDA-EDID-HDMI

15
3E53-2 3E53-1 UART

5
Y24 TXD1-MIPS 2
GPIO_3 SERVICE EDID
48 VGA-SCL-EDID-HDMI 9FC3 15
1 CONNECTOR SW

1
B02I B02I

6
PNX85500: ANALOG VIDEO

11
AD25 3S5V-1 9FC2
B05A DDR
VGA_EDID_SDA
VGA-SDA-EDID VGA
3S5V-3 CONNECTOR
AD24 VGA-SCL-EDID 9FC4
VGA_EDID_SCL
RES RES
7B00 7B01
H5PS1G83EFR H5PS1G83EFR ANALOGUE
VIDEO
SDRAM SDRAM +3V3
B01F TUNER
128Mx8 128Mx8
3S6G
3S6F
D(8-15)
D(0-7)

B02B
B24 3S60 SDA-TUNER 3F75 TUN-P7
MEMORY 4_SDA
A23 3S61 SCL-TUNER 3F76 TUN-P6
DDR2-A(0-13) A 4_SCL

DDR2-D(0-31) DQ ERR
18 7 6
7B02 7B03
H5PS1G83EFR H5PS1G83EFR 1T01
D(16-23)

D(24-31)

FA2327
SDRAM SDRAM
128Mx8 128Mx8 MAIN
TUNER

ERR
34

B04C ETHERNET + SERVICE


B06B VIDEO OUT - LVDS
+3V3
3S6C
3S6B

1G51
7E10
B26 3S58 SDA-SET 9S12 SDA-DISP 3G2W 50
LAN8710A-EZK
2_SDA LVDS
A25 3S5W SCL-SET 9S11 SCL-DISP 3G2Y 49 CONNECTOR
11 ETH-RXD(0) Y5 2_SCL
RXD_0 +3V3
10 ETH-RXD(1) Y6
RXD_1 ERR +3V3 ERR
9 ETH-RXD(2) AB4 14 64
RXD_2 2 1
3S67

3S65

3S68

3S66

ETHERNET 8 ETH-RXD(3) AC1


RXD_3
3S81

3S80

7 ETH-RXCLK AA3
RXCLK 7S01 4 B09A DVBS CONNECTOR BOARD TS1 TEMP SENSOR
W21 RXD2-MIPS PCA9540B
GPIO_2 5 1M71 1T02
22 ETH-TXD(0) AA1 3C83 3124
TXD_0 W22 TXD2-MIPS 2 CHAN. 3 3 SDA-TEMP1
23 ETH-TXD(1) AA4 GPIO_3
TXD_1 MULTIPLEX. 3C81 3123
24 ETH-TXD(2) AB1 7 1 1 SCL-TEMP1
ETHERNET TXD_2
25 ETH-TXD(3) AB2 ERR
CONNECTOR TXD_3 8
20 ETH-TXCLK AA2 24
RJ45 TXCLK
1 2
RES
7104
9S13 SDA-BL LM75ADP

9S10 SCL-BL TEMP


SENSOR

19100_814_110217.eps
OPTIONAL SW Programmable via USB 110309

2011-Jun-01 back to
div. table
Block Diagrams Q552.2E LA 9. EN 80

9-10 Supply Lines Overview


SUPPLY LINES OVERVIEW
B03C DC / DC B03A AUDIO
B01H HDMI B04A ANALOGUE EXTERNALS A B08A DVBS-SUPPLY
1M99 1M99 +3V3-STANDBY +3V3-STANDBY
1P05 B03c
1 1 HDMI SIDE 18 DIN-5V
GND1 B04d +3V3 +3V3
2 2 +12V_AL CONNECTOR +24V-AUDIO-POWER +24V-AUDIO-POWER
+12V3 B03c B03e
3 3 B09a +5V +5V +3V3 +3V3
GND1 3D09 +AVCC B03e
4 4 B03e
+12V3
5 5 +24V +24V
GND1
6 6
B01I VGA B03c
+12V3 GND_AL 1E05 B04B ANALOGUE EXTERNALS B 7T03
+5V-VGA
7 7 3D-LR
VGA 9
B04d
B03B DC / DC +5V +5V 1 TPS54283PWP
N.C. B02E CONNECTOR B03e 3 5T03 +5V-DVBS
8 8
GND1 +12VIN +3V3 +3V3 Dual 7T00
9 9 +3V3-STANDBY +3V3-STANDBY
+12V3 B03c B03e N-Synchr 5T00 5T01 +1V-DVBS
IN OUT
+12V +12V Converter COM B07a
ONLY 8000 SERIES B01J TEMP SENSOR + HEADPHONE B03c

PSU 7T02

5U02
+3V3 +3V3 +3V3-DVBS
B03e IN OUT
7U03 B07a,B08b
1M95 1M95
TPS53126PW 7U02-1 12V/1V8 B04C ETHERNET + SERVICE COM
+3V3-STANDBY

5T02
1 1 B01e,B02e, +3V3 +3V3 7T01
3V3SB COVERSION
2 2 STANDBY g,h,B03a,b,h, 12 +2V5-DVBS
B03e IN OUT
STANDBY B02G B04d,e,B09a Dual 5U00 +1V8 5E08 +3V3-ET-ANA B07a
3 3 Synchronous B02b,h,B03d,
COM
GND1 7U02-2
GND1
4 4 B01K TUNER BRAZIL Step-Down B05a
5 5 +12VIN Controller 14 12 5T04 +V-LNB
GND1 B03h
6 6
+12VD B01g
+1V2-BRA-VDDC +1V2-BRA-VDDC B04D HDMI B08b
+12V3
B03h +1V2-BRA-DR1 +1V2-BRA-DR1 12V/1V1 +3V3 +3V3
7U01
1U40 B01g COVERSION B03e
+12V 5EC0 +3V3-HDMI
B03b,d,e,g,
T 3.0A +24V-AUDIO-POWER B08b,B09a B03e
+3V3 +3V3 1 5U01 +1V1 B08B DVBS-SUPPLY
7 7 B02h,g,B03e +3V3-STANDBY +3V3-STANDBY
+VSND B02d,B03a 7U04
8 8 5FE7 +3V3-BRA B03c +3V3-DVBS +3V3-DVBS
GND1 B08a
9 9 LAMP-ON 5FE4 23 +5V-VGA +5V-VGA
BL-ON-OFF B02G +3V3-BRA-FLT +12V +12V
10 10 BACKLIGHT-PWM_BL-VS B01I B03c
BL-DIM1 B06C
11 11 BACKLIGHT-BOOST +V-LNB +V-LNB
BL-I-CTRL B01E +5V +5V +5V-EDID
12 12 POWER-OK B03e B08a
POK B02G 7FE3

6EC1
13 13 +24V 5FE9 +2V5-BRA +5V +5V
IN OUT
+24V B08a,B09a COM B03e
GND1
14 14 B09A CONNECTORS COMP
B03D DC / DC
HDMI 3
1P04
AIN-5V
18
CONNECTOR +3V3 +3V3
+1V8 +1V8 B03e
B03b 1M71
1P03
B02A PNX85500: NANDFLASH
7UA3 +1V2 B02g,h,
HDMI 2
18 BIN-5V 4 TEMP
CONDITIONAL ACCESS CONNECTOR SENSOR
+3V3 +3V3 B03e,B10a (OPTIONAL)
+3V3 +3V3
B03e B03e
+5V 1P02
+5V HDMI 1 CIN-5V
18 +3V3-STANDBY +3V3-STANDBY
B03e CONNECTOR
+12V B03c
+5V +5V +5V +5V
DIN-5V DIN-5V B03e
B03e
B01A COMMON INTERFACE B02B PNX85500: SDRAM
3U16 +3V3
B01h 1M19 1M20
5 6 TO
+3V3 +3V3 +1V8 +1V8 7UC0
B03b 3U15 IR/LED
B03e +2V5 8 8
3S20 IN OUT BOARD
+5V +5V
DDR2-VREF-CTRL3
COM B02d,h B04E HEADPHONE
CUA0 +2V5-LVDS
B03e 3S06 DDR2-VREF-CTRL2 B02h +3V3 +3V3
3F01 +5VCA
B03e +12V_AL +12V_AL
B03c
+T
+5V5-TUN +5V5-TUN +3V3-STANDBY +3V3-STANDBY
B03e 1C87
B03c
7UA6 +5V-TUN
B01B FLASH B02C PNX85500: DIGITAL VIDEO IN B01f T 2.0A ONLY 7000 SERIES

+3V3 +3V3 B03e


+3V3 +3V3 B05A DDR
B03c
+24V +24V
+12V ENABLE-1V8 +12V
B03e B03c +1V8 +1V8 1M59
7UA0 B03b 1C86 21
3UA0 VOLT. +2V5-REF 3B20 DDR2-VREF-DDR TO
B01C USB HUB REG. T 2.0A 10
AMBILIGHT
B02D PNX85500: AUDIO
V-AMBI 5 MODULE
+3V3 +3V3 B03f
+2V5 +2V5
B03e B03d
+5V +3V3 +3V3
B06A DISPLAY INTERFACING-VDISP
+5V
B03e
B03e B03E DC / DC
+VDISP-INT +VDISP-INT
3F32 +5V-USB1 3S11 +3V3-ARC
+1V1 +1V1 B03h
+T 7S08 B03b B01,a,b,c,d,e,
3FL2 +12V +12V
+5V-USB2
IN OUT
+2V5-AUDIO B03c B02h g,j,k, 1G03 +VDISP
B06b B10A DVBT2
+T COM B02a,c,d,e,h,
B03c,f,g,h, +3V3 +3V3
+24V-AUDIO-POWER +24V-AUDIO-POWER 7UD1 T 3.0A B03e
B03c B04a,c,d,e,
5UD3 5UD2 +3V3 5FJ1 +3V3-DVBT2-D
3S0Z +24V-AUDIO-VDD IN OUT B06b,c,d,
B01D SD-CARD COM B08a,B09a,
5FJ2
7UD0 B10a +3V3-DVBT2-R
+3V3 +3V3 5UD0 5UD1 +5V5-TUN
IN OUT B03d 7FK1
B03e
3F40 +3V3-SD
B02E PNX85500: MIPS COM
6UD0 B01,a,c,e,k,
5FK1
IN OUT
+2V5-DVB

+T +3V3
+5V B03c,d,e, B06B VIDEO OUT - LVDS COM 5FJ3 +2V5-DVBT2-A
+3V3 B04a,b,d,
B03e
B09a +3V3 +3V3 5FJ4 +2V5-DVBT2-X
+3V3-STANDBY +3V3-STANDBY B03e
B03c B03F TEMPSENSOR + AMBILIGHT
+VDISP +VDISP B03d
+1V2 +1V2
B01E PNX85500: CONTROL
+3V3 +3V3
B06a
9FK6 +1V2-FE
+3V3
B03e
+3V3 B02G PNX85500: STANDBY CONTROLLER B03b
1UM0 5FJ5 +1V2-DVBT2-C
+3V3-STANDBY +3V3-STANDBY
5UM1 V-AMBI
B09a B06C AMBILIGHT CPLD
B03c +1V1 +1V1 5FJ6 +1V2-DVBT2-M
B03b T 1.0A
+5V +5V +3V3 +3V3
B03e 5FJ7
B03e +1V2-DVBT2-P
5GA0 VINT
+3V3-STANDBY +3V3-STANDBY +5V-TUN-PIN +5V-TUN-PIN
B03c B03G FAN - CONTROL 5GA1 VIO B01f

+3V3 +3V3
B01F TUNER
B03e
SSB 3139 123 6519.x
+12V +12V
B03c
+5V-TUN +5V-TUN B06D SPI-BUFFER
B03d
9F71 +5V-TUN-PIN
B02H PNX85500: POWER
+3V3 +3V3
B10a B03e
+1V1 +1V1 B03H VDISP - SWITCH
B03b
+1V2 +1V2 +3V3 +3V3
B03d B03e
B03b
+1V8 +1V8 B03c
+3V3-STANDBY +3V3-STANDBY B07A DVBS-FE

+12VD +12VD +1V-DVBS +1V-DVBS


B01G TOSHIBA SUPPLY B03d
+2V5 +2V5 B03c B08a
+2V5-AUDIO +2V5-AUDIO 7UU0 +VDISP-INT
+3V3 +3V3 B02d B06a +2V5-DVBS +2V5-DVBS
B08a
7FA3 +2V5-LVDS +2V5-LVDS
B03e B03d
5FA3 +1V2-BRA-VDDC +3V3-DVBS +3V3-DVBS
IN OUT B01k +3V3 +3V3 7UU2 B08a
COM
5FA4 B03e LCD-PWR-ONn
+1V2-BRA-DR1 5R00 +3V3-DEMOD
B01k +3V3-STANDBY +3V3-STANDBY
B03c 5R01 +3V3RF

19100_803_110208.eps
110415

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 81

10. Circuit Diagrams and PWB Layouts


10-1 A01 272217190337 PSU
Switching Power Supply

Switching Power Supply


A01 PRIMARY SECONDARY Q921
A01
12V' SW 3.3VSB (1M95)
GT1 SW 12V' CN4
HOT COLD
F1 NTC1 D806 3.3VSB

R965

R968
FL1 FL2 C830 D924

C975
B+ C935

R962

R981

R982
C980
STANDBY
CY1 CY4
A
(1308) R1A BD1
L800 D805 R961
Z1

CN1

CX2
COLD D927

CX1

R969

R955
COLD C831 R967
L 12V3
C937

Q913
N C977
R1B

C800

Q917
C813
R954 R983

FB803
C809
SW VSND
C936

Q918
CY3 Q919
CY2

COLD

C974
GT2

Q914
BL-ON
COLD
C963B C963A BL-DIM
C971 C979
AC_BROWN
BL-I-CTRL
C938
POK

R808
3.3V'
R904 R958 C958 24V
R964 C939
12V' STANDBY 3.3VSB

R917

R918
R963

1/2 PC901
R908
R814

R920

Q915
VCC-ON
IC801 C810 A
D807 R805 R953

Q923
Q800 R821 R825
R907

Q801

D922
B+ C808

R912

R947
R811
R822 C911 D926
R806

Q920
R976

R949
R823

Q924
VCC-ON

Q803

C909

1/2 PC902
C910
C820

C804

C803

C926
R818

R820

IC953

R913
C805

C966
Q802

C802
R801

R804

R819
R817
R813
C823

C806
R802

R803

R816
C807 24V'
Q909 L954
24V''
R932 C920 C932 FB907
24V

R959
D904 R937 R946
FB908

R944
VSND
T901
B++

C972
D923 D928

Q912

R977B
R977A
R957
SW

C917
ZCD

ZD912
R948

R972

C987
R978

C923
R945

R956

R973
ZD914
R925 C919 C933 (1316)
CN2
A2 A1+
AC_BROWN

D909
R971

IC901 12V' Q911 L955 12V''


D902
FB903
IC902 C1-
VCC-ON 12V3
D910 Q916
A2+
FB902

R974
D913
Q908 R938 R952

R905B
R905A
OCD C2-

C962B

C908
D925

Q922
D903

R966
R906 SW
R943

C962A
1/2 PC902

A3+
Q901
C907

A1
C906

R916

R951
R926
ZD906
1/2 PC901

Q902
R934

ZD915
C915

C3-
C925

R924

R960

R975
C924
R970
ZD909

C916

R927
A4+
C922

R921
ZD905

R939
C918

C912

C929 C930
C940

C914
R903

C4-
D911 3.3V' IC3 3.3V''
FB904
ZD908

3.3VSB
ZCD

BROWN

C961B
C961A

C928

C970
CY5
FB905 FB906
0 2010-09-29
No Components Secondary GND Primary GND
Switching Power Supply
DPS-93BP A

18777_001_110524.eps
110524

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 82

Switching Power Supply

Switching Power Supply


A02 R634
B++ A02
B+

D703

C703
Q701A
R703 R702

T302

R704
A1
R746 C731 T301

D714

D712
R705 R706

Q701B

C705

R782A
C752A
D702

D715

D713
R707
R747
C706
D780A
OV1

R760
VREF 12V3
BL-I-CTRL
OCD
UC1'
12V3

BL-DIM BL-ON OV1 A2


POK
R720
ZD702

R711
R721

C702

R726

R750
R717

R714

R735

R728

R786

D710

D708

R782B
R722

C752B
IC702 R731
R738

R719

D711

D709
Q702

BROWN
Q701

OCD'
R718
C701

D780B
R730

OV1
R733

R787

R727
OCD'
D707

R713
OCD UC1' D704
R791
CP2

C
R723

R736
ZD707

VREF OCD'
R716

R724

R792

C727
C716A

R790

R729

R788

R739

R725
C710

C717

C725

C728

C746

C745

C726

C723

C724

C737
R732
C715

C729
ZD717

R715
ZD708

VREF
C732

C730

C712
R734

C IC701

OCD
CP1

C722
C716B

R737
C704

Primary GND

Secondary GND
0 2010-09-29

No Components
Switching Power Supply
DPS-93BP A

18777_002_110524.eps
110524

2011-Jun-01 back to
div. table
T302
C813

C752A
Power layout top

Q801
FB803 C706 C752B D712
R816 D715 D714 CN2
T301
L800
Q701B

C705

D713
J18

D805

J30

J5
D711
J8
J2
C800

R750

D710
J27

D709 D708
Circuit Diagrams and PWB Layouts

Q701A J24
R634 FB905 C703
D806A
J14
FB902

Q901 T901
J25
C809 CY5
D806B
Q552.2E LA

C916 FB906
10.

HS1
J9 R903 HS2

BD1
J11 J10 C914
CY4
D909
EN 83

NTC1 C912 C987


FL2 R972
FB908 L954
J4 D913 C972

2011-Jun-01 back to
div. table
PC901
GT1
CX2 FB907

CN4

J3
FL1 PC902
CY2
D911 D902 D904
ZD912
R968

CN1

Z1

HS3 FB903
J1 J16
J7
J19
FB904
GT2
CX1

F1

C961A J17 C962A


C962B

C961B L955

CY1 CY3
Power
layout top
DPS-93BP A
6
2010-12-23

110525
18777_003_110525.eps
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 84

Power layout bottom

C939 C938 R719 C707 R782A


R977A R957
R977B R959 R956
C935 C917 R973 R782B
C937 C936 Q912 C923 C708
R946 ZD914 FB702
C970 D923
R937 R948 D928 FB701

Q909
IC3 J31
C908

C928 R944
D780B D780A R720
C920 R932
C702
R974 R966 R960 C932 R760 C737
R786 R736 R737 R721 R722
R975 R717 D704 R725
R788 C745 R713 R739 R711
R938 R951 ZD717 R724 IC701
C710 C724 R727 R726
C746 R787 R716
R952 D925 C716A ZD707 C731
C704 R715 R731 Q702
ZD915 ZD708 R746 R747
R905B Q911 C716B J20
Q922 C717 Q701
R905A C924 D707 R916 R734 J13

C732 C723 J36 C701


R730
C730 IC702 C726 C728 R718
C933 C919 R925
C729 C725 R729

R732 R790 C727 R738

R735 R792 R728


R940
R791 ZD702
C715
R723 C722 R733 J15 D703
R714 C712 R704
R969 D924 C971 R702
R963 Q919 Q914
R982 R939 R703
C980
C958
R981 C977 C929
C979 R962 Q913
R964
R983 R961 R947 C930
Q917 R705
Q915 Q921 R917
Q920 R912
R707
R904
C975 J33 R706
R949 D922 R908
R965 R976 R918 R945
C974 C910 C911 D702
R955 D926 R958
D927 R920 R913 R907
R924
R967 R977 Q923 C909
Q924 C926 IC953 R906
C966 R971 R927
R954
Q902 R825 R820 C820
Q918 R953 R943
R822 R817 R814
R921 D903 R818 R813 Q802
IC901 C804 C810
ZD905 R926 C823 R804 R803 R821 IC801
ZD908 Q916 C803
R2B R2A D910 C940 C907 R978 R802 C808
ZD906
C906 R970 Q800 C805
ZD909 Q908 IC902 R801 R806
C925
C918 C922 C806 C807 C802
J28 C915 J6
R819
R934 Q803
R808 R811
D807
R805
R823
R1B
R1A

C963B
C831

C963A
C830

6 2010-12-23

Power
DPS-93BP A
layout bottom

18777_004_110525.eps
110525

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 85

10-2 A01 272217190338 PSU


Switching Power Supply

Switching Power Supply


A01 A01
GT1 PRIMARY SECONDARY
(1M95)
(1316)
(1308) HOT COLD (1319) CN4
CN2
CN1 F1 D806 D808 CN3 3.3VSB
FL1 FL2 A1

C935
B+ A3
L STANDBY

C831
N BD1 L800 D805

R1A

R2A
CY1

CY4
CX1

CX2
Z1

C800
C830
COLD 12V3
C125

R1B

R2B

C809
COLD NTC1 OCD
VSND
C245

FB803
GT2 C963A C963B R903A R903B BL-ON-OFF

CY3
CY2

AC_BROWN FB905 CY5

R809
BL-DIM
COLD
COLD R814 R300 12V' 24V' BL-I-CTRL
VCC-ON R808
POK

C808

C738
A4
24V
A2

1/2 PC601

R301
IC801 D807 R805

R305

R304
Q801

C813
Q800 B+' R821 R822 R825

C244
B++
R811

Q803
R806

R823
R818A R302 C301
VCC-ON
R818B

C302
R801

C804

C805

C300
R819

12V3 OVP
Q802
R804

R303

C303
R802

R813
C823

R816
IC300
R820

R817
C820

C803

C806

C807

C802
R803 J20
24V''
24V'
VCC-ON T601 Q241
R240 C240 C241 L240 FB240
B++
24V

R613A -E
ZD602
R608

R242A
C606

C609
R606

D240

R245
ZCD

R243
R602C R602B R602A FB241
R614
VSND
B+' R244

R242B
R601

C242
IC601 D603

R241E
R241B

R241D
R241C
R241A

C247

C243
R246
Q242
R602D

FB601

D241
R605 D602

C246
BROWN

R248

R247
ZD241
Q601

C605
R120 C120 C121
R607
(1M99)
C603A

D120 L120 12V'' CN5


R609
C608

R603

12V' FB120
C604

ZCD
1/2 PC601

12V3
R612

R604

ZD601
C602
C607

C601

12V3
R610

C122B
C122A

R121B
,

R121A
C603B

C123

C124
R611

B++
Q906
R909

VCC-ON T901
R950 C950 C951
1/2 PC902

ZD905 L951
FB950

C126
R900 D951
3.3VSB
ZD902

D901 D952
IC901

C953
FB900

C952
IC902
AC_BROWN (1M09)
D903 D902 R906 CN6
ZC' C127
Q951
R951
VCC'

R908

R958

R953
R952
12V3

C958

R959
(1MP1)
1/2 PC901

R957 C954 CN7


J12
12V3
R901

1/2 PC901
C904

R902
ZD900

C903

ZD903

R960
C901

ZD904

C900

R907
ZD901
C909

C955
C908

J24
C910

R954
STANDBY
C907

3.3VSB OVP

C128
1/2 PC902
24V

R956
C956

C957

IC951

5 2011-01-19

Switching Power Supply


DPS-139AP A

18777_005_110525.eps
110525

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 86

Switching Power Supply

Switching Power Supply


A02 PRIMARY
HOT
SECONDARY
COLD
A02
R634
T301 FB702
B+ B++ A1
FB701
A2

C707B
C707A

D714

D712

R782B
R782A

C752B
C752A
D715

D713
D703

C703
Q701A
FB703
R703 R702 A3
FB704
Primary GND A4

C707D
C707C
T302

R704

D710

D708
Secondary GND OCD

R782D
R782C

C752D
C752C
No Components

R750

R751
D711

D709
R746 C731 R705 R706

Q701B

C705
ZD709
D702
D780A R760
OV1 12V''

R707
ZD710
R747 D780B
C706
OV1

VREF BL-I-CTRL

UC1'

R711
12V'' BL-DIM OV1
ZD702

R726
R721

R720
C702

POK
R717

R714

R728

R786

R731
R738

R722

IC701
Q702
Q701

BROWN
R719

OCD'
R718
C701

R730

R733

R787
OV1'

OCD'
D707

R713
OCD UC1' D704
R791
CP2

R723

R736

R735
R715 BL-ON-OFF
VREF VREF OCD'
CP1

R724

R792
ZD707

C727
C716A

R790

R729

R788

R727

R725
C717

C725

C728

C746

C745

C726

C723

C724

C733

C737
R716

R732
C715

C729

C734
ZD717
C710

ZD708
C732

C730

C712

C
R734

IC702
R737
C722

OCD
C
C716B
C704

R739
5 2011-01-19

Switching Power Supply


DPS-139AP A

18777_006_110525.eps
110525

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 87

Power layout top

J9 CY5
FB905
CN5 CN4 CN7 L800
L240 CN6 FB120 J18
J12 D805
J24
FB240
FB950
ZD904
D808
FB241
HS1 J20
J21

L951
J22
C123 J2 D902
ZD903 C908
J3
Q241 ZD902

PC902 PC901 IC901


J1 D806
C910
C907
J19
FB900 C605 R611
ZD905

J16
T901 D901
C952
J23 C800
L120
D952
D120 FB803
C122B
Q601
D951
C122A

NTC1
FB601 R634
J27 J11 HS2

R909

CN3 R816
T601 Q801

HS5 C809
CX2
D240
J13

J17
J7
C813
C242
R608
D603
ZD602
ZD717

C606
J38

C703
T301 Q701A
T302

FL2
FL1
J4
R751

GT1
J15 Z1
R750
J30 C705 GT2
BD1
D710
C752C
CX1
D709
C706 F1
HS4
D708 Q701B
J40 C752D
D711

D715 CY1 CY4

CN2
C752A HS3 CN1

D714 J139 J186


PC601
ZD601
D712

C752B D713 CY3 CY2

5 2011-01-19

Power
DPS-139AP A
layout top

18777_007_110525.eps
110525

2011-Jun-01 back to
div. table
18777_008_110525.eps
110525
2011-01-19
5

DPS-139AP A

R782C
R782D
R782B
J25 R782A
R245 R246 R248 R713 R736 CP2 FB702 FB701
R247 R720 R737 CP1
J5 R711
R719 R721
R715
Q242 C702 IC702 R726
Q702 FB703 FB704
R722 R718 R731
C127 R244 C246
C701 R728
layout bottom

D241 C241 C716B Q701 R735


R120 R730 R792
R739 R727 R716 R723 R714
Power

ZD241 C240 C716A


C120 C727 R791
R243 C704 R733 C722
R240 D707 R738 ZD702
R242B C121 C715
R760 D704 C712
R242A R790
C734
C124 R729 C725
R732 C729
C728
R241A C730
IC701

C745 C746
R241B C732
R121B R787
C717 R734
R241C R121A R788
R786 C710
R241D C726
C723
R241E
C724 C707D
C247 R725 ZD707 C707A
C733
C737 ZD708 C707C
C243 R724 C707B
C300 C951 C731 R746
R956 R957
ZD709 R747 D780B D780A
J6 R952 C954 C950
IC300
R954 C955 R950 ZD710 R717
C126 C303 R302
R959 IC951 R303 C301
Q951
C956 C302
R951
C958 R953 C957 R300 R305
R958 R301
C244 R960 R304
C953
C738
C245
C125
R900
C935
Q906
C128
R703
R906
D703
R702
J10
R705
R704
R613A
ZD901
R706
R613B
D702
D903 R613C
R707
R613D

div. table
2011-Jun-01 back to
R613E
R605
C909
C609
EN 88

R902 J8 C601
C901 R603 C603A
C900 C608 C603B R610
R908 R907 R602D R602C
R609 R602B R602A
IC601

R818A R818B
R607
C806 R804 R803 J139'
C802 C807
10.

IC902 D602 R813


R601
R809 R808 C805 C823 J186'
C602 R801 R802
C604 C607 R817
IC801

C903 D807
R604 R811 Q802
C904 R606 R612 R805
C804
Q800
R614 Q803 C803 R806
R903B R901 R823
R820
ZD900 C808 C820 R822
Q552.2E LA

R825
R814 R821
R819
Circuit Diagrams and PWB Layouts

C830
C831
Power layout bottom

R1B
C963A
R2B R1A
C963B
R2A
R903A
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 89

10-3 A01 272217190339 PSU


Switching Power Supply

Switching Power Supply


A01 A01
GT1 (1316)
(1308) FB905 CY5 (1319)
CN2
CN1 F1 D806 CN3
FL1 FL2 A1
B+ A3
L

C831
N

R1A
L800 No Components Secondary GND Primary GND

CY1
D805

CY4
CX1

CX2
Z1

C830
COLD BD1

C800
R1B

C809
COLD OCD
NTC1

GT2 C963A C963B

CY3
CY2

PRIMARY SECONDARY

FB803
AC_BROWN
COLD HOT COLD
COLD R814 R808 R300 12V' 24V'
VCC-ON
A4

C808
A2

1/2 PC601

R301
IC801 D807 R805

R305

R304
C813
B+'

Q801
Q800 R821 R822 R825
B++
R811
R806

R302 C301
VCC-ON

Q803
(1M95)
R818

CN4

R823
R801

C302
3.3VSB

C804

C805
R804

C300

C935
R819 STANDBY

12V3 OVP
R802

Q802

R303

C303
R813
C823

C802
R803

R816
IC300
R820

R817
C820

C803

C806

C807
12V3
C125

VSND
C245
B+'
T601 R240 C240 C241 BL-ON-OFF

R602A
B++
VCC-ON

24V'' BL-DIM
ZCD

R608
24V'

C606
D240 BL-I-CTRL
L240 FB240
24V POK
R602B

C738
24V

D603
R601

C244
FB241
R606

IC601

C242
VSND

R241E
R241B

R241F
R241D
R241C
R241A

C243
R602C

FB601
R605 D602 BROWN

R120 C120 C121

Q601

C605
R607
(1M99)
ZD601

1/2 PC601
C602

L120 CN5
R604

12V''
C601

C603

R609 D120
C607

ZCD 12V' FB120


C608

R603
C604

12V3
12V3
R610

R121B
C122

R121A

C123

C124
R611

Q906 B++
VCC-ON T901
R950 C950 C951
ZD905
1/2 PC902

R900 L951

C126
D951 FB950
3.3VSB
ZD902

D901

IC901 D952
FB900

C952
IC902

C953
AC_BROWN (1M09)
D903 D902 ZC' R906 CN6
C127
VCC'

Q951
R908

R951

R958

R953
12V3

C958
1/2 PC901

R952

R959
(1MP1)
J12 CN7

1/2 PC902
R957 C954 12V3

R954
J24

R960
3.3VSB OVP
R901

1/2 PC901
C904

R902
ZD900

C903

ZD903
C901

ZD901
C909

24V
ZD904

C908

C955
C910
C900

C907

C128
C956

C957
R907

R956
IC951 STANDBY

1 2010-09-27

Switching Power Supply


DPS-186FP A

18777_009_110530.eps
110530

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 90

Switching Power Supply

Switching Power Supply


A02 A02
R634
B++
B+

D703

C703
Q701A
ZD703
R703 R702

T302

R704

ZD704
A1
T301
R746 C731

A2

C707B
C707A

C752B
D714

D712

C752D
R705 R706

Q701B

C705

R782B
ZD705

R782A
D702

C752C
C752A
D715

D713
R707

ZD706
C706
D780A
OV1

R760
VREF 12V''
BL-I-CTRL

UC1'

R711
OV1 A3 OCD
12V'' BL-DIM
R720
ZD702

BL-ON-OFF
R721

C702

A4

R726
POK
R717

R714

R735

R728

R786

D710

D708

C752H
C752F
R738

R722

R731
IC701

D711

D709

R782D
R782C
C752E

C752G

R751
Q702

R750
C707D
C707C
BROWN
Q701

R719

OCD'
R718
C701

D780B
R730

OV1
R733

R787
OV1'
OCD'
R713
D707

OCD
UC1' D704
R791
CP2

R723

R736

R715
VREF VREF OCD'
CP1

R724

R792
ZD707

C727
C716A

R790

R729

R788

R727

R725
C717

C725

C728

C746

C745

C726

C723

C724

C733

C737
R732
C715

C729

C734

C722
ZD717

ZD708
C732

C730

C712

C
R734

IC702
R737
OCD
C
R716

C716B
C704

C710

R739
Primary GND

Secondary GND
1 2010-09-27

No Components
Switching Power Supply
DPS-186FP A

18777_010_110530.eps
110530

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 91

Power layout top

1 2010-09-27

Power
DPS-186FP A
layout top

18777_011_110531.eps
110531

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 92

Power layout bottom

1 2010-09-27

Power
DPS-186FP A
layout bottom

18777_012_110531.eps
110531

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 93

10-4 B01 393912364954


Common Interface

Common Interface
B01A TRANSPORT STREAM FROM CAM
+3V3
2F00
RES
CA-RST
3F06

3F07-4
100K
B01A
7F00 CA-CD1n 4 5
100n

20
74LVC245A 10K
3F07-2
1 CA-CD2n 2 7
3EN1
3F01 10K
+5V 3EN2 3F07-3
+5VCA 19 CA-DATAENn 3 6
G3 +3V3
+T 0R3 IF01 10K
3F02 3F07-1
22u 16V

CA-MOCLK 2 18 MOCLK CA-DATADIR 1 8


RES 2F01

1
100R IF02 2 10K
3F03-1
CA-MOVAL 1 8 3 17 MOVAL
3F08-1
CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 8
IF03 5 15 10K
100R 3F08-2
6 14 MOCLK 2 7
7 13 10K
3F08-3
8 12 MOVAL 3 6
9 11 10K
3F08-4
MOSTRT 4 5

10
10K

MDO0 1 3F09-1 8
+3V3 10K
MDO1 2 3F09-2 7
2F02
RES 10K
3F09-3
7F01 MDO2 3 6
100n

20
74LVC245A 10K
3F09-4 IF04
1 MDO3 4 5
3EN1
10K
3EN2
19
G3 3F10-1
IF05 MDO4 1 8
CA-MDO0 3F04-1 1 8 100R 2 18 MDO0 10K
1 3F10-2
IF06 MDO5 2 7
2
CA-MDO1 3F04-2 2 7 100R 3 17 MDO1 10K
3F10-3
CA-MDO2 3F04-3 3 6 100R 4 16 MDO2 MDO6 3 6
CA-MDO3 3F04-4 4 5 100R 5 15 MDO3 10K
3F10-4
CA-MDO4 3F05-1 1 8 100R 6 14 MDO4 MDO7 4 5
CA-MDO5 3F05-2 2 7 100R 7 13 MDO5 10K
CA-MDO6 3F05-3 3 6 100R 8 12 MDO6
CA-MDO7 3F05-4 4 5 100R 9 11 MDO7
3F12
IF07 CA-RDY +3V3

10
10K
CA-WAITn 2 3F11-2 7
10K
+3V3 3 3F11-3 6 IF08
CA-INPACKn +5VCA
10K
2F03
15-BIT ADDRESS RES CA-WP 4 3F11-4 5
7F02 10K
100n
8 3F11-1 1

20
74LVC245A CA-VS1n +3V3
1 10K 1P00
3EN1
3EN2 1
19 CA-ADDENn CA-D03
G3 2
CA-D04 3
XIO-A00 18 2 CA-A00 CA-D05
1 4
2 CA-D06 5
XIO-A01 17 3 CA-A01 CA-D07 6
XIO-A02 16 4 CA-A02 CA-CE1n 7
XIO-A03 15 5 CA-A03 CA-A10 8
XIO-A04 14 6 CA-A04 CA-OEn 9
XIO-A05 13 7 CA-A05 CA-A11 10
XIO-A06 12 8 CA-A06 CA-A09 11
XIO-A07 11 9 CA-A07 CA-A08 12
CA-A13 13
10

CA-A14 14
CA-WEn 15
CA-RDY 16
+3V3
+5VCA 17
2F04 18
RES CA-MIVAL 19
7F03 CA-MICLK
100n 20
20

74LVC245A CA-A12 21
1 CA-A07
3EN1 22
3EN2 CA-A06 23
19 CA-ADDENn CA-A05
G3 24
CA-A04 25
XIO-A08 18 2 CA-A08 CA-A03
1 26
2 CA-A02 27
XIO-A09 17 3 CA-A09 CA-A01 28
XIO-A10 16 4 CA-A10 CA-A00 29
XIO-A11 15 5 CA-A11 CA-D00 30
XIO-A12 14 6 CA-A12 CA-D01 31
XIO-A13 13 7 CA-A13 CA-D02 32
XIO-A14 12 8 CA-A14 CA-WP 33
11 9
34
35
10

CA-CD1n 36
MDO3 37
MDO4 38
+3V3 MDO5 39
2F05 MDO6 40
8-BIT DATA RES MDO7 41
100n CA-CE2n 42
7F04
20

CA-VS1n 43
74LVC245A
1 CA-DATADIR CA-IORDn
3EN1 44
3EN2 CA-IOWRn 45
19 CA-DATAENn CA-MISTRT
G3 46
CA-MDI0 47
XIO-D00 18 2 CA-D00 CA-MDI1
1 48
2 CA-MDI2 49
XIO-D01 17 3 CA-D01 CA-MDI3 50
XIO-D02 16 4 CA-D02 +5VCA 51
XIO-D03 15 5 CA-D03 52
XIO-D04 14 6 CA-D04 CA-MDI4 53
XIO-D05 13 7 CA-D05 CA-MDI5 54
XIO-D06 12 8 CA-D06 CA-MDI6 55
XIO-D07 11 9 CA-D07 CA-MDI7 56
MOCLK 57
10

CA-RST 58
CA-WAITn 59
CA-INPACKn 60
+3V3 CA-REGn 61
2F06 MOVAL 62
CONTROL RES MOSTRT 63
7F05 MDO0
100n 64
20

74LVC245A MDO1 65 1X07 1X04 1X08 1X01


1 MDO2 REF EMC HOLE EMC HOLE REF EMC HOLE REF EMC HOLE
3EN1 66
3EN2 CA-CD2n 67
19 CA-ADDENn 68
G3
71 69
XIO-D11 18 2 CA-REGn 72 70
1
2
XIO-D09 17 3 CA-CE1n 92789-055LF
XIO-D08 16 4 CA-CE2n
XIO-OEn 15 5 CA-OEn
XIO-WEn 14 6 CA-WEn
XIO-D14 13 7 CA-IORDn
XIO-D15 12 8 CA-IOWRn
CA-WAITn 11 9 XIO-D10 4 2010-12-10

SPB SSB TV550


10

3139 123 6495


2K11 4DDR EU

19100_001_110114.eps
110114

2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 94

Flash

Flash
B01B B01B

+3V3

2F20

2F21
100n

100n
7F20

12

37
H27U4G8F2DTR-BC
VCC
1
2
[FLASH] 3
4G 16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
IF21 25
NAND-CE1n
26
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
IF22 WE
NAND-WPn 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
48
10K
3F19 VSS

13

36
+3V3

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_002_110114.eps
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2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 95

USB Hub

USB Hub
B01C B01C
IF44

+3V3

2F25

100n
IF43

2F26

2F27

2F28

2F29

2F30

2F31

2F32

2F33
100n

100n

100n

100n

100n

100n
1u0

1u0
1M0

+3V3 3F28 7F25

14

34

36
23
15

10
29
USB2513B-AEZG

5
1F25
1 3 CR PLL
VDD_3V3 +3V3
FILT USB-DP 9F25 USB-DP2
24M
4
2

USB HUB
2F34

2F35

9F26
10K

10p

10p

IF35 USB-DM USB-DM2


3F35 IF33 3F37
33 13
XTALIN|CLKIN OSC1
2 10K RES 9F29 USB-DP3
IF34 USBDP_DN1|PRT_DIS_P1
32 1
XTALOUT USBDM_DN1|PRT_DIS_M1
IF30 12 RES 9F30 USB-DM3
BC_EN1|PWRTPWR1
RESET-USBn 26 IF36
RESET
17 USB-OC2n
OSC2
11 4 USB-DP2
TEST USBDP_DN2|PRT_DIS_P2
3 USB-DM2
3F31-2 IF42 USBDM_DN2|PRT_DIS_M2 +5V
2 7 28 16
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
10K IF37
USB-DP IF31 31 19 USB-OC3n
IF32 DP OSC3
USB-DM 30 USBUP 7 USB-DP3
DM USBDP_DN3|PRT_DIS_P3

0R3
27 6 USB-DM3

3F32
+3V3 VBUS_DET USBDM_DN3|PRT_DIS_M3
18
3F30 IF41 BC_EN3|PWRTPWR3
35

+T
RBIAS 3F34-4 FF33
8 4 +5V-USB2
12K IF40
3 3F31-3 6 22 9
SDA|SMBDATA|NON_REM1 100K
24 NC 20
10K IF39 SCL|SMBCLK|CFG_SEL0
4 3F31-4 5 25 21 USB-OC2n 3 3F34-3 6
HS_IND|CFG_SEL1
10K 100K
VIA 3F34-2
GND_HS 2 7
3F36
37

38
39
40
41

+3V3 USB-OC3n 100K


10K 3F34-1
1 8
100K SIDE USB
1P08
+5V-USB2 1
USB-DM2 FF36
2
USB-DP2 FF37
3
4 IF45
FF32 5 6

5401

RES
1F24
FF38
FF39 +5V 1
USB-DM3 2
USB-DP3 3
FF30 4
FF31 5
6 7
502382-0570

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_003_110114.eps
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2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 96

SD Card

SD-Card
B01D B01D

3F40 FF45
+3V3 +3V3-SD
+T 0R3

22u 16V
2F40
+3V3

3F41-4 IF47 3F44-2


4 5 SDIO-DAT3 SDIO-DAT3 2 7 FF47
1P09-1
47K 3F41-3 100R 3F43-3
3 6 SDIO-CMD SDIO-CMD 3 6 FF48
1
47K 100R 2
+3V3-SD 3
3F45 RES 3F44-1 4
SDIO-CLK SDIO-CLK 1 8
5
FF49
10K 100R 6
7
2 3F41-2 7 SDIO-DAT0 SDIO-DAT0 2 3F43-2 7 FF41
8
47K 100R 9
1 3F41-1 8 SDIO-DAT1 SDIO-DAT1 1 3F43-1 8 FF42 13 14 FF46
15 16
47K 100R
1 3F42-1 8 SDIO-DAT2 SDIO-DAT2 3 3F44-3 6 FF43
47K SCDA7A0200
100R

1P09-2
3F42-2 FF44
2 7 SDIO-CDn SDIO-CDn 10
47K 11
12
3 3F42-3 6 SDIO-WP SDIO-WP FF50
SCDA7A0200
47K

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_004_110114.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 97

PNX85500 Control

PNX85500 Control
B01E B01E
+3V3-STANDBY +3V3-STANDBY

+3V3-STANDBY
+3V3 +3V3 +3V3

RES
2F49

100p

100n
2F52

RES
10K
3F66

3F52

10K
8
7F52

3F67
M25P05-AVMN6

10K
BACKLIGHT-BOOST
VCC IF50
PNX-SPI-SDI IF51 2
Q D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
512K IF52
6 PNX-SPI-CLK
FLASH C
IF53

3F68 RES
1 PNX-SPI-CSBn
S
IF54
3 IF55

47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES
7 BC847BPN(COL) 6
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES IF56
VSS SPI-PROG BC847BPN(COL)
4 2
IF57
1
4

IF62 5
FF04
SDM
3

3F53 FF58
9CH0
10K

RES

RES
2F53

3F69

3F54

RES
1K0
1u0

10K
+3V3
MAIN NVM

DEBUG ONLY
RES
IF58 1F52
2F58 RES FF61 3F62 100R
SCL-SSB 1 SCL
FF62
100n 2
7F58 SDA-SSB 3 SDA
3F63
8

FF63 100R 4 5

10K

3F58 (8K 8) 7
WC
EEPROM 3F59 FF55
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R 3F60 FF56
3 5 SDA-UP-MIPS
2 SDA
100R
4

FF57

DEBUG / RS232 INTERFACE LEVEL

RES SHIFTED
1F51
FF65 3F64
TXD-UP 1
100R
FF64
2
FOR
RXD-UP
FF66 3F65 UP
3
RESET-STBYn 100R
SPI-PROG
4 DEBUG
5
7 6
USE ONLY

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_005_110114.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 98

Tuner

Tuner
B01F B01F

IF10
1T01
FF71
* IF11

15
TUNER 14

4MHZ_REF
PNX-IF-P
I2C_ADR

I2C_SDA

IF_OUT1

IF_OUT2
RF_AGC

I2C_SCL

B+_TUN
2F71
B+_LNA

9F00

9F01

9F02

9F03
16 13
RF_IO

+5V-TUN-PIN
TUN

NC
10n

2F72

2F73
7F75 * *

2F65 RES
1
UPC3221GV-E1
* *
10

11

12
1

VCC

15p
IF75 2F74 IF73 2F75 IF76 AF72

2F70 RES
IF74 3F79-1
1F75 2 INPUT1 OUTPUT1 7 1
1 5
I O1 10n 10n 220R IF16

RES
5F71

2F76

2F77

5F74

2F62
2 4

2p2

1p0
IF77
6p8

6p8

6p8

6p8

6p8

6p8

6p8
ISWI O2 2F78 IF78

3F82 RES
3 INPUT2 OUTPUT2 6 IF80
2F79 3F79-4
3 4 * * * *
GND IF81 10n

820R
RES 5F76

330n
GND1

GND2
220R
RES 2F9C

RES 2F9D
RES 2F9A

RES 2F9B
RES 2F97

RES 2F98

RES 2F99

10n AF73
X7251M 4 VAGC AGC CONTROL
36M17

2F80

2F82
8

5
FF74
TUN-P1 * *
FF76 AF71 TUN-IF-N PNX-IF-N
PNX-IF-AGC IF82 3F77
AF70 TUN-IF-P
100n
4n7

4n7

4K7 IF79
FF00
* 9F04 IF-AGC
IF-AGC
FF01
IF72
3F80 IF12 2F63 IF13
IF-
2F61
RES 2F81

RES 2F59

2F60

+5V-TUN-PIN
220R 10n
100p

100p

9F05

9F06

5F66

2F66
680n
FF75

15p
*

BA591
2F85

3F71

6F72

3F72

2F92
4K7

1K0
47n

10n
3F81 IF14 2F64 IF15
* * IF+
RES 2F95

RES 2F96
2F93

100n

220R 10n
TUN-P6 FF81
IF86 2F90
TUN-P7 FF82
10n * For BR NIM Tuner Only

3F78

3K3
3 5F73 2

5F70

470n
+5V-TUN-PIN

TUN-IF-N

TUN-IF-P 4 1
2F91 RES
ATB2012
10n
IF89
2F84 3F76 IF87 IF90
SCL-TUNER SELECT-SAW 7F70
PDTC114EU
15p 47R

RES
TUN-P6

10n
2F86 3F75 IF88 SDA-TUNER

2F94
15p 47R
TUN-P7
* For EU Hybrid Tuner Only

9F71
5F72 RES
+5V-TUN +5V-TUN-PIN
30R
2F88

22u

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_006_110114.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 99

Toshiba Supply

Toshiba supply
B01G B01G

+3V3 +1V2-BRA-DR1

+1V2-BRA-VDDC

5FA3

5FA4
30R

30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2

2FA3

2FA4
100n

100n

10u
1
FFA2

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_007_110114.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 100

HDMI

HDMI
B01H B01H

HDMI CONNECTOR SIDE


1P05
1 DRX2+ DIN-5V
2
3 DRX2-
4 DRX1+
5
6 DRX1-
7 DRX0+
8
9 DRX0-

1 3FBF-1 8
10 DRXC+

47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 3FBF-2 7 DIN-5V
16
17 FFB3 47K
18 DIN-5V
19 FFB4 DRX-HOTPLUG
FFB5 21 20
23 22
FFB6

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 101

VGA

VGA
B01I B01I

FFC1 3FC5
R-VGA

CDS4C12GTA
18R

RES 6FC1
RES 2FC1

1FC1
100p

12V
FFC2 3FC6
G-VGA

CDS4C12GTA
18R

RES 6FC2
RES 2FC2

1FC2
100p

12V
1E05
1
2
3 3FC7
B-VGA
4

CDS4C12GTA
FFC3 18R
5

RES 6FC3
RES 2FC3

1FC3
100p
6

12V
VGA 7
8
CONNECTOR 9 FFC4
10
11
FFC5
12 9FC5 H-SYNC-VGA
13
14

RES 6FC4

CDS4C12GTA
2FC4

1FC4

3FC3
15

12V

4K7
47p
17 16
FFC6
1216-02D-15L-2EC

FFC7
9FC6 V-SYNC-VGA

CDS4C12GTA
RES 6FC5
2FC5

1FC5

3FC4
12V
47p

4K7
9FC1 VGA-SDA-EDID-HDMI
RES
3FC1 FFC8
9FC2 VGA-SDA-EDID
RES

CDS4C12GTA
10K

RES 6FC6
2FC6

12V
47p

9FC3 VGA-SCL-EDID-HDMI
RES
3FC2 FFC9
9FC4 VGA-SCL-EDID

CDS4C12GTA
10K RES
2FC7

RES 6FC7

12V
47p

+5V-VGA

CDS4C12GTA
2FC8

1FC6

RES 6FC8

12V
47p

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 102

Temp sensor & headphone

Temp sensor & headphone


B01J B01J

+3V3

9FD1 RES

9FD2 RES
3FD1
RES

1K0

2FD1

3FD2
100n

1K0
LTST-C190KGKT
RES

8
7FD1
LM75BDP

6FD1

+VS
3 7 IFD1
OS A0
3FD3 IFD2
SDA-SSB 1 6 IFD3
SDA A1
3FD4 100R IFD4
SCL-SSB 2 5 IFD5
SCL A2

GND
100R

RES
3FD6

3FD7

9FD5
1K0

1K0
4
RES
1329
1
2
3
4 5

502382-0370

1328
FFDA MSJ-035-12D-B-AG-PBT-BRF
AMP1
2
AMP2 3
1

CDS4C12GTA

CDS4C12GTA
FFDB
7

8
3FDG-2

3FDG-1

2FDC

2FDD
1FD2

6FD2

1FD3

6FD3
1K0

1K0

12V

12V

22n

22n
FFDC

RES

RES
2

4 2010-12-10

SPB SSB TV550


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Tuner Brazil

Tuner Brazil
B01K B01K

5FE0 IF63 IF64


+2V5-BRA +1V2-BRA-VDDC
30R

2FE0

2FE3

2FE4

2FE5

2FF0

2FF1
100n

100n

100n

100n
1u0

1u0

+3V3-BRA-FLT
AGND
5FE3 IF65 IF66 5FE4
+3V3-BRA-FLT
+3V3-BRA
30R 30R

2FE6

2FF2

2FF3

2FF4

2FF5

2FF6
100n

100n

100n

100n
1u0

1u0
AGND
5FE5 IF67 IF68
+1V2-BRA-DR1
30R 5FE7 IF48
+3V3 +3V3-BRA

2FE8

2FF7

2FF8

2FF9
100n

100n
1u0

1u0
30R

IF69 5FE8
+2V5-BRA
30R 7FE3
1FE0 LD3985M25

2FG0

2FG1
100n
1 3

1u0
5FE9 FF03
1 5
25M4 +5V IN OUT +2V5-BRA
2 4 30R
2FG2

2FG3

3 4
18p

18p

INH BP
COM
7FE0

32

22

20

16
36
56
63

13
35
49
64

34
48

43

2FH2

2FH3

2FH4
TC90517FG

1u0

10n

1u0
2
AGND AGND AGND

AD_DVDD

AD_AVDD

PLLVDD

DR2VDD
VDDC VDDS

DR1VDD
2FH5 * To be drawn near PNX85500
19 21
I FIL
AGND
X 1n5
18 58 3FG6-4 4 5 33R TS-BR-VALID 1 9F27-1 8 * TS-FE-VALID
O PBVAL
DFE6
3 53
0 RERR
2 XSEL
1 DFE7
54
RLOCK
IF+ 2FG4 10n IF17 30
P DFE8
IF- 2FG6 10n IF18 29 ADI_AI 55
N RSEORF
2FG7 100n 28 59 3FG6-3 3 6 33R TS-BR-SOP 2 9F27-2 7 * TS-FE-SOP
BFE2 P SBYTE
2FG8 100n 27 ADQ_AI
N DFE9
52
AGND BFE3 SLOCK 5FG0
2FG9 100n 24
P
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-BR-CLOCK 9F28 * TS-FE-CLOCK
N SRCK 30R
AGND
2FH7 100n 26 60 3FG6-2 2 7 33R TS-BR-DATA 4 9F27-4 5 * TS-FE-DATA 5FG2
AD_VREF SRDT
DFF1
39 38
AGND DTCLK STSFLG1 30R
IF27 3FE5 IF28 AGND
40 9 IF-AGC
+3V3-BRA-FLT DTMB AGCCNTI
18K

2FH8
8 10

10n
S_INFO AGCCNTR
DFF2
3FE6 10K 1 51
0 STSFLG0
41 TSMD
1
42
SYRSTN
3FE7 10K IF29 7
AGCI
6 3FG2-1 RESET-SYSTEMn
0 3FG2-2
11 SLADRS 5 10K
CKI 1
10K
3FG4-2
AD_DVSS
AD_AVSS

SCL-SSB 3FE8 100R IF49 45 12


SCL SCL
PLLVSS

SDA-SSB 3FE9 100R 46 TN 14 4K7 3FG4-1


SDA SDA +3V3-BRA-FLT
4K7
VSS
23

31

17

4
15
33
37
44
47
50
57
62

AGND AGND

4 2010-12-10

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10-5 B02 393912364954


NANDflash - conditional access

PNX85500: NANDflash - conditional access


B02A +3V3
B02A

3S1W

10K
7S00-5
PNX85500

FLASH D25 XIO-D00


00
D26 XIO-D01
01
C24 XIO-D02
02
D23 XIO-D03
03
NAND-ALE D22 C23 XIO-D04
ALE 04
NAND-CLE C21 NAND B23 XIO-D05
CLE 05
A22 XIO-D06
06
XIO-A00 J25 E22 XIO-D07
00 07
XIO-A01 J26 XIO_D F24 XIO-D08
01 08
XIO-A02 H21 F25 XIO-D09
02 09
XIO-A03 H22 F26 XIO-D10
03 10
XIO-A04 H23 E23 XIO-D11
04 11
XIO-A05 H24 E24
05 12 IS26 3S15
XIO-A06 H25 E25 INPACK INPACK
06 13
XIO-A07 H26 E26 XIO-D14
07 14 10K
XIO-A08 G21 XIO_A D24 XIO-D15
08 15
XIO-A09 G22
09
XIO-A10 G23 B22 XIO-OEn
10 OE_
XIO-A11 G24 XIO C22 XIO-WEn
11 WE_
XIO-A12 G25
12
XIO-A13 G26 B21 +3V3
13 CLK_BURST
XIO-A14 F22
IS25 14
XIO-A15 F23 E21 NAND-CE1n
15 CE1_
D21
CE2_
A20
NAND RDY2

3S1V

RES
F21

10K
RDY1 NAND-RDY1n
A21 9S08 NAND-WPn
WP_
IS00

+3V3

3S1X

10K
7S00-11
PNX85500

CA-MDI0 3S01-1 1 8 P21 VIDEO_STREAM N26 CA-MDO0


3S01-2 2 0 0
CA-MDI1 33R 7 P22 M21 CA-MDO1
1 1
CA-MDI2 3S01-3 6 3 33R P23 M22 CA-MDO2
2 2
CA-MDI3 33R 5 3S02-4 4 P24 M23 CA-MDO3
3 3
CA-MDI4 7 3S02-2 2 33R P25 MDI MDO M24 CA-MDO4
4 4
CA-MDI5 33R 3S02-1 1 8 P26 M25 CA-MDO5
5 5
CA-MDI6 3 33R 6 N21 M26 CA-MDO6
6 6
CA-MDI7 3S02-3 33R 5 3S01-4 4 N22 L21 CA-MDO7
7 7
33R
CA-ADDENn J22
ADD_EN

CA-DATADIR K25 K23 CA-VS1n


DATA_DIR 1
VS K24 9S00 CA-MOCLK
2
CA-DATAENn K26
DATA_EN
K21 CA-CD1n
3S03 1
CA-MICLK N23 CD K22 CA-CD2n
I 2
10R
MCLK
CA-MOCLK L25
O CA
+3V3
N24
MISTRT
3S31
CA-MIVAL N25 TS-FE-DATA 3S1R
MIVAL
33R 560R
CA-MOSTRT L22 TS-FE-CLOCK 3S1S
MOSTRT
560R
CA-MOVAL L23 TS-FE-VALID 3S1T
MOVAL
560R
J21 TS-FE-SOP 3S1U RES
OOB_EN
560R
RES
CA-RDY L24
RDY

CA-RST L26 T21 TS-FE-DATA TS-FE-DATA 3S23


RST DATA
T23 TS-FE-ERR 470R
ERR
RES J23 T22 TS-FE-CLOCK TS-FE-CLOCK 3S24
VCCEN TNR_SER1 MICLK
CA-MISTRT 9S01 R23 TS-FE-VALID 470R
MIVAL
J24 R22 TS-FE-SOP TS-FE-VALID 3S28
VPPEN SOP
+3V3 470R
TS-FE-SOP 3S29 RES

RES 470R
3S04
2S09

100n
33R

7S02
5

1
4
2

3 4 2010-12-10
74LVC1G08GW
SPB SSB TV550
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 105

SDRAM

PNX85500: SDRAM
B02B B02B

7S00-8
PNX85500
DDR2-BA0 H1 MEMORY J1 DDR2-A0
0 0
DDR2-BA1 H2 J3 DDR2-A1
1 BA 1
DDR2-BA2 G1 K1 DDR2-A2
2 2
G4 DDR2-A3
3
DDR2-DQM0 D1
0 M0 4
L3 DDR2-A4
DDR2-DQM1 D5 G3 DDR2-A5
1 5
DDR2-DQM2 R3 DM L2 DDR2-A6
2 6
DDR2-DQM3 T5 H5 DDR2-A7
3 7
L1 DDR2-A8
A 8
DDR2-D0 F3 J5 DDR2-A9
0 9
DDR2-D1 C2 J2 DDR2-A10
1 10
DDR2-D3 F2 M3 DDR2-A11
+1V8 2 11
DDR2-D2 C3 J4 DDR2-A12
3 12
DDR2-D6 B4 M2 DDR2-A13
4 13
DDR2-D5 F1 K5 DDR2-A14
5 14
DDR2-D4 C1
6
DDR2-D7 E1 N5 3S30 DDR2-CLK_N
7 N

100u 2.0V
F4 CLK N4 3S33 DDR2-CLK_P
180R 1%

180R 1%
DDR2-D8 8 P 10R
3S20

3S06

2S12
DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%

DDR2-D14 14 P
3S22

DDR2-D15 F5
15
U3 DQ R1
180R 1%

DDR2-D16 DDR2-DQS2_N
16 N
3S07

DDR2-D17 P2 DQS2 R2 DDR2-DQS2_P


17 P
DDR2-D19 U2
18
DDR2-D18 P3 T3 DDR2-DQS3_N
19 N
DDR2-D22 N1 DQS3 T4 DDR2-DQS3_P
20 P
DDR2-D23 U1
21
DDR2-D20 P1 K3 DDR2-CAS
22 CASB 3S6Q
DDR2-D21 T1 K4 DDR2-CKE DDR2-CKE
23 CKE
DDR2-D24 V4 L5 DDR2-CS
24 CSB 10K
DDR2-D30 R5 M4 DDR2-ODT
25 ODT
DDR2-D26 U5 M1
26 PCAL 3S6P
DDR2-D25 P5 M5 DDR2-RAS DDR2-ODT
27 RASB
DDR2-D28 N3 H3 DDR2-WE
28 WEB 10K
DDR2-D31 V3 RES
29
DDR2-D27 R4 A2 DDR2-VREF-CTRL2
30 1
DDR2-D29 V5 VREF V1 DDR2-VREF-CTRL3
31 2

IS42

2S20

2S17

1%
2S24

2S25
100p

100n

100n

100p

3S0V

261R
4 2010-12-10

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Digital video in

PNX85500: Digital video in


B02C B02C

7S00-6
PNX85500

HDMIA-RX2+ T25 HDMI_DV


P
HDMIA-RX2- T26 RX0_A
N

HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A

HDMIA-RXC+ W25
P
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W
W24
RREF
12K
2S2E
RES

10u

4 2010-12-10

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Audio

PNX85500: Audio
B02D B02D
3S0Z
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER
4R7 +24V-AUDIO-VDD
100R +3V3
3S53-2

2S3J

220n
7S08
LD3985M25
100R
1 IS1H 1 3S16-1 8
3S12-1 2S2W 3S53-3 FS08 FS03
AUDIO-IN1-L 8 10K 5 1
OUT IN
22K 1u0 100R IS12 IS13 4

10u RES
4 3 4S14 ADAC(1) 12 7S05-4
2 3S53-4 BP INH +2V5 3S38
LM324 14

2S2R

2S2S
3S16-2 7

10u
2 3S12-2 IS1J 2S2V +AUDIO-L
IS02

1u0 RES
AUDIO-IN1-R 7 10K COM 13
100R 100R

2S2T

100n
22K 1u0 11

2S34
2
3S16-3 3 6 2S2Z
IS1M
10K
1u0 3S36-2 10K
2 7
IS0V 1 8
3S16-4 5 2S2Y 10K 3S36-1

100u 4V
3S51

2S42

2S41
4R7
4

1u0
2S2G
10K
1u0
3S17-4 47p
IS0R 4 5 7S00-2
3S13-4 2S31
AUDIO-IN3-L 10K PNX85500 +24V-AUDIO-VDD
4 5 2S36
22K 1u0
AE10 AUDIO AC7 1 3S3G-1 8 ADAC(1)
3 L P
3S17-3 6 AF10 AIN1 ADACL AB7 IS1N
3S13-3 2S30 R N 1u0 33R 3S3G-3 IS03 4
AUDIO-IN3-R 3 6 10K 3 6 ADAC(2) ADAC(2) 10 7S05-3
LM324 8 3S39
AD10 AC6 -AUDIO-R
22K 1u0 L P 33R
AC10 AIN2 ADACR AB6 9
3S17-1 R N 100R
IS1P 1 8
3S13-1 2S33 11
AUDIO-IN4-L 10K AE9 AD7
L 1 3S3G-2
1 8 AF9 AIN3 AE7 2 7 ADAC(3)
22K 1u0 R 2
2 AF7 33R
3 3S3G-4
IS1Q 3S17-2 7 AD9 ADAC AD6 4 5 ADAC(4)
3S13-2 2S32 L 4 IS1S
AUDIO-IN4-R 2 10K AC9 AIN4 AE6 33R
7 R 5
AF6
22K 1u0 6
AF8
L 3S36-3 10K
AE8 AIN5 AD4 3 6
R OSCLK
3S10 AD1 4 5
I2S_OUT SCK 3S3H 10K 3S36-4
2S2L 100R AB9 AD2 ADAC(5)
POS WS 2S2H
IS1B AB8 VR_AADC 33R
1u0 NEG
IS19 AE1
1 3S3U 47p
AD8 AF2 ADAC(6)
VREF_AADC 2
AE3 +24V-AUDIO-VDD
IS1A I2S_OUT_SD 3 33R
AC8 AF3
VCOM_AADC 4
3S3F
AF5
SPDIF_OUT

2S3D

2S3C

2S3B

2S3A

2S39

2S38
1n0

1n0

1n0

1n0

1n0

1n0
56R DBS8 AE5 IS07 4
SPDIF_IN1
2S3G
2S3H
2S3E
2S3F

100n

100n

3 7S05-1
10u

10u

ADAC(5)
LM324
9S06
RES

1 AUDIO-OUT-L
2

11

3S37 3S6L

10K 22K
2S2K

+3V3 47p
+3V3-ARC

+24V-AUDIO-VDD
3S11 IS1L
1R0

4
2S3Q

100n

ADAC(6) 5 7S05-2
LM324 7
IS06 AUDIO-OUT-R
6

11
7S09-1
14

74LVC00APW
IS1D
SPDIF-OUT-PNX SPDIF-OUT-PNX 1 & 2S3K
3 IS1G 1 3S18-1 8 SPDIF-OUT
2
100n 220R 3S34 3S32

6
3S18-2

3S18-3
+3V3

220R

220R
7

10K 22K
+3V3
2S2J

3
47p
+3V3-ARC
3S19

+3V3-ARC
10K

7S09-2
14

74LVC00APW 7S09-3
14

4 & 74LVC00APW
6 9 & 2S3L IS1K 2S3M IS44
IS1E 180R
SEL-HDMI-ARC 5 8 eHDMI+
10 3S6M
+3V3 100n 100n
7

3S25

68R
+3V3-ARC

7S09-4
14

74LVC00APW
12 &
11
13
+3V3
7

4 2010-12-10

SPB SSB TV550


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MIPS

PNX85500: MIPS
B02E B02E
+3V3
7S00-3
PNX85500
RES
CONTROL C25 1
3S56
2
3S69 1F10
IS05 SDA SDA-UP-MIPS SDA-UP-MIPS
3S45 2 3S57 FS44
BOOTMODE 1 C26 100R 1 SCL-UP-MIPS SCL-UP-MIPS 3S6A 4K7 4K7 EJTAG-TRSTn-PNX85500
+3V3 SCL 1
100R EJTAG-TMS-PNX85500 FS49
10K 3S58 2
BOOTMODE Y21 B26 1 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
3S40
3D-LR 3D-LR IS17 9S09 IS16 Y22 GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY
+3V3 GPIO_1 SCL 4
10K DS52 RXD1-MIPS Y23
GPIO_2
100R EJTAG-TDI-PNX85500 FS52
5 USE ONLY
TXD1-MIPS Y24 B25 1 3S5Y 2 SDA-SSB SDA-SSB 3S6D 2K2
3S82 GPIO_3 SDA 6
BOOST-PWM RXD2-MIPS W21 3 A24 100R 1 2 3S5Z SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53
+3V3 GPIO_4 SCL 7
TXD2-MIPS W22 100R
10K GPIO_5 3S60 8
3S80 FS10 TXD2-MIPS GPIO6 W23 B24 1 2 SDA-TUNER SDA-TUNER 3S6F 2K2 10 9
+3V3 GPIO_6 SDA
3S81 10K FS11 RXD2-MIPS PNX-SPI-CS-BLn V22 4 A23 100R 1 2 3S61 SCL-TUNER SCL-TUNER 3S6G 2K2
+3V3 GPIO_7 SCL
10K BOOST-PWM V23 100R
RES 3S21 GPIO_10
+3V3 GPIO6 SELECT-SAW U23 AA25 EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K
IS04 GPIO_11 TRSTN
AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3
10K TMS +3V3-STANDBY FS57 BM08B-SRSS-TBT
USB-DM R26 AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
3S62 PNX-SPI-CS-BLn DN TCK
USB-DP R25 AB26 EJTAG-TDO-PNX85500 EJTAG-TDO-PNX85500 10K 2 7 3S6H-2
+3V3
IS4Z R24 DP USB TDO
AB25 EJTAG-TDI-PNX85500 EJTAG-TDI-PNX85500 10K 4 5 3S6H-4
10K RREF TDI
10K
3S00
AE4 RESET-SYSTEMn
RESET_SYS

3S55

5K6
3S64 FS64 33R
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM
10K
AC5
CLK_54_OUT

3S26

3S27
3S6J

RES 10K

10K

10K
3S83
+3V3 RXD1-MIPS
3D-VS IS14
10K
+3V3 +3V3
3S84
+3V3 TXD1-MIPS IS40
3S72
10K PXCLK54
3S4A
BACKLIGHT-PWM 47R
100R

IS15 3S4B
3D-VS-DISP
100R RES
RES

+3V3

2S89

100n +3V3

3
7S01
PCA9540B
3S65
VDD SC0 5 SCL-DISP SCL-DISP 1 2
4K7
3S66
SC1 8 SCL-BL SCL-BL 1 2
4K7
3S67
SCL-SET 1 SCL SD0 4 SDA-DISP SDA-DISP 1 2
I2 C 4K7
INP 3S68
-BUS
SDA-SET 2 SDA FIL SD1 7 SDA-BL SDA-BL 2 1
CTRL
4K7
VSS

6
FS31

9S10 SCL-BL
IS08
SCL-SET 9S11 FS2W SCL-DISP

9S12 FS2Y SDA-DISP


IS09
SDA-SET 9S13 SDA-BL

7S00-4
PNX85500

ETH-RXCLK AA3
RXCLK ETHERNET
ETH-RXD(0) Y5
0
ETH-RXD(1) Y6 AA2 ETH-TXCLK
IS50 1 TXCLK
ETH-RXD(2) AB4 RXD ETH
2
ETH-RXD(3) AC1 AA1 ETH-TXD(0)
3 0
AA4 ETH-TXD(1)
1
ETH-RXDV AC2 TXD AB1 ETH-TXD(2)
RXDV 2
ETH-RXER Y4 AB2 ETH-TXD(3)
RXER 3
ETH AA5 ETH-TXEN
TXEN
SDIO-DAT3 W2 AB3 ETH-TXER
CC_DAT3 TXER
SDIO-CLK W1 AC3 ETH-COL
CLK COL
SDIO-CMD W6 Y2 ETH-CRS
CMD CRS
SDIO-DAT0 W5 Y3 ETH-MDC
0 MDC
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
SDIO-CDn U6
SDCD
SDIO-WP V6
SDWP

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 109

Video out - LVDS

PNX85500: Video out - LVDS


B02F B02F

7S00-7
PNX85500

PX1A- A7 LVDS D7 PX3A-


N N
PX1A+ B7 A A E7 PX3A+
P P

PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P

PX1CLK- 9S90 C10 E10 9S94 PX3CLK-


N N
PX1CLK+ 9S91 B10 CLK CLK D10 9S95 PX3CLK+
P P

PX1C- A9 LOUT1 LOUT3 D9 PX3C-


N N
PX1C+ B9 C C E9 PX3C+
P P

PX1D- A11 D11 PX3D-


N N
PX1D+ B11 D D E11 PX3D+
P P

PX1E- C12 E12 PX3E-


N N
PX1E+ B12 E E D12 PX3E+
P P

PX2A- A14 D14 PX4A-


N N
PX2A+ B14 A A E14 PX4A+
P P

PX2B- C15 E15 PX4B-


N N
PX2B+ B15 B B D15 PX4B+
P P

PX2CLK- 9S92 C17 E17 9S96 PX4CLK-


N N
PX2CLK+ 9S93 B17 CLK CLK D17 9S97 PX4CLK+
P P
LOUT2 LOUT4
PX2C- A16 D16 PX4C-
N
PX2C+ B16 N C E16 PX4C+
C P
P
PX2D- A18 D18 PX4D-
N
PX2D+ B18 N D E18 PX4D+
D P
P
PX2E- C19 E19 PX4E-
N
PX2E+ B19 N E D19 PX4E+
E P
P

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 110

Standby controller

PNX85500: Standby controller


B02G B02G

+1V1

POL
IS3B

5S04
RES

30R

2S10

100n
1u0
2S13

2S37

1u0

9S24
RES
2S11

100n IS20 DS50 2S4G


3
1 10p

AC17
AA17

AF26
2

1S02

54M
7S00-9
PNX85500 4
2S4F
1

VDDA_1V1_DCS

VDDA_ADC2V5

VDD_XTAL
+3V3-STANDBY 2S4D AE17 +3V3-STANDBY
3S1B XTAL_IN 10p
1n0 RC RC AD19
0
3S1C RES 10K TACHO TACHO AE19 AF17
1 XTAL_OUT
10K 3S1D CEC-HDMI CEC-HDMI AF19
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20 AA26 RESET-STBYn
3 RESET_IN
10K 3S1F SDM SDM AB20 IS3F
7 3S44
+3V3-STANDBY
3S3L 10K STANDBY EA
AB24 EA EA
RES LCD-PWR-ONn LCD-PWR-ONn AC20
0 ALE IS3E 10K 3S43
3S3M 10K EJTAG-DETECTn EJTAG-DETECTn AD20 AB23 ALE
3S3N RES 1 ALE
10K LAMP-ON LAMP-ON AE20 IS3D
2 10K
3S3P 10K STANDBY STANDBY AF20 AC26 PSEN PSEN 10K 3S42
3 PSEN
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21 P2
4 RES 3S6V
RES 3S3S 10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 3S2F 100R SDA-UP-MIPS SDA-UP-MIPS
3S3R 5 SDA 3S2G 100R
10K POWER-OK POWER-OK AC21 MC AC24 SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W
6 SCL
3S3T 10K RES ENABLE-3V3n ENABLE-3V3n AD21 RES
7 LED1 RES 3S1P 4K7
+3V3-STANDBY 10K AD26 3S2H 100R LED1
3S1G 0
RXD-UP RXD-UP AE21 PWM AC25 3S2K 100R LED2 LED2 10K 3S41
0 1
3S1H 10K TXD-UP TXD-UP AF21
1 10K
10K DETECT2 AA22 AE23 PNX-SPI-SDO
3S2A 2 SDO
DETECT2 AB22 P3 AF25 PNX-SPI-SDI
3 SDI
AC22 SPI AF24 PNX-SPI-CLK
10K 4 CLK
RES AD22 AF23 PNX-SPI-CSBn
5 CSB
3S1K
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP RES 3S2L
0 0
AV2-BLK AE26 AA18 IS2Z RESET-DVBS RESET-DVBS 10K RES 3S46
10K 1 1
RES AV1-BLK AE25 P5 AD18 RESET-USBn RESET-USBn RES 3S3Y 10K
3S1J KEYBOARD 2 2 +3V3-STANDBY
KEYBOARD AE24 AE18 RESET-ETHERNETn RESET-ETHERNETn 10K RES 3S47
3 3
LIGHT-SENSOR P0 AF18 SEL-HDMI-ARC SEL-HDMI-ARC 3S2S 10K
100K 2S4E 4
AV1-STATUS AF22 AA19 RESET-AVPIP RESET-AVPIP 10K RES 3S2M
RES 4 5

VSS_XTAL
AV2-STATUS AE22 P6 AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES
100n 5 6
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49
7

AD17
3S1L
SPI-PROG SPI-PROG 4K7
10K PNX-SPI-WPn

+3V3-STANDBY +3V3-STANDBY

1 3S2V 2
1K0
9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28
2
FS45 INP
1 IS2U 1
OUTP
5
CD
NC GND

3
9S0D

2S4K

100n
RES
4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 111

Power

PNX85500: Power
B02H IS3Q 5S80

30R
+1V1
B02H

RES 10u
2S6A

2S5A
100n
1
5S81
+2V5

2
30R

RES 10u
2S6B

2S5B
100n
1
+1V8
IS3S 5S82

2S68
2S26

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67

100n
100u

100n
100n

100n

100n

100n

100n

100n

100n
+3V3
30R

RES 10u
2S5D
2S5C

100n
SENSE+1V1 c001
5S93
7S00-10

G6

G7
R6
R7
U7

C6
D6
A5
A6
B5
B6

E6
F6

F7
L6
L7
PNX85500 30R +2V5

2S6E 2

220u 6.3V
VDD_1V8

2S4M
2S6D

100n
100n
+1V1 AF1 V20

7
AE2 HDMI_VDDA_1V1 V21

5
6

5
AD3

1
2S5G-1

2S5G-4
2S5G-2

2S5G-3

2S5H-2
2S5H-1

2S5H-3

2S5H-4
2S4Q

2S4R
2S43

2S28

2S27

2S23
100n

100n

100n
100n

100n

100n

100n

100n

100n

100n

100n

100u
AC4 VDD U20

22u

22u

1
AB5 HDMI_VDDA_2V5 U21
H20

4
F11 U22 +2V5-LVDS

2
HDMI_VDDA_3V3_TERM
G11
F13 N6

2S4N

2S4P
100n
G13 VDD_2V5 N7

10u
F15

8
8

5
G15 C7

2S5K-1

2S5K-2

2S5K-3

2S5K-4

2S5J-3

2S5J-1

2S5J-2

2S5J-4
100n

100n

100n

100n

100n

100n

100n

100n

220u 2.5V
F17 C9

2S29
G17 C11
5S85
F19 VDD_2V5_LVDS C14

4
+3V3

2
2

2
1 2S6G 2
G19 C16

3
3

1
30R

2S6N

2S6C

2S6P
2S6F

100n
100n

100n

100n
J9 C18

10u
J11
AA16
AA8
Y11
Y14

J13 W20
Y16
Y9

7S00-12

1
1

1
PNX85500 J15 P20
J17 M20
VSSA
A1 M7 L9 VDD_3V3 K20
+3V3-STANDBY
A10 N2 L11 V7

2S4U
2S4V

100n
A12 N20 L13 Y8

10u
A15 P10 L15
VDD_1V1
A17 P12 L17 Y19
A19 P14 N9 VDD_3V3_SBY Y18
A26 VSS P16 N11 IS3K 5S83
A3 P18 N13 B13
VDDA_1V1_LVDS_PLL +1V1
A8 P4 N15 30R
IS3L

2S4W
2S4Y

100n
B1 P6 N17 AA15

RES 1u0
B20 P7 R9 Y15
VDDA_1V2
C20 T10 R11 AA13
C4 T12 R13 5S95 +2V5
D2 VSS T14 R15 Y12
VSS VDDA_2V5 5S84
D20 T16 R17
30R

6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R

2S4Z
2S51

2S52

2S50
100n

100n
E20 T2 U11

10u
E4 T6 U13 AA7 c000 SENSE+1V2

10u
VDDA_2V5_ADAC
F10 T7 U15
F12 U4 U17 Y17
VDDA_2V5_DCS
F14 V10 J6
F16 V12 AA6 D13
VDDA_2V5_LVDS_BG
F18 V14 Y7
F20 V16 W7 T20 POL

VSSA_1V1_LVDS_PLL

VSSA_2V5_LVDS_BG
VDDA_2V5_USB
F8 V18 F9
G10 V2 G9 Y13
VDDA_2V5_VADC +2V5-AUDIO
G12 Y20

V24 HDMI_AGND
5S94

2S46

100n
J7 Y10

VSSA_USB
VSS +1V1 VDD_1V1_DDR VDDA_2V5_VDAC
30R
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

R21
VDDA_3V3_USB
2S4S

2S5P
RES

2S21
100n
10u

1u0

U24

A13

C13

R20
1

+2V5-AUDIO

2S45

100n
5S87
+2V5
30R

2S55

2S56
100n

1u0
5S88
+2V5-LVDS
30R

2S5M

2S57
100n

10u
5S89
+2V5

2
2
30R

2S6H

2S6K

100n
100n

2S58

10u
1
1
5S90
+2V5
30R

2S4T

2S53
100n

10u
2SHW

100n
IS58 5S92
+3V3

2
30R

2S6M

2S6L

2S59
100n

100n

1u0
4 2010-12-10

1
SPB SSB TV550
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2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 112

Analog video

PNX85500: Analog video


B02I AV1-CVBS 2S87
B02I
22n 2S8A Y-SVHS

3S59
47R
Connectivity 22n

3S5B
47R
AV1-R 2S7J

22n 2S22 C-SVHS

3S4J
56R
22n

3S05

56R
EU: SCART1 CVBS-MON-OUT1
AV1-B 2S7K
AP: -

3S5E

560R
22n

3S4L
56R
IS4V

560R
2S40

3S08
47p
2S7H
AV1-G
22n

3S4K
56R
IS4W

3S09

8K2
2S7M
YPBPR1-SYNCIN1
10n
2S7L
AV3-Y
22n

3S4P
56R
2S7N
AV3-PR
YPBPR1 22n

3S4R
EU:

56R
7S00-1
AP: YPBPR1 PNX85500
2S7P ANALOG_VIDEO
AV3-PB
AB15 AC12
22n CVBS_Y1 ATV_CVBS_Y3

2S19

2S18

2S16

2S15

2S14
3S4T
AC13 IS5C

56R
AF13

22n

22n

22n

22n

22n
R C3
AD13
B AV1
AE13 AD11
G CVBS_Y7
AC11
C7
AV2-CVBS 2S8G AF15
SYNCIN1 BS13
AE15 AF11
22n Y_G1 CVBS1_OUT
AC15 AE11
PR_R_C1 CVBS2_OUT

9S18
AD15
PB_B1
RESREF
AB10
AB14 AA11 IS5E 3S5S
CVBS_Y2 CURREF
AF14 10K
SYNCIN2
AE14 AC16 IS5D
Y_G2 1
AC14 AB16 IS5F
PR_R_C2 2
AD14 AB13 IS5G
PB_B2 3
REF AB12 IS5H
4
AF16 AA12 IS5J
R 5 3S75
AD16 AA10 PNX-IF-AGC
G VGA 6
AE16
B 10K

2S75
2S7R AB18 AD12 BS15

10n
AV4-Y HSYNC_IN IF_AGC
AC18 AB11
22n IN RF_AGC
EU: SCART2 9S19 AF4
OUT
VSYNC
AD24 AE12
SCL VGA_EDID P
AP: YPBPR2 AD25
SDA TUNER N AF12 BS10 IS11
3S76
PNX-RF-AGC
+CVBS 47K

2S76
AGND

10n
AA14
AV4-PR 2S7U

22n
9S20

2S77
PNX-IF-P
10n

2S7E
AV4-PB

319803104790 - RST SM0402 47R PMS Col R at 9S18 for Brazil


22n 2S78
9S21

PNX-IF-N
10n

2S84
R-VGA
22n
3S50
56R

2S85
G-VGA
22n
3S52
56R

2S86
B-VGA
22n
3S54
56R

EU: VGA

7
3S5V-4

3S5V-2
3S5T-4

3S5T-2
AP: VGA

100R

100R

100R

100R
3S5T-1
H-SYNC-VGA 1 8

2
100R

V-SYNC-VGA 3 3S5T-3 6
100R

RES 3S5V-3
VGA-SCL-EDID 3 6
100R
RES 3S5V-1
VGA-SDA-EDID 1 8
100R

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 113

10-6 B03 393912364954


Audio

Audio
B03A B03A

+AVCC
7D03-1 +24V-AUDIO-POWER
3D09 BC847BS(COL) FD14

1
+24V-AUDIO-POWER
4R7

2D06

220n
2
3D16 ID12
ID11

5D07

220R
5D08

220R
22K

10u 35V
GND-AUDIO

2D05
ID27 ID28
FD01 2D28 ID14 2D24
-AUDIO-R

220u 35V

220u 35V
1u0 47n

8
2D20

2D07

2D19

2D08
220n

220n
6

3D02-4

3D14-4

3D14-3

3D14-2

3D14-1

2D22

2D26
220n

220n

RES
4K7

22K

22K

22K

22K
FD08
A-PLOP 7 3D02-2 2 2 7D15-1
BC847BS(COL)

1
4K7
1

GND-AUDIO GND-AUDIO

7D10-1
FD03 2D29 ID15 2D23 TPA3123D2PWP

19
20

10
12
1
3
+AUDIO-L
1u0 47n AVCC L R

1
3
2D10

PVCC ID32

3D02-1
16

4K7
3D02-3 ID19 BSR ID10 5D02 5D05 2D12 RIGHT-SPEAKER
6 3 5 7D15-2 6
BC847BS(COL) ID18
R CLASS-D 15
220n
ID06 ID08

8
4K7 IN R 22u 220R 35V 220u
4 5
L
AUDIO AMP OUT
22
L ID09 5D01 5D04 ID07 2D11
18 LEFT-SPEAKER
0 ID31 2D09
17 GAIN 21 22u ID05 220R
1 BSL 35V 220u
GND-AUDIO 2D16 ID29 220n
11
VCLAMP
2D17 1u0 7
BYPASS
ID30 4
1u0 MUTE
2
AUDIO-MUTE-UP ID37 SD
PGND
FD09 AGND L R
A-STBY GND_HS

8
9

23
24

13

25
14
+3V3-STANDBY EMC
6

8
5

7
3D15

4K7
3D01-3

3D10-4

3D10-3

3D10-2

3D10-1
RES 2D30

2D21

2D27
220n

220n
6

RES
47K

22K

22K

22K

22K
CD10
MAINS SWITCH DETECT
7D11-1 2 EMC 4n7
3

1
4

2
RES 2D31
BC847BS(COL)
ID34 GND-AUDIO
1 3 +3V3-STANDBY
ID35 4n7
3D01-4
7D11-2 5 5 4DETECT2
GND-AUDIO
BC847BS(COL)
47K
4
GND-AUDIO GND-AUDIO

40
39
38
2D03
100p

GND-AUDIO 7D10-2
TPA3123D2PWP
VIA LEFT-SPEAKER
GND-AUDIO 26 37
GND-AUDIO
27 36
VIA

V_NOM
1D50

2D14
28 VIA VIA 35

10n
29 34
GND-AUDIO GND-AUDIO
VIA
1735 1D38
30
31
32
33
FD05
5D03 1 1
FD06
2 2
220R 3 3

2D01
GND-AUDIO FD02

10n
GND-AUDIO 4

2D13
3 7D03-2 2041145-3

10n
BC847BS(COL) 2041145-4
3D06-3 FD07 3D06-2 5
LEFT-SPEAKER
3 6 7 2
100K 100K
4
RIGHT-SPEAKER
8 3D06-1 1
ID33

V_NOM
100K

1D52
GND-AUDIO
2D02
3D06-4
RIGHT-SPEAKER 4 5
100K 10u 4 2010-12-10

GND-AUDIO SPB SSB TV550


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2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 114

DC/DC

DC/DC
B03B B03B

5U03 RES

30R
FU05 5U02 IU22
+12V
30R
7U02-1

2U23
2U24

2U25

2U19

2U20
10u
10u

10u

10u

1u0
SI4952DY
7 8
IU10
2
12V/1V8 CONVERSION

1
3U11

3R3
2U21 FU02 5U00 FU03
+1V8
IU11 220p 3u6

22u
3U23-4

3U23-3

3U23-2

3U23-1

2U15

2U16
47R

47R

47R

47R

47u
7U02-2
SI4952DY

1
5 6
IU09
4 IU23

2U17

1n0
IU15
7U01
SI4778DY

2U18

1n0
3U27 5 6 7 8
IU08 IU12
4
10R 1 2 3
2U00

3U14
10u

3R3
3R3

3U04
2U22
IU06 2U02 IU07
IU05 IU13 220p

3U28

10R
100n
2U01

100n

3R3

7U04
7U03 3U05 SI4778DY
TPS53126PW
5 6 78
IU16
2 23 4
1 1 1 2 3
IU24 11 VBST DRVL 14 IU14
2 2
3 1
12V/1V1 CONVERSION
1 1
ENABLE-1V8 10 EN DRVH 12
2 2
1n0 RES

5U01 FU01
FU06
2U03

+1V1 4 24 +1V1
1 1

STPS2L30A
+1V8 9 VO SW 13

RES 100u 2.0V


2 2 2u0

6U00

2U14
5 22

3U24-4

3U24-3

3U24-2
1 1

3U24-1

3U20

2U13
2U12
RES
8 VFB PGND 15

22u
47R

47R

47R

47R

10R

47u
RES GND-SIG 2 2
7U00 3U02 IU01
BC847BW 21 7
1 1
3 22K 3U03 16 TRIP TEST 17
IU03 2 2
1 IU02
GND-SIG 12K GND-SIG
20 18 FU04 IU17
GND-SIG VIN V5FILT
2 19 IU25
VREG5

2U11

1n0
+3V3-STANDBY 3U00 2U06
+1V1 GND
2U04

2U05
6

10u

1u0

10K 100n
IU18
10K

3U01 GND-SIG

2U09

2U10
1n0

1u0
GND-SIG
3U21 FU00
IU19 SENSE+1V1
100R 1%

3U17

1% 330R

2U29

100n
RES
IU20

100p RES

3U19
2U08

3U18
5K6

1% 1K0
3U08 3U22 FU09 FU08
IU04 CU00
+1V8
330R 1% 1K0 1% IU21
RES 100p

CU01
1K0 1%
3U09

3U10

2U07

CU02
22K

CU03
GND-SIG GND-SIG GND-SIG
CU04
CU05

GND-SIG GND-SIG GND-SIG


GND-SIG

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_022_110210.eps
110211

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 115

DC/DC

DC/DC
B03C +3V3 +3V3-STANDBY
B03C
LED-2

RES 10K

RES 10K
3U74

3U75
+5V +3V3-STANDBY
IU43
9U41

RES 10K
3U68

3U69
10K
IU44 3U41 3U59
IU45 LED2 LED2
optionally 1M99 is a 9 pin connector
* LED-1 9U42
RES
10K RES 10K RES

7U42 RES +3V3


BC847BW
* 7U43
IU47 3U70 LED1 LED1 3U53
BC847BW
10K 10K
1M99
1 GND_AL 3U82 IU64
FU48
2
3 GND_AL 3U56 1K0 RES
FU49 +12V_AL
4 7U48-1
5 GND_AL +3V3 10K 3U83-4 BC857BS(COL)
FU50 4 5 ENABLE-3V3-5V

6
6 FU07
FU54 3U44 3D-LR
7 100K
8 100R IU41

8
+12VIN

3U83-1
9 3U66 100R

100K
FU56 BL-SPI-SDO

2
10

2U71

100n
FU57 RES
11 3U67 100R
FU74 BL-SPI-CSn

1
12
FU68 RES
13 3U84 100R
100p RES

BL-SPI-CLK
RES 100p

100p
RES 100p

1-2041145-3 RES
RES 100p
RES 2U57

RES 2U56

2U48

2U72

2U51

2U52

3U76
1n0

1n0

MAINS-OK
RES 100R +3V3-STANDBY
2U43

3
3U71
STANDBY
7U48-2
100R BC857BS(COL)

5
5
7U40-2

10K 6
3U83-3 3U83-2
2U68 BC847BPN(COL) 3 6 7 2
3U62-4 4
IU48 100K IU40 100K

4
1u0
5
2U47

3
3

3U62-3
3 3U60-3 6 FU73 ENABLE-1V8

10K
10n IU61
1M95

BZX384-C6V2
22K

RES 10K
7

3U61
FU58 +3V3-STANDBY
1 10n

6U40
FU59

10K
2 IU49 3U62-2
FU60
3 2U54 1U40 +12V 6

2
FU61 7U40-1

2
4 +12VIN IU51 FU72

22K
5 FU63 T 3.0A 32V BC847BPN(COL) DETECT2
FU75 2 3U60-2
6 FU66
3U72

1
1K0

+24V-AUDIO-POWER 7U41-2

7
7
2U50

1u0 RES
FU67 3 BC847BS(COL)
10n

8 IU63

5
2U55

9 3U60-1 IU57
ENABLE-3V3n
2U49

3U80
100p
RES

5 8 1

4K7

22K
10 IU62 3U60-4
11 3U73 3U62-1 IU50 22K
IU56 4 IU52

4
12 3U81 +3V3-STANDBY
FU62 +3V3 1
10K 6 8
13 +24V GND-AUDIO 3K3

3U63

RES 10K
10K 7U41-1
14 FU76
BC847BS(COL) 2
3U45
2U58

RES

1-2041145-4 FU51 1
1n0

LAMP-ON
100R
FU52 3U42 BACKLIGHT-PWM_BL-VS
100R
FU53 3U43 BACKLIGHT-BOOST
100R
4U01 IU55 Optional table for 4U00 and 4U01
RES FU55 3U64 POWER-OK Items If 1M99 If 1M99 For non-Amblight sets 2U44 3U43 1M95
4U00 1K0 is not mounted is mounted
Dream Catcher 0R open 13 POLE
RES 4U00 yes no no
100p

1n0

10n

yes no no Core Range 100p 100R 14 POLE


** 4U01
2U53

3U65

100K
1n0

GND_AL
2U44

2U45

2U46

+12VIN +12VD
4 2010-12-10

SPB SSB TV550


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19100_023_110210.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 116

DC/DC

DC/DC
B03D +3V3 B03D
7UC0
LF25ABDT *
+12V 1 3
IN OUT
COM

2UA4

1u0
*

3UA0

2K2

2
FUA0
+2V5-REF
1
7UA0
TS2431

R
2
A

3 FUA4
+2V5

CUA0 +2V5-LVDS
IUB6
+5V5-TUN +5V-TUN

7UA6
BC817-25W

330R
1%
3UB6-2 3U12
+12V 2 7 IUB3

3
3UB6-3
1K0 IUB2
6 6
+1V8
* +3V3 * +3V3
3U15-1 3U16-1
1K0 +5V 1 8 +5V 1 8
3UB6-4
4 5 2 IU26 100R 100R
1K0 7UA3
3UB6-1 3U15-2 3U16-2

2UB0
1 8 IUB5 3 1 7UA7-1 PHD38N02LT 2 7 2 7

1u0
BC847BS(COL)
330R
+2V5-REF 1K0 1%
3UB7-1 3U13 100R 100R
8 1 5
3UB0 IUA5 3U15-3 3U16-3
1 2 3 6 3 6
470R
7UA7-2 4 IUB4
BC847BS(COL) 22R 100R 100R
3U15-4 3U16-4
470R

3UB7-4470R

4 5 4 5
FUA3
2

+1V2 100R 100R


3UB7-3
3UB7-2
2UB8

470R
22u

2UB1

2UB2
RES 1u0

1u0
7

NOT FOR 5000 SERIES


*
ENABLE-1V8
3U25-4
4 5
3UB1 SENSE+1V2
100K RES RESERVED
100K RES
7

IUA6 1K0 5UA0


3U25-3 3U25-2
3 6
30R
2

100K RES 3U29-1 RES


1 8 +12V 7UA5
LDS3985M50
470R
IU29 RES
100K RES

3U29-2
1

2 7 +5V5-TUN 1 5 +5V-TUN
IN OUT

4K7
470R 7UA4
3U25-1 3UB2 3 4
TS431AILT INH BP IUB1
3 6 +3V3 3 3U29-3 6 RES
8

RES RES IU30 5 3 COM


470R A K

2UB7

2UB5

2UB6
100n
7U06-2 5 7U06-1 2

1u0

1u0
3U29-4 RES
BC847BS(COL) BC847BS(COL) 4 5 2 1

2
NC NC
4 1

4K7
470R REF
3UB3
1 3U26-1 8 RES
4

470R
3U26-2 RES
2 7
3UB5 3UB4 IUB0 2UB3
470R +5V
3U26-3 RES 100K 1K0 22n
+3V3 3 6
2UB4
470R
3U26-4 RES 330p
4 5
RES
470R

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_024_110210.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 117

DC/DC

DC/DC
B03E B03E
5UD0 IUD0
+12V
30R +5V5-TUN
7UD0-1

2UD0

2UD1

2UD2
ST1S10PH

10u

10u

10u

6
A

SW
IUD3 5UD1 6UD0 FUD3
ENABLE-3V3-5V IUD7
2 7 +5V
INH VIN SW
3u6 SS36 +1V1

RES 2UE9
5 3

220u 16V
RES 1n0
SYNC VFB

2UD3

2UD4

2UD5

2UD6

RES 2U27

100n
GND

22u

22u

22u
A P HS

9
6

7U05-1 2
IU27
BC847BS(COL)
IUD6 2UD7
RES 1
7UD0-2 4n7

13

15
ST1S10PH

10K
3UD2

3UD0

3UD1
3U06

68K

33K
1%

1%
10 VIA 12
120K

RES
11

14
5UD3 IUD1
+12V
30R
7UD1-1
2UD8

2UD9

2UE0

ST1S10PH
10u

10u

10u

6
A

SW
IUD4 5UD2 FUD2
ENABLE-3V3-5V 2 7 +3V3
INH VIN SW
3u6 +1V1
5 3

220u 16V
SYNC VFB

2UE1

2UE2

2UE3

2UE4

RES 2U28
1% 100K
3UD3

100n
GND

4n7

22u

22u
A P HS

9
3 BC847BS(COL)

7U05-2 5 IU28
RES
IUD2 4
7UD1-2
13

ST1S10PH 15

10K
3U07

3UD4

3UD5

33K
1M0

1%
10 VIA 12

RES
11
14


7UD2
LD1117DT25
6UD1 IUD5
+5V 3 2 +2V5
IN OUT
S1D COM
() FOR 5000 SERIES ONLY

22u 16V
2UE5

2UE6
100n

() NOT FOR 5000 SERIES


7UD3
LD1117DT33

3 2 +3V3
IN OUT
COM
22u 16V
2UE7

2UE8
100n

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_025_110210.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 118

Temperature sensor & AmbiLight

Temperature sensor & AmbiLight


B03F B03F

5UM1 IUM0 1UM0 FUM0


+3V3 V-AMBI
30R T 1.0A 63V

4 2010-12-10

SPB SSB TV550


3139 123 6495
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 119

Fan control

Fan control
B03G B03G

+12V +12V

+3V3

1 3US4-1 8
10K

10K 7
+12V

3US5-2

2US3

100n
10K
3US2 7US1-1
3US7 3
9 LM339P

2
IUS3 3US5-3 IUS6
1K0 14 6 3
FAN-CTRL1 8
10K
7US2
IUT1 12 BC807-25W
+12V IUS7
+3V3

3US9

22R
8
3US5-1
+12V

10K
10K
3US3 3 7US1-2

1
11 LM339P
IUS4 3US5-4
IUT2 13 5 4 BC807-25W
FAN-CTRL2 10 7US3
10K IUS8
12
IUS9

3US6

47R
FAN-DRV

+3V3

+12V

5
IUS5

3US4-4
+12V

10K
6
3US4-3

10K
7US1-3

4
3
5 LM339P
2

3
TACH01 4

12
+12V

RES
9US0
+12V

7
3US4-2

10K
7US1-4

3
7 LM339P
1
2
IUS0
TACH02 6

12
TACHO

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 120

Vdisp switch

Vdisp switch
B03H B03H

1 9UU0-1 8
RES
2 9UU0-2 7
RES
3 9UU0-3 6
RES
4 9UU0-4 5
RES
1 9UU1-1 8
RES
2 9UU1-2 7
RES
3 9UU1-3 6
RES FUU0
4 9UU1-4 5
RES

7UU0
SI4835DDY
RES
7UU1 +VDISP-INT
+12VD SI3441BDV

2UU2

22n
3UU3-1
8 1
4
47K RES
PUMD12 2UU1 IUU3
7UU2-2 3UU1 3UU3-2
5 2 7
47R 1u0 IUU2 47K RES
3 IUU1
IUU0 3UU0-2 7UU3 RES
7 2
BC847BW

1
47K
6

47K
3 IUU4 3UU3-3 IUU5 3UU3-4
3UU0-1 1 6 3 4 5
3UU0-3 +3V3
2 7UU2-1 47K RES

8
+3V3-STANDBY 47K RES
3 6 PUMD12 2
47K

2UU0

RES 100n
1

FUU1
VDISP-SWITCH
3UU2
+3V3
4K7 RES

LCD-PWR-ONn

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 121

10-7 B04 393912364954


Analogue externals A

Analogue externals A
B04A B04A
3E37-4 FE70
AP-SCART-OUT-R IEC0 2EA4 IE67
3EA7-1
5 100R 4 AUDIO-OUT-L
470R 1 8 16V

CDS4C12GTA
1u0
7E01-1 6 FEA0

2E01

RES 6E01

1E00

2E87
100p

12V

1n0
AP-SCART-OUT-L
IEC1
2

1
PUMH7
RES
IE22 3E07-4 FE71
AUDIO-IN1-R IEC2 2EA5 IE68
3EA7-4
4 1K0 5 AUDIO-OUT-R

CDS4C12GTA
470R 4 5 16V
1u0
FEA1

2E06

RES 6E03

1E31

2E88
100p

12V
7E01-2 3

1n0
AP-SCART-OUT-R

4
PUMH7
RES
3E37-1 FE72
AP-SCART-OUT-L
8 100R 1

CDS4C12GTA
3E24

RES 6E07
2E10

1E53

2E90
100p

12V

1n0
A-PLOP
2K2
RES

IE23 3E07-1
AUDIO-IN1-L
1 1K0 8 * EU

CDS4C12GTA
AV2-STATUS

2E04

6E09

1E54

2E91
IE05

100p
AP

12V

1n0
YPBPR1-PB 9E50 9E51 +5V

3E17

4K7
RES
3E74 18R

3EA2
SCART1

1R0
IE53 5E73 3E75
BEC3
AV1-B
1u8 (AV1)

CDS4C12GTA
18R IE90
2E79

2E80

RES 6E23

1E12

2E15
150p

150p

100p
12V
1E01
+3V3

2EB1

3EA1
9E01

3E06
100n
1

1K0

5K6
RES 2
IE89
* EU IE13

3E73
3

4K7
3E31 **

3E18 2
AV1-STATUS IE18
IE61

2EB3
4 4
** 4E06

39K
2E99

1u0
CDS4C12GTA
12K 7E06-2
IE51
3E32

RES 6E22

1E55

2E18

100p
5 5
** 4E05
12V
4K7

4p7 AV2-BLK

1
AP FE73
6 7E06-1
YPBPR1-SYNCIN1 9E52 9E53 6 3 BC847BPN(COL) IE70 5E80
2E81 IE59 CVBS-MON-OUT1
2
3E76 18R FE74
7 IE60 2u2 10u

2
1 3EB1 2

2E98
2E97
1

39p

18p
FE75

3E19
8 BC847BPN(COL)

18K
IE54 5E74 3E77 820R

2
AV1-G FE80

3EB3

330R
9
** 4E04
CDS4C12GTA

1u8 18R

1
2E83

2E84
150p

150p

IE08 RES
RES 6E26

1E18

2E14

100p
RES 9E08 10
12V

1
11
RES IE14
RES 9E07 12
AP
9E54 9E55 9E10 13 4E03
YPBPR1-PR **
IE16 RES
RES 9E05 14 +5V
3E78 18R
IE55 5E76 3E79BEC5 FE81
AV1-R 15
CDS4C12GTA

1u8 18R FE82


2E85

2E86

2E74
150p

150p

100n
16
RES 6E28

1E19

2E12

100p
12V

9E09 17 4E02
**
IE17 RES IE96 IE91
3EB6-1
RES 9E06 18 1 8
RES
FE83 470R
19 IE92
7E05 3E45
FE84 BC847BW CVBS-OUT-SC1
+3V3 20
* EU 68R

5
470R
21 ** 4E01
3EB6-4
3E44

2E24

100n
4K7

RES
FE85

4
MTJ-505H-01 NI LF RES
3E48 3E37-2
IE48 GND_A
AV1-BLK 6 68R 2 100R 7
3E37-3
7E09-1 2
PUMH7 3 6
CDS4C12GTA

100R
1
3E07-2
6E29

RES 2E75
3E43

1E22

100p
75R

12V

* 2 1K0 7
RES

3E07-3
3 1K0 6
IE52 3E62 3EA7-2 3EB6-2
AV1-CVBS 2 7
2 470R 7
CDS4C12GTA

27R 470R
3EA7-3 3EB6-3
RES 6E32

1E25

2E44

100p

3 6
12V

3 470R 6 470R
*
1X06 1X02
EMC HOLE REF EMC HOLE
CVBS-OUT-SC1
CDS4C12GTA
RES 6E30

1E23

RES 2E76

100p
12V

GND_A
4 2010-12-10

* 3139803190010 - RSI SM 0402 JUMP 0R05 Col at 2E44 & 2E75 for Brazil SPB SSB TV550
3139 123 6495
** Provision for ESD 2K11 4DDR EU

19100_029_110210.eps
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2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 122

Analogue externals B

Analogue externals B
B04B SPDIF out
B04B
YPBPR
1E07
FE54 EU IE71 3E87 IE72
MSP-305H-BBB-732-03 NI 9E29 AV3-Y IE15 MTJ-032-68B-46-NI-FE
5E06 FE59
1E08-3 2 18R SPDIF-OUT 1

CDS4C12GTA
YPBPR1-SYNCIN1

CDS4C12GTA
30R 2

2E27

1E43

RES 6E40
100p
1

12V
GREEN

2E22

RES 6E46
1E44
AP

12V
10p
4E20 9E04 3E88 IE73
AV2-CVBS FE41
27R

GND_A
MTJ-032-21B-45 NI FE (PBT) FE51 EU IE74 3E89 IE75
9E57 AV3-PB
2

CDS4C12GTA
1E03 18R
YPBPR1-PB
4E21

2E67

RES 6E51
100p

1E28
1

12V
GND_A
FE48 EU 9E58 IE76 3E90 IE77
MTJ-032-21B-42 NI FE AV3-PR
2
1E04 18R

CDS4C12GTA
YPBPR1-PR
2E68

RES 6E52
100p

1E39
1

12V
4E22
RES FE42

GND_A

YPBPR AUDIO
+3V3

MSP-305H-BBB-732-03 NI 3E97 RES


AUDIO-IN3-R
6 1E32
CDS4C12GTA

1E08-1 FE50 1K0 IE31


AV3-Y 9E15 RES 1
1E29

RES 6E06
2E39

2E72
5
100p
AV1-CVBS 9E16 RES 2
12V
1n0

4E23 RED 3
RES FE43 4
AV3-PR 9E19 RES 5
RXD1-MIPS 9E12 RES 6
GND_A FE49 IE29 7
MSP-305H-BBB-732-03 NI 3E96
AUDIO-IN3-L 8
4 9E17 RES 9
1E08-2 AV3-PB
CDS4C12GTA

1K0
TXD1-MIPS 9E14 RES 10
1E42
2E40

2E71

3
100p
RES 6E38

11
12V
1n0

RES
4E24 WHITE 12
AUDIO-IN3-R 9E11 RES 13
AV1-B 9E18 RES 14
GND_A 15
16
AUDIO-IN3-L 9E13 RES 17
AV1-G 9E20 RES 18
19
VGA ( OR DVI ) AUDIO 20
CVBS-OUT-SC1 9E21 RES 21
AV1-R 9E22 RES 22
1E09 23
MSJ-035-29D PPO IE09 24
FE02 3E21
2 AUDIO-IN4-L AP-SCART-OUT-R 9E23 RES 25
3 AV1-STATUS 9E24 RES 26
CDS4C12GTA

1K0
1 AUDIO-IN1-R 9E25 RES 27
V_NOM

RES 6E19
2E36

1E37

2E35

100p

AV1-BLK 9E26 RES 28


12V
1n0

AP-SCART-OUT-L 9E27 RES 29


AUDIO-IN1-L 9E28 RES 30
32 31

DF50-30DP
FE01

FE03 3E20 IE10


AUDIO-IN4-R
CDS4C12GTA

1K0
V_NOM
1E38

2E38
2E37

RES 6E20

100p
12V
1n0

RES 3E54 100R IE36 RES 3E38 100R RXD2-MIPS


RES 3E55 100R 3D-VS
RES 3E56 100R IE35 RES 3E41 100R TXD2-MIPS
RES RES 3E57 100R RES 3E36 100R 3D-LR
1ECB RES 3E58 +5V
IE34
1481-702-06S-51
+T 0R3
FE53
6
9 5 FE52
4 FE47
8 FE44
3
7 2
100n

BZX384-C5V1

BZX384-C5V1

BZX384-C5V1

BZX384-C5V1

FE46
100p

100p
100p

1
100p

FE45
1E76

1E77

1E78

RES 6E15

RES 6E16

RES 6E17

RES 6E18
1E79
1E75

RES 2E26
RES 2E23

RES 2E25
RES 2E21
RES 2E20

242202606017 - SOC CINCH V 3P 1L3 YEWHRDY at 1E08 for BRZ


FOR 3D Provision for ESD
4 2010-12-10

SPB SSB TV550


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2K11 4DDR EU

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 123

Ethernet & Service

Ethernet & Service


B04C B04C
5E08 IE07 IE49 3E53-1 FE56
3E53-2 8 1
+3V3 +3V3-ET-ANA TXD1-MIPS 7 2
30R 47R 47R 1E06
IE50 2 UART
3E53-4 3E53-3 FE57

2E62

2E63

2E66
100n

100n
RXD1-MIPS 5 4 3 6 3
1 SERVICE

10u

BZX384-C5V1
+3V3-ET-ANA +3V3 47R 47R
CONNECTOR

BZX384-C5V1
6E43

6E44

1E85

1E86
MSJ-035-29D PPO (PHT)
FE58
IE32 IE38 IE06
RES
3E30 IE33
1E71

2E52

2E53

2E48
100n

100n

2E49

10u
4n7
1M0 1
1E70 TXD1-MIPS
+3V3 2
NX3225GA RXD1-MIPS
3
5 4
25M 502382-0370
3E66 RES

3E67 RES

2E54
10p

10p
7E10-1

27

12
LAN8710A-EZK

1
2E55
3E33

CR 1A 2A IO
10K

10K

10K

VDD
CLKIN provision for BUH
5
1
4 XTAL 31 ETH-RXP
2 P
RX 30 ETH-RXN
IE26 N
RESET-ETHERNETn 19
RST
29 ETH-TXP
P
ETH-RXD(0) 11 TX 28 ETH-TXN
0 N
ETH-RXD(1) 10 MODE
1
ETH-RXD(2) 9 20 ETH-TXCLK
RMIISEL TXCLK
ETH-RXD(3) 8
PHYAD2
3E69 10K 26 ETH-RXDV
RXD<0:3> RXDV
3E70 RES
IE63
ETH-COL RES 10K 15 13 ETH-RXER
COL RXER
9E43 3E71 10K 3E64 10K
CRS_DV RXD4 +3V3
RES IE64
MODE2 0 RES
PHYAD 7 ETH-RXCLK
1 3E65 10K
ETH-TXEN 21 +3V3
TXEN RXCLK
RES
ETH-TXD(0) 22 3 ETH-REGOFF
0 REGOFF
ETH-TXD(1) 23 10K 3E34 3E68 10K
1 1 +3V3
ETH-TXD(2) 24 LED 2 RES ETH-INTSEL
2 TXD 2
ETH-TXD(3) 25 10K 3E72 3E35 10K +3V3
3 INTSEL
ETH-TXER 18 RES
4
14 9E42 ETH-CRS
INT CRS
TXER
32
RBIAS
ETH-MDC 17 IE39

1%
MDC

3E40

12K1
ETH-MDIO 16
MDIO
3E51 1K5 +3V3 VSS
33

7E10-2
LAN8710A-EZK
34 VIA 36
35 37

+3V3-ET-ANA +3V3-ET-ANA

CONFIGURATION RESISTOR SETTINGS

Resistor POP EMPTY


1%

1%

1%
1%
49R9

49R9

49R9
49R9
3E22

3E25

3E99

3E26
3E95

3E98
22R

22R
3E64 PHYADD(0) = 1 PHYADD(0) = 0

ETHERNET CONNECTOR 3E65 PHYADD(1) = 1 PHYADD(1) = 0


1E87 1N00
ETH-TXP FE27 3 ACM2012 2 3E66 PHYADD(2) = 1 PHYADD(2) = 0
1
FE60
4 1 2
ETH-TXN FE28
FE30
3 3E67 RMII mode selected MII mode selected
1E88 4
3 ACM2012 2 5
ETH-RXP FE29 FE61
6 3E68 Internal 1.2V reg. disabled Internal 1.2V reg. enabled
4 1 7
ETH-RXN FE31
8
9 11
CDA5C16GTH

CDA5C16GTH
CDA5C16GTH

CDA5C16GTH

3E69 MODE(0) = 0 MODE(0) = 1


8

10 12
6E47-1

6E47-2

6E47-3

6E47-4
5E01

5E03

5E04

2E60
5E02

RES

RES
RES

RES
16V

16V

16V

16V
RES 27n

RES 27n

RES 27n

22n
RES 27n

FE34 5450-323-183-H3
3E70 MODE(1) = 0 MODE(1) = 1
1

3E71 MODE(2) = 0 MODE(2) = 1


2E05

2E09
2E07

2E08
RES 15p

RES 15p
RES 15p

RES 15p

3E72 INTERRUPT FUNCTION INTERRUPT FUNCTION


2E59
2E56

2E57

2E58

15p
15p

15p

15p

DISABLED ON ENABLED ON
0 ohm

0 ohm

0 ohm

0 ohm
3E27

3E28

3E29

3E39

RES
RES

RES

nINT/TXER/TXD4 SIGNAL
RES

nINT/TXER/TXD4 SIGNAL
RES
RES

RES

RES

FE32

ETH-INTSEL

ETH-REGOFF
FE33
4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 124

HDMI

HDMI
B04D B04D
5EC0 FEC0 FEC3 MICOM-VCC33

30R
HDMI CONNECTOR 3 +3V3
I2C Address

2ECV
2EC0

2EC2
RES 2EC1

100n

10K
10u

1u0
220u 16V
1P04 3ECH

1 ARX2+
2
3 ARX2-
FECB SII9187B = 0xB2
4 ARX1+
5 RES
ARX1- AIN-5V FEC7 5EC3 +3V3
6
7 ARX0+ +3V3-HDMI
8 30R

RES 2ECW
2EC6

2EC7

2EC8

2EC3
100n

100n

100n

100n
10u
9 ARX0-
10 ARXC+

6
3EC1-3
11
ARXC-

47K
12
13 PCEC-HDMI
7EC1

3
14

27
64

37

38
FEC1 SII9187B

9
15 ARX-DDC-SCL ARX-DDC-SCL

MICOM_VCC33

SBVCC33
FEC2 ARX-DDC-SDA ARX-DDC-SDA VCC33
16
17 ARX-HOTPLUG +5V-EDID
FEC4

1
1 8 31
AIN-5V

3EC1-1
18 3ECM-4 IE42 (CBUS) HPD0

6
19 FEC5 ARX-HOTPLUG 4 5 3ECN-1 100K 32

47K

3ECP-1

3ECP-3
AIN-5V R0PWR5V
FEC6 21

10K

10K
20 10R
23 22 ARX-DDC-SDA 1u0 2ECM 29

8
DSDA0
ARX-DDC-SCL 30 49

3
DSCL0 R4PWR5V

ARXC- 65 48
N DSCL4 VGA-SCL-EDID-HDMI
ARXC+ 66 R0XC 47 VGA-SDA-EDID-HDMI
AIN-5V P DSDA4
HDMI CONNECTOR 2
1P03 ARX0- 67 51 9EC2 CEC-HDMI
N CEC_D
BRX2+ ARX0+ 68 R0X0 RES
1 P
2
BRX2- ARX1- 69
3 N
BRX1+ ARX1+ 70 R0X1
4 P
5
BRX1- ARX2- 71
6 BIN-5V N
BRX0+ ARX2+ 72 R0X2
7 P
BRX-HOTPLUG 57 HDMIA-RX2-
8 N
BRX0- 2 7 35 TX2 56 HDMIA-RX2+
9 3ECM-3 IE43 (CBUS) HPD1 P
BRXC+ 3 6 3ECN-2 100K 36
10 BIN-5V R1PWR5V
2

59 HDMIA-RX1-
3ECA-2

11 10R N
BRXC- BRX-DDC-SDA 1u0 2ECN 33 TX1 58 HDMIA-RX1+
12 DSDA1 P
47K

PCEC-HDMI BRX-DDC-SCL 34
13 DSCL1
61 HDMIA-RX0-
7

14 N
FECC BRX-DDC-SCL BRX-DDC-SCL BRXC- 1 TX0 60 HDMIA-RX0+
15 N P
FECD BRX-DDC-SDA BRX-DDC-SDA BRXC+ 2 R1XC
16 P
63 HDMIA-RXC-
17 N
8

FECE BRX0- 3 TXC 62 HDMIA-RXC+


3ECA-1

18 BIN-5V N P
19 FECF BRX-HOTPLUG BRX0+ 4 R1X0
P
47K

FECG 21 3ECJ RES RES


20 MICOM-VCC33
3ECK
23 22 BRX1- 5 55 4K7
1

N TPWR_CI2CA
BRX1+ 6 R1X1 IE12
P 4K7
FECR
BRX2- 7 50 9EC3 PCEC-HDMI
N CEC_A
BRX2+ 8 R1X2 RES
BIN-5V P
CRX-HOTPLUG FECY 3ECL RES
3 6 41 52 +3V3
3ECM-2 IE44 (CBUS) HPD2 INT
HDMI CONNECTOR 1 CIN-5V
2 7 3ECN-3 100K 42
R2PWR5V 4K7
1P02
10R
CRX2+ CRX-DDC-SDA 1u0 2ECP 39
1 DSDA2
CRX-DDC-SCL 40
2 DSCL2
3 CRX2-
CRX1+ CRXC- 11
4 N
CRXC+ 12 R2XC 54 SCL-SSB
5 P CSCL
CRX1- 53 3EC3 100R SDA-SSB
6 CIN-5V CSDA
CRX0+ CRX0- 13 3EC5 100R
7 N
CRX0+ 14 R2X0
8 P
CRX0- 10
9

RES 2ECX

RES 2ECY
15 RSVDL 28

10p

10p
10 CRXC+ CRX1- N
4

CRX1+ 16 R2X1
3ECA-4

11 P
12 CRXC-
47K

FECJ PCEC-HDMI CRX2- 17


13 N
FECA ARC-eHDMI+ CRX2+ 18 R2X2
5

14 P
FECK CRX-DDC-SCL CRX-DDC-SCL DRX-HOTPLUG
15
FECL CRX-DDC-SDA CRX-DDC-SDA 4 5 45
16 3ECM-1 IE45 (CBUS) HPD3
1 8 3ECN-4 100K 46 74
17 DIN-5V R3PWR5V
6

FECM CIN-5V 75
3ECA-3

18 10R
FECN CRX-HOTPLUG DRX-DDC-SDA 1u0 2ECQ 43 76
19 DSDA3
47K

21 20 DRX-DDC-SCL 44 77
FECP DSCL3
23 22 78
3

3E23 +3V3-STANDBY 5EC2


eHDMI+ DRXC- 19 79
N
DRXC+ 20 R3XC 80
RES 22K 30R P
7E02 81
RES
BC847BW ARC-eHDMI+ DRX0- 21 VIA 82
CIN-5V N
DRX0+ 22 R3X0 83
P
84
2ECC

23 85
10p

DRX1- N
7EC0 DRX1+ 24 R3X1 86
P
BC847BW IEC6 87
3ECD
PCEC-HDMI 9EC0 CEC-HDMI DRX2- 25
N
88 7EC1 3ECN 3ECF
IEC4 DRX2+ 26 R3X2 89
100R IEC5 P

NON-INSTAPORT 9187A 4 3K3 3K3


EPAD

73
IEC7 NON-INSTAPORT 9187B 4 100K 100K
FECW
INSTAPORT 9287B 4 100K 100K
22K

3ECE +3V3-STANDBY

6EC1
+5V +5V-VGA

BAT54

IE11

IE65 3ECU-2 +3V3


2 7
4R7

DDCA-SDA
3ECG
10K
IE66 4 3ECU-4 5
3ECF 2ECU DDCA-SCL
FECZ
10K
100K 1u0

4 2010-12-10
+5V-EDID
SPB SSB TV550
3139 123 6495
2K11 4DDR EU

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 125

Headphone

Headphone
B04E B04E

+3V3-STANDBY

4
PUMD12
5 7EE0-2
A-PLOP
3

6 A-STBY
FEE0
RESET-AUDIO 2 7EE0-1
PUMD12
1

2EE0

47p
3EE1-1
1 8

6
3EE1-2
22K

3EE1-3
22K

22K
3EE1-4
4 5

3
22K
2EE5

47p +3V3

2EE1

100n
7EE1
TPA6111A2DGN
3EE2-3
3 6

8
IEE0 IEE3
VDD
2EE6
33R
FE36
ADAC(3)
2EE3 IEE1
8
3EE0-1
1 2 AMPLIFIER 1
IEE7
4
3EE2-4
5 AMP1
1 1
IEE2 1u0 2EE4 10K 3EE0-4 IN- 4V 100u 33R
ADAC(4) 5 4 6
2 VO
1u0 10K IEE4 2EE7 IEE8 3EE2-2 FE35
5 7 2 7 AMP2
SHUTDOWN 2
2EE2 IEE6 4V 100u 33R
3 10
BYPASS 3EE2-1
VIA 11 1 8
1u0
GND GND_HS
33R
4

A-PLOP 3 3EE0-3 6
IEE5
10K
RES 3EE3

22K

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

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10-8 B05 393912364954


DDR

DDR +1V8 DDR2-VREF-DDR +1V8 DDR2-VREF-DDR

B05A B05A

2B08
100n
100p
2B36
2B40

2B06
2B00

2B01

2B02

2B03

2B04

2B05

2B07
100n
100n

100n

100n

100n

100n

100n

100n
47u

2B37
2B17

100p
100n
2B41

2B15
2B09

2B10

2B11

2B12

2B13

2B14

2B16
100n
100n

100n

100n

100n

100n

100n

100n
47u
7B02

H9

C1
C3
C7
C9
A1
E9

E1

A9

E2
L1
EDE1108AGBG-1J-F 7B03

H9

C1
C3
C7
C9
A1
E9

E1

A9

E2
L1
VDDL VREF EDE1108AGBG-1J-F
VDD VDDQ
DDR2-A0 H8 VDDL VREF

VDD VDDQ
AT T-POINT DDR2-A1 H3
0
DDR2-A0 H8
3B22
DDR2-A2 H7
1
2 SDRAM 0
C8 2
3B00-2
7 DDR2-D16 DDR2-A1 H3
0
1 3B04-2
J2 C2 3 6 3B02-3 33R H7 C8 2 7
DDR2-CLK_P DDR2-A3 3 1 DDR2-D17 DDR2-A2 2 SDRAM 0 DDR2-D24
240R DDR2-A4 J8 D7 33R 3 6 3B00-3 DDR2-D18 DDR2-A3 J2 C2
3B05-3 3 6 33R DDR2-D25
4 2 3 1
DDR2-CLK_N DDR2-A5 J3 D3 1 8 3B02-1 33R DDR2-D19 DDR2-A4 J8 D7
3B04-3 3 6 33R DDR2-D26
5 3 4 2
DDR2-A6 J7 DQ D1 33R 2
3B02-2 7 DDR2-D20 DDR2-A5 J3 D3 33R 33R 2 7 3B05-2 DDR2-D27
3B27 6 A 4 5 3
DDR2-CLK_P DDR2-A7 K2 D9 3B00-4 4 5 33R DDR2-D21 DDR2-A6 J7 DQ D1 1 8 3B05-1 DDR2-D28
7 5 6 A 4
DDR2-A8 K8 B1 3B02-4
33R 4 5 DDR2-D22 DDR2-A7 K2 D93B04-4 4 5 33R DDR2-D29
240R 8 6 7 5
DDR2-CLK_N DDR2-A9 K3 B9 3B00-1 1 8 33R DDR2-D23 DDR2-A8 K8 B1 33R 4 5 3B05-4 DDR2-D30
9 7 8 6
DDR2-A10 H2 33R DDR2-A9 K3 B93B04-1 1 8 33R DDR2-D31
3B28 10 9 7
DDR2-CLK_P DDR2-A11 K7 DDR2-A10 H2 33R
11 10
DDR2-A12 L2 B7 3B12 DDR2-DQS2_P DDR2-A11 K7
240R 12 11
DDR2-CLK_N DDR2-A13 L8 DQS A8 3B13 33R DDR2-DQS2_N DDR2-A12 L2 B7 3B14 DDR2-DQS3_P
13 12
2B44 DDR2-A13 L8 DQS A8 3B15 33R DDR2-DQS3_N
33R 13
DDR2-BA0 G2 RES 2p2 2B45 RES
0 33R
DDR2-BA1 G3 A2 DDR2-BA0 G2 2p2
1 BA NU|RDQS 0
DDR2-BA2 G1 DDR2-BA1 G3 A2
2 1 BA NU|RDQS
DDR2-ODT DDR2-BA2 G1
2
3B01 RES F9 DDR2-ODT
ODT
DDR2-CLK_P 240R E8 3B03 RES F9
ODT
DDR2-CLK_N F8 CK DDR2-CLK_P 240R E8
DDR2-CKE F2 DDR2-CLK_N F8 CK
CKE
DDR2-CS G8 DDR2-CKE F2
CS CKE
DDR2-RAS F7 L3 DDR2-A14 DDR2-CS G8
RAS CS
DDR2-CAS G7 NC L7 DDR2-RAS F7 L3 DDR2-A14
CAS RAS
DDR2-WE F3 DDR2-CAS G7 NC L7
WE CAS
DDR2-DQM2 3B23 B3 DDR2-WE F3
DM|RDQS WE
DDR2-DQM3 3B24 B3
33R VSS VSSQ DM|RDQS
VSSDL 33R VSS VSSQ

J1
K9

E7

A7
B2
B8
D2
D8
A3
E3
VSSDL

D2
D8
A3
E3
J1
K9

E7

A7
B2
B8
+1V8
+1V8
DDR2-VREF-DDR

DDR2-VREF-DDR

2B26

2B38
100n

100p
2B18

2B19

2B20

2B21

2B22

2B23

2B24

2B25
2B42

100n

100n

100n

100n

100n

100n

100n

100n

2B39
47u

2B35

100p
100n
2B27

2B28

2B29

2B30

2B31

2B32

2B33

2B34
2B43

100n

100n

100n

100n

100n

100n

100n

100n
47u
7B00
H9

C1
C3
C7
C9
A1
E9

E1

A9

E2
L1

EDE1108AGBG-1J-F 7B01

H9

C1
C3
C7
C9
A1
E9

E1

A9

E2
L1
VDDL VREF EDE1108AGBG-1J-F
VDD VDDQ
DDR2-A0 H8 VDDL VREF

0 VDD VDDQ
DDR2-A1 H3 DDR2-A0 H8
DDR2-A2 H7
J2
1
2 SDRAM 0
C8
C23B08-4 4 5
2
3B07-2
7
33R
DDR2-D0 DDR2-A1 H3
H7
0
1 C8 2 3B10-2 7
DDR2-A3 3 1
33R
DDR2-D1 DDR2-A2 2 SDRAM 0 DDR2-D8
DDR2-A4 J8 D7 3 6 3B07-3 DDR2-D3 DDR2-A3 J2 C2
3B11-3 3 6 33R DDR2-D14
4 2 3 1
DDR2-A5 J3 D3 3B08-2 2 7 33R DDR2-D2 DDR2-A4 J8 3B10-3 33R 3
D7 6 33R DDR2-D10
5 3 4 2
DDR2-A6 J7 DQ D1 33R 1 8 3B08-1 DDR2-D4 DDR2-A5 J3 D3 2 7 3B11-2 DDR2-D11
6 A 4 33R 5 3
DDR2-A7 K2 D9 3B07-4 4 5 DDR2-D5 DDR2-A6 J7 DQ D1 1 8 33R DDR2-D12
7 5 6 A 4
DDR2-A8 K8 B1 33R 3 6 3B08-3 DDR2-D6 DDR2-A7 K2 D93B10-4 4 5 3B11-1 33R DDR2-D13
8 6 7 5
DDR2-A9 K3 B9 3B07-1 1 8 33R DDR2-D7 DDR2-A8 K8 B1 33R 4 5 3B11-4 DDR2-D9
9 7 8 6
DDR2-A10 H2 33R DDR2-A9 K3 B9 3B10-1 1 8 33R DDR2-D15
10 9 7
DDR2-A11 K7 DDR2-A10 H2 33R
11 10
DDR2-A12 L2 B7 3B16 DDR2-DQS0_P DDR2-A11 K7
12 11
DDR2-A13 L8 DQS A8 3B17 33R DDR2-DQS0_N DDR2-A12 L2 B7 3B18 DDR2-DQS1_P
13 12
2B46 RES DDR2-A13 L8 DQS A8 3B19 33R DDR2-DQS1_N
+1V8 33R 13
DDR2-BA0 G2 2p2 2B47 RES 33R
0
DDR2-BA1 G3 A2 DDR2-BA0 G2 2p2
1 BA NU|RDQS 0
DDR2-BA2 G1 DDR2-BA1 G3 A2
2 1 BA NU|RDQS
DDR2-ODT DDR2-BA2 G1
2
3B06 RES F9 DDR2-ODT
ODT
180R 1%

DDR2-CLK_P 240R E8 3B09 RES F9


ODT
3B20

DDR2-CLK_N F8 CK DDR2-CLK_P 240R E8


DDR2-CKE F2 DDR2-CLK_N F8 CK
CKE
DDR2-CS G8 DDR2-CKE F2
CS CKE
DDR2-RAS F7 L3 DDR2-A14 DDR2-CS G8
FB00 RAS CS
DDR2-CAS G7 NC L7 DDR2-RAS F7 L3 DDR2-A14
DDR2-VREF-DDR CAS RAS
DDR2-WE F3 DDR2-CAS G7 NC L7
WE CAS
DDR2-DQM0 3B25 B3 DDR2-WE F3
180R 1%

DM|RDQS WE
DDR2-DQM1 3B26 B3
33R VSS VSSQ DM|RDQS
3B21

VSSDL
33R VSS VSSQ
K9

E7
A3
E3
J1

A7
B2
B8
D2
D8

VSSDL

A3
E3
J1
K9

E7

A7
B2
B8
D2
D8
4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 127

10-9 B06 393912364954


Display interfacing-Vdisp

Display interfacing-Vdisp
B06A B06A

1G03

T 3.0A 32V

5G01 1G00 FG0H


+VDISP-INT +VDISP
30R T 3.0A 32V

2G43

100n
RES RES
5G02

30R
RES

2G44

RES
22u
RES RES
3G28 IG11
6G00
2K2 LTST-C190KGKT
For Development use only

4 2010-12-10

SPB SSB TV550


3139 123 6495
2K11 4DDR EU

19100_035_110210.eps
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 128

Video out - LVDS

Video out - LVDS


B06B B06B
+3V3

+VDISP

10K

10K

10K
RES

47p
FI-RE51S-HF

47p

47p

47p

47p

47p

47p

47p

47p

47p
5
6
7
8

RES 3G33

RES 3G34

RES 3G35
9G0K-4
9G0K-3
9G0K-2
9G0K-1
60 61
58 59

2G77

2G7A
2G75

2G76

2G78

2G79

2G24

2G25

2G26

2G27
56 57

4
3
2
1
54 55
CTRL-DISP RES 3G32 100R FG34 52 53
2G92 100n SDA-DISP 3G2W 51
FI-RE41S-HF 100R FG2H
50
50 51 SCL-DISP 3G2Y 100R FG2G
2G93 100n 49
48 49
48
46 47 CTRL-DISP RES 3G38 100R FG35
2G94 100n FG2J 47
44 45 BACKLIGHT-BOOST RES 3G37 100R FG2R
46
42 43 3D-LR RES 3G2Z 100R FG2K
2G95 100n 45
FG30 3D-VS-DISP RES 3G36 100R
41 44
FG31 CTRL-DISP FG04 RES 3G30 100R FG2L
40 43
FG32 CTRL-DISP RES 3G31 100R FG2M
39 42
FG33 38 41
2G96 47p PX1A- FG2E
2G99 47p 37 40
PX1A+ FG2F
2G97 47p 36 39
PX1B- FG1Y
2G98 47p 35 38
34 PX1B+ FG1Z 37
PX1C- FG20
FG1C 33 36
PX3A- 32 PX1C+ FG21 35
PX3A+ FG1D
FG1E 31 34
PX3B- PX1CLK- FG22
30 33
PX3B+ FG1F PX1CLK+ FG23
29 32
PX3C- FG1G
28 31
PX3C+ FG1H PX1D- FG24
27 30
PX1D+ FG25
FG11 26 29
PX3CLK- PX1E- FG26
25 28
PX3CLK+ FG1J PX1E+ FG27
24 2G28 47p 27
23 2G29 47p 26
PX3D- FG1K
22 25
PX3D+ FG1L PX2A- FG28
21 24
PX3E- FG1M PX2A+ FG29
20 23
PX3E+ FG1N PX2B- FG2A
19 22
PX2B+ FG2B
18 21
PX2C- FG2C
17 20
PX4A- FG12 PX2C+ FG2D
16 19
PX4A+ FG13 15 18
PX4B- FG14 PX2CLK- FG1R
14 17
PX4B+ FG15 13 PX2CLK+ FG1S 16
PX4C- FG16 12 15
PX4C+ FG17 PX2D- FG1T
11 14
PX2D+ FG1U
FG18 10 13
PX4CLK- PX2E- FG1W
9 12
PX4CLK+ FG19 PX2E+ FG1V
8 11
7 10
PX4D- FG1A
6 FG2P 9
PX4D+ FG1B
5 8
PX4E- FG1Q
4 7

2G91

100n
PX4E+ FG1P
3 6
RES 9G0G FG2N
2 5
1 +VDISP 4
3
1G50
2
1

RES 2G9C

RES 2G9D
RES 2G9E
RES 2G9F

EMC 100n

EMC 100n

EMC 100n

100n
TO DISPLAY 1G51

EMC
TO DISPLAY

1X05
REF EMC HOLE

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 129

AmbiLight CPLD

AmbiLight CPLD
B06C B06C

5GA0 FGA0
+3V3 VINT
30R

2GA2
2GA0

2GA1

100n
100n
1u0
DEBUG ONLY

5GA1 FGA1
+3V3 VIO
+3V3
30R
2GA3

2GA5

100n
1u0

RES
1G37

3GA4

RES
10K
+3V3 1
2
GCK3 3GA5-4 4 5 3
GTS1 3GA5-3 3 6 100R 4
GTS2 3GA5-2 2 7 100R 5
GSR 3GA5-1 1 8 100R 6

2GA6

RES
100R

10p
VINT VIO SD51022

7GA0

15
35

26
XC9572XL-10VQG44C0100
VCCINT
VCCIO AMBI-SPI-CLK-OUT-R IGA1
PXCLK54 43 AMBI-SPI-SDI-OUT_G1-R CPLED2
IXO1_43|GCK1
GCK2 44 AMBI-SPI-SDO-OUT-R
IXO1_44|GCK2
GCK3 1 IGA2
IXO1_1|GCK3
CPLED3
2 5 PNX-SPI-CSBn
IXO1_2 IXO3_5
PNX-SPI-CS-BLn 3 6 9GA1 RES BACKLIGHT-PWM IGA3
IXO1_3 IXO3_6
PNX-SPI-SDO 39 7 3D-LR GCK2
IXO1_39 IXO3_7
PNX-SPI-SDI 3GA3 33R 40 8 3D-VS-DISP +3V3
IXO1_40 IXO3_8
PNX-SPI-CLK 41 IXO3_12 12 BL-SPI-SDO
IXO1_41
42 13 BL-SPI-SDI 3
IXO1_42 IXO3_13
14 BL-SPI-CSn
IXO3_14
GTS1 36 16 3GA1 RES BACKLIGHT-PWM_BL-VS GCK3 5 7GA1-2
IXO2_36|GTS1 IXO3_16
GTS2 34 18 47R BL-SPI-CLK BC847BS(COL)
IXO2_34|GTS2 IXO3_18
GSR 33 4
IXO2_33|GSR
AMBI-SPI-CS-OUTn_R2-R 19 4 5 AMBI-PROG_B1 +3V3
IXO4_19
AMBI-PWM-CLK_B2 29 20 3G10-4 33R 3 6 AMBI-BLANK_R1
IXO2_29 IXO4_20
AMBI-SPI-CS-OUTn_R2 8 1 3G14 33R 30 21 2 7 3G10-3 33R AMBI-SPI-CS-EXTLAMPSn 6
IXO2_30 IXO4_21
AMBI-LATCH1_G2 3G11-1 33R 7 2 31 22 3G10-2 33R AMBI-SPI-CLK-OUT
IXO2_31 IXO4_22
AMBI-TEMP 3G11-2 33R 32 23 3G13 33R AMBI-SPI-SDI-OUT_G1 GTS1 2 7GA1-1
IXO2_32 IXO4_23 BC847BS(COL)
CPLED3 37 27 3G12 10R 1 8 AMBI-SPI-SDO-OUT
IXO2_37 IXO4_27
CPLED2 38 28 3 6 3G10-1 33R AMBI-LATCH2_DIS 1
IXO2_38 IXO4_28
3G11-3 33R +3V3
2G10 RES

2G11 RES

2G12 RES

2G14 RES

2G18 RES

2G19 RES
2G13 RES

2G15 RES

2G16 RES

2G17 RES
11
TCK
9 3
TDI
24
10K

10p

10p

10p

10p

10p

10p

10p

10p

10p

10p
3G15 TDO
10 GTS2 5 7GA2-2
TMS
BC847BS(COL)
GND 4
+3V3
4
17
25

+3V3

6
GSR 2 7GA2-1
BC847BS(COL)
1

330R 2

330R 1

5 330R 4

330R 3
DEBUG ONLY

3GA6-2

3GA6-1

3GA6-4

3GA6-3
RES RES
1G35 1G36
1 3GA2-1 1 8 100R 1 FGA6
2 3GA2-2 2 7 100R 2 FGA4

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT
3 3GA2-3 3 6 100R 3 FGA5
4 3GA2-4 4 5 100R 4 FGA3
5 5 FGA2
6 6

6GA0

6GA1

6GA2

6GA3
+3V3
7 8
100n RES

SD51022
2GA4

BACKLIGHT-PWM 9GA0 BACKLIGHT-PWM_BL-VS

4 2010-12-10

SPB SSB TV550


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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 130

SPI buffer

SPI buffer
B06D B06D

+3V3
+3V3

7GE1

10K
2GE0

100n
3GE2 PDTC114EU

7GE0 PNX-SPI-CSBn

20
74LVC245A
1
3EN1
3EN2 IGE0
19
G3
3GE0-3
PNX-SPI-CLK 18 2 3 6 BL-SPI-CLK
1
2 47R 3GE0-1
17 3 1 8 BL-SPI-SDO
PNX-SPI-SDO 16 4 3GE1-3 6 3 47R AMBI-SPI-CLK-OUT-R
15 5 47R RES 5 4 3GE1-4 AMBI-SPI-SDO-OUT-R
AMBI-SPI-SDI-OUT_G1-R 14 6 3GE3 47R RES PNX-SPI-SDI
BL-SPI-SDI 13 7 3GE4 47R RES
12 8
47R
11 9

10
PNX-SPI-CLK 7 9GE0-2 2 BL-SPI-CLK

PNX-SPI-SDO 6 9GE0-3 3 BL-SPI-SDO

BL-SPI-SDI 9GE1 PNX-SPI-SDI

9GE2
PNX-SPI-CS-BLn IGE1 5 9GE0-4 4 BL-SPI-CSn

Buffer

Direct

4 2010-12-10

SPB SSB TV550


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10-10 B07 393912364954


DVBS-FE

DVBS-FE
B07A 7R01-1
B07A
STV0903BAC
7R01-2
STV0903BAC

+1V-DVBS 15
1
XTAL 122
XTALI MAIN VS
52 SENSE+1V0-DVBS

17 POWER_VIA 4 124 16
3R02 FR00
AGC
NC XTALO AGCRF1 2R53
22 6
I2C-ADDRESS : D0 1K0

2R01

2R03
2R00

2R02

2R10
100n

100n

100n
25 10 59 63 47n

10n

10n
DIRCLK 0
28 14 104 64
GNDA CLKI 1
31 113 103 65
NC CLKI2 2
33 117 100 67
NC CLKOUT27 3
36 121 D 68
4
39 125 QM 11 70
N 5 * To be drawn near PNX85500
42 QP 12 I1 71
P 6
45 129 73 3R03 47R TS-DVBS-DATA 4 9R03-4 * 5 TS-FE-DATA
GND_HS 7
+1V-DVBS 48 74 3R04 47R TS-DVBS-CLOCK 9R04 * TS-FE-CLOCK
CLKOUT
51 130 75 3R05 47R TS-DVBS-SOP 2 9R03-2 * 7 TS-FE-SOP
STROUT
53 131 IM 8 78 3R06 47R TS-DVBS-VALID 1 9R03-1 * 8 TS-FE-VALID
N DPN

2R04

2R06

2R11
2R05

2R12

2R13
100n

100n

100n
57 132 7 Q1 79

10n
10n

10n
VDD1V0 IP P ERROR NC

2R20 RES
61 133
66 134 82
NC
69 135 83

6p8
NC
72 136 60 84
0 NC
77 137 56 CS 86
1 NC
+1V-DVBS 81 138 87
NC
85 139 DISECQ-DET RES 2R21 1n0 128 89
DISEQCIN1 NC
88 140 F22-DISECQ-TX 20 90 NC
DISEQCOUT1

2R07

2R08

2R09

2R14

2R15
100n

100n

100n
93 141 126 91

10n

10n
NC FSKRX_IN NC
99 142 NC
107 94
FSKRX_OUT NC
102 143 RES 2R22 47p IR04 NC 95
NC
105 144 SCL-SSB 97 108
SCL NC
110 145 SDA-SSB 100R 3R01 98 109
IR03 SDA NC
112 146 RES 2R23 47p 100R 3R00 111 NC
IR00 147 SCLT 19 115
5R00 SCLT NC
+3V3-DVBS +3V3-DEMOD +3V3-DEMOD 21 VIA 148 SDAT 18 1 116 NC
SDAT
38 149 119 NC
30R
54 150 120 NC

2R49

2R50

2R51
2R16

2R46

2R47

2R48

2R52
100n
100n

100n

100n
76 151

10n

10n
22u

10n
80 VDD3V3 152 RESET-DVBS 62 40
IR02 RESETB 0 IR05 3R07
92 153 9R00 58 COMP 41
STDBY 1
96 154 RES 120K

3R13
106 155 26 101

10K
FR02 TCK 1 DISECQ-RX
156 23 50
FR03 TDI 2 NC
+1V-DVBS 2 157 24 49
3R11 FR04 TDO 3 NC
3 VDDA1V0 158 29 47
+3V3-DVBS FR05 TMS 4 NC
159 27 46
10K FR06 TRST 5 NC
2R17

100n

5 160 44
6 NC
9 161 43
GPIO 7 NC

3R10
13 162 37

1K0
8 NC
114 163 35 NC
VDDA2V5 9
118 164 34 NC
10
123 165 32 NC
FR07 11
+2V5-DVBS 127 30 NC
12
55 NC
13
2R19
2R18

2R24

2R25

2R26
100n
100n

100n

100n

100n

+3V3RF

3R12 IR06

2R31 4R7

2R32

2R33

2R35

2R61
2R34
1n0

1n0

1n0

1n0

10u
1n0
2R37 1R10
NX3225GA 7R02
+3V3RF +3V3RF 6 8 11 14 22 27 28
STV6110AT
10p
3 4 LNA LT MIX DIG BB VCO SYN
3R09 2R40
30 VSS 32 XTAL
XTAL_OUT
3R14 RES

3R15 RES

16M

NC

XTAL_IN 1K0 100p


31 18 4 5 QP
2R38 IP

19 3 6 3R08-4 100R
10K

10K

1 2 IN QM
1 3R08-3 100R
10p XTAL_CMD
SATELLITE QP
21 1 8 IP
IR07 12 20 2 7 3R08-1 100R
SCLT SCL TUNER QN IM
SDAT IR08 13 3R08-2 100R
SDA
I2C-ADDRESS : C6 RF_OUT
7
NC
10p

10p

10p

10p
AGC 2
AGC
34
2R39

9R02 16 35
10p

2R41

2R54

2R55

2R56
AS
RES 36
23 37
24 NC VIA 38
NC
39
1R01
40
2R43
5R01 IR01 +3V3RF 1 4 41
RF_IN
+3V3-DVBS 42
27p
10u GND
220u 6.3V

RF LNA LT MIX DIG BB VCO


2R27

2R28

SYN HS
10n

5R02

5 3 9 10 15 17 25 26 29 33
27n

FR01
2R62

0p56

LNB-RF1
SM15T
6R00

2R29

2R45

100p
1n0

4 2010-12-10

SPB SSB TV550


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10-11 B08 393912364954


DVBS supply

DVBS supply
B08A B08A
5T00 IT00
+5V-DVBS
30R
7T00-1
1 6

2T00

2T01

2T02
ST1S10PH

22u

22u

22u

SW
IT01 5T01 IT18 FT06
+2V5-DVBS 2 7 +1V-DVBS
INH VIN SW
2u0
5 3

RES 1n0
SYNC VFB

2T03

2T04

2T05
GND

22u

22u
A P HS
4 8 9
3T00 RES

1K0 1%
IT02 2T10 RES
7T00-2
ST1S10PH 13 15
4n7

1%
2T36 IT24
VIA

3T02
10 12

22K
RES 3T01
SENSE+1V0-DVBS
IT20

3K3
3T03 4n7
+3V3-DVBS 3T21
14

11
47K

2T06

100n
1K0 1%

LD3985M25
7T01

6T01 RES 6T00 RES 6T02 RES IT03 FT07


+5V-DVBS 1 5 +2V5-DVBS
IN OUT
BAS316 BAS316 BAS316 IT19
3 4
INH BP

2T07

100n

2T39
2T08
30R

1u0

1u0
5T02 COM

2T09

10n
2
7T02
LD1117DT33
FT08
3 2 +3V3-DVBS
IN OUT

16V
COM

2T11

100n

2T12

22u
1

+24V

3T04 IT04 2T13

3R3 47n

100u 35V

100u 35V
2T14

2T15

2T16

2T17
220n

220n
FT00 5T03 IT05
+5V-DVBS
33u
220u 16V
2T18

SS24
2T19

6T03

3T05

22R
22u

7T03 2T20 IT10 3T10

14
TPS54283PWP

1

IT06 IT25 PVDD1 PVDD2 IT26 47n 3R3
2 13 IT09
BOOT1 BOOT2 5T04
3 12
SW1 SW2 +V-LNB
5 6 IT32
EN1 EN2 33u
2T21

7 8
1n0

100u 25V
FB1 FB2

SS24
3T11

6T04

2T23

2T24

RES 2T22
RES 2T37

RES 2T38
22R

10u

10u

4u7
4u7
9 16
ILIM2
10 17
+24V IT07 SEQ
11 18
BP IT11
19
2T25

20
1n0

2T26
21

1n0
VIA2 22
100K
3T31

3T06

23
RES

10K

24
IT12
IT27 25
IT08 26

2T27
6 GND GND_HS

1n0
2T35

15
10u

3T07 IT21
+3V3 2 7T04-1
BC847BS(COL)
10K
1

1K0
3T29
10K

3T08
IT17 3T23 IT29 2T41
IT13
33K RES 1n0
2T28 FT04
+V-LNB
RES

22n
3
3T12
3K3

6T05 IT22 3T14


3T13

RES
2T29
5 7T04-2

4u7
+24V 47K
IT23 BC847BS(COL) 5%
BZX384-C 2K2
3T15

3T16

4
3K3

47K

13V IT14 RES


5%
2T30 RES
3T17

1K0

RES
22n

3T24
SENSE+1V0-DVBS
15K
2T40

220p

2T31 RES IT15 3T25


+5V-DVBS V0-CTRL
22n 330K
RES 3T09

3T20 2T42 IT30 3T28


3K3
RES
2T32 RES

2T33 RES

18K RES 10n 100K


5%
RES
3T19
3T18

3K3

33K
22u

22u

IT16 3T26
5%

RES 2T34

RES 10K

2T43

100n
RES
22n

4 2010-12-10

SPB SSB TV550


FT05 3139 123 6495
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DVBS supply

DVBS supply
B08B B08B

+12V +12V +3V3-DVBS

IT50

100u 35V

100R

220R
2T50

2T51

3T50

5T50
100n

22u
RES RES 3T22
IT28

V0-CTRL

2T52

220n
IT60

5T52

7T50-1 IT51 220u IT52

19

18
LNBH23Q LNB-RF1

3T51

VCC

VCC_L
SCL-SSB IT53 3T52 3T53

BAT54 COL
100R 28
ISEL

2T53

6T50
220n
9
3T61 SCL 22K 15R
SDA-SSB 6 4
SDA LX
3T60 RES 100R
10 21
ADDR VORX
10K 3T55 RES IT54 3T62 IT67 2T60 3T58 RES IT55
+12V LNB-RF1 DISECQ-DET 2T54 RES 29 22 DISECQ-DET
DETIN VOTX
IT61

2T62 RES
10K IT62 IT66 1R0 2K2

3T59 RES
3T56 10n 10u

STPS2L30A
3T57 RES
12 11
DSQIN DSQOUT +3V3-DVBS

6T51
9T50

2K2

10n
10K IT63 10K
F22-DISECQ-TX RES 9T51 13 1
EXTM
STPS2L30A

IT65 2
RS1D

RS1D
6T55

6T52

6T53

14 3
RES TTX
7
30 8
VCTRL
IT56 IT57 16
5T51

3T54 RES
+V-LNB 27 17
VUP NC

150R
IT58 23
30R
15 24
100u 35V

100u 35V

BYP
2T55

2T56

2T57

2T58
470n

470n

25
RES
26
IT64

2T59

470n
31

GND_HS
A_GND

P_GND
32 RES
6T54 RES IT68
7T51
BC817-25W
BAS316

20

33

RES
IT69

1n0

RES
2T61

22R
3T27
41
7T50-2 42 IT59
LNBH23Q 9T52 RES DISECQ-RX
VIA
34 39
35 VIA 40
VIA
36
VIA
37
38

4 2010-12-10

SPB SSB TV550


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10-12 B09 393912364954


Connectors comp

Connectors comp
B09A 5C55 +3V3
B09A
30R
1M59
FC70
AMBI-SPI-CLK-OUT
1

3C74

100K
RES
2
AMBI-SPI-SDO-OUT FC71
3
AMBI-SPI-SDI-OUT_G1 FC72
4 2C76
V-AMBI 5
AMBI-PWM-CLK_B2 FC73
6 FC87 3C75 100p
7 LIGHT-SENSOR
AMBI-SPI-CS-OUTn_R2 FC74
8 2C93 100R 2C77
AMBI-LATCH1_G2 FC75
9
V-AMBI 10 47n RES 3C76 100p TO
AMBI-BLANK_R1 FC77 RC
AMBI-PROG_B1 FC76
11 LED PANEL

BZX384-C5V6
12 IC73 100R 2C78

6C02
AMBI-LATCH2_DIS FC78 1M19

RES
13 FC88
AMBI-TEMP 3C70 100R FC79 IC74
14 3C77 100p 1
LED-2 FC89
15 2
FC90
FC81 16 100R 3
17 FC91
4
2C70

100n
+3V3-STANDBY FC92
18 5
GND_AL 19 2C79 FC93
6
FC94
NC 20 7
21 IC75 3C78 100p +5V 8
FC82 LED-1
FC83 1C86 22
AMBI-POWER
+24V 23 100R 2C80

2C81

100n
T 2.0A 63V 24
25 100p
26 FC95 3C79

2C94

2C95

RES
100n

100n
KEYBOARD
27 28

RES
FC84 1C87 10R

6C03 RES
100p

BZX384-C5V6

BZX384-C5V6
+12V_AL 2C96
T 2.0A 63V FH34SJ-26S-0.5SH(50)
2C82

6C05
RES 100n
RES

GND_AL GND_AL

1M21 RES

+3V3 RES 3C90 1


2

FAN-CTRL1
FC61 10K
RES 3C91 3
4
100R 5
FC62 RES 3C80 6
TACH01 +3V3-STANDBY 7
RES +5V 8
100R SCL-SET 9C00 3C94 47R
1M71 9
FC85 RES 3C81 FC96 RES
SCL-BL 1 RES 10
SDA-SET 9C01 3C95 47R
FC63 RES 3C82 100R FC97 2 11
TACH02 FC98 RES
3 RES 12
TXD2-MIPS 9C02 3C96 47R
100R 4 13
RES
FC86 RES 3C83 RES 14
RXD2-MIPS 9C03 3C97 47R
RES 2C83

RES 2C84
100p

100p

SDA-BL 2041145-4 15
TEMPERATURE RES
100R RES 16

2C87 RES

2C89 RES
2C86 RES

2C88 RES
FAN-CTRL2
FC64
RES 3C92 SENSOR 17
18

RES 3C93

2C90

2C91
10p

10p

10p

10p

1u0

1u0
100R 19 20
+3V3
FH52-18S-0.5SH
10K
FAN-DRV FC99

RES 5C54
RES 2C85

Dreamcatcher
1u0

+3V3
30R
T 1.0A 63V
RES

HOTEL TV
1C85

RES 5C53
+12V IC78 RESERVED
30R
4 2010-12-10

SPB SSB TV550


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10-13 313912364954 SSB Layout


Overview top side

1M95 1M99 1M59

1C87
1C86

2T14
CXXX

5T01
7T02
2T17 5T04

1UM0
7T00

2U72

3U84

2U51

3U67

2U52

3U66

2U43

3U44

3U56

2U56
2U50

6T03
5UM1
2U46
5C55
2C94

2U49
2D30
2U58

2U53

3U43

2U44

2U45
4U01

3U76

2U48
3U71

2U54

2U68

2U47

2G13

3C70
2C70

2C96
3U45
2C95

3G14

3G12

3G13
3G11 2T01

4U00

3G10
3U42

3U64

3U65

3U81
IUD0
7T03 2T22 2T12 2T00

2T11

5T00
2UE8
2UD0

7UD3

5UD1
2UD3

7UD0 5T03

3U06

2U27

2UD7

3UD2
2U28

3U07
2UE7
7U05

5U02

5U03
2U24
2U23
2U25
2U20

2U19

3UD1

3UD0
IUS3
IU57 2UD1
IUS4
2UD2

7U01 7U04 7U02 7US1


3US5 2UE0 IUD1

7UD1
IUD4
5UD0

2T18

3US4
IUT2

9US0
3U23
2UD4 2UD5

5UD2
1M71
3US7

IUS6
IUD2

2UD6 6UD0
IU23 IUT1

2T33
2T32
2T19
IUS5

3US2

3US3
3C80

5U00
3C81
2UD8
6U00

2U17
3C91 3C90

7US2

7US3
IU18 3U24

2US3
3C83
IU17 3U29

2U11
2C83
3UD5 2UE1
2C84

3C93
2U09
2UD9
3C92 IU15 3UD4 3UD3
3U26

2UE6
5UD3
3C82 2C85

2U18
1C85 2U16
5C54 5C53

5U01 2U15 3US9 3US6 IUS9

2UE4

2UE3
2UE2

6GA1

6GA0

6GA3

6GA2
7UU0

2UE9
3GA6
9UU1 9UU0

1G37
1X08 1P00 1X07

7GA2
3GA5
7GA1

1G00
5G02 2UU2
5G01

2G44 1G36

2G43
1G03 3G15 3GA2

3G28 6G00

IG11
1G35
2GA4
9GA0 3GA1

7GA0
1G50

3B11
3B26 IGA3

7B01 3B18

2B47
IGA2
3B19
IGA1

2F01
2G98

5R01
2R27
2G97

2S4P
2G99

3R14
7F20

3B10
2G96

3R15

2R28

2R29
2D19

9R02

2R33

2R32
2R46
9S90

9S91

9S92

9S93

2R45
1R01

3B08

2R56

2R55

2R31
3R03

5R02
2R20
3R04

3R08
7B00
3B25
5D08

7R02
3R05

7R01
3B16 2R43

2B46
3R06

2R62
2R54

2R41
3B17
2D05

3B07

2R39
2T57

2R61
2R34

3R12

2R35

2R38

3R09
1R10

2R40
2R37

9S00
2S09
3S3Y
3S04
2D20

7S02
3S31

7S00

3S02 3S01
9S01

3S28

3S29

3S24
3S23
1X05 1X04

3S03
3S62

3S3Q
6T55

3B02
3S21

7B02
3S3S

3S1K

2T50 2T55
2S4E
3B23 3S1J

3T22
3S1B
2T56

3S3R

3S2A
3B12 3S3T

2B44
7T50

2S4D

3S1L

9F28
3S3N
3B13
9F27
3S1C

6T52

3B00
3S3L
5D07
3S4B

3S6K

3S4A

5T52
3B05

IF62
5T51
1D50
1735 1D38

2D17

IS14

5T50
6T53
6T51
2D23
2D24

3S81
2D08

3B24 3S80
2D07

2S4F
3S52

7B03
3S3F
BS15 DS50
3B15 3S54
2B45

2S4G

3B14 3S50

1S02
3S3M
3S43

DBS8

3S44
1D52

7D10

3S3H

3S3U
9S06
3S3G
3B04

3S2M
3S00

2S2W
2S2Z
3S6H

2S33
2S30

3S42
IS13
3S27 2S2R 3E17 3S3W

1P09
2D09

2S2V
2S2Y
2S2T
2S34

2S32
2S31
3S26

7S08
2D10

2S7M

2F40
4S14
3S6J

2S7K

2S7H

2S7R
2S7E
BS10

2D06 2S77

3S4J 2S7J

2S8G
2S7U

2S7N
2S7P

2S7L

2S87
2S78

3S4L

3S4K

9S21

9S19
2S2S

3S4R
3S4P
3S4T

9S20

9S18

3S59
3S53 3S84
3S13
3S83
2S41 3S12 BS13

1F10
2D12 2D11

2S4M 1F24
5D02 5D01

IF61

2F58
3F59
7F58 3F60
3F58
9E20

1F75

2F29
3F36

3F37
2F33
5E74 3F31
5D04 9E24 3E32 2E83 9E18

1E71
3E31
2E84 3E77 3E76
6E22 6E26 9E05
9E21

4E05 2E18
6F72 3F78
4E02

4E04 2E14
4E03

4E01

7F25
9E22 7F70

2F92 2F94
2F90 3F71
2F91
3F72
1P08

IF89
1E00 1E53 1E12
1E19 1E23 5F70

IF86
1E86
1G51

1E85
2F9D

1E01 1E06

2F32
1E18

2G29
5D05 1E55 1F25
2G28
2F35 3F28 2F34

9F00 9F01
9F05 9F06
1E31 1E54 1E22 1E25 5F73

9F04
2F9C
2E48

2F93
3E69

3E70

3E67

3E66

3E65
3E71

9E43

9E42

3E64

2E49

1X06

1FD3
1E32

2F88
2G7A
3E87

1F51
2G79 3E88

2F9B
2E53 3E97 9E52 9E29

2FDD
9E04

2G24
2E52 6E40

5F72
1328

9F71
9E11

2E72

3E51 IE09
6E06

2G25
4E23
4E22
3E96

2E27 3FDG
6E38

3F65
3F64
1E70

2G26
2E39

3G38
2E55
3E33
2E40
9E13

2E71

7E10

2FDC
2G78
3E30

2E36

3F75
2G27

1FD2
IE10

2F86
2E35

2E38

2E54
2G76
6E19 3E21
2F9A
2G75
3E20
2E37
1E29

1E43
1E42

2G77 IE07 3E34 3E68 2F99


1E37
3E35

1E03 1E04
2C76
3E72
6E20

3E25 3E22
3E40

3C75 3C74

1E08 1E09
2E66 2E63

6FD3
7EE0

2E57 2E56
6C02
9C02

9C03

1T01
2E07 5E02 5E01 IE11 1E38
1E39

2C77 3C76 2C93


1E28

3E28
2E62

6FD2
IC75
1M19

2E05

2C80 3C78
1E88

1E87

3ECG

2F98
2C78 3C77
6EC1
3E27

6E47
9E15
5E08

3E98

3E26

2E60
1M21

6C03 2ECU
3ECF
6E51

6E15

3EC3
2C82 3C79 IC74 3ECP
1F52
2E67

6E18
3E36

3EC5
IE34
4E24
2EE6

6C05
4E21

1329
4E20

9E17 3E89
6E17
9E57

6E16
3E38

9E50 3ECN IE42

1P05
2C91 2C90
3EE3

IE36 3F623F63
3E41

IE35
2C86 3C94 2EE3 IEE4 IEE6
2EE4

2ECN

2EC1 7EC1
IEE5
2ECP

2EE7 2EE2 2F60


6FC7
3EE0

2C87 3C95
2ECM
2F97
3C97 3C96
6FC5
7EE1

2F81
2EE0

3ECM
6FC3
3EE1

2C89 2C88
2EE5

3FC4
3E58 6FC4
2E22

2C81
6E46
5E06

3EE2 2EE1
IEE3 3E57

3FC3
6FC2
3E56

2E25
2E23

2E21

3E55

3E54

2E20

1E44 2E26
6FC1

3FC5
3FC7

3FC6
9FC5
9EC3 5EC2 2ECC
9FC3 9FC6
6FC6

1N00
1E78

2FC3

2FC4

2FC2

2FC1

2FC6

3FC1
1E79

2FC5
1E75
2FC7
6FC8
3FC2 9FC4 2FC8

1E77 1FC6 1FC3 1FC4 1FC2

1FC1
1E07

1X02 1P04 1P03 1P02 1ECB 1X01


1E76

1FC5

1E05 4 2011-01-27

LAYOUT
3139 123 6495
SSB TV550 2K11 4DDR EU

19100_800_110127.eps
110217

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 136

Overview bottom side

FC81

3T11
6T04
2T02
IT11
IT00 FC75 FC74
FC84

2T26
FC83 2G18
IT19 IT20 FC77

2G14

2G12

2G11

2G10
2T09

2G17
IT01 FUM0

3T31
FT00 FC71

7T01

2G16
FC73
2T06 2G19

3T07
IT12
2T03 IT23

IUM0
IT22 FC76

6T05
3T14
3T17
3T03 FC78

2T27

2T15
2T16
FC70
3T01 FC82

2T39
2T08
IT02
3T02
FT08
7T04 IT21 FC72

2T04
2T05
FC79
3T06 2G15

3T08
5T02
3T00 3T21 FT07

IT08 IT17
IT18 FT06 2T10 2T36 2T43
IT09 3T10 IT10 2T20 IT04
FU48 FU49 FU50 FU54 FU56 FU59 FU60 FU61
FU66 FU67 FU51 FU52 FU53 FU55 FU62 FU76
2T13 FU74

3T05
IT03

6T01
6T00
6T02

3T04
IT24 IT05 IU51
IT30 3U72

1U40
2T35

2T07
FU57

2U57
IT26 IT25 FC61
FU63 FU75 IU56 IU55
FC64 FU58

2T41
3T25
3T28
3T26
2T42
FT04 IT27

FT05
IUS0
FU68
6U40 2U06
3U00
FU01 FU08
2T40

7U00
3T23 FU09

7U40
IT29 IT32 IU22
3U01

3T13

3T09 3T15
3T19 3T16
IT07
3T29 IT13
2U03
CU00

2T23
2T24

2T25
2T21
IU03
3T12 2T31 IUD3 3U10 3U19

2T29

2T30
IT06

2T34

3T18
IU49 IU20 3U17

3U08
IT15 3U22

2T28 IT14
3T20 FC85 2U55
2U07 2U08
IU48 IU05 2U01 IU24 IU04

3T24
IU27
3U73
3U62 3U09 3U18 IU06
IT16 IUD6

FC86
IU08

3U04
IU63 2U02

3U27
2U21
IU28 IU16

FU73
FU72 IU13 IU07
IU62 IU11

3U11

3U28
IUD7
3U14

7U41

2U22

3U05
3U60

3U80
7U03
FC62
IU12
IU10
IU61

2F05
FU04 FU05

FU07
FC63

2F04
FS2W 3U63

3FD4

3FD3
IUS8
IFD4 IFD2 IU52 IU50 FU02

7UA4
IUB0 FU06

2UB3
7F03
7F04
FS2Y FC96

3UB2
3U82 2U05
IU09

7FD1
3F68 IU14

6FD1
IU25 FU00

2UB4

3UB4
3U61

IFD1

3UB3
IF56 FC98

3U02
IU02
2U04

2U00
7UA0
IU64 3U20 3U21
FUA0

3F69
2F53
3U83

7F54
3UB5 IU19

9CH0
IU01

3FD6
9FD1
3UB0 3U03

CU02
IUA5 IU21 2U10 2U29

3FD1

CU01
FC97

3UA0
IUS7 IUA6 3UB1 CU05

CU04
CU03
IU41
IF57
2FD1

7F53
IFD5
7U48 IU40

FC99
2UA4

3F53
2U71
3F54

3FD7
9FD5
3UB7
2U13 2U12
IFD3

9FD2
3FD2
FF58
3F66 IU29
3F67 IC78

IF55 3U25 2UB8

3F08
IF04 9U42 IU45 3U70
IU30
7U06 IUB5
IUB4

7UC0 FU03

2U14

7UA7
3U75 3U69

3U74
3U68
3UB6

7F05
3U53
IUB3

2F06
IU26

7F00

7U43
2F00
3F11
FUD3 3U13
IUB2

3U59
3U12 FUA4
IU47

IU43
7UA6

7UD2
2UB7
7U42

3U15
9U41

7UA3
IU44
IF02

2UB2

2UB1
5UA0
3U41 FUD2

7UA5

3U16
IUB6
IF08

2UU0
IF03 FUA3
IUU2

3F02
IF01

6UD1
CUA0
IUU5
3F03 IUB1
3UU3 7UU1

2UB0
3F01

2UB5

2UB6
3F09 3F10 IUU4
IUU3

7F01

3UU2
7UU3

2F02
3UU0
FUU0

FUU1

7UU2
2UU1

3UU1
2UE5 IUD5

IUU1
IF06
IUU0
FGA2

FGA3
7F02
IF05 IF07
2G9E
3F04 3F05 FG2J

FG0H
FGA6
FGA4
3GE1 3GE0

2F03
2GA2

FGA5

FG1P FG1Q

3GA4

2GA6

7GE0
2GA5

2GA3
FG1B FG1A

9GE0 FGA1

FG19 FG18

5GA1
FG17 FG16
9GA1

2GE0
FG15 FG14

2B43
9GE2

IGE1

2B39
5GA0
FG13 FG12
2B32
2B34

2B27
FB00

2GA0
FG1N

2B33

2B35
FG1M
FGA0

9S95

9S94
IS17
9GE1 3GE2 2GA1 FG1K FG1L
7GE1 2G9F

3GE3
3GE4

3GA3
FG11 FG1J

IGE0
3F07

2B29
FG1H FG1G

3S66

3S68

2B28
IS15
FS31

3B09

3F21
2B30

2D31
3F24 FG1E FG1F

7S01
IS08 2B31

2S12
3R07
2R48 3F23 9S11

FG33
IR05

9S10

FG1C
9R00
IF21 IF23 3S65 FG1D
2G92
2F20

2R10
IR02 3R11

9S97

9S96
9S13
2R47
3S67

9G0K
2F21

3F22
2G93
3F12
9S12
FF31

2B42 3B27

2G94
FG32

3R13
2R03

2R06
FR06

2R04

2R05
6R00
IS09
FR05 2R11 IF22

3F20
3F19 2B22 FG30

2G95
3R10 FR07
2R02
9C01 3S6B 2S89 3S58 FG31

2B23

2B38
FR02 2R12 9C00 3S6C 3S5W

2B25
2R01

3B21
IS00
9S08 2B24

3S06
FR04 2R49
2R53 IF87
FS01
FR03 2S4N

2B26
2R13
3R02
FR00 3S61 2S66

3S07

2S17
IR07 2R50
2R00 2G9C
3S6G
2B20

2S25
3S1V
2S61

3B20
3B06

2B19
IR08 2R18 2R19 2R07
3S60

3S15
IR06 IR01 2R24

2B21
2B18

2S26
IF88 3S6E
3S6F

2S67
IS40 3S5Z
5R00 3S6D IS26

2R16

2S63
2R08
3S5Y

5S88
2R51
2S62
2R17

IS3K
IR00 3S57 IS25 2S5M

2R52

2S6P
2R23

2S4S
2S5H
3S2G 3S2F
3S56 3S1W
2S57 5S94

2S5P
3R00 2S4W

2S64
2D03 ID35
3S6A 3S6W 3S6V 3S69
2R15
2R26

IR03
2R25

2R22

2S5J

3S6Q
3R01 2S4Y

3F06 2S21

2S60
3S1X

2S6F
5S83 7D11

3D01
5S85 IS3Q

2R14 2R09 IR04 3S1E 5S80 3B22


2R21

3S6P
2S5G

5S93
IS58

5S89
3S30

5S92

2S5A
2S27 ID34

5S87
3S33

5S81
2S6E

2S23
3D15

2S5D
2S5K

2S6M

2S59
3S1R

3S1U

5S82
2T59

3S1S

3S1T
IS3S
2B10
6T54 9T52
3T56
9T50

IT59
3S82

2S58
2S28
2S6L 2S6D
9T51

3S0V

2B16

2B14
IS42 ID12

2S5C
2S43
2S65

2S6K
IS04

2S6H

7D03
9R03
IT66
2T61 5S95 2B37
2B15

3D09

3D16
2S68
IS10

5S90
IT63 FD07

5S04

2S53
2S55

2S56
IT58
2B17

3S20
IT28

2S24
2S2E

2S52
2S5B
3T57 2T52 FS64
2S20

3D06
3S0W

2S6A
9R04 FS02
ID11

3S64
3T51

2S4V
2S6N

2S37
IT64 2S6B
IS01
3S22 2B13 2D02
IT65 2T51 3T50

2S11
IT68 2SHW

2B12
3T61
3T54
ID14 ID33
7T51

2B11
IT50
2S6C
2S51 2S6G
IT60

2S4T
FR01
9S09 3B01 2B09

3S45
IS05 2S4U 2D28
2T53

2S46
6T50

3T59

2S50
2S4Z
2S15

2S4R
IS3L

3D02
FC95

3S40
3T27
IT62

IT53

IS16 DS52

2B40
IT69 FD01 FD08
2T62 IT57 3S2K

2S45
3S41 7D15
3T58
2T54

IT55

2S4Q
IT56 3S55 2D29

7S20
3S1P IS4Z IS5F
2T58

2S4K
IT52
3T60
3T52

2T60

3T55

3S1F

9S0D

2S29
IF51 IS5E

2S13

2S3G
3S2H ID15

5S84
FD03
2T38 IT61
FF04 IS2U 2S10 IS3B 3S5S
2S76 IS4W
IS1A

3S2V

9S0E
2S75 2S36

2S3H
3T62 IT54 FS0Z FS45
3S76

3S09

IS50
2T37 FS51

C001
3B28 ID30

3S5V
IS19 ID18
IT67 2B01

2B03
3S75
2S3L

2B02

2D16
2S2L
FS11

2S14

2B04

2B08

2B36
FS10 3S1G IS5D ID37

3S10

2S3E
IT51 IS1B
3T53

7S09

2S18
ID19

2S85 3S1H
3S2L ID29

2S3F
IS3D FD09
IS5H
2S86 IS1N ID27

2S40

3S08
IS1L
2S84 3S46 IS2Z

2S19

CD10
IS5J ID28

3S2S
FS08

2S3K
IS1M

3S5T
2S3Q IS1S

2S16
IS4V

2B07
IS1G
3S19

2B05
IS5G

3S6M

2B06
3S11
IS1E
3B03 2B00

2S3D

2S3C
2S3B

2S3A

2S38

2S39
IS3F

2S8A
3S18 FS49 9S24 IS5C

3S5B
FF43 FF50

3S72
IS2V
IS1K

2S3M
3S25

IS20
IS06

2B41
IS3E
3F44

3F42

FF44 FS44
FS50

2S2J
IS03

3S05

2S22

2S2K

3S6L

3S37

3S34

3S32
FF47 IS07
IE05 IE67
IS44 FD05

3S51
3F45 ID09 ID32

2S3J
FF49
2D01 2D14

7S05
IS12
IE54
3S16 3S17
3F40
ID31
FF45 FD14 5D03 FD06

3S47
IF47

IS0V IS1J ID10 2D13


FF48
3F43

3F41

FS03

2S42

FD02
IS1Q

2S2G

2S2H

3S39
IS02 3S0Z
3S36
FF46
IF16
5F76 3S5E

C000
IS1H
IS0R
2F62
2F70

2F65 IS1P 3S38

3S3P

3S49

3S1D
FF41 3F82
FF30

FF38 FF39
9F30
9F29

FS53
IS11 2F95 IS1D
FF42
FF56
AF72
5F74 FS57

IF53 FS52
2F73 2F80
2F72 2F82

2G9D
FF55

FF29 2F77
7F52

FF32 IF45 2F76 AF73


IF58
5F71
3F32

3F52 3F79
IF50 IF54
IE15

2D27
2D21
IF80

FF33 2EA5 2EA4 IEC0


IF79

2E10
IE18 3D10

3E24
2F49 IE53 2E79
IE68

IE90
7E01
2F52

ID07
IF35 FF57
2F96 3EA7 2E01
3E06

3E18
IF59
IF52 2EB1
7E05 ID05

3EA1

9E01

2E74
IE89
5E73 IEC2

BEC5
IE13 IE91
IF72 FE75
3EA2
IE61

2E85
IF37 FE83 IE55 FEA1
2E81

7E06
3F34 3E37 IEC1

2E90
3E74 FEA0
5E76
9E12

BEC3
2EB3 3EB6
IE17 FE80 2E80
9E14

6E07
9E23
6E30
3EB3

6E28
FE57

IE96 IE92
IF43
2F27
2F26

IF36
5E80 IE60
9E06 3E75 6E23 6E01

9E51
2E76

2E12

3E78

9E55

3E79

2E86

9E53
IF90

3E45

FE43

2E87

9E27
3EB1
2G91
FE81
9E08 2E15

FE70
IF75
2E97 IE59
2E99 2E98 3E19 3E48 9E09 IE08 FE74 FE72

2F31
IF42

IF40 IF81

9G0G
IE70 FG1V FG1W
2F78
2F74
FF75

FG2N
FF71 IF77 IF73
IF39
FE85

FG1T
2F71

FG2P FG1U
2F85
7F75
2F30

FF37
FE56

FF01

9F25
IF31 3E53 FG2C FG1S FG1R

2D26
2D22
9F26 IF30 IF10 9F03
IF76 IE49
9F02 IE50
3D14
3F35

IF32 FG2D
FF36 IF11 FG2A
2F75
6E44
6E43

AF71 FG2B
IF12 ID08
IF13 IF78 IF74 ID06
5F66

2F63 3F80 2F79


2F66

FG27 FG28
FG29
2F28

IF34
2F64 IF14 3F81 3F77 IF82
IF33

FE58
IF15
2F25 2FH8 IF28 3FE5 IF27
FG26 FG25 FG24
IF44
3F30
2FE5

3FE7

3FE6
2FF3

IF41 3FG4 3FG2 FG23 FG22


5FG2

5FG0

AF70 FG2M
IF64 IF29

FG21

FG20
IF66 3G31
2FF6
1FE0

IE14
IE16 FE71 3G33
2FG2

9E07
2E88
9E10
4E06
9E16

5FE4

6E09
IE52
6E32

6E29
3E62

3E43

FG1Y FG1Z
2FF5

2E91
2E75
2E44

3G34
FF00
7E09 6E03 IE26

FE73
2FG3

IF63 IE22 FE50 IE64


2FF0 3G30
FE84

FE82

IE72
FF64 IE63
9E28 3E07 2E06 IE38 FG2E FG2F
3FG7 3G36 FG2L
IF48 IE48 9E26
3E44

IE71
IE29
3FG6

FE49 3G2Z
2FE0 IE23 2E04 IE31
2E24

3E73

5FE0 FE54 9E25

7FE0
FG2R 3G37

FG2K
FF66 FF65 FF82 IE51 IE73
5FE3 2FH5

IE06
FG2G 3G2Y
IF65 DFE8 FG35
2FE4 IE32
2FG9
2FE6 BFE3 3G2W

2FH6 DFE7 FG04 3G32 FG34 FG2H

2FH7
5FE7

IE33 IE39 3G35


BFE2
2FG8 DFE6
FE31
FC89
FFDC 2FG7 2FG6 FE33
DFE9

FE34
IF17 IF18 FE29
2F84 3F76

2FG4
FE42
DFF2 FC87

2FE8
IF49
FE32 3E95 3E99
DFF1

FF81 5FE5 IF67


2FF4

FF03
2FF7

2FF2

2FE3

2FF8
2FG0

FFDA
3FE8

3FE9

FF62
3E29 2E58 2E59 3E39
7FE3

IF68

2E08

2E09
FC88
2FH4
2FH2

FE27 FE28
5E03 5E04
2FF9
2FG1

IF69
2FA4
5FE8

FF61
2FF1
5FA4

IC73
FFDB

FC90
FF63

IEE7 IEE8
5FE9 2FH3 FFAF FE02
5FA3 2FA3
FE30

IEE0 FE59 FC91

2C79
2E68

6E52

FFB5 FE61
FECZ
FC92
IE77
FE48 FE60
FECB
2F59

IE44
IE74
2F61

FE03

IE75

FFA2 FE51
FF76
3E90 9E19
2ECY

2ECX

7FA3
FE47 IE45 FC93
9E58

FFB6
2ECQ
IE76

9E54
2ECW
2FA2

2EC2

FEC7 2EC3
FE45
FE46

FECY FEE0
2EC7

3ECJ

FECR 3ECK
3ECH

3ECL

FE52 5EC3 FC94


FF74 FE44 FE53 IE43 FEC3
FE01
IE12
3FBF

IEE1
FFC9 FE41
9EC2
FFB1

IEE2
FFB2 FFB3 FFC3
FFC4
2ECV

5EC0
2EC6

2EC0

FFC5 FFC7 IE65


FFB4 IE66
2EC8
3ECU
9FC2

FEC0
9FC1

FE36

FFC2
FFC1
FFC6 FECA IEC7 3ECE
FFC8 FECW FECJ
IEC6 IEC5

7EC0 7E02 3E23


FE35

9EC0
FEC2

FECE FEC4
3ECD

IEC4
FEC5
FEC1
FECM
3ECA 3EC1
FECF FECD
FEC6
FECK

FECP FECL FECC


FECG
FECN

4 2011-01-27

LAYOUT
3139 123 6495
SSB TV550 2K11 4DDR EU

19100_801_110127.eps
110127

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 137

10-14 B01 313912365192


Common Interface

Common Interface
B01A B01A
+3V3
3F06
CA-RST 100K
2F00
TRANSPORT STREAM FROM CAM RES
3F07-4
7F00 CA-CD1n 4 5
100n

20
74LVC245A 10K
3F07-2
1 CA-CD2n 2 7
3EN1
10K
3EN2 3F07-3
19 CA-DATAENn 3 6
G3 +3V3
IF01 10K
3F02 3F07-1
CA-MOCLK 2 18 MOCLK CA-DATADIR 1 8
1
100R IF02 10K
3F03-1 2
CA-MOVAL 1 8 3 17 MOVAL
3F01 3F08-1
+5V +5VCA CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 8
+T 0R3 IF03 5 15 10K
100R 3F08-2
6 14 MOCLK 2 7
22u 16V
RES 2F01

7 13 10K
8 12 MOVAL 3 3F08-3 6
9 11 10K
MOSTRT 4 3F08-4 5

10
10K
3F09-1
MDO0 1 8
+3V3 10K
3F09-2
MDO1 2 7
2F02
RES 10K
3F09-3
7F01 MDO2 3 6
100n

20
74LVC245A 10K
3F09-4 IF04
1 MDO3 4 5
3EN1
3EN2 10K
19
G3 3F10-1
IF05 MDO4 1 8
CA-MDO0 3F04-1 1 8 100R 2 18 MDO0 10K
1 3F10-2
IF06 MDO5 2 7
2
CA-MDO1 3F04-2 2 7 100R 3 17 MDO1 10K
3F10-3
CA-MDO2 3F04-3 3 6 100R 4 16 MDO2 MDO6 3 6
CA-MDO3 3F04-4 4 5 100R 5 15 MDO3 10K
3F10-4
CA-MDO4 3F05-1 1 8 100R 6 14 MDO4 MDO7 4 5
CA-MDO5 3F05-2 2 7 100R 7 13 MDO5 10K
CA-MDO6 3F05-3 3 6 100R 8 12 MDO6
CA-MDO7 3F05-4 4 5 100R 9 11 MDO7
3F12
IF07 CA-RDY +3V3

10
10K
3F11-2
CA-WAITn 2 7
10K
3F11-3 IF08
+3V3 CA-INPACKn 3 6
+5VCA
10K
2F03 3F11-4
15-BIT ADDRESS RES CA-WP 4 5
7F02 10K
100n 3F11-1

20
74LVC245A CA-VS1n 8 1
+3V3
1 10K 1P00
3EN1
3EN2 1
19 CA-ADDENn CA-D03
G3 2
CA-D04 3
XIO-A00 18 2 CA-A00 CA-D05
1 4
2 CA-D06 5
XIO-A01 17 3 CA-A01 CA-D07 6
XIO-A02 16 4 CA-A02 CA-CE1n 7
XIO-A03 15 5 CA-A03 CA-A10 8
XIO-A04 14 6 CA-A04 CA-OEn 9
XIO-A05 13 7 CA-A05 CA-A11 10
XIO-A06 12 8 CA-A06 CA-A09 11
XIO-A07 11 9 CA-A07 CA-A08 12
CA-A13 13
10

CA-A14 14
CA-WEn 15
CA-RDY 16
+3V3
+5VCA 17
2F04 RES 18
CA-MIVAL 19
7F03 CA-MICLK
100n 20
20

74LVC245A CA-A12 21
1 CA-A07
3EN1 22
3EN2 CA-A06 23
19 CA-ADDENn CA-A05
G3 24
CA-A04 25
XIO-A08 18 2 CA-A08 CA-A03
1 26
2 CA-A02 27
XIO-A09 17 3 CA-A09 CA-A01 28
XIO-A10 16 4 CA-A10 CA-A00 29
XIO-A11 15 5 CA-A11 CA-D00 30
XIO-A12 14 6 CA-A12 CA-D01 31
XIO-A13 13 7 CA-A13 CA-D02 32
XIO-A14 12 8 CA-A14 CA-WP 33
11 9
34
35
10

CA-CD1n 36
MDO3 37
MDO4 38
+3V3 MDO5 39
2F05 MDO6 40
8-BIT DATA RES MDO7 41
100n CA-CE2n 42
7F04
20

CA-VS1n 43
74LVC245A 1
3EN1 CA-DATADIR CA-IORDn 44
3EN2 CA-IOWRn 45
19 CA-DATAENn CA-MISTRT
G3 46
CA-MDI0 47
XIO-D00 18 2 CA-D00 CA-MDI1
1 48
2 CA-MDI2 49
XIO-D01 17 3 CA-D01 CA-MDI3 50
XIO-D02 16 4 CA-D02 +5VCA 51
XIO-D03 15 5 CA-D03 52
XIO-D04 14 6 CA-D04 CA-MDI4 53
XIO-D05 13 7 CA-D05 CA-MDI5 54
XIO-D06 12 8 CA-D06 CA-MDI6 55
XIO-D07 11 9 CA-D07 CA-MDI7 56
MOCLK 57
10

CA-RST 58
CA-WAITn 59
CA-INPACKn 1X07 1X04 1X08 1X01 1X10 1X11
60 REF EMC HOLE EMC HOLE REF EMC HOLE REF EMC HOLE HOOK1 HOOK1
+3V3 CA-REGn 61
2F06 MOVAL 62
CONTROL RES MOSTRT 63
7F05 MDO0
100n 64
20

74LVC245A MDO1 65
1 MDO2
3EN1 66
3EN2 CA-CD2n 67
19 CA-ADDENn 68
G3
71 69
XIO-D11 18 2 CA-REGn 72 70
1
2
XIO-D09 17 3 CA-CE1n 92789-055LF
XIO-D08 16 4 CA-CE2n
XIO-OEn 15 5 CA-OEn
XIO-WEn 14 6 CA-WEn
XIO-D14 13 7 CA-IORDn
XIO-D15 12 8 CA-IOWRn
CA-WAITn 11 9 XIO-D10
10

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_010_110504.eps
110504

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 138

Flash

Flash
B01B B01B

+3V3

2F20

2F21
100n

100n
7F20

12

37
NAND04GW3B2DN6F
VCC
1
2
[FLASH] 3
4G 16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
IF21 25
NAND-CE1n
26
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
IF22 WE
NAND-WPn 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
48

10K
3F19 VSS

13

36
+3V3

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_011_110504.eps
110504

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 139

USB Hub

USB Hub
B01C B01C

+3V3

USB-OVR1
3FL2
+5V
+T 0R3

100n
100n

100n

100n
1u0

10n

10n
10n

2FLA 1n0

2FLB 1n0

2FLC 1n0
3FL4-4 FL33
4 5 +5V-USB2

2FL2

2FLD
2FL5

2FL3
USB1 (TOP)

2FL1
100K

2FL4
2FL9
2FL8
1FL5
1 3 3 3FL4-3 6 1P08
100K +5V-USB1 1
24M FL36 2
USB1-DM
4
2

3FL4-2
2FL6

2FL7

7FL5 2 7 FL37 3
12p

12p

USB1-DP

+3V3
11
15
19
23
27
33
39
55
CY7C65621-56LTXCT 4

3
7
100K IFLF
FL32 5 6
IFL4 VCC
21 35 1 3FL4-1 8
XIN GREEN1
36
IFLG AMBER1 100K USB-16-PBT-B-30-CU1-BRF
22
XOUT
37
GREEN2

3FL7

9FL3
3FLD 10K 45 38

10K
+3V3 SELFPWR AMBER2 3F32
+5V
1
3FLE-1
8 26 29 USB2 (BOT)
+5V VBUSPOWER PWR1 IFLB 3F34-4 +T 0R3 FL43
30 9FLE 4 +5V-USB1 1P07
100K IFLA OVR1
46 100K +5V-USB2 1
RESET
2 3FLE-2 7 31 USB2-DM FL40 2
PWR2 3F34-3
9F26 IFL1 17 32 3 6 USB2-DP FL41 3
100K D- OVR2
9F25 IFL2 18 4
3FLE-4 D+ 100K
4 5 25 IFLC 3FLA 10K +3V3 FL42 5 6
SPI_CS
9FLC 13 48 IFLD 3FLB 15K 2 3F34-2 7
100K 9FLD DD1- SPI_SCK +3V3
14 49 IFLE 3FLC 10K 100K USB-16-PBT-B-30-CU1-BRF
DD1+ SPI_SD
3 3FLE-3 6
3F34-1
100K 9 58 1 8
DD2-
10 59
3FLF DD2+ 100K
+3V3 60
61 +3V3 RES 1 9FL1-1 8
10K
9FLG

9FLH
9FLF

9FLJ

RESET-USBn 62 RES 2 9FL1-2 7


USB1-DM 63 RES 3 9FL1-3 6
USB1-DP 64 RES 4 9FL1-4 5
USB-DM 65
USB-DP 66 +5V 1 9FL2-1 8
USB2-DM 67 2 9FL2-2 7
USB2-DP 68 3 9FL2-3 6
USB-WIFI-DDn 69 4 9FL2-4 5
IFL3
USB-WIFI-DDp 53
VIA
70
RES 3FLJ
(WIFI)
51 RES 71 RES
72 +T 0R3 1F24
USB2-DM 9FLK 5 73 +3V3-1 FL38 1
USB2-DP 9FLL 6 74 USB-WIFI-DDn FL39 2
42 75 USB-WIFI-DDp FL30 3
3FLG
+3V3 41 76 4

FL31
10K 54 77 5
USB-OVR1 1 NC 78 6 7
2 79
3FLH
+3V3 44 80 502386-0570
10K 43 81
52 82
GND
GND HS
4
8
12
16
20
24
28
34
40
47
50
56

57

SCENARIO 1P07 1P08 1F24 3FLG 3FL2 3FL4 3FL7 3F32 3F34 7FL5 9FLE 9FLC/D 9F25/6 9FL2 9FL3 9FLF/G 9FLH/J 9FLK/L
1x USB N Y N N N N N Y N - N N Y N N N N N
1x USB + WIFI N Y Y Y N N Y Y Y CY7C65621 N N N Y N N Y N
2x USB Y Y N Y Y Y N Y Y CY7C65621 Y Y N N N Y N N
2x USB + WIFI Y Y Y N Y Y Y Y Y CY7C65631 N N N Y Y N Y Y

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_012_110504.eps
110504

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 140

SD Card

SD-Card
B01D B01D

3F40 FF45
+3V3 +3V3-SD
+T 0R3

22u 16V
2F40
+3V3

3F41-1 IF47 3F44-1


1 8 SDIO-DAT3 SDIO-DAT3 1 8 FF47
1P09-1
47K 3F41-2 100R 3F43-2
2 7 SDIO-CMD SDIO-CMD 2 7 FF48
1
47K 100R 2
+3V3-SD 3
3F45 RES 3F44-4 4
SDIO-CLK SDIO-CLK 4 5
5
FF49
10K 100R 6
7
3 3F41-3 6 SDIO-DAT0 SDIO-DAT0 3 3F43-3 6 FF41
8
47K 100R 9
4 3F41-4 5 SDIO-DAT1 SDIO-DAT1 4 3F43-4 5 FF42 13 14 FF46
15 16
47K 100R
3 3F42-3 6 SDIO-DAT2 SDIO-DAT2 2 3F44-2 7 FF43
47K SCDA7A0200
100R

1P09-2
3F42-1 FF44
1 8 SDIO-CDn SDIO-CDn 10
47K 11
12
2 3F42-2 7 SDIO-WP SDIO-WP FF50
SCDA7A0200
47K

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_013_110504.eps
110504

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 141

PNX85500 Control

PNX85500-Control
B01E B01E

+3V3-STANDBY +3V3-STANDBY

+3V3-STANDBY
+3V3 +3V3 +3V3

RES
2F49

100p

100n
2F52

RES
10K
3F66

3F52

10K
8
7F52

3F67
M25P05-AVMN6

10K
BACKLIGHT-BOOST
VCC IF50
PNX-SPI-SDI IF51 2
Q D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
512 K IF52
6 PNX-SPI-CLK
FLASH C
IF53

3F68 RES
1 PNX-SPI-CSBn
S
IF54
3 IF55

47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES
7 BC847BPN(COL) 6
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES IF56
VSS SPI-PROG BC847BPN(COL)
4 2
IF57
1
4

IF62 5
FF04
SDM
3

3F53 FF58
9CH0
10K

RES

RES
2F53

3F69

3F54

RES
1K0
1u0

10K
+3V3
MAIN NVM

DEBUG ONLY
RES
IF58 1F52
2F58 RES FF61 3F62 100R
SCL-SSB 1 SCL
FF62
100n 2
7F58 SDA-SSB 3 SDA
3F63
8

FF63 100R 4 5

10K

3F58 (8K 8) 7
WC
EEPROM 3F59 FF55
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R 3F60 FF56
3 5 SDA-UP-MIPS
2 SDA
100R
4

FF57

DEBUG / RS232 INTERFACE LEVEL

RES SHIFTED
1F51
FF65 3F64
TXD-UP 1
100R
FF64
2
FOR
RXD-UP
FF66 3F65 UP
3
RESET-STBYn 100R
SPI-PROG
4 DEBUG
5
7 6
USE ONLY

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_014_110504.eps
110504

2011-Jun-01 back to
div. table
Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 142

Tuner

Tuner
B01F B01F
FF71
* 1T01 IF11

15
TUNER 14

4MHZ_REF
PNX-IF-P

I2C_ADR

I2C_SDA

IF_OUT1

IF_OUT2
RF_AGC

I2C_SCL

B+_TUN
2F71

B+_LNA

9F00

9F01

9F02

9F03
16 RF_IO 13 +5V-TUN-PIN

TUN

NC
10n

2F72

2F73
7F75 * *

2F65 RES
1
UPC3221GV-E1
* *

10

11

12
1

VCC

15p
IF75 2F74 IF73 2F75 IF76 AF72

2F70 RES
FF74 IF74 3F79-1
TUN-P1 1F75 2 INPUT1 OUTPUT1 7 1
1 5
I O1 10n 10n 220R IF16

RES
5F71

2F76

2F77

5F74

2F62
2 4

2p2

1p0
IF77
4n7

6p8

6p8

6p8

6p8

6p8

6p8

6p8
ISWI O2 2F78 IF78

3F82 RES
3 INPUT2 OUTPUT2 6 IF80
2F79 3F79-4
3 4 * * * *
GND IF81 10n

820R
RES 5F76

330n
GND1

GND2
10n 220R AF73
RES 2F81

2F9C

2F9D
2F9A

2F9B
2F97

2F98

2F99

X7251M 4 VAGC AGC CONTROL


36M17

2F80

2F82
8

5
* *
FF76 AF71 TUN-IF-N PNX-IF-N
PNX-IF-AGC IF82 3F77
RF-AGC AF70 TUN-IF-P
IF79
100n

FF00 4K7
4n7

* 9F04 IF-AGC
IF-AGC
FF01
IF72 +5V-TUN-PIN

100p

100p
2F61
2F60
2F59

9F05

9F06
FF75

BA591
2F85

3F71

6F72

3F72

2F92
4K7

1K0
47n

10n
IF-N-DVBT2
* * *

RES 2F95

RES 2F96
2F93

100n

IF86 2F90 3F80 IF12 2F63 IF13


IF-
10n 220R 10n

3F78

5F66

2F66
680n
3K3

22p
3 5F73 2

5F70

470n
+5V-TUN-PIN

TUN-IF-N IF14 2F64 IF15


3F81
IF+
TUN-IF-P 4 1
2F91 RES 220R 10n
ATB2012

TUN-P6
TUN-P7
FF81
FF82
IF89
10n
* For BR NIM Tuner only
IF90
SELECT-SAW 7F70 IF-P-DVBT2
2F84 3F76 IF87
SCL-TUNER PDTC114EU

RES
15p 47R

10n
TUN-P6

2F94
2F86 3F75 IF88
SDA-TUNER
15p 47R
TUN-P7 * For EU Hybrid Tuner only
9F71
5F72 RES
+5V-TUN +5V-TUN-PIN
30R 2F88

22u

* Remarks Component
Item No.
Europe Brazil
1T01 TH26X3 FA23X7
2F61 4u7 RES
2F62 10p 5p6
9F02 RES Used
9F03 RES Used
9F04 RES Used
9F05 RES Used
9F06 RES Used
2F73 1p0 RES
2F82 1p0 RES
2F72 15p 12p
2F80 15p 12p
2F77 22p 18p
5F71 680n 560n
5F74 820n 680n

2 2011-02-01

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 143

Toshiba Supply

Toshiba supply
B01G B01G

+3V3 +1V2-BRA-DR1

+1V2-BRA-VDDC

5FA3

5FA4
30R

30R
7FA3
LD1117DT12
FFAF
3 2 +1V2-FE
IN OUT
COM * FOR DVBT-2

2FA2

2FA3

2FA4
100n

100n

10u
1
FFA2

2 2011-02-01

SPB SSB
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 144

HDMI

HDMI
B01H B01H

HDMI CONNECTOR SIDE


1P05
1 DRX2+ DIN-5V
2
3 DRX2-
4 DRX1+
5
6 DRX1-
7 DRX0+
8
9 DRX0-

1 3FBF-1 8
10 DRXC+

47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 3FBF-2 7 DIN-5V
16
17 FFB3 47K
18 DIN-5V
19 FFB4 DRX-HOTPLUG
FFB5 21 20
23 22
FFB6

2 2011-02-01

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 145

VGA

VGA
B01I B01I
FFC1 3FC5
R-VGA

CDS4C12GTA
18R

2FC1

1FC1

RES 6FC1
100p

12V
FFC2 3FC6
G-VGA

CDS4C12GTA
18R

RES 6FC2
2FC2

1FC2
100p

12V
1E05
1
2
3 3FC7
B-VGA
4

CDS4C12GTA
FFC3 18R
5

RES 6FC3
2FC3

1FC3
100p
6

12V
VGA 7
8
CONNECTOR 9 FFC4
10
11
FFC5
12 9FC5 H-SYNC-VGA
13
14

RES 6FC4

CDS4C12GTA
2FC4

1FC4

3FC3
15

12V

4K7
47p
17 16
FFC6
1216-02D-15L-2EC

FFC7
9FC6 V-SYNC-VGA

CDS4C12GTA
RES 6FC5
2FC5

1FC5

3FC4
12V
47p

4K7
9FC1 VGA-SDA-EDID-HDMI
RES
3FC1 FFC8
9FC2 VGA-SDA-EDID
RES

CDS4C12GTA
10K

6FC6
2FC6

12V
47p
9FC3 VGA-SCL-EDID-HDMI
RES
3FC2 FFC9
9FC4 VGA-SCL-EDID

CDS4C12GTA
10K RES
2FC7

6FC7

12V
47p

+5V-VGA

CDS4C12GTA
2FC8

1FC6

6FC8

12V
47p

2 2011-02-01

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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 146

Temp sensor & headphone

Temperature sensor + headphone


B01J B01J

+3V3

9FD1 RES

9FD2 RES
3FD1
RES

1K0

2FD1

3FD2
100n

1K0
LTST-C190KGKT
RES

8
7FD1
LM75BDP

6FD1

+VS
3 7 IFD1
OS A0
3FD3 IFD2
SDA-SSB 1 6 IFD3
SDA A1
3FD4 100R IFD4
SCL-SSB 2 5 IFD5
SCL A2

GND
100R

RES
3FD6

3FD7

9FD5
1K0

1K0
4
RES
1329
1
2
3
5 4

502382-0370

1328
FFDA MSJ-035-69A-B-RF-PBT-BRF
AMP1
2
AMP2 3
1

CDS4C12GTA

CDS4C12GTA
FFDB
5
8
3FDG-1

3FDG-4

2FDC

2FDD
1FD2

6FD2

1FD3

6FD3
1K0

1K0

12V

12V

22n

22n
FFDC
RES

RES
4
1

2 2011-02-01

SPB SSB
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 147

Tuner Brazil

Tuner Brazil
B01K B01K

5FE0 IF63 IF64


+2V5-BRA +1V2-BRA-VDDC
30R

2FE0

2FE3

2FE4

2FE5

2FF0

2FF1
100n

100n

100n

100n
1u0

1u0

+3V3-BRA-FLT
AGND
5FE3 IF65 IF66 5FE4
+3V3-BRA-FLT
+3V3-BRA
30R 30R

2FE6

2FF2

2FF3

2FF4

2FF5

2FF6
100n

100n

100n

100n
1u0

1u0
AGND
5FE5 IF67 IF68
+1V2-BRA-DR1
30R 5FE7 IF48
+3V3 +3V3-BRA
2FE8

2FF7

2FF8

2FF9
100n

100n
1u0

1u0
30R

IF69 5FE8
+2V5-BRA
30R 7FE3
1FE0 LD3985M25

2FG0

2FG1
100n
1 3

1u0
5FE9 FF03
1 5
25M4 +5V IN OUT +2V5-BRA
4 2 30R
2FG2

2FG3

3 4
18p

18p

INH BP
COM
7FE0
32

22

20

16
36
56
63

13
35
49
64

34
48

43

2FH2

2FH3

2FH4
TC90517FG

1u0

10n

1u0
2
AGND AGND AGND
AD_DVDD

AD_AVDD

PLLVDD

DR2VDD
VDDC VDDS

DR1VDD
2FH5 * To be drawn near PNX85500
19 21
I FIL
AGND
X 1n5
18 58 3FG6-4 4 5 33R TS-BR-VALID 1 9F27-1 8 * TS-FE-VALID
O PBVAL
DFE6
3 53
0 RERR
2 XSEL
1 DFE7
54
RLOCK
IF+ 2FG4 10n IF17 30
P DFE8
IF- 2FG6 10n IF18 29 ADI_AI 55
N RSEORF
2FG7 100n 28 59 3FG6-3 3 6 33R TS-BR-SOP 2 9F27-2 7 * TS-FE-SOP
BFE2 P SBYTE
2FG8 100n 27 ADQ_AI
N DFE9
52
AGND BFE3 SLOCK 5FG0
2FG9 100n 24
P
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-BR-CLOCK 9F28 * TS-FE-CLOCK
N SRCK 30R
AGND
2FH7 100n 26 60 3FG6-2 2 7 33R TS-BR-DATA 4 9F27-4 5 * TS-FE-DATA 5FG2
AD_VREF SRDT
DFF1
39 38
AGND DTCLK STSFLG1 30R
IF27 3FE5 IF28 AGND
40 9 IF-AGC
+3V3-BRA-FLT DTMB AGCCNTI
18K

2FH8
8 10

10n
S_INFO AGCCNTR
DFF2
3FE6 10K 1 51
0 STSFLG0
41 TSMD
1
42
SYRSTN
3FE7 10K IF29 7
AGCI
6 3FG2-1 RESET-SYSTEMn
0 3FG2-2
11 SLADRS 5 10K
CKI 1
10K
3FG4-2
AD_DVSS
AD_AVSS

SCL-SSB 3FE8 100R IF49 45 12


SCL SCL
PLLVSS

SDA-SSB 3FE9 100R 46 TN 14 4K7 3FG4-1


SDA SDA +3V3-BRA-FLT
4K7
VSS
23

31

17

4
15
33
37
44
47
50
57
62

AGND AGND

2 2011-02-01

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10-15 B02 313912365192


NANDflash - conditional access

PNX85500 NAND Flash - Conditional Acces +3V3

B02A B02A

3S1W

10K
7S00-5
PNX85500

FLASH D25 XIO-D00


00
D26 XIO-D01
01
C24 XIO-D02
02
D23 XIO-D03
03
NAND-ALE D22 C23 XIO-D04
ALE 04
NAND-CLE C21 NAND B23 XIO-D05
CLE 05
A22 XIO-D06
06
XIO-A00 J25 E22 XIO-D07
00 07
XIO-A01 J26 XIO_D F24 XIO-D08
01 08
XIO-A02 H21 F25 XIO-D09
02 09
XIO-A03 H22 F26 XIO-D10
03 10
XIO-A04 H23 E23 XIO-D11
04 11
XIO-A05 H24 E24
05 12 IS26 3S15
XIO-A06 H25 E25 INPACK INPACK
06 13
XIO-A07 H26 E26 XIO-D14
07 14 10K
XIO-A08 G21 XIO_A D24 XIO-D15
08 15
XIO-A09 G22
09
XIO-A10 G23 B22 XIO-OEn
10 OE_
XIO-A11 G24 XIO C22 XIO-WEn
11 WE_
XIO-A12 G25
12
XIO-A13 G26 B21 +3V3
13 CLK_BURST
XIO-A14 F22
IS25 14
XIO-A15 F23 E21 NAND-CE1n
15 CE1_
D21
CE2_
A20
NAND RDY2

3S1V

RES
F21

10K
RDY1 NAND-RDY1n
A21 9S08 NAND-WPn
WP_
IS00

+3V3

3S1X

10K
7S00-11
PNX85500

CA-MDI0 3S01-1 8 1 P21 VIDEO_STREAM N26 CA-MDO0


0 0
CA-MDI1 33R 7 3S01-2 2 P22 M21 CA-MDO1
1 1
CA-MDI2 3S01-3 6 3 33R P23 M22 CA-MDO2
2 2
CA-MDI3 33R 5 3S02-4 4 P24 M23 CA-MDO3
3 3
CA-MDI4 7 3S02-2 2 33R P25 MDI MDO M24 CA-MDO4
4 4
CA-MDI5 33R 8 3S02-1 1 P26 M25 CA-MDO5
5 5
CA-MDI6 6 3 33R N21 M26 CA-MDO6
6 6
CA-MDI7 3S02-3 33R 5 3S01-4 4 N22 L21 CA-MDO7
7 7
33R
CA-ADDENn J22
ADD_EN

CA-DATADIR K25 K23 CA-VS1n


DATA_DIR 1
VS K24 9S00 CA-MOCLK
2
CA-DATAENn K26
DATA_EN
K21 CA-CD1n
3S03 1
CA-MICLK N23 CD K22 CA-CD2n
I 2
10R
MCLK
CA-MOCLK L25
O CA
+3V3
N24
MISTRT
3S31
CA-MIVAL N25 TS-FE-DATA 3S1R
MIVAL
33R 560R
CA-MOSTRT L22 TS-FE-CLOCK 3S1S
MOSTRT
560R
CA-MOVAL L23 TS-FE-VALID 3S1T
MOVAL
560R
J21 TS-FE-SOP 3S1U RES
OOB_EN
560R
RES
CA-RDY L24
RDY

CA-RST L26 T21 TS-FE-DATA TS-FE-DATA 3S23


RST DATA
T23 TS-FE-ERR 470R
ERR
RES J23 T22 TS-FE-CLOCK TS-FE-CLOCK 3S24
VCCEN TNR_SER1 MICLK
CA-MISTRT 9S01 R23 TS-FE-VALID 470R
MIVAL
J24 R22 TS-FE-SOP TS-FE-VALID 3S28
VPPEN SOP
+3V3 470R
TS-FE-SOP 3S29 RES

RES 470R
3S04
2S09

100n
33R

7S02
5

1
4
2

2 2011-02-01
3
74LVC1G08GW
SPB SSB
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 149

SDRAM

PNX85500: SDRAM
B02B B02B

7S00-8
PNX85500
DDR2-BA0 H1 MEMORY J1 DDR2-A0
0 0
DDR2-BA1 H2 J3 DDR2-A1
1 BA 1
DDR2-BA2 G1 K1 DDR2-A2
2 2
G4 DDR2-A3
3
DDR2-DQM0 D1
0 M0 4
L3 DDR2-A4
DDR2-DQM1 D5 G3 DDR2-A5
1 5
DDR2-DQM2 R3 DM L2 DDR2-A6
2 6
DDR2-DQM3 T5 H5 DDR2-A7
3 7
L1 DDR2-A8
A 8
DDR2-D0 F3 J5 DDR2-A9
0 9
DDR2-D1 C2 J2 DDR2-A10
1 10
DDR2-D3 F2 M3 DDR2-A11
+1V8 2 11
DDR2-D2 C3 J4 DDR2-A12
3 12
DDR2-D6 B4 M2 DDR2-A13
4 13
DDR2-D5 F1 K5 DDR2-A14
5 14
DDR2-D4 C1
6
DDR2-D7 E1 N5 3S30 DDR2-CLK_N
7 N

100u 2.0V
F4 CLK N4 3S33 DDR2-CLK_P
180R 1%
180R 1%

DDR2-D8 8 P 10R
3S20

3S06

2S12
DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%

DDR2-D14 14 P
3S22

DDR2-D15 F5
15
U3 DQ R1
180R 1%

DDR2-D16 DDR2-DQS2_N
16 N
3S07

DDR2-D17 P2 DQS2 R2 DDR2-DQS2_P


17 P
DDR2-D19 U2
18
DDR2-D18 P3 T3 DDR2-DQS3_N
19 N
DDR2-D22 N1 DQS3 T4 DDR2-DQS3_P
20 P
DDR2-D23 U1
21
DDR2-D20 P1 K3 DDR2-CAS
22 CASB 3S6Q
DDR2-D21 T1 K4 DDR2-CKE DDR2-CKE
23 CKE
DDR2-D24 V4 L5 DDR2-CS
24 CSB 10K
DDR2-D30 R5 M4 DDR2-ODT
25 ODT
DDR2-D26 U5 M1
26 PCAL 3S6P
DDR2-D25 P5 M5 DDR2-RAS DDR2-ODT
27 RASB
DDR2-D28 N3 H3 DDR2-WE
28 WEB 10K
DDR2-D31 V3 RES
29
DDR2-D27 R4 A2 DDR2-VREF-CTRL2
30 1
DDR2-D29 V5 VREF V1 DDR2-VREF-CTRL3
31 2

IS42

2S20

2S17

1%
2S24

2S25
100p

100n

100n

100p

3S0V

261R
2 2011-02-01

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Digital video in

PNX85500: Digital video in


B02C B02C

7S00-6
PNX85500

HDMIA-RX2+ T25 HDMI_DV


P
HDMIA-RX2- T26 RX0_A
N

HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A

HDMIA-RXC+ W25
P
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W
W24
RREF
12K

2S2E
RES

10u

2 2011-02-01

SPB SSB
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Audio

PNX85500: Audio
B02D B02D
3S0Z
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER
4R7 +24V-AUDIO-VDD
100R +3V3
3S53-2

2S3J

220n
7S08
LD3985M25
100R
1 IS1H 1 3S16-1 8
3S12-1 2S2W 3S53-3 FS08 FS03
AUDIO-IN1-L 8 10K 5 1
OUT IN
22K 1u0 100R IS12 IS13 4

10u RES
4 3 4S14 ADAC(1) 12 7S05-4
2 3S53-4 BP INH +2V5 3S38
LM324 14

2S2R

2S2S
3S16-2 7

10u
2 3S12-2 IS1J 2S2V +AUDIO-L
IS02

1u0 RES
AUDIO-IN1-R 7 10K COM 13
100R 100R

2S2T

100n
22K 1u0 11

2S34
2
3S16-3 3 6 2S2Z
IS1M
10K
1u0 3S36-2 10K
2 7
IS0V 8 1
3S16-4 5 2S2Y 10K 3S36-1

100u 4V
3S51

2S42

2S41
4R7
4

1u0
2S2G
10K
1u0
3S17-4 47p
IS0R 4 5 7S00-2
3S13-4 2S31
AUDIO-IN3-L 10K PNX85500 +24V-AUDIO-VDD
4 5 2S36
22K 1u0
AE10 AUDIO AC7 1 3S3G-1 8 ADAC(1)
3 L P
3S17-3 6 AF10 AIN1 ADACL AB7 IS1N
3S13-3 2S30 R N 1u0 33R 3S3G-3 IS03 4
AUDIO-IN3-R 3 6 10K 3 6 ADAC(2) ADAC(2) 10 7S05-3
LM324 8 3S39
AD10 AC6 -AUDIO-R
22K 1u0 L P 33R
AC10 AIN2 ADACR AB6 9
3S17-1 R N 100R
IS1P 1 8
3S13-1 2S33 11
AUDIO-IN4-L 10K AE9 AD7
L 1 3S3G-2
1 8 AF9 AIN3 AE7 2 7 ADAC(3)
22K 1u0 R 2
2 AF7 33R
3 3S3G-4
IS1Q 3S17-2 7 AD9 ADAC AD6 4 5 ADAC(4)
3S13-2 2S32 L 4 IS1S
AUDIO-IN4-R 2 10K AC9 AIN4 AE6 33R
7 R 5
AF6
22K 1u0 6
AF8
L 3S36-3 10K
AE8 AIN5 AD4 3 6
R OSCLK
3S10 AD1 5 4
I2S_OUT SCK 3S3H 10K 3S36-4
2S2L 100R AB9 AD2 ADAC(5)
POS WS 2S2H
IS1B AB8 VR_AADC 33R
1u0 NEG
IS19 AE1
1 3S3U 47p
AD8 AF2 ADAC(6)
VREF_AADC 2
AE3 +24V-AUDIO-VDD
IS1A I2S_OUT_SD 3 33R
AC8 AF3
VCOM_AADC 4
3S3F
AF5
SPDIF_OUT

2S3D

2S3C

2S3B

2S3A

2S39

2S38
1n0

1n0

1n0

1n0

1n0

1n0
56R DBS8 AE5 IS07 4
SPDIF_IN1
2S3G
2S3H
2S3E
2S3F

100n

100n

3 7S05-1
10u

10u

ADAC(5)
LM324
9S06
RES

1 AUDIO-OUT-L
2

11

3S37 3S6L

10K 22K
2S2K

+3V3 47p
+3V3-ARC

+24V-AUDIO-VDD
3S11 IS1L
1R0

4
2S3Q

100n

ADAC(6) 5 7S05-2
LM324 7
IS06 AUDIO-OUT-R
6

11
7S09-1
3S6N
14

74LVC00APW SPDIF-OPT
IS1D
SPDIF-OUT-PNX SPDIF-OUT-PNX 1 & 47R
3
2
3S34 3S32
+3V3
7

10K 22K
+3V3
2S2J

47p
+3V3-ARC
3S19

+3V3-ARC
10K

7S09-2
14

74LVC00APW 7S09-3
14

4 & 74LVC00APW
6 9 & 2S3L IS1K 2S3M IS44
IS1E 180R
SEL-HDMI-ARC 5 8 eHDMI+
10 3S6M
+3V3 100n 100n
7

3S25

68R
+3V3-ARC

7S09-4
14

74LVC00APW
12 &
11
13
+3V3
7

2 2011-02-01

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MIPS

PNX85500: MIPS
B02E B02E

+3V3
7S00-3
PNX85500
RES
CONTROL C25 1
3S56
2
3S69 1F10
IS05 SDA SDA-UP-MIPS SDA-UP-MIPS
3S45 2 3S57 FS44
BOOTMODE 1 C26 100R 1 SCL-UP-MIPS SCL-UP-MIPS 3S6A 4K7 4K7 EJTAG-TRSTn-PNX85500
+3V3 SCL 1
100R EJTAG-TMS-PNX85500 FS49
10K 3S58 2
BOOTMODE Y21 B26 1 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
3S40
3D-LR 3D-LR IS17 9S09 IS16 Y22 GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY
+3V3 GPIO_1 SCL 4
10K DS52 RXD1-MIPS Y23
GPIO_2
100R EJTAG-TDI-PNX85500 FS52
5 USE ONLY
TXD1-MIPS Y24 B25 1 3S5Y 2 SDA-SSB SDA-SSB 3S6D 2K2
3S82 GPIO_3 SDA 6
BOOST-PWM RXD2-MIPS W21 3 A24 100R 1 2 3S5Z SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53
+3V3 GPIO_4 SCL 7
TXD2-MIPS W22 100R
10K GPIO_5 3S60 8
3S80 FS10 TXD2-MIPS GPIO6 W23 B24 1 2 SDA-TUNER SDA-TUNER 3S6F 2K2 10 9
+3V3 GPIO_6 SDA
3S81 10K FS11 RXD2-MIPS PNX-SPI-CS-BLn V22 4 A23 100R 1 2 3S61 SCL-TUNER SCL-TUNER 3S6G 2K2
+3V3 GPIO_7 SCL
10K BOOST-PWM V23 100R
RES 3S21 GPIO_10
+3V3 GPIO6 SELECT-SAW U23 AA25 EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K
IS04 GPIO_11 TRSTN
AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3
10K TMS +3V3-STANDBY FS57 BM08B-SRSS-TBT
USB-DM R26 AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
3S62 PNX-SPI-CS-BLn DN TCK
USB-DP R25 AB26 EJTAG-TDO-PNX85500 EJTAG-TDO-PNX85500 10K 2 7 3S6H-2
+3V3
IS4Z R24 DP USB TDO
AB25 EJTAG-TDI-PNX85500 EJTAG-TDI-PNX85500 10K 4 5 3S6H-4
10K RREF TDI
10K
3S00
AE4 RESET-SYSTEMn
3S55 RESET_SYS
5K6
3S64 FS64 33R
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM
10K
AC5
CLK_54_OUT

3S26

3S27
3S6J

RES 10K

10K

10K
3S83
+3V3 RXD1-MIPS
10K
+3V3 +3V3
3S84
+3V3 TXD1-MIPS IS40
3S72
10K PXCLK54
47R

RES

+3V3

2S89

100n +3V3

3
7S01
PCA9540B
3S65
VDD SC0 5 SCL-DISP SCL-DISP 2 1
4K7
3S66
SC1 8 SCL-BL SCL-BL 2 1
4K7
3S67
SCL-SET 1 SCL SD0 4 SDA-DISP SDA-DISP 2 1
I2 C 4K7
INP 3S68
-BUS
SDA-SET 2 SDA FIL SD1 7 SDA-BL SDA-BL 2 1
CTRL
4K7
VSS

6
FS31

9S10 SCL-BL
IS08
SCL-SET 9S11 FS2W SCL-DISP

9S12 FS2Y SDA-DISP


IS09
SDA-SET 9S13 SDA-BL

7S00-4
PNX85500

ETH-RXCLK AA3
RXCLK ETHERNET
ETH-RXD(0) Y5
0
ETH-RXD(1) Y6 AA2 ETH-TXCLK
IS50 1 TXCLK
ETH-RXD(2) AB4 RXD ETH
2
ETH-RXD(3) AC1 AA1 ETH-TXD(0)
3 0
AA4 ETH-TXD(1)
1
ETH-RXDV AC2 TXD AB1 ETH-TXD(2)
RXDV 2
ETH-RXER Y4 AB2 ETH-TXD(3)
RXER 3
ETH AA5 ETH-TXEN
TXEN
SDIO-DAT3 W2 AB3 ETH-TXER
CC_DAT3 TXER
SDIO-CLK W1 AC3 ETH-COL
CLK COL
SDIO-CMD W6 Y2 ETH-CRS
CMD CRS
SDIO-DAT0 W5 Y3 ETH-MDC
0 MDC
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
SDIO-CDn U6
SDCD
SDIO-WP V6
SDWP

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_025_110504.eps
110504

2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 153

Video out - LVDS

PNX85500: Video out - LVDS


B02F B02F

7S00-7
PNX85500

PX1A- A7 LVDS D7 PX3A-


N N
PX1A+ B7 A A E7 PX3A+
P P

PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P

PX1CLK- 9S90 C10 E10 9S94 PX3CLK-


N N
PX1CLK+ 9S91 B10 CLK CLK D10 9S95 PX3CLK+
P P

PX1C- A9 LOUT1 LOUT3 D9 PX3C-


N N
PX1C+ B9 C C E9 PX3C+
P P

PX1D- A11 D11 PX3D-


N N
PX1D+ B11 D D E11 PX3D+
P P

PX1E- C12 E12 PX3E-


N N
PX1E+ B12 E E D12 PX3E+
P P

PX2A- A14 D14 PX4A-


N N
PX2A+ B14 A A E14 PX4A+
P P

PX2B- C15 E15 PX4B-


N N
PX2B+ B15 B B D15 PX4B+
P P

PX2CLK- 9S92 C17 E17 9S96 PX4CLK-


N N
PX2CLK+ 9S93 B17 CLK CLK D17 9S97 PX4CLK+
P P
LOUT2 LOUT4
PX2C- A16 D16 PX4C-
N
PX2C+ B16 N C E16 PX4C+
C P
P
PX2D- A18 D18 PX4D-
N
PX2D+ B18 N D E18 PX4D+
D P
P
PX2E- C19 E19 PX4E-
N
PX2E+ B19 N E D19 PX4E+
E P
P

2 2011-02-01

SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_026_110504.eps
110504

2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 154

Standby controller

PNX85500: Standby controller


B02G B02G

+1V1

POL
IS3B

5S04
RES

30R

2S10

100n
1u0
2S13

2S37

1u0

9S24
RES
2S11

100n IS20 DS50 2S4G


3
1 10p

AC17
AA17

AF26
2

1S02

54M
7S00-9
PNX85500 4
2S4F
1

VDDA_1V1_DCS

VDDA_ADC2V5

VDD_XTAL
+3V3-STANDBY 2S4D AE17 +3V3-STANDBY
3S1B XTAL_IN 10p
1n0 RC RC AD19
0
3S1C RES 10K TACHO TACHO AE19 AF17
1 XTAL_OUT
10K 3S1D CEC-HDMI CEC-HDMI AF19
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20 AA26 RESET-STBYn
3 RESET_IN
10K 3S1F SDM SDM AB20 IS3F
7 3S44
+3V3-STANDBY
3S3L 10K STANDBY EA
AB24 EA EA
RES LCD-PWR-ONn LCD-PWR-ONn AC20
0 ALE IS3E 10K 3S43
3S3M 10K EJTAG-DETECTn EJTAG-DETECTn AD20 AB23 ALE
3S3N RES 1 ALE
10K LAMP-ON LAMP-ON AE20 IS3D
2 10K
3S3P 10K STANDBY STANDBY AF20 AC26 PSEN PSEN 10K 3S42
3 PSEN
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21 P2
4 RES 3S6V
RES 3S3S 10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 3S2F 100R SDA-UP-MIPS SDA-UP-MIPS
3S3R 5 SDA 3S2G 100R
10K POWER-OK POWER-OK AC21 MC AC24 SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W
6 SCL
3S3T 10K RES ENABLE-3V3n ENABLE-3V3n AD21 RES
7 LED1 RES 3S1P 4K7
+3V3-STANDBY 10K AD26 3S2H 100R LED1
3S1G 0
RXD-UP RXD-UP AE21 PWM AC25 3S2K 100R LED2 LED2 10K 3S41
0 1
3S1H 10K TXD-UP TXD-UP AF21
1 10K
10K DETECT2 AA22 AE23 PNX-SPI-SDO
3S2A 2 SDO
DETECT2 AB22 P3 AF25 PNX-SPI-SDI
3 SDI
AC22 SPI AF24 PNX-SPI-CLK
10K 4 CLK
RES AD22 AF23 PNX-SPI-CSBn
5 CSB
3S1K
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP RES 3S2L
0 0
AV2-BLK AE26 AA18 IS2Z RESET-DVBS RESET-DVBS 10K RES 3S46
10K 1 1
RES AV1-BLK AE25 P5 AD18 RESET-USBn RESET-USBn RES 3S3Y 10K
3S1J KEYBOARD 2 2 +3V3-STANDBY
KEYBOARD AE24 AE18 RESET-ETHERNETn RESET-ETHERNETn 10K RES 3S47
3 3
LIGHT-SENSOR P0 AF18 SEL-HDMI-ARC SEL-HDMI-ARC 3S2S 10K
100K 2S4E 4
AV1-STATUS AF22 AA19 RESET-AVPIP RESET-AVPIP 10K RES 3S2M
RES 4 5

VSS_XTAL
AV2-STATUS AE22 P6 AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES
100n 5 6
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49
7

AD17
3S1L
SPI-PROG SPI-PROG 4K7
10K PNX-SPI-WPn

+3V3-STANDBY +3V3-STANDBY

1 3S2V 2
1K0
9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28
2
FS45 INP
1 IS2U 1
OUTP
5
CD
NC GND

3
9S0D

2S4K

100n
RES
2 2011-02-01

SPB SSB
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2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 155

Power

PNX85500: Power
B02H IS3Q 5S80

30R
+1V1 B02H

RES 10u
2S6A

2S5A
100n
1
5S81
+2V5

2
30R

RES 10u
2S6B

2S5B
100n
1
+1V8
IS3S 5S82

2S26

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67

2S68
100u

100n

100n

100n

100n

100n

100n

100n

100n

100n
+3V3
30R

RES 10u
2S5C

2S5D
100n
SENSE+1V1 c001
5S93
7S00-10

G6

G7
R6
R7
U7

C6
D6
A5
A6
B5
B6

E6
F6

F7
L6
L7
PNX85500 30R +2V5

2S6E 2

220u 6.3V
VDD_1V8

2S4M
2S6D

100n

100n
+1V1 AF1 V20

7
AE2 HDMI_VDDA_1V1 V21

5
AD3

1
2S5G-1

2S5G-3
2S5G-2

2S5G-4

2S5H-1

2S5H-2

2S5H-3

2S5H-4
2S4Q

2S4R
2S43

2S28

2S27

2S23
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100u
AC4 VDD U20

22u

22u

1
AB5 HDMI_VDDA_2V5 U21
H20

4
F11 U22 +2V5-LVDS

2
HDMI_VDDA_3V3_TERM
G11
F13 N6

2S4N

2S4P
100n
G13 VDD_2V5 N7

10u
F15

8
8

5
G15 C7

2S5K-1

2S5K-2

2S5K-3

2S5K-4

2S5J-3

2S5J-1

2S5J-2

2S5J-4
100n

100n

100n

100n

100n

100n

100n

100n

220u 2.5V
F17 C9

2S29
G17 C11
5S85
F19 VDD_2V5_LVDS C14

4
+3V3

2
1 2S6G 2
G19 C16

1
30R

2S6N

2S6C

2S6P
2S6F

100n

100n

100n
100n
J9 C18

10u
J11
AA16
AA8
Y11
Y14

J13 W20
Y16
Y9

7S00-12

1
PNX85500 J15 P20
J17 M20
VSSA
A1 M7 L9 VDD_3V3 K20
+3V3-STANDBY
A10 N2 L11 V7

2S4U
2S4V

100n
A12 N20 L13 Y8

10u
A15 P10 L15
VDD_1V1
A17 P12 L17 Y19
A19 P14 N9 VDD_3V3_SBY Y18
A26 VSS P16 N11 IS3K 5S83
A3 P18 N13 B13
VDDA_1V1_LVDS_PLL +1V1
A8 P4 N15 30R
IS3L

2S4W
2S4Y

100n
B1 P6 N17 AA15

RES 1u0
B20 P7 R9 Y15
VDDA_1V2
C20 T10 R11 AA13
C4 T12 R13 5S95 +2V5
D2 VSS T14 R15 Y12
VSS VDDA_2V5 5S84
D20 T16 R17
30R

6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R

2S4Z
2S51

2S52

2S50
100n

100n
E20 T2 U11

10u
E4 T6 U13 AA7 c000 SENSE+1V2

10u
VDDA_2V5_ADAC
F10 T7 U15
F12 U4 U17 Y17
VDDA_2V5_DCS
F14 V10 J6
F16 V12 AA6 D13
VDDA_2V5_LVDS_BG
F18 V14 Y7
F20 V16 W7 T20 POL

VSSA_1V1_LVDS_PLL

VSSA_2V5_LVDS_BG
VDDA_2V5_USB
F8 V18 F9
G10 V2 G9 Y13
VDDA_2V5_VADC +2V5-AUDIO
G12 Y20

V24 HDMI_AGND
5S94

2S46

100n
J7 Y10

VSSA_USB
VSS +1V1 VDD_1V1_DDR VDDA_2V5_VDAC
30R
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

R21
VDDA_3V3_USB
2S4S

2S5P

2S21
RES

100n
10u

1u0

U24

A13

C13

R20
1

+2V5-AUDIO

2S45

100n
5S87
+2V5
30R

2S55

2S56
100n

1u0
5S88
+2V5-LVDS
30R

2S5M

2S57
100n

10u
5S89
+2V5

2
30R

2S6H

2S6K
100n

100n
2S58

10u
1

1
5S90
+2V5
30R

2S4T

2S53
100n

10u
2SHW

100n
IS58 5S92
+3V3

2
30R

2S6M

2S6L

2S59
100n

100n

1u0
2 2011-02-01

1
SPB SSB
3139 123 6519
TV550 2K11 4DDR EU SD

19101_028_110504.eps
110504

2011-Jun-01 back to
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Circuit Diagrams and PWB Layouts Q552.2E LA 10. EN 156

Analog video

PNX85500: Analog video


B02I B02I
AV1-CVBS 2S87

22n 2S8A Y-SVHS

3S59
47R
Connectivity 22n

3S5B
47R
AV1-R 2S7J

22n 2S22 C-SVHS

3S4J
56R
22n

3S05

56R
EU: SCART1 CVBS-MON-OUT1
AV1-B 2S7K
AP: -

3S5E

560R
22n

3S4L
56R
IS4V

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