No.

of Printed Pages 3 EC-101

Roll No.

B. TECH.
FIRST SEMESTER EXAMINATION, 2015-16
BASIC ELECTRONICS

Time : 3 Hours Max. Marks : 60

Note : (i) Attempt ALL questions.
(ii) Choices are given in each question set.

1. Attempt any Four of the following questions: 3 x 4 = 12

(a) Does a hole in a semiconductor contribute to a flow of current? If
yes, how and if no, how?
(b) Differentiate between transition capacitance CT and diffusion
capacitance CD of semiconductor p-n junction diode.
(c) What do you understand by Hall effect?
(d) Differentiate between avalanche and zener breakdown
mechanisms.
(e) With a neat diagram explain working of a voltage multiplier circuit.
(f) Determine the range of Vi (ie Vi min 220 IR
IL
R
and Vi max) that will maintain the Vi VZ=20V RL 1.2k
zener diode in 'on' state {Fig.(A)}. IZM=60mA

Fig.-(A)

2. Attempt any Four of the following questions: 3 x 4 = 12

(a) Draw and explain input and output characteristics of common base
configuration of npn bipolar junction transistor.
(b) Draw the hybrid equivalent circuit for common emitter configuration
of npn bipolar junction transistor and write expression for Ai, Av, Ri
and Ro.
1 P.T.O.
EC-101 EC-101
(c) The emitter current of a transistor is 10mA if dc=0.99 and 5. Attempt any Two of the following questions: 6 x 2 = 12
ICBO=10A. Calculate the values of IC and IB. (a) Find the output voltage Vo for the op-amp circuit given below
(d) How a voltage divider bias circuit stabilizes the operating point? Fig.(D).
0.1V 20k
(e) For the fixed bias configuration of the +16V
0.2V 10k 100k
following npn BJT circuit Fig.(B).
Determine IBQ, ICQ and VCEQ. Assume 0.3V 50k
IB IC Vo
470k 2.7k
VBE=0.7V. +
=90
Fig.-(D)
Fig.-(B)
(f) What is DC load line? Define Q point. (b) Describe how frequency and phase can be measured by a CRO.
Use suitable diagram.
3. Attempt any Two of the following questions: 6 x 2 = 12 (c) Explain the working of a digital multimeter using suitable diagrams.
(a) What are the advantages of FET over a BJT? Define pinch off What are its applications?
voltage and drain resistance of FET.
(b) Draw the structure of a n-channel depletion type MOSFET. Also
draw and explain its input and transfer characteristics.
(c) Justify the sentence JFET a voltage controlled resistor. Given that
IDSS=6mA, VP=4.5V. Determine ID at VGS=2 and 3.6V.

4. Attempt any Two of the following questions: 6 x 2 = 12

(a) Design a circuit by simplifying the following function using K-map in
sum of product form:
F(A,B,C,D) = m(1,3,4,6,8,9,11,13,15) + d(0,2,14).
(b) Simplify the following function using K-map in products of sum form:
F(A,B,C,D) = M(0,1,3,6,7,8,9,11,13,14,15)
(c) Draw the logic diagram of Ex-NOR gate using only NOR gates.
What are universal gates?

2 3