TMPM370 Group Product Introduction Guide

TMPM370 Group
Product Introduction Guide
TMPM370 Group
The TMPM370 Group is a high-performance 32-bit RISC microprocessor product group based on the ARM
Cortex-M3 core.
The TMPM370 Group incorporates the vector engine that performs vector control combined with a built-in PMD
and high-performance ADC to reduce a load of the CPU. This product group is suitable for major appliances such as
air conditioners, washing machines, refrigerators, and actuators. Up to 512 KBytes of flash memory and 32 KBytes
of RAM are housed. The maximum operation frequency is 80 MHz.
In this group, LQFP100, QFP100, LQFP64, LQFP48, LQFP44 and SSOP30 are available. For the number of
ports, QFP100 has 82 ports and even the small package SSOP30 has 21 ports.
Application Peripheral functions suitable for each application
Vector engine (VE), Programmable Motor Driver (PMD), 12-bit high-performance ADC
Air conditioner
Washing machine
Refrigerator
Actuator
Do not design your products or systems based on the information on this document.
Please contact your Toshiba sales representative for updated information before designing your products.
ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere.
All rights reserved.
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TMPM370 Group
M370Group
System Functions
WDT NVIC FLASH PLL /CG

ARM
Cortex
VLTD Debug -M3 RAM Low-power
consumption
CORE
OFD
Analogs Timer Serial communications
SIO/UART
PORT 12-bit AD TMRB I2C/SIO
4Byte FIFO
AMP/CMP Motor control functions
VE PMD ENC
Figure 1-1 Block diagram of the TMPM370 Group
2015/3/31 Page 2
1.1 Product Lineup of the TMPM370 Group
TMPM370 Group
MEMORY
(FLASH)
QFP TMPM376FDDFG
512 KBytes
TMPM376FDFG
LQFP
QFP TMPM370FYDFG
256 KBytes
TMPM370FYFG
LQFP LQFP
128 KBytes TMPM374FWUG TMPM373FWDUG TMPM372FWUG
SSOP
64 KBytes TMPM375FSDMG
PIN
30-pin 44-pin 48-pin 64-pin 100-pin
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TMPM370 Group
Table 1-1 A product list described in functional order

Product name
Peripheral functions
TMPM370FY TMPM372FW TMPM373FW TMPM374FW TMPM375FS TMPM376FD
Flash 256 KBytes 128 KBytes 128 KBytes 128 KBytes 64 KBytes 512 KBytes
Memory
RAM 10 KBytes 6 KBytes 6 KBytes 6 KBytes 4 KBytes 32 KBytes
External inter-
INT 16 10 8 7 3 16
rupt
DMA DMA
Input/output 74 53 37 33 21 80
Input 2 0 0 0 0 2
Input/output Output 0 0 0 0 0 0
port
5V-tolerant
Input - - - - - -
(Note 1)
Timer function TMRB 8 channels 8 channels 8 channels 8 channels 4 channels 8 channels
Serial commu- SIO/UART 4 channels 4 channels 3 channels 3 channels 2 channels 4 channels

nication func-
tion I2C/SIO 0 channel 0 channel 0 channel 0 channel 1 channel 1 channel
2 units 2 units
1 unit 1 unit 1 unit 1 unit
Analog function ADC (Note 2) (Note 2)
(11 channels) (7 channels) (6 channels) (4 channels)
(22 channels) (22 channels)
1 unit 1 unit 1 unit 1 unit 1 unit 1 unit

VE (Supports (Supports (Supports (Supports (Supports (Supports
2 motors) 1 motor) 1 motor) 1 motor) 1 motor) 2 motors)
Other periph- PMD 2 channels 1 channel 1 channel 1 channel 1 channel 2 channels
eral functions
OPAmp 4 channels 0 channel 0 channel 0 channel 1 channel 0 channel
CMP 4 channels 0 channel 0 channel 0 channel 0 channel 0 channel
ENC 2 channels 1 channel 1 channel 1 channel 1 channel 2 channels
WDT 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel

System func-
OFD Available Available Available Available Available Available
tion
VLTD Available Available Available Available Available Available
Debug inter-
Debug JTAG, SWD
face
QFP100 QFP100
DFG (14mm x 20mm, (14mm x 20mm,
0.65mm pitch) 0.65mm pitch)
LQFP100 LQFP100
FG (14mm x 14mm, (14mm x 14mm,
LQFP48
Package DUG (7mm x 7mm,
0.5mm pitch)
LQFP64 LQFP44
UG (10mm x 10mm, (10mm x 10mm,
SSOP30
DMG (5.6mm x 9.7mm
0.65mm pitch)
Note 1: Not applicable. This product group operates at 5 V.

Note 2: In the ADC of the TMPM370 and TMPM376, Unit A has 15 channels and Unit B has 17 channels. However, there are
shared input pins in each unit. The number of the external inputs are 22 channels in total 2 units.
2015/3/31 Page 4
1.2 Functional Description
TMPM370 Group

Some peripheral functions are not included depending on product. For details, refer to Table 1-1.
1. Based on ARM Cortex-M3 core

Mass data processing and calculation can be executed at high speed.
2. Flash memory and RAM

Flash memory: Built-in Flash memory
RAM: Built-in RAM.
3. Clock control (CG)

The built-in PLL can use an inexpensive oscillator even when the MCU operates at high speed.
Also, the clock gear function can reduce a power consumption by slowing the core's operation speed
while peripheral functions operate at high speed.
4. Low power consumption function

IDLE mode: Stops the CPU and specified peripheral functions.
STOP mode: Stops all peripheral functions except some peripheral functions. Therefore, the STOP
mode can achieve a greater reduction in power supply than the IDLE mode.
5. External interrupt function

These external interrupt pins are also used for releasing the low-power consumption mode.
6. Input/output ports
The MCU group has input/output ports and input ports.
7. Timer functions
16-bit timer/event counter (TMRB)
8. Serial communication functions

Serial channels (SIO/UART)
Serial bus interface (I2C/SIO) (*Available only in the TMPM375 and TMPM376.)
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TMPM370 Group
9. Analog functions
12-bit analog-digital converter (ADC)
Op-Amp (AMP) (*Available only in the TMPM370 and TMPM375.)
Analog comparator (CMP) (*Available only in the TMPM370.)
10. Motor Control functions

Vector engine (VE)
Programmable Motor Driver (PMD)
Encoder input circuit (ENC)
11. System functions

Watchdog timer (WDT)
Oscillation frequency detection (OFD)
Voltage detection (VLTD)
12. Endian
Supports little-endian.
13. Debug interface

Supports JTAG/SW.
Supports SWV and TRACE Data as ETM.
Note: TRACE Data is not supported in the TMPM373, TMPM374 and TMPM375.
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1.3 Operating Conditions
TMPM370 Group
1.3 Operating Conditions
1.3.1 Maximum Operating Frequency

TMPM370FY, TMPM372FW, TMPM373FW, TMPM374FW, TMPM376FD
80 MHz
TMPM375FS
40 MHz
1.3.2 Operating Voltage Range

4.5 to 5.5V
1.3.3 Operating Temperature Range

Operating temperature ranges in each product as follows:
Operating conditions
Products Except during Flash memory During Flash memory
write/erase time write/erase time
TMPM370FY 40 to 85C
TMPM372FW
40 to 85C (1 to 80MHz)
TMPM373FW
40 to 105C (1 to 32MHz) 0 to 70C
TMPM374FW
TMPM375FS 40 to 105C (1 to 40 MHz)
TMPM376FD 40 to 85C
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1.4 Package
TMPM370 Group
1.4 Package
The following packages are available in the TMPM370 Group:
Table 1-2 Product list and corresponding packages
Product name Package
TMPM370FYFG LQFP100
TMPM376FDFG (14mm x 14mm, 0.5mm pitch)
TMPM370FYDFG QFP100
TMPM376FDDFG (14mm x 20mm, 0.65mm pitch)
LQFP64
TMPM372FWUG
(10mm x 10mm, 0.5mm pitch)
LQFP48
TMPM373FWDUG
LQFP44
TMPM374FWUG
SSOP30
TMPM375FSDMG
(5.6mm x 9.7mm, 0.65mm pitch)
For the TMPM370FY and TMPM376FD packages, LQFP and QFP packages having the same function are pro-
vided. Select the suitable package for your circuit board.
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TMPM370 Group

This section describes the peripheral functions built-in the TMPM370 Group.
1.5.1 Flash Memory

The capacities and configurations of Flash memory for the TMPM370 Group are as follows:
Writing is performed in the unit of pages.
One word means 32 bits.
Table 1-3 Capacities and configurations of Flash memory
Block configuration (pcs) Number of Write time (s) Erase time(s)

Capacity
Products 128 64 32 16 8 words per
(KB) 1 page 1 Chip 1 Block 1 Chip
(KB) (KB) (KB) (KB) (KB) page
TMPM370FY 256 0 3 1 2 0 64 1.28 0.4
TMPM372FW
TMPM373FW 128 0 1 1 2 0 64 0.64 0.4
TMPM374FW 0.00125 0.1
TMPM375FS 64 0 0 2 0 0 32 0.64 0.2
TMPM376FD 512 3 1 2 0 0 128 1.28 0.4
Note:This table shows each register initial value after reset. A data transfer time is not included. A write time per
chip differs depending on users reprogramming method.
1.5.2 RAM
The RAM capacities for the TMPM370 Group are as follows:
Table 1-4 RAM capacity
RAM capacity
Products
(KB)
TMPM370FYDFG
10
TMPM370FYFG
TMPM372FWUG
TMPM373FWDUG 6
TMPM374FWUG
TMPM375FSDMG 4
TMPM376FDFG
32
TMPM376FDFG
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TMPM370 Group
1.5.3 Clock Control (CG)

The outline of the clock control circuit of the TMPM370 Group are as follows:
1. Internal high-speed oscillation circuit:
Internal high-speed oscillation circuit (MHz)

Product
Min Typ. Max
TMPM370FY Not available
TMPM372FW 9 9.5 10
TMPM373FW 9 9.5 10
TMPM374FW 9 9.5 10
TMPM375FS 9.4 9.7 10
TMPM376FD 9 9.5 10
2. Either the external high-speed oscillation circuit or external clock input can be selected.
3. PLL (multiplier): The number of multiplications of the TMPM375 can be selected from a factor of
four or five according to frequencies of the high-speed oscillation circuit. The number of multiplica-
tions of other products is fixed to a factor of 8.
Products The number of multiplications
TMPM370FY A factor of 8
TMPM372FW A factor of 8
TMPM375FS A factor of 4, 5
TMPM376FD A factor of 8
4. Clock gear: Any high-speed clock is selectable from 1/1, 1/2, 1/4, 1/8 or 1/16 (clock gear) as the sys-
tem clock (fsys).
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TMPM370 Group
1.5.4 Timer Function
1.5.4.1 16-bit Timer/Event Counter (TMRB)
(1) Outline
The TMRB is a peripheral function that incorporates a 16-bit counter and can be used as a timer,
event counter or PPG outputs.
It captures the value of the 16-bit counter at a specified timing.
Multiple channels can be started simultaneously and can be started synchronously with external
triggers.
(2) Operation mode
The TMRB has the following operation modes. These operation modes can be switched in each
channel.
(a) Interval timer mode
The mode counts up a 16-bit counter at a specified clock count of the source clock.
When the counter matches a preset value, an interrupt request occurs.
The counter value can also be captured by the capture register at a specified timing (at a
change of software capture, capture trigger and input capture input pin).
(b) Event counter mode
The mode counts up a 16-bit counter using an external clock instead of the source clock in
the interval timer mode.
The interrupt and capture function can be used in the same way as the interval timer mode
(the pin used by an external clock input cannot be used as a capture input).
(c) Programmable rectangular wave output (PPG) mode
The mode outputs a rectangular waveform at a specific frequency and duty ratio to the output
pins.
Either "active-low" or "active-high" logic can be selected for the output pins.
(d) External trigger programmable rectangular wave output (PPG) mode
In this mode, 1-shot pulse is output with small delay.

If a delay value is specified in the timer register 0 and a delay value plus a pulse value are
specified in the timer register 1, a rising edge or falling edge of the timer triggers a pulse from
the output pin.
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TMPM370 Group
(3) Interrupt request
The TMRB has the following interrupt requests:
(a) Compare match interrupt
When the 16-bit up-counter matches a preset value, a compare match interrupt request
occurs. As the compare match interrupt request is a shared interrupt with an overflow interrupt,
the interrupt handler detects the factor by reading the status flag.
(b) Overflow interrupt
When the 16-bit up-counter has overflowed, an overflow interrupt request occurs. As the
overflow interrupt request is a shared interrupt with a compare match interrupt, the interrupt
handler detects the factor by reading the status flag.
(c) Input capture interrupt
When the capture register captures the value of the 16-bit up-counter, an input capture inter-
rupt request occurs.
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TMPM370 Group
1.5.5 Serial Communication Functions
1.5.5.1 Serial Channel (SIO/UART)
(1) Outline
The serial function is a peripheral function that switches the operation modes between synchronous
communication mode (I/O interface mode) and asynchronous communication mode (UART mode).
It has a 4-stage FIFO and baud-rate generator that enable communication at various transfer rates.
(2) Operation mode
The SIO/UART has the following operation modes:
(a) I/O interface mode
The I/O interface mode is the mode where data is transferred using a half-duplex or full-
duplex communication system in synchronization with clock signals.
In the I/O interface mode, a switch between a master and slave, designation of LSB and MSB
of transfer data, and designation of a transfer clock edge of the slave mode are possible.
In addition, the hold time of the last bit and level of the data output pin after the last bit is out-
put can be specified.
(b) UART mode
The UART mode is the mode in which data is transferred at a preset transfer rate.
The flow control is implemented using CTS.
A data bit length is selectable from 7-bit, 8-bit or 9-bit. When a 7-bit or 8-bit data length is
selected, a parity bit can be added.
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TMPM370 Group
The SIO/UART has the following interrupt requests:
(a) I/O interface mode
1. Transmit interrupt
When the transmit double buffer is disabled, if data transmission is complete, a trans-
mit interrupt request occurs.
When the transmit double buffer or transmit FIFO is enabled, if transmit data has
been transferred from the transmit double buffer of transmit FIFO to the shift regis-
ter, a transmit interrupt request occurs.
2. Receive interrupt
When data reception is complete, a receive interrupt request occurs. When the
receive FIFO is enabled, if the data has reached the preset fill-level of FIFO, a
reception interrupt request occurs.
(b) UART mode
1. Transmit interrupt
When the transmit double buffer is disabled, a transmit interrupt occurs immediately
before the STOP bit is output.
When the transmit double buffer or transmit FIFO is enabled, if transmit data has
been transferred from the transmit double buffer or transmit FIFO to the shift regis-
ter, a transmit interrupt request occurs.
2. Receive interrupt
A receive interrupt request occurs around the center of the first STOP bit.
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TMPM370 Group
1.5.5.2 Serial Bus Interface (I2C/SIO)
(1) Outline
The serial bus interface is a peripheral circuit that can select I2C bus mode and synchronous clock
8-bit SIO mode.
(2) Operation mode
(a) I2C bus mode
The operation mode supports Standard mode (100 kbps max.) and Fast mode (400 kbps
max.) for I2C bus.
(b) Clock synchronous 8-bit SIO mode
This transfer mode transfers data half-duplex or full-duplex synchronously with the clock
signal.
(3) Maximum transfer rate
(a) I2C bus mode
1. Standard mode
100 kHz (Master mode, slave mode)
2. Fast mode
400 kHz (Master mode, slave mode)
The I2C/SIO has the following interrupt request:
(a) I2C bus mode
1. I2C interrupt request

An I2C interrupt request occurs when transmission or reception is complete.
(b) Clock synchronous 8-bit SIO mode
1. 8-bit transmit mode

When SBIDBR becomes empty, an INTSBI (buffer empty) interrupt request occurs.
2. 8-bit reception mode/8-bit transmission/reception mode

When 8-bit data is written to SBIDBR, an INTSBI (buffer full) interrupt request
occurs to read received data.
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TMPM370 Group
1.5.6 Analog Functions
1.5.6.1 12-bit Analog Digital Converter (ADC)
(1) Outline
This 12-bit analog digital converter converts data at high speed.

A combination of the conversion result register and analog inputs can be programmed for each AD
conversion startup factor.
A startup factor of the analog-to-digital conversion can be selected from software or peripheral
functions (PMD trigger outputs and 16-bit timer/event counter outputs).
In addition, it also has the monitor function that occurs an interrupt request when data matches a
comparison condition.
(2) Operation mode
The ADC has the following operating modes:
(a) PMD trigger AD conversion
When the PMD generates a PMD trigger, a programmed analog input is converted to a digital
value.
(b) Timer trigger AD conversion
When a timer trigger occurs, a programmed analog input is converted to a digital value.
(c) Software trigger AD conversion
When a software trigger occurs, a programmed analog input is converted to a digital value.l
value.
(d) Full-time AD conversion
Programmed analog inputs are repeatedly converted to digital values.
(3) Minimum conversion time
2.0 s @ ADC conversion clock 40 MHz
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TMPM370 Group
The ADC has the following interrupt requests:
(a) PMD trigger synchronous conversion completion interrupt request
When the AD conversion is started by a PMD trigger, if the programmed AD conversion is

complete, a PMD trigger synchronous conversion completion interrupt request occurs.
(b) Timer trigger synchronous conversion completion interrupt request
When the AD conversion is started by 16-bit timer/counter outputs, if the programmed AD

conversion is complete, a timer synchronous conversion completion interrupt request occurs.
(c) Software trigger completion interrupt request)
When the AD conversion is started by software, if the programmed AD conversion is com-

plete, a software trigger completion interrupt request occurs.
(d) AD monitor function interrupt
When the preset conversion value is detected, an AD monitor function interrupt request
occurs.
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TMPM370 Group
1.5.7 Motor Control Functions
1.5.7.1 Vector engine (VE)
(1) Outline
The vector engine (VE) is a dedicated hardware to execute various vector control processes. It
reduces the CPU load and achieves a greater reduction in software process.
This hardware executes basic calculations such as a parameter axis conversion, phase conversion,
SIN/COS calculation and PI control for current control.
In addition, the vector engine can execute interface processes between the CPU and the motor con-
trol circuit (PMD) and high-speed AD converter.
When tasks related to inputs are finished, an interrupt occurs.
1.5.7.2 Programmable Motor Driver (PMD)
(1) Outline
The motor control circuit (Programmable Motor Driver: PMD) easily controls brushless DC
motors by using the VE and high-speed AD converter.
It incorporates the 3-phase pulse width modulation circuit, dead-time circuit to generate a wave-
form for motor control easily.
Also, it provides an overvoltage detection input and abnormal detection input to take countermea-
sures against for emergency.
The PMD has the following interrupt requests:
(a) PWM interrupt request
The pulse width modulation circuit generates an interrupt request synchronizing with PWM
waveforms.
(b) EMG interrupt request
The protection control circuit (EMG) generates an interrupt when the level of the abnormal
detection input becomes "Low".
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TMPM370 Group
(c) OVV interrupt request
The voltage input protection circuit (OVV) generates an interrupt when the level of the over-
voltage detection input becomes active.
1.5.7.3 Op-Amp (AMP) (*Available only in the TMPM375 and TMPM370.)
(1) Outline
The AMP is used for amplifying a voltage of the shunt resistor to detect a motor current.
(2) Function
This function can be enabled or disabled. As an amplifier gain, 8 types preset value can be
selected.
1.5.7.4 Analog Comparator (CMP) (*Available only in the TMPM370.)
(1) Outline
The analog comparator gains a result of comparison between an Op-Amp output of the shunt resis-
tor and reference voltage to detect an abnormal current.
(2) Function
An Op-Amp output of the shunt resistor is input to the analog comparator. The analog comparator
outputs a result of the comparison between an Op-Amp output of the shunt resistor and the reference
voltage of the external resistor to the EMG circuit.
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TMPM370 Group
1.5.7.5 Encoder input circuit (ENC)
(1) Outline
The encoder input circuit supports 4 operation modes such as the encoder mode, sensor mode
(2types) and timer mode.
Thanks to the built-in noise canceller of the input pins, an absolute position of motors can easily
obtained through the signals of incremental encoder and Hall sensor directly.
(2) Operation mode
(a) Encoder mode
The encoder mode supports the AB encoder and ABZ encoder.

The ENC multiplies input signals of A-phase and B-phase by 4 to count encoder pulses. It
incorporates a up/down auto-reload counter. When inputs of Z-phase is enabled, the up/down
counter is cleared to "0" depending on variations of inputs of Z-phase.
If the up/down-counter reaches to the preset value, an interrupt request occurs.
(b) Sensor mode
1. Event counting mode

Three-phase Hall sensor signals are input to A-phase, B-phase and Z-phase input pins
respectively.
Inputs from U-phase and V-phase are multiplied by 4; inputs from U-phase, V-phase
and W-phase are multiplied by 6. These Hall sensor pulses are counted by the
ENC. The ENC incorporates the up/down counter containing the overflow/under-
flow function.
2. Timer counting mode

Three-phase Hall sensor signals are input to A-phase, B-phase and Z-phase input pins
respectively.
Input from U-phase and V-phase are multiplied by 4; inputs from U-phase, V-phase
and W-phase are multiplied by 6. These Hall sensor pulses are counted by the
ENC. The ENC incorporates the up-counter that has the overflow function in
which the counter is cleared if Hall sensor signals are changed.
When the counter is cleared, the value of counter are captured.
(c) Timer mode
The encoder can be used as a 24-bit counter that has the counter-clear, counter-compare and
counter-capture function.
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TMPM370 Group
Then ENC has the following interrupt requests depending on the operation mode:
(a) Encoder mode
1. Event counting interrupt

An event counting interrupt request occurs when the up-down counter reaches to the
preset value.
2. Event interrupt
An event interrupt occurs in a cycle of the encoder pulse signal that is divided by the
preset division ratio.
(b) Sensor mode
1. Event count mode

Event counting interrupt
When the up-/down-counter reaches to the preset value, an event counting interrupt
occurs.
Event interrupt
An event interrupt occurs in a cycle of the Hall sensor pulse signal that is divided
by the preset division ratio.
2. Timer counting mode

Event interrupt
An event interrupt occurs when the up-counter is captured caused by a change of
Hall sensor pulses.
Non detection time over interrupt

A non detection time over interrupt occurs when Hall sensor pulses does not change
within the preset time.
(c) Timer interrupt
1. Timer compare interrupt

When a counter value reaches to the preset value, a timer interrupt occurs.
2. Capture interrupt
When the counter is captured by a Z-phase input, a capture interrupt occurs.
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TMPM370 Group
1.5.8 System Functions
1.5.8.1 Watchdog Timer (WDT)
(1) Outline
The WDT is a peripheral function that detects overflow of the binary counter and generates an
interrupt request or resets the MCU. This is caused when the binary counter cannot be cleared within
the preset detection time.
When the WDT is programmed to clear the binary counter within the preset detection time before-
hand, the WDT can detect an MCU malfunction.
(2) Detection time
The following table shows the detection times:
Detection time
Products
Minimum detection time Maximum detection time
TMPM370FY 0.41ms @ fsys=80 MHz 6.71s @ fsys=80 MHz
TMPM372FW 0.41ms @ fsys=80 MHz 6.71s @ fsys=80 MHz
TMPM375FS 0.82ms @ fsys=40 MHz 13.42s @ fsys=40 MHz
TMPM376FD 0.41ms @ fsys=80 MHz 6.71s @ fsys=80 MHz
The WDT has the following interrupt request:
(a) Watchdog timer interrupt request
When the WDT detects that the binary counter overflows, it generates a watchdog timer
interrupt request. The watchdog timer interrupt is a non-maskable interrupt.
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TMPM370 Group
1.5.8.2 Oscillation Frequency Detection (OFD)
(1) Outline
The OFD is a peripheral function that detects a start/stop of oscillation in abnormal mode, and
resets the MCU.
An abnormal state of the target clock is detected by using the reference clock built-in the
TMPM370 Group.
(2) Detection range
The upper limit and lower limit of detection frequency ranges can be specified respectively.
1.5.8.3 Voltage Detection (VLTD)
(1) Outline
The VLTD is a peripheral function detects whether a power supply voltage is lower or higher than
the preset voltage, and resets the MCU.
(2) Detection Voltage
The following voltages can be specified as a detection voltage:
1. 4.1 V 0.2 V
2. 4.4 V 0.2 V
3. 4.6 V 0.2 V
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1.6 Pin Layout
TMPM370 Group
1.6 Pin Layout

Pin layouts of the TMPM370 Group are shown below:
PF2/ENCA1/SCLK3 /CTS3
PB2/TRACEDATA1
PB1/TRACEDATA0
PF4/ENCZ1/RXD3
PF3/ENCB1/TXD3
PK1/INTF/AINB12
PK0/INTE/AINB11
PJ7/INTD/AINB10
PB4/TCK/SWCLK
PB3/TMS/SWDIO
PJ6/INTC/AINB9
PB0/TRACECLK
PB5/TDO/SWV
PF1/TB7OUT
PJ5/AINB8
PB7/TRST
VOUT15
PB6/TDI
DVDD5
RVDD5
VOUT3
RESET
MODE
DVSS
DVSS
75
70
65
60
55
PJ4/AINB7 50 PF0/TB7IN/BOOT
PJ3/AINB6 X2
PJ2/AINB5 DVSS
PJ1/AINB4 X1
PJ0/AINB3 80 PG7/OVV1
AVSSB/VREFLB 45 PG6/EMG1
AVDD5B/VREFHB PG5/ZO1
PI3/AINA11/AINB2 PG4/WO1
PI2/AINA10/AINB1 PG3/YO1
PI1/AINA9/AINB0 85 DVSS
AVSSA/VREFLA 40 DVDD5
AVDD5A/VREFHA TMPM370FYFG PG2/VO1
PI0/AINA8 PG1/XO1
PH7/AINA7 PG0/UO1
PH6/AINA6 90 PD6/RXD2
PH5/AINA5 35 PD5/TXD2
PH4/AINA4 Top View PD4/SCLK2/CTS2
PH3/AINA3 PD3/INT9
PH2/INT2/AINA2 PD2/ENCZ0
PH1/INT1/AINA1 95 PD1/ENCB0/TB5OUT
PH0/INT0/AINA0 30 PD0/ENCA0/TB5IN
AMPVSS PC7/OVV0
AMPVDD5 PC6/EMG0
CVREFD PC5/ZO0
CVREFABC 100 PC4/WO0
10
15
20
25
1
5
DVSS
PE0/TXD0
PE1/RXD0
PE2/SCLK0/CTS0
PE3/TB4OUT
DVDD5
PE4/TB2IN/INT5
PE5/TB2OUT
PE6/TB3IN/INT6
PE7/TB3OUT/INT7
DVSS
PL0/INTB
PC0/UO0
PC1/XO0
PC2/VO0
PC3/YO0
PA0/TB0IN/INT3
PA1/TB0OUT
PA2/TB1IN/INT4
PA3/TB1OUT
PA4/SCLK1/CTS1
PA5/TXD1/TB6OUT
PA6/RXD1/TB6IN
PA7/TB4IN/INT8
PL1/INTA
Figure 1-2 Pin layout (TMPM370FYFG, LQFP100 TOP VIEW)
2015/3/31 Page 24
AVDD5A/VREFHA
AVSSA/VREFLA
PI3/AINA11/AINB2
AVDD5B/VREFHB
AVSSB/VREFLB
AMPVDD5
AMPVSS
PH0/INT0/AINA0
PH1/INT1/AINA1
PH2/INT2/AINA2
PH3/AINA3
PH4/AINA4
PH5/AINA5
PH6/AINA6
PH7/AINA7
PI0/AINA8
PI1/AINA9/AINB0
PI2/AINA10/AINB1
PJ0/AINB3
PJ1/AINB4
95
90
85
100
PCVREFD 1 80 PJ2/AINB5
CVREFABC PJ3/AINB6
DVSS PJ4/AINB7
PA0/TB0IN/INT3 PJ5/AINB8
PA1/TB0OUT 5 PJ6/INTC/AINB9
PA2/TB1IN/INT4 75 PJ7/INTD/AINB10
PA3/TB1OUT PK0/INTE/AINB11
PA4/SCLK1/CTS1 PK1/INTF/AINB12
PA5/TXD1/TB6OUT PB7/TRST
PA6/RXD1/TB6IN 10 PB6/TDI
PA7/TB4IN/INT8 70 PB5/TDO/SWV
PE0/TXD0 PB4/TCK/SWCLK
PE1/RXD0 PB3/TMS/SWDIO
PE2/SCLK0/CTS0 PB2/TRACEDATA1
PE3/TB4OUT 15 PB1/TRACEDATA0
DVDD5 65 PB0/TRACECLK
PE4/TB2IN/INT5 DVSS
Page 25
PE5/TB2OUT Top View DVDD5
PE6/TB3IN/INT6 VOUT3
1.6 Pin Layout
PE7/TB3OUT/INT7 20 RESET
DVSS 60 RVDD5
TMPM370FYDFG
PL0/INTB MODE
PL1/INTA DVSS
PC0/UO0 VOUT15
PC1/XO0 25 PF4/ENCZ1/RXD3
PC2/VO0 55 PF3/ENCB1/TXD3
PC3/YO0 PF2/ENCA1/SCLK3 /CTS3
PC4/WO0 PF1/TB7OUT
PC5/ZO0 PF0/TB7IN/BOOT
PC6/EMG0 30 X2
35
40
45
50
X1
Figure 1-3 Pin layout (TMPM370FYDFG, QFP100 TOP VIEW)

DVSS
DVSS
DVDD5
PG5/ZO1
PG1/XO1
PG2/VO1
PG3/YO1
PG0/UO1
PD3/INT9
PG4/WO1
PD5/TXD2
PC7/OVV0
PD6/RXD2
PG7/OVV1
PG6/EMG1
PD2/ENCZ0
PD4/SCLK2/CTS2
PD0/ENCA0/TB5IN
PD1/ENCB0/TB5OUT
2015/3/31
TMPM370 Group
1.6 Pin Layout
TMPM370 Group
2#+066$+0
2#+066$+0
2#6$176
2,#+0$
2,#+0$
2,#+0$
2+#+0$
8176
2/:
2/:
4'5'6
8176
48&&
&8&&
/1&'
&855

#+0$2, 2'6$176
#+0$2, 2'6$176
#+0$2, 2(6$176
+06%#+0$2, 2('0%<4:&
+06&#+0$2, 2('0%$6:&
+06'#+0$2- 2('0%#5%.-%65
+06(#+0$2- 2'6$+0+06
84'(.$#855$
84'(*$#8&&$ 6/2/(97)

2'5%.-%65
2'4:&
+066$1762' 2'6:&
+066$+02' 2$6/559&+1
4:&6$+02# 6QR8KGY 2$6%-59%.-
6:&6$1762# 2$6&1598
5%.-%652# 2$6&+
+066$+02# 2$6456
6$1762# 2$64#%'&#6#

5%.-%652&
6:&2&
4:&2&
712)
:12)
812)
;12)
912)
<12)
'/)2)
1882)
&855
&8&&
$1166$+02(
64#%'%.-2$
64#%'&#6#2$
Figure 1-4 Pin layout (TMPM372FWUG, LQFP64 TOP VIEW)

2#+066$+0
2,#+0$
2+#+0$
8176
2/:
2/:
4'5'6
8176
48&&
&8&&
/1&'
&855

#+0$2, 2(6$176
+06%#+0$2, 2('0%<4:&
+06&#+0$2, 2('0%$6:&
+06'#+0$2- 2('0%#5%.-%65
+06(#+0$2- 2'6$+0+06

84'(.$#855$
84'(*$#8&&$

6/2/(9&7)
2'5%.-%65
2'4:&
+066$1762' 2'6:&
+066$+02'
4:&6$+02#

6QR8KGY

2$6/559&+1
2$6%-59%.-
6:&6$1762# 2$6&1598
5%.-%652# 2$6&+

2&
712)
:12)
812)
;12)
912)
<12)
'/)2)
1882)
&855
&8&&
$1166$+02(
Figure 1-5 Pin layout (TMPM373FWDUG, LQFP48 TOP VIEW)
2015/3/31 Page 26
1.6 Pin Layout
TMPM370 Group
2,#+0$
2+#+0$
8176
2/:
2/:
4'5'6
8176
48&&
&8&&
/1&'
&855

+06%#+0$2, 2('0%<4:&
+06&#+0$2, 2('0%$6:&
+06'#+0$2- 2('0%#5%.-%65
+06(#+0$2- 2'6$+0+06
84'(.$#855$ 2'5%.-%65
84'(*$#8&&$
6/2/(97) 2'4:&
+066$1762' 2'6:&
+066$+02' 6QR8KGY 2$6/559&+1
4:&6$+02# 2$6%-59%.-
6:&6$1762# 2$6&1598
5%.-%652# 2$6&+

712)
:12)
812)
;12)
912)
<12)
'/)2)
1882)
&855
&8&&
$1166$+02(
Figure 1-6 Pin layout (TMPM374FWUG, LQFP44 TOP VIEW)
6/2/(5&/)
#855$84'(.$#/2855 2''0%#6:&
#+$2, 2''0%$4:&6$+0
#+0$2, &8&&$
#+0$2- 2/:
#+0$2- &855$
#8&&$84'(*$#/28&& 2/:
/1&' 8176
72) 6QR8KGY 8+04')
:2) 8176
82) 2''0%<5%.-%65+06
5%.
;2) 2(6$+0$1165&#516:&+06%
92) 2$6$1766&+5%.5+4:&+06
<2) 2$6&15985%-
5&#
'/)1882) 2$6%-59%.-
6:&
4'5'6 2$6/559&+1
4:&
Figure 1-7 Pin layout (TMPM375FSDMG, SSOP30 TOP VIEW)
Page 27 2015/3/31
1.6 Pin Layout
TMPM370 Group
PF2/ENCA1/SCLK3 /CTS3
PB2/TRACEDATA1
PB1/TRACEDATA0
PF4/ENCZ1/RXD3
PF3/ENCB1/TXD3
PK1/INTF/AINB12
PK0/INTE/AINB11
PJ7/INTD/AINB10
PB4/TCK/SWCLK
PB3/TMS/SWDIO
PJ6/INTC/AINB9
PB0/TRACECLK
PB5/TDO/SWV
PF1/TB7OUT
PJ5/AINB8
PB7/TRST
VOUT15
PB6/TDI
DVDD5
RVDD5
VOUT3
RESET
MODE
DVSS
DVSS
75
70
65
60
55
PJ4/AINB7 50 PF0/TB7IN/BOOT
PJ3/AINB6 PM1/X2
PJ2/AINB5 DVSS
PJ1/AINB4 PM0/X1
PJ0/AINB3 80 PG7/OVV1
AVSSB/VREFLB 45 PG6/EMG1
AVDD5B/VREFHB PG5/ZO1
PI3/AINA11/AINB2 PG4/WO1
PI2/AINA10/AINB1 PG3/YO1
PI1/AINA9/AINB0 85 DVSS
AVSSA/VREFLA 40 DVDD5
AVDD5A/VREFHA TMPM376FDFG PG2/VO1
PI0/AINA8 PG1/XO1
PH7/AINA7 PG0/UO1
PH6/AINA6 90 PD6/RXD2
PH5/AINA5 35 PD5/TXD2
PH4/AINA4 Top View PD4/SCLK2/CTS2
PH3/AINA3 PD3/INT9
PH2/INT2/AINA2 PD2/ENCZ0
PH1/INT1/AINA1 95 PD1/ENCB0/TB5OUT
PH0/INT0/AINA0 30 PD0/ENCA0/TB5IN
PN3/TB7IN PC7/OVV0
PN2/SCK PC6/EMG0
PN1/SI/SCL PC5/ZO0
PN0/SO/SDA 100 PC4/WO0
10
15
20
25
1
5
DVSS
PE0/TXD0
PE1/RXD0
PE2/SCLK0/CTS0
PE3/TB4OUT
DVDD5
PE4/TB2IN/INT5
PE5/TB2OUT
PE6/TB3IN/INT6
PE7/TB3OUT/INT7
DVSS
PL0/INTB
PC0/UO0
PC1/XO0
PC2/VO0
PC3/YO0
PA0/TB0IN/INT3
PA1/TB0OUT
PA2/TB1IN/INT4
PA3/TB1OUT
PA4/SCLK1/CTS1
PA5/TXD1/TB6OUT
PA6/RXD1/TB6IN
PA7/TB4IN/INT8
PL1/INTA
Figure 1-8 Pin layout (TMPM376FDFG, LQFP100 TOP VIEW)
2015/3/31 Page 28
AVDD5A/VREFHA
AVSSA/VREFLA
PI3/AINA11/AINB2
AVDD5B/VREFHB
AVSSB/VREFLB
PN2/SCK
PN3/TB7IN
PH0/INT0/AINA0
PH1/INT1/AINA1
PH2/INT2/AINA2
PH3/AINA3
PH4/AINA4
PH5/AINA5
PH6/AINA6
PH7/AINA7
PI0/AINA8
PI1/AINA9/AINB0
PI2/AINA10/AINB1
PJ0/AINB3
PJ1/AINB4
95
90
85
100
PN1/SI/SCL 1 80 PJ2/AINB5
PN0/SO/SDA PJ3/AINB6
DVSS PJ4/AINB7
PA0/TB0IN/INT3 PJ5/AINB8
PA1/TB0OUT 5 PJ6/INTC/AINB9
PA2/TB1IN/INT4 75 PJ7/INTD/AINB10
PA3/TB1OUT PK0/INTE/AINB11
PA4/SCLK1/CTS1 PK1/INTF/AINB12
PA5/TXD1/TB6OUT PB7/TRST
PA6/RXD1/TB6IN 10 PB6/TDI
PA7/TB4IN/INT8 70 PB5/TDO/SWV
PE0/TXD0 PB4/TCK/SWCLK
PE1/RXD0 PB3/TMS/SWDIO
PE2/SCLK0/CTS0 PB2/TRACEDATA1
PE3/TB4OUT 15 PB1/TRACEDATA0
DVDD5 65 PB0/TRACECLK
PE4/TB2IN/INT5 DVSS
Page 29
PE5/TB2OUT Top View DVDD5
PE6/TB3IN/INT6 VOUT3
1.6 Pin Layout
PE7/TB3OUT/INT7 20 RESET
DVSS 60 RVDD5
TMPM376FDDFG
PL0/INTB MODE
PL1/INTA DVSS
PC0/UO0 VOUT15
PC1/XO0 25 PF4/ENCZ1/RXD3
PC2/VO0 55 PF3/ENCB1/TXD3
PC3/YO0 PF2/ENCA1/SCLK3 /CTS3
PC4/WO0 PF1/TB7OUT
PC5/ZO0 PF0/TB7IN/BOOT
PC6/EMG0 30 PM1/X2
35
40
45
50
DVSS
DVSS
Figure 1-9 Pin layout (TMPM376FDDFG, LQFP100 TOP VIEW)

DVDD5
PM0/X1
PG5/ZO1
PG1/XO1
PG2/VO1
PG3/YO1
PG0/UO1
PD3/INT9
PG4/WO1
PD5/TXD2
PC7/OVV0
PD6/RXD2
PG7/OVV1
PG6/EMG1
PD2/ENCZ0
PD4/SCLK2/CTS2
PD0/ENCA0/TB5IN
PD1/ENCB0/TB5OUT
2015/3/31
TMPM370 Group
1.7 Pin Names and Functions
TMPM370 Group
1.7.1 Functional Pin Names and Their Functions
1.7.1.1 Pin Name of Peripheral Functions
Table 1-5 Peripheral functions and corresponding pin names and functions
Input
Peripheral function Pin name or Function
Output
External interrupt input pin.

External interrupt INTx Input
External interrupt pin has a noise filter (filter width: 30ns typ.).
TBxIN Input Input capture input pin.

16-bit timer/event counter
TBxOUT Output Output pin.
TXDx Output Data output pin.
RXDx Input Data input pin.

SIO/UART
SCLKx I/O Clock input/output pin.
CTSx Input Handshake input pin.
SDAx I/O I2C bus mode data input/output pin.

SOx Output Synchronous 8-bit SIO mode data output pin.
I2C/SIO SCLx I/O I2C bus mode clock input/output pin.

SIx Input Synchronous 8-bit SIO mode data output pin.
SCKx I/O Synchronous 8-bit SIO mode clock input/output pin.
AINAx Input Analog input pin. (Available only in the TMPM370 and TMPM376FD.)
Analog-digital converter
AINBx Input Analog input pin.
OVVx Input OVV Signal input pin.
EMGx Input EMG Signal input pin.
UOx Output U-phase output pin.
XOx Output X-phase output pin.

PMD
VOx Output V-phase output pin.
YOx Output Y-phase output pin.
WOx Output W-phase output pin.
ZOx Output Z-phase output pin.
ENCAx Input A-phase input pin.
Encoder input circuit ENCBx Input B-phase input pin.
ENCZx Input Z-phase input pin.
2015/3/31 Page 30
TMPM370 Group
1.7.1.2 Debug Pin Name
Table 1-6 Debug pin names and functions
Input
Debug pin
or Function
name
Output
TMS Input JTAG test mode selection input pin.
TCK Input JTAG serial clock input pin.
TDO Output JTAG serial data output pin.
TDI Input JTAG serial data input pin.
JTAG test reset input pin.

TRST Input
(Note: Available only in the TMPM370FY,TMPM372FW and TMPM376FD.)
SWDIO I/O Serial-wire data input/output pin.
SWCLK Input Serial-wire clock input pin.
SWV Output Serial-wire viewer output pin.
Trace clock output pin.

TRACECLK Output
Trace data output pin 0.

TRACEDATA0 Output
Trace data output pin 1.

TRACEDATA1 Output
1.7.1.3 Control Pin Name
Table 1-7 Control pin names and functions
Input
Control pin
or Function
name
Output
Mode pin.
MODE Input
Must be fixed to "Low" level.
RESET Input Reset signal input pin.
1.7.1.4 Clock Pin Name
Table 1-8 Clock pin names and functions
Input
Clock pin name or Function
Output
X1 Input High-speed oscillation connection pin.
X2 Output High-speed oscillation connection pin.
Page 31 2015/3/31
TMPM370 Group
1.7.1.5 Power Supply Pin name
Table 1-9 Power supply pin names and functions (TMPM370)
Power supply
Function
pin names
VOUT3 Capacitor (3.3 F to 4.7 F) connection pin for regulators.
VOUT15 Capacitor (3.3 F to 4.7F) connection pin for regulators.
RVDD5 Power supply pin for regulators.
DVDD5 Power supply pin for digital.
DVSS GND pin for digital.
AVDD5A Power supply pin for ADC Unit A.
AVDD5B Power supply pin for ADC Unit B.
AVSSA GND pin for ADC Unit A.
AVSSB GND pin for ADC Unit B.
VREFHA Analog reference voltage for ADC Unit A. (High level)
VREFLA Analog reference voltage for ADC Unit A. (Low level)
VREFHB Analog reference voltage for ADC Unit B. (High level)
VREFLB Analog reference voltage for ADC Unit B. (Low level)
AMPVDD5 Power supply pin for OP-AMP and comparators.
AMPVSS GND pin for OP-AMP and comparators.
Table 1-10 Power supply pin names and functions (TMPM372, TMPM373, TMPM374)
Power supply pin

Function
names
VOUT15 Capacitor (3.3F to 4.7 F) connection pin for regulators.
AVDD5B Power supply pin for ADC Unit.
AVSSB GND pin for ADC.
VREFHB Analog reference voltage for ADC. (High level)
VREFLB Analog reference voltage for ADC. (Low level)
2015/3/31 Page 32
TMPM370 Group
Power supply pin

Function
names
VINREG5 Power supply pin for regulators.
DVDD5B Power supply pin for digital.
DVSSB GND pin for digital.
AVDD5B (Note1) Power supply pin for ADC Unit.
AVSS (Note2) GND pin for ADC.
VREFHB (Note1) Analog reference voltage for ADC. (High level)
VREFLB (Note2) Analog reference voltage for ADC. (Low level)
AMPVDD5 (Note1) Power supply pin for Op-Amp.
AMPVSS (Note2) GND pin for Op-Amp.
Note 1: Analog power supplies (AVDD5B, VREFHB and AMPVDD5) are shared.
Note 2: Analog GNDs (AVSSB, VREFLB and AMPVSS) are shared.
Power supply pin

Function
names
VOUT3 Capacitor (3.3 F to 4.7F) connection pin for regulators.
AVDD5A Power supply pin for ADC Unit.
AVDD5B GND pin for ADC Unit B.
AVSSA GND pin for ADC Unit A.
AVSSB GND pin for ADC Unit B.
VREFHA Analog reference voltage for ADC Unit A. (High level)
VREFLA Analog reference voltage for ADC Unit A. (Low level)
VREFHB Analog reference voltage for ADC Unit B. (High level)
VREFLB Analog reference voltage for ADC Unit B. (Low level)
Page 33 2015/3/31
TMPM370 Group
VOUT15
VOUT3
Capacitor for regulators
(Place the capacitor in
DVSS shortest distance from
VOUT15, VOUT3 and DVSS
GND
Figure 1-10 Capacitors connection diagram for regulators
2015/3/31 Page 34
TMPM370 Group
1.7.2 Pin Name and Functions
1.7.2.1 Conventions Used in the Table
Various conventional symbols are used in the following tables.
1. Function A
Dual functions in which the pins are assigned to ports without the function register settings
are described.
2. Function B
Dual functions in which the pins are assigned to ports by the register settings are described.
The numbers shown in the "Function B" Column correspond to the numbers of function regis-
ters.
3. Pin specifications
The symbols below have the following meanings:
SMT/CMOS: Input gate
SMT: Schmitt trigger input
CMOS: CMOS input
5V_T: 5V tolerant
-: Not applicable. This product group operates at 5 V.
OD: Programmable open-drain output

Yes: Support
N/A: Not available
PU/PD: Programmable pull-up/pull-down

PU: Programmable pull-up is selectable.
PD: Programmable pull-down is selectable.
Page 35 2015/3/31
TMPM370 Group
1.7.2.2 TMPM370 Port/Debug Pins
The tables below show pin numbers and pin names by the PORT order.
Table 1-13 TMPM370FYFG/TMPM370FYDFG Pin numbers and pin names <PORT order> (1/3)
Pin No. Function B Port specification

Func-
PORT
tion A SMT/
QFP100 LQFP100 1 2 3 4 5 PU/PD OD 5V_T
CMOS
PORT A
4 2 PA0 TB0IN INT3 PU/PD Yes - SMT
5 3 PA1 TB0OUT PU/PD Yes - SMT
8 6 PA4 SCLK1 CTS1 PU/PD Yes - SMT
9 7 PA5 TXD1 TB6OUT PU/PD Yes - SMT
10 8 PA6 RXD1 TB6IN PU/PD Yes - SMT
PORT B
TRACE
65 63 PB0 PU Yes - SMT
CLK
TRACE
DATA0
TRACE
DATA1
TMS/
SWDIO
TCK/
69 67 PB4 PD Yes - SMT
SWCLK
TDO/
SWV
71 69 PB6 TDI PU Yes - SMT
72 70 PB7 TRST PU Yes - SMT
PORT C
24 22 PC0 UO0 PU/PD Yes - SMT
25 23 PC1 XO0 PU/PD Yes - SMT
26 24 PC2 VO0 PU/PD Yes - SMT
27 25 PC3 YO0 PU/PD Yes - SMT
28 26 PC4 WO0 PU/PD Yes - SMT
29 27 PC5 ZO0 PU/PD Yes - SMT
30 28 PC6 EMG0 PU/PD Yes - SMT
31 29 PC7 OVV0 PU/PD Yes - SMT
2015/3/31 Page 36
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
PORT D
32 30 PD0 ENCA0 TB5IN PU/PD Yes - SMT
33 31 PD1 ENCB0 TB5OUT PU/PD Yes - SMT
34 32 PD2 ENCZ0 PU/PD Yes - SMT
35 33 PD3 INT9 PU/PD Yes - SMT
36 34 PD4 SCLK2 CTS2 PU/PD Yes - SMT
37 35 PD5 TXD2 PU/PD Yes - SMT
38 36 PD6 RXD2 PU/PD Yes - SMT
PORT E
12 10 PE0 TXD0 PU/PD Yes - SMT
13 11 PE1 RXD0 PU/PD Yes - SMT
14 12 PE2 SCLK0 CTS0 PU/PD Yes - SMT
15 13 PE3 TB4OUT PU/PD Yes - SMT
17 15 PE4 TB2IN INT5 PU/PD Yes - SMT
20 18 PE7 TB3OUT INT7 PU/PD Yes - SMT
PORT F
52 50 PF0 BOOT TB7IN PU/PD Yes - SMT
53 51 PF1 TB7OUT PU/PD Yes - SMT
54 52 PF2 ENCA1 SCLK3 CTS3 PU/PD Yes - SMT
55 53 PF3 ENCB1 TXD3 PU/PD Yes - SMT
56 54 PF4 ENCZ1 RXD3 PU/PD Yes - SMT
PORT G
39 37 PG0 UO1 PU/PD Yes - SMT
40 38 PG1 XO1 PU/PD Yes - SMT
41 39 PG2 VO1 PU/PD Yes - SMT
44 42 PG3 YO1 PU/PD Yes - SMT
45 43 PG4 WO1 PU/PD Yes - SMT
46 44 PG5 ZO1 PU/PD Yes - SMT
47 45 PG6 EMG1 PU/PD Yes - SMT
48 46 PG7 OVV1 PU/PD YES - SMT
PORT H
98 96 PH0 AINA0 INT0 PU/PD Yes - SMT
Page 37 2015/3/31
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
95 93 PH3 AINA3 PU/PD Yes - SMT
PORT I
90 88 PI0 AINA8 PU/PD Yes - SMT
AINA9/
87 85 PI1 PU/PD Yes - SMT
AINB0
AINA10/
AINB1
AINA11/
AINB2
PORT J
82 80 PJ0 AINB3 PU/PD Yes - SMT
76 74 PJ6 AINB9 INTC PU/PD Yes - SMT
75 73 PJ7 AINB10 INTD PU/PD Yes - SMT
PORT K
74 72 PK0 AINB11 INTE PU/PD Yes - SMT
73 71 PK1 AINB12 INTF PU/PD Yes - SMT
PORTL
22 20 PL0 INTB N/A N/A - SMT
23 21 PL1 INTA N/A N/A - SMT
2015/3/31 Page 38
TMPM370 Group
Table 1-14 TMPM372FWUG Pin numbers and pin names <PORT order>(1/3)

Func-
PORT
tion A SMT/
LQFP64 1 2 3 4 5 PU/PD OD 5V_T
CMOS
PORT A
33 PA0 TB0IN INT3 PU/PD Yes - SMT
34 PA1 TB0OUT PU/PD Yes - SMT
64 PA3 TB1OUT PU/PD Yes - SMT
62 PA4 SCLK1 CTS1 PU/PD Yes - SMT
61 PA5 TXD1 TB6OUT PU/PD Yes - SMT
60 PA6 RXD1 TB6IN PU/PD Yes - SMT
PORT B
TRACE
15 PB0 PU Yes - SMT
CLK
TRACE
16 PB1 PU Yes - SMT
DATA0
TRACE
17 PB2 PU Yes - SMT
DATA1
TMS/
22 PB3 PU Yes - SMT
SWDIO
TCK/
21 PB4 PD Yes - SMT
SWCLK
TDO/
20 PB5 PU Yes - SMT
SWV
19 PB6 TDI PU Yes - SMT
18 PB7 TRST PU Yes - SMT
PORT D
1 PD4 SCLK2 CTS2 PU/PD Yes - SMT
2 PD5 TXD2 PU/PD Yes - SMT
3 PD6 RXD2 PU/PD Yes - SMT
PORT E
23 PE0 TXD0 PU/PD Yes - SMT
24 PE1 RXD0 PU/PD Yes - SMT
25 PE2 SCLK0 CTS0 PU/PD Yes - SMT
32 PE3 TB4OUT PU/PD Yes - SMT
26 PE4 TB2IN INT5 PU/PD Yes - SMT
Page 39 2015/3/31
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
31 PE5 TB2OUT PU/PD Yes - SMT
58 PE7 TB3OUT INT7 PU/PD Yes - SMT
PORT F
14 PF0 BOOT TB7IN PU/PD Yes - SMT
30 PF1 TB7OUT PU/PD Yes - SMT
27 PF2 ENCA1 SCLK3 CTS3 PU/PD Yes - SMT
28 PF3 ENCB1 TXD3 PU/PD Yes - SMT
29 PF4 ENCZ1 RXD3 PU/PD Yes - SMT
PORT G
4 PG0 UO1 PU/PD Yes - SMT
5 PG1 XO1 PU/PD Yes - SMT
6 PG2 VO1 PU/PD Yes - SMT
7 PG3 YO1 PU/PD Yes - SMT
8 PG4 WO1 PU/PD Yes - SMT
9 PG5 ZO1 PU/PD Yes - SMT
10 PG6 EMG1 PU/PD Yes - SMT
11 PG7 OVV1 PU/PD Yes - SMT
PORT I
45 PI3 AINB2 PU/PD Yes - SMT
PORT J
46 PJ0 AINB3 PU/PD Yes - SMT
52 PJ6 AINB9 INTC PU/PD Yes - SMT
53 PJ7 AINB10 INTD PU/PD Yes - SMT
PORT K
2015/3/31 Page 40
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
54 PK0 AINB11 INTE PU/PD Yes - SMT
55 PK1 AINB12 INTF PU/PD Yes - SMT
PORT M
37 PM0 PU/PD Yes - SMT
Page 41 2015/3/31
TMPM370 Group
Table 1-15 TMPM373FWDUG Pin numbers and pin names <PORT order>(1/2)

Func-
PORT
tion A SMT/
CMOS
PORT A
PORT B
TMS/
16 PB3 PU Yes - SMT
SWDIO
TCK/
15 PB4 PD Yes - SMT
SWCLK
TDO/
14 PB5 PU Yes - SMT
SWV
PORT D
1 PD6 RXD2 PU/PD Yes - SMT
PORT E
PORT F
24 PF1 TB7OUT PU/PD Yes - SMT
PORT G
2015/3/31 Page 42
TMPM370 Group
Table 1-15 TMPM373FWDUG Pin numbers and pin names <PORT order>(2/2)

Func-
PORT
tion A SMT/
CMOS
PORT I
35 PI3 AINB2 PU/PD Yes - SMT
PORT J
PORT K
PORT M
Page 43 2015/3/31
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
PORT A
PORT B
TMS/
15 PB3 PU Yes - SMT
SWDIO
TCK/
14 PB4 PD Yes - SMT
SWCLK
TDO/
13 PB5 PU Yes - SMT
SWV
PORT E
PORT F
PORT G
2015/3/31 Page 44
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
PORT I
32 PI3 AINAB2 PU/PD Yes - SMT
PORT J
PORT K
PORT M
Page 45 2015/3/31
TMPM370 Group
Table 1-17 TMPM375FSDMG Pin numbers and pin names <PORT order>(1/2)

Function
PORT
A SMT/
SSOP30 1 2 3 4 5 PU/PD OD 5V_T
CMOS
PORT B
TMS/ RXD1
16 PB3 PU/PD Yes - SMT
SWDIO (Note 1)
TCK/ TXD1
17 PB4 PU/PD Yes - SMT
SWCLK (Note 2)
SDA0/
TDO/
18 PB5 SCK0 SO0 PU/PD Yes - SMT
SWV
(Note 3)
SCL0/
RXD1
19 PB6 TDI SIO TB7OUT INT6 PU/PD Yes - SMT
(Note 1)
(Note 4)
PORT E
30 PE0 TXD0 ENCA PU/PD Yes - SMT
29 PE1 RXD0 TB4IN ENCB PU/PD Yes - SMT
SCL0
21 PE2 SCLK0 CTS0 ENCZ INT7 PU/PD Yes - SMT
(Note 4)
PORT F
SDA0/
TXD1
20 PF0 BOOT TB7IN SO0 INTC PU/PD Yes - SMT
(Note 2)
(Note 3)
PORT G
8 PG0 U0 PU/PD Yes - SMT
9 PG1 X0 PU/PD Yes - SMT
10 PG2 V0 PU/PD Yes - SMT
11 PG3 Y0 PU/PD Yes - SMT
12 PG4 W0 PU/PD Yes - SMT
13 PG5 Z0 PU/PD Yes - SMT
14 PG6 EMG OVV PU/PD Yes - SMT
PORT J
2 PJ6 AINB9 PU/PD N/A - SMT
3 PJ7 AINB10 PU/PD N/A - SMT
PORT K
2015/3/31 Page 46
TMPM370 Group
Table 1-17 TMPM375FSDMG Pin numbers and pin names <PORT order>(2/2)

Function
PORT
A SMT/
SSOP30 1 2 3 4 5 PU/PD OD 5V_T
CMOS
4 PK0 AINB11 PU/PD Yes - SMT
5 PK1 AINB12 PU/PD Yes - SMT
PORT M
Note 1: RXD1 is a shared pin for PB3 and PB6.

Note 2: TXD1 is a shared pin for PB4 and PF0.
Note 3: SDA0/SO0 is a shared pin for PB5 and PF0.
Note 4: SCL0 is a shared pin for PB6 and PE2.
Page 47 2015/3/31
TMPM370 Group
Table 1-18 TMPM376FDFG/TMPM376FDFG Pin numbers and pin names <PORT order> (1/4)

Func-
PORT
tion A SMT/
CMOS
PORT A
8 6 PA4 SCLK1 CTS1 PU/PD Yes - SMT
9 7 PA5 TXD1 TB6OUT PU/PD Yes - SMT
10 8 PA6 RXD1 TB6IN PU/PD Yes - SMT
PORT B
TRACE
CLK
TRACE
DATA0
TRACE
DATA1
TMS/
SWDIO
TCK/
69 67 PB4 PD Yes - SMT
SWCLK
TDO/
SWV
71 69 PB6 TDI PU Yes - SMT
72 70 PB7 TRST PU Yes - SMT
PORT C
24 22 PC0 UO0 PU/PD Yes - SMT
25 23 PC1 XO0 PU/PD Yes - SMT
26 24 PC2 VO0 PU/PD Yes - SMT
27 25 PC3 YO0 PU/PD Yes - SMT
28 26 PC4 WO0 PU/PD Yes - SMT
29 27 PC5 ZO0 PU/PD Yes - SMT
30 28 PC6 EMG0 PU/PD Yes - SMT
31 29 PC7 OVV0 PU/PD Yes - SMT
PORT D
2015/3/31 Page 48
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
32 30 PD0 ENCA0 TB5IN PU/PD Yes - SMT
33 31 PD1 ENCB0 TB5OUT PU/PD Yes - SMT
34 32 PD2 ENCZ0 PU/PD Yes - SMT
35 33 PD3 INT9 PU/PD Yes - SMT
36 34 PD4 SCLK2 CTS2 PU/PD Yes - SMT
37 35 PD5 TXD2 PU/PD Yes - SMT
38 36 PD6 RXD2 PU/PD Yes - SMT
PORT E
12 10 PE0 TXD0 PU/PD Yes - SMT
13 11 PE1 RXD0 PU/PD Yes - SMT
14 12 PE2 SCLK0 CTS0 PU/PD Yes - SMT
20 18 PE7 TB3OUT INT7 PU/PD Yes - SMT
PORT F
TB7IN
52 50 PF0 BOOT PU/PD Yes - SMT
(Note)
53 51 PF1 TB7OUT PU/PD Yes - SMT
54 52 PF2 ENCA1 SCLK3 CTS3 PU/PD Yes - SMT
55 53 PF3 ENCB1 TXD3 PU/PD Yes - SMT
56 54 PF4 ENCZ1 RXD3 PU/PD Yes - SMT
PORT G
39 37 PG0 UO1 PU/PD Yes - SMT
40 38 PG1 XO1 PU/PD Yes - SMT
41 39 PG2 VO1 PU/PD Yes - SMT
44 42 PG3 YO1 PU/PD Yes - SMT
45 43 PG4 WO1 PU/PD Yes - SMT
46 44 PG5 ZO1 PU/PD Yes - SMT
47 45 PG6 EMG1 PU/PD Yes - SMT
48 46 PG7 OVV1 PU/PD Yes - SMT
PORT H
Page 49 2015/3/31
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
PORT I
90 88 PI0 AINA8 PU/PD Yes - SMT
AINA9/
AINB0
AINA10/
AINB1
AINA11/
AINB2
PORT J
76 74 PJ6 AINB9 INTC PU/PD Yes - SMT
75 73 PJ7 AINB10 INTD PU/PD Yes - SMT
PORT K
74 72 PK0 AINB11 INTE PU/PD N/A - SMT
73 71 PK1 AINB12 INTF PU/PD N/A - SMT
PORTL
22 20 PL0 INTB N/A Yes - SMT
23 21 PL1 INTA N/A Yes - SMT
PORTM
49 47 PM0 PU/PD Yes - SMT
51 49 PM1 PU/PD Yes - SMT
2015/3/31 Page 50
TMPM370 Group

Func-
PORT
tion A SMT/
CMOS
PORTN
2 100 PN0 SO/SDA PU/PD Yes - SMT
1 99 PN1 SI/SCL PU/PD Yes - SMT
100 98 PN2 SCK PU/PD Yes - SMT
TB7IN
99 97 PN3 PU/PD Yes - SMT
(Note)
Note: TB7IN is a shared pin for PF0 and PN3.
Page 51 2015/3/31
TMPM370 Group
1.7.2.8 Dedicated Pins
(1) Control Pins
Table 1-19 Pin numbers and Pin names
TMPM370FYDFG TMPM370FYFG
Products TMPM372FWUG TMPM373FWDUG TMPM374FWUG TMPM375FSDMG
TMPM376FDDFG TMPM376FDFG
Pin No.
Control Pin names
QFP100 LQFP100 LQFP64 LQFP48 LQFP44 SSOP30
MODE 59 57 41 31 28 7
RESET 61 59 44 34 31 15
(2) Clock Pins
Table 1-20 Pin numbers and pin names
TMPM376FDDFG TMPM376FDFG
Pin No.
Clock Pin names
QFP100 LQFP100 LQFP64 LQFP48 LQFP44 SSOP30
X1(Note) 49 47 37 27 24 25
X2(Note) 51 49 39 29 26 27
XT1 - - - - - -
XT2 - - - - - -
Note: X1 and X2 are dedicated pins only in the TMPM370. In the other products, these pins are shared
with input/output pins.
2015/3/31 Page 52
TMPM370 Group
1.7.2.9 Power Supply Pins
Table 1-21 Pin numbers and Pin names
TMPM376FDFG TMPM376FDFG
Power supply Pin No.

pin names QFP100 LQFP100 LQFP64 LQFP48 LQFP44 SSOP30
DVDD5 16, 42, 63 14, 40, 61 13, 36 11, 26 10, 23 -
RVDD5 60 58 42 32 29 -
AVDD5A 89 87 - - - -
AVDD5B 84 82 57 43 39 6 (Note2)
AMPVDD5 100 (Note1) 98 (Note1) - - - 6 (Note2)
VOUT15 57 55 40 30 27 24
VOUT3 62 60 43 33 30 22
3, 21, 43, 50, 58, 1, 19, 41, 48, 56,

DVSS 12, 38 10, 28 9, 25 -
64 62
AVSSA 88 86 - - - -
AVSSB 83 81 56 42 38 1 (Note3)
AMPVSS 99 (Note1) 97 (Note1) - - - 1 (Note3)
DVDD5B - - - - - 28
DVSSB - - - - - 26
VINREG5 - - - - - 23
CVREFABC 2 (Note 1) 100 (Note 1) - - - -
CVREFD 1 (Note 1) 99 (Note 1) - - - -
Note 1: Available only in the TMPM370.

Note 2: AMPVDD5 and AVDD5B in the TMPM375 are shared pins.
Note 3: AMPVSS and AVSSB in the TMPM375 are shared pins.
Page 53 2015/3/31
1.8 Port Equivalent Circuit Schematic
TMPM370 Group

The port equivalent circuit schematic is basically drawn by using the same gate symbols as those of the Standard
CMOS logic 74HCxx series.
The input protection resistance ranges from several tens to several hundreds of .
Note: Resistors without values in the following figures indicate input protection resistors.
1.8.1 Ports
PA0 to PA7, PC0 to PC7,

TMPM370 PD0 to PD6, PE0 to PE7,
PF0 to PF4, PG0 to PG7 Output Data
P-ch
PA0 to PA7, PD4 to PD6,
TMPM372 PE0 to PE7, PF0 to PF4, Open-drain Enable
PG0 to PG7, PM0 to PM1
N-ch
Output Enable
PA2, PA4 to PA6, PD6,
PE0 to PE2, PE4,
TMPM373
PE6 to PE7, PF0 to PF4,
Input Data I/O port
PG0 to PG7, PM0 to PM1
Schmitt trigger
PA0 to PA6, PE0 to PE2,
Programmable
PE4, PE6 to PE7, PF0, Input Enable Pull-up Resistor
TMPM374
PF2 to PF4, PG0 to PG7, Pull-up Enable
PM0 to PM1
PB3 to PB6, PE0 to PE2, Pull-down Enable

TMPM375
PF0, PG0 to PG7
Programmable
PA0 to PA7, PC0 to PC7, Pull-down Resistor
PD0 to PD6, PE0 to PE7,
TMPM376
PF0 to PF4, PG0 to PG7,
PM0 to PM1, PN0 to PN3
PH0 to PH7, PI0 to PI3,

TMPM370
PJ0 to PJ7, PK0 to PK1 Input AIN
PI3, PJ0 to PJ7,

TMPM372
PK0 to PK1 Output Data
P-ch
PI3, PJ0, PJ5 to PJ7,
TMPM373 Open-drain Enable
PK0 to PK1
PI3, PJ0, PJ6 to PJ7, N-ch

TMPM374 Output Enable
PK0 to PK1
TMPM375 PJ6 to PJ7, PK0 to PK1

Input Data I/O port
Schmitt trigger
Programmable
Input Enable Pull-up Resistor
PH0 to PH7, PI0 to PI3, Pull-up Enable

TMPM376
PJ0 to PJ7, PK0 to PK1
Pull-down Enable
Programmable
Pull-down Resistor
2015/3/31 Page 54
TMPM370 Group
TMPM370
PB0 to PB3,
TMPM372
PB5 to PB7 Output Data
TMPM376 P-ch
Open-drain Enable
Output Enable N-ch
Input Data I/O port

TMPM373
PB3, PB5 to PB6
TMPM374 Schmitt trigger
Programmable
Input Enable Pull-up Resistor
Pull-up Enable
Output Data
P-ch
Output Enable N-ch
TMPM370
TMPM372
Input Data I/O port
TMPM373 PB4
TMPM374 Schmitt trigger
TMPM376 Input Enable
Pull-down Enable
Programmable
Pull-down Resistor
Input Data Input port

TMPM370
PL0 to PL1 Schmitt trigger
TMPM376
Input Enable
Page 55 2015/3/31
TMPM370 Group
1.8.2 Analog Power Supply Pins
AVDD5A/VREFHA,
AVSSA/VREFLA, AVDD AVDD5(VREFH)
TMPM370
AVDD5B/VREFHB,
AVSSB/VREFLB ADC
VREFH
AVDD5B/VREFHB,
TMPM372
AVSSB/VREFLB
AVDD5B/VREFHB,
TMPM373 Resistor
AVSSB/VREFLB ladder
AVDD5B/VREFHB,
TMPM374
AVSSB/VREFLB
AVDD5/VREFH, AVSSB/ VREFL

TMPM375
VREFL
AVDD5A/VREFHA, AVSS AVSS(VREFL)

AVSSA/VREFLA,
TMPM376
AVDD5B/VREFHB,
AVSSB/VREFLB
CVREFABC
TMPM370 +PRWV
CVREFD
1.8.3 Control Pins
Input Pin
MODE
Schmitt trigger
This pin must be connected to GND.
Pull-up Resistor
RESET
Input Pin
Schmitt trigger
2015/3/31 Page 56
TMPM370 Group
1.8.4 Clocks
Clock
Oscillator Circuit
X2
500M 1k (typ.)
(typ.)
X1, X2
High-frequency
Oscillation Enable
X1
Page 57 2015/3/31
1.9 Revision History
TMPM370 Group
Version Date Note
Rev1.0 2014/ 2/12 First Release
Rev1.1 2015/ 3/31 Contents Revised.
2015/3/31 Page 58
TMPM370 Group
RESTRICTIONS ON PRODUCT USE

Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the
information in this document, and related hardware, software and systems (collectively "Product") without notice.
This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even
with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers
are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware,
software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss
of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product,
create designs including the Product, or incorporate the Product into their own applications, customers must also refer to
and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the
specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the
"TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be
used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but
not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs,
algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for
such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF
WHICH MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS
PUBLIC IMPACT ("UNINTENDED USE"). Except for specific applications as expressly stated in this document,
Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry,
medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment,
equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric
power, and equipment used in finance-related fields. IF YOU USE PRODUCT FOR UNINTENDED USE, TOSHIBA
ASSUMES NO LIABILITY FOR PRODUCT. For details, please contact your TOSHIBA sales representative.
Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable laws or regulations.
The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA
for any infringement of patents or any other intellectual property rights of third parties that may result from the use of
Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or
otherwise.
ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS
OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO
LIABILITY WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR
INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF
OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS
OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR INFORMATION,
INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
Do not use or otherwise make available Product or related software or technology for any military purposes, including
without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological
weapons or missile technology products (mass destruction weapons). Product and related software and technology may be
controlled under the applicable export laws and regulations including, without limitation, the Japanese Foreign Exchange
and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software
or technology are strictly prohibited except in compliance with all applicable export laws and regulations.
Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility
of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of
controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR
DAMAGES OR LOSSES OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND
REGULATIONS.
Page 59 2015/3/31
TMPM370 Group
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Product Introduction Guide

Application Peripheral functions suitable for each application

WDT NVIC FLASH PLL /CG

Analogs Timer Serial communications

AMP/CMP Motor control functions

Figure 1-1 Block diagram of the TMPM370 Group

1.1 Product Lineup of the TMPM370 Group

128 KBytes TMPM374FWUG TMPM373FWDUG TMPM372FWUG

Table 1-1 A product list described in functional order

Timer function TMRB 8 channels 8 channels 8 channels 8 channels 4 channels 8 channels

Serial commu- SIO/UART 4 channels 4 channels 3 channels 3 channels 2 channels 4 channels

1 unit 1 unit 1 unit 1 unit 1 unit 1 unit

CMP 4 channels 0 channel 0 channel 0 channel 0 channel 0 channel

ENC 2 channels 1 channel 1 channel 1 channel 1 channel 2 channels

WDT 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel

Note 1: Not applicable. This product group operates at 5 V.

1.2 Functional Description

1. Based on ARM Cortex-M3 core

2. Flash memory and RAM

3. Clock control (CG)

4. Low power consumption function

5. External interrupt function

8. Serial communication functions

10. Motor Control functions

11. System functions

13. Debug interface

1.3 Operating Conditions

1.3.1 Maximum Operating Frequency

1.3.2 Operating Voltage Range

1.3.3 Operating Temperature Range

TMPM375FS 40 to 105C (1 to 40 MHz)

Table 1-2 Product list and corresponding packages

Product name Package

1.5 Functional Description

1.5.1 Flash Memory

Table 1-3 Capacities and configurations of Flash memory

Block configuration (pcs) Number of Write time (s) Erase time(s)

TMPM370FY 256 0 3 1 2 0 64 1.28 0.4

TMPM375FS 64 0 0 2 0 0 32 0.64 0.2

TMPM376FD 512 3 1 2 0 0 128 1.28 0.4

Table 1-4 RAM capacity

1.5.3 Clock Control (CG)

1. Internal high-speed oscillation circuit:

Internal high-speed oscillation circuit (MHz)

TMPM370FY Not available

TMPM375FS 9.4 9.7 10

Products The number of multiplications

1.5.4 Timer Function

1.5.4.1 16-bit Timer/Event Counter (TMRB)

(2) Operation mode

(a) Interval timer mode

(b) Event counter mode

(c) Programmable rectangular wave output (PPG) mode

(d) External trigger programmable rectangular wave output (PPG) mode

In this mode, 1-shot pulse is output with small delay.

(3) Interrupt request

The TMRB has the following interrupt requests:

(a) Compare match interrupt

(b) Overflow interrupt

(c) Input capture interrupt

1.5.5 Serial Communication Functions