Professional Documents
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Issue 1
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MATERIAL:
A FINISH: SHT 1 OF 4 A
COVER + FASCIA A3
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MATERIAL:
A FINISH: SHT 2 OF 4 A
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SOLDERED TO 5
E POWER AMP PCB E
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4
MATERIAL:
A FINISH: SHT 3 OF 4 A
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ITEM NO. PART No. DESCRIPTION QTY
1 TGP3528 REAR PANEL ASSY 1
2 TGP3536 INPUT PCB ASSY - MAIN 1
3 TGP3536 (part) INPUT PCB ASSY - ETHERNET 1
D D
4 4 TGP3536 (part) INPUT PCB ASSY - CONNECTORS 1
3
5 TGP3537 HDMI PCB ASSY - MAIN 1
6 TGP3537 (part) HDMI PCB ASSY - VIDEO 1
7 TGP3529 / TGP3530 AM/FM TUNER EU / US 1
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1 MATERIAL:
A FINISH: SHT 4 OF 4 A
PART NUMBER AND DRAWING NUMBER
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AVR400 Power Amplifier Circuit Description
Apart from the power transformer, the power amplifier electronics is fully contained on the large
double sided PTH PCB and heatsink located at the bottom of the AVR400. This is called the Main Board
on the schematic diagrams (pages 11 and 12). The Main Board also contains the mains input circuitry, in-
cluding the safety fuses and standby power transformer, so great care should be exercised when probing this
area of the board.
Note that some small surface mount components are soldered to the underside of this PCB.
The 7 power amplifiers are identical in terms of circuitry, although necessary compromises in the physi-
cal layout may give rise to slight differences in measured noise, crosstalk and distortion performance.
The two channels at the extreme ends of the heatsink have less radiating area available to them and will
run hotter under load this is not normally an issue as these are assigned to the SBL and SBR channels.
Looking from the rear of the AVR, facing the flat face of the heatsink, the channel order is SBR, SR, FR,
C, FL, SL and SBL, the same order as the loudspeaker terminals. The SBL and SBR channels can also be
assigned to zone 2 or as duplicates of the FL and FR channels for when passively biamping the main
stereo loudspeakers. In this latter condition we recommend assigning the SBL and SBR outputs to the
tweeters of the FL and FR speakers, in order to minimize the power amplifiers heat dissipation.
Note that the 8 pre-amplifier outputs are also on this PCB apart from SUB their phono sockets are
effectively in parallel with the power amplifier inputs, which are fed from the Input Board via a ribbon
cable and CON103. This connector also carries 5 power supply and power amplifier control signals to
and from the system microprocessor (P) IC151 situated on the Input Board above the Main Board.
The amplifiers power supply is provided from a centre-tapped secondary winding on the toroidal
power transformer, via the connector BN508, to the bridge rectifier D5830. This is mounted on a
small PCB near the top of the heatsink. The rectified AC is then sent to the main PCB via connectors
BN581/582. To avoid induced hum and distortion it is important to keep these cables twisted tightly
together and well away from the actual power amplifier circuitry. The main 15,000F 80V reservoir
capacitors, C835 and C836, are positioned on the main PCB well away from the power amplifier input
traces and close to the system star ground. The smoothed DC is fed to the power amplifiers Vcc and
Vee lines near the centre of the heatsink via a twisted-pair cable, again to minimize induction into the
power amplifiers. Vcc and Vee are typically +/- 52V at 234VAC with no signal. Q5845 sends a fraction of
Vcc to the muting control on the Input Board.
The input stage is a long tailed pair Q5101 and Q5102, with local degeneration provided by R5105 and
R5107. The tail is fed from the negative rail via an approx 3mA ring-of-two constant current source,
Q5109 and Q5110. R5101 and C5101 at the input provide high frequency rolloff and help keep residual
DAC ultrasonic noise above 100kHz out of the power amplifier. DC blocking is provided by C5102 at
the input and C5107 in the feedback loop so that the whole power amplifier has unity gain at DC. The
midband AC gain is 22000/680 = 32.35 after allowing for the attenuation provided by R5101 and R5102.
Thus 875mV at the input produces 100W into 8 ohms at the output.
The long tailed pairs collectors are loaded by a current mirror, Q5103 and Q5104. The resistors R5103/4
and R5105/6 are 1% tolerance to minimize even order distortion. The collector of Q5101 also feeds the
Darlington class A voltage amplifier stage (VAS) made up of Q5115 and Q5116. Q5113 is loaded by the
output stage and the 8mA constant current source made up by Q5125 and Q5126. The amplifiers main
frequency compensation network (for stability) comprises C5115 plus the combination of C5116 and
R 5115. This adds gain inside the loop (two pole compensation) at high audio frequencies so that the
additional feedback further reduces high frequency distortion and crossover distortion within the audio
band.
These stages are partially decoupled from the Vcc and Vee power supplies by D5130/R5130/C5130 and
D5129/R5129/C5129 respectively. They are also bootstrapped to the amplifier output via the networks
R5118/C5128/R5128 and R5117/C5127/R5127. This raises the supply lines by approximately 3V at full
output to avoid clipping the driver stage prematurely.
The output stage comprises classic complementary emitter followers Q5150/Q5170 (NPN) and Q5160/
Q5180 (PNP). The On Semiconductor output transistors have a current gain that is sustained to about
10 amps and a very large safe operating area, which allows the amplifiers to drive low impedances well.
They also have built-in thermal compensation diodes which helps stabilize the quiescent current both
statically (when hot) and dynamically (when playing music at high level) this minimizes crossover
distortion and improves sound quality.
The output stage biasing is performed in the network around the amplified diode Q5120, which is
mounted in intimate thermal contact with the driver transistor Q5130, plus the two built-in diodes
associated with the output transistors. The thermistor R5122 is positioned on the PCB close to the
heatsink and provides extra downward compensation at very high temperatures. Bias is set by VR51 and
is largely independent of temperature it should be set to16-20mV when measured across the outer
terminals of the compound emitter resistor R5175, using the 2 pin connector CN51, 5 minutes or more
after the AVR400 is powered up.
The power amplifier output is routed across the PCB to the back panel. It includes a Zobel network
(sometimes called a Boucherot cell) R5183/C5183 and a series inductor L5185 damped by a 4.7R 2W re-
sistor R5184. These components help isolate the amplifier from reactive loads to ensure high frequency
stability. One half of the normally-off relay RL52 is used to switch the load in and out.
Each power amplifier is protected against overload in a number of ways. The complementary transistors
Q5130 and Q5131 protect the NPN half of the output stage and Q5140 and Q5141 the PNP half. They
operate as Sziklai pairs, passing negligible current until a threshold voltage of approx 600mV is reached
across R5132 and R5142. Between 600 and 700mV the pairs then ramp up current smoothly, diverting it
away from the bases of Q5150 and Q5160 to limit the output stage drive to a safe level, within the power
transistors SOA (safe operating area). The 600mV threshold voltage depends upon both the instantane-
ous current and voltage across the output transistors, set by the networks R5132/R5136/R5137/R5138/
R5175 for the top half and R5142/R5146/R5147/R5148/R5175 for the bottom half. R5135/R5145 and the
zener diodes D5135/D5145 change the slope of the protection locus at high Vce voltages. R5134/R5135
plus C5134/C5145 prevent fast transients and brief overloads from prematurely triggering the protec-
tion.
The above dual slope SOA protection is self resetting but if a gross overload persists for more than a
second or two (such as when a channels output is short circuited with music playing at a moderate to
loud level) then the open collector transistor Q5181 sinks current for long enough to initiate the ampli-
fiers full shutdown procedure via the line SOA_PROTECT. This can also be triggered by a total output
stage failure (which passes enough current through R5175 to turn on Q5188) via OVERLOAD or by an
excessive DC offset at the output terminals (via R5185) via V_DET. All these signals, and others, feed into
the protection module, described below.
The protection module comprises 8 transistors and associated parts positioned at the back of the PCB
near the preamplifier output sockets. It has a single output line named PROTECT which, when pulled
down from Vcc to ground, instructs the system P IC151 to shut down the whole amplifier. This occurs
when any of the following events happen:
1) Any amplifier channel pulls current through the SOA_PROTECT line for long enough to charge
up capacitors C5871 and then C5872 so that Q5874 turns on.
2) Any amplifier channel pulls current through the OVERLOAD line for long enough to charge up
C5882 and turn on Q5882 and thus Q5884.
3) Any amplifier channel has a large long term (DC) offset (typically greater than +/-3V) sFficient
to charge up C5861 enough to turn on either Q5862 (positive offset) or Q 5864 (negative offset).
These then turn on Q5863. N.B. This circuit is also used to detect imbalances in both the Vcc/Vee
and +/-15V power supplies (the latter is generated on the Power Supply board).
4) When the PTC thermistor TH585 mounted at the top centre of the heatsink gets sFficiently hot
(around 100C) and thus high resistance enough to cause Q5855 to turn on via the +12V supply.
Intermediate temperatures will not activate PROTECT but will provide signals to the level detec-
tors associated with the FAN_1 and FAN_2 lines, to run the cooling fans at high or low speeds
respectively.
Note that the fans 12V supply is gated via Q5909 and Q5911. This means the fans will not run when
no signal is present on the FL, C or SR channels, so that during quiet passages no fan noise should be
audible.
Considering the Main Board first, the mains voltage switching uses a double pole double throw slide
switch accessible from the back panel. One pole addresses the standby transformer and the other the
toroidal power transformer. Ensure the switch setting matches the supply voltage before switching on the
AVR400. Nominal settings are 115 and 230V +/- 15%. The 20mm 115V fuse in line with the toroidal trans-
former is rated at 15A T (Time delay) and the 20mm 230V fuse is rated at 8A T. Always replace these fuses
with the same type and value. The standby transformer T5941 is not fused but is designed to go open
circuit in case of overheating (e.g. if left connected to a 230V supply for longer than a few minutes when
the mains voltage selector is set to 115V).
The standby transformer generates approximately +9V DC via the bridge rectifier diodes D5495/6/7/8
and the 1,000F reservoir capacitor C5947.This is sent via pin 7 of CN501 to the Power Supply PCB
(confusingly marked as 5V). The rail voltage is also routed to the system microprocessor (P) via D5965/
R5965 and pin 6 of CN103 as POWER_MUTE.
The 5V relay RY594 is normally open. When the mains switch is closed then the SUB_POWER rail (approx
+4.3V) is activated from the Power Supply PCB via the standby transformer. When the system has
booted correctly, without any shutdown signals, then the POWER_RELAY signal from the system P also
goes high, pulling down Q5947 hard. Only then does the relay close and switch on the main toroidal
power transformer, enabling the rest of the system to boot up.
Now consider the Power Supply Board, found on page 14 of the schematic. This generates all the main
DC supplies for the AVR400 except +Vcc and -Vee for the power amplifiers and the non-logic part of the
VFD display requirements of the Front Panel Board. Note that additional local regulation also takes place
on the other PCBs, e.g. for large digital ICs.
Two secondary windings from the toroidal power transformer are fed in via CN63. Pins 1, 2 and 3 con-
nect to a centre-tapped secondary winding used to generate approx +/- 20VDC via the bridge rectifier
diodes D603/3/4/5 and the 2,200F 35V reservoir capacitors C609 and C610. R603 and R604 are 0.47R 1W
fusible resistors for circuit protection if they fail replace only with the same type and value.
The 3 terminal regulators IC63 and IC62 are mounted on two of the larger heatsinks near the back of the
amplifier. These provide +/-15V to the op amps on the amplifiers Input Board via the 11-way connector
BN62. The Input Board also then routes the +/-15V onwards to the Front Panel Board.
Pins 4 and 5 of CN63 receive AC from another transformer secondary to generate approx +15VDC via the
heatsink mounted bridge rectifier D601 and the 18,000F 25V reservoir capacitor C631. F601 and F602
are hard wired 6.3Amp T (time delay) fuses for circuit protection if they fail replace only with the same type
and value.
1) It is regulated down to +12V with the low dropout (LDO) 3 terminal regulator IC64. This is situ-
ated on the heatsink closest to the Main Board, near the back panel. Its output goes to BN62 for
the +12V triggers and also to CN501, to drive the power amplifiers cooling fans.
2) It supplies the HDMI Board via CN61. To minimize ripple currents in the ground return, Q643 is
wired as a low dropout voltage follower with low pass filtering via R650 and C569.
3) It feeds the switched mode buck regulator IC61 via L631 and C615. The tank circuit comprises
L632, C640 and C641, discharged via D631. R636 and C643 make up a snubber to reduce over-
shoot. This provides a high current +5V supply to the Input Board via pins 4 and 5 of BN62. This
5V supply also feeds two 3V3 linear regulators, IC67 and IC68. These in turn supply the audio DSP
ICs on the Input Board via pins 10 and 11 of BN62.
4) It feeds the +5V 3 terminal LDO regulator IC66 via the diode D616, which itself is preceded by the
smoothing network comprising R615 (2W 15R) and C615. Note IC66s output is actually approx
+5.7V because of D644 in its ground line; this is brought back to +5V after D643, to feed the relay
It takes a second input from the +9V standby power supply on the Power Amplifier PCB D616 acts as a
gate to prevent this from feeding back to the +15V supply when the system is in standby. It also allows
the +15V supply to override and remove the load from the +9V supply when the amplifier is fully booted
up.
D606 and D607 form half of a second bridge rectifier (with the other two diodes coming from the full
bridge rectifier D601). These diodes charge up the 1F/50V capacitor C604 to +15V, generating a mains
power present signal. The 10K resistor R614 in parallel with C604 continually discharges it so that this
signal effectively disappears within about 50 milliseconds of the mains being switched off. This +15V
goes to the Main Board via pin 8 of BN62, where it is used as a pull up signal to help control the vari-
ous audio muting circuits.
There are two associated break off boards. One houses the front panel mounted single pole mains
switch plus its suppression capacitor C901 and a connector BN502. The second is mounted on the
power amplifiers heatsink and is used to route power to the cooling fans and also to guide the 31 way
ribbon cable.
The VFD draws AC filament power from a centre tapped winding of the power transformer connected
to pins 1, 2, and 3 of CN94. The centre tap connects to ground via the zener diodes D901/2 and C903
to provide the filament with its required DC offset. Pins 4 and 5 connect to a relatively high voltage
transformer secondary which is half wave rectified by D916 and smoothed by C907 and C960. The zener
diodes D903 and D904 in series with R906 generate +40V which is then coupled to the emitter follower
Q901 to provide a nominal regulated 40V HT power rail for the VFD.
The VFDs internal driver IC and external data bFfer IC901 run from the main +5V supply generated in
the Power Supply board and routed onwards through the Input Board. The drive signals (data, clock,
chip select and reset) come directly from the system microprocessor via CN101.
The 12 front panel switches are arranged in 2 blocks of 6 with resistive divider chains connected to two
ADC inputs on the system micro. These have 10K pull-up resistors at the system P end to complete the
potential divider chains. The pnp switching transistors Q906 and Q907 turn on the 3V3 supply from the
system P via another 10K pull-up resistor at the P end to provide interrupt control.
The power status LED D905 is a tri-colour type. The green side indicates power on and the red side
standby. A high signal on the LED net turns on Q902 and Q903. This turns off the npn Q913 to disable
the red LED and turns on the pnp Q912 to enable power to the green LED. The reverse is true when the
LED line is low. Pulling the STB(LED) line low when the LED line is also low powers both LEDs and gives
a yellow light to show when the unit is booting up. Note that the power supply is STBY+5V to allow the
red LED to operate in standby mode.
RC901 is a Kodenshi KSM603TH5B encapsulated infra red receiver for processing commands from an
external IR remote control. It is designed to work with the 36-38kHz carrier frequencies associated with
the Philips RC5 protocol. Note that it operates from the ST+5V rail to enable the AVR400 to be woken up.
It does not demodulate the IR this is done by the system microprocessor.
The headphones amplifier IC902 drives external headphones directly via the 330F series capacitors
C935 and C936. IC902 has a gain of about 4, meaning that the headphones output will be about 4V rms
when the volume control is set to clip the L and R main power amplifiers (equivalent to about 120WPC
into 8 ohms). IC902 is a JRC NJM5556AL capable of driving 7V rms into150 ohm loads and about +/-
100mA peak current into lower impedances. Mute transistors Q904/905 in series with 100R resistors are
fitted in front of its input to minimize switching transients and it is powered from the +/-15V supplies
generated on the Power Supply Board.
The L and R headphones outputs go via BN93 to the Headphones Board, after passing through relay
RL902 which is normally off. A positive voltage from the P at the emitter of pnp Q911 turns on Q911
and generates the same positive voltage at the base of the npn transistor Q909. Because its emitter is
connected to the -15V rail this pulls the relay on.
The FRONT AUX and MIC inputs come from the Headphones Board and through the microphone relay
RL901. When the relay is off the AUX line level L and R signals are switched through to the unity gain
bFfer IC904 and then on to the Input Board via pins 3 and 1 of CON101. When the relay is closed (in
the same manner as described above for RL902) then the L front input is routed to the low noise micro-
phone amplifier IC903. This operates as two cascaded virtual earth amplifiers, each with a voltage gain
of approximately 21 (R961/960 and then R965/962). Note the MIC line is biased at +6V via resistors R956,
R957 and R958. The amplified signal is output to the Input Board on pin 5 of CON101.
Page 2 covers the analogue inputs, volume control and line level outputs.
Page 3 covers the SPDIF (digital) inputs, clock recovery, audio DSPs and the codec (stereo ADC plus
8-channel DAC).
Page 5 covers interfaces to the DAB/Ethernet module, and the boot loader microprocessor used to
update the system SW via USB.
All stereo external line level inputs using phono sockets are routed to IC101 via 100R/220pF low pass
CR filters. IC101 also handles the AUX-L, AUX-R and the (mono) MIC_SIGNAL setup microphone inputs
coming from the front panel, plus the internal stereo outputs from AM/FM tuners (TUN-L and TUN-R)
and the DAB/ethernet receiver (VENICE_L and VENICE_R). IC101 additionally switches two multichannel
signals - the 8 channel direct input and the outputs from the 8 post-DAC filters. Note that the +/- 7V
power supply limits the input signals to approximately 4V rms before overload occurs.
The post-DAC filters comprise 4 low noise NJM2068 dual op amps, running from the +/- 7V supplies.
One op amp is assigned to each channel and performs the dual functions of converting a differential
input from the DAC to a single ended output, whilst simultaneously functioning as a three pole 50kHz
active filter.
The AM/FM tuner modules outputs pass through the inductors L310 and L302 (providing 19kHz notch
and 38 kHz low pass filtering) and the shunt mute circuits formed by the 330R resistors R354/R369 and
the two halves of Q306 plus Q307.
IC101 has a fixed level stereo output for Zone 2 (SUB_L and SUB_R) and a second one, adjustable from
0dB to -18dB in 6dB steps, for the AVR400s analogue to digital converter (ADC_L and ADC_R).
IC101 has one 8 channel variable level output bus labelled VOL01 through to VOL08. Capacitors C295-8
and C231-4 float the ground ends of the associated internal potentiometers to minimize clicks This bus
goes via specially selected 100F/25V capacitors to the dual op amps IC121-124, wired as voltage follow-
ers and running from the +/- 15V supplies. The C, SL, SR, SBL and SBR outputs are shunt muted when
required via the 560R resistors R383-388 and the dual transistors Q303-305.
The subwoofer output SW has two shunt mute circuits. One using Q311 works in parallel with the rest of
the channels. The other, using Q308 and half of Q303 allows muting of the SW channel alone.
The FL and FR channels take off the stereo headphones amplifier feed from IC121 (it goes via the con-
nector WF101 to the Front Panel Board), then add an extra dual voltage follower IC125 and a double
pole shunt mute switch using 4 x 270R resistors and Q301-302. All the above ICs are JRC NJM2068s or
equivalent.
All 8 of these outputs go to via the connector WF103 to the preamplifier output sockets and (except for
the subwoofer output) to the 7 power amplifier inputs located on the Main Board.
The ADC input amplifiers use a JRC NJM2068 for each channel, operating as a single-ended input to
differential output converter, with HF filtering above about 400kHz. This is sFficient for anti-aliasing
purposes as the analogue modulator of the ADC samples at 6.144 MHz and only needs to keep out
frequencies above 6MHz.
The array of 12 switching transistors in the bottom right hand corner of the schematic is arranged in
4 blocks of 3 devices (two npn and one pnp per block). The array is used to control the muting of 4
specific groups of audio outputs, taking into account the presence of AC mains via P_U (the pull up line
from the Power Supply board) and the MUTE_POWER line derived from the power amplifiers Vcc rail
this is normally high when Vcc is high. The output lines are SB_MUTE2 (for the surround back chan-
nels SBL and SBR), ZONE2_MUTE2, HP_MUTE2 (for the headphones relay on the Front Panel board) and
FUNC_MUTE2 (for the 6 main audio channels excluding SBL and SBR).
Zone 2 volume is independently adjustable in 1dB steps via IC131 (rohm BD3812F). Its outputs are
bFfered and amplified 15dB by the dual op amp IC132 and can be muted when required by Q402. The
output goes directly to two phono sockets forming half of JK11 on the back panel.
Each of the 4 coaxial inputs is bFfered by two NOR gates, contained in IC159 and IC160, before being
switched by one half of the dual 4 input multiplexer IC147. The output on pin 7 is then sent to the 8
input multiplexer IC140. Its other 6 inputs comprise the 3 optical receivers already mentioned, the HDMI
input (multiplexed down from 5:1 on the HDMI board), the HDMI ARC and the output of the Venice 6
DAB/Ethernet module. The 8th input is unused. The output MUX_SPDIF is sent to the SPDIF receiver
IC153.
IC153 is a Wolfson WM8804 run in hardware mode. It uses X707 to generate its own 12MHz internal
clock. IC153 automatically identifies and dejitters incoming SPDIF signals with sample rates of 32kHz,
44.1kHz, 48kHz, 88.2kHz, 96kHz and 192kHz. Its output, still in SPDIF format, WM_SPDIF, is sent to pin 43
of the system codec IC143.
IC143 is the Cirrus Logic CS42548. It includes an SPDIF receiver, 2 channel ADC and 8 channel DAC. Only
one input (pin 43) of the SPDIF receiver is used; the others are grounded.
IC143 has +5V analogue supplies, locally decoupled to analogue ground by C721/722 for VA (pin 24)
and C703/704 for VARX (pin 41). The digital supply is also +5V, decoupled to digital ground by C705/706
(pin 5) and C750/756 (pin 51). The control port power VLC (pin 6) is 3V3, decoupled to digital ground by
C752/773 and the serial port power VLS (pin 53) is also +3V3, decoupled to digital ground by R726 and
C753/754. The 3V3 is generated from the +5V supply by the linear regulator IC148.
The system master audio clock is generated by IC143 on pin 55 whenever an SPDIF signal is present (i.e.
in all cases except when an HDMI multichannel signal in I2S is required to be processed or when using
the ADC). Although IC143 has no jitter rejection below 20kHz its master clock is kept clean from incom-
ing jitter by IC153. The PLL filter is located at pin 39. When SPDIF is not in use IC143 inputs its clock on
pin 59 this can be 24.576 MHz from the crystal oscillator X701 associated with DSP1 when ADC mode is
engaged, or the recovered clock from the HDMI Board. This is switched by the 4 way change over mul-
tiplexer IC145 on pins 9, 10 and 11. IC145 also routes IC143s recovered master clock or the HDMI master
clock to DSP1 on pins 5, 6 and 7.
Pins 1, 62, 63 and 64 receive the 24 bit serial audio data that has been processed by the DSPs.
The DACs 8 analogue outputs are in differential mode, so making 16 output lines in total, from pins
20-23 and 26-37. These feed the post-DAC filters IC111-114, described above.
The main audio DSP is a Cirrus Logic CS 497024, IC141.This is a 300MIPS dual core 32 bit fixed point DSP,
with 72 bit accumulators. The first core is used for decoding standard and high definition audio formats
(Dolby, DTS etc) and the second is reserved for post processing such as bass management, delay and
room correction. The secondary DSP, IC142, is a Cirrus Logic CS49DV8, responsible for the Dolby Volume
processing. IC141 gets the 1.8V for its core from the 3-terminal regulator IC149. IC142 gets its 1.8V from
IC150. The 3V3_1 and 3V3_2 supplies for these regulators are generated on the Power Supply Board.
IC141, 142 and 143 communicate with the system microprocessor via an SPI bus. For IC141 and IC142
the chip select lines are on pin 6, the clock is on pin 126, the MISO line on pin 124 and the MOSI on
pin 123. For IC 143 the corresponding pins are pins 10, 7, 8 and 9. Note that the 3 chips receive data on
a common line but transmit to the P on two separate ones (DSPDATA for both DSPs and D_OUT for
IC143).
IC141 communicates with its external memory via a 36 line data bus running at 150MHz. This is needed
when providing lip sync delay for audio accompanied by video. IC144 is a 200MHz 16Mbit SDRAM, or-
ganized as 512Kbits x 16bits x 2. It is powered from the boards 3V3 line via 6 pins, with local decoupling
provided by C758-763.
The DSPs programs are stored in two external 3V3 SPI flash memory chips IC106 (8Mbit) for IC141 and
IC107 (4Mbit) for IC142.
IC141 has two sets of I2S data inputs. DAI (pins 23, 24, 26, 27 for data, pin 29 for the system clock and pin
30 for the LR clock) is for up to 8 channels from the HDMI Board via connector WF104.
DA2 (pins 32 for the LR clock, 33 for system clock and 34 for data) is for audio from the codec IC143. This
includes bitstream SPDIF such as Dolby Digital, uncompressed two channel I2S audio decoded from
SPDIF and ADC generated I2S two channel audio.
The DSP master clock is input on pin 40 of IC141 from pin 9 of IC145 as noted earlier.
IC141 also has two sets of I2S data outputs. DA1 is an 8 channel I2S signal (pins 47, 48, 49 and 51) shown
as part of the bus DA0(04:07). This feeds the input of the second DSP IC142 (on pins 23, 24, 26 and 27).
The system clock is on pin 52 of IC141 and the LR clock on pin 54. These go to pins 29 and 30 of IC142.
DA2 is a stereo I2S output (pin 43 for data, pin 44 for the system clock and pin 46 for the LR clock). This
feeds the HDMI board via WF104 and the octal bus switch IC146. The DSP master clock output from
pin 9 of IC145 follows the same route. An SPDIF output from pin 35 of IC141 goes directly to pin 12 of
WF104.
There is one set of 8 channel I2S outputs from IC142 DA1 (pins 47, 48, 49 and 51). These form part of
the data bus DA0(00:03) where they are routed back to the DACs in IC143 (pins 62, 64, 63 and1 respec-
tively). The I2S system clock and LR clock (pins 52 and 54) also go directly to IC143 (pins 2 and 3).
The AVR400s main system microprocessor IC151 is a Toshiba T5CN5 microcontroller. This has an ARM
Cortex 3 core with 512KB of ROM and 32KB of flash memory. It is a 3V3 part, with this power supply
being derived from the main 5V supply via the 3-terminal regulator IC156. It has a 40MHz system clock
derived from crystal X702 and a real time clock from the 32.768 kHz crystal X708.
IC155 is a MOSFET switch to enable the HDMI CEC (Consumer Electronic Control) bus when the unit is
powered up, and to isolate the parts of the bus external to the AVR400 when it is powered down.
IC151 has several sets of comms busses - SPI, I2C and UARTs - depending on which system or peripheral
ICs are being addressed. SPI (Serial Peripheral Interface) is a fast 3-wire interface (clock, transmit and
receive) with chip select being addressed by individual I/Os. I2C (Inter Integrated Circuit) is a relatively
slow bidirectional 2-wire interface, with open-collector/source clock and transmit/receive busses, each
with a pull up resistor, and a limited number of embedded chip addresses. UART stands for Universal
Asynchronous Receiver/Transmitter and is a form of bus that takes bytes of information and turns them
into serial data on a bus before reassembling them into bytes at the other end.
SPI is used to talk to the codec IC143 and the two DSPs IC141 and IC142.
I2C is used for both the main and zone 2 volume controls IC101 and IC131. I2C also connects to the sub
micro IC154 and to the NJW1321 video input decoders IC81 and IC81.
IC151s UARTs are used for USB Tx/Rx, the Torino (video processor) Tx/Rx and the external RS232 Tx/Rx.
Further UARTs on the sub micro IC154 communicate with the Venice 6.2 DAB/Ethernet receiver and
the iPod external interface. IC154 is a Toshiba M333FWFG ARM Cortex 3 microcontroller with 128K ROM
and 8K of flash, effectively used as a helper for IC151. Its 3V3 power supply regulator IC158 runs from the
boards main 5V supply.
The USB micro (Bolero) IC162 is a Toshiba TMP92FD28FG, a 32-bit CISC microcontroller with a built-in
USB2 host controller capable of supporting 12Mbps. Its primary function is to provide a bullet-proof
system updating process via an external USB stick. When the AVR400 is powered up IC162 first self
boots, then interrogates the rest of the system if it receives the wrong response (e.g. if a previous
update failed part way through) then the unit will appear dead. However IC162 will be constantly inter-
rogating the USB socket and insertion of a clean USB stick containing only the system firmware will
initiate a complete recovery automatically.
IC164 is a MiniLogic ML61C282PR precision voltage detector, with a threshold of 2.8V, built in hysteresis
and a CMOS output, used to reset IC162 at power on.
IC163 is an Intersil USB switch, type ISL54220, which routes the USB socket on the rear panel either to
the Venice 6.2 module, for normal audio applications, or to IC162 when the system SW is being up-
graded from a USB stick. Note that it is positioned underneath the Venice 6.2 module, close to the USB
socket.
The USB high side power switch IC168 is close to IC163. It is a Richtek RT9702A fed from the main +5V
power supply. It is rated at 1.1 amps output and can flag up a fault condition on the USB bus from pin 3;
this is routed to IC162.
The Frontier Silicon Venice 6.2WB module is plugged into the input board via a 64 way connec-
tor CN62. This WB version of the module supports Band 3 DAB/DAB+ digital radio for use in Europe,
Australia, Canada, Korea and other Digital Radio markets. It also supports USB2, and Ethernet up to 100
Mb/s, enabling the AVR400 to be a network audio client. A spare copy of the AVR400s unique MAC
(Media Access Controller) address can be found on the screening can of the Venice 6.2 module. Its FM
radio function is not used.
The Venice 6.2 is operated in slave mode via the UART pins 9 and 10 on CN62. These connect to the sub
micro IC154. The USB I/O signal pins are 11 and 12, routed to the USB switch IC163. The other USB pins
are not used. Pins 26, 27, 28 and 29 make up an SPI bus to work with the Ethernet PHY IC161 (pin 33
receives interrupts from IC161).
Audio is decoded inside the Venice 6 (i.e. from AAC, FLAC, MP3, WMA or WAV) and sent out by two
routes. Pin 32 carries an SPDIF signal (at 48ks/s) for the main system and pins 64 and 63 carry L/R linear
audio for zone 2 to the volume control IC101.
The Venice 6.2 requires +3V3 at up to 300mA average and +1V2 at 200mA average for the core of its
main processor. 3V3 is provided from the main +5V supply via the three terminal regulator IC165 this
also provides the soft start signal to pin 2 of the 1V2 regulator IC167 (also fed from +5V with some volt-
age drop provided by diodes D803/4). Both regulators are SM types, positioned underneath the Venice
6.2 module.
IC161 is a Micrel KSZ8851 single port Fast Ethernet MAC/PHY controller with an SPI interface. It has a
12KB receive bFfer and a 6KB transmit bFfer. It has its own 25MHz crystal oscillator X777. Its 4 I/Osgo
to the Ethernet socket JK52 on the back panel. Its +3V3 power rail is derived from the boards +5V
supply via the three terminal regulator IC166.
It contains two 9 way D-type board mounted plugs JK71 and JK72. JK71 is for RS232 control of the
AVR400. JK72 is used to control an iPod or iPhone via an Arcam rDock or rLead (the latter also supports
iPads).
The RS232 dual transmitter and receiver IC73 is an ST3232 run from the standby +5V supply via D721/
R727 and a series pnp transistor Q722 in common emitter mode referred to the +12V rail. Q721 provides
the necessary level shifting. IC73 includes internal charge pumps to convert CMOS logic level inputs
to +/-5V RS232 level outputs and +/-25V tolerant RS232 inputs to CMOS logic level outputs. Maximum
rated speed is 300kb/sec.
JK73 is a dual mono 3.5mm jack socket providing two +12V trigger outputs Z_1 and Z_2. The series pass
transistors Q712/715 are pnp T0-92 types with emitters referred to the +12V rail via the paralleled 4.7R
resistors R714/715 and R711/712. In conjunction with the pairs of diodes D711/712 and D714/715 this
provides current limiting at approximately 200mA if the trigger outputs are inadvertently shorted to
ground.
JK72 is a dual 3.5mm mono jack socket providing inputs for two modulated infra-red remote control
signals. These are connected to the opto-isolators IC72 and IC71. Note the use of the standby power
supply ST+5V for the subsequent logic.
The HDMI Board has 5 type A HDMI input sockets and one type A HDMI output socket, which are flush
with the back panel. It gets its power via the hard wired connector and ribbon cable CN61 and com-
municates with the Input Board via two flex foil cables attached to connectors CN104 (17 ways) and
CN105 (19 ways). It is fitted with a 30 way socket BN301 which attaches to a daughter board handling all
analogue video I/O signals (the Analogue Video Board).
The HDMI Board contains 10 separately regulated local power supplies, mostly derived from the
unregulated but hum filtered +15V supply on the Power Supply Board. This is input on pins 3 and 4 of
the hard wired connector CN61 for +15V and pins 5, 6 and 7 for the ground returns. Pins 1 and 2 are not
used. See page 10 of the schematic diagram for all but the last of these supplies, as described below.
IC923, IC927 and IC930 are all Sanken SI-8005Q 3.5 Amps step-down switching regulators operating at
500kHz +/-10% and drawing power from the +15V line. They are used to generate +3.3VDD, +1.8VDD
and +1.8VH1 (video processor supply) respectively. The potential dividers in their outputs (R839+R844/
R847, R838+852/R851 and R841+843/840) are used to set the required voltages.
IC922 and IC929 provide +2.5VH1 and +2.5VH2 for the two DDR memory chips supporting the video
processor. The source supply is +3.3VDD.
IC925 is a KIA7809 generating +8VA from the systems +15VA line (NOT the unregulated +15V used
elsewhere on the board). This is further dropped to +5VA by IC924, a KIA1117S50. Inductor L860 provides
decoupling for the +5VH1 line. The video processor digital power supply lines +3.3VH1, +3.3VH2 and
+1.8VH2 are sourced from the +3.3VDD and +1.8VDD lines via L-C decoupling.
The video ADCs analogue supplies, +3.3VA and +1.8VA, are generated from the +5VA line via IC926
(NJM2845DL133) and IC928 (NJM2845L118) respectively.
The 10th regulator, IC917, an NJU7754 found on sheet 9 of the schematic, is used to provide +5V to the
HDMI output socket. It is enabled via SW_P+5V and derives its input from the +8VA supply described
abov
The HDMI input SOC, IC901, is a 144 pin LQFP Analog Devices ADV3014B. This is a 4 into 1 HDMI 1.4a
multiplexer and is connected to inputs 4 and 5 (VCR and PVR) on the rear panel (JK95 and JK96). The
other two inputs on IC901 are not used. The core power supply is +1.8V and the receiver terminator
supply voltage is +3.3V. Note that most power supply decoupling components are on the underside of
the PCB. +5V detect and hot plug assert control is carried out by the complementary pairs of switching
transistors Q904/907 and Q910/909. The video system clock is provided by a 28.63636MHz crystal X901
connected across pins 101 and 102.
Pin 63 is set low by R602 meaning IC 901 is controlled by I2C at 3.3V via pins 78 (HDMI_SDA) and 79
(HDMI_SCL) from IC902. The HDMI output from IC901 is sent to input A of IC902.
IC902 is an Analog Devices ADV7844, packaged in a 425 pin BGA. It has a 4-input HDMI 1.3 receiver and
one video input supporting standard analogue video formats, from 525/625i up to 1080p, with 12-bit
ADCs. Its primary function is to prepare these signals for the main video processor IC906. Its second
function is to extract digital audio from the HDMI signals, including the reconstruction of a good quality
master clock, and to output all this in I2S or SPDIF format to the DSPs on the Input Board.
JK92 (AV), JK93 (SAT) and JK 94 (BD) connect to 3 of IC902s HDMI input ports. Hot plug detect on
these 3 inputs is carried out by the complementary pairs of switching transistors Q905/906, Q908/901
and Q902/903. The 4th input receives the output of the HDMI switch IC 901. The core power supply is
+1.8VH2 and the receiver terminator supply voltage is +3.3VH2, with heavy local L-C decoupling. Note
that most of these power supply decoupling components are on the underside of the PCB. The video
system clock is provided by a 28.63636MHz crystal X902.
IC902 has a 256Mb SDRAM IC904 connected via 9 x 4-way 33 ohm resistor packs. This is used as a line/
frame store for digitizing the analogue video signals (CVBS, S-Video and Y, Cr, Cb) received from the
external video inputs and also separate i-Pod derived analogue video signals. It runs from the +2.5VH2
supply with further local decoupling components mounted on both sides of the PCB.
The 12-bit RGB video outputs are sent via 10 x 33ohm resistor packs to the tri-state bFfers IC911 and
IC912. A 10-bit subset of these is also sent to the video processor IC906. Note that the critical video clock
is expanded to drive two output lines HD_VCLK1 (for IC906) and HD_VCLK2 (for IC911) via IC905 and 3 x
33ohm resistors.
The extracted digital audio outputs are sent as I2S and SPDIF signals to the audio DSPs on the input
board via 2 x 33 ohm resistor packs and the switch IC903. IC903 is enabled via Q913.
The video processor IC906 is an ST (formerly Genesis) Torino type FLI30336AC in a large 416 pin
BGA package. It is used to de-interlace and scale all the AVR400s video inputs to the required output
resolution(s) up to 1080p and also to generate the system OSD (on screen display). Note that IC906s
analogue video inputs are not used in this application and are either grounded via an array of resistors
and coupling capacitors close to one long edge of the heatsink or left open (R879-882 are no fits).
IC906 dissipates considerable power (about 4 watts) and is thus equipped with a heatsink soldered
to the PCB via two pins. Its core voltage is +1.8VH1, with +2.5V_DDR being used for its RAM bus and
+3.3VH1 for I/O and 19.66MHz crystal clock X903, all followed by copious local L-C decoupling. Note that
the decoupling capacitors and series inductors required are mounted on the underside of the PCB.
IC906 supports two 256Mbit DDR-1 500MHz 2.5V SDRAMs (IC908 and IC909) via a mix of 33R and 0R
series resistors in the data busses. On the other side of IC906 is its 32Mbit 3.3V flash memory IC907 (Ma-
cronix MX29LV320). IC931 is an Atmel AT24C64C 64K EEPROM with +3.3VH1 power.
Q914 and Q915 (on the underside of the PCB) send BYPASS_ON and BYPASS_OFF logic signals from
IC906 to the array of 4 x 20-bit non-inverting line driver/bFfers with tri-statable outputs, IC911/912 and
IC915/916. These are arranged as a 40 way 2-in, 1-out fast switch to bypass IC906 when required (e.g.
if 3D video is present). The video is in 12-bit RGB format and 4 more bFfers are required for the video
clock, H and V syncs and the DE (data enable) line, thus using up all of the available 40 ways. See sheet 9
of the schematic diagram. Power is provided via local L-C decoupling from +3.3VH2.
The HDMI output is handled by IC918, an Analog Devices ADV7511 in a 100 pin LQFP package. It is a
225MHz output part that can handle 12-bit 1080p video (up to 165MHz clock speed) and embedded HD
audio. It is compatible with certain parts of the HDMI 1.4 specification, supporting 3D video and an ARC
(audio return channel).
As with the other Analog Devices parts IC918 uses two power rails, namely +1.8VH2 and +3.3VH2. The
necessary decoupling capacitors are mounted on the underside of the PCB.
In the AVR400s implementation the HDMI audio output is limited to stereo rather then 8 channels via
I2S0 (pin 12), plus MCLK (pin 11), SCLK (pin16) and LRCLK (pin 17). SPDIF from the AVR400 is input to pin
10.
The ARC signal, if received from a downstream sink such as a TV, is output from pin 46 of IC918 and sent
via back to the input board. Note that IC921 is not fitted.
The HDMI output is via JK97, a type A HDMI socket. As the AVR400s output is partly HDMI 1.4 compliant,
pin 14 now becomes the HEAC+ and pin 19 HEAC- as well as HPD (Hot Plug Detect). However, because
the Ethernet part of the HDMI1.4 specification is not supported by the AVR400, the ARC is configured
by the sink to be carried in single (i.e. non-differential) mode using HEAC+ as the signal line. HEAC+ and
HEAC- are then AC coupled to pins 52 and 51 of IC918 via the 1F series capacitors C439 and C428. R771,
R777, R785, R795 and R799 bias the inputs and load the cable correctly.(Note HEAC is short for HDMI
Ethernet and Audio (return) Channel).
Q916 is a twin n-channel MOSFET which only turns on when +5VH1 is present. This isolates the DDC
clock and data lines when the AVR400 is turned off.
IC917 is a low dropout voltage regulator feeding +5V power to pin 18 of JK97 from the +8VA supply,
when enabled by the SW_P+5V line.
Analogue video output of digitized and processed 10-bit video from IC906 is available from the AVR400
via the video encoder IC919 an Analogue Devices ADV7342B. Composite, s-video and component
video are supported, although only component analogue video is output by the AVR400.
IC919 is in a 64 pin LQFP powered from the +18VA and +3.3VA lines. Once again most decoupling com-
ponents are on the underside of the PCB.
The 6 x 11-bit video DACs inside IC919 are each loaded with 300R to ground before being AC coupled to
IC913. This is a JRC NJM2566 6-channel video amplifier for SD and HD signals, powered from the +5VA
line. The FS_SEL signal on pin 17 sets the bandwidth on component video to 13.5MHz or 30MHz, to suit
progressive SD or HD signals respectively. The composite and s-video bandwidths are fixed at 6.75MHz.
The outputs go to the analogue video daughter board via the 30 way socket BN301.
Note that the composite and s-video outputs are not actually used in the AVR400 so are not wired
beyond CN301 on the daughter board. The Y, Cr, Cb component video outputs are terminated with 75
ohm series resistors on the Analogue Video daughter board described next.
AVR400 Analogue Video Board
This is connected into the rest of the system via the HDMI board using CN301.The circuitry is shown on
sheet 13 of the schematic diagram.
(1) to switch between the various analogue video inputs (comprising 4 each composite and s-video
and 3 component video)
(2) to route the chosen video signal to the HDMI board for processing
(4) to provide one zone 2 video output (composite video, with its own OSD) from any of the 4 com-
posite video signal inputs.
The PCBs power supplies are +9VV and +5VV, generated from the three-terminal regulators IC88 and
IC89 from the systems +15VA supply on pin 1 of CN301. Pin 2 carries the systems -15VA supply this is
unused on this PCB.
Note that all video inputs are terminated with 75ohm resistors to ground close to the actual sockets.
IC81 is a JRC NJW1321 a wide bandwidth video switch with 4 inputs, 2 outputs and a 6dB amplifier.
It is used to select between the 4 composite and 4 s-video inputs routed to the HDMI board and also
to output any one of the 4 composite video inputs to the On-Screen Display Controller IC83. IC81 runs
from the +9VV supply, consuming about 85mA so it gets quite hot. It is controlled by i2C commands on
pins 15 and 16.
IC82 is also an NJW1321. It selects between the 3 component video inputs and its fourth input is
unused. Its Y, Cr, Cb outputs and the Y, C and CVBS outputs of IC81 are then AC coupled to IC84 an
NJM2566 6 way video amplifier/filter with 6dB gain, powered from the +5VV rail. Its outputs are also AC
coupled and terminated with 75 ohm series resistors before being routed to CN301.
IC86 is a hex inverter used to bFfer the 3V3 logic level OSD control signals from the HDMI board and
convert them to 5V level for IC83. This is a Sanyo LC74763 in a 30 pin SM package running from the +5VV
rail. It has two crystal oscillators X801 (17.734MHz) and X802 (14.318MHz) to provide composite video
outputs for both PAL and NTSC standards.
IC86s video input signal is AC coupled to and bFfered by the emitter follower Q802 before pin 18.
Similarly its output signal (which now includes an OSD) is bFfered by the pnp transistor Q801 and AC
coupled to the video amplifier/switch IC85 (NJM2244), used here purely as a composite video amplifier/
filter with 6dB gain. Its AC coupled output to the Z 2 OUT single phono socket JK85 is terminated with a
68 ohms series resistor.
6 5 4 3 2 1
1 2 3 4 5
Filament V(AC)
Filament V(AC)
FRONT
GND
GND
V DISP
CUP12326Z-1
D M_GND
D
R902
R903
10
0
FIP91 CFLHCA16S202T
ESD
47/25V
4.3V
D901
C903
0.022u
C902
R901
3.3
RESET
VDISP
DGND
OSCO
LGND
C953 OPEN
TEST
VDD
DO
NC
DA
CS
CP
F2
F2
F1
F1
IC
IC
3.9V
D902
R977 OPEN JW901 62 61 58 57 56 55 54 53 52 51 50 49 48 7 6 5 2 1
M_GND
OPEN
D908 R904 M_GND
OPEN
1N4003
D916
0.022u
0.022u
3.3
C905
C904
CHGND
2010.04.12
D909 OPEN
R911
C903 : 47uF/50V -> 47uF/25V
10
M_GND
M_GND
M_GND R909
10 Q901
8.2K
R910
C1027Y
40V
0.1uF
C913
RC901 2010.04.12
C903 : 100uF/63V -> 47uF/63V 2EA
39P
C912
R906
C915 0.1uF
FROM AMP BD
CUP12326Z-3
1.2K
VOUT GND Vcc
13V
D903
100/16V
0.1uF
C914
C957
1000P
FROM FAN
0.01uF
C916
OPEN
47/63V
47/63V
1 2 3
100K
C907
C960
C906
C908
R905
FAN
0.01uF
47/63
47/63
C910
C909
100K
R908
C911
R907
47K
1
CN96
27V
D904
REMOTE_IN +5VD C917 1000P FAN GND
2
100/16V
C922
CN91
C924
OPEN
R986
2
47 VFD_DATA FAN GND
2
CN95
R913 M_GND
47 VFD_CLK FAN
+5VD_SYS
1
R914
M_GND
47 VFD_CS
R915 47
ST+5V D917 4.7 VFD_RST
R931 R912 R916
10/16V
0.1uF
C926
C925
4.7
0.1uF
C919
M_GND
M_GND
INPUT+
INPUT-
MODE
MENU
INFO
S901
S902
S903
S904
S905
S906
OK
KEY_1 1K 1.5K 1.8K 2.7K 3.3K
M_GND
R921 R922 R923 R924 R925
1000P
C920
C Q906
STBY+5V
C
HVTKRA107MT 14 13 12 11 10 9 8
HVITC74HCT7007F
SWITCH
M_GND
IC901
CUP12326Z-2
R989
10K
1 2 3 4 5 6 7
DISPLAY
Q913
DIRECT
MUTE
VOL+ L.E.D
ZONE
VOL-
TO AMP BD
S907
S908
S909
S910
S911
S912
M_GND
Q912
STBY RED
KEY_2 M_GND HVTKRA107MT
PWR ON GREEN C107M
CWB4F032950UZ
1
1K 1.5K 1.8K 2.7K 3.3K
KSH1A001ZV
C901
470P
Q907 M_GND
BN502
S913
R926 R927 R928 R929 R930
KEY_INPUT_INT
R978
220
2
R979
330
D905
M_GND
C107M C107M
G R
0.01uF
0.01uF
OPEN
OPEN
R980
C927
C928
R981
M_GND M_GND
M_GND
HIGH : PWR_ON(LED)
M_GND
M_GND
LOW : STBY(LED)
31
LED LED
30
STBY(LED)
29
VOL_EN1
28
R932
OPEN
VOL_EN2
27
KEY1 KEY1
26
1.25mm Angle FFC
KEY2 KEY2
25
C938
1K R919 MIC SIGNAL IN
VFD_DATA/Z2 OSD DATA VFD_DATA
22
R920 10/50V
TO INPUT BD
VFD_RST VFD_RST 1K
R961 R960
21
R963
100
R956
R958
IR_IN 1K
2.2K
10K
20
10K 470
R959
100K
MIC_IN MIC_RELAY_ON C939
19
+15V
HP_IN HP_IN
18
47P
A_GND
HP_MUTE2 H/P MUTE
R962
-15V
470
17
ST +5V
47/25V
16
C940
MIC SIGNAL
0.047
+5VD +5VD
R957
C937
1.5K
8 7 6 5
15
B-INPUT
NJM2068M
V+
B+INPUT
B OUTPUT
14
B-
F_OPT F_OPT
CN101
IC903
13
+
A_GND A_GND
A+
47/25V
D_GND D_GND
A OUTPUT
C941
A+INPUT
12
L-CH -15V
-
A-INPUT
D_GND A_GND
HPL_OUT HPL_OUT C944
V-
11
HP_GND HP_GND 1 2 3 4
R964 -15V
470P
10
10/50V
C942
B HPR_OUT HPR_OUT
B
R955
56K
100
9
C943
KEY_INPUT_INT
8
A_GND
L-CH R-CH -15V -15V
2
AUX_R BN93
C933 C935
1
HP_L
A_GND HP_L
1
680P 330uF/10V FRONT AUX_L(MIC)
HP_GND
TO HEADPHONE BD
FRONT AUX_L
2
R941
R984
100
R985
100
3
R937 HP_GND
100
5 6 7 8
HP_R
10/50V
R947
56K
R944
4
Q908
1K
RL901
D906
C107M HP_DETECT
J966
5
R942
56K
R935 +15V 4 3 2 1
C958 C959 R933
FRONT AUX_L(MIC)
47/25V
6
47/25V 47/25V OPEN 4.7K
C931
A_GND
Q904 A_GND
FRONT AUX_R M_GND
HP_GND FRONT AUX_R
7
C2874
HP_L
R987
56K
GND
A_GND A_GND
R945
R948
56K
IC904
1K
8 7 6 5 HP_RELAY_ON
8
47/25V
A_GND
C932
R943
56K
B-INPUT
B+INPUT
B OUTPUT
HP_GND Q909
CWB1B01312047
9
B-
+5VD
A+
A OUTPUT
+5VD
RL902
10
D907
A+INPUT
4.7K 680P
-
A-INPUT
Q905
V-
D_GND
11
1 2 3 4 A_GND C2874 4 3 2 1
HPR_OUT
R938 C930 R946 C936 F_OPT
HP_R
12
R988
56K
13
FRONT AUX_L
M_GND
R934 FRONT AUX_R
HP_R
OPEN
HP_RELAY_ON
Q911
A107M
MIC_RELAY_ON
M_GND
REVISION 2 4 6
Q910
A107M 1 3 5 7
A A
HP_IN
D_GND
F_OPT
M_GND
AVR400
D_GND
1
MODEL 15
DESIGN CHECK APPROVE DRAWING NO
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
10uF/6.3V
10uF/6.3V
10uF/6.3V
25V/0.01UF
25V/0.01UF
25V/0.01UF
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
10uF/6.3V
C120
C107
C108
C110
C134
C133
C135
C139
C112
C137
C118
C138
C104
C105
C111
C119
C113
C116
C115
C122
C117
C131
D D
25V/0.01UF
25V/0.01UF
0.1uF / 16V
0.1uF / 16V
10uF/6.3V
10uF/6.3V
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
10uF/6.3V
10uF/6.3V
C140
C114
C127
C141
C101
C103
C121
C102
C109
C106
C125
C123
C126
C124
C130
C128
C142
C129
C132
C136
ADV3014_RESET
DVDDIO_3V3_3014
ADV3014_INT_TX
ADV3014_INT2
ADV3014_INT
2.2K
R614
DVDDIO_3V3_3014
HDMI_SDA
HDMI_SCL
C144
0.1uF_NC
DVDD_1V8_3014
47P
R620
R606
R619
R605
R611
PVDD_1V8_3014
1K(1%) C145
28.6363MHz
X901
R867
R866
10K
10K
47P
R618
R604
0
0
C143 DVDDIO_3V3_3014
R612
R613
100
100
CJP23GB210ZY NC
Option : Front HDMI Input port
+5VA +3.3VH2
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
#21: HPD Part Q912KRA102S_NC #21: HPD Part
CN63
108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
R603 10K
1K_NC
109
47K_NC
Q903 KRA102S 109 72
PWRDNB
RESETB
INT_TX
PGND
PVDD
PVDD
PGND
DVDD
DGND
DVDD
DGND
XTAL
SCL
XTAL1
TEST16
TEST15
TEST14
TEST13
TEST12
TEST11
TEST10
TEST9
INT2
TEST8
TEST7
DVDDIO
DGNDDIO
INT
HP_CTRLA
SDATA
DVDDIO_3V3_3014 DVDDIO_3V3_3014
9R005Z_NC
9R005Z_NC
72
47K
R660
Q911KRC103S_NC
L866
L865
110
1K
1K
1
1 71
111
HP DET
R640
Q902 KRC103S 111 70
2
2
10K_NC
R643
70
TEST6
TEST5
DVDDIO
R658
R617
R616
10K
R636
112
CE REMOTE CEC 112 RXA_C- TEST2 69
RTERM
DDCA_SDA
5V_DETA
3
1K_NC
3 69
R645
HDMI_HPD2 113
HP DET DDC DATA 113 RXA_C+ DGNDIO TEST1 68
4
4
19
5
5
18
R641 67
R655 R632 100_NC 115
100
+5V DDCA_SCL EP_MOSI
10K_NC
115 RXA_0- 66
GND
6
6
17
66
R602
R601
10K
C149 0.1uF_NC 47K_NC CVDD
R865
10K
C151 0.1uF 47K 10K_NC 116
DDC DATA HDMI2_DDC_SDA +5VA 116 RXA_0+ CGND EP_CS 65
7
7
16
R858 65
117
DDC CLK HDMI2_DDC_SCL +3.3VA 117 CGND EP_SCK 64
8
8
15
64
0_NC 118
+3.3VA
C C
118 RXA_1- CSB 63
NC
9
9
14
63
#7: Added pull-up 119
GND ALSB
10
119 RXA_1+ 62
CE REMOTE FRONT_HDMI 10
13
62
120
CK SHIELD DVDD
11
HDMI2_CK- 120 TVDD 61
CK- 11 DVDD_1V8_3014
12
61
121
CK- DGND
12
121 RXA_2- 60
D1 SHIELD
INPUT-3
12
11
60
122
CK+ CEC
13
HDMI2_CK+ 122 RXA_2+ 59
CK+ 13
10
59
123
D1 SHIELD TXGND
14
HDMI2_D0- 123 HP_CTRLB 58
D0- 14 58
9
124 HDMI1_D2+
D0- TX2+
15
124 5V_DETB 57
D1 SHIELD 15 DVDD_1V8_3014 57
IC901
8
125 HDMI1_D2-
D0+ TX2-
16
126
D1 SHIELD TXAVDD
17
HDMI2_D1- 126 DVDD 55
D1- 17 TXAVDD_1V8_3014
127 HDMI1_D1+
D1- TX1+
18
127 DDCB_SDA 54
D2 SHIELD 18 54
5
128 HDMI1_D1-
D1+ TX1-
19
129
D2 SHIELD TXGND
20
R857
3
10K
130 HDMI1_D0+
D2- TX0+
21
130 CGND 51
D2 SHIELD 21 51
2
131 HDMI1_D0-
D2+ TX0-
22
132 +5VH1
TXGND
23
132 RXB_C+ 49
D2 SHIELD 23 49
133 TXC+ HDMI1_CK+
133 TVDD 48
48
134 TXC- HDMI1_CK-
134 RXB_0- 47
47
135
2.2K
2.2K
2.2K
R878
R623
R609
135 RXB_0+ TXGND 46
46
136 TXAVDD
136 CGND 45
45
137 TXDDC_SCL R622 0 HDMI1_DDC_SCL
137 RXB_1- 44
44
138 HP_CTRLC TXDDC_SDA R608 0 HDMI1_DDC_SDA
138 RXB_1+ 43
5V_DETC 43
139 DDCC_SDA TEST0
139 TVDD 42
42
140 HP_TX R615 0 HDMI_HPD1
140 RXB_2- 41
DDCC_SCL
TXPLGND 41
TXPVDD
141 TXPGND EXT_SWING
CGND
CGND
CVDD
CVDD
141 RXB_2+ 40
40
8.2K(1%)
TXPLVDD
1K(1%)
142
142 39
39
DDCD_SDA
DDCD_SCL
HP_CTRLD
R857 : Front HDMI don`t used 143
5V_DETD
RXD_C+
RXD_2+
RXD_0+
RXD_1+
RXC_C+
143 38
RXC_0+
RXC_1+
RXC_2+
RXD_C-
RXD_2-
RXD_0-
RXD_1-
RXC_C-
RXC_2-
RXC_0-
RXC_1-
38
DGND
CGND
DVDD
CGND
CGND
TVDD
TVDD
CVDD
TVDD
TVDD
144
144 37
R621
R607
37
#21: HPD Part 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Q908 KRA102S
TMDS Signal Amplitude Circuit
1K
1K
Q901 KRC103S
1K
47K
R661
TXPLVDD_1V8_3014
Q910 KRC103S
R635
HDMI_HPD3
22K
R647
R638
HP DET
R650
19
R634
DVDD_1V8_3014
+5V PWR3
18
R631
TXPVDD_1V8_3014
1K
100
HP DET
TVDD_3V3_3014
CVDD_1V8_3014
GND
19
17
HDMI3_DDC_SDA
16
R654 100
DDC CLK GND
17
HDMI3_DDC_SCL
15
CK- NC
14
HDMI3_CK-
12
CE REMOTE
B B
CEC
D1 SHIELD
13
11
INPUT-2
CK+ CK-
12
HDMI3_CK+
10
D0- D1 SHIELD
11
HDMI3_D0-
INPUT-5
9
D1 SHIELD CK+
10
8
D2 SHIELD D0+
7
5
D2 SHIELD D1+
4
2
D2 SHIELD
2
D2+
1
JK96
CEC
R624
47K
1K
1K
47K
Q904 KRC103S
Q906 KRC103S
R653
R627
R626
R662
HDMI_HPD4
R630 22K
HP DET
19
R637
1K
R629
+5V HP DET
19
PWR4
18
HDMI4_DDC_SDA
16
HDMI4_DDC_SCL
15
NC DDC CLK
15
14
HDMI4_CK-
12
D1 SHIELD CK-
12
11
INPUT-1
D1 SHIELD
INPUT-4
CK+
11
REVISION 2 4 6
HDMI4_CK+
10
D0- CK+
10
HDMI4_D0-
9
D1 SHIELD D0-
9
8
D2 SHIELD D1-
SCHEMATIC DIAGRAM
6
5
MP
5
SHEET
4
D2 SHIELD D2-
3
2
D2+
AVR400
1
JK95
MODEL 6 15
CUP12328Z
Worst Measured Currents
250mA(20%:290mA)
+2.5V_DVDDIO_SDRAM
0.1uF / 16V
10/16V
C252
C177
DVDDIO_3.3V +2.5V_DVDDIO_SDRAM IC904
Worst Measured Currents +2.5V_DVDDIO_SDRAM DDR_VREF
AVDD_1.8V Worst Measured Currents CVIA3S56D40FTPG5
Worst Measured Currents 100mA(20%:120mA)
190mA(20%:228mA)
240mA(20%:288mA)
L811 0.1uF / 16V
L814 +3.3VH2 L813 +2.5VH2 R669 33ohm (1005SIZE X 4),1/16W VDD 33ohm (1005SIZE X 4),1/16W
66
VSS
1
+1.8VH2
9R005Z 9R005Z DQ0 C231 DQ15
65
1K(1%) DQ0 DQ15
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
8
10/16V
10/16V
0.1uF / 16V
22/6.3V
0.1uF / 16V
C208
C205
C251
C239
C236
C225
C195
C176
C165
C154
C267
C259
C255
C232
C218
C201
C193
C188
C181
C172
C169
C161
C217
C200
C192
C179
C178
C164
C198
C197
C153
10/16V
1K(1%)
DQ1 DQ14
C207
VDDQ VSSQ
C261
64
R666
7
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
DQ2 C254 DQ13
DQ1 DQ14
63
6
6
DQ3 DQ2 DQ13 DQ12
62
5
5
0.1uF / 16V
RN23 VSSQ VDDQ RN24
61
6
33ohm (1005SIZE X 4),1/16W C238 33ohm (1005SIZE X 4),1/16W
DQ3 DQ12
60
7
D D
TVDD_3.3V
DVDD_1.8V DQ4 DQ11
DQ4 DQ11
59
8
8
Worst Measured Currents 0.1uF / 16V
Worst Measured Currents DQ5 VDDQ VSSQ DQ10
58
590mA(20%:708mA)
7
260mA(20%:312mA)
+3.3VH2 DQ6 C258 DQ9
10
57
+1.8VH2 L815 L816 DQ5 DQ10
6
DQ7 DQ8
11
56
9R005Z 9R005Z DQ6 DQ9
5
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
22/6.3V
22/6.3V
22/6.3V
0.1uF / 16V
10/16V
C245
C152
C159
C185
C256
C249
C248
C243
C233
C227
C219
C214
C202
C194
C189
C174
C173
C162
C220
C204
C203
C196
C183
C171
C163
C158
C264
C257
C250
C244
C237
C234
C223
C222
C266
22/6.3V
RN18 VSSQ VDDQ RN29
12
55
C230
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C224
DQ7 DQ8
13
54
NC
14
53
NC
0.1uF / 16V
33ohm (1005SIZE X 4),1/16W
15
52
VDDQ VSSQ
R703
C260 UDQS
16
51
LDQS LDQS UDQS
4
33
WE
ADV7844 Worst Measured Currents
17
50
NC NC
3
CVDD_1.8V Worst Measured Currents 0.1uF / 16V
CAS VDD VREF DDR_VREF
18
49
420mA(20%:504mA)
2
+1.8VH2 L809
1.8V Total : 1340mA(20%: 1608mA RAS C263
19
48
DNU VSS
1
R675 R710
9R005Z RN19 LDM UDM
20
47
0.1uF / 16V
/ 16V
/ 16V
/ 16V
0.1uF / 16V
/ 16V
/ 16V
/ 16V
/ 16V
/ 16V
22/6.3V
C184
C175
C156
C221
C213
C212
C191
C246
C235
4.7K 4.7K
C160
R674 33
/WE /CK CK
21
46
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R711 33
/CAS CK CK
22
45
3.3V Total : 450mA(20%: 540mA)
R677 270
33ohm (1005SIZE X 4),1/16W CKE
23
44
/RAS
CS /CS NC 33ohm (1005SIZE X 4),1/16W
24
43
8
4
PVDD_1.8V R689
BA0 NC A12 CKE
25
42
7
8
Worst Measured Currents 0
90mA(20%:108mA) BA1 BA0 A11 A11
26
41
+1.8VH2
7
L810
A10 BA1 A9 A9
27
40
5
6
9R005Z
0.1uF / 16V
/ 16V
33ohm (1005SIZERN28
X 4),1/16W A10/AP A8 A8
C229
C216
22/6.3V
28
39
5
C186
A0 A0 A7 33ohm RN10
29
38
8
4
(1005SIZE X 4),1/16W
A1 A1 A6
30
37
A7
8
A2 A2
31
36
A5 A6
7
IC902 A3 A3 A4
32
35
A5
6
CVIADV7844KBCZ DDR_VREF 0.1uF / 16V
AA18
AA20
AA21
RN11
AC12
AC18
AB12
AB18
VDD VSS
33
34
A4
W20
W21
W22
W23
AA6
AC6
AC4
U10
U11
U12
U13
U14
N20
N21
N22
N23
G15
G16
G17
G21
H15
H16
H17
H21
A11
A17
D11
D21
AB6
A16
H22
H23
AB4
G11
G12
C18
C19
C20
C21
C22
C23
C11
Y18
Y21
P20
P21
E21
K20
B11
B17
B16
F21
J20
J21
W3
5
M7
U7
U8
U9
A5
D5
N7
U1
U2
U3
U4
C5
R7
T7
Y6
R3
T3
B5
K7
P7
E1
E2
L7
L1
L2
R687 C166
RN15
TVDD_09
TVDD_10
TVDD_11
TVDD_12
TVDD_13
TVDD_14
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
AVDD_01
AVDD_02
AVDD_03
AVDD_04
AVDD_05
AVDD_06
AVDD_07
AVDD_08
AVDD_09
AVDD_10
CVDD_01
CVDD_02
CVDD_03
CVDD_04
CVDD_05
CVDD_06
CVDD_07
CVDD_08
CVDD_09
CVDD_10
PVDD_01
PVDD_02
TVDD_01
TVDD_02
TVDD_03
TVDD_04
TVDD_05
TVDD_06
TVDD_07
TVDD_08
TVDD_15
TVDD_16
TVDD_17
VDD_01
VDD_02
VDD_08
VDD_09
VDD_03
VDD_04
VDD_05
VDD_06
VDD_07
DVDDIO_01
DVDDIO_02
DVDDIO_03
DVDDIO_04
DVDDIO_05
DVDDIO_06
DVDDIO_07
DVDDIO_08
DVDDIO_09
DVDDIO_10
VDD_SDRAM_01
VDD_SDRAM_02
VDD_SDRAM_03
VDD_SDRAM_04
VDD_SDRAM_05
VDD_SDRAM_06
VDD_SDRAM_07
VDD_SDRAM_08
NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
TEST1
TEST2
TEST3
TEST4
TEST5
from : ADV3014 HDMI Out
1K
R681 AC14
SDRAM_VREF
D18
RTERM
1K F22 Y17
HDMI1_D0+ RXA_0+ SDRAM_CKE
F23 CKE
HDMI1_D0- RXA_0-
HDMI1_D1+ E22 AA17
RXA_1+ SDRAM_CK CK
HDMI1_D1- E23 AB17
RXA_1- SDRAM_CK CK
HDMI1_D2+ D22
RXA_2+
HDMI1_D2- D23 AC17 UDQS
RXA_2- SDRAM_UDQS
HDMI1_CK+ G22 Y11 LDQS
RXA_C+ SDRAM_LDQS
HDMI1_CK- G23 33ohm (1005SIZE X 4),1/16W
RXA_C-
HDMI1_DDC_SCL F20 AC11 WE
DDCA_SCL SDRAM_WE
HDMI1_DDC_SDA E20 BLUE_RX00
DDCA_SDA
8
AB11 CAS HD_DB00
SDRAM_CAS
HDMI2_D0+ B20 AA10 RAS BLUE_RX01
RXB_0+ SDRAM_RAS
7
HDMI2_D0- A20 HD_DB01
RXB_0-
HDMI2_D1+ B19 Y10 CS BLUE_RX02
RXB_1+ SDRAM_CS
6
HDMI2_D1- A19 HD_DB02
RXB_1-
HDMI2_D2+ B18 AB10 BA1 BLUE_RX03
RXB_2+ SDRAM_BA1
5
HDMI2_D2- A18 AC10 BA0 HD_DB03
RXB_2- SDRAM_BA0 33ohm (1005SIZE X 4),1/16W
HDMI2_CK+ B21
RXB_C+ RN25
HDMI2_CK- A21 Y15
RXB_C- SDRAM_DQ15 DQ15 BLUE_RX04
HDMI2_DDC_SCL D20 AC15
8
DDCB_SCL SDRAM_DQ14 DQ14 HD_DB04
HDMI2_DDC_SDA D19 AB15
DDCB_SDA SDRAM_DQ13 DQ13 BLUE_RX05
AA15
C C
7
SDRAM_DQ12 HD_DB05
BLUE:12bit
DQ12
BLUE:10bit
HDMI3_D0+ B14 Y16
RXC_0+ SDRAM_DQ11 DQ11 BLUE_RX06
HDMI3_D0- A14 AC16
6
HD_DB06
BLUE:08bit
RXC_0- SDRAM_DQ10 DQ10
HDMI3_D1+ B13 AB16
RXC_1+ SDRAM_DQ9 DQ9 BLUE_RX07
HDMI3_D1- A13 AA16
5
RXC_1- SDRAM_DQ8 DQ8 HD_DB07
HDMI3_D2+ B12 AA11 33ohm (1005SIZE X 4),1/16W
RXC_2+ SDRAM_DQ7 DQ7
HDMI3_D2- A12 Y13 RN30
RXC_2- SDRAM_DQ6 DQ6
HDMI3_CK+ B15 AA13 BLUE_RX08
RXC_C+ SDRAM_DQ5 DQ5
8
HDMI3_CK- A15 AB13 HD_DB08
RXC_C- SDRAM_DQ4 DQ4
HDMI3_DDC_SCL D17 AC13 BLUE_RX09
DDCC_SCL SDRAM_DQ3 DQ3
7
HDMI3_DDC_SDA D16 Y14 HD_DB09
DDCC_SDA SDRAM_DQ2 DQ2
AA14 BLUE_RX10
SDRAM_DQ1 DQ1
6
HDMI4_D0+ B8 AB14 HD_DB10
RXD_0+ SDRAM_DQ0 DQ0
HDMI4_D0- A8 BLUE_RX11
RXD_0-
5
HDMI4_D1+ B7 Y7 A11 HD_DB11
RXD_1+ SDRAM_A11 33ohm (1005SIZE X 4),1/16W
HDMI4_D1- A7 AC9 A10
RXD_1- SDRAM_A10 RN17
HDMI4_D2+ B6 AA7 A9
RXD_2+ SDRAM_A9 GREEN_RX00
A6 AB7 A8
Option Option HDMI4_D2-
8
RXD_2- SDRAM_A8 HD_DG00
HDMI4_CK+ B9 AC7 A7
RXD_C+ SDRAM_A7 GREEN_RX01
HDMI4_CK- A9 Y8 A6
7
R708 R701 RXD_C- SDRAM_A6 HD_DG01
C242 1000P HDMI4_DDC_SCL D15 AA8 A5
DDCD_SCL SDRAM_A5 GREEN_RX02
HDMI4_DDC_SDA D14 AB8 A4
6
DDCD_SDA SDRAM_A4 HD_DG02
1M_NC 1M_NC AC8 A3
SDRAM_A3 GREEN_RX03
Y9 A2
5
R712 C247 SDRAM_A2 HD_DG03
CEC R676 0_NC D7 AA9 A1 33ohm (1005SIZE X 4),1/16W
COM_Y_THRU CEC SDRAM_A1
AB9 A0 RN21
SDRAM_A0
24 0.1uF / 16V D12 GREEN_RX04
PWR1 RXA_5V
8
D9 HD_DG04
RXB_5V
GREEN:10bit
PWR2
R695
GREEN:12bit
51
7
C9 C2 BLUE_RX01 HD_DG05
GREEN:08bit
PWR4 RXD_5V P1
D1 BLUE_RX02 GREEN_RX06
P2
6
HDMI_HPD1 D13 D2 BLUE_RX03 HD_DG06
ADV7844
HPA_A P3
HDMI_HPD2 D10 F2 BLUE_RX04 GREEN_RX07
V-GND HPA_B P4
5
HDMI_HPD3 D8 F1 BLUE_RX05 HD_DG07
HPA_C P5 33ohm (1005SIZE X 4),1/16W
R686 C226 HDMI_HPD4 C8 G2 BLUE_RX06
HPA_D P6 RN16
8
24 0.1uF / 16V T904 HEAC_1+ P8 HD_DG08
HDMI_RX
A22 H1 BLUE_RX09
T906 HEAC_1- P9 GREEN_RX09
B10 J2 BLUE_RX10
R713
7
HD_DG09
51
6
P12 HD_DG10
HDMI_RX
C4 K1 GREEN_RX01
E1_RX+ P13 GREEN_RX11
SD to I/P Converter
T912 D4 M2 GREEN_RX02
5
T914 E1_RX- P14 HD_DG11
V-GND C3 M1 GREEN_RX03 33ohm (1005SIZE X 4),1/16W
T915 E1_TX+ P15
D3 N2 GREEN_RX04 RN27
R706 C241 T916 E1_TX- P16
N1 GREEN_RX05 RED_RX00
COM_PB_THRU C167 P17
8
A4 P1 GREEN_RX06 HD_DR00
T917 E2_RX+ P18
24 0.1uF / 16V B4 P2 GREEN_RX07 RED_RX01
T918 E2_RX- P19
7
0.1uF / 16V A3 R1 GREEN_RX08 HD_DR01
10uF/6.3V
E2_TX+ P20
R697
T919
51
B3 R2 GREEN_RX09 RED_RX02
C253
6
T1 GREEN_RX10 HD_DR02
P22
C155 T2 GREEN_RX11 RED_RX03
P23
5
W4 V2 RED_RX00 HD_DR03
V-GND T902 SPDIF_IN P24 33ohm (1005SIZE X 4),1/16W
W1 RED_RX01
0.1uF / 16V P25 RN12
W2 RED_RX02
P26 RED_RX04
M23 Y1 RED_RX03
8
REFP P27 HD_DR04
28.63636MHz
7
CVBS_THRU P29 HD_DR05
AA2 RED_RX06
P30 RED_RX06
24 0.1uF / 16V R680 K22 AB1 RED_RX07
6
C199 27P XTALN P31 HD_DR06
RED:12bit
RED:10bit
K23 AB2 RED_RX08
RED:08bit
XTALP P32 RED_RX07
AC2 RED_RX09
R715
5
HD_DR07
51
0 P33
AB3 RED_RX10 33ohm (1005SIZE X 4),1/16W
P34
AC20 AC3 RED_RX11 RN31
AIN1 P35
AC21 RED_RX08
AIN2
8
AC22 HD_DR08
AIN3
AA23 V1 RED_RX09
V-GND AIN4 LLC
7
R699 C182 0.1uF / 16V Y22 HD_DR09
AIN5
Y23 B1 RED_RX10
IPOD_PB/CVBS AIN6 HS/CS
6
V23 HD_DR10
24 AIN7
U23 A2 RED_RX11
AIN8 VS/FIELD
5
U22 HD_DR11
AIN9 CRJ10DJ330T
R704 R23 B2
C265 0.1uF / 16V AIN10 FIELD/DE RN26 R705
P22
IPOD_PR/SY AIN11 1 2
P23 D6
24 AIN12 SYNC_OUT RN22
AB21 J3 MCLK HD_DE
HS_IN1/TRI5 MCLK
5
R684 AB22
C157 0.1uF / 16V VS_IN1/TRI6 R672
IPOD_Y/SC
R20
HS_IN2/TRI7 INT1
R4 0
ADV7844_INT
HD_HSYNC
Sync & Control
6
R21
24 VS_IN2/TRI8 0
T4 R670 HD_VSYNC
C190 1000P INT2 HDMI_MUTE
7
AB20
SYNC1
AA22 K4 SCLK
B B
SYNC2 SCLK
8
V22
SYNC3
Option R671 R700
R22
SYNC4 33ohm (1005SIZE X 4),1/16W
J4 SPDIF
R678
R667
R663
51
51
51
AP0
N4 SDATA0
AP1
1M_NC 1M_NC Y20 N3 SDATA1
AOUT AP2
M4 SDATA2
AP3
M3 SDATA3
AP4
HDMI_I2S
V20 K3 LRCLK
V-GND V-GND V-GND T911 TRI1 AP5
V21
T909 TRI2
U21
T907 TRI3
U20 F3
R679 24 C240 0.1uF / 16V T905 TRI4 EP_MISO +3.3VH2
SV_Y_THRU
F4
EP_MOSI
R698 24 C262 0.1uF / 16V T903 V4
SV_C_THRU AVLINK
G3
9R005Z
1-TO-2 CLOCK DRIVER
R668 10K
L812
H4
TTX_SCL
R714
R690
51
51
H3 AA3
8
TTX_SDA GND_132
AA4
R682 22 P3
GND_133
GND_134
AA5
AA19
I2S1 SUB/CEN
HDMI_SCL SCL GND_135 RN32
HDMI_SDA R688 22 P4 AA12 OUT R685
SDA GND_136
V-GND V-GND AB5 MCLK
I2S2 SL/SR HD_VCLK1
7
ADV7844_RESET GND_137
5
0.1uF / 16V
R693 1K AB19 33
GND_138
DVDDIO_3.3V V3 AB23 SCLK
RESET GND_139
C211
6
AC1
GND_140
I2S3 SBL/SBR
R696
R694
7
C6 AC19 HD_VCLK2
6
HDMI_I2S
R707 PWRDN1 GND_142
25V/0.01UF
C7 AC23
0.1uF / 16V
4.7K PWRDN2 GND_143 SPDIF R691
8
GND_124
GND_125
GND_126
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_127
GND_128
GND_129
GND_130
GND_131
C168
C180
GND_63
GND_64
GND_65
GND_66
GND_67
GND_01
GND_02
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_03
GND_04
GND_05
GND_06
GND_07
GND_08
GND_09
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
RN13
100K
100K
4.7K
R883
R884
33ohm (1005SIZE X 4),1/16W
4.7K
SDATA3
10K
5
1
5
SDATA2
L13
L14
L15
L16
L17
L20
L21
L22
L23
M21
U15
U16
U17
C14
C15
C16
C17
J11
J12
L8
L9
L10
L11
L12
R12
R13
R14
R15
R16
R17
T21
T22
T23
A1
A23
B23
C12
C13
E3
E4
G7
G8
G9
G10
G13
G14
H7
H8
H9
H10
H11
H12
H13
H14
J7
J8
J9
J10
J13
J14
J15
J16
J17
J22
J23
K8
K9
K10
K11
K12
K13
K14
K15
K16
K17
K21
L3
L4
M8
M9
M10
M11
M12
M13
M14
M15
M16
M17
M20
N8
N9
N10
N11
N12
N13
N14
N15
N16
N17
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
R8
R9
R10
R11
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T20
Y3
Y4
Y5
Y12
Y19
6
SDATA1
R709
3
7
SDATA0
8
Q913 KRC103S
33ohm (1005SIZE X 4),1/16W
ON : HIGH
HDMI_AUDIO_ON
10 9 8 7 6 5 4 3 2 1
VCC OE1
Y8 GND
A8
A7
A6
A5
A4
A3
A2
OE2 A1
IC903
Y7
Y6
Y5
Y4
Y3
Y2
Y1
11 12 13 14 15 16 17 18 19 20 +3.3VH2
C206
0.1uF
REVISION 2 4 6
4 3 2 1 4 3 2 1
22X4
22X4
+3.3VH2
1 3 5 7
A A
RN14
RN20
MP SCHEMATIC DIAGRAM
8 7 6 5 8 7 6 5
09.03.18
100K_NC
Added : 100K ohm
100K SHEET
R683 R673
MODEL AVR400 7 15
HDMI_LRCK
HDMI_SCLK
HDMI_MCLK
HDMI_SPDIF
HDMI_SDATA0
HDMI_SDATA1
HDMI_SDATA2
HDMI_SDATA3
DESIGN CHECK APPROVE DRAWING NO
I2S HDMI RX to DSP
FSVREF
FSVREF
Worst Measured Currents 11mA(Max:12mA) 9.8mA(Max:10.5mA)
L822 Worst Measured Currents Worst Measured Currents L827 Worst Measured Currents Worst Measured Currents
+1.8VH1 +3.3V_LBADC +2.5VH1 385mA(Max:412mA) +3.3V_LVDS_PLL +3.3V_LVDS +1.8V_ADC +1.8VH1 +3.3V_PLL
1850mA(Max:1925mA) +1.8V_CORE +3.3VH1 L826 24mA(Max:24mA) +3.3V_IO +3.3VH1 L821 +2.5V_DDR +3.3VH1 L825 +3.3VH1 L820 69mA(Max:83mA) +1.8VH1 L819 43mA(Max:45mA) L817 +1.8V_DLL +1.8VH1 L829 +1.8V_PLL +3.3VH1 L832
0.1uF / 16V
0.1uF / 16V
10/16V
Worst Measured Currents Worst Measured Currents
10/16V
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
25V/0.01UF
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
C334
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
C269
0.1uF / 16V
0.1uF / 16V
C362
C369
15mA(Max:16mA) 25mA(Max:26mA)
22/6.3V
22/6.3V
22/6.3V
10/16V
10/16V
10/16V
10/16V
10/16V
C328
C320
C333
C349
C375
C287
C280
C383
C303
C309
C317
C324
C331
C338
C344
C353
C358
C366
C371
C381
C387
C271
C277
C285
C290
C325
C332
C339
C345
C354
C359
C367
C372
C378
C382
C384
C394
C289
C323
C296
C330
C297
C302
C308
C316
C337
C357
C340
C390
C352
C355
C379
C370
C380
C386
C392
C275
C283
C288
C301
C388
C391
C393
C356
C322
Worst Measured Currents
0.5mA(Max0.6mA)
ADC1 ADC2
+3.3V_LVDS_PLL
+3.3V_ADCSC
+3.3V_ADC +3.3VH1 +3.3V_ADCA +3.3VH1 +3.3V_ADCB +3.3VH1 +3.3V_ADCC +3.3V_ADCSC
+3.3V_ADCC
+3.3V_ADCA
+3.3V_ADCB
+3.3V_LVDS
+3.3VH1 L828 L823 L833 L831 +3.3VH1 L830
+3.3V_ADC
+1.8V_ADC
+1.8V_DLL
+1.8V_PLL
+3.3V_PLL
9R005Z 9R005Z 9R005Z 9R005Z
FSVREF
9R005Z
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
0.1uF / 16V
R750
10/16V
+3.3V_IO FSVREF +2.5V_DDR
C376
C315
C351
C343
C336
C329
+3.3V_LBADC +2.5V_DDR
FLI30336 Worst Measured Currents +1.8V_CORE 10K(1%)
25V/0.01UF
0.1uF / 16V
1.8V Total : 1923mA(Max: 2012mA)
Worst Measured Currents
22/6.3V
10K(1%)
ADC1 ADC2
C348
C346
C385
R754
+2.5V_DDR 250mA(20%:290mA)
Worst Measured Currents Worst Measured Currents
25mA(Max:34mA) 27mA(Max:38mA)
0.1uF / 16V
10/16V
C298
C270
D D
AC14
AC16
AC18
AC22
AB23
AD3
AD4
AD5
AD6
AD7
M23
AC9
M26
AC4
AC5
U11
U16
U10
U17
D10
D11
D12
D13
D14
D15
D17
D18
D20
D22
D23
H24
H26
AB4
A14
D26
T11
T16
T17
Y23
V23
T23
C19
C25
K10
K11
K16
K17
P23
E26
L11
L16
J26
G4
H4
D4
D6
D7
D8
C9
E4
K4
F4
L4
J4
3.3V Total : 166.3mA(2Max: 202.1mA) TORINO<-->DDR
VDDA18_DLL
CORE1.8-0
CORE1.8-1
CORE1.8-2
CORE1.8-3
CORE1.8-4
CORE1.8-5
CORE1.8-6
CORE1.8-7
CORE1.8-8
CORE1.8-9
CORE1.8-10
CORE1.8-11
CORE1.8-12
IO3.3-0
IO3.3-1
IO3.3-2
IO3.3-3
IO3.3-4
IO3.3-5
IO3.3-6
IO3.3-7
IO3.3-8
IO3.3-9
IO3.3-10
IO3.3-11
IO3.3-12
IO3.3-13
IO3.3-14
IO3.3-15
IO3.3-16
LBADC3.3
DDR2.5-0
DDR2.5-1
DDR2.5-2
DDR2.5-3
DDR2.5-4
DDR2.5-5
DDR2.5-6
DDR2.5-7
DDR2.5-8
DDR2.5-9
DDR2.5-10
DDR2.5-11
DDR2.5-12
DDR2.5-13
DDR2.5-14
FSVREF-0
FSVREF-1
LVDS_PLL_3.3
LVDS3.3-0
LVDS3.3-1
LVDS3.3-2
LVDS3.3-3
ADC1.8-0
ADC1.8-1
ADC1.8-2
RPLL_1.8
RPLL_33
ADC_3.3
ADCA_3.3
ADCB_3.3
ADCC_3.3
ADCSC_3.3
IC909
CVIA3S56D40FTPG5
R741 22 C299 0.1uF / 16V AB1 B4 FSDATAU0 C294
22 0.1uF / 16V A1P FSDATA0
R879 R747 C341 AF1 A4 FSDATAU1 33ohm (1005SIZE X 4),1/16W
A2P FSDATA1 VDD VSS RN59
66
22 0.1uF / 16V
1
COM_PB_THRU R764 C278 AF4 B5 FSDATAU2
22 0.1uF / 16V A3P FSDATA2 0.1uF / 16V
R727 C282 AF7 A5 FSDATAU3 FSDATAU31 FSDATAU16
0_NC A4P FSDATA3 DQ0 DQ15
65
56 0.1uF / 16V
1
R725 C281 AD1 B7 FSDATAU4 C295
AN FSDATA4
A7 FSDATAU5 FSDATAU30 FSDATAU17
FSDATA5 VDDQ VSSQ
64
3
2
B8 FSDATAU6
56 0.1uF / 16V FSDATA6 0.1uF / 16V
R721 C293 AC2 A8 FSDATAU7 FSDATAU29 DQ1 FSDATAU18
B1P FSDATA7 DQ14
63
56 0.1uF / 16V
3
R880 R736 C313 AE2 B9 FSDATAU8
22 0.1uF / 16V B2P FSDATA8
COM_Y_THRU R724 C279 AE5 A9 FSDATAU9 FSDATAU28 FSDATAU19
B3P FSDATA9 DQ2 DQ13
62
22 0.1uF / 16V
4
R744 C321 AE8 B10 FSDATAU10 C268
0_NC 56 0.1uF / 16V B4P FSDATA10
R732 C292 AF3 A10 FSDATAU11 VSSQ VDDQ
BN FSDATA11 RN43
61
33ohm (1005SIZE X 4),1/16W
6
B12 FSDATAU12
FSDATA12 0.1uF / 16V
A12 FSDATAU13 33ohm (1005SIZE X 4),1/16W DQ12
FSDATA13 DQ3 RN35
60
56 0.1uF / 16V
7
R753 C377 AC1 B13 FSDATAU14
22 0.1uF / 16V C1P FSDATA14
R881 R735 C319 AF2 A13 FSDATAU15 FSDATAU27 FSDATAU20
C2P FSDATA15 DQ4 DQ11
59
22 0.1uF / 16V
1
COM_PR_THRU R740 C311 AF5 B15 FSDATAU16 C300
22 0.1uF / 16V C3P FSDATA16
R755 C350 AF8 A15 FSDATAU17 FSDATAU26 FSDATAU21
0_NC C4P FSDATA17 VDDQ VSSQ
58
56 0.1uF / 16V
2
R746 C327 AF6 B16 FSDATAU18
CN FSDATA18 0.1uF / 16V
A16 FSDATAU19 FSDATAU25 FSDATAU22
FSDATA19 DQ5 DQ10
10
57
2
3
B18 FSDATAU20
56 0.1uF / 16V FSDATA20
R765 C273 AB2 A18 FSDATAU21 FSDATAU24 FSDATAU23
SV1P FSDATA21 DQ6 DQ9
11
56
22 0.1uF / 16V
4
R738 C368 AE1 B19 FSDATAU22 C274
22 0.1uF / 16V SV2P FSDATA22
R882 R752 C347 AE4 A19 FSDATAU23
SV3P FSDATA23 RN37 VSSQ VDDQ
12
55
22 0.1uF / 16V AE7 B20 FSDATAU24 33ohm (1005SIZE X 4),1/16W
CVBS_THRU R758 C360 SV4P FSDATA24 0.1uF / 16V
R761 56 C374 0.1uF / 16V AF9 A20 FSDATAU25
0_NC SVN FSDATA25 DQ7 DQ8
13
54
B21 FSDATAU26
FSDATA26
A21 FSDATAU27
FSDATA27 NC NC
14
53
AA1 B23 FSDATAU28 C306
ADC_+TEST FSDATA28 RN61 33
AC7 A23 FSDATAU29 RN57 33
VOUT2 FSDATA29 VDDQ VSSQ
15
52
RN44 10K B24 FSDATAU30
FSDATA30 0.1uF / 16V
A24 FSDATAU31 FSDQSU3 FSDQSU2
FSDATA31 LDQS UDQS
16
51
R763 10K AF12
1
AIP_RAW_HS_CS
1
AE12 FSDQMU3 FSDQMU2
AIP_RAW_VS NC NC
17
50
1
2
10K C18 FSADDRU0 C307
R767 FSADDR0
2
C17 FSADDRU1 FSVREF
FSADDR1 VDD VREF
18
49
AD13 C16 FSADDRU2
EXT_OSD_VS FSADDR2 0.1uF / 16V
3
AC13 C15 FSADDRU3
RGB 10BIT INPUT
19
48
AF13 C13 FSADDRU4 DDR
EXT_OSD_CLK FSADDR4
4
C10 FSADDRU5
FSADDR5 LDM UDM
20
47
C8 FSADDRU6 RN52 33
FSADDR6 R743
P3 C7 FSADDRU7 /FSWE /WE FSCLK-
ADATA0 FSADDR7 /CK
21
46
HD_DB02 P2 C6 FSADDRU8 /FSCS0U /FSCS0
HD_DB03 ADATA1 FSADDR8
3
P1 C12 FSADDRU9 /FSCAS FSCLK+
ADATA2 FSADDR9 /CAS CK
22
45
HD_DG02 R4 D16 FSADDRU10
HD_DG03 ADATA3 FSADDR10 280(1%)
4
R3 C14 FSADDRU11 /FSRAS FSCKE
ADATA4 FSADDR11 /RAS CKE
23
44
HD_DR02 R2 C11 FSADDRU12
HD_DR03 ADATA5 FSADDR12
R1 /FSCS0 NC
ADATA6 /CS
24
43
T4
ADATA7 RN45
D5 FSCLK+ FDADDR12
FSCLKP NC A12
25
42
C5 FSCLK- /FSCASU /FSCAS
FSCLKN
5
T3 D21 /FSCS0U FSBKSEL0 FDADDR11
ADATA8 FSCS0 BA0 A11
26
41
T2 C22 /FSRASU /FSRAS
ADATA9 FSCS1
6
T1 B6 FSDQSU0 FSBKSEL1 BA1 FDADDR9
ADATA10 FSDQS0 A9
27
40
U4 B11 FSDQSU1 /FSWEU /FSWE
ADATA11 FSDQS1
7
U3 A17 FSDQSU2 FDADDR10 FDADDR8
ADATA12 FSDQS2 A10/AP A8
28
39
U2 A22 FSDQSU3
ADATA13 FSDQS3
8
U1 A6 FSDQMU0 FDADDR0 FDADDR7
ADATA14 FSDQM0 A0 A7
29
38
V4 A11 FSDQMU1
ADATA15 FSDQM1 0ohm (1005SIZE X 4),1/16W
B17 FSDQMU2 FDADDR1 FDADDR6
FSDQM2 RN41 A1 A6
30
37
B22 FSDQMU3
FSDQM3 FSADDRU4
V3 FDADDR4 FDADDR2 FDADDR5
ADATA16 A2 A5
31
36
1
5
V2
ADATA17 FSADDRU9
V1 C23 /FSWEU FDADDR9 FDADDR3 FDADDR4
ADATA18 FSWE A3 A4
32
35
2
6
W4 D24 /FSCASU C314
ADATA19 FSCAS FSADDRU12
W3 C24 /FSRASU FDADDR12
ADATA20 FSRAS VDD VSS
33
34
3
7
W2 C4 FSCKEU
ADATA21 FSCKE 0.1uF / 16V
W1 C21 FSBKSELU0 FSADDRU5 FDADDR5
ADATA22 FSBKSEL0
8
Y4 C20 FSBKSELU1
ADATA23 FSBKSEL1
33ohm (1005SIZE X 4),1/16W 0ohm (1005SIZE X 4),1/16W
+3.3VH1 +3.3VH1 RN40
R720 10K N3 L24 SC_DB07
DIP_AODD CK3E-/EBLU5 Worst Measured Currents
R749 10K
8
Y1 L23 FSADDRU6 FDADDR6 250mA(20%:290mA)
AVS CK3E+/EBLU4 SC_DB06
C C
R718 10K
5
+3.3VH1 Y2 L26
R762 10K AHS CKE-/EBLU7 +2.5V_DDR
7
Y3 L25 FSADDRU7 FDADDR7
AHRFE_DE CKE+/EBLU6 SC_DB09
0.1uF / 16V
2
10/16V
K24
CH2E-/EGRN1
C312
C318
R737
6
4.7K
4.7K
CH2E+/EGRN0 SC_DB08
7
HD_VCLK1 N1 K26
IPCLK0 CH1E-/EGRN3
5
P4 K25 33ohm (1005SIZE X 4),1/16W FSCKEU FSCKE
IPCLK1 CH1E+/EGRN2
8
M4 J24
R757
4.7K
8
G24
KRC103S KRC103S CH3O-/EGRN7 SC_DG02 CVIA3S56D40FTPG5
R717 G23
CH3O+/EGRN6
7
N2 G26 C326
BYPASS_OFF DIP_RAW_HS_CS CKO-/ERED1 SC_DG05
M2 G25 33ohm (1005SIZE X 4),1/16W
DIP_EXT_CLAMP CKO+/ERED0 VDD VSS RN60
66
10K
100P_NC 75_NC
IC906
1
M3 F24
R766
65
1
1
F26 33ohm (1005SIZE X 4),1/16W C335
CH1O-/ERED5
F25 FSDATAU14 FSDATAU1
CH1O+/ERED4 RN46 VDDQ VSSQ
64
SC_DG07
2
B1 E24
C389
8
HD_DB05 C3 E23 FSDATAU13 DQ1 FSDATAU2
BDATA1 CH0O+/ERED6 DQ14
63
SC_DG06
3
HD_DB06 C2
BDATA2
7
HD_DB07 C1 FSDATAU12 FSDATAU3
BDATA3 DQ2 DQ13
62
SC_DG09
4
HD_DB08 D3 N23 C276
BDATA4 EBLU0
6
+3.3VH1 HD_DB09 D2 N24 VSSQ VDDQ
BDATA5 EBLU1 RN56
61
SC_DG08 33ohm (1005SIZE X 4),1/16W
6
HD_DB10 D1 N25
BDATA6 EBLU2 0.1uF / 16V
5
HD_DB11 E3 N26 33ohm (1005SIZE X 4),1/16W 33ohm (1005SIZE X 4),1/16W DQ12
BDATA7 EBLU3 DQ3 RN38
8BIT RGB INPUT
60
7
HD_DG04 E2
BDATA8 RN39 SC_DR03
HD_DG05 E1 FSDATAU11 FSDATAU4
BDATA9 DQ4 DQ11
59
4
1
HD_DG06 F3 P24 C342
10K_NC
58
3
2
HD_DG08 F1 R26
TTL OUTPUT
BDATA12 DVS SC_DR05 0.1uF / 16V
HD_DG09 G3 P26 FSDATAU9 FSDATAU6
BDATA13 DEN DQ5 DQ10
10
57
2
3
HD_DG10 G2
BDATA14 SC_DR04
HD_DG11 G1 FSDATAU8 FSDATAU7
BDATA15 DQ6 DQ9
11
56
1
4
HD_DR04 H3 33ohm (1005SIZE X 4),1/16W C284
BDATA16
HD_DR05 H2
BDATA17 RN34 RN51 VSSQ VDDQ
12
55
H1 AF15 OCMADDR21 SC_DR07 33ohm (1005SIZE X 4),1/16W
HD_DR06 BDATA18 OCMADDR21 0.1uF / 16V
8
HD_DR07 J3 AE15 OCMADDR20
BDATA19 OCMADDR20 DQ7 DQ8
13
54
J2 AD15 OCMADDR19 SC_DR06
HD_DR08 BDATA20 OCMADDR19 RN33 33
7
HD_DR09 J1 AC15 OCMADDR18
BDATA21 OCMADDR18 NC NC
14
53
K3 AF16 OCMADDR17 SC_DR09 C363 FSDQSU0
HD_DR10 BDATA22 OCMADDR17
1
HD_DR11 K2 AE16 OCMADDR16
BDATA23 OCMADDR16 VDDQ VSSQ
15
52
AD16 OCMADDR15 SC_DR08 FSDQMU0
OCMADDR15 0.1uF / 16V
2
AF17 OCMADDR14 33ohm (1005SIZE X 4),1/16W FSDQSU1
OCMADDR14 LDQS UDQS
16
51
R760 22
4
N4 AE17 OCMADDR13
DIP_BODD OCMADDR13 RN58 SC_DB02
C291 HD_VSYNC L2 AD17 OCMADDR12 FSDQMU1
BVS OCMADDR12 NC NC
17
50
*GPROBE
3
HD_HSYNC L3 AC17 OCMADDR11 C364
+3.3V_PLL BHS OCMADDR11 SC_DB03
HD_DE K1 AF18 OCMADDR10 FSVREF
19.660M
18
49
RN55 33
7
AE18 OCMADDR9
X903
19
48
R768 10K
6
C26 AF19 OCMADDR7
+3.3V_PLL TCLK OCMADDR7 SC_DB05
AE19 OCMADDR6
OCMADDR6 LDM UDM
20
47
47P
5
RN47 V24 AD19 OCMADDR5
ADV7844_RESET PWM0 OCMADDR5 RN54 R748
U23 AC19 OCMADDR4 /FSWE /WE FSCLK-
PWM1 OCMADDR4 RN42 RN36 /CK
21
46
ADV3014_RESET SC_VCLK
8
5
AE20 OCMADDR2 FSBKSELU0 FSBKSEL0 /FSCAS FSCLK+
OCMADDR2 /CAS CK
22
45
SC_HSYNC
5
7
6
AF21 FSBKSELU1 FSBKSEL1 /FSRAS FSCKE
OCMADDR0 /RAS CKE
23
44
SC_VSYNC
6
6
AE11
LBADC_IN6
7
AF11 FSADDRU0 FDADDR0 /FSCS0 NC
LBADC_IN5 /CS
24
43
+3.3VH1+3.3VH1+3.3VH1 SC_DE
7
5
AC10
LBADC_IN4
8
AD10 FSADDRU1 FDADDR1 FDADDR12
LBADC_IN3 NC A12
25
42
4
8
AE10 AE21 OCMDATA15
LBADC_IN2 OCMDATA15 33ohm (1005SIZE X 4),1/16W
AF10 AD21 OCMDATA14 FSBKSEL0 FDADDR11
LBADC_IN1 OCMDATA14 0ohm (1005SIZE X 4),1/16W BA0 A11
26
41
R730 10K AD11 AC21 OCMDATA13
LBADC_RETURN OCMDATA13 RN50
GPROBE_TXD W26 AF22 OCMDATA12 FSBKSEL1 BA1 FDADDR9
OCM_UDO_0 OCMDATA12 A9
27
40
R734
R731
4.7K
4.7K
GPROBE_RXD
4.7K
OCM_UDI_0 OCMDATA11
5
B2 AD22 OCMDATA10 FDADDR10 FDADDR8
OCM_UDO_1 OCMDATA10 A10/AP A8
28
39
UART_TX B3 AF23 OCMDATA9 FSADDRU10 FDADDR10
UART_RX OCM_UDI_1 OCMDATA9
6
R728 AE23 OCMDATA8 FDADDR0 FDADDR7
OCMDATA8 A0 A7
29
38
AD9 AD23 OCMDATA7 FSADDRU3 FDADDR3
/RESET /RESET OCMDATA7
7
AC23 OCMDATA6 FDADDR1 FDADDR6
OCMDATA6 A1 A6
30
37
22 AA24 AF24
MSTR0_SCL OCMDATA5 OCMDATA5 FSADDRU11 FDADDR11
HDMI_SCL
8
AA23 AF25 OCMDATA4 FDADDR2 FDADDR5
MSTR0_SDA OCMDATA4 A2 A5
31
36
HDMI_SDA A3 AF26 OCMDATA3
SW_P+5V MSTR1_SCL OCMDATA3 0ohm (1005SIZE X 4),1/16W
A2 AE24 OCMDATA2 FDADDR3 FDADDR4
MSTR1_SDA OCMDATA2 A3 A4
32
35
HDMI_MUTE AB26 AE25 OCMDATA1 C365
AB25
MSTR2_SCL OCMDATA1
AE26 OCMDATA0 2010.09.27
MSTR2_SDA OCMDATA0 VSS
33
34
WP_2 AA26 VDD
T920 AA25
VGA0_SCL Change Value : 33ohm-->0ohm 0.1uF / 16V
WP_1 VGA0_SDA
Y26
T921 VGA1_SCL
Y25 AC25 OCM_RE
GPROBE_UPGRADE VGA1_SDA /OCM_RE
/OCM_WE
AC26
AD24
OCM_WE
ROM_CS
Added:2009.01.04 /ROM_CS
B B
AF14 AD25
FS_SEL AVS_IN_SCL /OCM_CS0
AD12 AD26
HDMI_AUDIO_ON AVS_IN_WORD_SEL /OCM_CS1 RN48
AC12 AC24
V_CLK_SEL AVS_IN_DATA /OCM_CS2 SC_DB00
+5VA AD14
BUSY_CHECK AVS_OUT_DATA +3.3VH1
5
AE13
T922 AVS_OUT_SCL SC_DB01
AE14
AVS_OUT_WORLD_SEL
6
T923 M24 SC_DG00
VCO_LV
0.1uF / 16V
7
D25 AC20
OBUFC_CLK /JTAG_BS_E
C272
A1 T24 SC_DG01
SCAN_EN JTAG_BS_TMS
8
T25
JTAG_BS_TDO
CN62
T26
GPIO44 33ohm (1005SIZE
RN49 33X 4),1/16W SC_DR00
1
1 W24 R23
OCM_TIMER1 JTAG_BS_TDI
3
ADV7511_INT Y24 R24
/OCM_INT2 JTAG_BS_RST SC_DR01
ADV7844_INT W23 R25
CJP05GA19ZY
/OCM_INT1 JTAG_BS_TCK
2
4
FLASH_MEMORY
V26 U25
/RESET SLAVE_SCL PPWR
3
3
LVDS_PLL_GND
VSSA18_DLL
LBADC_GND
DGND-ADC0
DGND-ADC1
DGND-ADC2
FSVREFVSS1
FSVREFVSS2
RPLL_AGND
RPLL_DGND
DGND-200
DGND-10
DGND-11
DGND-12
DGND-45
DGND-13
DGND-14
DGND-15
DGND-46
DGND-16
DGND-17
DGND-18
DGND-19
DGND-20
DGND-21
DGND-22
DGND-23
DGND-34
DGND-24
DGND-26
DGND-27
DGND-28
DGND-29
DGND-30
DGND-31
DGND-32
DGND-35
DGND-36
DGND-33
DGND-37
DGND-38
DGND-39
DGND-40
DGND-41
DGND-42
DGND-47
DGND-48
DGND-49
DGND-50
DGND-43
DGND-44
DGND-51
DGND-52
DGND-53
0.1uF / 16V
DGND-3
DGND-4
DGND-5
DGND-6
DGND-7
DGND-9
DGND-8
AGND-0
AGND-1
AGND-2
AGND-3
AGND-4
AGND-5
AGND-6
AGND-7
AGND-8
4
4 9R005Z
10/16V
C361
C305
HVIKIC7SZ08FU IC910
#FLASH MEMORY
5
5
L10
M10
N10
P10
R10
T10
M11
N11
P11
R11
K12
L12
M12
N12
P12
R12
T12
U14
N16
P16
R16
L17
M17
E25
H25
J25
M25
H23
AC11
U12
K13
L13
M13
N13
P13
R13
T13
U13
K14
L14
M14
R14
T14
N14
P14
K15
L15
M15
M16
N15
P15
R15
T15
U15
N17
P17
R17
AA2
AA3
AA4
AB3
AC3
AD2
AE3
AC6
AE6
AC8
AD8
AE9
B14
A25
A26
B25
D19
D9
IC907
CVIMX29LV320DTTI-70G
5 4 3 2 1
OCMADDR16 OCMADDR17
48
A15 A16
1
R751 10K_NC
R729
OCMADDR15
47
A14 BYTE#
2
DVDDIO_3V3_3014
10K
MP
OCMADDR14
ADV3014_INT2
46
A13 Vss
3
Option +3.3VH1
R716 10K
Connect pin3 to CHGND
OCMADDR13 OCMDATA15
*EEPROM
ADV3014_INT DQ15
45
A12
4
0.1uF / 16V
OCMADDR12 OCMDATA7
44
A11 DQ7
5
IC931
CVIAT24C64CNSHT
OCMADDR11 OCMDATA14
43
A10 DQ14
6
HEATSINK_HOLE
2007.10.06
A0 VCC
1
OCMADDR10 OCMDATA6
DQ6
42
A9
7
OCMADDR9 OCMDATA13
41
A8 DQ13
8
A1 WP H1 H2
2
7
2.2K
R870
OCMADDR20 OCMDATA5
2.7K
2.7K
R868
R869
DQ5
40
A19
9
OCMADDR21 OCMDATA12
10
39
A2 SCL A20 DQ12
3
OCM_WE OCMDATA4
11
38
WE# DQ4
12
37
/RESET RESET#
0 Vcc C310
R739 10K
0.1uF
OCMDATA11
C550
R831
47K
DQ11
13
36
NC
R726 10K
REVISION 2 4 6
OCMDATA3
14
35
WP#/ACC
DQ3
R722 10K
OCMDATA10
15
34
RY/BY#
1 3 5 7
DQ10
OCMADDR19 OCMDATA2
16
33
A18 DQ2
A OCMADDR18
R742 10K
OCMDATA9
A
17
32
A17 DQ9
SCHEMATIC DIAGRAM
OCMADDR8 OCMDATA1
SHEET
18
31
A7 DQ1
OCMADDR7 OCMDATA8
19
30
A6 DQ8
OCMADDR6 20 OCMDATA0
29
A5 DQ0
AVR400
OCMADDR5 OCM_RE
MODEL
21
28
A4 OE#
OCMADDR4
R745
ROM_CS 8 15
22
27
A3 Vss
0
R733
OCMADDR3
23
26
A2 CE#
10K
25
A1 A0
CUP12328Z
+3.3VH2 3.3V_TTL_MUX1
+3.3VH2 3.3V_TTL_MUX
L835
L844
Option
HDMI_SDA
HDMI_SCL
22/6.3V
22/6.3V
0.1uF
0.1uF
C403
C460
C470
C462
22/6.3V
22/6.3V
0.1uF
0.1uF
1000P_NC
C395
C415
C450
C440
C543
1000P_NC
C544
Option +3.3VH2
INPUT OUTPUT
HDMI By Pass Mode Interface
OE1 OE2 A Y Scaling Mode Interface
27K_NC
R805
L L L L
TX_DG09
TX_DG06
TX_DG07
TX_DG08
TX_DG10
TX_DG11
TX_DR00
TX_DR01
TX_DR02
TX_DR03
TX_DR04
TX_DR05
TX_DR06
TX_DR07
TX_DR08
TX_DR09
TX_DR10
TX_DR11
3.3V_TTL_MUX
L L H H 3.3V_TTL_MUX1
10K_NC
10K_NC
R813
R800
H X X Z
D +1.8VH2
D
2
X H X Z BYPASS_OFF
BAR43C_NC
BYPASS_ON
R826
R834
100
100
D901
IC912 74ALVCH16827DGG IC915 74ALVCH16827DGG
56
1OE2 1OE1
3
33ohm (1005SIZE X 4),1/16W
1
56
1OE2 1OE1
1
TX_DG04
55
SC_DG02 1A1 1Y1
8
2
HD_DG04 55 1A1 1Y1 TX_DG04
4
2
49.9
49.9
R799
R795
TX_DG05
54
SC_DG03 1A2 1Y2
7
3
HD_DG05
54
3
3
53
GND GND
6
4
53
GND GND
2
4
TX_DG06 C439 1uF
52
SC_DG04 1A3 1Y3
5
5
HD_DG06 TX_DG06
52
1A3 1Y3
1
5
TX_DG07 R787
SC_DG05 RN72
51
1A4 1Y4
6
HD_DG07 RN82 TX_DG07
51
50
33ohm (1005SIZE X 4),1/16W Vcc Vcc
7
50
Vcc Vcc
7
49
1A5 1Y5
8
8
HD_DG08 TX_DG08
49
4
8
48
1A6 1Y6
7
9
HD_DG09 TX_DG09
48
1A6 1Y6
3
9
TX_DG10 49.9 0
SC_DG08
47
10
1A7 1Y7
6
HD_DG10 TX_DG10
47
10
1A7 1Y7
2
TX_DG11
46
11
GND GND
5
46
11
GND GND
1
SC_DG09 33ohm RN73
(1005SIZE X 4),1/16W
45
12
HD_DG11 33ohm (1005SIZERN83
X 4),1/16W TX_DG11 1A8 1Y8
45
12
1A8 1Y8
TX_DR00
44
13
1A9 1Y9 L840 L841
8
HD_DR00 TX_DR00
44
13
1A9 1Y9
4
+1.8VH2 +3.3VH2
TX_DR01
43
14
1A10 1Y10 9R005Z 9R005Z
0.1uF / 16V
0.1uF / 16V
HD_DR01 TX_DR01
43
14
1A10 1Y10
7
22/6.3V
10/16V
10/16V
SC_DR00
C475
C408
C426
TX_DR02
DDCSCL
C411
C442
42
15
DDCSDA
2A1 2Y1
6
HD_DR02 TX_DR02
HEAC+
42
15
HEAC-
2A1 2Y1
6
2
SC_DR01 TX_DR03
41
16
2A2 2Y2
5
HD_DR03 TX_DR03
41
16
2A2 2Y2
5
0_NC
0_NC
R819
R803
SC_DR02 33ohm RN74
(1005SIZE X 4),1/16W TX_DR04
40
17
HD_DR04 33ohm (1005SIZERN84
X 4),1/16W 2A3 2Y3 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
40
17
39
18
GND GND
0.1uF / 16V
76 50
39
18
4 C453 C479
GND
SCL
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
SDA
22/6.3V
0.1uF / 16V DVDD R776
TX_DR05
C427
SC_DR03
C454
38
19
2A4 2Y4
7
HD_DR05 TX_DR05 77 49
38
19
37
20
2A5 2Y5
6
HD_DR06 TX_DR06 78 48
37
20
C423
SC_DR05 TX_VCLK
36
21
2A6 2Y6 TX_DR07
5
HD_DR07 TX_DR07 79 47
36
21
35
22
33ohm (1005SIZERN85
X 4),1/16W Vcc Vcc 80 46
35
22
34
23
SC_DR06 2A7 2Y7
8
HD_DR08 TX_DR08 81 45
34
23
33
24
2A8 2Y8
7
HD_DR09 TX_DR09 82 44
33
24
JK97
TX_DG01
32
25
GND GND
6
83 43 D2+
32
25
1
6
31
26
2A9 2Y9
5
HD_DR10 TX_DR10 84 42 D2 SHIELD
31
26
2
5
C438
SC_DR09 RN76 TX_DR11 TX_DB11
30
27
HD_DR11 RN86 TX_DR11 2A10 2Y10 85 41 D2-
30
27
3
TX_DB10 0.1uF / 16V
29
28
2OE2 2OE1 86 40 D1+
29
28
4
TX_DB09 IC918
87 D9 TX1- 39 D1 SHIELD
5
ADV7511
TX_DB08
88 D8 PD/AD 38 D1-
6
TX_DB07
89 D7 GND 37 D0+
7
TX_DB06
90 D6 TX0+ 36 D0 SHIELD
8
TX_DB05
91 D5 TX0- 35 D0-
9
C436
TX_DB04
75_NC 100P_NC
92 34
10
CK+
C556
D4 AVDD
TX_DB03 0.1uF / 16V
93 33 CK SHIELD
11
D3 TXC+
TX_DB02
94 32
12
CK-
R886
D2 TXC-
TX_DB01
95 31
13
D1 GND CE REMOTE
TX_DB00
C 96 30 UTILITY/HEAC+
C
14
3.3V_TTL_MUX D0 HPD C425
3.3V_TTL_MUX1 TX_DE
10K_NC
97 29
15
DE AVDD DDC CLOCK
10K_NC
R806
0.1uF / 16V
R792
R820
10K
TX_HSYNC
98 28
16
HSYNC R_EXT DDC DATA
GND
SPDIF I/O
DSD_CLK
TX_VSYNC
BYPASS_OFF 99 GND
VSYNC
27
17
PLVDD
GND
LRCLK
DVDD
DVDD
BYPASS_ON
DSD0
DSD1
DSD2
DSD3
DSD4
DSD5
MCLK
C468
SCLK
GND
GND
GND
GND
GND
I2S0
I2S1
I2S2
I2S3
BGVDD
IC916 74ALVCH16827DGG 100 26 +5V
18
R796
R779
R797
IC911 74ALVCH16827DGG
8.2K
1K
0
0.1uF / 16V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
19
HPD/HEAC-
33ohm (1005SIZE X 4),1/16W C555 +5VH1
56
1OE2 1OE1
1
TX_VCLK
1A1 1Y1
8
2
HD_VCLK2 C455
55
1A1 1Y1
8
4
2
100P_NC 75_NC
SC_VSYNC TX_VSYNC
54
R827
7
3
HD_VSYNC TX_VSYNC
54
1A2 1Y2
7
3
3
0.1uF / 16V
0.1uF / 16V
53
GND GND
6
4
C467
C409
C413
1.8K 4.7K
53
2
4
TX_HSYNC
TX_HSYNC SC_HSYNC
52
C463
1A3 1Y3
5
5
HD_HSYNC
52
1A3 1Y3
5
1
5
1A4 1Y4
6
1A4 1Y4
6
25V/0.01UF
0.1uF / 16V
UPA672T
33ohm (1005SIZE X 4),1/16W
50
R859
R860
R861
R862
R863
50
Vcc Vcc
Q916
7
33
33
33
33
33
0.1uF / 16V 0.1uF / 16V
C445
C480
C457 C431 TX_DB00 R794
49
1A5 1Y5
8
8
HD_DB00 TX_DB00
49
1A5 1Y5
8
4
8
TX_DB01
48
7
9
HD_DB01 TX_DB01
48
1A6 1Y6 1 2 3
7
3
9
+1.8VH2
SC_DB00 TX_DB02
47
10
6
HD_DB02 TX_DB02
47
10
1A7 1Y7
6
0.1uF / 16V
46
11
GND GND
5
46
11
GND GND
22/6.3V
5
R780 R774
C446
C396
SC_DB01 33ohm RN78
(1005SIZE X 4),1/16W TX_DB03
45
12
12
1A8 1Y8
SC_DB02 TX_DB04 4.7K 1.8K
44
13
1A9 1Y9
4
8
HD_DB04 TX_DB04
44
13
1A9 1Y9
8
SC_DB03 TX_DB05
43
14
1A10 1Y10
3
7
HD_DB05 TX_DB05
43
14
1A10 1Y10
7
TX_DB06
42
15
6
HD_DB06 TX_DB06
42
15
TC7SH125FU_NC
41
16
5
HD_DB07 TX_DB07
41
16
2A2 2Y2
5
17
DSP_LRCK/DR2
2A3 2Y3 TX_DB08
DSP_SCLK/CLK
HD_DB08 33ohm (1005SIZERN89
X 4),1/16W TX_DB08
40
17
2A3 2Y3
+3.3VH2
DSP_S0/DR0
DSP_SPDIF
DSP_MCLK
39
18
GND GND
4
8
39
18
GND GND
8
SC_DB07 1 2 3 4 5
38
19
HD_DB09 TX_DB09
38
19
2A4 2Y4
7
SC_DB08
37
20
HD_DB10 TX_DB10
37
20
2A5 2Y5
6
0.1uF / 16V_NC
SC_DB09
0_NC
0_NC
36
21
R801
R816
2A6 2Y6 TX_DB11
22_NC
1
C433
36
21
R775
2A6 2Y6
5
22
33ohm (1005SIZERN90
X 4),1/16W Vcc Vcc
35
22
23
2A7 2Y7
4
HD_DG00 TX_DG00
34
23
2A7 2Y7
8
+8VA
TX_DG01
33
24
2A8 2Y8 0
3
TX_DG01
33
24
ARC_SPDIF_OUT
32
25
6
32
25
NJU7754
SC_DG00 TX_DG02
31
26
2A9 2Y9
1
HD_DG02 TX_DG02
31
26
2A9 2Y9
5
27
27
2A10 2Y10
29
28
0.1uF
2OE2 2OE1
C424
29
28
2OE2 2OE1
GND
0.1uF
C410
1 Cont NC 3
2
SW_P+5V
SC_HSYNC
SC_VSYNC
HDMI_SDA
SC_DB07
SC_DB06
SC_DB05
SC_DB04
SC_DE
HDMI_SCL
ENC_VCLK1
SC_DB09
SC_DB08
SC_DB03
Analog Video Option
Added_ARC_SPDIF
B B
100P_NC 75_NC
R817
+3.3VA
100
100
C422
R835
10
ARC_SPDIF_OUT
DSP_LRCK/DR2
HDMI_SDATA0
HDMI_SDATA1
HDMI_SDATA2
HDMI_SDATA3
DSP_SCLK/CLK
HDMI_SPDIF
DSP_S0/DR0
HDMI_MCLK
HDMI_LRCK
HDMI_SCLK
DSP_SPDIF
DSP_MCLK
R818
R810
L834
9R005Z SC_VCLK
C449 R823 R829
0.1uF / 16V
10/16V
C461
0_NC
C435
R783
+5VA 20 150
0.15
C484
+3.3VH2
CLOCK DOUBLER
CLKIN_A
EXT_LF2
L836 25V/0.012UF PGND
C417 R789 R781
ALSB
0.1uF / 16V
9R005Z
HD(30MHZ) MODE : HIGH
C2
C1
R790
10/16V
C474
0
C404
(13.5M*2=27M)
0.15 20 150
SD(13.5MHZ) MODE : LOW +1.8VA C421
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 4 3 2 1
R773
IC913 L845
4.7K
10K
R815
SC_DB02
CLK2 FBIN
VDD ICLK
CLK1 GND
33 EXT_LF1 C0 16
S0
NJM2566V
SDA
C7
C6
C5
C4
C3
SCL
0.1uF / 16V
9R005Z +3.3VH2
P_HSYNC
P_VSYNC
25V/0.012UF
P_BLANK
22/6.3V
TEST3 IC920
C416
34 15
33_NC
C432
R871
V-GND V-GND C434 PVDD
0.1uF / 16V
FS_SEL
LPFSW PRIN
MK2302S01T
CLK1
17
16
35 COMP2 TEST2 14
S1
R782 R788
C412 2200P
36 REST2 Y7 13
SC_DG09
S1:HIGH ICLK
4.7K
R821
PROUT PS2 5 6 7 8
18
15
220
COM_PR_CONV 3.9K
37 DAC6 Y6 12
SC_DG08
S1:LOW 2*ICLK
0.1uF / 16V SC_DG07
V-GND
14
38 DAC5 DGND 11
C402
0.01uF
0.1uF
C405 SC_DG06
C397
C554
39 DAC4 IC919 VDD 10
V-GND
N.C GND2
20
13
0.1uF / 16V
9R005Z
L839
40 AGND Y5 9
C400
CVIADV7342BSTZ
PBOUT N.C R828
12
21
V-GND
V+3 V+2
11
22
COM_Y_CONV 44 DAC1 Y1 5
R833 0.1uF / 16V C444
C459 0.1uF / 16V SC_DG02
17
16
15
14
13
12
11
10
45 COMP1 Y0 4
1
V-GND
V-GND
GND4 CBSW
24
6.8K_NC
9
C458 2200P 17 15 13 11 9 7 5 3 1
300
300
300
300
300
300
C487 16 14 12 10 8 6 4 2
DGND
R772
R778
R784
R832
R825
R812
S1
S2
S3
S4
S5
S6
S7
V-GND
V+4 GND1
26
0.1uF / 16V
7
C478 C465 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
10/16V
VOUT VIN
TO DSP PCB
27
CVBS_CONV
6
L846
C447
0.1uF / 16V
+3.3VA V-GND
V-GND
0.1uF / 16V
C414
5
22/6.3V
C476
C472
SCOUT N.C
29
SV_C_CONV
4
0.1uF / 16V
0_NC
3
10/16V
REVISION 2 4 6
C407 0
S1 PS1
32
V-GND
1 3 5 7
A A
MP
L838
SCHEMATIC DIAGRAM
L842
L847
SHEET
SC_VSYNC
SC_HSYNC
AVR400
0.01uF
SC_DR08
SC_DR09
SC_DR02
SC_DR03
SC_DR04
SC_DR05
SC_DR06
SC_DR07
SC_DE
MODEL
C418
0.01uF 9 15
C545
C546
0.01uF
C549 4 5
6 5 4 3 2 1
CUP12328Z
DC/DC REGUALTOR
D D
TO VIDEO
V-GND
+15VA
2
-15VA
4
IC930
OSD_H
8 7 6 5 SV_Y_THRU
CVISI8005QTL
HVDUDZS5.1BSR
6
DDRMEM_REG_ 2.5V
D905
FB
SS
EN
COMP
SV_C_THRU
0.1uF
R846
R845
C498
22K
10K
CVBS_THRU
8
GND
VIN
SW
BS +1.8VH1
PW_GND PW_GND PW_GND COM_Y_THRU
10
1 2 3 4
9
2.5V IC922
COM_PB_THRU
2
COM_PR_THRU
11
12
GND
+15V_DC/DC L858
OUT
IN
BN301
10UH/3A +3.3VDD
+2.5VH1 3 1 COM_Y_CONV
13
14
R841
12K
CVDSS34SR
220/25V
C551
0.1uF
COM_PB_CONV
1000P
C509
C495
C512
220P
C489
D903
L855
COM_PR_CONV
470/16V
0.01uF
15
16
C535
R843
2K
C521
0.1uF
22/6.3V
0.1uF
17
18
1321_SCL
0.1uF
C508
C537
C514
10/16V
C532
R872
62k
1321_SDA
OSD_SDA
19
20
5.1K
R840
OSD_SCL
21
22
OSD_CE
R854
R856
4.7K
4.7K
CVBS_CONV
23
24
2.5V IC929 SV_Y_CONV
2 SV_C_CONV
25
26
PW_GND PW_GND
GND
OUT
IN
R876 F_CVBS
+3.3VDD BUSY
+2.5VH2
27
28
3 1 +3.3VH2 0_NC
IPOD_PR/SY
L863 IPOD_PB/CVBS
29
30
IPOD_Y/SC
C N.D C
22/6.3V
0.1uF
0.1uF
C530
C523
C522
10/16V
IC927
C490
8 7 6 5
CVISI8005QTL
FB
SS
EN
COMP
GND
VIN
SW
BS
+1.8VDD
1 2 3 4
+15V_DC/DC
TO INPUT
L856
10UH/3A
C552
ADC_REG_ 1.8/3.3V
CVDSS34SR
220/25V
R838
12K
1000P
0.1uF
C531
C527
C513
220P
C518
D904
0.01uF FRONT_HDMI_Option
150uF/10V
TXEN
R852
2K
C506
V-GND
C493
0.1uF
R873
62k
3.3V IC926
GND
5.1K
R851
OUT
IN
0_NC
R885
1
CJP17GB210ZY CN105
OSD_SDA
1
3 1
+5VA 2
OSD_SCL
2
+3.3VA
3
OSD_CE
Option
3
R877
BUSY_CHECK 4
4
0 5
5
PW_GND BUSY
PW_GND 6
HDMI_MUTE
6
R875
22/6.3V
0.1uF
10/16V
7
0.1uF
C529
C538
C496
C503
/RESET
7
100_NC 8
8
V-GND V-GND V-GND V-GND 9
UART_RX
9
V-GND
10
10
UART_TX
CEC_MCU 11
11
1.8V IC928 12
12
1321_SCL
2 1321_SDA 13
13
+1.8VA
GND
OSD_H 14
OUT
14
IN
15
15
IC923 3 1
16
16
GPROBE_RXD
8 7 6 5 17
17
GPROBE_TXD
FB
SS
EN
COMP
CVISI8005QTL
22/6.3V
0.1uF
10/16V
0.1uF
C516
GND
C501
C507
C502
VIN
SW
BS
+3.3VDD
1 2 3 4
V-GND V-GND V-GND V-GND
+15V_DC/DC
B B
L862
10UH/3A
C553
CVDSS34SR
220/25V
0.1uF
220P
C534
C520
C539
R839
C511
27K
1000P
D902
0.01uF
470/16V
C505
2.2K
R844
C500
0.1uF
R874
62k
5.1K
R847
7
PW_GND PW_GND CVIKIA7809AF IC925 7
1200/35V
0.1uF
C528
C525
6
6
3 1
0.1uF / 16V
+8VA OUT IN
0.1uF / 16V
220/25V
IC924
10/16V
C510
C491
5
KIA1117S50 5
C519
C536
GND PW_GND PW_GND
4
2 +15VA 4
L859 2 3 V-GND V-GND
+5VA Out In
V-GND V-GND PW_GND
CWB07
3
-15VA L864 3
GND
V-GND CLZ9Z014Z
L861 9R005Z L860
2
+5VH1 1 2
$$$17270
BN61
NC
L857
1
1
V-GND
Option
0.01uF
+3.3VDD
C533 PW_GND
L854
CLZ9Z014Z
+1.8VDD
+3.3VH1
0.1uF / 16V
L849
10/16V
C526
CLZ9Z014Z
C488
L853 L851
CLZ9Z014Z CLZ9Z014Z
+3.3VH2 +1.8VH2
0.1uF / 16V
10/16V
10/16V
0.1uF
C515
C517
C494
C542
REVISION 2 4 6
1 3 5 7
A A
MODEL AVR400 10 15
+12V +12V
GND_DEC SBL_OUT
SUB_POWER
VCC
*CHG1A502 : Rubber Damping Pad 15 X 6 X 3mm
GND_DEC
RY51
*CHG1A503 : Rubber Damping Pad 7.5 X 6 X 3mm
+5V
470/16V
V_DET
POWER-DOWN
POWER_DOWN
C5936
FL
3 2 1
R5128 R5130 D5130 FAN_12V JK51
*CHG1A504: 3M Bumpon SJ-6344
1SS355
D5051
68(F) 0.25W 22 0.5W(Fusible) 1N5819 Q5934 1
22uF/100V
100/100V
GND_DEC KTA1271Y
C5128
C5130
100(F)
100(F)
1K(F)
R5114
SBL
R5103
R5104
R5935 4 5 6
R5113
R5933 SL_OUT
33(F)
Q5112 2
(CHG1A502)
8.2K 0.25W(F)
BC856B C5150 0 1.5 0.2W
GND_SBL
3
10K(F)
R5112
R5136
R5934
Q5103 Q5104 GND_DEC Q5051
SL
BC856B BC856B (N.F) KRC107S
1K(F) FL_OUT
4
D FAN_12V
SPK_REALY D
Q5924 GND_SL
R5932
4.7K
Q5170 5
22uF/100V
Q5115 KTA1271Y
1N4003S
NJL3281DG
FL
R5925 R5923
C5170
D5170
Q5150
BC856B 2SC4883A R5170 RY52 6
R5133
Q5113
8.2K 0.25W(F)
R5181 SOA_PROTECT
1K(F)
10 1W 4.7 1W Q5931 3 2 1
KTA1024Y Q5131
R5137
3.3K(F)
R5135
1SS355
KRC107S
10K(F)
D5052
C5051
0.1uF
Q5101 1.0 0.25W
R5924
R5150
47K
56(F)
BC846B BC856B D5931
100pF 100V
Q5102 (Fusible) FAN1 GND_FL
(PP Film)
Q5181
FL_IN C5102 BC846B MMBT5551 Operating Temp. Operating Voltage GND_DEC
C5115
R5101
65~70'C 8V
Q5130
FAN2
4 5 6
C5116 GND_DEC
D5135
0.1uF
680(F) 100/50V BC846B
C5135
R5931
Q5052 (CHG1A502)
47K
27V
(ELNA RFO) 1
75~80'C 10.5V KRC107S +
680(F)
470pF 100V
CEN
R5107
R5921
4.7K
1000pF 100V
(PP Film)
R5121
1K(F)
SPK_REALY -
R5120
R5138 2
27(F)
(PP Film)
NTC THERMISTOR
R5105
R5106
R5108
68(F)
2.2K 0.25W
22K(F)
68(F)
C5101
R5102
Q5920 CEN_OUT
1K(F)
R5123
R5115
R5116
22K(F)
470/16V
820(F) KRC107S
C5107
R5134 GND_C
3 +
100(F)
GND_DEC
R5182
RY53
FR
OVERLOAD
D5920 FAN2
R5122
100K
Q5120 330(F)
0.22 X2 5W
1K 1W(R)
10/50V
3 2 1
KTC3114A -
150(F)
C5134
R5132
1SS355
R5118
R5131
10(F)
V_DET 4
D5053
R5185 68K(F)
R5175
FL_OUT GND_DEC GND_FR
R5920
L5185 0.5uH
10/50V
5
33K
C5117
+
SR
+12V
10UF/100V
FAN_12V FR_OUT 4 5 6
100 0.5W
GND_SIG VR51 (CHG1A503)
R5155
-
560(F)
(CHG1A502)
10/50V
R5124
Q5911
150(F)
470 6
C5144
R5142
4.7 2W(R)
1K 1W(R)
R5184 Q5053
R5141
R5183
10(F)
KTA1271Y
R5117
R5912 KRC107S GND_SR
R5190
22K(F)
R5144 7
SPK_REALY +
Q5140 GND_DEC 1.5 0.2W
SR_OUT SBR
C5183
BC856B 330(F) Q5188 -
R5148 MMBT5551 8
R5911
R5188
Q5141 820(F) RY54 GND_SBR
BC846B 10K(F) 3 2 1 9
0.1uF 100V