Field Programmable Gate Arrays popularly known as FPGAs is an alternative for implementation of

digital logic in systems. They are prefabricated silicon chips that can be programmed electrically to
implement any digital design. The first static memory-based FPGA (commonly called as SRAM based
FPGA) was proposed by Wahlstrom in 1967. This architecture allowed for both logic and
interconnection configuration using a stream of configuration bits. Later on the first commercial
modern-era FPGA was introduced by Xilinx in 1984. It contained the low classic array of
Configurable Logic Blocks (CLBs) and inputs/outputs. From that of first FPGA which contain 64
CLBs and 58 inputs and outputs , FPGAs have grown enormously in complexity. Todays modern
FPGA now can contain approximately 330,000 logic blocks and around 1100 inputs and outputs. The
basic architecture of FPGA consists of three major components: programmable logic blocks which
implements the logic functions, programmable routing (interconnects) to implement these functions
and I/O blocks to make off-chip connections. An illustration of typical FPGA architecture is shown in
figure
1. Porgrammable Logic-

The purpose of programmable logic block in a FPGA is to provide the basic computation and storage
elements used in digital systems. The basic logic element contains some form of programmable
combinational logic, a flip-flop or latch and some fast carry logic to reduce area and delay cost to it
could be entire processor. In addition to a basic logic block, many modern FPGAs contains a
heterogeneous mixture of different blocks, some of which can only be used for specific functions, such
as dedicated memory blocks, multipliers or multiplexers; of course, configuration memory is used
throughout the logic block to control the specific function of each element within the block
2. Porgrammable Interconnect-

The programmable routing in an FPGA provides connections among logic blocks and I/O blocks to
complete a user defined design. It consists of multiplexers, pass transistors and tri-state buffers, which
forms the desired connection. Generally, pass transistors and multiplexers are used within a logic
cluster to connect the logic elements together while all three are used for more global routing
structures. Several global routing structures have been used in FPGAs as: island-style, cellular, bus-
based and registered (pipelined) architectures.

3. Programmable I/O-

The media or mean required to interface the logic blocks and routing architectures to the wide range of
external components to FPGA called as I/O pads or programmable I/O. The I/O pad and surrounding
supporting logic circuitry forms as an I/O cells. These cells are important components of an FPGA and
consume a significant portion (approximately 40%) of FPGAs area. The design of I/O programmable
blocks is challenging as there is a great diversity in the supply voltage and reference voltage standards.
One of the most important decisions in I/O architecture design is the selection of standards that will be
supported. This involves carefully made trade-offs because, unlike LUTs, which can implement any
digital functions, I/O cells can generally implement the voltage standards selected by designers.
Supporting large number of standards can increase the silicon area required for I/O cells significantly.
Additionally to support more number of standards pin capacitance may increase with more number of
pins, which can limit the performance.
Over the time, the basic FPGA architecture has been further developed through the addition of more
specialised programmable functional blocks. The special function blocks like- embedded memory
(Block RAMs), arithmetic logic (ALUs), multipliers, DSP-48 and even embedded microprocessors
have been added due to a frequent need of such resources for an application. The result is that many
FPGAs have the heterogeneous mixture of resources than early FPGAs.
Hardware Description Language-
Hardware description Languages include VHDL, Verilog, SystemC and Handle-C are frequently used
for FPGA programming. VHDL and Verilog are matured as industry standards. HDLs with many
vendors offering simulation and synthesis tools. Behavioral, RTL and structural levels of description
can be used inter-changeably in these languages. SystemC is a C++ based library used for modeling
system level behavior. As the base language is C++, software processes can be more easily modeled
than in a more traditional HDL. Synthesis tools for SystemC are emerging, but do not approach the
maturity of VHDL or Verilog synthesis products. Handel-C is also a relatively new product in
comparison to VHDL or Verilog. Handel-C follows the Communicating Sequential Process (CSP)
model. Handel-C requires the designer to explicitly delineate parallel processing blocks within a
process. It includes intrinsic for inter-process communication, as does SystemC 2.0.

HOW TO CHOOSE AN FPGA

Perhaps the most critical questions, while developing an FPGA based system,
an embedded system developer may face are: how to choose an appropriate
FPGA chip for his particular embedded application? And how large a device
will he require to fit his design? There are many parameters and specifications
that an embedded system developer should consider while choosing an FPGA
chip, however, some of the most important parameters that an embedded
system developer must consider, while examining the specification of an
FPGA chip to choose and compare FPGAs for a particular application, are:
configurable logic blocks like slices or logic cells, fixed function logic like
multipliers, and memory resources such as embedded block RAM. The Table
1 given below shows resources specifications that may be used to compare
FPGA chips within various families of Xilinx.

The number of logic gates that an FPGA chip is equipped with has traditionally
been the most commonly used metric to compare the size and capacity of
FPGA chip to ASIC technology. However, this parameter does not truly
describe the features and components an FPGA chip is actually equipped
with. This is why the Xilinx did not mention the equivalent number of logic
gates for new Vertex-5 family of FPGAs.

According to Xilinx, there are three metrics that are defined to describe the
FPGA device capacity: Maximum Logic Gates, Maximum Memory Bits and
Typical Gate Range.

APPLICATIONS OF FPGAS
Application areas of FPGAs are quite diverse and wide ranging. Broadly
speaking, major application areas of FPGAs are: Digital Signal Processing
(DSP), video processing, software defined radio, control systems engineering,
bioinformatics, aerospace and defense systems, computer vision, speech
recognition and processing, medical imaging, computer hardware emulation,
ASIC prototyping, reconfigurable computing and radio astronomy etc.

Traditionally, FPGAs are utilized in applications where the volume of

production is small and development resources and expenses required for
creating an ASIC for that low-volume application are prohibitively high.

With advancement in FPGA technology the areas of application of FPGAs are

growing day by day. FPGAs are particularly suitable in applications or
implementation of algorithms where parallel processing offered by the
architecture of FPGA may be utilized to deliver high performance. Due to the
inherent parallelism offered by the internal architecture and logic resources,
FPGAs are capable of delivering high throughput even at low clock rates.

With advancement in FPGA technology and availability of sophisticated

development tools application areas of FPGAs are growing at a very high rate
and it is anticipated that in future this technology may even replace ASIC.

1. PerformanceTaking advantage of hardware parallelism, FPGAs exceed the computing power of digital
signal processors (DSPs) by breaking the paradigm of sequential execution and accomplishing more per
clock cycle. BDTI, a noted analyst and benchmarking firm, released benchmarks showing how FPGAs can
deliver many times the processing power per dollar of a DSP solution in some applications. 2 Controlling
inputs and outputs (I/O) at the hardware level provides faster response times and specialized functionality to
closely match application requirements.
2. Time to marketFPGA technology offers flexibility and rapid prototyping capabilities in the face of increased
time-to-market concerns. You can test an idea or concept and verify it in hardware without going through the
long fabrication process of custom ASIC design.3 You can then implement incremental changes and iterate
on an FPGA design within hours instead of weeks. Commercial off-the-shelf (COTS) hardware is also
available with different types of I/O already connected to a user-programmable FPGA chip. The growing
availability of high-level software tools decreases the learning curve with layers of abstraction and often
offers valuable IP cores (prebuilt functions) for advanced control and signal processing.
3. CostThe nonrecurring engineering (NRE) expense of custom ASIC design far exceeds that of FPGA-
based hardware solutions. The large initial investment in ASICs is easy to justify for OEMs shipping
thousands of chips per year, but many end users need custom hardware functionality for the tens to
hundreds of systems in development. The very nature of programmable silicon means you have no
fabrication costs or long lead times for assembly. Because system requirements often change over time, the
cost of making incremental changes to FPGA designs is negligible when compared to the large expense of
respinning an ASIC.
4. ReliabilityWhile software tools provide the programming environment, FPGA circuitry is truly a hard
implementation of program execution. Processor-based systems often involve several layers of abstraction to
help schedule tasks and share resources among multiple processes. The driver layer controls hardware
resources and the OS manages memory and processor bandwidth. For any given processor core, only one
instruction can execute at a time, and processor-based systems are continually at risk of time-critical tasks
preempting one another. FPGAs, which do not use OSs, minimize reliability concerns with true parallel
execution and deterministic hardware dedicated to every task.
5. Long-term maintenanceAs mentioned earlier, FPGA chips are field-upgradable and do not require the
time and expense involved with ASIC redesign. Digital communication protocols, for example, have
specifications that can change over time, and ASIC-based interfaces may cause maintenance and forward-
compatibility challenges. Being reconfigurable, FPGA chips can keep up with future modifications that might
be necessary. As a product or system matures, you can make functional enhancements without spending
time redesigning hardware or modifying the board layout.