Acer Aspire 4750 - 4750G - Wistron - JE40-HR - Discrete - UMA - Rev-1 PDF

5 4 3 2 1
JE40 HR
DIS/UMA/Muxless Schematics Document
D
Sandy Bridge D
Intel PCH
C C
DY :None Installed ANNIE: ONLY FOR ANNIE solution.

PSL: KBC795 PSL circuit for 10mW solution installed.
DIS:DIS installed 10mW: External circuit for 10mW solution installed.
DIS_Muxless :BOTH DIS or Muxless installed 65W: for 65W adaptor installed.
DIS_PX:BOTH DIS or PX installed 90W: for 90W adaptor installed.
DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
B
PX_Muxless:BOTH PX or Muxless installed. B
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
HR UMA
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
JE40-HR -1
Date: Thursday, December 02, 2010 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1
JE40 HR Block Diagram SYSTEM DC/DC

INPUTS
APL5916KAI
OUTPUTS
48
CPU DC/DC
NCP6131S52MNR
INPUTS OUTPUTS
42~43
##OnMainBoard
(Discrete/UMA/co-lay) 1D05V_PWR 0D85V_S0 DCBATOUT
SYSTEM DC/DC
VCC_CORE
VRAM UP6128PQDD 45
2GB/1GB/512MB
Project code : 91.4IQ01.001 INPUTS OUTPUTS
D D
88,89,90,91
PCB P/N : 48.4IQ01.0SA DCBATOUT 1D05V_VTT
DDR3 Revision : 10267-1 SYSTEM DC/DC

UP6183PQAG 41
800MHz Intel CPU INPUTS OUTPUTS
DDRIII 1066/1333 Channel A DDRIII Slot 0 5V_AUX_S5
3D3V_AUX_S5
14
Sandy Bridge 1066/1333 DCBATOUT 5V_S5
Nvidia N12P PCIe x 16 FSB: 1066 MHz
3D3V_S5
DDRIII 1066/1333 Channel B DDRIII Slot 1 SYSTEM DC/DC

(Discrete only)
15
1066/1333 UP6165BQKF 46
INPUTS OUTPUTS
PCIE x 1 USB3.0 1D5V_S3
4,5,6,7,8,9,10,11,12,13 uPD720200 DCBATOUT 0D75V_S0
83.84,85,86,87 USB x 2 DDR_VREF_S3
75
Discreet/UMA/PX Co-lay SYSTEM DC/DC
FDIx4x2 NCP5911MNTBG 44
PCIE x 1 Mini-Card
C
(UMA only) DMIx4 USB x 1 INPUTS OUTPUTS C
802.11a/b/g 65
DCBATOUT VCC_GFXCORE_PWR
HDMI Level 57 VGA

HDMI shifter PCIE x 1 RJ45 92
51 Intel RT8208BGQW
CONN 59
1000 NIC INPUTS OUTPUTS
LVDS(Dual Channel)
LCD PCH BCM57780A1 DCBATOUT VGA_CORE
49 RGB CRT 31
SD/MMC+/MS/ TI CHARGER
Cougar Point MS Pro/xD BQ24745RHDR 40
14 USB 2.0/1.1 ports INPUTS OUTPUTS
CRT ETHERNET (10/100/1000Mb)
50 DCBATOUT BT+
High Definition Audio 26
SATA ports (6) SYSTEM DC/DC
RT9025 47
PCIE ports (8)
Left Side: Mini-Card INPUTS OUTPUTS
USB x 1 LPC I/F PCIE x 1,USB x 1
66
SIM 66
B ACPI 1.1 WWAN 3D3V_S0 1D8V_S0 B
Bluetooth USB2.0 x 4 SYSTEM DC/DC

63 RT9025-25PSP 93
USB 2.0 x 1 Right Side:
17,18,19,20,21,22,23,24,25,26 USB x 1 INPUTS
26 OUTPUTS
CAMERA 1D5V_S3 1V_VGA_S0
49
3D3V_S5 1D8V_VGA_S0
AZALIA
Switches
SPI
64 SATA x 2 HDD INPUTS OUTPUTS

LPC Bus
56 1D5V_S3 1D5V_VGA_S0
3D3V_S0 3D3V_VGA_S0
Internal Analog MIC Azalia Flash ROM LPC debug port ODD
CODEC 4MB 60 71 56
PCB LAYER
HP1
ALC271X L1:Top L4:Signal
KBC
SMBus L2:VCC L5:GND
MIC IN 29 L3:Signal L6:Bottom
A
NUVOTON HR UMA A
NPCE795P 27
Wistron Corporation
2CH SPEAKER Title
Thermal
Touch Int. ENE P2800 Block Diagram
Fan Size Document Number Rev
PAD KB ENE P2793 28 A3
69 69 2528 JE40-HR -1
5 4 3 2 1
A B C D E
PCH Strapping Huron River Schematic Checklist Rev.0_7 Processor Strapping Huron River Schematic Checklist Rev.0_7
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k CFG[2] PCI-Express Static 1: Normal Operation.
- 10-k weak pull-up resistor. Lane Reversal Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1
0:
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
Disabled - No Physical Display Port attached to
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
4 GNT2#/GPIO53 Mobile: Used as GPIO only
Enabled - An external Display Port device is
0 4
GNT1#/GPIO51 Pull-up resistors are not required on these signals. 0: connectd to the EMBEDDED display Port
If pull-ups are used, they should be tied to the Vcc3_3power rail.
CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
SPI_MOSI function 2 disabled
Straps 11
Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
weak pull-up resistor [CRB has it pulled up
NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion1
0: PEG Wait for BIOS for training
Disable Danbury:Leave floating (internal pull-down)
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features. Voltage Rails
HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
Platform design should provide appropriate pull-up or pull-down depending on ACTIVE IN
/GPIO[33]
3 the desired settings. If a jumper option is used to tie this signal to GND as
5V_S0
3D3V_S0
5V
3.3V 3
required by the functional strap, the signal should be pulled low through a weak 1D8V_S0 1.8V
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D5V_S0 1.5V
1D05V_VTT 1.05V
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
strapping functions. VCC_CORE 0.35V to 1.5V S0
VCC_GFXCORE 0.4 to 1.25V
1D8V_VGA_S0 1.8V CPU Core Rail
3D3V_VGA_S0 3.3V Graphics Core Rail
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 1V_VGA_S0 1V
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
GPIO15 1D5V_S3 1.5V S3
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
suite with confidentiality
Note : This is an un-muxed signal.
BT+ 6V-14.1V AC Brick Mode only
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
3D3V_S5 3.3V
3D3V_AUX_S5 3.3V
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
2 Default = Do not connect (floating) 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
High(1) = Enables the internal VccVRM to have a clean supply for
GPIO27 analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
circuits for analog rails. 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
USB Table
Pair Device
SMBus ADDRESSES
PCIE Routing 0 Touch Panel / 3G SIM
1 USB Ext. port 1 (HS) I 2 C / SMBus Addresses
HURON RIVER ORB
2 Fingerprint Device Ref Des Address Hex Bus
LANE1 Mini Card2(WWAN)
3 BLUETOOTH EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 Mini Card1(WLAN)SATA Table 4 Mini Card2 (WWAN) Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA
LANE3 Card Reader 5 CARD READER

SATA EC SMBus 2 SML1_CLK/SML1_DATA
6 X PCH SML1_CLK/SML1_DATA
LANE4 Onboard LAN Pair Device eDP SML1_CLK/SML1_DATA
7 X
1 HR UMA
1
0 HDD1 8 USB Ext. port 4 / E-SATA /USB CHARGER
LANE5 USB3.0
1 HDD2 9 USB Ext. port 2 PCH SMBus Wistron Corporation
PCH_SMBDATA/PCH_SMBCLK 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LANE6 Intel GBE LAN 2 N/A 10 EDP CAMERA
SO-DIMMA (SPD)
SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
Digital Pot PCH_SMBDATA/PCH_SMBCLK
3 N/A 11 Mini Card1 (WLAN) G-Sensor PCH_SMBDATA/PCH_SMBCLK Title
LANE7 Dock MINI PCH_SMBDATA/PCH_SMBCLK
4 ODD 12 CAMERA PCH_SMBDATA/PCH_SMBCLK Table of Content
LANE8 New Card 5 ESATA 13 New Card A3
-1
JE40-HR
5 4 3 2 1
SSID = CPU
CPU1A Signal Routing Guideline:
SANDY PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
62.10055.421 PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
Change:62.10053.611
2nd = 62.10055.321
3rd = 62.10040.821
1D05V_VTT
1 OF 9
J22 PEG_IRCOMP_R R401 1 2
PEG_ICOMPI 24D9R2F-L-GP
Note:
19 DMI_TXN[3:0]
DMI_TXN0 B27
SANDY PEG_ICOMPO J21
H22
DMI_RX#0 PEG_RCOMPO
D Intel DMI supports both Lane DMI_TXN1
DMI_TXN2
B25
A25
DMI_RX#1 D
Reversal and polarity inversion DMI_RX#2 PEG_RXN[0..15] 83
DMI_TXN3 B24 K33 PEG_RXN15
but only at PCH side. This is DMI_RX#3 PEG_RX#0 PEG_RXN14
19 DMI_TXP[3:0] PEG_RX#1 M35
enabled via a soft strap. DMI_TXP0 B28 L34 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
B26 DMI_RX1 PEG_RX#3 J35
DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 DMI_RX3 PEG_RX#5 H34
H31 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 DMI_TX#0 PEG_RX#7 G33
DMI_RXN1 E22 G30 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 DMI_TX#2 PEG_RX#9 F35
DMI_RXN3 D21 E34 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 E32
DMI_RXP0 G22 D33 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 DMI_TX1 PEG_RX#13 D31
DMI_RXP2 PEG_RXN1
PCI EXPRESS* - GRAPHICS

F20 DMI_TX2 PEG_RX#14 B33
DMI_RXP3 C21 C32 PEG_RXN0
DMI_TX3 PEG_RX#15
PEG_RXP[0..15] 83
J33 PEG_RXP15
PEG_RX0 PEG_RXP14
PEG_RX1 L35
K34 PEG_RXP13
19 FDI_TXN[7:0] FDI_TXN0 PEG_RX2 PEG_RXP12
A21 FDI0_TX#0 PEG_RX3 H35
FDI_TXN1 H19 H32 PEG_RXP11
FDI_TXN2 FDI0_TX#1 PEG_RX4 PEG_RXP10
Note: E19 FDI0_TX#2 PEG_RX5 G34
FDI_TXN3 PEG_RXP9
Intel(R) FDI
Intel FDI supports both Lane F18 FDI0_TX#3 PEG_RX6 G31
FDI_TXN4 B21 F33 PEG_RXP8
Reversal and polarity inversion FDI_TXN5 C20
FDI1_TX#0 PEG_RX7
F30 PEG_RXP7
but only at PCH side. This is FDI_TXN6 FDI1_TX#1 PEG_RX8 PEG_RXP6
D18 FDI1_TX#2 PEG_RX9 E35
C enabled via a soft strap. FDI_TXN7 E17 FDI1_TX#3 PEG_RX10 E33
F32
PEG_RXP5
PEG_RXP4 NOTE.
C
PEG_RX11 PEG_RXP3
19 FDI_TXP[7:0] PEG_RX12 D34 If PEG is not implemented, the RX&TX pairs can be left as No Connect
FDI_TXP0 A22 E31 PEG_RXP2
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 FDI0_TX1 PEG_RX14 C33
FDI_TXP2 E20 B32 PEG_RXP0 PEG Static Lane Reversal
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
G18 FDI0_TX3
FDI_TXP4 B20 M29 PEG_C_TXN15 C401 1DIS_PX_Muxless
2 Do Not Stuff PEG_TXN15
FDI_TXP5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14 C402 Do Not Stuff PEG_TXN14
C19 FDI1_TX1 PEG_TX#1 M32 1DIS_PX_Muxless
2
FDI_TXP6 D19 M31 PEG_C_TXN13 C403 1DIS_PX_Muxless
FDI_TXP7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12 C404 Do Not Stuff PEG_TXN12
F17 FDI1_TX3 PEG_TX#3 L32 1DIS_PX_Muxless
2
L29 PEG_C_TXN11 C405 1DIS_PX_Muxless
PEG_TX#4 PEG_C_TXN10 C406 Do Not Stuff PEG_TXN10
19 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#5 K31 1DIS_PX_Muxless
2
Note: J17 K28 PEG_C_TXN9 C407 1DIS_PX_Muxless
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
Lane reversal does not apply to J30 PEG_C_TXN8 C408 1DIS_PX_Muxless
19 FDI_INT H20 J28 1DIS_PX_Muxless
2
FDI sideband signals. FDI_INT PEG_TX#8
H29 PEG_C_TXN6 C410 1DIS_PX_Muxless
19 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#10 G27 1DIS_PX_Muxless
2
H17 E29 PEG_C_TXN4 C412 1DIS_PX_Muxless
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
F27 PEG_C_TXN3 C413 1DIS_PX_Muxless
PEG_TX#13 D28 1DIS_PX_Muxless
2
F26 PEG_C_TXN1 C415 1DIS_PX_Muxless
PEG_TX#15 E25 1DIS_PX_Muxless
2
1D05V_VTT 1 R402 2 24D9R2F-L-GP DP_COMP A18 EDP_COMPIO PEG_TXP[0..15] 83
A17 M28 PEG_C_TXP15 C417 1DIS_PX_Muxless
2 Do Not Stuff PEG_TXP15
EDP_ICOMPO PEG_TX0
1 R403 2 10KR2J-3-GP eDP_HPD B16 EDP_HPD PEG_TX1 M33 PEG_C_TXP14 C418 1DIS_PX_Muxless
M30 PEG_C_TXP13 C419 1DIS_PX_Muxless
PEG_TX2 PEG_C_TXP12 C420 Do Not Stuff PEG_TXP12
PEG_TX3 L31 1DIS_PX_Muxless
2
C15 L28 PEG_C_TXP11 C421 1DIS_PX_Muxless
EDP_AUX PEG_TX4 PEG_C_TXP10 C422 Do Not Stuff PEG_TXP10
D15 K30 1DIS_PX_Muxless
2
B Signal Routing Guideline: EDP_AUX#
eDP PEG_TX5
PEG_TX6 K27 PEG_C_TXP9 C423 1DIS_PX_Muxless
2 Do Not Stuff PEG_TXP9 B
EDP_ICOMPO keep W/S=12/15 mils and routing J29 PEG_C_TXP8 C424 1DIS_PX_Muxless
PEG_TX7 PEG_C_TXP7 C425 Do Not Stuff PEG_TXP7
C17 J27 1DIS_PX_Muxless
2
length less than 500 mils. F16
EDP_TX0 PEG_TX8
H28 PEG_C_TXP6 C426 1DIS_PX_Muxless
EDP_COMPIO keep W/S=4/15 mils and routing EDP_TX1 PEG_TX9 PEG_C_TXP5 C427 Do Not Stuff PEG_TXP5
C16 EDP_TX2 PEG_TX10 G28 1DIS_PX_Muxless
2
length less than 500 mils. G15 E28 PEG_C_TXP4 C428 1DIS_PX_Muxless
EDP_TX3 PEG_TX11 PEG_C_TXP3 C429 Do Not Stuff PEG_TXP3
JE40 delete eDP function PEG_TX12 F28
PEG_C_TXP2 C430
1DIS_PX_Muxless
2
Do Not Stuff PEG_TXP2
C18 EDP_TX#0 PEG_TX13 D27 1DIS_PX_Muxless
2
E16 E26 PEG_C_TXP1 C431 1DIS_PX_Muxless
EDP_TX#1 PEG_TX14 PEG_C_TXP0 C432 Do Not Stuff PEG_TXP0
D16 EDP_TX#2 PEG_TX15 D25 1DIS_PX_Muxless
2
NOTE. F15 EDP_TX#3
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
Stuff to disable internal graphics 20100614 V1.1

function for power saving. NOTE:
Select a Fast FET similar to 2N7002E whose rise/
FDI_LSYNC0 fall time is less than 6 ns. If HPD on eDP interface is
FDI_FSYNC0
FDI_FSYNC1
disabled, connect it to CPU VCCIO via a 10-k pull-Up
FDI_LSYNC1 resistor on the motherboard.
FDI_INT
HR UMA
A A
1
5
6
7
8
R404 RN401
Do Not Stuff DIS Do Not Stuff Wistron Corporation
DIS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
4
3
2
1
Title
CPU (PCIE/DMI/FDI)
A3
JE40-HR -1
5 4 CPU1B 3 2 1
SSID = CPU SANDY
2 OF 9
SANDY
A28 CLK_EXP_P 20
MISC
CLOCKS
BCLK
18 H_SNB_IVB# C26 SNB_IVB# BCLK# A27 CLK_EXP_N 20 Disabling Guidelines:
If motherboard only supports external graphics:
D JE40 modify AN34
RN502
Do Not Stuff Connect DPLL_REF_SSCLK on Processor to GND through D
1D05V_VTT SKTOCC# CLK_DP_P_R JE40 modify 1K +/- 5% resistor.
DPLL_REF_SSCLK A16 1 DIS 4
A15 CLK_DP_N_R 2 3 1D05V_VTT Connect DPLL_REF_SSCLK# on Processor to VCCP
H_PROCHOT# DPLL_REF_SSCLK#
1 2 through 1K +/- 5% resistorpower (~15 mW) may be
1
R501 C502 JE40 modify AL33 wasted.

62R2J-GP SC47P50V2JN-3GP CATERR#
2
THERMAL
1 R502 2
AN33 R8 4K99R2F-L-GP SM_DRAMRST# 37
22,27 H_PECI PECI SM_DRAMRST#
DDR3
MISC
CRB : 47pf 1 R513 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R506 1 2 140R2F-GP
27,42 H_PROCHOT# PROCHOT# SM_RCOMP0
CEKLT:43pf 56R2J-4-GP
SM_RCOMP1 A5 SM_RCOMP_1 R507 1
SM_RCOMP_2 R508 1
2 25D5R2F-GP
SM_RCOMP2 A4 2 200R2F-L-GP
Connect EC to PROCHOT# through inverting OD buffer.
22,36 H_THERMTRIP# AN32 THERMTRIP#
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
C C
PRDY# AP29
PREQ# AP27
JE40 modify
AR26 1D05V_VTT
TCK
PWR MANAGEMENT
JTAG & BPM

TMS AR27
AM34 AP30 XDP_TRST# RN501
19 H_PM_SYNC PM_SYNC TRST# SRN51J-GP
1 R503 2 TDI AR28 XDP_TDO 2 3
10KR2J-3-GP AP26 XDP_TDO XDP_TRST# 1 4
TDO
22,36,97 H_CPUPWRGD AP33 UNCOREPWRGOOD
AL35 XDP_DBRESET#
DBR#
19,37 PM_DRAM_PWRGD 1 DY 2 V8 SM_DRAMPWROK
R505 Do Not Stuff
37 VDDPWRGOOD BPM#0 AT28
AR29
B BPM#1
BPM#2 AR30 B
BUF_CPU_RST# AR33 AT30
RESET# BPM#3 JE40 modify
BPM#4 AP32
BPM#5 AR31
BPM#6 AT31
BPM#7 AR32
3D3V_S0
RN503
SRN1K5J-1-GP
XDP_DBRESET# 1 8
2 7
3 6 HR UMA
18,27,31,36,65,66,71,82,97 PLT_RST# 4 5 BUF_CPU_RST#
Wistron Corporation
A Taipei Hsien 221, Taiwan, R.O.C.
A
Title
CPU (THERMAL/CLOCK/PM )
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9 CPU1D 4 OF 9
SANDY
AB6
SANDY AE2
SA_CLK0 M_A_DIM0_CLK_DDR0 14 SB_CLK0 M_B_DIM0_CLK_DDR0 15
14 M_A_DQ[63:0] SA_CLK#0 AA6 M_A_DIM0_CLK_DDR#0 14 15 M_B_DQ[63:0] SB_CLK#0 AD2 M_B_DIM0_CLK_DDR#0 15
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D D5 SA_DQ1 A7 SB_DQ1 D
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 SA_DQ3 C8 SB_DQ3
M_A_DQ4 D6 AA5 M_B_DQ4 A9 AE1
M_A_DQ5 SA_DQ4 SA_CLK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CLK1 M_B_DIM0_CLK_DDR1 15
C6 SA_DQ5 SA_CLK#1 AB5 M_A_DIM0_CLK_DDR#1 14 A8 SB_DQ5 SB_CLK#1 AD1 M_B_DIM0_CLK_DDR#1 15
M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 SA_DQ7 D8 SB_DQ7
M_A_DQ8 F10 M_B_DQ8 G4
F8 SA_DQ9 F4 SB_DQ9
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ10 SA_CLK2 M_B_DQ11 SB_DQ10 SB_CLK2
G9 SA_DQ11 SA_CLK#2 AA4 G1 SB_DQ11 SB_CLK#2 AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 SA_DQ13 F5 SB_DQ13
M_A_DQ14 G8 M_B_DQ14 F2
G7 SA_DQ15 G2 SB_DQ15
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ16 SA_CLK3 M_B_DQ17 SB_DQ16 SB_CLK3
K5 SA_DQ17 SA_CLK#3 AA3 J8 SB_DQ17 SB_CLK#3 AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 SA_DQ19 K9 SB_DQ19
M_A_DQ20 J5 M_B_DQ20 J9
J4 SA_DQ21 J10 SB_DQ21
M_A_DQ22 J2 AK3 M_B_DQ22 K8 AD3
M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15
K2 SA_DQ23 SA_CS#1 AL3 M_A_DIM0_CS#1 14 K7 SB_DQ23 SB_CS#1 AE3 M_B_DIM0_CS#1 15
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 SA_DQ25 SA_CS#3 AH1 N4 SB_DQ25 SB_CS#3 AE6
M_A_DQ26 N8 M_B_DQ26 N2
N7 SA_DQ27 N1 SB_DQ27
M_A_DQ28 M10 M_B_DQ28 M4
M9 SA_DQ29 SA_ODT0 AH3 M_A_DIM0_ODT0 14 N5 SB_DQ29 SB_ODT0 AE4 M_B_DIM0_ODT0 15
DDR SYSTEM MEMORY B

C M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4 C
M_A_DQ31
M_A_DQ32
M7
AG6
SA_DQ30
SA_DQ31 DDR SYSTEM MEMORY A SA_ODT1
SA_ODT2 AG2
AH2
M_A_DIM0_ODT1 14 M_B_DQ31
M_B_DQ32
M1
AM5
SB_DQ30
SB_DQ31
SB_ODT1
SB_ODT2 AD5
AE5
M_B_DIM0_ODT1 15
M_A_DQ33 SA_DQ32 SA_ODT3 M_B_DQ33 SB_DQ32 SB_ODT3

AG5 SA_DQ33 AM6 SB_DQ33
M_A_DQ34 AK6 M_B_DQ34 AR3
AK5 SA_DQ35 AP3 SB_DQ35
M_A_DQ36 AH5 M_A_DQS#[7:0] 14 M_B_DQ36 AN3 M_B_DQS#[7:0] 15
M_A_DQ37 SA_DQ36 M_A_DQS#0 M_B_DQ37 SB_DQ36 M_B_DQS#0
AH6 SA_DQ37 SA_DQS#0 C4 AN2 SB_DQ37 SB_DQS#0 D7
M_A_DQ38 AJ5 G6 M_A_DQS#1 M_B_DQ38 AN1 F3 M_B_DQS#1
M_A_DQ39 SA_DQ38 SA_DQS#1 M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS#1 M_B_DQS#2
AJ6 SA_DQ39 SA_DQS#2 J3 AP2 SB_DQ39 SB_DQS#2 K6
M_A_DQ40 AJ8 M6 M_A_DQS#3 M_B_DQ40 AP5 N3 M_B_DQS#3
AK8 SA_DQ41 SA_DQS#4 AL6 AN9 SB_DQ41 SB_DQS#4 AN5
M_A_DQ42 AJ9 AM8 M_A_DQS#5 M_B_DQ42 AT5 AP9 M_B_DQS#5
AK9 SA_DQ43 SA_DQS#6 AR12 AT6 SB_DQ43 SB_DQS#6 AK12
M_A_DQ44 AH8 AM15 M_A_DQS#7 M_B_DQ44 AP6 AP15 M_B_DQS#7
M_A_DQ45 SA_DQ44 SA_DQS#7 M_B_DQ45 SB_DQ44 SB_DQS#7
AH9 SA_DQ45 AN8 SB_DQ45
M_A_DQ46 AL9 M_B_DQ46 AR6
AL8 SA_DQ47 AR5 SB_DQ47
M_A_DQ48 AP11 M_A_DQS[7:0] 14 M_B_DQ48 AR9 M_B_DQS[7:0] 15
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ49 SB_DQ48 M_B_DQS0
AN11 SA_DQ49 SA_DQS0 D4 AJ11 SB_DQ49 SB_DQS0 C7
M_A_DQ50 AL12 F6 M_A_DQS1 M_B_DQ50 AT8 G3 M_B_DQS1
M_A_DQ51 SA_DQ50 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS1 M_B_DQS2
AM12 SA_DQ51 SA_DQS2 K3 AT9 SB_DQ51 SB_DQS2 J6
M_A_DQ52 AM11 N6 M_A_DQS3 M_B_DQ52 AH11 M3 M_B_DQS3
AL11 SA_DQ53 SA_DQS4 AL5 AR8 SB_DQ53 SB_DQS4 AN6
M_A_DQ54 AP12 AM9 M_A_DQS5 M_B_DQ54 AJ12 AP8 M_B_DQS5
AN12 SA_DQ55 SA_DQS6 AR11 AH12 SB_DQ55 SB_DQS6 AK11
M_A_DQ56 AJ14 AM14 M_A_DQS7 M_B_DQ56 AT11 AP14 M_B_DQS7
M_A_DQ57 SA_DQ56 SA_DQS7 M_B_DQ57 SB_DQ56 SB_DQS7
AH14 SA_DQ57 AN14 SB_DQ57
M_A_DQ58 AL15 M_B_DQ58 AR14
B M_A_DQ59 SA_DQ58 M_B_DQ59 SB_DQ58 B
AK15 SA_DQ59 AT14 SB_DQ59
M_A_DQ60 AL14 M_B_DQ60 AT12
M_A_DQ61 SA_DQ60 M_A_A0 M_A_A[15:0] 14 M_B_DQ61 SB_DQ60 M_B_A0 M_B_A[15:0] 15
AK14 SA_DQ61 SA_MA0 AD10 AN15 SB_DQ61 SB_MA0 AA8
M_A_DQ62 AJ15 W1 M_A_A1 M_B_DQ62 AR15 T7 M_B_A1
M_A_DQ63 SA_DQ62 SA_MA1 M_A_A2 M_B_DQ63 SB_DQ62 SB_MA1 M_B_A2
AH15 SA_DQ63 SA_MA2 W2 AT15 SB_DQ63 SB_MA2 R7
W7 M_A_A3 T6 M_B_A3
SA_MA3 M_A_A4 SB_MA3 M_B_A4
SA_MA4 V3 SB_MA4 T2
V2 M_A_A5 T4 M_B_A5
SA_MA6 W3 SB_MA6 T3
14 M_A_BS0 AE10 W6 M_A_A7 15 M_B_BS0 AA9 R2 M_B_A7
SA_BS0 SA_MA7 M_A_A8 SB_BS0 SB_MA7 M_B_A8
14 M_A_BS1 AF10 SA_BS1 SA_MA8 V1 15 M_B_BS1 AA7 SB_BS1 SB_MA8 T5
14 M_A_BS2 V6 W5 M_A_A9 15 M_B_BS2 R6 R3 M_B_A9
SA_BS2 SA_MA9 M_A_A10 SB_BS2 SB_MA9 M_B_A10
SA_MA10 AD8 SB_MA10 AB7
V4 M_A_A11 R1 M_B_A11
SA_MA12 W4 SB_MA12 T1
14 M_A_CAS# AE8 AF8 M_A_A13 15 M_B_CAS# AA10 AB10 M_B_A13
SA_CAS# SA_MA13 M_A_A14 SB_CAS# SB_MA13 M_B_A14
14 M_A_RAS# AD9 SA_RAS# SA_MA14 V5 15 M_B_RAS# AB8 SB_RAS# SB_MA14 R5
14 M_A_WE# AF9 V7 M_A_A15 15 M_B_WE# AB9 R4 M_B_A15
SA_WE# SA_MA15 SB_WE# SB_MA15
SANDY SANDY
A HR UMA A
Wistron Corporation
Title
CPU (DDR)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1E 5 OF 9
RSVD#L7 L7
RSVD#AG7 AG7
AK28
AK29
CFG0 SANDY RSVD#AE7 AE7
AK2
CFG2 CFG1 RSVD#AK2
AL26 CFG2 RSVD#W8 W8
AL27 CFG3
1
AK26 CFG4
D DIS_PX_Muxless R702 AL29 AT26 D
Do Not Stuff CFG5 RSVD#AT26
AL30 CFG6 RSVD#AM33 AM33
AM31 CFG7 RSVD#AJ27 AJ27
AM32
2
CFG8
AM30 CFG9
AM28 CFG10
AM26 CFG11
AN28 CFG12
AN31 CFG13 RSVD#T8 T8
AN26 CFG14 RSVD#J16 J16
AM27 CFG15 RSVD#H16 H16
PEG Static Lane Reversal AK31 CFG16 RSVD#G16 G16
AN29 CFG17
1: Normal Operation; Lane #
CFG2 definition matches socket pin map definition
0:Lane Reversed RSVD#AR35 AR35
AJ31 RSVD#AJ31 RSVD#AT34 AT34
AH31 RSVD#AH31 RSVD#AT33 AT33
AJ33 RSVD#AJ33 RSVD#AP35 AP35
AH33 RSVD#AH33 RSVD#AR34 AR34
AJ26 RSVD#AJ26
RESERVED
B4:VREF_DQ CHA
RSVD#B34 B34
M_VREF_DQ_DIMM0_C B4 A33
M_VREF_DQ_DIMM1_C RSVD#B4 RSVD#A33
D1 RSVD#D1 RSVD#A34 A34
C D1:VREF_DQ CHB B35 C
RSVD#B35
RSVD#C35 C35
4
3
F25 RSVD#F25
RN701 F24 RSVD#F24
SRN1KJ-7-GP F23 RSVD#F23
D24 RSVD#D24 RSVD#AJ32 AJ32
G25 RSVD#G25 RSVD#AK32 AK32
G24
1
2
RSVD#G24
E23 RSVD#E23
D23 RSVD#D23
C30 RSVD#C30 RSVD#AH27 AH27
A31 RSVD#A31
B30 RSVD#B30
B29 RSVD#B29
D30 RSVD#D30 RSVD#AN35 AN35
B31 RSVD#B31 RSVD#AM35 AM35
A30 RSVD#A30
C29 RSVD#C29
J20 RSVD#J20
B18 RSVD#B18 RSVD#AT2 AT2
A19 RSVD#A19 RSVD#AT1 AT1
RSVD#AR1 AR1
J15 RSVD#J15
B B
SANDY
A HR UMA A
Wistron Corporation
Title
CPU (RESERVED)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F POWER 6 OF 9
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
PROCESSOR CORE POWER 5 x 22 uF & 5 x 0805 no-stuff at Bottom
VCC_CORE SANDY 7 x 22 uF & 2 x 0805 no-stuff at Top
VCC_CORE 53A 1D05V_VTT
AG35 VCC
AG34 VCC VCCIO AH13
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AG33 VCC VCCIO AH10
C805
C806
C807
C809
C810
C838
C839
C840
C841
AG32 VCC VCCIO AG10
1
C801
C802
C803
C804
C811
AG31 AC10
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
D VCC VCCIO D
1
1
AG30 VCC VCCIO Y10
AG29 U10
2
VCC VCCIO
DY DY DY DY DY AG28 P10
2
2
VCC VCCIO
AG27 VCC VCCIO L10
AG26 VCC VCCIO J14
AF35 VCC VCCIO J13
AF34 VCC VCCIO J12
AF33 VCC VCCIO J11
AF32 VCC VCCIO H14
AF31 VCC VCCIO H12
AF30 VCC VCCIO H11
AF29 VCC VCCIO G14
C820
C819
C818
C817
C815
AF28 G13 No-stuff sites outside the socket may be removed.
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PEG AND DDR

VCC VCCIO
1
1
AF27 G12
AF26
VCC VCCIO
F14
No-stuff sites inside the socket cavity need to remain.
VCC VCCIO
DY DY DY DY DY AD35 F13
2
2
VCC VCCIO
AD34 VCC VCCIO F12
AD33 VCC VCCIO F11
AD32 VCC VCCIO E14
AD31 E12 1D05V_VTT
VCC VCCIO
AD30 VCC
AD29 VCC VCCIO E11
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AD28 D14
Do Not Stuff
Do Not Stuff
Do Not Stuff
VCC VCCIO
C816
C821
C822
C823
C824
C825
C826
C827
C812
C813
C814
C829
C830
C842
C843
C844
C845
AD27 VCC VCCIO D13
1
1
AD26 VCC VCCIO D12
AC35 VCC VCCIO D11 DY
AC34 C14
2
2
VCC VCCIO
AC33 VCC VCCIO C13
AC32 VCC VCCIO C12
AC31 VCC VCCIO C11
C AC30 VCC VCCIO B14 C
AC29 VCC VCCIO B12
AC28 VCC VCCIO A14
AC27 VCC VCCIO A13
AC26 VCC VCCIO A12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AA35 A11
Do Not Stuff
Do Not Stuff
VCC VCCIO
C837
C836
C835
C834
C833
C832
C831
C828
AA34 VCC
1
AA33 VCC VCCIO J23

DY DY DY AA32 VCC
AA31
2
VCC
AA30 VCC
AA29 VCC
AA28 VCC
AA27 VCC
AA26
CORE SUPPLY
VCC
Y35 VCC
Y34 VCC
Y33 VCC
Y32 VCC
Y31 VCC
Y30 VCC
Y29 VCC
Y28 VCC
VCC Output Decoupling Recommendation: Y27 VCC
4 x 470 uF at Bottom Socket Edge Y26 VCC
V35 R803
SVID
8 x 22 uF at Top Socket Cavity V34
VCC
AJ29 H_CPU_SVIDALRT# 1 2 43R2J-GP
8 x 22 uF at Top Socket Edge VCC VIDALERT# VR_SVID_ALERT# 42
V33 VCC VIDSCLK AJ30 H_CPU_SVIDCLK 42
8 x 22 uF at Bottom Socket Cavity V32 VCC VIDSOUT AJ28 H_CPU_SVIDDAT 42
V31 VCC
V30 VCC
B V29 VCC B
1D05V_VTT
V28 VCC For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
V27
V26
VCC For CRB VIDALERT# need to pull high 75 ohm close to CPU
VCC
U35 VCC
U34 H_CPU_SVIDDAT R804 1 2 130R2F-1-GP
VCC
U33 VCC
U32 VCC
U31 VCC
U30 VCC
U29 VCC
U28 VCC
U27 VCC
U26 VCC
R35 VCC_CORE
VCC
R34 VCC
R33 VCC R801,R802 close to CPU
1
R32 VCC
R31 R801
VCC 100R2F-L1-GP-U
R30 VCC
R29
SENSE LINES
VCC
R28
2
VCC
R27 VCC VCC_SENSE AJ35 VCCSENSE 42
R26 VCC VSS_SENSE AJ34 VSSSENSE 42
P35 VCC
1
P34 VCC
P33 R802
VCC 100R2F-L1-GP-U
P32 VCC VCCIO_SENSE B10 VCCIO_SENSE 45
P31 VCC VSSIO_SENSE A10 VSSIO_SENSE 45
P30
2
VCC
P29 VCC
A P28 VCC HR UMA A
P27 VCC
P26 VCC
Wistron Corporation
Title
CPU (VCC_CORE)
SANDY Size Document Number Rev
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
VAXG Output Decoupling Recommendation: R906,R907 close to CPU

SSID = CPU 2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity VCC_GFXCORE
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge
POWER
1
VCC_GFXCORE R906
CPU1G 7 OF 9 100R2F-L1-GP-U
PROCESSOR VAXG: 24A
2
SENSE
LINES
AT24 AK35 VCC_AXG_SENSE 42 VCC_AXG_SENSE
VAXG VAXG_SENSE
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
D AT23 AK34 VSS_AXG_SENSE 42 VSS_AXG_SENSE D
Do Not Stuff
Do Not Stuff
VAXG VSSAXG_SENSE
C901
C902
C903
C904
C905
C906
AT21 VAXG SANDY
1
AT20 VAXG
DY DY AT18 Refer to the latest Huron River Mainstream PDG R907
VAXG 100R2F-L1-GP-U
AT17 (Doc# 436735) for more details on S3 power
2
VAXG
UMA_PX_Muxless UMA_PX_Muxless AR24 VAXG reduction implementation.
UMA_PX_MuxlessUMA_PX_Muxless AR23
2
VAXG
AR21 VAXG
AR20 +V_SM_VREF_CNT should have 10 mil trace width
VREF
VAXG
AR18 VAXG
AR17 VAXG
AP24 VAXG SM_VREF AL1 +V_SM_VREF_CNT 37
AP23 VAXG
AP21 VAXG
AP20 VAXG
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AP18
Do Not Stuff
Do Not Stuff
VAXG
C907
C908
C918
C919
C920
C921
AP17 VAXG
1
1
AN24 VAXG
Routing Guideline:
DY DY AN23 VAXG Power from DDR_VREF_S3 and +V_SM_VREF_CNT
AN21 1D5V_S0
2
2
UMA_PX_Muxless UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless AN20
VAXG should have 10 mils trace width.
VAXG
DDR3 -1.5V RAILS

AN18 VAXG
AN17 VAXG PROCESSOR VDDQ: 10A
GRAPHICS
AM24 VAXG VDDQ AF7
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AM23 AF4
Do Not Stuff
Do Not Stuff
VAXG VDDQ
C909
C910
C911
C912
C913
C914
AM21 VAXG VDDQ AF1
1
AM20 VAXG VDDQ AC7
AM18 VAXG VDDQ AC4 DY DY
AM17 AC1
2
C VAXG VDDQ C
AL24 VAXG VDDQ Y7
VCC_GFXCORE AL23 Y4
VAXG VDDQ
AL21 VAXG VDDQ Y1
AL20 VAXG VDDQ U7
AL18 VAXG VDDQ U4
AL17 VAXG VDDQ U1 VDDQ Output Decoupling Recommendation:
2
AK24 VAXG VDDQ P7 1 x 330 uF

R903 R904 R905 R901 AK23 P4
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff AK21
VAXG VDDQ
P1 0D85V_S0 6 x 10 uF
VAXG VDDQ
DIS DIS DIS DIS AK20 VAXG
AK18 PROCESSOR VCCSA: 6A
1
VAXG
AK17 VAXG
SC10U6D3V5KX-1GP
AJ24
Do Not Stuff
VAXG
C916
C915
AJ23 VAXG
VCCSA Output Decoupling Recommendation:
1
AJ21 VAXG 1 x 330 uF
AJ20 VAXG DY 2 x 10 uF at Bottom Socket Cavity
AJ18
2
VAXG 1 x 10 uF at Bottom Socket Edge
AJ17 VAXG
AH24
SA RAIL
VAXG
AH23 VAXG
AH21 VAXG VCCSA M27
AH20 VAXG VCCSA M26
Disabling Guidelines for External Graphics Designs: AH18 VAXG VCCSA L26
Can connect to GND if motherboard only supports external AH17 VAXG VCCSA J26
J25
graphics and if GFX VR is not stuffed. VCCSA
J24 0D85V_S0
Can be left floating (Gfx VR keeps VAXG rail from floating) VCCSA
VCCSA H26
if the VR is stuffed VCCSA H25
1
R902 need be close to pin H23.
1.8V RAIL
B R902 B
1D8V_S0 10R2J-2-GP
PROCESSOR VCCPLL: 1.2A
2
B6 H23 VCCUSA_SENSE 1
MISC
VCCPLL VCCSA_SENSE
SC1U10V2KX-1GP
A6 TP901 Do Not Stuff

VCCPLL
C922
A2 VCCPLL
1
C22 H_FC_C22
FC_C22
C24
2
VCCSA_VID1 VCCSA_SEL 48
2
1
SANDY RN901
SRN1KJ-7-GP
3
4
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
A HR UMA A
Wistron Corporation
Title
CPU (VCC_GFXCORE)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9 CPU1I 9 OF 9
AT35 VSS VSS AJ22

AT32 VSS VSS AJ19
AT29
AT27
VSS VSS AJ16
AJ13
T35
T34
VSS SANDY VSS F22
F19
VSS VSS VSS VSS
AT25 VSS VSS AJ10 T33 VSS VSS E30
D AT19 VSS VSS AJ4 T31 VSS VSS E24 D
AT13
AT10
VSS SANDY VSS AJ2
AJ1
T29
T28
VSS VSS E18
E15
VSS VSS VSS VSS
AT7 VSS VSS AH35 T27 VSS VSS E13
AT4 VSS VSS AH34 T26 VSS VSS E10
AT3 VSS VSS AH32 P9 VSS VSS E9
AR25 VSS VSS AH30 P8 VSS VSS E8
AR10 VSS VSS AH22 N35 VSS VSS E3
AR2 VSS VSS AH7 N32 VSS VSS D35
AP34 VSS VSS AH4 N31 VSS VSS D32
AP31 VSS VSS AG9 N30 VSS VSS D29
AP22 VSS VSS AF6 N27 VSS VSS D17
AP19 VSS VSS AF5 N26 VSS VSS C34
AP16 VSS VSS AF3 M34 VSS VSS C31
AP13 VSS VSS AF2 L33 VSS VSS C28
AP10 VSS VSS AE35 L30 VSS VSS C27
AN30 VSS VSS AE31 L6 VSS VSS C1
C AN27 AE30 L5 B22 C
VSS VSS VSS VSS
AN25 AE29 L4 B19
AN22
AN19
VSS
VSS
VSS
VSS VSS
VSS
VSS
AE28
AE27
L3
L2
VSS
VSS
VSS
VSS VSS
VSS
VSS
B17
B15
AN16 VSS VSS AE26 L1 VSS VSS B13
AN13 VSS VSS AE9 K35 VSS VSS B11
AN10 VSS VSS AD7 K32 VSS VSS B9
AN7 VSS VSS AC9 K29 VSS VSS B8
AN4 VSS VSS AC8 K26 VSS VSS B7
AM29 VSS VSS AC6 J34 VSS VSS B5
AM25 VSS VSS AC5 J31 VSS VSS B3
AM22 VSS VSS AC3 H33 VSS VSS B2
AM19 VSS VSS AC2 H30 VSS VSS A35
AM16 VSS VSS AB35 H27 VSS VSS A32
AM2 VSS VSS AB29 H10 VSS
AM1 VSS VSS AB28 H9 VSS
AL34 VSS VSS AB27 H8 VSS
AL31 VSS VSS AB26 H7 VSS
AL28 VSS VSS Y9 H6 VSS
B B
AL10 VSS VSS W35 G35 VSS
AK33 VSS VSS W31 G23 VSS
AK22 VSS VSS W27 F34 VSS
AK19 VSS VSS W26 F31 VSS
AK16 VSS VSS U9 F29 VSS
AK13 VSS VSS U8
AK10 VSS VSS U6
AK7 VSS VSS U5
AK4 VSS VSS U3
AJ25 VSS VSS U2
SANDY SANDY
A HR UMA A
Wistron Corporation
Title
CPU (VSS)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
JE40 delete XDP function
B B
A HR UMA A
Wistron Corporation
Title
XDP
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
HR UMA
A
Wistron Corporation A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY M_A_A0 98 A0 NP1 NP1

M_A_A1 97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] 6 96 A2
M_A_A3 95 110 M_A_RAS# 6
M_A_A4 A3 RAS#
92 A4 WE# 113 M_A_WE# 6
M_A_A5 91 115 M_A_CAS# 6
M_A_A6 A5 CAS#
M_A_A7
90 A6 Note:
86 A7 CS0# 114 M_A_DIM0_CS#0 6
M_A_A8 89 121 M_A_DIM0_CS#1 6
If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A9 A8 CS1#
M_A_A10
85 A9 SO-DIMMA SPD Address is 0xA0
107 A10/AP CKE0 73 M_A_DIM0_CKE0 6
M_A_A11 84 A11 CKE1 74 M_A_DIM0_CKE1 6 SO-DIMMA TS Address is 0x30
D M_A_A12 83 D
M_A_A13 A12
119 A13 CK0 101 M_A_DIM0_CLK_DDR0 6
M_A_A14 80 A14 CK0# 103 M_A_DIM0_CLK_DDR#0 6 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A15 78
79
A15
102
SO-DIMMA SPD Address is 0xA2
6 M_A_BS2 A16/BA2 CK1 M_A_DIM0_CLK_DDR1 6
CK1# 104 M_A_DIM0_CLK_DDR#1 6 SO-DIMMA TS Address is 0x32
6 M_A_BS0 109 BA0
6 M_A_BS1 108 BA1 DM0 11
6 M_A_DQ[63:0] DM1 28
M_A_DQ0 5 46
M_A_DQ1
M_A_DQ2
7
DQ0
DQ1
DM2
DM3 63 Thermal EVENT
15 DQ2 DM4 136
M_A_DQ3 17 153 3D3V_S0
M_A_DQ4 DQ3 DM5
4 DQ4 DM6 170
M_A_DQ5 6 187 TS#_DIMM0_1 1R1403 2
M_A_DQ6 DQ5 DM7 10KR2J-3-GP
16 DQ6
M_A_DQ7 18 200
DQ7 SDA PCH_SMBDATA 15,20
M_A_DQ8 21 202
DQ8 SCL PCH_SMBCLK 15,20
M_A_DQ9 23
M_A_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 15
M_A_DQ11 35
M_A_DQ12 DQ11
22 DQ12 VDDSPD 199
M_A_DQ13 24
M_A_DQ14 DQ13 C1401
34 DQ14 SA0 197
SCD1U10V2KX-5GP
M_A_DQ15 36 201
M_A_DQ16 DQ15 SA1
39 DQ16
M_A_DQ17 41 77
2
M_A_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
M_A_DQ19 53 125 1D5V_S3
M_A_DQ20 DQ19 NC#/TEST
40 DQ20
M_A_DQ21 42 75
M_A_DQ22 DQ21 VDD1
C 50 DQ22 VDD2 76 C
M_A_DQ23 52 81
M_A_DQ24 DQ23 VDD3
57 DQ24 VDD4 82
M_A_DQ25 59 87
M_A_DQ26 DQ25 VDD5
67 DQ26 VDD6 88
M_A_DQ27 69 93
M_A_DQ28 DQ27 VDD7
56 DQ28 VDD8 94
M_A_DQ29 58 99 Layout Note:
M_A_DQ30 DQ29 VDD9 1D5V_S3
M_A_DQ31
68 DQ30 VDD10 100 SODIMM A DECOUPLING Place these Caps near
70 DQ31 VDD11 105
M_A_DQ32
M_A_DQ33
129 DQ32 VDD12 106 SO-DIMMA.
131 DQ33 VDD13 111
M_A_DQ34 141 112
DQ34 VDD14
SC56P50V2JN-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQ35 143 117
Do Not Stuff
DQ35 VDD15
SCD1U50V3KX-GP
SCD1U50V3KX-GP
C1403
C1404
C1405
C1406
C1407
C1408
C1409
C1410
M_A_DQ36 130 118
DQ36 VDD16
1
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD17
M_A_DQ39
140
142
DQ38 VDD18 124
DY
2
M_A_DQ40 DQ39
M_A_DQ41
147 DQ40 VSS 2 3G_RF 3G_RF 3G_RF
149 DQ41 VSS 3
M_A_DQ42 157 8
M_A_DQ43 DQ42 VSS
159 DQ43 VSS 9
M_A_DQ44 146 13
M_A_DQ45 DQ44 VSS
148 DQ45 VSS 14
M_A_DQ46 158 19
DQ46 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ47 160 20
DQ47 VSS
C1416
C1417
M_A_DQ48 163 25
DQ48 VSS
1
M_A_DQ49 165 26
M_A_DQ50 DQ49 VSS
175 DQ50 VSS 31
M_A_DQ51 177 32
2
M_A_DQ52 DQ51 VSS
164 DQ52 VSS 37
B M_A_DQ53 166 38 B
M_A_DQ54 DQ53 VSS
174 DQ54 VSS 43
DDR_VREF_S3 M_A_DQ55 176 44
M_A_DQ56 DQ55 VSS
181 DQ56 VSS 48
M_A_DQ57 183 49
M_A_DQ58 DQ57 VSS
191 DQ58 VSS 54
M_A_DQ59 193 55
M_A_DQ60 DQ59 VSS
180 DQ60 VSS 60
1
M_A_DQ61 182 61
C1411 C1413 M_A_DQ62 DQ61 VSS
192 DQ62 VSS 65
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ63 194 66
2
DQ63 VSS
VSS 71
M_A_DQS#0 10 72
M_A_DQS#1 DQS0# VSS
27 DQS1# VSS 127
M_A_DQS#2 45 128
M_A_DQS#3 62
DQS2# VSS
133
PART NUMBER Height TYPE
M_A_DQS#4 DQS3# VSS
135 DQS4# VSS 134
M_A_DQS#5 152 138
M_A_DQS#6 DQS5# VSS
M_A_DQS#[7:0] 6 169 DQS6# VSS 139
M_A_DQS#7 186 144
DQS7# VSS
M_A_DQS[7:0] 6 VSS 145
M_A_DQS0 12 150
M_A_DQS1 DQS0 VSS
29 DQS1 VSS 151
M_A_DQS2 47 155
-2 M_A_DQS3
M_A_DQS4
64
DQS2
DQS3
VSS
VSS 156
137 DQS4 VSS 161
M_A_DQS5 154 162
M_A_DQS6 DQS5 VSS
171 DQS6 VSS 167
0D75V_S0 M_A_DQS7
Place these caps 188 DQS7 VSS 168
VSS 172
close to VTT1 and 116 173
6 M_A_DIM0_ODT0 ODT0 VSS
A VTT2. 6 M_A_DIM0_ODT1 120 ODT1 VSS 178 A
VSS 179 HR UMA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DDR_VREF_S3 126 VREF_CA VSS 184

C1419
C1421
1 185 DM1
VREF_DQ VSS
1
DDR3-204P-122-GP
15,37 DDR3_DRAMRST# 30 RESET#
VSS
VSS
189
190 62.10017.Z51 Wistron Corporation
195 2nd = 62.10017.V51 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
VSS Taipei Hsien 221, Taiwan, R.O.C.

VSS 196 3rd = 62.10017.M51
0D75V_S0 203 VTT1 VSS 205 4th = 62.10017.X41
204 206 Title
VTT2 VSS
DDR3-SODIMM1
H =4mm Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 A1 NP2 NP2
M_B_A[15:0] 6 M_B_A2 96
M_B_A3 A2
95 A3 RAS# 110 M_B_RAS# 6
M_B_A4 92 113 M_B_WE# 6
M_B_A5 A4 WE#
91 A5 CAS# 115 M_B_CAS# 6
M_B_A6 90
M_B_A7 A6
86 A7 CS0# 114 M_B_DIM0_CS#0 6
M_B_A8 89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85 A9
M_B_A10 107 73 M_B_DIM0_CKE0 6
M_B_A11 A10/AP CKE0
D 84 A11 CKE1 74 M_B_DIM0_CKE1 6 D
M_B_A12 83
M_B_A13 A12
119 A13 CK0 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 6 Note:
M_B_A15 A14 CK0#
78 A15
79 102 M_B_DIM0_CLK_DDR1 6
SO-DIMMB SPD Address is 0xA4
6 M_B_BS2 A16/BA2 CK1
CK1# 104 M_B_DIM0_CLK_DDR#1 6 SO-DIMMB TS Address is 0x34
6 M_B_BS0 109 BA0
6 M_B_BS1 108 BA1 DM0 11
6 M_B_DQ[63:0] DM1 28
M_B_DQ0 5 46 SO-DIMMB is placed farther from
M_B_DQ1 DQ0 DM2
7 DQ1 DM3 63
M_B_DQ2 15 136 the Processor than SO-DIMMA
M_B_DQ3 DQ2 DM4
17 DQ3 DM5 153
M_B_DQ4 4 170
M_B_DQ5 DQ4 DM6
6 DQ5 DM7 187
M_B_DQ6 16
M_B_DQ7 DQ6
18 DQ7 SDA 200 PCH_SMBDATA 14,20
M_B_DQ8 21 202
DQ8 SCL PCH_SMBCLK 14,20
M_B_DQ9 23
M_B_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 14
M_B_DQ11 35
M_B_DQ12 DQ11
22 DQ12 VDDSPD 199
M_B_DQ13 24 DQ13
1
M_B_DQ14 34 197 C1501
DQ14 SA0
SCD1U10V2KX-5GP
M_B_DQ15 36 201 SA1_DIM1 2 1
M_B_DQ16 DQ15 SA1
39
2
M_B_DQ17 DQ16 R1501
41 DQ17 NC#1 77
M_B_DQ18 51 122 10KR2J-3-GP
M_B_DQ19 DQ18 NC#2 1D5V_S3
53 DQ19 NC#/TEST 125
M_B_DQ20 40
M_B_DQ21 DQ20
C 42 DQ21 VDD1 75 C
M_B_DQ22 50 76
M_B_DQ23 DQ22 VDD2
52 DQ23 VDD3 81
M_B_DQ24 57 82
M_B_DQ25 DQ24 VDD4
59 DQ25 VDD5 87
M_B_DQ26 67 88
M_B_DQ27 DQ26 VDD6
69 DQ27 VDD7 93
M_B_DQ28 56 94
M_B_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
M_B_DQ30 68 100
M_B_DQ31 DQ30 VDD10
70 DQ31 VDD11 105
M_B_DQ32 129 106
M_B_DQ33 DQ32 VDD12
131 DQ33 VDD13 111
M_B_DQ34 141 112
M_B_DQ35 DQ34 VDD14
143 DQ35 VDD15 117
M_B_DQ36 1D5V_S3
M_B_DQ37
130 DQ36 VDD16 118 SODIMM B DECOUPLING
132 DQ37 VDD17 123
M_B_DQ38 140 124
M_B_DQ39 DQ38 VDD18
142 DQ39
SCD1U50V3KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_B_DQ40 147 2
DQ40 VSS
SCD1U50V3KX-GP
C1505
C1506
C1507
C1508
C1509
C1510
SC56P50V2JN-2GP
M_B_DQ41 149 3 C1503
DQ41 VSS
1
SC5D6P50V2CN-1GP
C1504
M_B_DQ42 157 8
M_B_DQ43 DQ42 VSS
M_B_DQ44
159 DQ43 VSS 9 3G_RF
146 13
2
M_B_DQ45 DQ44 VSS
M_B_DQ46
148 DQ45 VSS 14 3G_RF 3G_RF 3G_RF
158 DQ46 VSS 19
M_B_DQ47 160 20
M_B_DQ48 DQ47 VSS
163 DQ48 VSS 25
M_B_DQ49 165 26
M_B_DQ50 DQ49 VSS
175 DQ50 VSS 31
M_B_DQ51 177 32
DQ51 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
B M_B_DQ52 164 37 B
DQ52 VSS
C1513
C1514
M_B_DQ53 166 38
DQ53 VSS
1
M_B_DQ54 174 43 Layout Note:
DDR_VREF_S3 M_B_DQ55 DQ54 VSS
176 DQ55 VSS 44
M_B_DQ56 181 48 Place these Caps near
2
M_B_DQ57 DQ56 VSS
M_B_DQ58
183 DQ57 VSS 49 SO-DIMMB.
191 DQ58 VSS 54
M_B_DQ59 193 55
M_B_DQ60 DQ59 VSS
180 DQ60 VSS 60
1
M_B_DQ61 182 61
DQ61 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1515 C1517 M_B_DQ62 192 65

M_B_DQ63 DQ62 VSS
194 66
2
DQ63 VSS
VSS 71
M_B_DQS#0 10 72
M_B_DQS#1 DQS0# VSS
27 DQS1# VSS 127
M_B_DQS#2 45 128
M_B_DQS#3 DQS2# VSS
62 DQS3# VSS 133
M_B_DQS#4 135 134
M_B_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_B_DQS#6 169 139
M_B_DQS#7 DQS6# VSS
186 DQS7# VSS 144
VSS 145
M_B_DQS0 12 150
M_B_DQS1 DQS0 VSS
-2 M_B_DQS#[7:0] 6
M_B_DQS2
29 DQS1 VSS 151
47 DQS2 VSS 155
M_B_DQS[7:0] 6 M_B_DQS3 64 156
M_B_DQS4 DQS3 VSS
137 DQS4 VSS 161
M_B_DQS5 154 162
M_B_DQS6 DQS5 VSS
Place these caps M_B_DQS7
171 DQS6 VSS 167
188 DQS7 VSS 168
0D75V_S0 close to VTT1 and 172
VSS
A VTT2. 6 M_B_DIM0_ODT0 116 ODT0 VSS 173 A
6 M_B_DIM0_ODT1 120 ODT1 VSS 178 HR UMA
179 DM2
VSS DDR3-204P-126-GP
DDR_VREF_S3 126 VREF_CA VSS 184
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1519
C1521
1 VREF_DQ VSS 185 62.10024.D41 Wistron Corporation

1
VSS 189
30 190 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
14,37 DDR3_DRAMRST# RESET# VSS Taipei Hsien 221, Taiwan, R.O.C.
195 2nd = 62.10017.R91
2
VSS
VSS 196 3rd = 62.10017.V61 Title
0D75V_S0 203 VTT1 VSS 205 4th = 62.10017.X51
204 VTT2 VSS 206
DDR3-SODIMM2
Custom
H = 8mm JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
HR UMA
A
Title
DDR3-SODIMM2
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
RN1701 PCH1D 4 OF 10 3D3V_S0
SRN2K2J-1-GP 94 L_BKLT_EN J47 AP43
L_CTRL_DATA L_BKLTEN Cougar SDVO_TVCLKINN
2 3 94 LVDS_VDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45
1 4 L_CTRL_CLK
L_DDC_DATA(PAGE17): 94 L_BKLT_CTRL P45 L_BKLTCTL
Point SDVO_STALLN AM42
4
3
UMA_Muxless SDVO_STALLP AM40
This signal is on the LVDS interface. 94 LVDS_DDC_CLK_R T40 RN1706 DDI Port B Detect:(SDVO_CTRL_ DATA)
L_DDC_CLK
This signal needs to be left NC if eDP is 94 LVDS_DDC_DATA_R K47 L_DDC_DATA SDVO_INTN AP39 SRN2K2J-1-GP 1: Port B detected
SDVO_INTP AP40 UMA_Muxless
RN1702 used for the local flat panel display L_CTRL_CLK T45 0: Port B not detected
SRN100KJ-6-GP L_CTRL_DATA L_CTRL_CLK
P39
1
2
L_BKLT_EN L_CTRL_DATA
1 4
2 3 LVDS_VDD_EN LVDS_IBG AF37 P38
JE40 modify LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
RN1704 AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
UMA_Muxless Place near PCH SRN0J-6-GP
1
1 4 LVDS_VREFH AE48
R1701 LVDS_VREFL LVD_VREFH
2 3 AE47 LVD_VREFL DDPB_AUXN AT49
2K37R2F-GP AT47
DDPB_AUXP
UMA_Muxless UMA_Muxless DDPB_HPD AT40 HDMI_PCH_DET 51
AK39
LVDS
94 LVDSA_CLK#
2
LVDSA_CLK# DDBP_DATA2# C1701 SCD1U10V2KX-5GP
94 LVDSA_CLK AK40 LVDSA_CLK DDPB_0N AV42 UMA_Muxless
1 2 HDMI_DATA2_R# 51
AV40 DDBP_DATA2 UMA_Muxless
1 2 C1702 SCD1U10V2KX-5GP HDMI_DATA2_R 51
DDPB_0P DDBP_DATA1# C1703 SCD1U10V2KX-5GP
94 LVDSA_DATA0# AN48 LVDSA_DATA#0 DDPB_1N AV45 UMA_Muxless
1 2 HDMI_DATA1_R# 51
C DDBP_DATA1 UMA_Muxless C1704 SCD1U10V2KX-5GP C
Digital Display Interface

94 LVDSA_DATA1# AM47 LVDSA_DATA#1 DDPB_1P AV46 1 2 HDMI_DATA1_R 51
DDBP_DATA0# UMA_Muxless C1705 SCD1U10V2KX-5GP
Impedance:90 ohm 94 LVDSA_DATA2# AK47
AJ48
LVDSA_DATA#2 DDPB_2N AU48
AU47 DDBP_DATA0
1 2
UMA_Muxless
1 2 C1706 SCD1U10V2KX-5GP
HDMI_DATA0_R# 51
LVDSA_DATA#3 DDPB_2P HDMI_DATA0_R 51
AV47 DDBP_CLK# UMA_Muxless
1 2 C1707 SCD1U10V2KX-5GP HDMI_CLK_R# 51
DDPB_3N DDBP_CLK C1708 SCD1U10V2KX-5GP
94 LVDSA_DATA0 AN47 LVDSA_DATA0 DDPB_3P AV49 UMA_Muxless
1 2 HDMI_CLK_R 51
94 LVDSA_DATA1 AM49 LVDSA_DATA1
94 LVDSA_DATA2 AK49
AJ47
LVDSA_DATA2
P46
Close to PCH side
LVDSA_DATA3 DDPC_CTRLCLK
DDPC_CTRLDATA P42
AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45
AH47
LVDSB_DATA#0 DDPC_HPD AT38 Impedance:90 ohm Impedance:100 ohm
LVDSB_DATA#1
AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 AY49
JE40 delete LVDS B channel LVDSB_DATA#3 DDPC_0P
AY43
DDPC_1N
AH43 LVDSB_DATA0 DDPC_1P AY45
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
AF43 LVDSB_DATA3 DDPC_3N BB47
Close to PCH side DDPC_3P BB49
CRT_BLUE 95 CRT_BLUE N48 M43

CRT_GREEN CRT_BLUE DDPD_CTRLCLK
95 CRT_GREEN P49 CRT_GREEN DDPD_CTRLDATA M36
CRT_RED 95 CRT_RED T49 CRT_RED
B B
AT45
CRT
DDPD_AUXN
95 CRT_DDC_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
95 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41
5
6
7
8
DDPD_0N BB43
RN1705 95 CRT_HSYNC M47 BB45
SRN150F-1-GP CRT_HSYNC DDPD_0P
95 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
UMA_PX_Muxless DDPD_1P BE44
DDPD_2N BF42
DAC_IREF_R T43 BE42
4
3
2
1
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42
1
DDPD_3P BG42
R1702
1KR2D-1-GP COUGAR-GP-U2-NF
2
A HR UMA A
Wistron Corporation
Title
PCH (LVDS/CRT/DDI)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1E 5 OF 10
RSVD AY7
Cougar RSVD AV7
BG26 TP1 RSVD AU3
BJ26 TP2
Point RSVD BG4
BH25 TP3
BJ16 TP4 RSVD AT10
RN1801 BG16 BC8
SRN8K2J-2-GP-U TP5 RSVD
D AH38 TP6 D
INT_PIRQH# 1 10 3D3V_S0 AH37 AU2 DMI & FDI Termination Voltage
INT_PIRQB# INT_PIRQD# TP7 RSVD
2 9 AK43 TP8 RSVD AT4
INT_PIRQF# 3 8 INT_PIRQE# AK45 AT3 Set to Vss when LOW
INT_PIRQA# INT_PIRQC# TP9 RSVD
4 7 C18 TP10 RSVD AT1 NV_CLE
3D3V_S0 5 6 USB30_SMI# N30 AY3 Set to Vcc when HIGH
TP11 RSVD
H3 TP12 RSVD AT5
AH12 AV3
NVRAM
TP13 RSVD
AM4
AM5
TP14
TP15
RSVD
RSVD
AV1
BB1 check R1808 R1809
1D8V_S0

Y13 TP16 RSVD BA3
K24 TP17 RSVD BB5
L24 TP18 RSVD BB3
1
AB46 BB7
AB45
TP19 RSVD
BE8 CRB : 2.2K
RSVD
TP20 RSVD R1808
RSVD BD4
RSVD BF6 CEKLT: 1K 2K2R2J-2-GP
2
B21 TP21 RSVD AV5
M20 AY1 NV_CLE NV_CLE 1 2
TP22 DF_TVS H_SNB_IVB# 5
AY16 R1809
TP23 1KR2J-1-GP
A16 swap override Strap/Top-Block BG46 TP24 RSVD AV10
Swap Override jumper
RSVD AT8
PCI_GNT#3 Low = A16 swap RN1803 BE28 AY5

SRN10KJ-5-GP TP25 RSVD
override/Top-Block BC30 TP26 RSVD BA2
Swap Override enabled DGPU_HOLD_RST# 2 3 BE32
DGPU_PWR_EN# TP27
C High = Default 1 4 BJ32
BC28
TP28 RSVD AT12
BF3
USB Ext. port 1 (HS) C
TP29 RSVD
BE30 TP30 External debug port use on Huron river platform
BF32
BG32
AV26
TP31
TP32
TP33
USBP0N
USBP0P
C24
A24
USB_PN0
USB_PP0
66
66
USB Table
BB26 TP34 USBP1N C25 USB_PN1 61
AU28 TP35 USBP1P B25 USB_PP1 61 Pair Device
AY30 TP36 USBP2N C26
AU26 A26 JE40 delete FP function 0 Touch Panel / 3G SIM
TP37 USBP2P
AY26 TP38 USBP3N K28 USB_PN3 63
AV28 TP39 USBP3P H28 USB_PP3 63 1 USB Ext. port 1 (HS)
AW30 TP40 USBP4N E28 USB_PN4 66
USBP4P D28 USB_PP4 66 2 Fingerprint
USBP5N C28 USB_PN5 32
USBP5P A28 USB_PP5 32 SB add USB port 5 3 BLUETOOTH
USBP6N C29
USBP6P B29 4 Mini Card2 (WWAN)
BOOT BIOS Strap INT_PIRQA# K40 N28
INT_PIRQB# PIRQA# USBP7N
K38 M28 5 CARD READER(DY)
PCI
INT_PIRQC# PIRQB# USBP7P
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location H38 PIRQC# USBP8N L30 USB_PN8 82
INT_PIRQD# 6 X
0 0 LPC
G38 PIRQD# USBP8P K30
G30
USB_PP8 82 JE40 co-lay USB2.0
USBP9N USB_PN9 61
C46 E30 7 X
USB
83 DGPU_HOLD_RST# REQ1#/GPIO50 USBP9P USB_PP9 61
0 1 Reserved Do Not Stuff TP1806 1 DGPU_SELECT# C44 C30
REQ2#/GPIO52 USBP10N JE40 delete eDP function
93 DGPU_PWR_EN# E40 REQ3#/GPIO54 USBP10P A30 8 USB Ext. port 4 / E-SATA /USB CHARGER
1 0 Reserved USBP11N L32 USB_PN11 65
D47 GNT1#/GPIO51 USBP11P K32 USB_PP11 65 9 USB Ext. port 2
1 1 SPI(Default) Do Not Stuff TP1804 1 DGPU_PWM_SELECT# E42 G32 USB_PN12 49
GNT2#/GPIO53 USBP12N
B
F46 GNT3#/GPIO55 USBP12P E32 USB_PP12 49 10 EDP CAMERA B
USBP13N C32
R1813 A32 JE40 delete New Card function 11 Mini Card1 (WLAN)
Do Not Stuff INT_PIRQE# USBP13P
G42 PIRQE#/GPIO2
56 SATA_ODD_DA# 1 2 INT_PIRQF# G40 12 CAMERA
PIRQF#/GPIO3 USB_RBIAS
82 USB30_SMI# C42 PIRQG#/GPIO4 USBRBIAS# C33 1 2
INT_PIRQH# D44 R1811 13 New Card
PIRQH#/GPIO5 22D6R2F-L1-GP
USBRBIAS B33
JE40 modify 07/16 K10 PME# 3D3V_S5
5,27,31,36,65,66,71,82,97 PLT_RST# C6 PLTRST# OC0#/GPIO59 A14
OC1#/GPIO40 K20
2
OC2#/GPIO41 B17
71 CLK_PCI_LPC R1804 1 2 22R2J-2-GP CLK_PCI_LPC_R H49 C16 R1820
R1805 CLKOUT_PCI0 OC3#/GPIO42
20 CLK_PCI_FB 1 2 22R2J-2-GP CLK_PCI_FB_R H43 CLKOUT_PCI1 OC4#/GPIO43 L16 10KR2J-3-GP
27 CLK_PCI_KBC R1806 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 A16
CLKOUT_PCI2 OC5#/GPIO9
K42 D14
1
CLKOUT_PCI3 OC6#/GPIO10
H40 CLKOUT_PCI4 OC7#/GPIO14 C14
2
EC1803 EC1802 EC1801

Do Not Stuff
Do Not Stuff
Do Not Stuff
COUGAR-GP-U2-NF
DY DY DY
1
OC[3:0]# for Device 29 (Ports 0-7)

KBC CLK EMI OC[7:4]# for Device 26 (Ports 8-13)
A HR UMA A
Wistron Corporation
Title
PCH (PCI/USB/NVRAM)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 4 DMI_RXN[3:0]

4 DMI_RXP[3:0] FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
4 DMI_TXN[3:0]
4 DMI_TXP[3:0]
PCH1C 3 OF 10
4 DMI_RXN0 BC24 DMI0RXN Cougar FDI_RXN0 BJ14 FDI_TXN0 4

4 DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 4
D
4 DMI_RXN2 BG18
BG20
DMI2RXN Point FDI_RXN2 BE14
BH13
FDI_TXN2 4
D
4 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 4
Signal Routing Guideline: FDI_RXN4 BC12 FDI_TXN4 4
DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 4
4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
routing length less than 500 BJ18
DMI1RXP FDI_RXN6
BG9
4 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 4
mils. 4 DMI_RXP3 BJ20 DMI3RXP
DMI_IRCOMP keep W=4 mils and FDI_RXP0 BG14 FDI_TXP0 4
routing length less than 500 4 DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
4 DMI_TXN1 AW20 DMI1TXN FDI_RXP2 BF14 FDI_TXP2 4
mils. BB18 BG13
4 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 4
AV18 BE12
DMI
FDI
4 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 4
FDI_RXP5 BG12 FDI_TXP5 4
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
4 DMI_TXP2 AY18 DMI2TXP
4 DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
R1901 2 49D9R2F-GP DMI_COMP_R
1 BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
R1926 FDI_LSYNC1 BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as no connect
Do Not Stuff 4.SUSWARN# used as SUSPWRDNACK/GPIO30
1 DY 2 SYS_PWROK
0628 Modify: A18 DSWODVREN R1910
C PWROK Change R1904 to 100K 0402 from 10K and default stuff. DSWVRMEN Do Not Stuff C
1 2
System Power Management

R1904 1 2 PM_RSMRST#
100KR2J-1-GP JE40 modify SUS_PWR_ACK C12 E22 PCH_DPWROK 1 2
SUSACK# DPWROK DY R1911
RTC_AUX_S5
Do Not Stuff
3D3V_S0 1 2 SYS_RESET# K3 B9 PCIE_WAKE# 31,65,66,82
R1905 SYS_RESET# WAKE#
10KR2J-3-GP
36 SYS_PWROK P12 SYS_PWROK CLKRUN#/GPIO32 N3 PM_CLKRUN# 27
27,42 S0_PWR_GOOD 2 1 PWROK L22 G8

R1924 PWROK SUS_STAT#/GPIO61
Do Not Stuff JE40 modify
L10 APWROK SUSCLK/GPIO62 N14 PCH_SUSCLK_KBC 27
DSWODVREN - On Die DSW VR Enable
5,37 PM_DRAM_PWRGD B13 DRAMPWROK SLP_S5#/GPIO63 D10 JE40 modify 07/16 HIGH Enabled (DEFAULT)
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms PM_RSMRST# C21 H4 LOW Disabled
RSMRST# SLP_S4# PM_SLP_S4# 27,46
27 SUS_PWR_ACK K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 PM_SLP_S3# 27,36,37,47,92 RTC_AUX_S5

SB modify
27,97 PM_PWRBTN# E20 PWRBTN# SLP_A# G10
R1917 1 2 330KR2J-L1-GP
B B
27 AC_PRESENT H20 ACPRESENT/GPIO31 SLP_SUS# G16
DSWODVREN R1918 1 2 Do Not Stuff
DY
BATLOW# E10 AP14
BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5
PM_RI# A10 K14

RI# SLP_LAN#/GPIO29
COUGAR-GP-U2-NF
R1919 3D3V_S0
8K2R2J-3-GP
PM_CLKRUN# 1 2
3D3V_S5
RN1901
SRN10KJ-6-GP
8 1 BATLOW#
7 2 PM_RI#
6 3 AC_PRESENT
5 4 SUS_PWR_ACK 3D3V_AUX_S5
R1909
100KR2J-1-GP
R1921 2 1
10KR2J-3-GP
PCIE_WAKE#
2
2 1 PCIE_WAKE#
CRB : 1K R1916
10KR2J-3-GP R1912
A HR UMA A
CEKLT: 10K 1KR2J-1-GP
4 3 PM_RSMRST# 1 2 RSMRST#_KBC 27
1
PWRBTN# Wistron Corporation

3V_5V_POK_# 5 2 3V_5V_POK 41
This signal has an internal pull-up resistor 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
6 1 Q1901 Taipei Hsien 221, Taiwan, R.O.C.
R1908 2N7002KDW-GP
100KR2J-1-GP 84.2N702.A3F Title
PM_RSMRST#
PM_RSMRST# 2nd = 84.DM601.03F
2 1
CRB : PL 10K PCH (DM I/FDI/PM)
ANNIE : PL 100K A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
3D3V_S5
3D3V_S0
SSID = PCH SMB_CLK 4 1 RN2003
1
SMB_DATA 2 SRN2K2J-1-GP
SB R2004
3
10KR2J-3-GP SML0_DATA 3 2 RN2004
PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP
2
BG34 Cougar PEG_CLKREQ#_R SML1_CLK 2 3 RN2005
PERN1 SML1_DATA
BJ34 PERP1 SMBALERT#/GPIO11 E12 EC_SWI# 27 1 4 SRN2K2J-1-GP
1
AV32 PETN1 Point SMB_CLK R2005 PCH_GPIO74
AU32 PETP1 W-WAN SMBCLK H14 1 4 RN2006
D
SMB_DATA
DY Do Not Stuff PCIE_CLK_REQ6# 2 3 SRN10KJ-5-GP D
65 PCIE_RXN2 BE34 PERN2 SMBDATA C9
65 PCIE_RXP2 BF34
2
C2001 PERP2
65 PCIE_TXN2 1 2 SCD1U10V2KX-5GP PCIE_TXN2_C BB32 PETN2 WLAN R2009
C2002 1 2 SCD1U10V2KX-5GP PCIE_TXP2_C AY32 DRAMRST_CNTRL_PCH 1 2
SMBUS
65 PCIE_TXP2 PETP2 1KR2J-1-GP
SML0ALERT#/GPIO60 A12 DRAMRST_CNTRL_PCH 37
BG36 3D3V_S0 RN2007
BJ36
PERN3
PERP3 SML0CLK C8 SML0_CLK SRN2K2J-1-GP CRB : 1K
AV34 PETN3 Card Reader JE40 delete XDP function 1 4
AU34 PETP3 SML0DATA G12 SML0_DATA 2 3 CEKLT: 10K
31 PCIE_RXN4 BF36 PERN4
31 PCIE_RXP4 BE36 PERP4
C2005 2 SCD1U10V2KX-5GP PCIE_TXN4_C PCH_GPIO74
31 PCIE_TXN4 C2006
1
1 2 SCD1U10V2KX-5GP PCIE_TXP4_C
AY34
BB34
PETN4 LAN SML1ALERT#/PCHHOT#/GPIO74 C13
31 PCIE_TXP4 PETP4
E14
PCI-E*
SML1CLK/GPIO58 SML1_CLK 27,86
82 PCIE_RXN5 BG37 PERN5
BH37 M16 SMB_DATA 6 1
82 PCIE_RXP5 PERP5 SML1DATA/GPIO75 SML1_DATA 27,86 PCH_SMBDATA 14,15
C2009 2 SCD1U10V2KX-5GP PCIE_TXN5_C
82 PCIE_TXN5 C2010
1
1 2 SCD1U10V2KX-5GP PCIE_TXP5_C
AY36
BB36
PETN5 USB3.0 5 2
82 PCIE_TXP5 PETP5 Q2001
BJ38 2N7002KDW-GP 4 3
PERN6
BG38 84.2N702.A3F
Controller
PERP6
AU36 PETN6 Intel GBE LAN CL_CLK1 M7 2nd = 84.DM601.03F
AV36 PETP6
Link
JE40 modify PCH_SMBCLK 14,15
BG40 PERN7 CL_DATA1 T11
BJ40 SMB_CLK
PERP7
C
AY40
BB40
PETN7 Dock P10 C
PETP7 CL_RST1#
For DIS_PX mode or MXM mode.
BE38 PERN8
BC38 NEW CARD R2008 and C2008 CO-LAY
JE40 delete New Card function AW38
PERP8 C2008
PETN8 SC12P50V2JN-3GP
AY38 PETP8 XTAL25_IN 2 1
PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ#_R 1 R2003 2 PEG_CLKREQ# 83
2
Y40 Do Not Stuff X2001
CLKOUT_PCIE0N
WWAN CLK Y39 R2006 XTAL-25MHZ-102-GP
CLKOUT_PCIE0P CLKOUT_PEG_A_N 1M1R2J-GP
CLKOUT_PEG_A_N AB37 2 3 CLK_PCIE_VGA# 83 82.30020.851
CLOCKS
CLK_PCIE_WWAN_REQ# J2 AB38 CLKOUT_PEG_A_P 1 4 CLK_PCIE_VGA 83 2nd = 82.30020.791
1
RN2012 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P
1
SRN0J-6-GP RN2016 XTAL25_OUT 2 1
WLAN CLK 65 CLK_PCIE_WLAN# 2 3 CLK_PCH_SRC1_N AB49 AV22 CLK_EXP_N 5 SRN0J-6-GP
CLK_PCH_SRC1_P AB47 CLKOUT_PCIE1N CLKOUT_DMI_N C2007
65 CLK_PCIE_WLAN 1 4 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_EXP_P 5
SC12P50V2JN-3GP
65 CLK_PCIE_WLAN_REQ# M1 PCIECLKRQ1#/GPIO18
CLKOUT_DP_N AM12
CLKOUT_DP_P AM13
AA48 3D3V_S0 3D3V_S0
CLKOUT_PCIE2N
AA47 CLKOUT_PCIE2P
UMA_DISCRETE#
BF18 CLK_BUF_EXP_N UMA: 1 1
CLKIN_DMI_N
1
PCIE_CLK_RQ2# V10 BE18 CLK_BUF_EXP_P
RN2014 PCIECLKRQ2#/GPIO20 CLKIN_DMI_P R2012 R2013 DIS :0 1
SG(PX) : 0 0
10KR2J-3-GP
10KR2J-3-GP
SRN0J-6-GP UMA_Muxless DIS_UMA
LAN CLK 31 CLK_PCIE_LAN# 2 3 CLK_PCH_SRC3_N Y37 BJ30 CLK_BUF_CPYCLK_N 2 3 Optimus(Muxless) : 1 0
CLK_PCH_SRC3_P CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_CPYCLK_P
31 CLK_PCIE_LAN 1 4 Y36 BG30 1 4
2
CLKOUT_PCIE3P CLKIN_GND1_P
B UMA_DIS# 22 B
31 PCIE_CLK_LAN_RQ# A8 RN2008 DGPU_PRSNT#
RN2013 PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N SRN10KJ-5-GP
CLKIN_DOT_96N G24
1
SRN0J-6-GP E24 CLK_BUF_DOT96_P
CLKIN_DOT_96P
USB3.0 CLK 2 3 CLK_PCH_SRC4_N Y43 R2010 R2011
82 CLK_PCIE_USB3# CLKOUT_PCIE4N
Do Not Stuff
Do Not Stuff
1 4 CLK_PCH_SRC4_P Y45 DIS_PX PX_Muxless
82 CLK_PCIE_USB3 CLKOUT_PCIE4P CLK_BUF_CKSSCD_N
CLKIN_SATA_N AK7
82 USB3_PEGB_CLKREQ# L12 AK5 CLK_BUF_CKSSCD_P
2
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
3D3V_S5 RN2001
V45 K45 CLK_BUF_REF14 SRN10KJ-6-GP
3D3V_S0 RN2018 CLKOUT_PCIE5N REFCLK14IN
V46 CLKOUT_PCIE5P 1 8 PCIE_CLK_LAN_RQ#
SRN10KJ-5-GP 2 7
1 4 PCIE_CLK_RQ2# PCIE_CLK_REQ5# L14 PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK H45 CLK_PCI_FB 18 3 6 CLK_PCIE_WWAN_REQ#
2 3 CLK_PCIE_WLAN_REQ# 4 5 USB3_PEGB_CLKREQ#
AB42 V47 XTAL25_IN RN2009

CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT SRN10KJ-L3-GP
PCIECLKRQ1# and PCIECLKRQ2# AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
CLK_BUF_REF14 1 10
Support S0 power only PEG_B_CLKRQ# E6 PEG_B_CLKRQ#/GPIO56
CLK_BUF_CKSSCD_P
CLK_BUF_CKSSCD_N
2 9 CLK_BUF_EXP_P
CLK_BUF_EXP_N
RN2002
SRN10KJ-6-GP
3 8
XCLK_RCOMP Y47 XCLK_RCOMP 1 2 1D05V_VTT 4 7 CLK_BUF_DOT96_N 1 8 PCIE_CLK_REQ5#
V40 R2007 5 6 CLK_BUF_DOT96_P 2 7 CLK_PCIE_NEW_REQ#
CLKOUT_PCIE6N 90D9R2F-1-GP
V42 CLKOUT_PCIE6P 3 6 PEG_B_CLKRQ#
4 5 EC_SWI#
PCIE_CLK_REQ6# T13 need very close to PCH
PCIECLKRQ6#/GPIO45
V38 K43
V37
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 RTS
FLEX CLOCKS
CLKOUT_PCIE7P CLK_48_USB30
A CLKOUTFLEX1/GPIO65 F47 1 2 48MHZ_OUT 32 HR UMA A
CLK_PCIE_NEW_REQ# K12 R2002
PCIECLKRQ7#/GPIO46 Do Not Stuff
CLKOUTFLEX2/GPIO66 H47
CLK_48_USB30
AK14
AK13
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 K49 DGPU_PRSNT# Wistron Corporation
Do Not Stuff
1
RFC2001 Taipei Hsien 221, Taiwan, R.O.C.
COUGAR-GP-U2-NF SB
DY Title
2
Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3 PCH (PCI-E/SMBUS/CLOCK/CL)
Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2 A3
if more than 2 PCI clocks + PCI loopback are routed. JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH RTC_AUX_S5
RTC_X1 2 3 INTVRMEN- Integrated SUS

1 4 1.05V VRM Enable
1 2 RTC_X2
1
R2101 10MR2J-L-GP RN2104 C2103 High - Enable internal VRs
SRN20KJ-GP-U SC1U6D3V2KX-GP Low - Enable external VRs
X2101
2
X-32D768KHZ-34GPU
82.30001.661
D 2nd = 82.30001.B21 PCH1A 1 OF 10 D
LPC_AD[0..3] 27,71
RTC_X1 LPC_AD0
1 4
SB SEIKO suggest modify to 5P A20 RTCX1 Cougar FWH0/LAD0 C38
A38 LPC_AD1
FWH1/LAD1
LPC
C2101
EPSON suggest modifyg to 6P RTC_X2 C20 RTCX2 Point FWH2/LAD2 B37 LPC_AD2
1
1
C37 LPC_AD3
FWH3/LAD3
SC5P50V2CN-2GP
2 3 C2102 RTC_RST# D20

SC5P50V2CN-2GP RTCRST#
D36 LPC_FRAME# 27,71
2
2 FWH4/LFRAME#
2
1M1R2J-GP SRTC_RST# G22 SRTCRST#
1
C2104 G2101 R2104 E36
LDRQ0#
RTC
SC1U6D3V2KX-GP Do Not Stuff 2 1 SM_INTRUDER# K22 K36
INTRUDER# LDRQ1#/GPIO23
2
RTC_AUX_S5 1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27
1
INTVRMEN SERIRQ
-1M
R2105
R2122 330KR2F-L-GP AM3 SATA_RXN0 56
33R2J-2-GP HDA_BITCLK SATA0RXN
N34 AM1
HDA_SYNC RTC Reset HDA_BCLK SATA0RXP SATA_RXP0 56
HDD1
SATA 6G
29 HDA_CODEC_SYNC 2 DY 1 SATA0TXN AP7 SATA_TXN0 56
2 1 HDA_SDOUT HDA_SYNC L34 AP5 SATA_TXP0 56
29 HDA_CODEC_SDOUT R2123 HDA_SYNC SATA0TXP
33R2J-2-GP T10 AM10
HDA_RST#
29 HDA_SPKR
HDA_RST#
SPKR SATA1RXN
SATA1RXP AM8 HDD2
29 HDA_CODEC_RST# 1 4 K34 HDA_RST# SATA1TXN AP11
2 3 HDA_BITCLK AP10
29 HDA_CODEC_BITCLK SATA1TXP
RN2102 29 HDA_SDIN0 E34 AD7
SRN33J-5-GP-U HDA_SDIN0 SATA2RXN
SATA2RXP AD5
G34 HDA_SDIN1 SATA2TXN AH5
SATA2TXP AH4
C C34 C
HDA_SDIN2
IHDA
AB8
??????
SATA3RXN
A34 HDA_SDIN3 SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
Flash Descriptor Security Overide 27 ME_UNLOCK 1 R2107 2 HDA_SDOUT A36 HDA_SDO
1KR2J-1-GP
SATA
SATA4RXN Y7 SATA_RXN4 56
Low = Default Y5
HDA_SDOUT High = Enable C36 HDA_DOCK_EN#/GPIO33
SATA4RXP
SATA4TXN AD3
SATA_RXP4
SATA_TXN4
56
56 ODD
SATA4TXP AD1 SATA_TXP4 56
+3VS_+1.5VS_HDA_IO N32 HDA_DOCK_RST#/GPIO13
Y3
1
DY 2 HDA_SDOUT R2121 SATA5RXN
Y1
R2102
4K7R2J-2-GP
PCH_JTAG_TCK_BUF
SATA5RXP
SATA5TXN AB3 ESATA
2 1 J3 JTAG_TCK SATA5TXP AB1
Do Not Stuff
H7 Y11 1D05V_VTT
JTAG_TMS SATAICOMPO
JTAG
No Reboot Strap K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
JE40 modify JTAG_TDI SATAICOMPI
Low = Default H1 1D05V_VTT
JTAG_TDO
HDA_SPKR High = No Reboot SATA3RCOMPO AB12
AB13 SATA3_COMP R2113 1 2 49D9R2F-GP

R2108 SATA3COMPI
33R2J-2-GP
27,60 SPI_CLK_R 1 2 PCH_SPI_CLK T3 SPI_CLK SATA3RBIAS AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP
PLL ODVR VOLTAGE
27,60 SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14
B R2109 SPI_CS0# B
Low = 1.8V (Default)
HDA_SYNC 33R2J-2-GP T1
+3VS_+1.5VS_HDA_IO High = 1.5V SPI_CS1#
SPI
R2103 P3 SATA_LED# 68
1KR2J-1-GP SATALED#
1 2 HDA_SYNC 27,60 SPI_SI_R 1 2 PCH_SPI_SI V4 V14 SATA_DET#0
R2110 33R2J-2-GP SPI_MOSI SATA0GP/GPIO21
This signal has a weak internal pull down. 27,60 SPI_SO_R U3 SPI_MISO SATA1GP/GPIO19 P1
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low. COUGAR-GP-U2-NF 3D3V_S0
Needs to be pulled High for Huron River platform. RN2103
co-operate with R2310 SRN10KJ-6-GP
22 PSW_CLR# 1 8
HDA_CODEC_BITCLK HDA_CODEC_SDOUT SPI_CS0#_R SATA_LED# 2 7
INT_SERIRQ 3 6
2
SATA_DET#0 4 5
EC2102 EC2103 EC2101
DY DY DY
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
-1M
5V_S0 -1M
R2124
G Do Not Stuff
D HDA_SYNC_R 1 2 HDA_SYNC
HDA_CODEC_SYNC S
A HR UMA A
Q2101
Do Not Stuff HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
Do Not Stuff
2ND = 84.2N702.031 sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this Wistron Corporation
signal on the board. Signal may have leakage paths via powered off devices (Audio Taipei Hsien 221, Taiwan, R.O.C.
Codec) and hence contend with the external pull-up. A blocking FET is
Title
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete. PCH (SPI/RTC/LPC/SATA/IHDA)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
3D3V_S0
RN2203 Note:
SRN10KJ-5-GP
1 4 H_RCIN#
For PCH debug with XDP, need to NO STUFF R2218
PCH1F 6 OF 10 SB add Zero ODD function
2 3 H_A20GATE
S_GPIO T7 C40
BMBUSY#/GPIO0 Cougar TACH4/GPIO68 SATA_ODD_PWRGT 56
GPIO27 has a weak[20K] internal pull up. EC_SMI# A42 Point B41 UMA_DIS# 20
TACH1/GPIO1 TACH5/GPIO69
To enable on-die PLL Voltage regurator,
DGPU_HPD_INTR# H36 C41 VRAM_SIZE1
should not place external pull down. TACH2/GPIO6 TACH6/GPIO70
D D
27 EC_SCI# E38 TACH3/GPIO7 TACH7/GPIO71 A40 VRAM_SIZE2
ICC_EN# C10 GPIO8

PCH_GPIO12 C4
56 SATA_ODD_PRSNT# LAN_PHY_PWR_CTRL/GPIO12
3D3V_S0 PCH_GPIO15 G2 P4
3D3V_S0 GPIO15 A20GATE H_A20GATE 27
R2202
R2220 10KR2J-3-GP AU16 H_PECI_R 1 R2203 2
DY
CPU/MISC
PECI H_PECI 5,27
1 2 FFS_INT2_R 1 2 SATA_ODD_PRSNT# U2
SATA4GP/GPIO16
Do Not Stuff
10KR2J-3-GP P5 H_RCIN# 27
RCIN#
GPIO
RN2205
92,93 DGPU_PWROK D40 TACH0/GPIO17 PROCPWRGD AY11 H_CPUPWRGD 5,36,97
Do Not Stuff SB
PCH_GPIO22 T5 AY10 PCH_THERMTRIP_R 1 4 1D05V_VTT
0806 delete TP2202, TP2203 SCLOCK/GPIO22 THRMTRIP#
Do Not Stuff TP2202 PCH_GPIO24
2 DY 3
1 E8 GPIO24/MEM_LED INIT3_3V# T14
Do Not Stuff TP2203 1 PCH_GPIO27 E16 GPIO27 PCH_THERMTRIP_R

INTERNAL GFX EXTERNAL GFX 1 2 H_THERMTRIP# 5,36
PLL_ODVR_EN P8 R2204
GPIO28 54D9R2F-L1-GP
R2205 DY 10K TS_VSS1 AH8
21 PSW_CLR# K1 STP_PCI#/GPIO34
TS_VSS2 AK11
R2206 100K DY JE40 delete FP function FP_DET# K4 GPIO35
2
TS_VSS3 AH10
G2201 DMI_OVRVLTG V8 SATA2GP/GPIO36
C
Do Not Stuff
FDI_OVRVLTG M5
TS_VSS4 AK10 SB check different , check need modify or not C
GFX_CRB_DET Pass Word Clear SATA3GP/GPIO37
P37 check intel , R2204
1
MFG_MODE NC_1
N2 SLOAD/GPIO38
1
R2206 GFX_CRB_DET M3 TS Signal Disable Guideline:

100KR2J-1-GP SDATAOUT0/GPIO39
FFS_INT2_R TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
JE40 delete G Sensor V13 SDATAOUT1/GPIO48 NCTF_VSS#BG2 BG2
should not float on the motherboard. They should
2
3D3V_S0 V3 BG48
27 PCH_TEMP_ALERT# SATA5GP/GPIO49 NCTF_VSS#BG48
RN2201 be tied to GND directly.
SRN10KJ-6-GP Do Not Stuff TP2210 1 USB3_PWR_ON D6 BH3
EC_SMI# GPIO57 NCTF_VSS#BH3
1 8
DGPU_HPD_INTR# 2 7 BH47 FDI_OVRVLTG
EC_SCI# NCTF_VSS#BH47
3 6 FDI TERMINATION VOLTAGE OVERRIDE
1
4 5 Do Not Stuff TP2206 1 PCH_NCTF_1 A4 BJ4
NCTF_VSS#A4 NCTF_VSS#BJ4 R2208
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
A44 BJ44 10KR2J-3-GP
RN2202 NCTF_VSS#A44 NCTF_VSS#BJ44
GPIO37 LOW - Tx, Rx terminated to same voltage
SRN10KJ-6-GP A45 BJ45 (FDI_OVRVLTG) (DC Coupling Model DEFAULT)
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
2
MFG_MODE NCTF_VSS#A45 NCTF_VSS#BJ45
1 8
NCTF
FP_DET# 2 7 Do Not Stuff TP2208 1 PCH_NCTF_3 A46 BJ46
NCTF TEST PIN:

S_GPIO NCTF_VSS#A46 NCTF_VSS#BJ46
3 6
PCH_TEMP_ALERT# 4 5 A5 BJ5
NCTF_VSS#A5 NCTF_VSS#BJ5 DMI_OVRVLTG
A6 NCTF_VSS#A6 NCTF_VSS#BJ6 BJ6 DMI TERMINATION VOLTAGE OVERRIDE
1
3D3V_S5 B3 C2 R2210
RN2204 NCTF_VSS#B3 NCTF_VSS#C2 10KR2J-3-GP
SRN10KJ-6-GP B47 C48 GPIO36 LOW - Tx, Rx terminated to same voltage
B USB3_PWR_ON NCTF_VSS#B47 NCTF_VSS#C48 B
8 1 (DMI_OVRVLTG) (DC Coupling Model DEFAULT)
2
PCH_GPIO12 7 2 BD1 D1
PCH_GPIO24 NCTF_VSS#BD1 NCTF_VSS#D1
6 3
D1,D49,E1,E49,F1,F49
5 4 BD49 NCTF_VSS#BD49 NCTF_VSS#D49 D49
BE1 NCTF_VSS#BE1 NCTF_VSS#E1 E1 Integrated Clock Enable functionality is achieved

BE49 E49
via soft-strap. The default is integrated clock
PCH_GPIO15 NCTF_VSS#BE49 NCTF_VSS#E49 enable.
1 R2201 2
1KR2J-1-GP Do Not Stuff TP2207 1 PCH_NCTF_2 BF1 F1
NCTF_VSS#BF1 NCTF_VSS#F1
Do Not Stuff TP2209 1 PCH_NCTF_4 BF49 F49 ICC_EN#
NCTF_VSS#BF49 NCTF_VSS#F49
Integrated Clock Chip Enable
1
COUGAR-GP-U2-NF R2211
SB VRAM Frequency VRAM Size 1KR2J-1-GP ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
Pull high: 800MHZ
2
3D3V_S0 Pull low :900MHZ 3D3V_S0 LOW (R2211)- ENABLED
GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
1
R2218 R2214 R2216 via soft-strap. The default is integrated clock

10KR2J-3-GP 2G 1G enable.
2 Stuff
2 Stuff
2
Do Not
Do Not
UMA_VRAM800MHZ PLL_ODVR_EN
A HR UMA A
VRAM_SIZE1 PLL ON DIE VR ENABLE
1
PCH_GPIO22 VRAM_SIZE2
R2212
NOTE:This signal has a weak internal pull-up 20K Wistron Corporation
1
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT DY Do Not Stuff

R2219 R2215 R2217 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
10KR2J-3-GP DISABLED -- LOW (R2212 STUFFED) Taipei Hsien 221, Taiwan, R.O.C.
2 Stuff
2 Stuff
2
1G_512M 512M_2G Title
2
Do Not
Do Not
VRAM900MHZ PCH (GPIO/CPU)

A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 6A
R2301 3D3V_S0
Do Not Stuff U2301 for ANNIE flicker issue
1 DIS 2
R2312 for don't flicker solution
1D05V_VTT
PCH1G POWER 7 OF 10 (0.1uF/0.01uF x1)
3D3V_DAC_S0
(10uF x1_0603) 3.3V CRT LDO
1.3A Cougar
AA23 U48 +VCCA_DAC_1_2 1 R2315 2
(1uFx3) AC23
VCCCORE
VCCCORE
Point VCCADAC Do Not Stuff U2301
1
CRT
(10uFx1_0603) AD21 C2313 C2314 C2315 G9091-330T11U-GP
VCCCORE
1
5V_S0
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
Do Not Stuff
D C2301 C2302 C2303 C2304 AD23 U47 DY 74.09091.J3F D
VCCCORE VSSADAC 3D3V_DAC_S0
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VCC CORE
AF21 2nd = 74.09198.G7F
2
VCCCORE
AF23
2
VCCCORE R2304 3D3V_S0
AG21 VCCCORE UMA_PX_Muxless UMA_PX_Muxless 1 VIN VOUT 5
AG23 0R3J-0-U-GP 2
VCCCORE GND
1
AG24 AK36 +3VS_VCCA_LVDS 0.001A 2 1 3 4 C2312 C2327
VCCCORE VCCALVDS EN NC#4
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
AG26 VCCCORE UMA_PX_Muxless
1
AG27 AK37 1 DIS 2 C2311
2
VCCCORE VSSALVDS
SC1U10V2KX-1GP
AG29 VCCCORE R2303
UMA_PX_Muxless
AJ23
LVDS
2
VCCCORE Do Not Stuff
AJ26 VCCCORE VCCTX_LVDS AM37 UMA_PX_Muxless UMA_PX_Muxless
AJ27 VCCCORE
AJ29 AM38 R2305 1D8V_S0
VCCCORE VCCTX_LVDS 0R5J-5-GP
AJ31 VCCCORE 0.06A +1.8VS_VCCTX_LVDS
VCCTX_LVDS AP36 1 2
1D05V_VTT UMA_PX_Muxless SB add C2327
2
AP37 C2316 C2317 C2318
VCCTX_LVDS
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
Do Not Stuff
AN19 R2309 DY (0.01uF x2)
VCCIO Do Not Stuff
JE40 modify 07/16 DIS (22uF x1) -1M add LDO for VCCVRM_S0
1
JE40 modify BJ22
1
1D05V_VTT VCCAPLLEXP
UMA_PX_MuxlessUMA_PX_Muxless
3D3V_S0 1D5V_S0 VCCVRM_S0
2.925A(Total current of VCCIO) V33
HVCMOS
VCC3_3
AN16 VCCIO
(1uF x4) 3D3V_S0
1
1
SC22P50V2JN-4GP
C2306 C2307 C2308 C2309 AN17 U2302
VCCIO
1
Do Not Stuff
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY V34 G913CF-GP C2330 R2316
VCC3_3
74.00913.A3F DY DY 2K8R2F-GP
2
1
AN21 C2319 -2 modify power net name
2
C VCCIO SCD1U10V2KX-5GP C
1 5
2
VCCVRM_S0 SHDN# SET
AN26 2
2
VCCIO GND
3 IN OUT 4
1
AN27 VCCIO VCCVRM AT16
1
1D05V_VTT
SCD1U10V2KX-5GP
AP21 DY C2331 DY R2317
VCCIO C2328 C2329 10KR2J-3-GP
DY DY DY
AP23 AT20 JE40 modify (1uF x1) SC1U10V3KX-3GP SC4D7U6D3V3KX-GP
2
VCCIO VCCDMI
DMI
1
AP24 C2320
VCCIO
VCCIO SC1U6D3V2KX-GP
AP26 AB36
2
VCCIO VCCCLKDMI
L2303 1D05V_VTT
AT24 VCCIO 0.02A IND-10UH-218-GP
+1.05VS_VCC_DMI_CCI 1 2 Vout=1.25*(1+R1/R2)
AN33 VCCIO 68.10050.10Y
1
C2321 C2325 2nd = 68.10090.10B (1uFx1)
SC1U6D3V2KX-GP
Do Not Stuff
AN34 VCCIO VccDFTERM AG16 DY (10uFx1)
3D3V_S0
0.266A (Totally VCC3_3 current)
2
NAND / SPI
BH29 VCC3_3 VccDFTERM AG17
(0.1uF x1) Refer to NPCE795 shared SPI flash architecture
1
C2310
SCD1U10V2KX-5GP AJ16
VccDFTERM 1D8V_S0
0.159A(Totally current of VCCVRM) -2 modify power net name
2
VCCVRM_S0 AP16 VCCVRM 0.19A JE40 modify

VccDFTERM AJ17
1
B C2326 C2322 B
BG6 VCCAFDIPLL
0806 check VCCAFDIPLL SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2
1D05V_VTT AP17 VCCIO
FDI
VCCSPI V1
1D05V_VTT AU20 VCCDMI 0.02A

0.042A (Totally current of VCCDMI) JE40 modify
3D3V_S5
1
COUGAR-GP-U2-NF C2323 (1uFx1) SB suggest delete 3D3V_S0, R2313
SC1U6D3V2KX-GP
SPI only support 3D3V_S5
2 The same BIOS SPI ROM power
A HR UMA A
Wistron Corporation
Title
PCH (POWER1)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
JE40 modify 07/16

SSID = PCH PCH1J POWER 10 OF 10 1D05V_VTT
JE40 modify AD49

VCCACLK Cougar VCCIO N26
(1uFx1)
1
(0.1uFx1)
0.002A Point VCCIO P26 C2423
SC1U6D3V2KX-GP
3D3V_S5 T16 VCCDSW3_3
P28 JE40 modify 07/16
2
VCCIO
(10uFx1)
(1uFx1) JE40 modify V12 T27
3D3V_S0 DCPSUSBYP VCCIO 3D3V_S5 5V_S5
D
VCCIO T29 D
JE40 modify T38 3D3V_S5 D2401
VCC3_3
2
0.097A (Totally current of VCCSUS3_3) Do Not Stuff
1
C2402 T23 DY Do Not Stuff
SC1U10V2KX-1GP JE40 modify BH23 VCCSUS3_3
VCCAPLLDMI2
(0.1uFx1) 2nd = 83.R2004.B8F
1
T24 C2424
2
VCCSUS3_3 SCD1U10V2KX-5GP
1D05V_VTT (10uFx1) AL29
1
VCCIO
V23 1 2
USB
2
VCCSUS3_3 R2408
JE40 modify AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
DCPSUS VCCSUS3_3
1
C2426
P24 SCD1U10V2KX-5GP
VCCSUS3_3
(0.1uFx1)
2
1
AA19 C2425
VCCASW SCD1U10V2KX-5GP
VCCIO T26 1D05V_VTT
AA21
2
VCCASW
+5VA_PCH_VCC5REFSUS
0.001A
AA24 VCCASW V5REF_SUS M26
3D3V_S0 5V_S0
Clock and Miscellaneous

AA26 VCCASW
AN23 JE40 modify
1D05V_VTT DCPSUS D2402
AA27 VCCASW
2
JE40 modify Do Not Stuff
1.01A (Total current of VCCASW) VCCSUS3_3 AN24 3D3V_S5
AA29 VCCASW DY Do Not Stuff
2nd = 83.R2004.B8F
AA31 VCCASW
1
1
C2403 C2404 C2406 C2407 C2408 0.001A
1
DY AC26 P34 +5VS_PCH_VCC5REF 1 2 (1uFx1)
VCCASW V5REF R2407
2
2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Do Not Stuff
C AC27 10R2J-2-GP C
VCCASW
1
N20 3D3V_S5 C2427
PCI/GPIO/LPC
VCCSUS3_3 SC1U10V2KX-1GP
AC29 VCCASW
(1uFx1) JE40 modify 07/16
N22 JE40 modify
2
VCCSUS3_3
AC31 VCCASW
1
P20 C2428
VCCSUS3_3 SC1U6D3V2KX-GP
AD29 VCCASW
P22
2
VCCSUS3_3
(1uFx1) AD31 VCCASW
1D05V_VTT (220uFx1) (22uFx2_0603)
L2402
0.08A 3D3V_S0 R2414
(1uFx3) W21 VCCASW VCC3_3 AA16
IND-10UH-218-GP Do Not Stuff
1 2 +1.05VS_VCCA_A_DPL W23 W16 (0.1uFx2) 3D3V_S5 1 2 1D5V_S5
VCCASW VCC3_3
68.10050.10Y DY
1
1
2nd = 68.10090.10B C2409 W24 T34 C2430 C2431
SC1U6D3V2KX-GP VCCASW VCC3_3 SCD1U10V2KX-5GP SCD1U10V2KX-5GP R2402
W26 DY Do Not Stuff
2
2
VCCASW
W29 3D3V_S0
2
L2403 VCCASW
0.08A (1uFx1)
IND-10UH-218-GP (220uFx1) W31 AJ2 (0.1uFx1)
+1.05VS_VCCA_B_DPL VCCASW VCC3_3
1 2
1
68.10050.10Y W33 C2429
VCCASW
1
2nd = 68.10090.10B C2410 0.16A (Totally current of VCCVRM AF13 SCD1U10V2KX-5GP U2401
SC1U6D3V2KX-GP VCCIO Do Not Stuff
2
+VCCRTCEXT N16 3D3V_S5 Do Not Stuff 1D5V_S5
2
DCPRTC 1D05V_VTT
VCCIO AH13
1
C2411 -1M 1 DY VOUT 5

SCD1U10V2KX-5GP VIN
(0.1uFx1) VCCVRM_S0 Y49 VCCVRM VCCIO AH14 (1uFx1) 2 GND
1
B C2416 C2405 B
3 4
2
EN NC#4
1
C2432 DY DY
Do Not Stuff
Do Not Stuff
AF14 SC1U6D3V2KX-GP C2436
2
+1.05VS_VCCA_A_DPL VCCIO
BD47 DY
SATA
2
VCCADPLLA
Do Not Stuff
AK1
2
+1.05VS_VCCA_B_DPL VCCAPLLSATA JE40 modify
BF47 VCCADPLLB
C2412
-1M modify power net name
JE40 modify 07/16 SC1U6D3V2KX-GP JE40 modify VCCVRM AF11 VCCVRM_S0
1D05V_VTT AF17 VCCIO
1D05V_VTT 1 2 (1uFx1) AF33 VCCDIFFCLKN
AF34 VCCDIFFCLKN VCCIO AC16
(1uFx1) 0.055A AG34 VCCDIFFCLKN
AC17 1D05V_VTT
VCCIO
1
C2414 C2413 0.095A

SC1U6D3V2KX-GP 1D05V_VTT SC1U6D3V2KX-GP JE40 modify AG33 AD17 JE40 modify (1uFx1) JE40 modify 07/16
VCCSSC VCCIO
1 2 (1uFx1) -1M
2
1
C2435 +3VS_+1.5VS_HDA_IO
2 1 +VCCSST V16 SC1U6D3V2KX-GP
DCPSST 1D05V_VTT
(0.1uFx1)
2
C2415 1 2 3D3V_S5
SCD1U10V2KX-5GP T17 T21 R2409 Do Not Stuff
JE40 modify DCPSUS VCCASW
(1uFx1) V19
MISC
DCPSUS
1 DY 2 1D5V_S0
1D05V_VTT V21 R2415 Do Not Stuff
VCCASW
0.001A
CPU
BJ8 V_PROC_IO 1 DY 2 1D5V_S5

(0.1uFx2) T19 R2413 Do Not Stuff
VCCASW
1
(4.7uFx1_0603) C2417 C2418 C2419

+3VS_+1.5VS_HDA_IO
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
Do Not Stuff
A DY HR UMA A
0.01A
2
RTC
A22 P32
HDA
RTC_AUX_S5 VCCRTC VCCSUSHDA

(0.1uFx1)
Wistron Corporation
1
6uA C2433
COUGAR-GP-U2-NF SCD1U10V2KX-5GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
(0.1uFx2)
1
(1uFx1) Title
C2420
SC1U6D3V2KX-GP PCH (POWER2)
2

A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH PCH1I 9 OF 10
AY4
AY42
VSS Cougar VSS H46
K18
VSS VSS
AY46 VSS Point VSS K26
AY8 VSS VSS K39
B11 VSS VSS K46
B15 VSS VSS K7
B19 VSS VSS L18
B23 VSS VSS L2
B27 VSS VSS L20
D B31 VSS VSS L26 D
PCH1H 8 OF 10 B35 L28
VSS VSS
H5 VSS B39 VSS VSS L36
AA17
Cougar AK38
B7
F45
VSS VSS L48
M12
VSS VSS VSS VSS
AA2 VSS Point VSS AK4 BB12 VSS VSS P16
AA3 VSS VSS AK42 BB16 VSS VSS M18
AB11 VSS VSS AL16 BB24 VSS VSS M30
AB7 VSS VSS AL26 BC14 VSS VSS M46
AC19 VSS VSS AL27 BC18 VSS VSS M8
AC2 VSS VSS AL31 BC2 VSS VSS N18
AC21 VSS VSS AL33 BC22 VSS VSS P30
AC24 VSS VSS AL34 BC26 VSS VSS N47
AC33 VSS VSS AL48 BC32 VSS VSS P11
AC34 VSS VSS AM11 BC34 VSS VSS P18
AC48 VSS VSS AM14 BC36 VSS VSS T33
AD10 VSS VSS AM36 BC40 VSS VSS P40
AD13 VSS VSS AM45 BD46 VSS VSS P7
AD19 VSS VSS AM46 BD5 VSS VSS R2
AD24 VSS VSS AM7 BE22 VSS VSS R48
C AD26 AN2 BE26 T12 C
VSS VSS VSS VSS
AD27 VSS VSS AN29 BE40 VSS VSS T31
AD33 VSS VSS AN3 BF10 VSS VSS T37
AD34 VSS VSS AN31 BF12 VSS VSS T4
AD36 VSS VSS AP12 BF16 VSS VSS W34
AD37 VSS VSS AP19 BF20 VSS VSS T46
AD4 VSS VSS AP32 BF26 VSS VSS V11
AD42 VSS VSS AP4 BD3 VSS VSS V26
AD8 VSS VSS AR2 BF8 VSS VSS V36
AE2 VSS VSS AR48 BG17 VSS VSS V39
AE3 VSS VSS AT11 BG21 VSS VSS V43
AF10 VSS VSS AT13 BG33 VSS VSS V7
AF12 VSS VSS AT18 BG44 VSS VSS W17
AD14 VSS VSS AT22 BG8 VSS VSS W19
AD16 VSS VSS AT26 BH11 VSS VSS W2
AF16 VSS VSS AT28 BH15 VSS VSS W27
AF19 VSS VSS AT30 BH17 VSS VSS W48
AF24 VSS VSS AT32 BH19 VSS VSS Y12
AF26 VSS VSS AT34 H10 VSS VSS Y38
B B
AF4 VSS VSS AU24 BH39 VSS VSS BG29
AF42 VSS VSS AU30 BH43 VSS VSS N24
AF46 VSS VSS AV16 BH7 VSS VSS AJ3
AF5 VSS VSS AV20 D3 VSS VSS AD47
AF7 VSS VSS AV24 D12 VSS VSS B43
AF8 VSS VSS AV30 D16 VSS VSS BE10
AG19 VSS VSS AV38 D18 VSS VSS BG41
AG2 VSS VSS AV4 D22 VSS VSS G14
AG31 VSS VSS AV43 D24 VSS VSS H16
AG48 VSS VSS AV8 D26 VSS VSS T36
AH11 VSS VSS AW14 D30 VSS VSS BG22
AH3 VSS VSS AW18 D32 VSS VSS BG24
AH36 VSS VSS AW2 D34 VSS VSS C22
AH39 VSS VSS AW22 D38 VSS VSS AP13
AH40 VSS VSS AW26 D42 VSS VSS M14
AH42 VSS VSS AW28 D8 VSS VSS AP3
AH46 VSS VSS AW32 E18 VSS VSS AP1
AH7 VSS VSS AW34 E26 VSS VSS BE16
AJ19 VSS VSS AW36 G18 VSS VSS BC16
AJ21 VSS VSS AW40 G20 VSS VSS BG28
AJ24 VSS VSS AW48 G26 VSS VSS BJ28
AJ33 VSS VSS AV11 G28 VSS
AJ34 VSS VSS AY12 G36 VSS
AK12 VSS VSS AY22 G48 VSS
AK3 VSS VSS AY28 H12 VSS
H18 VSS
COUGAR-GP-U2-NF H22 VSS
H24 VSS
A H26 VSS HR UMA A
H30 VSS
H32 VSS
H34
F3
VSS
VSS
Wistron Corporation
COUGAR-GP-U2-NF Title
PCH (VSS)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
HR UMA
A
Title
Clock(colay)
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
3D3V_AUX_KBC
SSID = KBC 3D3V_AUX_KBC
RN2706
3D3V_AUX_S5
3D3V_AUX_KBC 3D3V_AUX_S5
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE R2767 Do Not Stuff
S
Do Not Stuff 4 1
SA 100.0K 10.0K 3.0V KBC_ON#_R KBC_ON#_GATE Q2703 1 R2772 2
1
DY 2 3 2 G
1
Do Not Stuff Do Not Stuff
G
3D3V_S0 R2724 SB 100.0K 20.0K 2.75V Do Not Stuff
64K9R2F-1-GP EC_ENABLE PSL C2713
D
2ND = 84.03413.A31
-1M G
1
Do Not Stuff
SC 100.0K 33.0K 2.48V PSL NO PSL SOLUTION
D
0628 Modify: D
PSL
2
Move R2771 to closed 3D3V_AUX_KBC power -1 100.0K 47.0K 2.24V
2
1
1
rail base on layout placement. C2702 C2703 PCB_VER_AD S
SCD1U10V2KX-5GP DY Do Not Stuff
D -1M 100.0K 64.9K 2.0V PSL
D
1
Q2705 3D3V_AUX_KBC
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
C2704
C2705
C2706
C2707
C2708
C2710
R2726 Reserved 100.0K 76.8 1.87V Do Not Stuff
1
1
100KR2F-L1-GP
C2709
Do Not Stuff
C2701 Reserved 100.0K 100.0K 1.65V 2ND = 84.2N702.031
SC2D2U10V3KX-1GP
DY
2
2
DY DY C2711
PSL SOLUTION
115
102
Do Not Stuff
19
46
76
88
4
1 OF 2 1 2
DY 0806 chagne GND (Power Switch Control Logic)
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
40 AD_IA
104 7 PLT_RST#_EC 1 R2735 2 PLT_RST# 5,18,31,36,65,66,71,82,97
C2714 VREF LRESET#
1DY 2 Do Not Stuff LCLK 2 Do Not Stuff CLK_PCI_KBC 18
PCB_VER_AD
97
98
GPIO90/AD0 LFRAME# 3
1 LPC_AD3
LPC_FRAME# 21,71 SB modify R2756 stuff, R2760 change DY
ADT_TYPE GPIO91/AD1 LAD3 LPC_AD2
99 GPIO92/AD2 LAD2 128 LPC_AD[0..3] 21,71
28 T8_THERM 100 127 LPC_AD1
GPIO93/AD3 LAD1 LPC_AD0
LAD0 126
101 GPIO94/DA0 SERIRQ 125 INT_SERIRQ 21
SB to -1 default active Low 60 EC_GPIO95 EC_GPIO95 105 8 PM_CLKRUN# 19 RTC_AUX_S5 1 R2756 2 EC_GPIO72
GPIO95/DA1 GPIO11/CLKRUN# Do Not Stuff 3D3V_AUX_S5
66 3G_EN 106 GPIO96/DA2 GPIO65/SMI# 9 PANEL_BLEN 94
29 ECSCI#_KBC
ECSCI#/GPIO54 U2701B
JE40 delete USB Charger function GPIO10/LPCPD# 124 PCH_TEMP_ALERT# 22
2
19 SUS_PWR_ACK 79 123 ECSWI#_KBC NPCE795PA0DX-GP-U
GPIO2 GPIO67/PWUREQ# R2704
Do Not Stuff TP2715 VGA_THRM
95 GPIO3/AD6 GPIO85/GA20 121 H_A20GATE 22
2 OF 2
3D3V_AUX_S5 1 DY 2
330KR2J-L1-GP
JE40 VGA_THRM 1 96 GPIO4/AD5 KBRST#/GPIO86 122 H_RCIN# 22 KCOL[0..16] 69
R2760
28 SYS_THRM 108 GPIO5/AD4
EC_GPIO6 93 28 FAN_TACH1 31 53 KCOL0 Do Not Stuff
1
PSL_IN2#_GPIO6 GPIO56/TA1 KBSOUT0/JENK# KCOL1 EC_GPIO6
37,42,48 ALL_POWER_OK 94 GPIO7/AD7 GPIO52/PSDAT3/RDY# 27 BLON_OUT 49 19,97 PM_PWRBTN# 117 GPIO20/TA2 KBSOUT1/TCK 52 82 KBC_PWRBTN# 2 1
68 DC_BATFULL 114 25 PCIE_RST# Do Not Stuff TP2705 1 FAN_TACH2 63 51 KCOL2
GPIO16 GPIO50/PSCLK3/TDO GPIO14/TB1 KBSOUT2/TMS
1
38 AD_OFF 6 11 WIRELESS_LED_OFF# 68 19,36,37,47,92 PM_SLP_S3# 64 50 KCOL3 R2757 C2717
GPIO24 GPIO27/PSDAT2 GPIO01/TB2 KBSOUT3/TDI
Do Not Stuff
KCOL4 G2701 470R2J-2-GP
36,97 S5_ENABLE
109
14
GPIO30 GPIO26/PSCLK2 10
71
HDMI_IN# 51
TPDATA 69 68 CHARGE_LED 32
KBSOUT4/JEN0# 49
48 KCOL5 Do Not Stuff
DY
2
GPIO34/CIRRXL GPIO35/PSDAT1 GPIO15/A_PWM KBSOUT5/TDO KCOL6
15
80
GPIO36 GPIO37/PSCLK1 72 TPCLK 69 <------ TP 29 KBC_BEEP 118
62
GPIO21/B_PWM KBSOUT6/RDY# 47
43 KCOL7
39 BAT_IN# 94 BRIGHTNESS
C C
2
GPIO41 GPIO13/C_PWM KBSOUT7 KCOL8
70 LID_CLOSE# 17 GPIO42/TCK 40 STOP_CHG# 65 GPIO32/D_PWM KBSOUT8 42
KCOL9
19 RSMRST#_KBC 20
21
GPIO43/TMS GPIO17/SCL1 70
69
BAT_SCL 39,40 <------ BATTERY / CHARGER Do Not Stuff TP2709
28 FAN1_PWM
1
81
EC_GPIO33 66 GPIO66/G_PWM KBSOUT9/SDP_VIS# 41
40 KCOL10
19,46 PM_SLP_S4# GPIO44/TDI GPIO22/SDA1 BAT_SDA 39,40 GPIO33/H_PWM KBSOUT10/P80_CLK KCOL11
21 ME_UNLOCK 23
26
GPIO46/CIRRXM/TRST# GPIO73/SCL2 67
68
SML1_CLK 20,86 <------PCH / EDP 68 STDBY_LED 22
16
GPIO45/E_PWM KBSOUT11/P80_DAT 39
38 KCOL12
49 DBC_EN GPIO51 GPIO74/SDA2 SML1_DATA 20,86 68 PWRLED GPIO40/F_PWM KBSOUT12/GPIO64
AC_IN_KBC 73 119 CRT_DEC# 50 37 KCOL13
EC_ENABLE PSL_IN1_GPIO70 GPIO23/SCL3 KBSOUT13/GPIO63 KCOL14
EC_GPIO72
74
75
PSL_OUT_GPIO71 GPIO31/SDA3 120
24 PROCHOT_EC Wireless_SW 82 SB to -1 ECRST# 85
KBSOUT14/GPIO62 36
35 KCOL15
KCOL17 69
VBKUP GPIO47/SCL4 VCC_POR# KBSOUT15/GPIO61/XOR_OUT KCOL16
65 WIFI_RF_EN 82 GPIO75 GPIO53/SDA4 28 CHG_ON# 40 GPIO60/KBSOUT16 34
63,65 BLUETOOTH_EN 83 33 KCOL17 1 TP2701 Do Not Stuff
GPO76/SHBM GPIO57/KBSOUT17
19,42 S0_PWR_GOOD 84 GPIO77 65 E51_RxD 113 GPIO87/CIRRXM/SIN_CR KROW[0..7] 69
68 WLAN_TEST_LED 91 65 E51_TxD 111 54 KROW0
GPIO81 GPIO83/SOUT_CR/TRIST# KBSIN0 KROW1
61,82 USB_PWR_EN# 110 GPO82/IOX_LDSH/TEST# KBSIN1 55
EC_SPI_CS#_C 2 R2736 1 33R2J-2-GP KROW2
19 AC_PRESENT
DISCRETE#
112
107
GPIO84/IOX_SCLK/XORTR# F_CS0# 90
92 EC_SPI_CLK_C 2 R2719 1 33R2J-2-GP
SPI_CS0#_R 21,60
19 PCH_SUSCLK_KBC
JE40 delete AMP function 30
77
GPIO55/CLKOUT/IOX_DIN_DIO KBSIN2 56
57 KROW3
GPIO97 F_SCK SPI_CLK_R 21,60 GPIO00/EXTCLK KBSIN3
0604 Modify: 86 EC_SPI_DI_C 2 R2737 1 0R2J-2-GP 58 KROW4
F_SDI/F_SDIO1 SPI_SO_R 21,60 KBSIN4
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN. KBC_VCORF 44 VCORF
F_SDIO/F_SDIO0 87 EC_SPI_DO_C 2 R2722 1 33R2J-2-GP SPI_SI_R 21,60
5,22 H_PECI R2721 1 2 43R2J-GP PECI 13 PECI
KBSIN5
KBSIN6
59
60
KROW5
KROW6 PLS function pull high 3D3V_AUX_S5
1D05V_VTT R2720 1 2 EC_VTT 12 61 KROW7
VTT KBSIN7
1
C2712 Do Not Stuff
1
AGND
SC1U10V3ZY-6GP C2716
GND
GND
GND
GND
GND
GND
SCD1U16V2KX-3GP
2
2
18
45
78
89
116
5
103
U2701A NOTE: 20 EC_SWI# 1 R2758 2 ECSWI#_KBC

NPCE795PA0DX-GP-U Locate resistors R2719 and R2722 close Do Not Stuff
3D3V_S0 to the NPCE791L. C2716 need very close to EC BLUETOOTH_EN

1 DY 2
RN2708 1 R2759 2 ECSCI#_KBC
SRN10KJ-6-GP EC GPIO standard PH/PL 22 EC_SCI#
Do Not Stuff R2774
1 8 PCIE_RST# NOTE: Do Not Stuff
2 7 WIRELESS_LED_OFF#
Connect GND and AGND planes via either 3D3V_AUX_KBC
3 6 HDMI_IN# 0604 Modify:
4 5
0R resistor or one point layout connection. RN2701
FAN_TACH1 28 RN2704 pull-Low 10K Resistor to DY
B 2
1
SRN4K7J-8-GP
3
4
BAT_SCL
BAT_SDA
1
3
on BLUETOOTH_EN.
B
U2702
Do Not Stuff 2
Do Not Stuff R2775 R2768
SB LID_CLOSE# can not pull high, because push pull EC_SPI_DI_C 3D3V_AUX_S5 3D3V_AUX_S5 100KR2J-1-GP Do Not Stuff
BAT_IN# D2701
DY AC_IN_KBC
suggest RN2708 Pin5 change FAN_TACH1 DY 2 1 40 AC_OK 1 2
1
1 Do Not Stuff
GND
1
1
R2773 3 Do Not Stuff
100KR2J-1-GP R2705 ECRST# PURE_HW_SHUTDOWN# VCC RN2705 R2769
2 RESET# 2nd = 83.BAT54.N81
10KR2J-3-GP SRN10KJ-6-GP 3nd = 83.00054.T81 100KR2J-1-GP
RN2709 1 8 S5_ENABLE
2
1
SRN10KJ-5-GP C2715 2 7 ECRST#
E
2
2
3D3V_AUX_KBC 1 4 PURE_HW_SHUTDOWN# 3 6
DY
Do Not Stuff
28,36 PURE_HW_SHUTDOWN# 2 3 B 4 5 Wireless_SW
2
RN2707
SRN100KJ-6-GP Prevent BIOS data loss
SB to -1
C
1 4 CHG_ON# 0604 Modify:
2 3 STOP_CHG# Add Pull down 100k ohm at F_SDI for Power consumption concern. Q2701
MMBT3906-4-GP
R2770
84.T3906.A11
2nd = 84.03906.F11 JE40 modify
1KR2J-1-GP
1 2 AD_OFF
3D3V_AUX_KBC
ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
1
10KR2J-3-GP
EC_GPIO47 High Active 65W N/A 100.0K 3.3V R2707 R2710
100KR2F-L1-GP
65W UMA
R2733 90W 100.0K N/A 0V
PROCHOT_EC G Do Not Stuff
2
30W 10.0K 100.0K 0.3V ADT_TYPE
A D H_PROCHOT#_EC 1 2 H_PROCHOT# 5,42 A
1
40W 20.0K 100.0K 0.55V DISCRETE#

R2732 S HR UMA
1
100KR2J-1-GP
Do Not Stuff
120W 33.0K 100.0K 0.82V
Q2702 R2701 R2739
65W_90W#
100KR2F-L1-GP
2N7002K-2-GP Reserved 47.0K 100.0K 1.06V 90W DIS_PX_Muxless Wistron Corporation
2
84.2N702.J31
Reserved 64.9K 100.0K 1.3V
High: 65W / Low 90W 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2ND = 84.2N702.031
2
DISCRETE#
High: UMA / Low: Discrete Title
KBC Nuvoton NPCE795

SB EC_AGND , change GND Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = Thermal Thermal sensor P2800

3D3V_DAC_S0
Fan controller P2793
SB to -1
5V_S0
*Layout* 15 mil
1
D 3D3V_S0 D
R2803
1
107KR2F-GP C2809 C2808
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
D2802
SB modify R2803,R2804 setting

1
1
C2801 C2802 CH551H-30PT-GP
2
Do Not Stuff
SCD1U10V2KX-5GP
DY 83.R5003.C8F
ADJ 2ND = 83.R5003.H8H
1
3D3V_S0
3rd = 83.5R003.08F
1
R2804 C2805
1
SCD1U10V2KX-5GP
226KR2F-GP R2807
Do Not Stuff R2805
2
1 DY 2 DY Do Not Stuff
2
C2815
2
Layout notice : Do Not Stuff
Q2801 Both DXN and DXP routing 10 mil 27 FAN_TACH1 1 2 FAN_TACH1_C
6
PMBS3904-1-GP trace width and 10 mil spacing. 1 DY2 FAN1_PWM_C
84.03904.L06
U2801 D2801 27 FAN1_PWM 1 2 4
P2800_DXP 3D3V_S0 P2800EA1-GP CH551H-30PT-GP R2806 3 FAN1
74.02800.A71 83.R5003.C8F Do Not Stuff FAN_TACH1_C 2 ACES-CON4-4-GP
1
C2807 2ND = 83.R5003.H8H 20.F0765.004

3
SC2200P50V2KX-2GP
C
DY R2808 C2806 5 VCC TDR 4 SYS_THRM 27 3rd = 83.5R003.08F 5V_S0 1 2nd = 20.F1808.004 C
Do Not Stuff
1 SC470P50V3JN-2GP 6 3 T8_THERM 27 3rd = 20.F1426.004

2
DXP TDL
7 DXN GND 2
THERM_SYS_SHDN# 8 1 ADJ JE40 HR modify
2
5
P2800_DXN OTZ ADJ
2.System Sensor, Put on palm rest

1.H/W T8 Shutdown
For PWM FAN
B B
3D3V_AUX_S5 3D3V_S0
1
3
D2803 R2809
Do Not Stuff 100KR2J-1-GP
Do Not Stuff
2ND = 83.BAT54.D81 DY
2
3rd = 83.BAT54.S81
VGA Thermal sensor P2800 S THERM_SYS_SHDN#
2
27,36 PURE_HW_SHUTDOWN# D R2810
Do Not Stuff
1
G 1 DY 2 3D3V_S0
1
R2812 C2811
Do Not Stuff
DY DY Q2802 1 2 IMVP_PWRGD 36,42
SMBUS modify to Page 84
Do Not Stuff
2N7002K-2-GP R2811
2
84.2N702.J31 Do Not Stuff
2
2ND = 84.2N702.031 HR UMA
A A
Wistron Corporation
Title
Thermal P2800/Fan Controllor P2793

Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
5V_S0 R2921 5VA_S0 3D3V_S0 5V_S0 R2922
HDA_CODEC_BITCLK
HDA_CODEC_SDOUT
Do Not Stuff 2D2R3J-2-GP
1 DY 2 1 2
1
G2901
C2903 C2904 C2906 C2907
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
1 5 1 2
2
EN NC#5
2 GND
3 4 Do Not Stuff
VIN VOUT
G2903
1
1
D C2927 C2928 D
1
SC1U10V3KX-4GP
SC10U10V5KX-2GP
1 2 RFC2901 RFC2902
Do Not Stuff
Do Not Stuff
U2902 DY DY
2
2
G9091-475T12U-GP Do Not Stuff
2
74.09091.F3F
2ND = 74.09198.A7F AUD_AGND
CLOSE TO PIN39 and 46
RN2901
CLOSE TO PIN1 and 9 SRN47K-2-GP-U
-1 PVDD timeing AVDD, PW 74.00545.079 AUDIO_PC_BEEP 2 1 AUDIO_BEEP 4 1 KBC_BEEP_1
R2904
1 Do Not Stuff
2 KBC_BEEP 27
vensor suggest , R2925 3D3V_S0 C2921
3 2 SPKR_SB_1 1
R2905
2 HDA_SPKR 21
1
Do Not Stuff SC1U6D3V2KX-GP Do Not Stuff
1 2 C2922 R2906
SC100P50V2JN-3GP
21 HDA_SDIN0 1 R2915 2 4K7R2J-2-GP
2
22R2J-2-GP R2902 1D5V_S0
0R2J-2-GP
2
5V_S0 3D3V_S0 1 R2914 2 1 2
21 HDA_CODEC_BITCLK
33R2J-2-GP DY
21 HDA_CODEC_SDOUT
1
2
COMBO_MIC_JD#
RN2905 HDA_CODEC_SYNC 21
Do Not Stuff
SB EAPD 1 DY 2 PD# HDA_CODEC_RST# 21
D
ACZ_BITCLK_AUDIO_+
1
C R2924 C2909 Q2901 C
4
3
Do Not Stuff
Do Not Stuff DY BSS138-7F-GP
COMBO_MIC 1 R2919 2 COMBO_MIC_Q G 84.00138.F31
2
Q2902 Do Not Stuff
AC97_DATIN
AUD_3VD_R
2ND = 84.00138.H31
1
Do Not Stuff 3D3V_S0 C2926
AUDIO_PC_BEEP
S
Do Not Stuff
Do Not Stuff DY
SB G Max Vgs(th) 1.8V
2
. .
PD# D 3D3V_S0
.
.
.
S EAPD
AUD_AGND AUD_AGND MIC2V Ref voltage is 2.5V
10
11
12
becasue Vgs(th)concern
1
2
3
4
5
6
7
8
9
R2907 1 2 39K2R2F-L-GP AUD_HP1_JD# 82
cann't use 2N702 for desing
DIGITAL
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
BCLK
DVSS
PCBEEP
SDATA-OUT
PD#
DVDD-IO
DVDD
SDATA-IN
SYNC
RESET#
R2908 1 2 20KR2F-L-GP EXT_MIC_JD# 82
(include thermal pad) Spilt by DGND
49 GND
48 13 ALC268_SENSE_A MIC2V
EAPD SPDIFO SENSE_A LIN2-L_PORT-B C2925 1 SC1U25V3KX-1-GP
47 EAPD LINE2-L/PORT-E-L 14 2
2
5V_S0 46 15 LIN2-R_PORT-B C2924 1 2 SC1U25V3KX-1-GP
PVDD2 LINE2-R/PORT-E-R MIC2-L_PORT-B C2920 1 SC2D2U10V3KX-1GP R2917
82 AUD_SPK_R+ 45 SPK-OUT-R+ MIC2-L/PORT-F-L 16 2
82 AUD_SPK_R- 44 17 MIC2-R_PORT-B C2919 1 2 SC2D2U10V3KX-1GP RN2902 2K2R2J-2-GP
SPK-OUT-R- MIC2-R/PORT-F-R ALC268_SENSE_B 1 R2920 2 COMBO_MIC_JD# SRN1KJ-4-GP
43 PVSS2 SENSE_B 18
42 19 20KR2F-L-GP CLOSE TO PIN18 INT_MIC1_R 4 5 INT_MIC_L_R 49,97
1
PVSS1 JDREF COMBO_MIC_R
82 AUD_SPK_L- 41 SPK-OUT-L- MONO-OUT 20 3 6 COMBO_MIC 82
82 AUD_SPK_L+ 40 21 MIC1-L_PORT-B C2918 1 2 SC2D2U10V3KX-1GP AUD_MIC_L 2 7 MIC_IN_L 82
SPK-OUT-L+ MIC1-L/PORT-B-L
HPOUT-R/PORT-I-R
MIC1-R_PORT-B C2917 1 2 SC2D2U10V3KX-1GP AUD_MIC_R

HPOUT-L/PORT-I-L
5V_S0 39 PVDD1 MIC1-R/PORT-B-R 22 1 8 MIC_IN_R 82
1
5VA_S0 38 AVDD2 LINE1-L/PORT-C-L 23
MIC1-VREFO-R
B B
MIC1-VREFO-L
37 24 JDREF R2927
AVSS2 LINE1-R/PORT-C-R
1
MIC2-VREFO
C2910 22K1R2F-L-GP
2 1 INT_MIC_L_R
LDO-CAP
ANALOG SB modify
SCD1U10V2KX-5GP
AUD_AGND CLOSE TO PIN19

CPVEE
AVDD1
AVSS1
2
2
1
VREF
R2926
CBN
CBP
R2909 10KR2J-3-GP
20KR2F-L-GP
U2901 AUD_AGND
36
35
34
33
32
31
30
29
28
27
26
25
AUD_AGND 5VA_S0
ALC271X-VB3-GR-GP
2
CLOSE TO PIN38
MIC1-VREFO_L
MIC1-VREFO_R
MIC2V
LDO_CAP_AUDIO
VREF
71.00271.A03
AUD_CBN
AUD_CBP
HP_OUT_R_AUD
CPVEE
HP_OUT_L_AUD
AUD_AGND
1
C2913
SCD1U10V2KX-5GP
CLOSE TO PIN35
2
2
C2911 AUD_AGND
SC2D2U10V3KX-1GP C2916 1 2 AUD_AGND
SCD1U10V2KX-5GP
1
CLOSE TO PIN34 1 2 AUD_AGND

C2914
AUD_AGND 2 1 C2912 SC10U6D3V5KX-1GP
SC2D2U10V3KX-1GP
HR UMA
A A
RN2904 RN2903
SRN68J-5-GP MIC2V SRN4K7J-8-GP Wistron Corporation
2 3 4 1 MIC_IN_R 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
82 AUD_HP1_JACK_R2 MIC_IN_L Taipei Hsien 221, Taiwan, R.O.C.
82 AUD_HP1_JACK_L2 1 4 3 2
Title
Audio Codec
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
JE40 delete AMP function

C C
B B
HR UMA
A
Title
Audio AMP
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SB modify L3101,2,4,5,6 to 0 ohm

3D3V_S5 R3101 3D3V_LAN_S5 1D2V_LAN_S5 SB modify R3102 DY, R3104 to pull low
Do Not Stuff
1 2 3D3V_LAN_S5
3D3V_LAN_S5
1
C3101 C3102 C3103 C3104 C3105 C3108 SB mmodify vendor suggest L3102
3D3V_LAN_S5
SC47P50V2JN-3GP
SC56P50V2JN-2GP
SC47P50V2JN-3GP
Do Not Stuff
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
BIASVDD_G 1 2
2
3G_RF 3G_RF 3G_RF
1
C3111
62
56
20
7
SCD1U10V2KX-4GP RN3102
SRN4K7J-8-GP
VDDO_CR
VDDO/VDDIO
VDDO/VDDIO
VDDO/VDDIO
D D
2
37 BIASVDD_G BCM57785_CS#/EECLK 2 3
BIASVDDH L3104 LAN_FLASH_SI/EEDATA 1 4
Do Not Stuff
XTALVDD_G 1 2
1D2V_LAN_S5
1
1D2V_LAN_S5 35 RFC3101 C3113
VDDC
SC47P50V2JN-3GP
L3101 61 17 XTALVDD_G SCD1U10V2KX-4GP
Do Not Stuff VDDC XTALVDDH
2
1 2 AVDDL_G 3G_RF
SB delete EEPROM
1
C3116 C3117
L3103 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP L3105
GBK160808T-601Y-GP 48 LAN_AVDD Do Not Stuff
2
AVDDH LAN_AVDD LAN_AVDD
68.00248.011 AVDDH 42 1 2
2nd = 68.00217.241
1
C3114 C3115
SCD1U10V2KX-4GP
1 2 GPHY_PLLVDD SCD1U10V2KX-4GP
AVDDL_G 39
2
AVDDL
1
1
C3119 C3112 AVDDL_G 45
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP AVDDL_G AVDDL
51 AVDDL
2
2
L3106 49 MDI3- 59
Do Not Stuff TRD3_N
TRD3_P 50 MDI3+ 59
1 2 PCIE_PLLVDD GPHY_PLLVDD 36 3D3V_LAN_S5
GPHY_PLLVDDL
TRD2_N 47 MDI2- 59
1
1
C3120 C3121 46 MDI2+ 59
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP TRD2_P
1
43 MDI1- 59 C3118
2
2
TRD1_N
SCD1U10V2KX-4GP
44 MDI1+ 59 R3140
PCIE_PLLVDD TRD1_P
C 32 DY Do Not Stuff C
2
PCIE_PLLVDDL
29 PCIE_PLLVDDL TRD0_N 41 MDI0- 59
20 PCIE_RXP4 40 MDI0+ 59
2
TRD0_P BCM57785_GPIO0
20 PCIE_RXN4 128K byte
4 LOW_PWR R3106 1 DY 2
20 PCIE_TXP4 LOW_PWR
2
Do Not Stuff
20 PCIE_TXN4 R3141
5,18,27,36,65,66,71,82,97 PLT_RST# C3123 1 2 SCD1U10V2KX-5GP PCIE_RXDP4 28 10KR2J-3-GP
20 PCIE_RXP4 PCIE_TXD_P
20 CLK_PCIE_LAN C3124 1 2 SCD1U10V2KX-5GP PCIE_RXDN4 27 2 10M/100M/1G_LED# 59
20 PCIE_RXN4 PCIE_TXD_N SPD100LED#_SERIALDO
20 CLK_PCIE_LAN# 33
1
20 PCIE_TXP4 PCIE_RXD_P VDDO_CR
19,65,66,82 PCIE_WAKE# 20 PCIE_TXN4 34 PCIE_RXD_N TRAFFICLED#_SERIALDI 67 LAN_ACT_LED# 59
20 PCIE_CLK_LAN_RQ#
GPIO1_LR_OUT 8
1
TP1 C3125 C3126
SCD1U10V2KX-4GP
R3142 BCM57785_GPIO0 Do Not Stuff
SCD1U50V3KX-GP
Do Not Stuff GPIO_0 5 3G_RF
2
19,65,66,82 PCIE_WAKE# 1 2 PCIE_WAKE#_C 3 66 BCM57785_1000LED# 1 R3109 2 10M/100M/1G_LED#
WAKE# SCLK_SPD1000LED# Do Not Stuff
20 PCIE_CLK_LAN_RQ# 12 CLK_REQ#
Check VDDO_CR power plan
5,18,27,36,65,66,71,82,97 PLT_RST# 2 1 LAN_RST 11 64 LAN_FLASH_SI/EEDATA SB delete R3112
PERST# SI_EEDATA
20 CLK_PCIE_LAN 31 PCIE_REFCLK_P
R3111 20 CLK_PCIE_LAN# 30 65 BCM57785_LINKLED# 1 R3114 2 10M/100M/1G_LED#
PCIE_REFCLK_N SO_LINKLED#
1
100R2J-2-GP C3128 Do Not Stuff

SC33P50V2JN-3GP 63 BCM57785_CS#/EECLK SB delete R3117
CS#_EECLK
2
1 BCM57785_XD_WE# R3118 1 2 Do Not Stuff SD_CD/XD_WE# 32,74

SD_DETECT/XD_WE# BCM57785_XD_DETECT#
SR_DISABLE/XD_DETECT# 68
R3119 1 2 Do Not Stuff XD_CD# 32 SB for B version
32 SD_DAT0/XD_D0/MS_D0 R3120 1 2 Do Not Stuff BCM57785_CR_DATA0 25 59 BCM57785_XD_CE# R3121 1 2 Do Not Stuff XD_CE#/MS_INS# 32
R3122 1 Do Not Stuff BCM57785_CR_DATA1 CR_DATA0 MS_INS#/XD_CE# 3D3V_CARD_S0 VDDO_CR
32 SD_DAT1/XD_D1/MS_D1 2 24 CR_DATA1
32 SD_DAT2/XD_D2/MS_D2 R3123 1 2 Do Not Stuff BCM57785_CR_DATA2 23 9 BCM57785_XD_RE#
R3124 1 Do Not Stuff BCM57785_CR_DATA3 CR_DATA2 GPIO_2/MEDIA_SENSE/XD_RE# R3125 1
B 32 SD_DAT3/XD_D3/MS_D3 2 22 CR_DATA3 2 Do Not Stuff XD_RE# 32 1 2 B
32 SD_DAT4/XD_D4/MS_D4 R3126 1 2 Do Not Stuff BCM57785_CR_DATA4 52 57 XD_WP#/SD_WP# 32 R3143
R3127 1 Do Not Stuff BCM57785_CR_DATA5 CR_DATA4 CR_WP#/XD_WP# BCM57785_XD_ALE Do Not Stuff
2 53 60
32 SD_DAT5/XD_D5/MS_D5
R3128 1 2 Do Not Stuff BCM57785_CR_DATA6 54
CR_DATA5 CR_LED/CR_BUS_PWR/XD_ALE
DY SB delete R3129 for LDO power
32
32
SD_DAT6/XD_D6/MS_D6
SD_DAT7/XD_D7/MS_D7 R3130 1 2 Do Not Stuff BCM57785_CR_DATA7 55
CR_DATA6 SB 1 R3131 2Do Not Stuff XD_ALE 32
CR_DATA7 BCM57785_XD_R/B R3132 1
CR_CLK/XD_RY_BY# 21 2 Do Not Stuff SD_CLK/XD_R/B# 32
SB to -1 modify to short pad 26 BCM57785_XD_CLE R3133 1 2 Do Not Stuff SD_CMD/XD_CLE/MS_BS 32 LOW_PWR 1 2 XD_ALE 32
CR_CMD/XD_CLE
3D3V_LAN_S0 1 R3134 2 VMAINPRSNT R3144
1KR2J-1-GP Card-reader Off-Page Do Not Stuff
3D3V_S0 3D3V_LAN_S0
L3107
2 R3135 1 RN3101 IND-4D7UH-192-GP
Do Not Stuff SRN4K7J-8-GP 58 68.4R750.20C 1D2V_LAN_S5
BCM57785_TEST1 VMAIN_PRSNT
3D3V_LAN_S5 2 3
1
C3129 1 4 BCM57785_TEST2 6 16 1D2V_LAN_S5_SR 2 1

SCD1U10V2KX-4GP TEST1 SR_LX
10 13 1D2V_LAN_S5
SB for B version can no use LDO
2
LAN_XO_R TEST2 SR_VFB

2 R3138 1 LAN_X0
200R2F-L-GP 19 XTALO delete LDO
1
1 2 LAN_XI 18 3D3V_LAN_S5 C3132 C3130
SC56P50V2JN-2GP
XTALI
SC10U6D3V5KX-1GP
X3101 LAN_RDAC 38 15
2
RDAC SR_VDDP
1
1
1 CLK_PCIE_LAN#
C3134 XTAL-25MHZ-102-GP C3135 3G_RF

1 CLK_PCIE_LAN
SC15P50V2JN-2-GP 82.30020.851 SC15P50V2JN-2-GP 14

SR_VDD
1
2
1
R3139 C3136 C3137
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
1K24R2F-GP
2
Do Not Stuff
Do Not Stuff
A SB C3134, C3135 change 15P A

EC3102
EC3101
GND
HR UMA
2
Wistron Corporation
69
U3101
BCM57785XA0KMLG-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
71.57785.M02 Taipei Hsien 221, Taiwan, R.O.C.
Change:71.57785.M03 Title
DY DY 1071.57785.M03 BCM57780
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
RN3210
SRN0J-7-GP
SD_DAT7/XD_D7/MS_D7_RTS
RN3209
Do Not Stuff 1 8
31 SD_CLK/XD_R/B# MS-SCLK_17 74
XD_RDY/SD_WP/MS_CLK 1 8 MS-SCLK_17 74 2 7 SD-CLK_9 74
XD_D5/SD_D2/MS_D5
XD_D4/SD_D3/MS_D1
XD_D3/SD_D4/MS_D4
XD_D6/MS_BS
2 7 SD-WP_2 74 3 6 XD-R/-B_38 74
3 6 XD-R/-B_38 74 31 XD_CD# 4 5 XD_CD#_39 74
4 5
SB modify add 0 ohm BCM
RTS
R3202 RN3206
Do Not Stuff RN3203 SRN0J-7-GP
1 RTS 2 Do Not Stuff 1 8
20 48MHZ_OUT 31 XD_CE#/MS_INS# MS_INS#_14 74
D U3201 XD_CE#/SD_D1 1 8 SD-DAT1_3 74 2 7 XD_CE#_36 74 D
3D3V_S0 R3201 Do Not Stuff XD_CE#/SD_D1 2 7 3 6
XD_CE#_36 74 31 XD_WP#/SD_WP# SD-WP_2 74
Do Not Stuff Do Not Stuff XD_RE#/MS_INS#
24
23
22
21
20
19
3 6 MS_INS#_14 74 4 5 XD_WP_32 74
1 RTS 2 RREF XD_RE#/MS_INS# 4 5 XD_RE#_37 74
SB to -1 BCM
CLK_IN
XD_D7
SP14
SP13
SP12
SP11
1
C3206 C3205 RTS

DY 1 18 XD_D2/SD_CMD
RREF SP10
Do Not Stuff
SCD1U16V2ZY-2GP
R3205
18 USB_PN5 2 17 -1M
2
DM GPIO0 XD_D1/SD_D5/MS_D0 RN3202 100R2J-2-GP

18 USB_PP5 3 DP SP9 16
4 15 XD_D0/SD_CLK/MS_D2 Do Not Stuff 1 2
3D3V_S0 3V3_IN SP8 31 SD_DAT1/XD_D1/MS_D1 MS-DATA1_8 74
XD_WP/SD_D6/MS_D6 XD_ALE/SD_D7/MS_D3
SB add 3D3V_CARD_S0 5 CARD_3V3 SP7 14
SD_CD/XD_WE#_RTS XD_ALE/SD_D7/MS_D3
1 8 MS-DATA3_15 74
6 V18 SP6 13 2 7 XD_ALE_34 74 BCM
XD_CD#
XD_CLE/SD_D0/MS_D7
VREG
3 6 SD_DATA0_4 74
XD_CLE/SD_D0/MS_D7 4 5 XD_CLE_35 74 RN3213
SP1
SP2
SP3
SP4
SP5
25 SRN47J-4-GP
GND
RTS 1 8 -1M
RTS 31 SD_DAT1/XD_D1/MS_D1 2 7 SD-DAT1_3 74
7
8
9
10
11
12
1
C3203 RTS 31 SD_DAT1/XD_D1/MS_D1 3 6 XD_D1_29 74
Do Not Stuff
RN3211 31,74 SD_CD/XD_WE# 4 5 SD_CD/XD_WE#_1_33_43 74

Do Not Stuff
2
XD_RDY/SD_WP/MS_CLK
XD_D0/SD_CLK/MS_D2 1 8 SD-CLK_9 74 BCM
XD_CLE/SD_D0/MS_D7
XD_ALE/SD_D7/MS_D3
2 7 MS-DATA2_12 74
3 6 XD_D0_30 74
XD_WP/SD_D6/MS_D6
XD_RE#/MS_INS#
4 5 XD_WP_32 74
XD_CE#/SD_D1
R3206
3D3V_CARD_S0
XD_CD#_RTS
RTS 100R2J-2-GP
31 SD_DAT0/XD_D0/MS_D0 1 2 MS_DATA0_10 74
RN3204
Do Not Stuff
BCM
1
C C3204 C3201 C3202 XD_D2/SD_CMD 1 8 SD_CMD_16 74 C

XD_D2/SD_CMD 2 7 XD_D2_28 74 RN3214
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
XD_D1/SD_D5/MS_D0 3 6 MS_DATA0_10 74 SRN47J-4-GP

2
XD_D1/SD_D5/MS_D0 4 5 XD_D1_29 74 1 8
31 SD_DAT0/XD_D0/MS_D0 2 7 SD_DATA0_4 74
RTS 31 SD_DAT0/XD_D0/MS_D0 3 6 XD_D0_30 74
31 XD_RE# 4 5 XD_RE#_37 74
RN3207
Do Not Stuff
XD_D4/SD_D3/MS_D1
BCM
1 8 SD-DATA3_19 74
XD_D4/SD_D3/MS_D1 2 7 MS-DATA1_8 74 R3203
XD_D4/SD_D3/MS_D1 3 6 XD_D4_26 74 100R2J-2-GP
XD_D3/SD_D4/MS_D4 4 5 XD_D3_27 74 31 SD_DAT3/XD_D3/MS_D3 1 2 MS-DATA3_15 74
Near CARD1 Pin11, Pin18, Pin22 RTS BCM

RN3205
RN3201 SRN47J-7-GP
Do Not Stuff 1 4
31 SD_DAT3/XD_D3/MS_D3 SD-DATA3_19 74
XD_D6/MS_BS 1 8 MS_BS_7 74 31 SD_DAT3/XD_D3/MS_D3 2 3 XD_D3_27 74
XD_D6/MS_BS 2 7 XD_D6_24 74
XD_D5/SD_D2/MS_D5 3 6 SD-DATA1_21 74 BCM
XD_D5/SD_D2/MS_D5 4 5 XD_D5_25 74
R3204
RTS 100R2J-2-GP
31 SD_CMD/XD_CLE/MS_BS 1 2 MS_BS_7 74
RN3216 BCM
Do Not Stuff
B
SD_DAT7/XD_D7/MS_D7_RTS 1 8 XD_D7_23 74 RN3208 B
XD_CD#_RTS 2 7 XD_CD#_39 74 SRN47J-7-GP
SD_CD/XD_WE#_RTS 3 6 SD_CD/XD_WE#_1_33_43 74 31 SD_CMD/XD_CLE/MS_BS 1 4 SD_CMD_16 74
4 5 31 SD_CMD/XD_CLE/MS_BS 2 3 XD_CLE_35 74
RTS BCM
R3207
100R2J-2-GP
31 SD_DAT2/XD_D2/MS_D2 1 2 MS-DATA2_12 74
BCM
RN3212
SRN47J-4-GP
1 8
31 SD_DAT2/XD_D2/MS_D2 2 7 SD-DATA1_21 74
31 SD_DAT2/XD_D2/MS_D2 3 6 XD_D2_28 74
31 XD_ALE 4 5 XD_ALE_34 74
BCM
RN3215
SRN47J-4-GP
31 SD_DAT4/XD_D4/MS_D4 1 8 XD_D4_26 74
31 SD_DAT5/XD_D5/MS_D5 2 7 XD_D5_25 74
31 SD_DAT6/XD_D6/MS_D6 3 6 XD_D6_24 74
31 SD_DAT7/XD_D7/MS_D7 4 5 XD_D7_23 74
A HR UMA A
BCM
-1M Wistron Corporation
Title
RTS5159 (CARD READER)

Custom
JE40-HR -1
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
HR UMA
1
Wistron Corporation 1
Title
Reserved
A4
JE40-HR -1
A B C D E
5 4 3 2 1
D D
(Blanking)
C C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A HR UMA A
Wistron Corporation
Title
USB 3.0 Controller

A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Power Sequence
D D
28,42 IMVP_PWRGD 1 R3614 2 SYS_PWROK 19
Do Not Stuff
1
C3612
R3614
1 DY
Do Not Stuff
CRB : 1K
2
19,27,37,47,92 PM_SLP_S3# 3
2
D3603
BAS16-6-GP
83.00016.K11
2ND = 83.00016.F11
ANNIE Run Power U3604

AO4468-GP
84.04468.037 3D3V_S5
5V_S0 5V_S5
2nd = 84.08882.037
C3607 1 S D 8
Do Not Stuff 2 S D 7
C 5V_S5 1 DY2 3 S D 6 1 R3608 2 C
3D3V_S0 PS_S3CNTRL 37
U3609 5V_S0 5V_S5 RUN_ENABLE 4 G D 5 100KR2J-1-GP
SLG55221-130010VTR-GP
74.55221.0E3 RUN_ENABLE
D
1 VCC NC#9 9 1 R3626 2 Q3606
2 8 0R2J-2-GP U3607 2N7002K-2-GP
K
19,27,37,47,92 PM_SLP_S3# ON PG
1
3 7 C3606 AO4468-GP
DIS2 G1/G2 R3621 D3602 84.2N702.J31
4 GND S/DIS1 6 DY DY DY 3D3V_S0
84.04468.037
Do Not Stuff
5 Do Not Stuff Do Not Stuff 2nd = 84.08882.037 3D3V_S5 2ND = 84.2N702.031
2
D
2ND = 83.9R103.F3F S D
1 8
S
2
G
Do Not Stuff 2 S D 7
3 S D 6
4 G D 5 19,27,37,47,92 PM_SLP_S3#
RUN_ENABLE -1 modify R3621,D3602 to DY
U3610
U3605
AO4468-GP
SB modify part number
-1 co-layout SLG55221 Do Not Stuff 84.04468.037
1
5V_S5 1D5V_S0 change:84.03006.A37 1D5V_S3

Do Not Stuff
R3633
DY Do Not Stuff 1 S D 8
19,27,37,47,92 PM_SLP_S3# 6 EN VCC 1 2 S
S
D
D
7 1D5V_S0
3D3V_S0 5 2 3 6
2
DC2 GND G D
B 5V_S0 4 DC1 HV 3 4 5 MAX Current 3000 mA B
Design Current 2100 mA
1
DY C3611 Total= 11.39A
SCD01U50V2KX-1GP
2
SB
1D05V_VTT 2 R3622 1 H_THERMTRIP# 5,22
Do Not Stuff
E
5,22,97 H_CPUPWRGD 1 R3601 2 H_PWRGD_R B

Do Not Stuff Q3601
DY
1
CHT2222APT-GP
C
SCD1U10V2KX-5GP
C3602 84.02222.S11
R3616 2nd = 84.02222.V11
2
5,18,27,31,65,66,71,82,97 PLT_RST# 2 1
4K7R2J-2-GP
1
R3632
2K2R2J-2-GP
A HR UMA A
2
3 PURE_HW_SHUTDOWN# 27,28
Wistron Corporation
1 D3601 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
41 3V_5V_EN
BAS16-6-GP Taipei Hsien 221, Taiwan, R.O.C.
83.00016.K11
Do Not Stuff
1
2ND = 83.00016.F11 Title

R3602
DY Power Plane Enable

A3
2 1 S5_ENABLE 27,97
JE40-HR -1
2
2KR2F-3-GP R3603
5 4 3 2 1
5 4 3 2 1
Close to DIMM
Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK
S3 Power Reduction Circuit Processor VREF_DQ Implementation 0D75V_S0
R3707
Do Not Stuff
1
DDR_VREF_S3
1 DY 2
D R3703 D
22R2J-2-GP
S +V_SM_VREF_CNT 9
2
2
D
R3705
D
G 100KR2J-1-GP
Q3701
Q3708 2N7002K-2-GP
1
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
84.2N702.J31 2ND = 84.2N702.031
PM_SLP_S3# 19,27,36,47,92
S
G
36 PS_S3CNTRL
5 S3 Power Reduction X01 20091111 JE40 HR modify R3710
SB to -1 reserve R3723
C PS_S3CNTRL 36 C
2
5V_S5
SB to -1 R3723
Do Not Stuff 3D3V_S0
DY 1.05VTT_PWRGD 45,48
1
R3714
Close to CPU
1
1
1D5V_S0 DY Do Not Stuff Q3705 S3 Power Reduction Circuit SM_DRAMPWROK
2
Do Not Stuff R3712 1D5V_S3
Do Not Stuff Do Not Stuff R3710
DY
2
2
Do Not Stuff
2ND = 84.2N702.031
1
R3715 1.5V_RUN_CPU_EN# G
2
DY Do Not Stuff R3706
1
D 0D75V_EN_L 2 R3711 1 R3709 1KR2J-1-GP
0D75V_EN 46
C

1
1.5V_RUN_CPU_EN B S
2
19,27,36,47,92 PM_SLP_S3# 2 DY 1 1
DY 2
2
DY
E
1
R3722 DY Q3706 R3716 C3705 S3 Power Reduction Circuit
Do Not Stuff Do Not Stuff Do Not Stuff DY Do Not Stuff
DY Do Not Stuff SM_DRAMRST#
2
SB to -1 2ND = 84.03904.P11 5 SM_DRAMRST# S
1
3rd = 84.03904.L06
D SM_DRAMRST#_D 1 2 DDR3_DRAMRST# 14,15
1
G 0R2J-2-GP
DY C3702 R3718
B Do Not Stuff B
Q3703
2
2ND = 84.2N702.031 SB to -1
Close to CPU 84.2N702.J31
DRAMRST_CNTRL_PCH 20
SB S3 Power Reduction Circuit SM_DRAMPWROK 2N7002K-2-GP
3D3V_S5 1D5V_S3
3D3V_S5 1D5V_S0 C3703

1
2 1DRAMRST_CNTRL_PCH
R3713 R3721 CEKLT V1.0: PCH to 1K,CUP to 200R
1
200R2F-L-GP DY Do Not Stuff SCD047U16V2KX-1-GP

R3702
200R2F-L-GP
2
5,19 PM_DRAM_PWRGD 1 IN B VCC 5

2
27,42,48 ALL_POWER_OK 1 R3701 2 0D75V_EN_1 2 IN A

0R2J-2-GP
1
3 4 VDDPWRGOOD_R 1 R3719 2 VDDPWRGOOD 5

C3701 GND OUT Y
U3701 130R2F-1-GP
2
74VHC1G09DFT2G-GP
Do Not Stuff
73.01G09.AAH R3720
DY Do Not Stuff
OD AND gate required DY

1
A HR UMA A
For U3701 not OD AND gate

R3719 to 64.15015.6DL Wistron Corporation
R3720 to 64.75005.6DL Taipei Hsien 221, Taiwan, R.O.C.
R3702 to DY
Title
ADAPTER
SM_DRAMPWROK must have a maximum of 15ns rise or fall time Size Document Number Rev
A3
over VDDQ * 0.55 200mV and the edge must be monotonic JE40-HR -1
5 4 3 2 1
5 4 3 2 1
ANNIE solution
D D
DCIN1
ACES-CON5-14-GP Adaptor in to generate DCBATOUT
20.F1701.005
2nd = 20.F1763.005 AD_JK
1Pin=3A NP1
1
2
3 PC3801 PC3802
1
SCD1U50V3KX-GP
4
SC1U50V5ZY-1-GP
5
1
NP2 DY
2
A
A
D3801 D3802
P6SBMJ27APT-GP Do Not Stuff
83.P6SBM.DAG Do Not Stuff
C 2nd = 83.P6SMB.JAG 2nd = 83.P6SMB.JAG C
3rd = 83.P6SMB.CAG 3rd = 83.P6SMB.CAG
JE40 change DCIN1 part number
PU3802
P1403EV8-GP
AD_JK AD+
84.P1403.B37
2ND = 84.04407.F37
1 S D 8
2 S D 7
3 S D 6
PWR_AD+_2 4 G D 5
2
3 PWR_ADJK_EN
1 R1 PR3807 PC3805
27 AD_OFF
1
B 2 200KR2F-L-GP SC1U50V5ZY-1-GP B
R2
PQ3801
2
R2
LTC024EUB-FS8-GP E
84.00024.A1K PWR_ADJK_EN B R1
2ND = 84.00124.H1K C
3rd = 84.05124.011
1
PQ3802 PR3808
PDTA124EU-1-GP 100KR2J-1-GP
84.00124.K1K
2nd = 84.00024.01K
2
3rd = 84.05124.A11
HR UMA
A A
Wistron Corporation
Title
DCIN JACK
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
BATTERY CONNECTOR
BT+
D D
1
PC3901 PC3902
SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
40 BATT_SENSE 1 PR3901 2
Do Not Stuff
9
1
PRN3901
SRN33J-7-GP BT+ 2 BAT1
1 8 3 TCN-CON8-7-GP
27 BAT_IN# 2 7 BAT_IN#_1 4 20.81362.008
3 6 BATA_SCL_1 5 2nd = 20.81371.008
27,40 BAT_SCL
4 5 BATA_SDA_1 6
27,40 BAT_SDA
7
8
10
C C
1
R3902
K
Do Not Stuff
PD3901
MMPZ5232BPT-GP-U
2
83.5R603.D3F
2ND = 83.5R603.K3F
A
3rd = 83.5R603.Q3F
EC Protect
B B
HR UMA
A
Title
BATT CONN
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
AD+ total power R1 R2 AD+ total power R1 R2

AD+ NEAR AD+_TO_SYS
65w 187k 49.9k 80w 137k 49.9k
8 D S 1 BT+
D S DCBATOUT
7
D S
2 90w 121k 49.9k
6 3
1
5 D G 4 PR4004
PR4021 AD+_TO_SYS
PU4001 100KR2J-1-GP 1 2 1 S D 8
P1403EV8-GP 2 S D 7
D01R3721F-GP-U AD+ S D
84.P1403.B37 3 6
2
D 2ND = 84.04407.F37 4 G D 5 D
AD+_G_2
ADD A 24V ZENAR
K
PU4002
1
AD+ P1403EV8-GP PD4002
2
PR4022 84.P1403.B37 SMF18AT1G-GP

PR4023 49K9R2F-L-GP PWR_CHG_REF 2ND = 84.04407.F37
10KR2F-2-GP
A
1
2 PG4001 PG4002
1
Do Not Stuff
Do Not Stuff
AD+_G_1 PD4001 PR4005
1
1SS400GPT-GP PR4007 470KR2J-2-GP

121KR2F-L-GP
83.SMF18.0AH
83.00400.C1F 2ND = 83.SMF18.AAH
2nd = 83.1S400.B2F
2
R1
2
DC_IN_D
AD+
PWR_CHG_ICREF
1
STOP_CHG#
27 STOP_CHG#
1
PQ4001
2N7002KDW-GP PC4001
DCBATOUT
SC1U25V5KX-1GP
PC4004
84.2N702.A3F 20101018
2
2nd = 84.DM601.03F R2 PC4002 JE40 HR RF
6
1 2 2 1PWR_CHG_CSSP 2 1 1 2
PR4008
1
SCD1U50V3KX-GP PC4003 SCD1U25V3KX-GP
1
SC4D7U25V5KX-GP
PR4006 49K9R2F-L-GP SCD1U50V3KX-GP RFC4025 RFC4024 RFC4023
20100721
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
316KR3F-2-GP CHG_AGND CHG_AGND PC4006
1
AC_OK CHG_AGND PC4005 PC4025 Do Not Stuff
2
PU4004
ICREF
2
5
6
7
8
SC4D7U25V5KX-GP
PWR_CHG_DCIN22 84.04178.037
20100706 Wayne 28
2
DCIN CSSP
D
D
D
D
SI4178DY-T1-GE3-GP
83.R0203.08F 2nd = 84.08884.037 DY
C PWR_CHG_ACIN 2 2nd = 83.1R003.I8F C
ACIN PWR_CHG_CSSN
CSSN 27
3D3V_AUX_S5 11 26 PWR_CHG_ICOUT 1 PR4012 2STOP_CHG# PD4003 PC4009
VDDSMB ICOUT Do Not Stuff
G
K A 1 2 4
S
S
S
25 PWR_CHG_BOOT CH520S-30PT-GP SC1U10V3KX-3GP
3
2
1
BOOT
1
PC4007 PR4011 21 PWR_CHG_VDDP

VDDP
1
PR4010 SCD01U50V2KX-1GP AC_OK 1 2PWR_CHG_ACOK 13 PL4001

ACOK
1
49K9R2F-L-GP Do Not Stuff IND-4D7UH-173-GP

PC4008 24 PWR_CHG_UGATE 68.4R71C.10K BT+
2
SC1U10V3KX-3GP UGATE
10 2nd = 68.4R710.20D PR4017
2
27,39 BAT_SCL SCL

1 2
23 PWR_CHG_PHASE PC4017 1 2 BT+_R 1 2
PHASE SCD1U50V3KX-GP
9 D01R3721F-GP-U
27,39 BAT_SDA SDA PWR_CHG_LGATE
LGATE 20
5
6
7
8
CHG_AGND
D
D
D
D
SI4134DY-T1-GE3-GP
PU4005 PG4003 PG4004 PC4018 PC4019 PC4020 PC4021 PC4022
1
Do Not Stuff
Do Not Stuff
14 NC#14 PGND 19 84.04134.037
CHG_AGND 2nd = 84.08878.037
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
18 PWR_CHG_CSOP
2
CSOP
SCD1U50V3KX-GP
CHG_AGND
2
G
S
S
S
PR4013 17 PWR_CHG_CSON PC4016
PWR_CHG_VICM CSON
1 2 8 2 1
4
3
2
1
27 AD_IA Do Not Stuff SC150P50V2JN-3GP VICM
PC4010 PR4014
1 2 PWR_CHG_FBO_RC 1 2 SCD1U50V3KX-GP
PR4015 4K7R2J-2-GP
1 2 PWR_CHG_FBO 6
B 200KR2F-L-GP PWR_CHG_EAI FBO B
5 EAI NC#16 16
1
PWR_CHG_EAO 4 BT+
PC4011 PC4012 PR4016 PWR_CHG_REF EAO
3 VREF
SC220P50V2KX-3GP SC2200P50V2KX-2GP 7K5R2F-1-GP PWR_CHG_CE 7
2
CE
2 1PWR_CHG_REF_RC 2 1 12 15
GND
GND VFB BATT_SENSE 39

1
PC4014
SC1U10V3KX-3GP
1 2 PC4023 PC4024
2
29
1
PC4013
1
SC56P50V2JN-2GP PU4003 PC4015
-1M
SC10U25V5KX-GP
Do Not Stuff
BQ24745RHDR-GP SCD1U25V2ZY-1GP
2
74.24745.073 2
1 PR4018 2
CHG_AGND Do Not Stuff
CHG_AGND
CHG_AGND
RN4001
4 1
-1M
3D3V_AUX_S5 3 2 PWR_CHG_CE
G CHG_ON#
SRN100KJ-6-GP CHG_ON# 27
A
PWR_CHG_CE D HR UMA A
DY S
1
C433
PWR_CHG_REF Do Not Stuff PQ4002 Wistron Corporation
2N7002K-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
84.2N702.J31 Taipei Hsien 221, Taiwan, R.O.C.

2 PR4019 1 AC_OK
AC_OK 27 2ND = 84.2N702.031 Title
10KR2F-2-GP AC_OK to KBC CHARGER BQ24745
A3
JE40-HR -1
5 4 3 2 1
A B C D E
3D3V_S5 3D3V_PWR 5V_PWR 5V_S5

PG4109 PG4115
1 2 1 2
Do Not Stuff DCBATOUT PWR_3D3V_DCBATOUT DCBATOUT PWR_5V_DCBATOUT Do Not Stuff

PG4110 PG4116
1 2 SBcheck power team PG4105 1 2
PG4101 1 2
Do Not Stuff 1 2 PWR_5V_ENTRIP1 PWR_3D3V_ENTRIP2 Do Not Stuff
PG4111 Do Not Stuff PG4117
1
1 2 Do Not Stuff PG4106 1 2
1
PG4102 PC4105 DY PR4104 PR4103 1 2
Do Not Stuff 1 2 Do Not Stuff 110KR2F-GP PC4106 DY 118KR2F-1-GP Do Not Stuff
2
PG4112 Do Not Stuff Do Not Stuff PG4118
2
2
4 PG4103 4
1 2
Do Not Stuff 1 2 Do Not Stuff
PG4104 1 2
Do Not Stuff 1 2 Do Not Stuff
1 2 Do Not Stuff 1 2
20100728
DCBATOUT
PWR_3D3V_DCBATOUT PWR_5V_DCBATOUT
Iomax=6A
20100721 OCP>9A
JE40 HR RF 20100715 PC4113 20100721 JE40 HR RF
20100715
SCD01U50V2KX-1GP
1
1
RFC4133 RFC4134DYRFC4135 RFC4131

1
1
SCD01U25V2KX-3GP
Do Not Stuff
SC56P50V2JN-2GP
PC4129 PC4112 PC4110
D 2nd source 74.51123.073 PC4111 PC4114 PC4116 RFC4130
2
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
RFC4132
2
8
7
6
5
5
6
7
8
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC1000P50V3JN-GP-U
SCD1U25V3KX-GP
DPU4104
2
2
D
D
D
D
SI4178DY-T1-GE3-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-GP
D
D
D
D
PU4101 PU4103
84.04178.037 RT8223MGQW-GP-U1 SI4178DY-T1-GE3-GP
16
20100715 20100715
2
2nd = 84.08884.037 74.08223.A73 84.04178.037
2nd = 84.08884.037
VIN
PR4105 PR4106
G
4 4
S
S
S
2D2R3-1-U-GP 2D2R3-1-U-GP SCD1U25V3KX-GP
S
S
S
PL4101 PC4115 PC4118 PL4102

S G G S
1
2
3
3
2
1
IND-2D2UH-122-GP 2 1PWR_3D3V_BOOT1
1 2PWR_3D3V_BOOT2 9 22 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2 IND-2D2UH-122-GP
BOOT2 BOOT1
68.2R21B.10J 68.2R21B.10J
3 3D3V_PWR 2nd = 68.2R210.20B SCD1U25V3KX-GP PWR_3D3V_UGATE2 10 21 PWR_5V_UGATE1 2nd = 68.2R210.20B 5V_PWR 3
UGATE2 UGATE1
2 1 PWR_3D3V_PHASE2 11 20 PWR_5V_PHASE1 1 2
PHASE2 PHASE1
PWR_3D3V_LGATE2 12 PWR_5V_LGATE1
D LGATE2 LGATE1 19
1
PC4119 PTC4102
D
8
7
6
5
5
6
7
8
SCD1U50V3KX-GP
SE220U6D3VM-21-GP
D
D
D
D
PD4101 Do Not Stuff
D
D
D
D
SI4134DY-T1-GE3-GP
PD4102 Do Not Stuff

PG4121 PU4102 PWR_3D3V_VOUT2 7 24 PWR_5V_VOUT1 PG4124 PC4120 77.52271.04L
2
VOUT2 VOUT1
1
1
Do Not Stuff
Do Not Stuff
SCD1U50V3KX-GP
84.04134.037
SI4134DY-T1-GE3-GP
3G_RF 2nd = 84.08878.037 PWR_3D3V_FB2 PWR_5V_FB1

Iomax=5A 5 FB2 FB1 2
DY DY
2
3D3V_S5
OCP>7.5A Matsuki cap 220uF
2
2
G
S
S
S
DYDo2 NotPWR_5V3D3V__EN0 3G_RF
S
S
S
G
1 13 23
2
2
PTC4101 PR4109 Stuff EN PGOOD 6.3V, ESR=17mohm
G S
1
2
3
4
4
3
2
1
1
SE220U6D3VM-21-GP PWR_3D3V_ENTRIP2 6 PWR_5V_ENTRIP1
77.52271.04L
S G PWR_5V3D3V_VREF ENTRIP2 ENTRIP1 1
DYPR4110
3 REF PGND 15 Do Not Stuff
1
SCD22U10V2KX-1GP
PC4122
PWR_5V3D3V_TONSEL 4 25
2
TONSEL GND PU4105
Matsuki cap 220uF
3V_5V_POK 19 84.04134.037
2
6.3V, ESR=17mohm PWR_5V3D3V_SKIPSEL 14 18 PWR_5V3D3V_ENC 2nd = 84.08878.037

SKIPSEL ENC
20100723
VREG3
VREG5
20100715
2
1
PR4113
PWR_5V3D3V_VREG5 17
PR4111 PR4112 5V_AUX_S5 Do Not Stuff DCBATOUT
7K32R2B-GP Do Not Stuff 3D3V_AUX_S5
DY
PWR_5V3D3V_VREG3
K
PG4122 PG4123
1
DCBATOUT PD4105
1 2 1 2 Vz=3.9V
2
1 2
3V_5V_EN 36
1
PWR_3D3V_FB2_R MMPZ5228BPT-GP
PC4124 Do Not Stuff Do Not Stuff PR4114
SB to -1 change 7K32
1
2 2
DYDo Not Stuff Do Not Stuff DY PR4115
1 A
33KR2F-2-GP PR4125
2
100KR2F-L1-GP
1 2
PWR_5V_FB1_R PU4106 PR4128
1
2N7002DW-7F-GP 4K02R2F-GP
2
PR4116 PC4128 DY
1
10KR2F-2-GP PC4125 PC4126 Do Not Stuff
2
SC4D7U6D3V5KX-3GP
PR4126
2
DY 1
SC10U6D3V3MX-GP
Do Not Stuff 4 3 PWR_5V3D3V__EN0

2
1
TONSEL CH1 CH2 PR4119 5 2
PR4117 21K5R2F-GP
1
GND 200kHz 250kHz
Close to VFB Pin (pin5)
3D3V_AUX_S5 2
DY 1
Do Not Stuff
6 1
PR4127
1
VREF 300kHz 375kHz 6K98R2-GP
PWR_5V3D3V_VREF 2 PR4118 1 PR4129
Do Not Stuff VREG3 or VREG5 400kHz 500kHz 750KR2F-GP
-1 EE modiyf PR4115 to 33K2 for SIV
2
2 PR4120
1 Close to VFB Pin (pin2)
PWR_5V3D3V_VREF DY
2
Do Not Stuff
SKIPSEL VREG3 or VREG5 VREF(2V) GND
3D3V_AUX_S5 2 PR4121 1
Do Not Stuff
Operating OOA Auto Skip Auto Skip
PR4123 Mode PWM only
2 1
DY Do Not Stuff
1 1
HR UMA
Wistron Corporation
Title
5V/3D3V(RT8223M)
Custom
JE40-HR -1
A B C D E
5 4 3 2 1
-1 20100921
SC220P50V2KX-3GP
PR4249
2 1
UMA_Muxless VCC_GFXCORE
PR4230
1
PWR_GFXCORE_VW
2KR2F-3-GP
PC4234
1 2
1
UMA_Muxless
2
2
PR4201 PC4201 UMA_Muxless PC4221 DY
8K06R2F-GP SC1000P50V3JN-GP-U 10R2F-L-GP
1 2
UMA_Muxless UMA_Muxless
1
Do Not Stuff VCC_AXG_SENSE 9
2
PC4222
SCD068U10V2KX-1GP
VSS_AXG_SENSE 9
2
D UMA_Muxless UMA_Muxless UMA_Muxless UMA_Muxless D
2
PC4202 PR4203 PC4203
PR4202 1 2 1 2 1 2
1 2
PC4223 UMA_Muxless
Parallel
Do Not Stuff SC1000P50V3JN-GP-U PR4231 -1M
SC39P50V2JN-1GP 422R2F-2-GP SC680P50V2KX-2GP 1 2
DY UMA_Muxless UMA_Muxless PC4224 DY Do Not Stuff
1
UMA_Muxless UMA_Muxless PR4205 10R2F-L-GP 1 2

PC4204 PR4204
JE40 to KBC? 1 2 1 2 1 2 PWR_GFXCORE_ISP 44 UMA_Muxless UMA_Muxless
SB 20100908 PWR_GFXCORE_ISN 44
PWR_GFXCORE_COMP
PR4234
SB 20100908SC150P50V2KX-GP 475KR2F-GP 2K49R2F-GP PR4233
1 2 2 1
Do Not Stuff
StuffTP8702
TP8702 PWR_GFXCORE_IMON PR4232
PWR_GFXCORE_PROG2
1
-1M
PWR_GFXCORE_VSEN
1 2 NTC-470K-9-GP3K83R2F-GP
PWR_GFXCORE_RTN
PWR_GFXCORE_NTC
1
PWR_GFXCORE_ISN
PWR_GFXCORE_ISP
1D05V_VTT 24K9R2F-L-GP
PWR_GFXCORE_FB
UMA_Muxless
1
PR4206 PC4206
UMA_Muxless PC4205 1 2 PWR_GFXCORE_BOOT PWR_GFXCORE_BOOT 44 2 PR4235 1
21KR2F-GP PWR_GFXCORE_HG PWR_GFXCORE_HG 44
2
SCD015U25V2KX-GP
SCD1U10V2KX-4GP PWR_GFXCORE_PH PWR_GFXCORE_PH 44 27K4R2F-GP UMA_Muxless
2
VSS_AXG_SENSE PWR_GFXCORE_LG PWR_GFXCORE_LG 44 NTC place near high side MOSFET of Phase1
PR4210 Close to CPU PWR_VCCCORE_PWM3 43
1
1
1 TP8705Do Not Stuff PR4209
2
75R2F-2-GP
PR4211
130R2F-1-GP
54D9R2F-L1-GP
3D3V_S0 PR4236
49
48
47
46
45
44
43
42
41
40
39
38
37
0R2J-2-GP
PR4208 DY 5V_S5
FBG
VSENG
RTNG
ISPG
ISNG
NTCG
PROG2
BOOTG
UGG
PHG
LGG
GND
COMPG
2
1
1 2 PR4237
1
8 H_CPU_SVIDDAT 0R2J-2-GP PR4213 1 2
C 1K91R2F-1-GPUMA_Muxless C
2
PR4212 1 36 PWR_VCCCORE_BOOT2 43 Do Not Stuff
VWG BOOT2 PR4238 PR4247
1 2 JE40 to TP? 2 35 PWR_VCCCORE_HG2 43
2
8 VR_SVID_ALERT# 0R2J-2-GP Do Not Stuff
StuffTP8701
TP8701 IMONG UG2
1 3 PGOODG PH2 34 PWR_VCCCORE_PH2 43 0R2J-2-GP Do Not Stuff
PWR_VCCCORE_SDA 4 33
PR4214 PWR_VCCCORE_ALERT# SDA VSSP2
5 32 PWR_VCCCORE_LG2 43 DIS
1
PWR_VCCCORE_SCLK ALERT# LG2 PWR_VCORE_VDDP
1 2 6 31
8 H_CPU_SVIDCLK
1 PR4215 2 0R2J-2-GP PWR_VCCCORE_VRON SCLK VDDP PWR_VCCCORE_PWR3_R -1M
PWR_GFXCORE_ISN
27,37,48 ALL_POWER_OK 7 VR_ON PWM3 30
1
SC1U10V2KX-1GP
PR4216 1 DY
Do Not Stuff
2 Do Not Stuff PR4217 1 2 1K91R2F-1-GP PWR_VCCCORE_PGD 8 29 PWR_VCCCORE_LG1 43 PC4225 PC4226
19,27 S0_PWR_GOOD PWR_VCCCORE_IMON PGOOD LG1
3D3V_S0 9 IMON VSSP1 28
SC1U10V2KX-1GP
10 27 PWR_VCCCORE_PH1 43
2
Do Not Stuff
StuffTP8703
TP8703 PWR_VCCCORE_IMON 28,36 IMVP_PWRGD PWR_VCCCORE_NTC VR_HOT# PH1
1 11 NTC UG1 26 PWR_VCCCORE_HG1 43
JE40 to TP? PWR_VCCCORE_VW 12 25 PWR_VCCCORE_BOOT1 43
VW BOOT1
1
ISEN3/FB2
1D05V_VTT 1PR4219 DY 2
1
PR4218 SB Do Not Stuff
PROG1
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
17K8R2F-GP PC4207
VDD
RTN
5,27 H_PROCHOT#
1
VIN
SCD047U25V2KX-GP PU4201
FB
2
PC4208 ISL95831HRTZ-T-GP
-1M
2
SC47P50V2JN-3GP 74.95831.A73
2
13
14
15
16
17
18
19
20
21
22
23
24
8 VSSSENSE
PC4209 PR4239
-1M 20100804
PWR_VCCCORE_ISEN3
PWR_VCCCORE_ISEN2
PWR_VCCCORE_ISEN1
1 2 PWR_VCCCORE_COMP PWR_VCORE_PRG11 2
PWR_VCORE_VDD
PWR_VCORE_ISUMN
DY Do Not Stuff PWR_VCCCORE_FB
0R2J-2-GP PWR_DCBATOUT_VCCCORE For Discrete only,
PR4220 PR4221 PWR_VCORE_VIN 1 PR4240 2
1 2 1 2
-1 20100921 Do Not Stuff UMA need to DUMMY
PR4248
3K83R2F-GP NTC-470K-9-GP 1 2 1 2 PC4233
B 2KR2F-3-GP PR4241 5V_S5 B
Place near high side MOSFET of Phase1 SC560P50V2KX-2GP 1 2

1 2
PR4222 27K4R2F-GP 1R2F-GP
1
PC4215 PC4227 1 PC4228
SC1U10V2KX-1GP
SCD22U25V3KX-GP
1 2 43 PWR_VCCCORE_ISEN1 PWR_VCCCORE_ISEN1
2
2
SCD22U10V2KX-1GP 43 PWR_VCCCORE_ISEN2 PWR_VCCCORE_ISEN2
1
PR4223
PC4216 43 PWR_VCCCORE_ISEN3 PWR_VCCCORE_ISEN3
2
8K06R2F-GP
PC4210 PWR_VCCCORE_VSUM-
1 2
SC1000P50V3JN-GP-U SCD22U10V2KX-1GP
2
PC4217
1 2 SB 20100831
SCD22U10V2KX-1GP PWR_VCCCORE_VSUM+ PWR_VCCCORE_VSUM+ 43
PR4243
1
DY PC4212 PR4225 PC4214
2K61R2F-1-GP
1 2 1 2 1 2 1 2
PR4224 Do Not Stuff PC4229 PC4230
SC39P50V2JN-1GP 499R2F-2-GP SC470P50V-2-GP PR4242
1
1
SCD22U10V2KX-1GP
SCD1U10V2KX-4GP
11KR2F-L-GP
PR4227 SB to -1 modify to 3K09
2
PC4211 DY Place near choke of Phase1
PWR_VCCCORE_ISEN3 1 2 1 2 1 2 1 2
2
1
PR4226 316KR2F-GP
Do Not Stuff PC4213 PR4244
3K09R2F-1-GP 2
NTC-10K-27-GP HR UMA
A
SC150P50V2KX-GP A
PR4228
PR4245
1 2
VCC_CORE
1 2 PWR_VCCCORE_VSUM- 2 PWR_VCCCORE_VSUM- 43
Wistron Corporation
1
10R2F-L-GP PC4218 DY PC4220 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
1 2 1K3R2F-1-GP Taipei Hsien 221, Taiwan, R.O.C.

SC330P50V2KX-3GP
PC4232
2
8 VCCSENSE Do Not Stuff PR4246 SCD1U10V2KX-4GP Title

2
8 VSSSENSE 1 2 1 DY 2 CPU Core-1(ISL95831)

PR4229
1
PC4219
2
PC4231
DY Do Not Stuff Size Document Number Rev
Parallel 1 2 SC1000P50V3JN-GP-U Do Not Stuff A3
JE40-HR -1
10R2F-L-GP Date: Thursday, December 02, 2010 Sheet 42 of 102
5 4 3 2 1
5 4 3 2 1
PWR_DCBATOUT_VCCCORE JE40 HR RF
1
RFC4320 RFC4319 RFC4321
1
PC4313 PC4314 PC4315 PC4316
5
6
7
8
SC1000P50V3JN-GP-U
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
PR4314
2
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DCBATOUT PWR_DCBATOUT_VCCCORE 2PWR_VCCCORE_BOOT1_1 PU4308
SIR172DP-T1-GE3-GP
1
2
42 PWR_VCCCORE_BOOT1
PG4305 84.00172.037
1 2 2D2R3-1-U-GP 2nd = 84.08030.037
1
Do Not Stuff
G
S
S
S
PG4306 PC4318
1 2 SCD22U25V3KX-GP
4
3
2
1
VCC_CORE
Do Not Stuff
D PG4307
42 PWR_VCCCORE_HG1 SB 20100908 D
1 2 42 PWR_VCCCORE_PH1 1 2
Do Not Stuff PL4303

42 PWR_VCCCORE_LG1
5
6
7
8
1
4
L-D36UH-1-GP PTC4309
PG4308
Do Not Stuff
2
1
D
D
D
D
68.R3610.20A PG4318 PTC4301 PTC4302 PTC4308
1 2
NEC
Do Not Stuff
PU4309 2nd = 68.R3610.10M
SE470UF2VDM-GP
SE470UF2VDM-GP
Do Not Stuff
SE470UF2VDM-GP
Do Not Stuff SIR166DP-T1-GE3-GP
2
PG4309 84.00166.037 Non_NEC
2
3
1 2 2nd = 84.08028.037 PG4317 Non_NEC Non_NEC
G
S
S
S
PWR_VCCCORE_VSUM-_1
Do Not Stuff
4
3
2
1
PG4310
1 2
PR4315
Do Not Stuff DY
1 2 PWR_VCCCORE_ISEN2 42
1
Do Not Stuff
PTC4306 PR4316
SE47U25VM-11-GP
PWR_VCCCORE_VSUM+_1
DY
2
Do Not Stuff
PR4317
1 2 PWR_VCCCORE_VSUM- 42
1R2F-GP
PR4318
Vcc_core
84.00172.037 10KR2F-2-GP Iomax=53A
SIR172DP-T1-GE3 PR4319
Id=20A, Qg=9.8~15nC, 2 1 PWR_VCCCORE_VSUM+ 42
OCP>97.5A
Rdson=10.3~12.4mohm 3K65R2F-1-GP
PWR_DCBATOUT_VCCCORE
JE40 HR RF
RFC4322
1
SC4D7U25V5KX-GP
DCBATOUT PWR_DCBATOUT_VCCCORE RFC4327 RFC4323
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
PC4308 PC4310 PC4311
SIR172DP-T1-GE3-GP
C PG4311 C
5
6
7
8
SC1000P50V3JN-GP-U
1 2 PR4308
2
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2PWR_VCCCORE_BOOT2_1 PU4305
2
Do Not Stuff 42 PWR_VCCCORE_BOOT2
84.00172.037
PG4312 2D2R3-1-U-GP 2nd = 84.08030.037 68.R3610.20A
1
1 2
PC4312 0.36uH, Idc=24A
G
S
S
S
Do Not Stuff SCD22U25V3KX-GP PL4302 DCR=1.1 mohm
2
PG4313 L-D36UH-1-GP
4
3
2
1
1 2 68.R3610.20A VCC_CORE
42 PWR_VCCCORE_HG2 2nd = 68.R3610.10M SB 20100910
Do Not Stuff
PG4314 1 2
42 PWR_VCCCORE_PH2
1 2
42 PWR_VCCCORE_LG2
5
6
7
8
1
Do Not Stuff PG4304 PTC4303 PTC4304 PTC4305
20100804
2
D
D
D
D
PG4315
Do Not Stuff
Do Not Stuff
DY
SE470UF2VDM-GP
Do Not Stuff
SE470UF2VDM-GP
1 2 PU4306
2
SIR166DP-T1-GE3-GP 79.47719.2BL
Do Not Stuff 84.00166.037 PG4303 Non_NEC Non_NEC
1
PG4316 2nd = 84.08028.037 Pana 470u , 2V
G
S
S
S
1 2 ESR=6m, Iripple=3.5A
4
3
2
1
Do Not Stuff
1
DY PTC4307
Do Not Stuff PR4309
PWR_VCCCORE_VSUM-_2
2
DY
1 2
Do Not Stuff
PWR_VCCCORE_ISEN1 42
PWR_VCCCORE_VSUM+_2
84.00164.037 PR4310
SIR164DP-T1-GE3 DY
1 2
Do Not Stuff
Id=22.8A,Qg=40.6~61nc,
Rdson=2.6~3.2mohm PR4311
1R2F-GP
PR4312
B 2 1 B
10KR2F-2-GP
PR4313
2 1 PWR_VCCCORE_VSUM+ 42
3K65R2F-1-GP
PWR_DCBATOUT_VCCCORE
5V_S5
PR4302
1
1
1 2PWR_VCCCORE_BOOT3_1 PC4303 PC4305 PC4306
PC4301 PWR_VCCCORE_BOOT3
5
6
7
8
SC1U10V2KX-1GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DCBATOUT PWR_DCBATOUT_VCCCORE 2D2R3-1-U-GP
2
2
2
D
D
D
D
SIR172DP-T1-GE3-GP
PG4319
1 2 PR4301 PU4304
0R2J-2-GP 84.00172.037
2
Do Not Stuff 2nd = 84.08030.037

PG4320 PC4302
1
G
S
S
S
1 2 SCD22U25V3KX-GP
2
5
PL4301
20100728
4
3
2
1
Do Not Stuff L-D36UH-1-GP VCC_CORE

VCC
BOOT
PG4321
20100728 68.R3610.20A
1 2 PWR_VCCCORE_HG3 2nd = 68.R3610.10M
2 7 PWR_VCCCORE_PH3 1 2
Do Not Stuff 42 PWR_VCCCORE_PWM3 PWM PHASE PWR_VCCCORE_HG3
UGATE 8
PG4322 4 PWR_VCCCORE_LG3
LGATE
5
6
7
8
1 2 6 PG4301
FCCM
D
D
D
D
PG4302
GND
GND
Do Not Stuff
Do Not Stuff
Do Not Stuff
PG4323 PU4303
1 2 PU4302 SIR166DP-T1-GE3-GP
9
3
ISL6208CRZ-TGP-U 84.00166.037
PWR_VCCCORE_VSUM-_3
1
1
G
S
S
S
Do Not Stuff 74.06208.073 2nd = 84.08028.037

PG4324 PR4303
4
3
2
1
PWR_VCCCORE_VSUM+_3
A
1 2 DY
1 2
Do Not Stuff
PWR_VCCCORE_ISEN1 42 A
Do Not Stuff
PR4304
PWR_VCCCORE_VSUM+_3
DY
1 2
Do Not Stuff
HR UMA
PR4305
1R2F-GP
Wistron Corporation
2 PR4306 1 PWR_VCCCORE_ISEN3 42
10KR2F-2-GP
PR4307 Title
2 1 PWR_VCCCORE_VSUM+ 42 CPU Core-2(ISL95831)
3K65R2F-1-GP Size Document Number Rev
A2
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_DCBATOUT_GFXCORE
PG4403
1 2
Do Not Stuff
PG4404
1 2
Do Not Stuff
84.00172.037
PG4405 SIR172DP-T1-GE3
1 2 Id=20A, Qg=9.8~15nC,
D D
Do Not Stuff Rdson=10.3~12.4mohm
PG4406
1 2
Do Not Stuff PWR_DCBATOUT_GFXCORE JE40 HR RF
PG4407
1 2
RFC4413
1
SC56P50V2JN-2GP
Do Not Stuff RFC4414 RFC4412
20100721
SCD01U25V2KX-3GP
PG4408 PC4401 PC4402 PC4403 PC4404
5
6
7
8
SC1000P50V3JN-GP-U
1 2 DY
2
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PU4401
SIR172DP-T1-GE3-GP
Do Not Stuff
2
2
Do Not Stuff 84.00172.037 UMA_Muxless UMA_Muxless UMA_Muxless
PG4409 2nd = 84.08030.037
1 2 UMA_Muxless UMA_Muxless UMA_MuxlessUMA_Muxless
G
S
S
S
Do Not Stuff
1
UMA_Muxless
4
3
2
1
PTC4404
SE47U25VM-11-GP PR4401
20100721
2
1 2 PWR_GFXCORE_BOOT_1
42 PWR_GFXCORE_BOOT
1R3J-L1-GP
VCC_GFXCORE
1
PC4407 Iomax=12A
SCD22U25V3KX-GP SB 20100908 OCP>18A
2
UMA_Muxless VCC_GFXCORE
C C
PL4401
42 PWR_GFXCORE_HG UMA_Muxless
42 PWR_GFXCORE_PH 1 2
IND-D36UH-9-GP
79.33719.2CL
Pana 330uF, 2.5V, 7343
42 PWR_GFXCORE_LG
1
PG4402 68.R3610.20K PTC4401 PTC4402
ESR=9m, Iripple=3A
2
PG4401 SE330U2VDM-L-GP SE330U2VDM-L-GP
Do Not Stuff
2
0.36uH, Idc=24A 79.33719.L01 79.33719.L01
Do Not Stuff
2
DCR=0.76+/-5% mohm UMA_Muxless UMA_Muxless
1
1
5
6
7
8
D
D
D
D
PU4403
SIR166DP-T1-GE3-GP
84.00166.037
2nd = 84.08028.037
UMA_Muxless
G
S
S
S
4
3
2
1
84.00164.037
PWR_GFXCORE_ISN_R
B SIR164DP-T1-GE3 B
Id=22.8A,Qg=40.6~61nc, PWR_GFXCORE_ISP_R
PC4408
Rdson=2.6~3.2mohm DY PR4402DY
20100906
2 1 1 2
1
Place near choke
PC4409 Do Not Stuff
UMA_Muxless SCD1U10V2KX-4GP Do Not Stuff
2
PR4403 PR4404
1 2 1 2 PWR_GFXCORE_ISN 42
NTC-10K-27-GP
UMA_Muxless
1
1R2F-GP 649R2F-GP
PC4410 PC4411 UMA_Muxless
1
PR4405
SCD068U16V2KX-GP
SCD022U25V2KX-GP
UMA_Muxless
PR4406
1 2
2
11KR2F-L-GP
UMA_Muxless PR4407
2
UMA_MuxlessUMA_MuxlessUMA_Muxless
7K5R2F-1-GP
PR4408
2
2 1 PWR_GFXCORE_ISP 42
10KR2F-2-GP
UMA_Muxless SB 20100831
A HR UMA A
Wistron Corporation
Title
CPU Core-3(ISL95831)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D05V_VTT 1D05V_PWR 1D05V_VTT

PG4513 PG4505
1 2 1 2
DCBATOUT PWR_DCBATOUT_1D05V
PG4501 Do Not Stuff Do Not Stuff
1 2 PG4514 PG4506
1 2 1 2
Do Not Stuff
PG4502 Do Not Stuff Do Not Stuff
D 1
Do Not Stuff
2
PG4503
TPS51218D for 1D05V PWR_DCBATOUT_1D05V
1
PG4515
Do Not Stuff
2 1
PG4507
Do Not Stuff
2
D
1 2 JE40 HR RF PG4516 PG4508

1 2 1 2
Do Not Stuff
1
PG4504 RFC4512 RFC4513 RFC4514 Do Not Stuff Do Not Stuff
SCD01U25V2KX-3GP
1 2 PG4517 PG4510
SC1000P50V3JN-GP-U
SC56P50V2JN-2GP
1 2 1 2
2
Do Not Stuff
1
PG4518 PG4509
PTC4501 DY 1 2 1 2
Do Not Stuff
2

PG4519 PG4511
1 2 1 2
PWR_DCBATOUT_1D05V PG4520 PG4512
1 2 1 2
1
PC4504 PC4506 PC4507 PC4511
SCD01U25V2KX-3GP
SCD1U25V3KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
20100728
2
C C
D
5
6
7
8
Id=12.9A
D
D
D
D
RMW150N03FUB-GP-U
Qg=9.8~15nC PU4502
Rdson=10.3~12.4mohm 84.15N03.037 20100728
2nd = 84.08065.037
G
4
2nd source 74.08237.073
S
S
S
Freq=360KHz Iomax=14A
3
2
1
PR4516
PU4501
TPS51218DSCR-GP-U1
G S Mag. 0.56uH 10*10*4 OCP>21A
2 1 74.51218.073 PR4505 PC4503 DCR=1.6~1.8mohm
3D3V_S0
10KR2J-3-GP SB 20100831 2D2R3-1-U-GP SCD1U25V3KX-GP Idc=25A, Isat=40A
1 11 1D05V_PWR
37,48 1.05VTT_PWRGD PGOOD GND
1 PR4504 2 PWR_1D05V_IMAX 2 10 PWR_1D05V_BOOT 1 2 PWR_1D05V_BOOT_R 1 2
46,47 RUNPWROK 1 2 PWR_1D05V_EN 3
TRIP
EN
VBST
DRVH 9 PWR_1D05V_UGATE 20100906
PR4512 82KR2F-1-GP PWR_1D05V_VFB 4 8 PWR_1D05V_PHASE 1 2
VFB SW
SCD1U50V3KX-GP
0R2J-2-GP PWR_1D05V_CCM 5 7 5V_S5 PL4501
RF V5IN PWR_1D05V_LGATE IND-D56UH-27-GP
DRVL 6
1
1
SC1KP50V2KX-1GP
PC4505 68.R5610.10P PC4509
1
SC18P50V2JN-1-GP
PR4503 2nd = 68.R5610.20H PC4508
470KR2F-GP
D DY DY
2
2
5
6
7
8
PR4506 3G_RF
2
D
D
D
D
RMW180N03FUBTB-GP
PU4503 10R2F-L-GP
84.18003.037
2nd = 84.08062.037
2
VTT_SENSE_L PTC4502 PTC4503
B Do Not Stuff SE330U2VDM-L-GP B
G
4
1
S
S
S
Do Not Stuff 79.33719.L01
PR4507 2nd = 77.C3371.0512nd = 77.C3371.051
3
2
1
10KR2F-2-GP
G S
2
20100728 PWR_1D05V_VFB
Id=19.4A
Qg=16.8~25.5nC
1
Rdson=4.9~6.1mohm PR4508
20KR2F-L-GP
2
VTT_SENSE_L 1
PR4510 DYDo2 Not Stuff VCCIO_SENSE 8
VSS_SENSE_L 20100728
1
1
PC4510
DY Do Not Stuff 20100728 PR4509
2
10R2F-L-GP
VSS_SENSE_L 1
DYDo2 Not Stuff VSSIO_SENSE 8
Vout=0.704*(1+R1/R2)
2
PR4511
A HR UMA A
Wistron Corporation
Title
DC to DC_1D05V(TPS51218D)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
DCBATOUT PWR_DCBATOUT_1D5V
PG4601
1 2
Do Not Stuff
PG4602
1 2
Do Not Stuff PWR_DCBATOUT_1D5V

D PG4603 D
1 2 JE40 HR RF
Do Not Stuff 20100805 RFC4616
1
PG4604 RFC4617 RFC4618
SCD01U25V2KX-3GP
1 2
RT8207L for 1D5V
SC1000P50V3JN-GP-U
SC56P50V2JN-2GP
2
2
Do Not Stuff
1
PTC4601 DY
Do Not Stuff PR4604
2
PWR_1D5V_VCC5 2 1 5V_S5
5D1R2F-GP
1
SB 20100831
PC4606
SC1U10V2KX-1GP PWR_DCBATOUT_1D5V
20100906
2
1
1
PC4602
SC1KP50V2KX-1GP
PR4603
PC4611 PC4614 PC4616 PC4617 PC4615
1
12K4R2F-GP
1 2 PWR_1D5V_EN
19,27 PM_SLP_S4#
SCD1U25V3KX-GP
PR4612 Do Not Stuff PWR_1D5V_VDDP 1 PR4605 2 5V_S5 D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
Do Not Stuff
2
1
1
PC4612
5
6
7
8
DY Do Not Stuff C694
20100728
D
D
D
D
RMW150N03FUB-GP-U
SC1U10V2KX-1GP
2
2
PWR_1D5V_CS PU4602
Id=12.9A 84.15N03.037
2nd = 84.08065.037
3D3V_S5 Qg=9.8~15nC
G
4
S
S
S
Rdson=10.3~12.4mohm
3
2
1
PR4602
16
14
15
C C
10KR2F-2-GP
SB PC4609
G S
CS
VDDP
VDD
PR4606
Close to pin23
2
22 PWR_1D5V_BOOT 1 2 PWR_1D5V_PHASE_L 1 2 Mag. 1.0uH 10*10*4
13
BOOT 2D2R3-1-U-GP
Iomax=12A
45,47 RUNPWROK PGOOD DCR=2.9~3.3mohm
SCD1U25V3KX-GP OCP>20A
PWR_DCBATOUT_1D5V 1PR4610 2PWR_1D5V_TON 12 TON UGATE 21 PWR_1D5V_UGATE Idc=18A, Isat=36A
620KR2F-GP
PWR_1D5V_EN 11 1D5V_S3
20100728 S5
PWR_0D75V_EN 10 20 PWR_1D5V_PHASE 1 2
S3 PHASE
PG4605
1D5V_S3 1 2 PWR_1D5V_VTTIN 23 PL4601
VLDOIN IND-1UH-93-GP
1
Do Not Stuff PC4603 PWR_1D5V_LGATE 68.1R01B.10J

LGATE 19 D
1
PG4606 SC10U6D3V5MX-3GP 7 2nd = 68.1R01C.10Q PC4613 PTC4602
NC#7
5
6
7
8
Do Not Stuff
SE390U2D5VM-7GP
1 2
DY
2
D
D
D
D
RMW180N03FUBTB-GP
PU4603 79.3971V.30L
2
Do Not Stuff 1 18 84.18003.037 2nd = 79.3971V.6AL
VTTGND PGND
1D5V_S3 1
PG4607
2 PWR_1D5V_VDDQ 4 MODE
NC#17 17
-1 PR4608 32k4 2nd = 84.08062.037
Matsuki cap 390uF
PWR_1D5V_VDDQ
G
VDDQ 8 4
2.5V, ESR=10mohm
S
S
S
Do Not Stuff
PWR_1D5V_FB
Close to pin23 DDR_VREF_PWR 24 9
3
2
1
VTT FB
1
DY
1
2 PR4608
20100728 VTTSNS
VTTREF
6 33KR2F-GP PC4610
DEM 5V_S5
Do Not Stuff
Iomax=1A R1 G S
GND
GND
2
2
OCP>1.5A PU4601
RT8207LGQW-GP-U1
25
5
Close to output cap pin1, not 74.08207.B73
1
inside of the output cap 2nd source 74.51116.073 R2 PR4609 Vout=0.75*(1+R1/R2)
B
30KR2F-GP 20100728 B
Id=19.4A
1PWR_1D5V_VTTREF
2
Qg=16.8~25.5nC
Rdson=4.9~6.1mohm
1 PR4607 2 DDR_VREF_S3
Do Not Stuff
Close to PIN9
SB R4608 chekc 31K6R
+0.75VS PC4608
SCD033U16V2KX-GP Vout 1.55V
2
Iomax: 1.2A
PG4608
37 0D75V_EN 1 PR4615 2 PWR_0D75V_EN
0D75V_S0 1 2 DDR_VREF_PWR Do Not Stuff
Do Not Stuff
PG4609
1 2
Do Not Stuff
1
PC4604 PC4605
SC10U6D3V5MX-3GP
Do Not Stuff
DY
2
A A
HR UMA
Wistron Corporation
Title
TPS5111
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p8v
D
RT9025 for 1D8V_S0 D
3D3V_S0 5V_S5
C
Iomax>1A C
1
PC4701
1
SC10U6D3V5MX-3GP PC4702 OCP>2A
SC1U6D3V2KX-GP
2
2
PG4701
1 2
Vo(cal.)=1.812V 1D8V_LDO 1D8V_S0
Do Not Stuff
SB add PR4706 PC4707 PG4702
9
1 2
GND
4 5 Do Not Stuff
VDD NC#5
1
3 6 PC4704 PC4705 PC4706
PWR_1D8V_EN VIN VOUT
1 PR4706 2 PR4704
19,27,36,37,92 PM_SLP_S3# 2 EN ADJ 7
DY DY
Do Not Stuff
SC10U6D3V5MX-3GP
Do Not Stuff
Do Not Stuff 1 8 20K5R2F-GP
2
45,46 RUNPWROK PGOOD GND
2
PC4707 PU4701 PWR_1D8V_ADJ
1
B RT9025-25PSP-GP B
1
Do Not Stuff
DY 74.09025.03D PR4705
2
2nd = 74.09661.07D 16K2R2F-GP

3rd = 74.00105.03D
2
HR UMA
A
Title
LDO_1D8V(RT9025)
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
APL5916 for VCCSA

1D05V_VTT
PG4801
PWR_VCCSA_VIN 1 2
D D
Do Not Stuff
PG4802
1 2
20100614 V1.1
5V_S5 Do Not Stuff
for CRB board
3D3V_S0
1
PC4801 PC4802 PC4803
1
SC1U6D3V2KX-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
R4807
SB modify 2K2 for no run code Iomax=6A
2
2K2R2J-2-GP
OCP>9A
6
PG4803
VCCSA=0.85V 1 2
VCNTL
27,37,42 ALL_POWER_OK 7 5 0D85V_S0
POK VIN VCCSA_PWR Do Not Stuff
VIN 9
PG4804
37,45 1.05VTT_PWRGD 8 EN VOUT 3 1 2
VOUT 4 R1
1
Do Not Stuff
1
PR4804 PC4804 PG4805
1
2 10KR2F-2-GP 1 2
GND
FB
SC100P50V2JN-3GP
DY
2
Do Not Stuff
1
PC4809 PWR_VCCSA_FB PC4805 PC4806 PTC4801 PG4806
1
C Do Not Stuff U4801 1 2 C
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
APL5916KAI-TRL-GP
R2
2
1
74.05916.031 Do Not Stuff
DY
Do Not Stuff
1
PR4806 PG4807
PR4805 Do Not Stuff DY 1 2
150KR2F-L-GP
Do Not Stuff
2
PG4808
2
1 2
PWR_VCCSA_SEL1
Do Not Stuff
PQ4801
Vout=0.8*(1+R1/R2) Do Not Stuff
S D
VCCSA_SEL VCCSA_PWR
DY DY
G
L 0.9V PR4807
PWR_VCCSA_SEL0 1 2
B VCCSA_SEL 9 B
H 0.8V Do Not Stuff
1
DY PC4807
Do Not Stuff
A HR UMA A
Wistron Corporation
Title
LDO_VCCSA(APL5916)
A3
JE40-HR -1
5 4 3 2 1
SSID = VIDEO
LVDS CONNECTOR INVERTER POWER

F4901 DCBATOUT
DCBATOUT_LCD POLYSW-1D1A24V-GP-U
DCBATOUT_LCD
69.50007.A31
2nd = 69.50007.A41
31
NP1 2 1
1
2
SC4D7U25V5KX-GP
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
2 C4906 C4904 C4905
3
1
4
5 INT_MIC_L_R 29,97
6 DBC_EN_C 1 TP4901Do Not Stuff
7 BLON_OUT_C
1
8 LCD_BRIGHTNESS 2 33R2J-2-GP
1 LBKLT_CTL 94 Analogy
9 3D3V_CAMERA_S0R4902 EC4906
Microphone 0719
10 USB_CAMERA# 1 2 USB_PN12 18
11 USB_CAMERA 1 R4908 2 Do Not Stuff
USB_PP12 18
Do Not Stuff
12 R4909 Do Not Stuff For Camera GND
13 DY Camera Power
2
14 LVDSA_CLK_R 94
15 LVDSA_CLK_R# 94 F4902
16 FUSE-1D1A6V-4GP-U
3D3V_S0 3D3V_CAMERA_S0
17 LVDSA_DATA2_R 94 69.50007.691
18 LVDSA_DATA2_R# 94 2ND = 69.50007.771
19 1 2
20 LVDSA_DATA1_R 94
21 LVDSA_DATA1_R# 94
1
22 EC4903
C4903
23 LVDSA_DATA0_R 94 DY
Do Not Stuff
SC10U6D3V5MX-3GP
24 LVDSA_DATA0_R# 94
2
25
26 LVDS_DDC_DATA 94
27 LVDS_DDC_CLK 94
28 3D3V_S0
29
30
NP2 LCDVDD
SCD1U10V2KX-5GP
32
C4901
1
LCD1 C4902
PS-CON30-GP
20.F1816.030 SC1U6D3V2KX-GP
2
R4904
Do Not Stuff
2
DY 1 3D3V_S0
SSID = VIDEO
DBC_EN_C 2 1 DBC_EN 27
R4901
LCD POWER for ANNIE 33R2J-2-GP
1
For EMI request

R4906 Close to LVDS connector
LCDVDD DY Do Not Stuff
3D3V_S0 LCD_BRIGHTNESS
2
U4901 LVDSA_CLK_R#
Layout 40 mil LVDSA_CLK_R
94 LCDVDD_EN 1 EN IN#5 5
1
2 27 BLON_OUT 1 2 BLON_OUT_C EC4904 EC4905 EC4902
GND
Do Not Stuff
Do Not Stuff
Do Not Stuff
3 OUT IN#4 4 R4903
1KR2J-1-GP
DY DY DY
3G_RF
2
1
1
SC4D7U6D3V3KX-GP
C4907
1
R4914 C4909 C4908 G5285T11U-GP

100KR2J-1-GP
100KR2J-1-GP
SC100P50V2JN-3GP
74.05285.07F R4911 C4910

SC56P50V2JN-2GP
2
SC4D7U6D3V3KX-GP
2nd = 74.09724.09F
2
2
2
HR UMA
1
Wistron Corporation
Title
LCD Connector
Custom
JE40-HR -1
5 4 3 2 1
5V_CRT_S0
Pull High 5V Design on CRT Board 3D3V_S0
9 VCC_CRT NC#4 4 CRT DDCDATA & DDCCLK level shift 5V_HDMI
1 NC#11 11
1
CRT_DDCDATA_CON12 5V_CRT_S0 D5001
DDCDATA_ID1 500mA
SCD01U16V2KX-3GP
C5012 CRT_DDCCLK_CON 15 CH551H-30PT-GP

DDCCLK_ID3 CRT_IN#_R
5 83.R5003.C8F
2
D CRT_R GND 3D3V_S0 D

1 CRT_RED GND 6 2ND = 83.R5003.H8H
CRT_G 2 7 SB
2
CRT_GREEN GND
CRT_B 3 CRT_BLUE GND 8 3rd = 83.5R003.08F
GND 10
2
1
95 CRT_VSYNC_CON 14 VSYNC GND 16
5
6
7
8
13 17 RN5002 3D3V_S0
95 CRT_HSYNC_CON HSYNC GND
SRN2K2J-1-GP
CRT1 RN5003
D-SUB-15-54-GP SRN10KJ-6-GP
3
4
20.20873.015
4
3
2
1
4 3 CRT_DDCDATA_CON
95 DDCDATA
CRT_IN#_R
5 2
5V_S0
6 1
R5001 2
470R2J-2-GP D5002
95 DDCCLK
2 1 CRT_IN#_R 3 DY Do Not Stuff
C 27 CRT_DEC# Do Not Stuff CRT_DDCCLK_CON C
1 Q5001
1
2N7002KDW-GP
SC100P50V2JN-3GP
C5007 84.2N702.A3F
2nd = 84.DM601.03F
2
L5001
FCM1608CF-220T05-GP
CRT RGB 68.00245.011

2nd = 68.00230.021
95 CRT_RED_R 1 2 CRT_R CRT_DDCDATA_CON
L5002
1
FCM1608CF-220T05-GP C5008 CRT_HSYNC_CON
Do Not Stuff
Do Not Stuff
B 68.00245.011 B
1
95 CRT_GREEN_R 1 2 CRT_G C5009 CRT_VSYNC_CON
Do Not Stuff
L5003
1
FCM1608CF-220T05-GP CRT_DDCCLK_CON
C5010
DY DY
2
68.00245.011
1
95 CRT_BLUE_R 1 2 CRT_B
2
C5011
DY Do Not Stuff
DY
2
8
7
6
5
1
C5001 C5002 C5003
C5004 C5005 C5006
DY DY DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
2
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
RN5004
SRN150F-1-GP
1
2
3
4
HR UMA
0806 check RN5004
A
Title
CRT Connector
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
HDMI CONN
SSID = VIDEO HDMI Level Shifter & CONNECTOR
22
20
HDMI_DATA2_R
UMA_Muxless : default setting used PS8101. if don't used PS8101 1
please change C5103~C5110 to 0 ohm resister 2

HDMI_DATA2_R#
3
4 HDMI_DATA1_R
D 5 D
6 HDMI_DATA1_R#
7 HDMI_DATA0_R
8
9 HDMI_DATA0_R#
HDMI DISCRETE/ UMA Co-lay 10 HDMI_CLK_R
11
12 HDMI_CLK_R#
13
DIS_PX 14
DDC_CLK_HDMI
5V_HDMI 5V_S0
15
16 DDC_DATA_HDMI
VGA 17
5V_HDMI
HDMI_OE# 1 R5130
DY Do2 Not Stuff
HDMI_IN# 27
18 2 1
19
21 F5101
D
23 FUSE-1D1A6V-4GP-U
HDMI Connctor 69.50007.691 Q5106
2nd = 69.50007.771 2N7002K-2-GP
HDMI1
SKT-HDMI19P-78-GP-U 3D3V_VGA_S0 3D3V_S0 84.2N702.J31
22.10296.271 2ND = 84.2N702.031
2nd = 22.10296.311
PCH 3rd = 22.10296.501
S
SRN499R
UMA_Muxless HPD_HDMI_CON
5V_S0
2
2
C R5131 R5132 C
Do Not Stuff 0R2J-2-GP
DIS UMA_Muxless
HPD_HDMI_CON
1
1
SB to -1 add R5124,R5125 for DIS only HPD
Q5102
MMBT3904-4-GP
C
84.T3904.C11
0806 SB Cap change schematic to Page 84 1 2HDMI_HPD_B B 2ND = 84.03904.P11
R5111 3rd = 84.03904.L06
150KR2J-L1-GP
E
1
DIS
R5110 R5127
1 2Do Not Stuff HDMI_HPD_DET 84
HDMI_CLK# C5103 1DIS 2 Do Not Stuff HDMI_CLK_R# R5128
1 20R2J-2-GP
84 HDMI_CLK# HDMI_CLK C5104 1DIS 2 Do Not Stuff HDMI_CLK_R
Do Not Stuff
DY HDMI_PCH_DET 17
84 HDMI_CLK
UMA_Muxless
1
HDMI_DATA0# C5105 1DIS 2 Do Not Stuff HDMI_DATA0_R# D5102
84 HDMI_DATA0# HDMI_DATA0 C5106 Do Not Stuff HDMI_DATA0_R 3D3V_VGA_S0 3D3V_S0 BAW56-5-GP
84 HDMI_DATA0 1DIS 2
R5112 83.00056.Q11
10KR2J-3-GP
2nd = 83.00056.K11
2
1 5V_S0
HDMI_DATA1# C5110 1DIS 2 Do Not Stuff HDMI_DATA1_R#
84 HDMI_DATA1# HDMI_DATA1 C5107 Do Not Stuff HDMI_DATA1_R
84 HDMI_DATA1 1DIS 2 3
3D3V_VGA_S0
B B
2
2
HDMI_DATA2# C5108 1DIS 2 Do Not Stuff HDMI_DATA2_R# 2
84 HDMI_DATA2# HDMI_DATA2 C5109 Do Not Stuff HDMI_DATA2_R R5124 R5125
84 HDMI_DATA2 1DIS 2
Do Not Stuff 0R2J-2-GP
4
3
4
3
RN5102 DIS UMA_Muxless
Do Not Stuff
Close to HDMI Connector
1
1
RN5101
DIS_Muxless SRN2K2J-1-GP
8
7
6
5
8
7
6
5
1
2
1
2
RN5114 RN5115 RN5105 3D3V_HDMI
SRN499F-GP SRN499F-GP 5V Tolerance Do Not Stuff
17 HDMI_CLK_R#
17 HDMI_CLK_R DIS
2 3 HDMI_CLK_1 4 3 DDC_CLK_HDMI
84 GPU_HDMI_CLK
1 4 HDMI_DATA_1 DDC_DATA_HDMI
SB to -1 for vendor suggest 84 GPU_HDMI_DATA
1
2
3
4
1
2
3
4
17 HDMI_DATA0_R#
17 HDMI_DATA0_R 5 2
UMA_Muxless
17 HDMI_DATA1_R# 6 1
5V_S0 3D3V_VGA_S0 1 4
17 HDMI_DATA1_R 17 PCH_HDMI_CLK
17 PCH_HDMI_DATA 2 3
HDMI_PLL_GND Q5104
17 HDMI_DATA2_R# RN5106 2N7002KDW-GP
17 HDMI_DATA2_R SRN0J-6-GP 84.2N702.A3F
UMA_Muxless 2nd = 84.DM601.03F
D
. Q5105
2
2N7002E-1-GP
. R5133 R5134
. 84.2N702.E31 0R2J-2-GP Do Not Stuff
. .
A
84.2N702.D31 UMA_Muxless DIS A
HR UMA
G
S
Close to Level Shift Wistron Corporation

Title
HDMI Level Shifter/Connector

Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
LED BACKLIGHT CONVERTER POWER
D D
C C
B B
A HR UMA A
Wistron Corporation
Title
eDP
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
HR UMA
A
Title
S-VIDEO
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
H_CPURST# use pull-up Resistor close

ITP connector 500 mil ( max ),
others place near CPU side.
C C
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
B B
HR UMA
A
Title
ITP
A4
JE40-HR -1
5 4 3 2 1
SSID = SATA
SATA HDD Connector
HDD1
SKT-SATA7P+15P-32-GP
62.10065.921
16
S1
21 SATA_TXP0 SCD01U16V2KX-3GP 2 1 C5610 SATA_TXP0_C S2

21 SATA_TXN0 SCD01U16V2KX-3GP 2 1 C5609 SATA_TXN0_C S3
S4
21 SATA_RXN0 SCD01U16V2KX-3GP 1 2 C5602 SATA_RXN0_C S5
21 SATA_RXP0 SCD01U16V2KX-3GP 1 2 C5603 SATA_RXP0_C S6
S7
P1
P2
P3
P4
P5
P6
5V_S0 P7
P8
1
C5605 C5606 P9
SC10U10V5ZY-1GP
Do Not Stuff
DY P10
P11
2
P12
P13
P14
P15
17
ODD Connector SB SATA Zero Power ODD

ODD1
SKT-SATA7P-6P-90-GP
22.10300.C11
22 SATA_ODD_PWRGT
SB modify part number
U5601
Do Not Stuff ZOP
5V_S0 R5603 2 1 ODD_PWR_5V P2 P4 SATA_ODD_DA#_C Do Not Stuff 2 DY 1 R5602 Do Not Stuff
+5V MD SATA_ODD_DA# 18
0R5J-5-GP ODD P3 P1 SATA_ODD_PRSNT# 22
+5V DP 5V_S0
100 mil
GND S1 4 EN/EN# OC# 5
21 SATA_TXN4 SCD01U16V2KX-3GP 2 1 C5611 SATA_TXN4_C S3 S4 3 6 ODD_PWR_5V
SCD01U16V2KX-3GP A- GND IN#3 OUT#6
21 SATA_TXP4 2 1 C5612 SATA_TXP4_C S2 A+ GND S7 2 IN#2 OUT#7 7
1
GND P5 1 GND OUT#8 8
1
P6 R5604
GND
1
21 SATA_RXN4 SCD01U16V2KX-3GP2
SCD01U16V2KX-3GP2
1 C5607 SATA_RX4-_C S5 B- GND 14 DY Do Not Stuff TC5601
21 SATA_RXP4 1 C5608 SATA_RX4+_C S6 15 ZPO TC5602
Do Not Stuff
2
B+ GND
SC10U10V5ZY-1GP
Currentlimit
2
NP1 NP1
NP2 NP2 ActiveHigh
MIN=>2.01A
3D3V_S0
1
R5605
10KR2J-3-GP
3D3V_S0
RN5601
2
1 4 SATA_ODD_PWRGT
SATA_ODD_DA# SATA_ODD_DA#_C
ODD_PWRGT#
2 3
Do Not Stuff
ZPO
6
Q5601
Do Not Stuff
ZPO
Do Not Stuff HR UMA
2nd = 84.DM601.03F
1
Wistron Corporation
SATA_ODD_PWRGT SATA_ODD_DA#
0707 Modify: Title
Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD.
HDD/ODD
A3
JE40-HR -1
5 4 3 2 1
ESATA Power
D D
C C
USB CHARGER
B B
A HR UMA A
Wistron Corporation
Title
E-SATA/USB CHARGER
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO LINE1 OUT

Speaker Connector SPDIF
JE40 Modify LINE OUT

D D
Audio at small board
C C
MIC IN
B Internal B
Microphone
JE40 delete Line in function
A HR UMA A
Wistron Corporation
Title
Audio Jack
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
GIGA Lan Transformer XF5901

XFORM-12P-36-GP
SB modiyf Pin9 Pin10 SWAP CONN_PWR2
14
9
LED COLOR
68.HD081.30B GREEN 10(+) 9(-)::GREEN
Change:68.68160.30B 10 12(+) 13(-):ORANGE
SSID = LOM 2nd = 68.HD081.30B
31 10M/100M/1G_LED# RJ45_1 1
LAN MDI Off-Page RJ45_2 2

RJ45_3 3
1CT:1CT RJ45_4 4
31 MDI3+ 1 16 RJ45_7 RJ45_5 5
RJ45_6 6
RJ45_7 7
XRF_TDC1 3 14 MCT2 RJ45_8 8
CONN_PWR 12
D D
ORANGE
31 MDI3- 2 15 RJ45_8 31 LAN_ACT_LED# 13
Tx Side 15
1CT:1CT RJ45
31 MDI2- 7 10 RJ45_5 RJ45-12P-16-GP
22.10321.Y21
1
C5901 2nd = 22.10321.Y91

SCD1U10V2KX-5GP
XRF_TDC2 6 11 MCT1
2
RN5901
1
C5902 31 MDI2+ 8 9 RJ45_4 SRN470J-4-GP-U

SCD1U10V2KX-5GP
Rx Side 3D3V_S5 1 4 CONN_PWR2

2 3 CONN_PWR
2
1
XF5902 EC5901 EC5902
Do Not Stuff
Do Not Stuff
XFORM-12P-36-GP
68.HD081.30B
2
Change:68.68160.30B
2nd = 68.HD081.30B
DY DY
31 MDI1+ 1
1CT:1CT
16 RJ45_3
SB modify For EMI
XRF_TDC3 3 14 MCT4
U5904
31 MDI1- 2 15 RJ45_6 5V_S5 5
Tx Side U5901
5V_S5 5
1CT:1CT
C RJ45_2 C
31 MDI0- 7 10
2
1
C5903 XRF_TDC4 6 11 MCT3

SCD1U10V2KX-5GP
2 TVLST2304AD0-GP
6
SURGE
2
31 MDI0+ 8 9 RJ45_1 TVLST2304AD0-GP
6
1
C5904 Rx Side SURGE

SCD1U10V2KX-5GP
31 MDI0+
2
31 MDI1+
31 MDI0-
31 MDI1-
U5902
U5903 5V_S5 5
5V_S5 5
2
2
TVLST2304AD0-GP
6
TVLST2304AD0-GP SURGE
6
SURGE
31 MDI2+
31 MDI3+
B B
31 MDI2-
31 MDI3-
C5916
XRF_TDC1 1 2
DY Do Not Stuff
C5917
XRF_TDC2 1 2
DY Do Not Stuff
C5918
XRF_TDC3 1 2
DY Do Not Stuff
C5919
XRF_TDC4 1 2
DY Do Not Stuff
MCT1
MCT2
MCT3
MCT4
MDI1-
MCT3
MCT4
MCT1
MCT2
MDI0+
MDI1+
MDI2+
MDI3+
MDI0-
MDI2-
MDI3-
LAN_ACT_LED#
1
1
10M/100M/1G_LED# GDT1 GDT2 GDT3 GDT4
1
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
R5903 R5901 R5902 R5904
2
A A
EC5910 EC5909 EC5903 EC5904 EC5905 EC5906 EC5908 EC5907
1
2
1
1
Do Not Stuff
Do Not Stuff
SC6D8P50V2CN-GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
HR UMA
C5907 DY C5906 DY
Do Not Stuff
SURGE SURGE SURGE SURGE

2
2
Do Not Stuff
MCT_R
Wistron Corporation
1
C5905
SC1KP2KV6KX-GP Title
2
LAN CONNECTOR
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SPI FLASH ROM (4M byte) for PCH 3D3V_S5 SPI ROM Equal length need to less than 500mil
SPI ROM Equal length need to less than 500mil
SSID = Flash.ROM 3D3V_S5
1
Do Not Stuff
C6001 C6002
SCD1U10V2KX-5GP
2
2
DY
8
7
6
5
D D
RN6001
SRN4K7J-10-GP
SYSTEM SB 3D3V_SPI, 3D3V_S5,
SPI ROM
1
2
3
4
SPI_HOLD_0#
3D3V_S5
21,27 SPI_CS0#_R 1 CE# VDD 8

21,27 SPI_SO_R 1 2 SPI_SO 2 7
R6001 SPI_WP# SO HOLD#
3 WP# SCK 6 SPI_CLK_R 21,27
33R2J-2-GP 4 5 SPI_SI_R 21,27
VSS SI
1
DY
1
EC6002 U6001
Do Not Stuff SST25VF032B-80-4I-S2AF-GP EC6003 DY DY EC6001
Do Not Stuff
72.25032.D01 Do Not Stuff
2
2ND = 72.25P32.C01
3rd = 72.25Q32.A01
C C
Q6001
SSID = RBATT CH715FPT-GP
2nd = 83.00040.E81 +RTC_VCC
83.R0304.B81 R6002
RTC_AUX_S5 1KR2J-1-GP
1 RTC_PWR 1 2 1 PWR
2 GND
3 Width=20mils NP1 NP1
2
NP2 NP2 JE40 change RTC part number
2
C6003 DY RTC1
Do Not Stuff BAT-330DG02PSS0301CE-GP
1
62.70001.051
1
-1 for RTC Leakage R6004

Change:62.70001.061
B DY 2nd = 62.70001.061 B
Do Not Stuff
R6006
3rd = 62.70014.001
Do Not Stuff
2
1 2
3D3V_AUX_S5
D DY S
Q6002
G
Do Not Stuff
Do Not Stuff
2ND = 84.00610.C31 R6005 SB to -1 default active Low
Do Not Stuff
1 2 EC_GPIO95 27
DY
1
HR UMA
R6003
Do Not Stuff DY
A Wistron Corporation A
2

Title
Flash/RTC
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = USB
IO Board USB Power
Change Main source
D D
5V_S5
Support 2A 5V_USB1_S3 TC6201 change
at least 80 mil
at least 80 mil 1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6
1
27,82 USB_PWR_EN# 4 EN/EN# OC# 5
1
1
SE100U16VM-13GP
C6101 C6102 TC6201 EC6101
Do Not Stuff
SCD1U10V2KX-4GP
DY 79.1071D.3CL
2
SC1U10V2KX-1GP
U6101 2nd =
2
2
G547E2P81U-GP
74.00547.079
2nd = 74.02101.079
C C
5V_USB1_S3
8
6
1
USB1
18 USB_PN1 1 R6103 2Do Not Stuff USBPN1_C 2 SKT-USB8-3-GP-U
18 USB_PP1 1 R6104 2Do Not Stuff USBPP1_C 3 22.10321.B81
4 2nd = 22.10321.C41
5 3rd = 22.10321.E01
7
B B
5V_USB1_S3
8
6
1
USB2
18 USB_PN9 1 R6101 2Do Not Stuff USBPN9_C 2 SKT-USB8-3-GP-U
18 USB_PP9 1 R6102 2Do Not Stuff USBPP9_C 3 22.10321.B81
4 2nd = 22.10321.C41
5 3rd = 22.10321.E01 HR UMA
7
A
Title
USB Power SW
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A HR UMA A
Wistron Corporation
Title
USB 3.0 Port

A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Bluetooth Module conn.
D D
ANNIE Bluetooth Module

U6301
G5240B1T1U-GP 3D3V_S0
3D3V_BT_S0 74.05240.A7F
2nd = 74.07534.A7F C6302
SC4D7U6D3V3KX-GP
3D3V_BT_S0 1 5 1 2
OUT IN
2 GND
3 NC#3 EN 4
1
C EC6302 BLUETOOTH_EN 27,65 C
Do Not Stuff
DY 2
BT2
ACES-CON4-7-GP-U
2nd = 20.F1804.004
20.F0772.004
5
EC6302 put near 1 USB_PN3 18
BLUE1 / all USB 2 USB_PP3 18
put one choke 3
4 3D3V_BT_S0
near connector 6
by EMI request
B B
HR UMA
A
Title
Bluetooth
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
Finger printer
JE40 delete FP function

C C
F/P
1 8
B B
HR UMA
A
Title
RESERVED
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
Mini Card Connector(802.11a/b/g/n) 3D3V_S0
53 1D5V_S0
D NP1 D
19,31,66,82 PCIE_WAKE# 1 R6511 2 1 2

DY Do Not Stuff
3 4
5 6
20 CLK_PCIE_WLAN_REQ# 7 8
9 10
20 CLK_PCIE_WLAN# 11 12
20 CLK_PCIE_WLAN 13 14
15 16
27 E51_RXD 1 R6501 2 Do Not Stuff E51_RXD_R 17 18

27 E51_TXD 1 R6502 2 Do Not Stuff E51_TXD_R 19 20 WIFI_RF_EN 27
21 22 PLT_RST# 5,18,27,31,36,66,71,82,97
20 PCIE_RXN2 23 24
20 PCIE_RXP2 25 26
27 28
29 30
20 PCIE_TXN2 31 32
C 20 PCIE_TXP2 33 34 C
35 36 USB_PN11 18
37 38 USB_PP11 18
3D3V_S0 39 40
41 42 WMAX_LED#_C1 2
43 44 R6513 Do Not Stuff WLAN_LED# 68
45 46
2
R6503 47 48
Do Not Stuff
5V_S5 1 2 +5V_MINI_DEBUG
49
51
50
52
DY R6512
Do Not Stuff
NP2
54
1
3D3V_S0
1 R6515 2
27,63 BLUETOOTH_EN DY Do Not Stuff WLAN1
PTWO-CONN52A-9-GP-U
3D3V_S0 20.F1519.052
2nd = 62.10043.A51
3rd = 20.F1693.052
4th = 20.F1743.052 RF suggestion
1
B B
C6502 C6503 C6504
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SB modify for SIV

Do Not Stuff
2
+5V_MINI_DEBUG USB_PN11 USB_PP11 3D3V_S0
1
EC6511 EC6509 DY EC6507 DY EC6503 DY
SC56P50V2JN-2GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
1 CLK_PCIE_WLAN#
1 CLK_PCIE_WLAN
2
3G_RF
SC8P250V2CC-GP EC6513
SC8P250V2CC-GP EC6512
-2
1D5V_S0 VCCVRM_S0
HR UMA
1
Wistron Corporation
2
A
C6505 C6506 C6507 A
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Do Not Stuff
2
Title
MINICARD(WLAN)/ITP CONN
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
20100712 V1.5
Mini Card Connector(WWAN)
Place near MINI Card CONN 1D5V_S0
D D
3D3V_S0
3D3V_S0
53
NP1
1
1
C6601 19,31,65,82 PCIE_WAKE# 1 R6604 2 1 2
SC47P50V2JN-3GP
SCD1U50V3KX-GP
C6602 C6608 DY Do Not Stuff

Do Not Stuff 3 4
2
DY 5 6
3G_RF 3G_RF 7 8 UIM_PWR
9 10 UIM_DATA
11 12 UIM_CLK
13 14 UIM_RESET
15 16 UIM_VPP
17 18
1D5V_S0 19 20
PLT_RST#_WAN 1 R6605 2 3G_EN 27
21 22 PLT_RST# 5,18,27,31,36,65,71,82,97
23 24 Do Not Stuff
C 25 26 C
DY
1
27 28
DY C6606 DY C6609 29 30
31 32
Do Not Stuff
Do Not Stuff
2
33 34
35 36 USB_PN4 18
37 38 USB_PP4 18
3D3V_S0 39 40
41 42 3G_LED# 68
SIM1 43 44
CARDBUS9P-GP 45 46
2
20.I0063.001 47 48
UIM_PWR 1 NP1
49
51
50
52
DY R6606
Do Not Stuff
VCC NP1
NP2 NP2 NP2
UIM_VPP 6 54
1
VPP
RESERVED#4 4 USB_PP0 18 3D3V_S0
RESERVED#8 8 USB_PN0 18
UIM_RESET 2 WWAN1
UIM_CLK RST PTWO-CONN52A-9-GP-U
3 CLK
B UIM_DATA 7 5 20.F1519.052 B
Do Not Stuff TP6601 CD I/O GND
1 9 CD GND 10 2nd = 62.10043.A51
GND 11 3rd = 20.F1693.052
4th = 20.F1743.052
1
C6610 3G Sku
3G Sku 3G Sku
SC4D7U25V5KX-GP
2
RF suggestion
UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP
HR UMA
1
EC6601 DY EC6603 DY DYEC6602 EC6604 DY EC6608 DY

Wistron Corporation
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
A A
2

Title
WWAN Connector
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
PWR_LED1
LED-BO-5-GP-U1
83.00326.A70
WLAN_LED
2nd = 83.01220.I70
FRONT_PWRLED#_R 3 1 5V_S5
D STDBY_LED#_R 2
From module D
Power button LED FRONT_PWRLED#_Q

STDBY_LED#_Q
DC_BATFULL#_Q
1 R6801
1 R6802
1 R6803
2300R2F-GP
2330R2F-GP
2300R2F-GP
CHARGER_LED1
LED-BO-5-GP-U1
83.00326.A70
WLAN_LED# 65
Q6801 CHARGE_LED#_Q 1 R6804 2470R2J-2-GP 2nd = 83.01220.I70 R2

DTC143ZUB-GP 2
84.00143.G1K R1 1 WIRELESS_LED_OFF# 27
DC_BATFULL#_R 3 1 5V_S5 WLAN_LED#_1 3
3 FRONT_PWRLED#_Q FRONT_PWRLED#_Q 82
1 R1 Q6803
27 PWRLED CHARGE_LED#_R DTC143ZUB-GP
2 2
R2
D
Q6806
Power STDBY_LED 2N7002K-2-GP

84.2N702.J31
FRONT_PWRLED#_Q 1 2 2ND = 84.2N702.031
DY EC6801 Do Not Stuff
G
Q6802 CHARGE_LED#_Q 1 2
DTC143ZUB-GP DY EC6802 Do Not Stuff Do Not Stuff
StuffTP6801
TP6801 1 5V_AUX_S5
84.00143.G1K
C 3 STDBY_LED#_Q STDBY_LED#_Q 82 STDBY_LED#_Q 1 2 WLAN_TEST_LED 27 C
1 R1 DY EC6803 Do Not Stuff
27 STDBY_LED DC_BATFULL#_Q
2 1 2
R2 DY EC6804 Do Not Stuff for factory test
Battery LED2(DC_BATFULL) SATA HDD LED

MEDIA_LED1
3G LED
21 SATA_LED# LED-B-67-GP-U2
83.00110.F70
Q6805 2nd = 83.01221.P70 3D3V_S0
DTC143ZUB-GP 3D3V_S0
From module
NC
R2
84.00143.G1K 2
1
3 DC_BATFULL#_Q 1
R1 R1
1 3 SATA_LED#_1 2 R6807 1 MEDIA_LED#_R K A 5V_S0 3G_LED# 66 R6809
27 DC_BATFULL 470R2J-2-GP
2 4K7R2J-2-GP
R2 Q6809
DTC143ZUB-GP
2
R2
84.00143.G1K 2
B
R1 1 B
3G_LED#_1 3
Battery LED1(CHARGE) COM_LED1
LED-BO-5-GP-U1
83.00326.A70
Q6804
DTC143ZUB-GP
2nd = 83.01220.I70
Q6808
D
DTC143ZUB-GP
84.00143.G1K 3G_LED#_1 1 R6806 2 3G_LED#_R 3 1 5V_S0
3 CHARGE_LED#_Q 300R2F-GP Q6807
1 R1 2N7002K-2-GP
27 CHARGE_LED WLAN_LED#_1
2 1 R6805 2 WLAN_LED#_R 2 84.2N702.J31
R2 510R2J-1-GP
2ND = 84.2N702.031
G
WLAN_TEST_LED 27 for factory test
HR UMA
A A
Wistron Corporation
Title
LED Bard/Power Button

Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
TOUCH PAD FFC

5V_S0
SSID = KBC 5V_S0
SC56P50V2JN-2GP
SC56P50V2JN-2GP
2
1
TPAD1
1
RN6901 ACES-CON6-13-GP
D SRN4K7J-8-GP EC6901 EC6902 20.K0320.006 D
Internal KeyBoard 2nd = 20.K0382.006
2
3G_RF 3G_RF
Connector
3
4
8
27 TPCLK 1 4 6
27 TPDATA 2 3 TP_CLK 5
TP_DATA 4
20.K0320.026 KB1 RN6902 TP_LEFT 3
2nd = 20.K0382.026 ACES-CON26-6GP-U SRN33J-5-GP-U TP_RIGHT 2
7
TP_DATA
TP_CLK
TP_LEFT
27
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
TP_RIGHT
C C
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
2
EC6903 EC6904 EC6905 EC6906
KROW[0..7] 27
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY DY DY DY
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL[0..16] 27
KCOL17 27
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
26 K/B 1
SB to -1 modify Part number
B B
SW_L1
SW_R1 SW-TACT-5P-9-GP
SW-TACT-5P-9-GP 62.40089.141
62.40089.141 Change:62.40089.221
Change:62.40089.221
TP_RIGHT TP_LEFT 1 2
1 2
5
5
3 4
3 4 HR UMA
A
Title
Key Board/Touch Pad

A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_AUX_KBC
C C
1
C7002
HALLSW1
SCD1U10V2KX-5GP APX9132HAI-TRG-GP
2
74.09132.C7B
1 VDD
R7002 3
100R2J-2-GP GND
27 LID_CLOSE# 1 2 LID_CLOSE#_1 2 VOUT
1
C7001
DY Do Not Stuff
2
B B
HR UMA
A
Title
Hall Sensor
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
3D3V_S0
1
21,27 LPC_AD0 2
21,27 LPC_AD1 3
21,27 LPC_AD2 4
21,27 LPC_AD3 5
21,27 LPC_FRAME# 6
5,18,27,31,36,65,66,82,97 PLT_RST# 7
8
18 CLK_PCI_LPC 9
10
B 11 B
12
DB1
Do Not Stuff
Do Not Stuff
DY
HR UMA
A
Title
Dubug connector
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A HR UMA A
Wistron Corporation
Title
Reserved
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A HR UMA A
Wistron Corporation
Title
Reserved
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SD/XD/MS Card Reader

SSID = SDIO
D D
CARD1
32 SD-DATA3_19 SD-DATA3_19 19 40
SD_CMD_16 SD-DAT3/MMC-RSV XD-GND XD_CD#_39
32 SD_CMD_16 16 SD-CMD/MMC-CMD XD-CD 39
32 SD-CLK_9 13 38 XD-R/-B_38
SD-VSS/MMC-VSS1 XD-R/-B XD_RE#_37
32 SD_DATA0_4 3D3V_CARD_S0 11 SD-VDD/MMC-VDD XD-RE 37
32 SD-DAT1_3 SD-CLK_9 9 36 XD_CE#_36
SD-CLK/MMC-CLK XD-CE XD_CLE_35
32 SD-DATA1_21 6 SD-VSS/MMC-VSS2 XD-CLE 35
32 SD-WP_2 SD_DATA0_4 4 34 XD_ALE_34
SD-DAT1_3 SD-DAT0/MMC-DAT XD-ALE SD_CD/XD_WE#_1_33_43
31,32 SD_CD/XD_WE# 3 SD-DAT1 XD-WE 33
SD-DATA1_21 21 32 XD_WP_32
SD-WP_2 SD-DAT2 XD-WP
32 MS_BS_7 2 SD-WP XD-GND 31
32 MS-DATA1_8 SD_CD/XD_WE#_1_33_43 1 30 XD_D0_30
SD_CD/XD_WE#_1_33_43 SD-CD#1 XD-D0 XD_D1_29
32 MS_DATA0_10 43 SD-CD#43 XD-D1 29
32 MS-DATA2_12 28 XD_D2_28
XD-D2 XD_D3_27
32 MS_INS#_14 XD-D3 27
32 MS-DATA3_15 5 26 XD_D4_26
MS_BS_7 MS-VSS/GND XD-D4 XD_D5_25
32 MS-SCLK_17 7 MS-BS XD-D5 25
MS-DATA1_8 8 24 XD_D6_24
MS_DATA0_10 MS-DATA1 XD-D6 XD_D7_23
C 32 XD_CD#_39 10 MS-SDIO/DATA0 XD-D7 23 C
32 XD-R/-B_38 MS-DATA2_12 12 22 3D3V_CARD_S0
MS_INS#_14 MS-DATA2 XD-VCC
32 XD_RE#_37 14 MS-INS
32 XD_CE#_36 MS-DATA3_15 15
MS-SCLK_17 MS-DATA3
32 XD_CLE_35 17 MS-SCLK SD-VSS/MMC-VSS2/GND 44
32 XD_ALE_34 3D3V_CARD_S0 18 MS-VCC GND 42
32 SD_CD/XD_WE#_1_33_43 20 MS-VSS/GND GND 41
32 XD_WP_32
NP1 NP1 NP2 NP2
32 XD_D0_30
32 XD_D1_29
32 XD_D2_28 CARDBUS40P-SKT-2-GP
32 XD_D3_27 20.I0087.I21
32 XD_D4_26 2nd = 62.10024.B41
32 XD_D5_25
32 XD_D6_24
32 XD_D7_23
B B
SD_CD/XD_WE#
MS_INS#_14
XD_RE#_37
XD_ALE_34
XD-R/-B_38
MS_BS_7
SD-WP_2
HR UMA
1
DY DY DY DY DY DY DY
EC7407 EC7403 EC7401 EC7404 EC7405 EC7406 EC7402
Wistron Corporation
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

Title
CARD Reader CONN

A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
D D
C C
B B
A HR UMA A
Wistron Corporation
Title
New Card
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B (Blanking) B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
D
- design PCB pad based on our sensor LGA pad size (add 0.1mm) D
Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
C C
JE40 delete G Sensor Function
B B
HR UMA
Note Wistron Corporation

A (1) Keep all signals are the same trace width. (included VDD, GND). 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
(2) No VIA under IC bottom. Taipei Hsien 221, Taiwan, R.O.C.
Title
Free Fall Sensor

A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
HR UMA
A
Title
Reserved
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
USBCN1 FFC
PWRCN1 FFC 28
26
19,31,65,66 PCIE_WAKE#
11 18 USB30_SMI# 25
1 5V_S5 24
D 23 D
2 22
3 KBC_PWRBTN# 27 29 COMBO_MIC 21
2
4 FRONT_PWRLED#_Q 68 29 AUD_HP1_JACK_R2 20
5 STDBY_LED#_Q 68 R8105 29 AUD_HP1_JD# 19
Do Not Stuff
6 29 AUD_HP1_JACK_L2 18
7 AUD_SPK_L- 29 29 EXT_MIC_JD# 17
8 29 MIC_IN_R 16
1
AUD_SPK_L+ 29
9 AUD_SPK_R- 29 29 MIC_IN_L 15
10 AUD_SPK_R+ 29 18 USB_PN8 14
12 18 USB_PP8 13
12
AUD_AGND 1D5V_S3 11
PWRCN1 27,61 USB_PWR_EN#
10
ACES-CON10-20-GP 9
20.K0422.010 5,18,27,31,36,65,66,71,97 PLT_RST# 8
2nd = 20.K0382.010 7
3D3V_S5 6
20 USB3_PEGB_CLKREQ# 5
4
C 3 C
2
5V_S5 1
27
USBCN1
ACES-CON26-11-GP
20.K0315.026
2nd = 20.K0370.026
USBCN2 FFC
0806 change 10Pin -1 add RF connector
B RF_CN1 B
BAE40 Only ACES-CON2-11-GP
20.F0772.002
USBCN2 3 BAE40
ACES-CON10-18-GP 1
20.K0315.010
2nd = 20.K0392.010 27 Wireless_SW 2
4
11
1
20 CLK_PCIE_USB3 2
3
Cabele Wire to BD
20 CLK_PCIE_USB3#
4 HR UMA
20 PCIE_RXN5 5
20 PCIE_RXP5 6
A
7
8
20 PCIE_TXN5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
20 PCIE_TXP5 9 Taipei Hsien 221, Taiwan, R.O.C.
10
12 Title
IO Board Connector
A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
3D3V_VGA_S0
1D05V_VGA_S0
1 Do Not Stuff
R8303 DY
SB sequence
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
R8303 change to pull low ??
Do Not Stuff
Do Not Stuff
SB Missed 1x 22uF. C8355 Vendor suggest VGA1K 11 OF 16
X7R X7R
1
DY C8333 C8334 DY C8335 C8336 C8337 C8338 DIS_Muxless AA9 Y1
NC#AA9 NC#Y1
18 DGPU_HOLD_RST# 1 R8361 2 VGA_RST# AB9 Y2
2
Do Not Stuff NC#AB9 NC#Y2
DIS_MuxlessDIS_Muxless
1.05V +/- 3% W9
Y9
NC#W9 NC#Y3 Y3
AB3
NC#Y9 NC#AB3
D
VGA1A 1 OF 16
DIS_Muxless 2,200mA NC#AB2 AB2
AB1
D
NC#AB1
PCI_EXPRESS
(See NV DG) NC#AC4 AC4
2
PEX_IOVDD AK16 NC#AC1 AC1
AK17 R8310 AC2
PEX_IOVDD Do Not Stuff NC#AC2
PEX_IOVDD AK21 DIS_Muxless NC#AC3 AC3
AK24 AE3
3D3V_VGA_S0 PEX_IOVDD
AK27 X7R, Under GPU. 1D05V_VGA_S0 AA7
NC#AE3
AE2
1
PEX_IOVDD NC#AA7 NC#AE2
NC#U6 U6
AA6 NC#AA6 NC#W6 W6
NC#Y6 Y6
PEX_IOVDDQ AG11
1 Do Not Stuff
3D3V_VGA_S0
DIS_Muxless PEX_IOVDDQ AG12
PEX_IOVDDQ AG13 AF1 NC#AF1
R8302 AG15
PEX_IOVDDQ
PEX_IOVDDQ AG16
1
AG17
2
PEX_IOVDDQ C8344 C8339 C8340 C8341 C8342 C8343
PEX_IOVDDQ AG18
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
AG22
G
2
PEX_IOVDDQ
PEX_IOVDDQ AG23 SB Missed 1x 22uF. C8356 Vendor suggest NC#W3 W3
VGA_RST# AM16 AG24 W1
PEX_RST# PEX_IOVDDQ NC#W1
PEG_CLKREQ#_1
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless NC#W2 W2
20 PEG_CLKREQ# D S AR13 PEX_CLKREQ# PEX_IOVDDQ AG25 NC#Y5 Y5
PEX_IOVDDQ AG26
PEX_IOVDDQ AJ14
Q8301 AJ15
Do Not Stuff PEX_IOVDDQ
PEX_IOVDDQ AJ19 NC#V4 V4
DIS_Muxless PEX_IOVDDQ AJ21 NC#W4 W4
AJ22 AE1
PEX_IOVDDQ
PEX_IOVDDQ AJ24 X7R, Under GPU. NC#AE1
20100621 NV suggestion AJ25
PEX_IOVDDQ Do Not Stuff
AJ17 PEX_TSTCLK_OUT PEX_IOVDDQ AJ27
AJ18 PEX_TSTCLK_OUT# PEX_IOVDDQ AK18
AK20
3.3V +/- 5%
PEX_IOVDDQ DIS_Muxless
20 CLK_PCIE_VGA AR16
AR17
PEX_REFCLK PEX_IOVDDQ AK23
AK26
240mA
20 CLK_PCIE_VGA# PEX_REFCLK# PEX_IOVDDQ
PEG_RXP0 Do Not Stuff 1 C8301 PEG_C_RXP0 AL17
PEX_IOVDDQ AL16 (See NV DG)
DIS_Muxless
2 PEX_TX0
PEG_RXN0 Do Not Stuff 1 C8302 PEG_C_RXN0 AM17
DIS_Muxless
2 PEX_TX0# VGA1J 10 OF 16
PEG_TXP0
C PEG_TXN0
AP17
AN17
PEX_RX0 -1 Vendor suggest modify 3D3V_VGA_S0 P9 N1 C
PEX_RX0# NC#P9 NC#N1
R9 NC#R9 NC#P4 P4
PEG_RXP1 Do Not Stuff 1 C8303 PEG_C_RXP1 AM18
DIS_Muxless
2 AG19 3D3V_VGA_S0 T9 P1
PEG_RXN1 Do Not Stuff PEX_TX1 PEX_SVDD_3V3 NC#T9 NC#P1
2 1 C8304 PEG_C_RXN1 AM19
DIS_Muxless PEX_TX1# NC#F7 F7 U9 NC#U9 NC#P2 P2
4 PEG_TXP[0..15] NC#P3 P3
PEG_TXP1
4 PEG_TXN[0..15] PEG_TXN1
AN19
AP19
PEX_RX1
X7R
-1 delete R8311 for suggest NC#T3 T3
T2
PEX_RX1# NC#T2
1
NC#T1 T1
DIS_Muxless
2 A2 C8345 C8346 DIS_Muxless U4
PEX_TX2 NC#A2 NC#U4
Do Not Stuff
Do Not Stuff
PEG_RXN2 Do Not Stuff 1 C8306 PEG_C_RXN2 AK19
DIS_Muxless DIS_Muxless
2 A7
3.3V +/- 5% U1
2
PEX_TX2# NC#A7 NC#U1
NC#AA4 AA4 NC#U2 U2
PEG_TXP2
PEG_TXN2
AR19
AR20
PEX_RX2 NC#AB4 AB4
AB7
120mA U5 NC#U5 NC#U3 U3
R6
PEX_RX2# NC#AB7 NC#R6
PEG_RXP[0..15] 4
NC#AC5 AC5 (See NV DG) T5 NC#T5 NC#T6 T6
DIS_Muxless
2 PEX_TX3 NC#AD6 AD6 NC#N6 N6
DIS_Muxless
2 AF6
PEG_RXN[0..15] 4 PEX_TX3# NC#AF6
AG6 3D3V_VGA_S0
PEG_TXP3 AP20 PEX_RX3
NC#AG6
NC#AJ5 AJ5 X7R, Under GPU. N5 NC#N5
PEG_TXN3 AN20 AK15
PEX_RX3# NC#AK15
NC#AL7 AL7
DIS_Muxless
2 B7
PEG_RXN4 Do Not Stuff PEX_TX4 NC#B7
2 1 C8310 PEG_C_RXN4 AM22
DIS_Muxless PEX_TX4# NC#C7 C7 HDA_SID_NC
Do Not Stuff
NC#D5 D5
Do Not Stuff
Do Not Stuff
Do Not Stuff
PEG_TXP4 AN22 D6 P5
PEG_TXN4 PEX_RX4 NC#D6 NC#P5
AP22 PEX_RX4# NC#D7 D7 HDA_BLCK_NC X7R X7R NC#N3 N3
1
NC#E5 E5 NC#L3 L3
DIS_Muxless
2 E7 PGOOD C8350 C8348 C8349 C8351 N2
PEG_RXN5 Do Not Stuff PEX_TX5 NC#E7 NC#N2
2 1 C8312 PEG_C_RXN5 AK22
DIS_Muxless F4
2
PEX_TX5# NC#F4
PEG_TXP5 NC#G5 G5 DIS_Muxless
AR22 PEX_RX5 NC#H32 H32
PEG_TXN5 AR23 P6 MULTI_STRAP R4
PEX_RX5# NC#P6 NC#R4
PEG_RXP6 Do Not Stuff NC#U7 U7 DIS_Muxless DIS_Muxless DIS_Muxless NC#T4 T4
2 1 C8313 PEG_C_RXP6 AL23
DIS_Muxless PEX_TX6 NC#V6 V6 NC#N4 N4
DIS_Muxless
2 Y4
PEX_TX6# NC#Y4
PEG_TXP6 AP23 J10 X7R, Under GPU. SB modify to 3D3V_VGA_S0 Do Not Stuff
PEG_TXN6 PEX_RX6 VDD33
AN23 PEX_RX6# VDD33 J11
J12 3D3V_VGA_S0 3D3V_VGA_S0
PEG_RXP7 Do Not Stuff VDD33 DIS_Muxless
1 C8316 PEG_C_RXP7 AM24
DIS_Muxless
2 PEX_TX7 VDD33 J13
DIS_Muxless
2 J9
PEX_TX7# VDD33
2
B PEG_TXP7 AN25 LA46: Test point B
PEG_TXN7 PEX_RX7 LKN3: connect to VGA core PWR IC R8355 R8357
AP25 PEX_RX7#
PEG_RXP8 Do Not Stuff
DY Do Not Stuff DY Do Not Stuff
2 1 C8318 PEG_C_RXP8 AL25
DIS_Muxless PEX_TX8
DIS_Muxless
2
1
PEX_TX8#
PEG_TXP8 AR25 HDA_SID_NC HDA_BLCK_NC PGOOD MULTI_STRAP
PEG_TXN8 PEX_RX8
AR26 PEX_RX8#
2
DIS_Muxless
1 C8320 PEG_C_RXP9 AL26
DIS_Muxless
2 PEX_TX9 VDD_SENSE#D35 D35 VGACORE_VDD_SENSE_1 Do Not Stuff
TP8304 R8359 DIS_Muxless R8356 R8358 R8360
PEG_RXN9 Do Not Stuff 2 1 C8319 PEG_C_RXN9 AM26
DIS_Muxless P7 Do Not Stuff Do Not Stuff N12P-GV Do Not Stuff Do Not Stuff
PEX_TX9# VDD_SENSE#P7
VDD_SENSE#AD20 AD20 DIS_Muxless N12P-GV DIS_Muxless
PEG_TXP9 AP26 AD19 VGACORE_GND_SENSE_1 Do Not Stuff
TP8302 N12P-GV
1
PEG_TXN9 PEX_RX9 GND_SENSE#AD19
AN26 PEX_RX9# GND_SENSE#R7 R7 N12P-GV
DIS_Muxless
2
GND_SENSE#E35 E35
1.05V +/- 3%
PEG_RXN10 Do Not Stuff PEX_TX10
1 C8322 PEG_C_RXN10 AM28
DIS_Muxless
2 PEX_TX10# 120mA
PEG_TXP10
PEG_TXN10
AN28
AP28
PEX_RX10 (See NV DG)
PEX_RX10# 1D05V_VGA_S0
DIS_Muxless
2 1 C8323 PEG_C_RXP11 AL28
DIS_Muxless PEX_TX11 L8301
DIS_Muxless
2 PEX_TX11# VCC1R05VIDEO_PEX_PLLVDD
PEX_PLLVDD AG14 2 1
Do Not Stuff
Do Not Stuff
Do Not Stuff
PEG_TXP11 AR28
PEG_TXN11 PEX_RX11 Do Not Stuff
AR29 PEX_RX11#
X7R CHIP BEAD BLM18AG121SN1D
1
PEG_RXP12 Do Not Stuff 1 C8325 PEG_C_RXP12 AK29

DIS_Muxless
2
1 C8326 PEG_C_RXN12 AL29
DIS_Muxless
2 PEX_TX12#
C8352 C8354 C8355
2
PEG_TXP12 AP29
PEG_TXN12 PEX_RX12
AN29 PEX_RX12#
DIS_Muxless DIS_Muxless DIS_Muxless
2 1 C8328 PEG_C_RXP13 AM29
DIS_Muxless PEX_TX13
DIS_Muxless
2 PEX_TX13#
PEG_TXP13 AN31
PEG_TXN13 PEX_RX13
AP31 PEX_RX13# X7R, Under GPU.
DIS_Muxless
2
2 1 C8329 PEG_C_RXN14 AM32
DIS_Muxless PEX_TX14#
A A
PEG_TXP14
DIS_Muxless
AR31 PEX_RX14 NC#AG20 AG20
PEG_TXN14 AR32 R8304
PEX_RX14#
PEX_TERMP AG21 PEX_TERMP 1 2 Do Not Stuff
PEG_RXP15 Do Not Stuff 1 C8332 PEG_C_RXP15 AN32
DIS_Muxless
2 PEX_TX15 HR UMA
PEG_RXN15 Do Not Stuff 1 C8331 PEG_C_RXN15 AP32
DIS_Muxless
2 PEX_TX15#
PEG_TXP15 AR34 R8306
PEG_TXN15 AP34
PEX_RX15
PEX_RX15# TESTMODE AP35 TESTMODE 1 2 Do Not Stuff Wistron Corporation
DIS_Muxless Taipei Hsien 221, Taiwan, R.O.C.
N12P GV : 71.0N12P.A0U Do Not Stuff
N12P GS: 71.0N12P.E0U Title
N11P GS: 71.0N11P.E0U DIS_Muxless GPU_PCIE/STRAPPING(1/5)

A2
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
VGA1G
LVDS Interface 7 OF 16 IFPCDE_PLLVDD_PWR VGA1H 8 OF 16
IFPAB IFPC
AJ9 IFPC_PLLVDD
IFPC_RSET_AK7
1.05V +/- 3% AK7 IFPC_RSET
Do Not Stuff
IFPA_TXD0# AL8 GPU_LVDSA_TX0# 94 IFPC_AUX_I2CW_SDA# AN3 GPU_HDMI_DATA 51
1
220mA IFPA_TXD0 AM8 GPU_LVDSA_TX0 94 X7R IFPC_AUX_I2CW_SCL AP2 GPU_HDMI_CLK 51
1
R8402
(See NV DG) DIS C8402 Do Not Stuff
D 1D05V_VGA_S0 AM9 GPU_LVDSA_TX1# 94 DIS AR2 D
2
L8401 IFPA_TXD1# IFPC_L3# HDMI_CLK# 51
AM10 GPU_LVDSA_TX1 94 AP1
2
Do Not Stuff IFPA_TXD1 IFPC_L3 HDMI_CLK 51
CHIP BEAD BLM18AG121SN1D IFPC_IOVDD_PWR check R8402 IFPC_L2# AM4 HDMI_DATA0# 51
1 2 IFPAB_PLLVDD AK9 AL10 GPU_LVDSA_TX2# 94 AM3
IFPAB_PLLVDD IFPA_TXD2# IFPC_L2 HDMI_DATA0 51
DIS IFPA_TXD2 AK10 GPU_LVDSA_TX2 94
Do Not Stuff
1 2 IFPAB_RSET AJ11 AM5
IFPAB_RSET IFPC_L1# HDMI_DATA1# 51
IFPC_L1 AL5 HDMI_DATA1 51
1
DY R8401 AL11 AJ8
IFPA_TXD3# IFPC_IOVDD
1
C8403 Do Not Stuff AK11 AM6
R8411 IFPA_TXD3 IFPC_L0# HDMI_DATA2# 51
DG requires X7R for DIS Do Not Stuff IFPC_L0 AM7 HDMI_DATA2 51
X7R, Under GPU.
2
1uF and 4.7uF as well.
1
AM12 GPU_LVDSA_TXC# 94
2
IFPA_TXC#
Muxless IFPA_TXC AM11 GPU_LVDSA_TXC 94
R8410
3.3V +/- 5% Missed 1x 0.1uF Muxless
Do Not Stuff K2 HDMI_HPD_DET 51
GPIO1
220mA
2
IFPB_TXD4# AP8
(See NV DG) IFPB_TXD4 AN8 Do Not Stuff DIS_Muxless
1D8V_VGA_S0 180ohm@100MHz ESR=0.15 AG9 AN10
IFPA_IOVDD IFPB_TXD5#
DIS IFPAB_IOVDD IFPB_TXD5 AP10
1 2 AG10 IFPB_IOVDD
L8402
Do Not Stuff
Do Not Stuff
Do Not Stuff AR10

IFPB_TXD6#
Missed 1x 0.1uF IFPB_TXD6 AR11
1
1
DG requires X7R for C8404 C8405 Muxless R8408

IFPB_TXD7# AP11 SB modify connector to IFPCDE_PLLVDD_PWR
Do Not Stuff AN11
2
1uF and 4.7uF as well. DIS DIS

IFPB_TXD7 IFPCDE_PLLVDD_PWR VGA1E 5 OF 16
2
IFPD
C IFPB_TXC# AN13 C
IFPB_TXC AP13
AC6 IFPD_PLLVDD
AB6 IFPD_RSET
IFPD_AUX_I2CX_SDA# AN4
AP4
X7R, Under GPU. IFPD_AUX_I2CX_SCL
GPIO0 K1
IFPD_L3# AR4
AR5
Under GPU.
IFPC_IOVDD_PWR
IFPD_L3
IFPD_L2# AP5
Do Not Stuff AN5
IFPD_L2
DIS_Muxless
SB modify connector to IFPC_IOVDD_PWR IFPD_L1# AN7
IFPD_L1 AP7
AK8 IFPD_IOVDD
IFPD_L0# AR7
IFPD_L0 AR8
VGA1I 9 OF 16
IFPEF L7
GPIO19
SA R8412, R8413 change DY Do Not Stuff

DIS_Muxless
IFPE_AUX_I2CY_SDA# AD4 SB R8412, R8413 change delete
IFPE_AUX_I2CY_SCL AE4
B
IFPE_L3# AE5 B
AJ6 AE6
IFPEF_PLLVDD IFPE_L3
HDMI Interface
1
AL1 IFPEF_RSET IFPE_L2# AF5

IFPE_L2 AF4
R8414
Do Not Stuff AG4
1.05V +/- 3% 3.3V +/- 5%
IFPE_L1#
DIS_Muxless AH4 285mA 440mA (220mA each, max 2 links)
2
IFPE_L1
IFPE_L0# AH5
AH6
(See NV DG) 220ohm@100MHz ESR=0.05 (See NV DG) 300ohm@100MHz ESR=0.25
Under GPU. IFPE_L0 1D05V_VGA_S0
3D3V_VGA_S0
IFPC_IOVDD_PWR IFPCDE_PLLVDD_PWR
GPIO15 L1
L8403 L8405
1 2 1 2
IFPDE_PLL_IO_VDD AE7 AF2 DIS DIS
IFPE_IOVDD IFPF_AUX_I2CZ_SDA#
AF3
Do Not Stuff
Do Not Stuff
IFPF_AUX_I2CZ_SCL
DG requires X7R for
1
AD7 IFPF_IOVDD 1uF and 4.7uF as well.
1
IFPF_L3# AH3
AH2 DIS C8409 C8417 C8418 R8409
IFPF_L3 Do Not Stuff Do Not Stuff
2
1
AH1 DIS DIS Muxless
2
IFPF_L2#
IFPF_L2 AJ1
R8407
Do Not Stuff AJ2
IFPF_L1#
DIS_Muxless AJ3
2
IFPF_L1
IFPF_L0# AL3
IFPF_L0 AL2
A
X7R, Under GPU. HR UMA
A
GPIO21 K6
Do Not Stuff Wistron Corporation

DIS_Muxless
Title
GPU Memory(2/5)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
EDP 10A 1D5V_VGA_S0

VGA1C 3 OF 16
VGA1B 2 OF 16 DC tolerance +/- 75mV FBB
FBA 1D5V_VGA_S0
AC tolerance +/- 50mV < 100MHz
88,89 MDA[63..0] 90,91 MDB[63..0] MDB0 B13 FBB_D0 FBVDDQ N27
MDB1 D13 P27
MDA0 MDB2 FBB_D1 FBVDDQ
L32 AA27 A13 R27
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
MDA1 FBA_D0 FBVDDQ MDB3 FBB_D2 FBVDDQ
N33 FBA_D1 FBVDDQ AA29 A14 FBB_D3 FBVDDQ T27
MDA2 L33 AA31 X7R X7R X7R X7R X7R X7R X7R MDB4 C16 U27
FBA_D2 FBVDDQ FBB_D4 FBVDDQ
1
MDA3 N34 AB27 MDB5 B16 U29
MDA4 FBA_D3 FBVDDQ C8504 C8505 C8506 C8507 C8512 C8508 C8509 C8510 C8511 MDB6 FBB_D5 FBVDDQ
N35 FBA_D4 FBVDDQ AB29 A17 FBB_D6 FBVDDQ V27
MDA5 P35 AC27 MDB7 D16 V29
2
P33 FBA_D6 FBVDDQ AD27 C13 FBB_D8 FBVDDQ V34
MDA7 P34 AE27 MDB9 B11 W27
D K35 FBA_D8 FBVDDQ AJ28 C11 FBB_D10 FBVDDQ Y27 D
MDA9 K33 B18 MDB11 A11
MDA10 FBA_D9 FBVDDQ MDB12 FBB_D11
K34 FBA_D10 FBVDDQ E21 C10 FBB_D12
MDA11 H33 G17 MDB13 C8
G34 FBA_D12 FBVDDQ G18 B8 FBB_D14
MDA13 G33 G22 DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless MDB15 A8
MDA14 E34
FBA_D13 FBVDDQ
G8 DIS_Muxless
DIS_Muxless MDB16 E8
FBB_D15
E33 FBA_D15 FBVDDQ G9 F8 FBB_D17
MDA16 G31 H29 MDB18 F10
F30 J14 F9
MDA18 G30
FBA_D17
FBA_D18
FBVDDQ
FBVDDQ J15 X7R, Near GPU. MDB20 F12
FBB_D19
FBB_D20
MDA19 G32 J16 MDB21 D8
MDA20 K30
FBA_D19
FBA_D20
FBVDDQ
FBVDDQ J17 X7R, Under GPU. MDB22 D11
FBB_D21
FBB_D22
MDA21 K32 J20 MDB23 E11
H30 FBA_D22 FBVDDQ J21 D12 FBB_D24
MDA23 K31 J22 MDB25 E13
L31 FBA_D24 FBVDDQ J23 F13 FBB_D26
MDA25 L30 J24 MDB27 F14
M32 FBA_D26 FBVDDQ J29 F15 FBB_D28
MDA27 N30 MDB29 E16
MDA28 FBA_D27 MDB30 FBB_D29
M30 FBA_D28 F16 FBB_D30
MDA29 P31 MDB31 F17
R32 FBA_D30 D29 FBB_D32
MDA31 R30 MDB33 F27
AG30 FBA_D32 F28 FBB_D34
MDA33 AG32 MDB35 E28
AH31 FBA_D34 D26 FBB_D36
MDA35 AF31 MDB37 F25
AF30 FBA_D36 D24 FBB_D38
MDA37 AE30 MDB39 E25
AC32 FBA_D38 E32 FBB_D40
MDA39 AD30 MDB41 F32
AN33 FBA_D40 D33 FBB_D42
MDA41 AL31 MDB43 E31
AM33 FBA_D42 C33 FBB_D44
MDA43 AL33 MDB45 F29
AK30 FBA_D44 D30 FBB_D46
MDA45 AK32 MDB47 E29
AJ30 FBA_D46 B29 FBB_D48
MDA47 AH30 MDB49 C31
AH33 FBA_D48 C29 FBB_D50
MDA49 AH35 MDB51 B31
AH34 FBA_D50 C32 FBB_D52 FBB_CMD0 F18 -FBB_CS0 90
MDA51 AH32 MDB53 B32 E19
MDA52 FBA_D51 MDB54 FBB_D53 FBB_CMD1
AJ33 FBA_D52 FBA_CMD0 U30 -FBA_CS0 88 B35 FBB_D54 FBB_CMD2 D18 FBB_ODT0 90
MDA53 AL35 V30 MDB55 B34 C17
MDA54 FBA_D53 FBA_CMD1 MDB56 FBB_D55 FBB_CMD3 FBB_CKE0 90
AM34 FBA_D54 FBA_CMD2 U31 FBA_ODT0 88 A29 FBB_D56 FBB_CMD4 F19
C MDA55 AM35 V32 MDB57 B28 C19 C
MDA56 FBA_D55 FBA_CMD3 FBA_CKE0 88 MDB58 FBB_D57 FBB_CMD5 FBB_RST 90,91
AF33 FBA_D56 FBA_CMD4 T35 A28 FBB_D58 FBB_CMD6 B17 FBB_A9 90,91
MDA57 AE32 U33 MDB59 C28 E20
MDA58 FBA_D57 FBA_CMD5 FBA_RST 88,89 MDB60 FBB_D59 FBB_CMD7 FBB_A7 90,91
AF34 FBA_D58 FBA_CMD6 W32 FBA_A9 88,89 C26 FBB_D60 FBB_CMD8 B19 FBB_A2 90,91
MDA59 AE35 W33 MDB61 D25 D20
MDA60 FBA_D59 FBA_CMD7 FBA_A7 88,89 MDB62 FBB_D61 FBB_CMD9 FBB_A0 90,91
AE34 FBA_D60 FBA_CMD8 W31 FBA_A2 88,89 B25 FBB_D62 FBB_CMD10 A19 FBB_A4 90,91
MDA61 AE33 W34 MDB63 A25 D19
MDA62 FBA_D61 FBA_CMD9 FBA_A0 88,89 FBB_D63 FBB_CMD11 FBB_A1 90,91
AB32 FBA_D62 FBA_CMD10 U34 FBA_A4 88,89 FBB_CMD12 C20 FBB_BA0 90,91
MDA63 AC35 U35 F20
FBA_D63 FBA_CMD11 FBA_A1 88,89 FBB_CMD13 -FBB_WE 90,91
FBA_CMD12 U32 FBA_BA0 88,89 90 DQMB0 A16 FBB_DQM0 FBB_CMD14 B20
FBA_CMD13 T34 -FBA_WE 88,89 90 DQMB1 D10 FBB_DQM1 FBB_CMD15 G21 -FBB_CAS 90,91
88 DQMA0 P32 FBA_DQM0 FBA_CMD14 T33 90 DQMB2 F11 FBB_DQM2 FBB_CMD16 F22 -FBB_CS1 91
88 DQMA1 H34 FBA_DQM1 FBA_CMD15 W30 -FBA_CAS 88,89 90 DQMB3 D15 FBB_DQM3 FBB_CMD17 F24
88 DQMA2 J30 FBA_DQM2 FBA_CMD16 AB30 -FBA_CS1 89 91 DQMB4 D27 FBB_DQM4 FBB_CMD18 F23 FBB_ODT1 91
88 DQMA3 P30 FBA_DQM3 FBA_CMD17 AA30 91 DQMB5 D34 FBB_DQM5 FBB_CMD19 C25 FBB_CKE1 91
89 DQMA4 AF32 FBA_DQM4 FBA_CMD18 AB31 FBA_ODT1 89 91 DQMB6 A34 FBB_DQM6 FBB_CMD20 C23 FBB_A13 90,91
89 DQMA5 AL32 FBA_DQM5 FBA_CMD19 AA32 FBA_CKE1 89 91 DQMB7 D28 FBB_DQM7 FBB_CMD21 F21 FBB_A8 90,91
89 DQMA6 AL34 FBA_DQM6 FBA_CMD20 AB33 FBA_A13 88,89 FBB_CMD22 E22 FBB_A6 90,91
89 DQMA7 AF35 FBA_DQM7 FBA_CMD21 Y32 FBA_A8 88,89 FBB_CMD23 D21 FBB_A11 90,91
FBA_CMD22 Y33 FBA_A6 88,89 90 QSBP_0 C14 FBB_DQS_WP0 FBB_CMD24 A23 FBB_A5 90,91
FBA_CMD23 AB34 FBA_A11 88,89 90 QSBP_1 A10 FBB_DQS_WP1 FBB_CMD25 D22 FBB_A3 90,91
88 QSAP_0 L34 FBA_DQS_WP0 FBA_CMD24 AB35 FBA_A5 88,89 90 QSBP_2 E10 FBB_DQS_WP2 FBB_CMD26 B23 FBB_BA2 90,91
88 QSAP_1 H35 FBA_DQS_WP1 FBA_CMD25 Y35 FBA_A3 88,89 90 QSBP_3 D14 FBB_DQS_WP3 FBB_CMD27 C22 FBB_BA1 90,91
88 QSAP_2 J32 FBA_DQS_WP2 FBA_CMD26 W35 FBA_BA2 88,89 91 QSBP_4 E26 FBB_DQS_WP4 FBB_CMD28 B22 FBB_A12 90,91
88 QSAP_3 N31 FBA_DQS_WP3 FBA_CMD27 Y34 FBA_BA1 88,89 91 QSBP_5 D32 FBB_DQS_WP5 FBB_CMD29 A22 FBB_A10 90,91
89 QSAP_4 AE31 FBA_DQS_WP4 FBA_CMD28 Y31 FBA_A12 88,89 91 QSBP_6 A32 FBB_DQS_WP6 FBB_CMD30 A20 -FBB_RAS 90,91
89 QSAP_5 AJ32 FBA_DQS_WP5 FBA_CMD29 Y30 FBA_A10 88,89 91 QSBP_7 B26 FBB_DQS_WP7 FBB_CMD31 G20
89 QSAP_6 AJ34 FBA_DQS_WP6 FBA_CMD30 W29 -FBA_RAS 88,89
89 QSAP_7 AC33 FBA_DQS_WP7 FBA_CMD31 Y29
90 QSBN_0 B14 FBB_DQS_RN0
FBA_CLK0 T32 CLKA0 88 90 QSBN_1 B10 FBB_DQS_RN1
88 QSAN_0 L35 FBA_DQS_RN0 FBA_CLK0# T31 CLKA0# 88 90 QSBN_2 D9 FBB_DQS_RN2 FBB_CLK0 E17 CLKB0 90
88 QSAN_1 G35 FBA_DQS_RN1 FBA_CLK1 AC31 CLKA1 89 90 QSBN_3 E14 FBB_DQS_RN3 FBB_CLK0# D17 CLKB0# 90
88 QSAN_2 H31 FBA_DQS_RN2 FBA_CLK1# AC30 CLKA1# 89 91 QSBN_4 F26 FBB_DQS_RN4 FBB_CLK1 D23 CLKB1 91
88 QSAN_3 N32 FBA_DQS_RN3 91 QSBN_5 D31 FBB_DQS_RN5 FBB_CLK1# E23 CLKB1# 91
89 QSAN_4 AD32 FBA_DQS_RN4 91 QSBN_6 A31 FBB_DQS_RN6
89 QSAN_5 AJ31 FBA_DQS_RN5 91 QSBN_7 A26 FBB_DQS_RN7 1D5V_VGA_S0
89 QSAN_6 AJ35 FBA_DQS_RN6 1D5V_VGA_S0
89 QSAN_7 AC34 FBA_DQS_RN7
P29 G14 G19 R8520 1 DY 2
FBA_WCK0 FBB_WCK0 FBB_DEBUG0 R8521 1
R29 FBA_WCK0# G15 FBB_WCK0# FBB_DEBUG1 G16 DY 2 Do Not Stuff
R8518 1 DY Do Not Stuff
L29
M29
FBA_WCK1 FBA_DEBUG0 T30
T29 R8519 1 DY
2
2 Do Not Stuff
1.05V +/- 3% G11
G12
FBB_WCK1
FBA_WCK1# FBA_DEBUG1 Do Not Stuff FBB_WCK1#
AG29
AH29
FBA_WCK2 200mA G27
G28
FBB_WCK2
FBA_WCK2# FBB_WCK2#
B
AD29 FBA_WCK3 (See NV DG) G24 FBB_WCK3 B
AE29 FBA_WCK3# G25 FBB_WCK3#
1D05V_VGA_S0
L8501
FB_DLLAVDD AG27 FB_PLLVDD_16mil 1 ( ( 2 1D5V_VGA_S0

FB_PLLAVDD AF27
Do Not Stuff DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
CHIP BEAD BLM18KG300TN1D MURATA

X7R X7R DIS_Muxless R8501
1
FB_DLLAVDD J19 FB_CAL_PD_VDDQ K27 FB_CAL_PD_VDDQ 1 2

J18 C8513 C8514 C8515 C8516
FB_PLLAVDD FB_CAL_PU_GND
L27
2
FB_CAL_PU_GND Do Not Stuff

DIS_Muxless
FB_CAL_TERM_GND M27 FB_CAL_TERM_GND
J27 NC#J27
DIS_Muxless DIS_Muxless DIS_Muxless Do Not Stuff
Do Not Stuff
DIS_Muxless
X7R, Under GPU.
1
DIS_Muxless
Do Not Stuff
Do Not Stuff
DIS_Muxless R8502 DIS_Muxless
R8503
2
CLKA1 CLKA0
Group B CLKB1 CLKB0

1
R8504 R8505
1
DIS_Muxless DIS_Muxless FBB_CKE0 R8506 R8507
CKE0 Do Not Stuff Do Not Stuff
2
FBB_CKE1
CLKA1# CLKA0# Group A CKE1
2
FBB_RST Reset CLKB1# CLKB0#
CKE0 FBA_CKE0
FBB_ODT0 ODT0
CKE1 FBA_CKE1
A FBCLK Termination place on VRAM side Reset FBA_RST
FBB_ODT1 ODT1 FBCLK Termination place on VRAM side A
ODT0 FBA_ODT0
ODT1 FBA_ODT1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
HR UMA
R8508 R8509 R8510 R8511 R8512 R8513 R8514 R8515 R8516
DIS_Muxless
R8517
DIS_Muxless
Wistron Corporation
2

DIS_MuxlessDIS_Muxless DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless Title
GPU_DP/LVDS/CRT/GPIO(3/5)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
3.3V +/- 5%
120mA
300ohm@100MHz ESR=0.25ohm (See NV DG) 1.05V +/- 3%
150mA
3D3V_VGA_S0
L8602
(See NV DG)
1D05V_VGA_S0 PLLVDD_PWR
Do Not Stuff
3D3V_VGA_S0_DACA_VDD_16MIL 1 2
DIS L8601
Do Not Stuff
1
1 ( ( 2
Muxless X7R
1
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
R8629 C8601 C8602 C8603 CHIP BEAD BLM18KG300TN1D MURATA
DIS DIS DIS C8605 C8606 C8607 C8608
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Missed 3x 0.1uF
Do Not Stuff
Do Not Stuff
2
2
DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless VGA1N 14 OF 16
XTAL_PLL
AE9
D X7R, Under GPU. AD9
PLLVDD
VID_PLLVDD
D
3D3V_VGA_S0 AF9 SP_PLLVDD

VGA1D 4 OF 16
DACA
AJ12 DACA_VDD I2CA_SCL G1 VGA_CRT_DDCCLK 95
X7R, Under GPU.
G4 VGA1F 6 OF 16 RN8604
I2CA_SDA VGA_CRT_DDCDATA 95
DACA_VREF_AK12 AK12 DACB Do Not Stuff
DACA_VREF DACB_VDD_AG7 I2CB_SCL_G3
AG7 DACB_VDD I2CB_SCL G3 4 1
AK13 AM13 VGA_CRT_HSYNC 95 G2 I2CB_SDA_G2 3 2 TP8609Do Not Stuff VIDEO_CLK_XTAL_SS D2 D1 N12P_XTAL_OUTBUFF
DACA_RSET DACA_HSYNC I2CB_SDA XTAL_SSIN XTAL_OUTBUFF
DACA_VSYNC AL13 VGA_CRT_VSYNC 95 AK6 DACB_VREF
1
DIS_Muxless
AH7 DACB_RSET DACB_HSYNC AM1 B1 XTAL_IN XTAL_OUT B2
DACA_RED AM15 VGA_CRT_RED 95 DACB_VSYNC AM2
1
1
R8616 Do Not Stuff
1
1
DIS AM14 VGA_CRT_GREEN 95 DIS_Muxless 20PF 5% 50V +/-0.25PF 0402 R8605
2
C8609 R8603 DACA_GREEN
DACB_RED AK4 DIS_Muxless Do Not Stuff
Do Not Stuff
Do Not Stuff AL14 VGA_CRT_BLUE 95 DY R8604

2
DACA_BLUE
Do Not Stuff
AL4
SB DIS_Muxless DY?? Do Not Stuff
2
2
DACB_GREEN R8606
DIS
2
RN8602 AJ4 27MHZ_IN 1 Do Not Stuff
2 27MHZ_OUT
VGA_CRT_BLUE DACB_BLUE
1 8 DY
2
Do Not Stuff VGA_CRT_GREEN 2 7
VGA_CRT_RED 3 6 R8607
delete 10K DY to GND 4 5 Do Not Stuff DIS_Muxless
Do Not Stuff
1
1 2 27MHZ_OUT_R
DIS X8601
1
20100621 NV suggestion C8610 Do Not Stuff C8611
DIS_Muxless Do Not Stuff Do Not Stuff Do Not Stuff
2nd = 82.30034.521
2
DIS_Muxless
SB HOSONIC modify to 12P, R8607 modify to 390R
VGA Thermal sensor P2800

3D3V_VGA_S0
DIS_Muxless
1 2
Q8601 R8639
3D3V_VGA_S0 Do Not Stuff
2nd = 84.DM601.03F
SMBC_THERM_NV 1 6 SML1_CLK 20,27
4
3
2 5
RN8605
Do Not Stuff 3 4 SMBD_THERM_NV
C 20,27 SML1_DATA C
DIS_Muxless
DIS_Muxless
1
2
SMBC_THERM_NV
SMBD_THERM_NV
3D3V_VGA_S0
Modify SMBUS
SB ,
1
1
Do Not Stuff
R8611
Do Not Stuff
R8609 R8610 DIS_Muxless SJM50-CP SUPPORT
Do Not Stuff
DIS_Muxless P-STATE NVVDD_ALTV1 NVVDD_ALTV0 N11M-GE1 N11M-GE2 N11M-OP1 N11P-GE1 N11P-GE Fermi
2
Pull high Page 94

VGA1L 12 OF 16
TP8610 MISC1
DIS_Muxless P12 0 0 0.85V 0.85V 0.85V 0.80V 0.85V
B4 E2 SMBC_THERM_NV
THERMDN I2CS_SCL SMBD_THERM_NV P8 0 1 0.85V 0.85V 0.85V 0.85V 0.9V
I2CS_SDA E1
Do Not Stuff P0 1 0 1.03V 1.03V 1.03V 0.95V 0.95V
I2CC_SCL E3 GPU_LVDS_CLK 94
I2CC_SDA E4 GPU_LVDS_DATA 94
TP8611
B5 THERMDP
0.9V
3D3V_VGA_S0 3D3V_VGA_S0
Do Not Stuff
Do Not Stuff
TP8601 GPIO2 K3 VGA_LBKLT_CTL 94
GPIO3 H3 VGA_LCDVDD_EN 94
2
SB R8619 15" DY GPIO4 H2 VGA_BLEN 94
H1 PWRCNTL_0 92 R8640 R8644
GPIO5
DY GPIO6 H4 PWRCNTL_1 92 DIS_Muxless Do Not Stuff DY Do Not Stuff
R8619 H5 N12P_GPIO7_H5 TP8602Do Not Stuff
Do Not Stuff GPIO7 N12P_GPIO8_H6
H6
1
N12P_GPIO_JTAG_TCK
GPIO8 N12P_GPIO9_J7 PWRCNTL_0
1 2 AP14 JTAG_TCK GPIO9 J7
Do Not Stuff
TP8603 N12P_JTAG_TMS AR14 K4
Do Not Stuff
TP8604 N12P_JTAG_TDI JTAG_TMS GPIO10 PWRCNTL_1
AN14 JTAG_TDI GPIO11 K5
Do Not Stuff
TP8605 N12P_JTAG_TDO AN16 H7 N12P_GPIO12_H7
JTAG_TDO GPIO12
1
1 2 N12P_GPIO_JTAG_TRST AP16 J4
JTAG_TRST# GPIO13 R8642 R8623
GPIO14 J6
R8620 Do Not Stuff Do Not Stuff
Do Not Stuff L2
DIS
GPIO16
2
L4
DIS_Muxless DIS
2
GPIO17 N12P_GPIO7_M4 TP8612 Do Not Stuff R8643 R8641

GPIO18 M4
DY Do Not Stuff Do Not Stuff
L5
GPIO20 DIS_Muxless
1
GPIO22 L6
GPIO23 M6
GPIO24 M7
Do Not Stuff
DIS_Muxless
B TABLE -1 modify N12P GV setting B
NVIDIA TABLE NVIDIA 71.0N12P.E0U 71.0N12P.A0U
Hynix 2G Hynix 1G Samsung 1G Samsung 512 Samsung 2G N12P-GS N12P-GV N11P-GE Fermi N11P-GS Fermi N12P-GE
0110 0000 0011 0111 DEV ID: DEV ID: DEV ID:
DEV ID: DEV ID:
128*16*8 64*16*8 64*16*8 64*16*4 128*16*8 0x0DF1 0x0DF0 0x0DF5
800MHZ 800MHZ 800MHZ 800MHZ 800MHZ 0x0DF4 0x1050 (0001) (0000) (0101)
5Kohm 45Kohm
RO M_SIPD 34.8Kohm 20Kohm 20Kohm 45Kohm STRAP2 PU 25Kohm
ES 45K QS 5K
10Kohm 5Kohm 30Kohm
R8627 64.34825.6DL 64.49915.6DL 64.20025.6DL 64.20025.6DL 64.45325.6DL 64.24925.6DL 64.49915.6DL 63.10334.1DL 64.49915.6DL 64.30025.6DL
Logical Strap Bit Mapping
3D3V_VGA_S0 SB change 3D3V_VGA_S0, GPU_ROM_SI for 1Gbit for 2Gbit for 1Gbit for 2Gbit Resistor Pull-up Pull-down
R8638 change DY Hynix VRAM Hynix VRAM Samsung VRAM Samsung VRAM 5Kohms 1000 0000
RAM_CFG[0]=0 RAM_CFG[0]=0 RAM_CFG[0]=1 RAM_CFG[0]=1 10Kohms 1001 0001
2
RAM_CFG[1]=1 RAM_CFG[1]=1 RAM_CFG[1]=1 RAM_CFG[1]=1 15Kohms 1010 0010

R8638 RAM_CFG[2]=0 RAM_CFG[2]=1 RAM_CFG[2]=0 RAM_CFG[2]=1 20Kohms 1011 0011
VGA1M
MISC2
13 OF 16
DY Do Not Stuff RAM_CFG[3]=0 RAM_CFG[3]=0 RAM_CFG[3]=0 RAM_CFG[3]=0 25Kohms 1100 0100 STRAP0 USER[0]=1
USER[1]=1
N12P-GS N12P-GV N11P-GE N11P-GS N12P-GE
J26 C3 ROM_CS# 30Kohms 1101 0101
USE 1111 (45K) Pull Low Pull Low
1
NC#J26 ROM_CS#
VGA_DEVICE =1 (low bit) 35Kohms 1110 0110 USER[2]=1
J25 NC#J25 GPU_ROM_SO USER[3]=1
D3 ROM_SI_D3 SMB_ALT_ADDR =0 45Kohms 1111 0111
ROM_SI ROM_SO_C4
ROM_SO C4 FB_0_BAR_SIZE =0
D4 ROM_SLK_D4
ROM_SCLK XCLK_417 =0 (High bit)
3D3V_VGA_S0 STRAP1 3GIO_PADCFG[0]=0 0

W5 STRAP0 3GIO_PADCFG[1]=1 1
STRAP0 3D3V_VGA_S0
W7 STRAP1 GPU_ROM_SCLK PEX_PLL_EN_TERM =0
STRAP1 STRAP2 3GIO_PADCFG[2]=1 1
V7 SLOT_CLK_CFG =1
STRAP2
DIS_Muless SUB_VENDOR =0 3D3V_VGA_S0
3GIO_PADCFG[3]=1 0
USE 0110 (35K)
1
R8614
R8628 Do Not Stuff PCI_DEVID[4] =1
Do Not Stuff I2CH_SCL_F6
N11P Fermi QS 1
DIS_Muxless I2CH_SCL F6 1 2
STRAP2 PCI_DEVID[0]=1 N12P-GS GF108-730-A1 0x0DF4 (0X4) (0100)
G6 I2CH_SDA_G6 1 2 PCI_DEVID[1]=0 N12P-GV1 GF108-705-A1 0x0DF7 (0X7) (0111)
2
I2CH_SDA R8615
CEC_AB5 Do Not Stuff PCI_DEVID[2]=0 N11P-GS Fermi 0x0DF0 (0000)
AB5 CEC
DIS_Muless PCI_DEVID[3]=0
N11P-GE Fermi 0x0DF1 (0001)
NC#A5 A5
R8625
A 3D3V_VGA_S0 A
A4 Do Not Stuff DIS_Muxless
BUFRST#
1
1
C5 R8624 DIS_Muxless N12PGS_N12PGV:64.49915.6DL
STRAP_REF0_GND_N9 NC#C5 Do Not Stuff
STRAP_REF1_GND_M9
N9 MULTI_STRAP_REF0_GND N12P-GV R8626
M9 MULTI_STRAP_REF1_GND
AK14
DY Do Not Stuff
GND
K9
2
GND
1
1
ROM_SI_D3 R8630
Do Not Stuff ROM_SO_C4 Do Not Stuff DY R8634
R8612 R8613 ROM_SLK_D4 DIS_Muxless R8632 Do Not Stuff
DIS_Muxless DIS_Muxless Do Not Stuff DY
DIS_Muxless
1
R8618
2
2
R8627 R8617 Do Not Stuff STRAP0
Do Not Stuff
Do Not Stuff
Do Not Stuff DIS_Muxless Do Not Stuff STRAP1

DIS_Muxless N12P-GS DY STRAP2
HR UMA
2
1
Hy2G_64.34825.6DL,Hy1G_64.15025.6DL,Sam1G512M_64.20025.6DL,Sam2G_64.45325.6DL R8633
DY R8631 Do Not Stuff R8635 Wistron Corporation
Do Not Stuff DIS_Muxless Do Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DIS_Muxless Taipei Hsien 221, Taiwan, R.O.C.
2
N12PGS_N12PGV:64.49915.6DL Title
GPU_POWER(4/5)
A1
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
VGA1O 15 OF 16
EDP 50A AA11 GND

GND
GND E15
AA12 E18
(TDP 37W) AA13
AA14
AA15
GND
GND
GND
GND
GND
GND
E24
E27
E30
GND GND
VGA_CORE AA16 GND GND E6
AA17 GND GND E9
VGA_CORE AA18 GND GND F2
AA19 GND GND F31
AA2 F34
D
Under GPU VGA1P 16 OF 16 AA20
GND GND
F5 D
NVVDD GND GND
AA21 GND GND J2
AB11 VDD VDD P21 AA22 GND GND J31
AB17 VDD VDD R11 AA25 GND GND L9
1
1
C8705 C8706 C8707 C8708 AB19 R12 AA34 M11
VDD VDD GND GND
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
AB21 VDD VDD R13 AA5 GND GND M13
AB23 R14 AB12 M15
2
2
VDD VDD GND GND
AB25 VDD VDD R15 AB14 GND GND M17
AC11 VDD VDD R16 AB16 GND GND M19
DIS_Muxless DIS_Muxless AC12 VDD VDD R17 AB18 GND GND M2
AC16 VDD VDD R21 AC9 GND GND M31
AC17 VDD VDD R22 AD11 GND GND M34
AC18 R23 AD13 M5
Under GPU AC19
VDD VDD
R24 AD15
GND GND
N11
VDD VDD GND GND
AC20 VDD VDD R25 AD17 GND GND N12
AC21 VDD VDD T12 AD2 GND GND N13
1
C8715 C8716 C8718 C8719 C8720 AC25 T20 AD31 N17

VDD VDD GND GND
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
AD12 VDD VDD T22 AD34 GND GND N18

AD14 T24 AD5 N19
2
VDD VDD GND GND

AD16 VDD VDD V11 AE11 GND GND N20
C DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless AD22 V15 AE13 N22 C
VDD VDD GND GND
L11 VDD VDD V19 AE15 GND GND N24
L12 VDD VDD V21 AE16 GND GND N25
L13 VDD VDD V23 AE17 GND GND P12
L14 V25 AE18 P14
NEAR GPU L15
VDD VDD
W11 AE19
GND GND
P16
VDD VDD GND GND
L16 VDD VDD W12 AE20 GND GND P18
L20 VDD VDD W16 AE24 GND GND R2
1
L21 VDD VDD W17 AE25 GND GND R31

Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
C8721 C8722 C8723 C8724 L22 W18 AG2 R34

VDD VDD GND GND
L23 W19 AG31 R5
2
VDD VDD GND GND

L24 VDD VDD W20 AG34 GND GND T11
L25 VDD VDD W21 AG5 GND GND T13
DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless M12 VDD VDD W22 AK2 GND GND T15
M14 VDD VDD W23 AK31 GND GND T17
M20 VDD VDD Y12 AL12 GND GND T23
M22 VDD VDD Y14 AL15 GND GND T25
M24 VDD VDD Y16 AL18 GND GND U11
P11 VDD VDD Y18 AL21 GND GND U12
1
C8710 C8711 C8713 C8714 P17 Y24 AL30 U15

VDD VDD GND GND
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
P19 VDD AL6 GND GND U16

B B
AL9 U17
2
Do Not Stuff GND GND

AN2 GND GND U18
AN34 GND GND U19
DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless AP12 GND GND U20
AP15 GND GND U21
AP18 GND GND U22
AP21 GND GND U23
AP24 GND GND U24
AP27 GND GND U25
AP3 GND GND V12
AP30 GND GND V14
AP33 GND GND V16
AP6 GND GND V18
1
C8725 C8726 AP9 V2

GND GND
Do Not Stuff
Do Not Stuff
B12 GND GND V20

B15 V22
2
GND GND
B21 GND GND V24
DY DY B24 GND GND V31
B27 GND GND V5
B3 GND GND V9
B30 GND GND Y11
B33 GND GND Y13
B6 GND GND Y15
B9 GND GND Y17
C2 GND GND Y19
C34 GND GND Y21
E12 GND GND Y23
GND Y25 HR UMA
A A
Do Not Stuff
DIS_Muxless
Wistron Corporation
Title
GPU_DPPWR/GND(5/5)
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM2
VRAM1 MDA[63..0] 85,89
MDA[63..0] 85,89 K8 E3 MDA26
MDA23 VDD DQL0 MDA27
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDA19 N1 F2 MDA28
VDD DQL1 MDA22 VDD DQL2 MDA30
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDA16 B2 H3 MDA24
D B2 VDD DQL4 H3 D9 VDD DQL5 H8 D
D9 H8 MDA18 G7 G2 MDA25
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDA17 N9
VDD DQL7 VDD MDA7
N9 VDD DQU0 D7
D7 MDA12 A8 C3 MDA0
DQU0 MDA8 VDDQ DQU1 MDA6
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDA15 C1 C2 MDA2
VDDQ DQU2 MDA10 VDDQ DQU3 MDA4
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDA13 D2 A2 MDA3
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDA14 F1 A3 MDA1
VDDQ DQU6 MDA11 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSAP_0 85
H2 VDDQ DQSU C7 QSAP_1 85 DQSU# B7 QSAN_0 85
B7 QSAN_1 85 VRAM1_VREF H1
VRAM1_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSAP_3 85
M8 F3 QSAP_2 85 VRAM_ZQ1 L8 G3 QSAN_3 85
VRAM_ZQ2 VREFCA DQSL ZQ DQSL#
L8 ZQ DQSL# G3 QSAN_2 85
2
ODT K1 FBA_ODT0 85
2
K1 R8802 85,89 FBA_A0 N3

ODT FBA_ODT0 85 A0
R8801 85,89 FBA_A0 N3 Do Not Stuff 85,89 FBA_A1 P7
A0 A1
Do Not Stuff 85,89 FBA_A1 P7 A1 DIS_Muxless 85,89 FBA_A2 P3 A2 CS# L2 -FBA_CS0 85
DIS_Muxless 85,89 FBA_A2 P3 L2 -FBA_CS0 85 85,89 FBA_A3 N2 T2 FBA_RST 85,89
1
A2 CS# A3 RESET#
85,89 FBA_A3 N2 T2 FBA_RST 85,89 85,89 FBA_A4 P8
1
A3 RESET# A4
85,89 FBA_A4 P8 A4 85,89 FBA_A5 P2 A5
85,89 FBA_A5 P2 A5 85,89 FBA_A6 R8 A6 NC#T7 T7
85,89 FBA_A6 R8 A6 NC#T7 T7 85,89 FBA_A7 R2 A7 NC#L9 L9
85,89 FBA_A7 R2 A7 NC#L9 L9 85,89 FBA_A8 T8 A8 NC#L1 L1
85,89 FBA_A8 T8 A8 NC#L1 L1 85,89 FBA_A9 R3 A9 NC#J9 J9
85,89 FBA_A9 R3 A9 NC#J9 J9 85,89 FBA_A10 L7 A10/AP NC#J1 J1
C 85,89 FBA_A10 L7 A10/AP NC#J1 J1 85,89 FBA_A11 R7 A11 C
85,89 FBA_A11 R7 A11 85,89 FBA_A12 N7 A12/BC#
85,89 FBA_A12 N7 A12/BC# 85,89 FBA_A13 T3 A13 VSS J8
85,89 FBA_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,89 FBA_BA0 M2 BA0 VSS P9
85,89 FBA_BA0 M2 BA0 VSS P9 85,89 FBA_BA1 N8 BA1 VSS G8
85,89 FBA_BA1 N8 BA1 VSS G8 85,89 FBA_BA2 M3 BA2 VSS B3
85,89 FBA_BA2 M3 B3 1D5V_VGA_S0 T1
BA2 VSS VSS
VSS T1 VSS A9
VSS A9 85 CLKA0 J7 CK VSS T9
1
85 CLKA0 J7 CK VSS T9 85 CLKA0# K7 CK# VSS E1
85 CLKA0# K7 E1 R8803 P1
CK# VSS Do Not Stuff VSS
VSS P1 DIS_Muxless 85 FBA_CKE0 K9 CKE SB to -1
85 FBA_CKE0 K9 CKE VSSQ G1
G1 F9
2
VSSQ VSSQ VRAM1_VREF
VSSQ F9 85 DQMA0 D3 DMU VSSQ E8
85 DQMA1 D3 E8 VRAM1_VREF 85 DQMA3 E7 E2
DMU VSSQ DML VSSQ
85 DQMA2 E7 DML VSSQ E2 1 VSSQ D8
1
D8 D1 C8817
VSSQ VSSQ
Do Not Stuff
D1 R8804 C8802 L3 B9 DIS_Muxless
VSSQ 85,89 -FBA_WE WE# VSSQ
Do Not Stuff
L3 B9 Do Not Stuff DIS_Muxless K3 B1
85,89 -FBA_WE 85,89 -FBA_CAS
2
WE# VSSQ CAS# VSSQ
85,89 -FBA_CAS K3 B1 DIS_Muxless 85,89 -FBA_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ
85,89 -FBA_RAS J3 G9
2
RAS# VSSQ
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
B B
VRAM = N12PGS_N12PGV VRAM = N12PGS_N12PGV
FB CMD mapping Mode D-N12x
VRAM SAMSUNG 1Gb VR.1GB0B.006

1D5V_VGA_S0 VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005 DG requires 4x0.1uF and 8x1.0uF per
VRAM HYNIX 2Gb VR.2GB0G.001 VRAM chip
FOR VRAM1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
1D5V_VGA_S0
C8801 C8803 C8804 C8805 C8806
2
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
1D5V_VGA_S0
1
CLOSE TO THE MEMORY C8809 DIS_Muxless

2
A CLOSE TO THE MEMORY HR UMA A

Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
C8810 C8811 C8812 C8813 C8814

FOR VRAM2 Wistron Corporation
2

DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless Title
GPU-VRAM1,2 (1/4)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM3
MDA[63..0] 85,88 VRAM4
K8 E3 MDA58 MDA[63..0] 85,88
VDD DQL0 MDA57 MDA43
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDA62 K2 F7 MDA42
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDA63 R9 F8 MDA40
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDA56 D9 H8 MDA41
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDA47
VDD MDA51 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDA53 D7 MDA33
VDDQ DQU1 MDA50 DQU0 MDA37
C1 C2 MDA52 A1 C8 MDA32
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDA54 C9 A7 MDA35
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDA55 E9 B8 MDA34
VDDQ DQU7 VDDQ DQU6 MDA38
H9 VDDQ F1 VDDQ DQU7 A3
H2 C7 H9
SB to -1 modify to VRAM3_VREF VDDQ DQSU
B7
QSAP_6 85
H2
VDDQ
C7
VRAM3_VREF H1 VREFDQ
DQSU# QSAN_6 85
DQSU# B7
QSAP_4 85
QSAN_4 85
M8 F3 QSAP_7 85 VRAM3_VREF H1
VRAM_ZQ3 VREFCA DQSL VREFDQ
L8 ZQ DQSL# G3 QSAN_7 85 M8 VREFCA DQSL F3 QSAP_5 85
VRAM_ZQ4 L8 G3 QSAN_5 85
ZQ DQSL#
ODT K1 FBA_ODT1 85
2
85,88 FBA_A0 N3 A0 ODT K1 FBA_ODT1 85
2
R8901 85,88 FBA_A1 P7 85,88 FBA_A0 N3
A1 R8904 A0
Do Not Stuff 85,88 FBA_A2 P3 A2 CS# L2 -FBA_CS1 85 85,88 FBA_A1 P7 A1
DIS_Muxless 85,88 FBA_A3 N2 A3 RESET# T2 FBA_RST 85,88 Do Not Stuff 85,88 FBA_A2 P3 A2 CS# L2 -FBA_CS1 85
85,88 FBA_A4 P8 DIS_Muxless 85,88 FBA_A3 N2 T2 FBA_RST 85,88
1
A4 A3 RESET#
85,88 FBA_A5 P2 85,88 FBA_A4 P8
1
A5 A4
85,88 FBA_A6 R8 A6 NC#T7 T7 85,88 FBA_A5 P2 A5
85,88 FBA_A7 R2 A7 NC#L9 L9 85,88 FBA_A6 R8 A6 NC#T7 T7
85,88 FBA_A8 T8 A8 NC#L1 L1 85,88 FBA_A7 R2 A7 NC#L9 L9
85,88 FBA_A9 R3 A9 NC#J9 J9 85,88 FBA_A8 T8 A8 NC#L1 L1
85,88 FBA_A10 L7 A10/AP NC#J1 J1 85,88 FBA_A9 R3 A9 NC#J9 J9
85,88 FBA_A11 R7 A11 85,88 FBA_A10 L7 A10/AP NC#J1 J1
85,88 FBA_A12 N7 A12/BC# 85,88 FBA_A11 R7 A11
C 85,88 FBA_A13 T3 A13 VSS J8 85,88 FBA_A12 N7 A12/BC# C
M7 A15 VSS M1 85,88 FBA_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
85,88 FBA_BA0 M2 BA0 VSS P9 VSS J2
85,88 FBA_BA1 N8 G8 1D5V_VGA_S0 85,88 FBA_BA0 M2 P9
BA1 VSS BA0 VSS
85,88 FBA_BA2 M3 BA2 VSS B3 85,88 FBA_BA1 N8 BA1 VSS G8
VSS T1 85,88 FBA_BA2 M3 BA2 VSS B3
1
VSS A9 VSS T1
85 CLKA1 J7 T9 R8902 A9
CK VSS Do Not Stuff VSS
85 CLKA1# K7 CK# VSS E1 DIS_Muxless 85 CLKA1 J7 CK VSS T9
P1 K7 E1
85 FBA_CKE1 K9
VSS 85 CLKA1# CK# VSS
P1 SB to -1 modify to VRAM3_VREF
2
CKE VSS
VSSQ G1 85 FBA_CKE1 K9 CKE
F9 VRAM3_VREF G1 VRAM3_VREF
VSSQ VSSQ
85 DQMA6 D3 DMU VSSQ E8 VSSQ F9
1
85 DQMA7 E7 DML VSSQ E2 85 DQMA4 D3 DMU VSSQ E8
1
D8 R8903 C8902 85 DQMA5 E7 E2 C8917
VSSQ DML VSSQ
Do Not Stuff
Do Not Stuff
Do Not Stuff DIS_Muxless DIS_Muxless
VSSQ D1 DIS_Muxless VSSQ D8
85,88 -FBA_WE L3 B9 D1
2
WE# VSSQ VSSQ
85,88 -FBA_CAS K3 B1 85,88 -FBA_WE L3 B9
2
CAS# VSSQ WE# VSSQ
85,88 -FBA_RAS J3 RAS# VSSQ G9 85,88 -FBA_CAS K3 CAS# VSSQ B1
85,88 -FBA_RAS J3 RAS# VSSQ G9
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless SB to -1 delete R8906 , R8905 , modify to VRAM2_VREF
B
1D5V_VGA_S0
VRAM = N12PGS_N12PGV FB CMD mapping Mode D-N12x VRAM = N12PGS_N12PGV
B

VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
VRAM HYNIX 2Gb VR.2GB0G.001

FOR VRAM3
1
C8901 C8903 C8904 C8905 C8906

2
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
1D5V_VGA_S0
CLOSE TO THE MEMORY
Do Not Stuff
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
C8909 DIS_Muxless
C8910 C8911 C8912 C8913 C8914
FOR VRAM4
2
2
HR UMA
A
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless CLOSE TO THE MEMORY A
Wistron Corporation
Title
GPU-VRAM3,4 (2/4)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM6
1D5V_VGA_S0
VRAM5 MDB[63..0] 85,91
MDB[63..0] 85,91 K8 E3 MDB3
MDB20 VDD DQL0 MDB7
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDB17 N1 F2 MDB0
VDD DQL1 MDB18 VDD DQL2 MDB5
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDB19 B2 H3 MDB1
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 MDB21 G7 G2 MDB2
G7 VDD DQL6 G2 R1 VDD DQL7 H7
D R1 H7 MDB16 N9 D
VDD DQL7 VDD MDB30
N9 VDD DQU0 D7
D7 MDB14 A8 C3 MDB25
DQU0 MDB8 VDDQ DQU1 MDB31
A1 C8 MDB15 C1 C2 MDB27
VDDQ DQU2 MDB10 VDDQ DQU3 MDB28
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDB12 D2 A2 MDB26
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDB13 F1 A3 MDB24
VDDQ DQU6 MDB11 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 H2 C7
H2
VDDQ
C7 SB to -1 modify to VRAM5_VREF VDDQ DQSU
B7
QSBP_3 85
DQSU# B7
QSBP_1 85
QSBN_1 85 VRAM5_VREF H1 VREFDQ
DQSU# QSBN_3 85
VRAM5_VREF H1 M8 F3 QSBP_0 85
VREFDQ VRAM_ZQ6 VREFCA DQSL
M8 VREFCA DQSL F3 QSBP_2 85 L8 ZQ DQSL# G3 QSBN_0 85
VRAM_ZQ5 L8 G3 QSBN_2 85
ZQ DQSL#
ODT K1 FBB_ODT0 85
2
2
ODT K1 FBB_ODT0 85 85,91 FBB_A0 N3 A0
R9001 85,91 FBB_A0 N3 R9002 85,91 FBB_A1 P7
A0 A1
DIS_Muxless Do Not Stuff 85,91 FBB_A1 P7 A1 DIS_Muxless Do Not Stuff 85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85
85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85 85,91 FBB_A3 N2 A3 RESET# T2 FBB_RST 85,91
85,91 FBB_A3 N2 T2 FBB_RST 85,91 85,91 FBB_A4 P8
1
1
A3 RESET# A4
85,91 FBB_A4 P8 A4 85,91 FBB_A5 P2 A5
85,91 FBB_A5 P2 A5 85,91 FBB_A6 R8 A6 NC#T7 T7
85,91 FBB_A6 R8 A6 NC#T7 T7 85,91 FBB_A7 R2 A7 NC#L9 L9
85,91 FBB_A7 R2 A7 NC#L9 L9 85,91 FBB_A8 T8 A8 NC#L1 L1
85,91 FBB_A8 T8 A8 NC#L1 L1 85,91 FBB_A9 R3 A9 NC#J9 J9
85,91 FBB_A9 R3 A9 NC#J9 J9 85,91 FBB_A10 L7 A10/AP NC#J1 J1
85,91 FBB_A10 L7 A10/AP NC#J1 J1 85,91 FBB_A11 R7 A11
85,91 FBB_A11 R7 A11 85,91 FBB_A12 N7 A12/BC#
C N7 T3 J8 C
85,91 FBB_A12 A12/BC# 85,91 FBB_A13 A13 VSS
85,91 FBB_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,91 FBB_BA0 M2 BA0 VSS P9
85,91 FBB_BA0 M2 BA0 VSS P9 85,91 FBB_BA1 N8 BA1 VSS G8
N8 G8 1D5V_VGA_S0 M3 B3
85,91
85,91
FBB_BA1
FBB_BA2 M3
BA1
BA2
VSS
VSS B3
85,91 FBB_BA2 BA2 VSS
VSS T1 SB to -1 modify to VRAM5_VREF
VSS T1 VSS A9
1
VSS A9 85 CLKB0 J7 CK VSS T9
85 CLKB0 J7 T9 R9003 85 CLKB0# K7 E1
CK VSS Do Not Stuff CK# VSS
85 CLKB0# K7 CK# VSS E1 VSS P1
VSS P1 85 FBB_CKE0 K9 CKE
85 FBB_CKE0 K9 G1
2
CKE VSSQ
VSSQ G1 VSSQ F9
F9 VRAM5_VREF 85 DQMB3 D3 E8
VSSQ DMU VSSQ
85 DQMB1 D3 DMU VSSQ E8 DIS_Muxless 85 DQMB0 E7 DML VSSQ E2
1
85 DQMB2 E7 DML VSSQ E2 VSSQ D8
1
D8 R9004 C9002 D1 VRAM5_VREF
VSSQ VSSQ
Do Not Stuff
D1 Do Not Stuff L3 B9
VSSQ 85,91 -FBB_WE WE# VSSQ
85,91 -FBB_WE L3 B9 85,91 -FBB_CAS K3 B1
2
WE# VSSQ CAS# VSSQ
1
K3 B1 J3 G9 C9017
85,91 -FBB_CAS 85,91 -FBB_RAS
2
CAS# VSSQ RAS# VSSQ
Do Not Stuff
85,91 -FBB_RAS J3 RAS# VSSQ G9 DIS_Muxless
2
DIS_Muxless DIS_Muxless Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
B
VRAM = N12PGS VRAM = N12PGS B

1D5V_VGA_S0
DG requires 4x0.1uF and 8x1.0uF per

VRAM chip
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
FOR VRAM5 1D5V_VGA_S0

1
C9001 C9003 C9004 C9005 C9006

2
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
1
1D5V_VGA_S0
C9009 DIS_Muxless
CLOSE TO THE MEMORY
2
A
CLOSE TO THE MEMORY A
HR UMA
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
1
Do Not Stuff
C9010 C9011 C9012 C9013 C9014

FOR VRAM6 Wistron Corporation
2

DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless Title
GPU-VRAM5,6 (3/4)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM7
1D5V_VGA_S0
MDB[63..0] 85,90 VRAM8
K8 E3 MDB34 MDB[63..0] 85,90
VDD DQL0 MDB33 MDB58
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB36 K2 F7 MDB57
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDB35 R9 F8 MDB56
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDB32 D9 H8 MDB61
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDB62
VDD MDB48 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDB53 D7 MDB41
VDDQ DQU1 MDB50 DQU0 MDB47
C1 C2 MDB55 A1 C8 MDB42
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDB54 C9 A7 MDB40
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDB52 E9 B8 MDB44
VDDQ DQU7 VDDQ DQU6 MDB46
H9 VDDQ F1 VDDQ DQU7 A3
H2 C7 H9
B7
QSBP_6 85
H2
VDDQ
C7
VRAM7_VREF H1 VREFDQ
DQSU# QSBN_6 85
DQSU# B7
QSBP_5 85
QSBN_5 85
M8 F3 QSBP_4 85 VRAM7_VREF H1
VRAM_ZQ7 VREFCA DQSL VREFDQ
L8 ZQ DQSL# G3 QSBN_4 85 M8 VREFCA DQSL F3 QSBP_7 85
VRAM_ZQ8 L8 G3 QSBN_7 85
ZQ DQSL#
2
ODT K1 FBB_ODT1 85
2
R9101 85,90 FBB_A0 N3 K1
A0 ODT FBB_ODT1 85
DIS_Muxless Do Not Stuff 85,90 FBB_A1 P7 R9104 85,90 FBB_A0 N3
A1 A0
85,90 FBB_A2 P3 A2 CS# L2 -FBB_CS1 85 Do Not Stuff
85,90 FBB_A1 P7 A1
85,90 FBB_A3 N2 T2 FBB_RST 85,90 DIS_Muxless85,90 FBB_A2 P3 L2 -FBB_CS1 85
1
A3 RESET# A2 CS#
85,90 FBB_A4 P8 85,90 FBB_A3 N2 T2 FBB_RST 85,90
1
A4 A3 RESET#
85,90 FBB_A5 P2 A5 85,90 FBB_A4 P8 A4
85,90 FBB_A6 R8 A6 NC#T7 T7 85,90 FBB_A5 P2 A5
85,90 FBB_A7 R2 A7 NC#L9 L9 85,90 FBB_A6 R8 A6 NC#T7 T7
85,90 FBB_A8 T8 A8 NC#L1 L1 85,90 FBB_A7 R2 A7 NC#L9 L9
85,90 FBB_A9 R3 A9 NC#J9 J9 85,90 FBB_A8 T8 A8 NC#L1 L1
85,90 FBB_A10 L7 A10/AP NC#J1 J1 85,90 FBB_A9 R3 A9 NC#J9 J9
85,90 FBB_A11 R7 A11 85,90 FBB_A10 L7 A10/AP NC#J1 J1
85,90 FBB_A12 N7 A12/BC# 85,90 FBB_A11 R7 A11
C 85,90 FBB_A13 T3 A13 VSS J8 85,90 FBB_A12 N7 A12/BC# C
M7 A15 VSS M1 85,90 FBB_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
M2 P9 J2
85,90
85,90
FBB_BA0
FBB_BA1 N8
BA0
BA1
VSS
VSS G8 85,90 FBB_BA0 M2 BA0
VSS
VSS P9 SB to -1 modify to VRAM7_VREF
85,90 FBB_BA2 M3 BA2 VSS B3 85,90 FBB_BA1 N8 BA1 VSS G8
T1 1D5V_VGA_S0 85,90 FBB_BA2 M3 B3
VSS BA2 VSS
VSS A9 VSS T1
85 CLKB1 J7 CK VSS T9 VSS A9
1
85 CLKB1# K7 CK# VSS E1 85 CLKB1 J7 CK VSS T9
P1 R9102 85 CLKB1# K7 E1
VSS Do Not Stuff CK# VSS
85 FBB_CKE1 K9 CKE DIS_Muxless VSS P1
VSSQ G1 85 FBB_CKE1 K9 CKE
F9 G1
2
VSSQ VSSQ
85 DQMB6 D3 DMU VSSQ E8 VSSQ F9
85 DQMB4 E7 E2 VRAM7_VREF 85 DQMB5 D3 E8 VRAM7_VREF
DML VSSQ DMU VSSQ
VSSQ D8 1 85 DQMB7 E7 DML VSSQ E2
VSSQ D1 VSSQ D8
1
L3 B9 R9103 C9118 D1 C9117
85,90 -FBB_WE WE# VSSQ VSSQ
Do Not Stuff
Do Not Stuff
Do Not Stuff DIS_Muxless DIS_Muxless
85,90 -FBB_CAS K3 CAS# VSSQ B1 DIS_Muxless 85,90 -FBB_WE L3 WE# VSSQ B9
85,90 -FBB_RAS J3 G9 85,90 -FBB_CAS K3 B1
2
RAS# VSSQ CAS# VSSQ
85,90 -FBB_RAS J3 G9
2
RAS# VSSQ
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
B 1D5V_VGA_S0 VRAM = N12PGS VRAM = N12PGS B
CLOSE TO THE MEMORY VRAM SAMSUNG 1Gb VR.1GB0B.006

1D5V_VGA_S0
FOR VRAM7
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
C9101 C9102 C9103 C9104 C9105 C9106

2
1
C9109
DIS_Muxless Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
2
1D5V_VGA_S0
CLOSE TO THE MEMORY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
C9110 C9111 C9112 C9113 C9114

FOR VRAM8
2
HR UMA
A DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless A
Wistron Corporation
Title
GPU-VRAM7,8 (4/4)
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
20100715
SSID = PWR.Plane.Regulator_GFX 20100719
DCBATOUT PWR_DCBATOUT_VGA_CORE
PG9201 VGA_CORE VGA_CORE_PWR VGA_CORE
1 2 PG9206 PG9216
1 2 1 2
Do Not Stuff
PG9202 PG9207 PG9217
1 2 PU9202 1 2 1 2
Do Not Stuff
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
PG9203 2nd = 84.08030.037 PG9208 PG9218
D
1 2 DIS_Muxless SB 20100831 1 2 1 2
D
Do Not Stuff PWR_DCBATOUT_VGA_CORE Do Not Stuff Do Not Stuff
20100715 N12PGS
PG9204 PG9209 PG9219
1 2 1 2 1 2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff Do Not Stuff Do Not Stuff
PG9210 PG9220
1
PG9228 PC9204 PC9202 PC9213 PC9205 PC9203 1 2 1 2
5
6
7
8
5
6
7
8
1 2 PU9203 DY
D
D
D
D
D
D
D
D
Do Not Stuff Do Not Stuff Do Not Stuff
5V_S5
2
Do Not Stuff Do Not Stuff PG9211 PG9221
DIS_Muxless 2nd = 84.08030.037 1 2 1 2
PG9229 DIS_Muxless
1 2 PR9202 Vout=0.75V*(R1+R2)/R2 Do Not Stuff Do Not Stuff
Do Not Stuff
G
S
S
S
G
S
S
S
PC9201 Do Not Stuff N12PGS_N12PGV DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless PG9212 PG9222
1
1 2 1 2
4
3
2
1
4
3
2
1
PG9230 PWR_VGA_CORE_TON 1 2 Design Current = 21.94A
1 2 DIS_Muxless Do Not Stuff Do Not Stuff
24.14A<OCP< 28.53A
2
DIS_Muxless PG9214 PG9223
Do Not Stuff PR9205 PL9201 1 2 1 2
PG9231 DIS_Muxless Do Not Stuff PC9206 Do Not Stuff VGA_CORE_PWR
1 2 16 13 PWR_VGA_CORE_BOOT1 2PWR_VGA_CORE_BOOT_C1 2 Do Not Stuff Do Not Stuff Do Not Stuff
TON BOOT
2 PR9201 1 9 VDDP
Do Not Stuff 2nd = 68.R3610.10M PG9213 PG9224
Do Not Stuff Do Not Stuff 12 PWR_VGA_CORE_UGATE 1 PR9218 2 VGA_CORE_UGATE 1 2 1 2
PWR_VGA_CORE_VDD UGATE PWR_VGA_CORE_PHASE Do Not Stuff
2 VDD PHASE 11 1 2
8 PWR_VGA_CORE_LGATE 1 PR9219 2 VGA_CORE_LGATE DIS_Muxless Do Not Stuff Do Not Stuff
LGATE
Do Not Stuff
DIS_Muxless PR9204 Do Not Stuff PG9215 PG9225
Do Not Stuff 8209A_PGOOD_VGA 4 7 PG9205 1 2 1 2
PGOOD G0 PWRCNTL_0 86
1
1
PTC9201 1 2 PWR_VGA_CORE_CS 10 3 PWR_VGA_CORE_FB PC9208
CS FB
5
6
7
8
5
6
7
8
1
Do Not Stuff DIS_Muxless 14 Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff
G1 PWRCNTL_1 86
D
D
D
D
D
D
D
D
Do Not Stuff DIS_Muxless N12PGS_N12PGV_64.63415.6DL PWR_VGA_CORE_D1 DIS_Muxless DIS_Muxless DIS_Muxless PG9227 PG9226
1
5
2
2
8209A_EN/DEM_VGA D1 PWR_VGA_CORE_D0 PU9204
PC9207 15 6 1 2 1 2
2
EM/DEM D0 Do Not Stuff
PWR_VGA_CORE_VOUT PU9205 PWR_VGA_CORE_VOUT Do Not Stuff Do Not Stuff
2
17 1 Do Not Stuff
C SB 20100831 GND VOUT
2nd = 84.08028.037 Do Not Stuff C
1
G
S
S
S
G
S
S
S
DIS_Muxless 2nd = 84.08028.037
PU9201 N12PGS_N12PGV DIS_Muxless PR9203 PTC9202 PTC9204 PTC9203
4
3
2
1
4
3
2
1
Do Not Stuff N12PGS_N12PGV Do Not Stuff DIS_Muxless Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff DIS_Muxless Do Not Stuff Do Not Stuff Do Not Stuff
2nd = 77.C3371.051 2nd = 77.C3371.051 2nd = 77.C3371.051
2
DIS_Muxless
VGACORE_VDD_SENSE 1 2
DIS_Muxless PR9211
Do Not Stuff
PR9206 1 2 Do Not Stuff
RT8208A TP9203 0806 check Power
3D3V_VGA_S0 Do Not Stuff PC9209 PC9210
1
Do Not Stuff
Do Not Stuff
PR9208
8209A_EN/DEM_VGA N12P GS Do Not Stuff
19,27,36,37,47 PM_SLP_S3# 2 1
P-State PWR_VGA_CORE_D1 PWR_VGA_CORE_D0 VGA_CORE_PWR DY DY
DY DIS_Muxless
2
1
PC9211
PD9201 Do Not Stuff
2
P8 , P12 L L 0.825V R1
Do Not Stuff
2
DIS_Muxless P0 - HOT L H 0.975V 3D3V_AUX_S5

P0 - COLD H L 1.00V
2
PWR_VGA_CORE_FB
H H SB to -1 modify PR9213 VGA_Core to 1.05V
PR9217
DY Do Not Stuff
R2 R4
1
R3
1
PR9209 PR9210 PR9213 PWR_VGA_CORE_EN_R#
3D3V_VGA_S0 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Do Not Stuff Do Not Stuff Do Not Stuff
Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J DIS_Muxless DIS_Muxless DIS_Muxless
1
N12PGS_N12PGV:64.43025.6DL
4
PR9212 O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01
PWR_VGA_CORE_D1
N12PGS_N12PGV:63.75334.1DL
PWR_VGA_CORE_D0
Do Not Stuff PQ9201 VGA_CORE_PWR
DIS_Muxless H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037 Do Not Stuff
B L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037 DY B
2
2
8209A_PGOOD_VGA 1 PR9214 2
1GND_SENSE_1
Do Not Stuff
DGPU_PWROK 22,93 Switching freq-->350KHz PR9215
PR9216
DY Do Not Stuff
1
Do Not Stuff
DIS_Muxless PC9212
1
Do Not Stuff 1 2 VGACORE_GND_SENSE Do Not Stuff
TP9202 8209A_EN/DEM_VGA PQ9206_3
Frequency setting
2
DIS_Muxless
470K -->165KHz PR9207
Do Not Stuff
200K -->323KHz DIS_Muxless
2
100K -->500KHz
Vout=0.75V*(R1+R2)/R2
N12P GV
P-State PWR_VGA_CORE_D1 PWR_VGA_CORE_D0 VGA_CORE_PWR
P8 , P12 L L 0.85V
P0 - HOT L H 1.00V
P0 - COLD H L 1.025V
A H H A
HR UMA
Wistron Corporation
Title
RT8208B_+VGA_CORE
Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
+3VS to 3.3V_DELAY Transfer 1D5V_VGA_S0
R9301
SB modify to 84.03006.A37
D
Do Not Stuff D
U9301
1 DIS 2 Do Not Stuff
Do Not Stuff
1.05V to 1.05V_VGA_S0 Transfer
3D3V_VGA_S0 1D5V_S3 1D5V_VGA_S0 check layout
2nd = 84.08882.037
S Muxless 1D05V_VTT 1D05V_VGA_S0
3D3V_S0
D AO4468, SO-8 8 D S 1 U9302
Do Not Stuff
Q9302 7 D S 2 TC9301 Do Not Stuff
Id=11.6A, Qg=9~12nC
1
G
Do Not Stuff 6 D S 3 TC9302 Do Not Stuff Do Not Stuff 3.6A
1
Do Not Stuff
R9302 Do Not Stuff Rdson=17.4~22m ohm 5 D G 4 C9302 Do Not Stuff Do Not Stuff 8 D S 1
1
Muxless Do Not Stuff 2ND = 84.03413.A31 C9301 Do Not Stuff D S
2ND = 79.3971V.3AL 7
D S
2
DIS_Muxless 6 3
2
DIS_Muxless DIS_Muxless DIS_Muxless DIS_Muxless 5 D
2
2
3.3V_ALW_1 G
4
1
DIS_Muxless
6
4
Q9301 R9304
Do Not Stuff Do Not Stuff RUN_ENABLE -1 modify R9305 Q9303 to DY
Do Not Stuff Muxless DY RUNON_R_1 RUNON_R_1
2nd = 84.DM601.03F
2
Muxless R9303 Do Not Stuff
1
S D RUNON_R 1 2
DY
C C
1
3.3V_RUN_VGA_1 Q9303 C9303
Do Not Stuff
R9305 Do Not Stuff
R9308 Do Not Stuff Do Not Stuff
2
Do Not Stuff 1 2 DIS_EN_1D5_RUN_R2ND = 84.00610.C31 DIS_Muxless
3D3V_S0 1 2 DY
1
Muxless
DGPU_PWR_EN
R9306 R9307
1 C9308 Do Not Stuff Do Not Stuff
Do Not Stuff DY DY
2 DIS_Muxless
2
18 DGPU_PWR_EN# G
Muxless D DIS_EN_1D5_RUN
D
RUNON_R_1
Q9305
Do Not Stuff R9310 Q9304 U9304 1D5V_VGA_S0 5V_S5
1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
DGPU_PWROK_R 1D05V_VGA_S0 5V_S5 Do Not Stuff R9322
2ND = 84.2N702.031 22,92 DGPU_PWROK 1 2 Do Not Stuff Do Not Stuff
DY 2ND = 84.2N702.031 DIS_Muxless
DY 1 9
2
VCC NC#9
1
22,92 DGPU_PWROK 2 ON PG 8
C9304 DY 3 7 SLG_RUN_ENABLE_VGA
B
Do Not Stuff DIS2 G1/G2 B
4 6
2
GND S/DIS1
D 5
DIS_Muxless -1 modify R9322
RT9025 for 1D8V_VGA +3VS to 1.8V Transfer

U9303 I=300mA R9309
Do Not Stuff DGPU_PWROK_TO1D8V 1 2 RUNON_R_1
DGPU_PWROK 22,92
DIS_Muxless U9305
VIN 1 3D3V_VGA_S0
-1 co-layout SLG55221 Do Not Stuff
1
1
2 C9307 Do Not Stuff
GND 1D8V_VGA_S0 5V_S5
EN 3 DY Do Not Stuff R9323
4 DY DY Do Not Stuff
2
NC#4
VOUT 5 22,92 DGPU_PWROK 6 EN VCC 1
1D5V_VGA_S0 5 2
2
DC2 GND
5V_S5 4 DC1 HV 3
2
DIS_Muxless HR UMA
C9305 C9306
A A
Do Not Stuff
Do Not Stuff
1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it

1
should be the latest ramp up rail.

Wistron Corporation
DIS_Muxless DIS_Muxless 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
DISCRETE VGA POWER

Custom
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
LVDS Channel A
RN9401
DIS Do Not Stuff
84 GPU_LVDSA_TX0 1 8 LVDSA_DATA0_R 49
84 GPU_LVDSA_TX0# 2 7 LVDSA_DATA0_R# 49
D 3 6 D
84 GPU_LVDSA_TX1# LVDSA_DATA1_R# 49
RN9405
DIS Do Not Stuff
84 GPU_LVDSA_TX2# 1 8 LVDSA_DATA2_R# 49
84 GPU_LVDSA_TXC 3 6 LVDSA_CLK_R 49
84 GPU_LVDSA_TXC# 4 5 LVDSA_CLK_R# 49
RN9408
UMA_Muxless SRN0J-7-GP
17 LVDSA_DATA0 4 5 LVDSA_DATA0_R 49
C 17 LVDSA_DATA0# 3 6 LVDSA_DATA0_R# 49 C
17 LVDSA_DATA1# 2 7 LVDSA_DATA1_R# 49
3D3V_S0
RN9410
UMA_Muxless SRN0J-7-GP
17 LVDSA_DATA2# 4 5 LVDSA_DATA2_R# 49
1
2
17 LVDSA_CLK 2 7 LVDSA_CLK_R 49 RN9403
17 LVDSA_CLK# 1 8 LVDSA_CLK_R# 49 SRN2K2J-1-GP
RN9404
Do Not Stuff
4
3
DIS
86 GPU_LVDS_CLK 3 2 LVDS_DDC_CLK 49
86 GPU_LVDS_DATA 4 1 LVDS_DDC_DATA 49
B Panel BL brightness/Power En/BL En RN9407

SRN0J-6-GP
B
17 LVDS_DDC_CLK_R 4 1
17 LVDS_DDC_DATA_R 3 2
UMA_Muxless
RN9412
SRN0J-7-GP
5 4
17 L_BKLT_CTRL 6 3 LBKLT_CTL 49
17 L_BKLT_EN 7 2 PANEL_BLEN 27
17 LVDS_VDD_EN 8 1 LCDVDD_EN 49
RN9413 HR UMA
Do Not Stuff
R9406 5 4 LCDVDD_EN 49
86 VGA_LCDVDD_EN
A 27 BRIGHTNESS
Do Not Stuff
1 2 LBKLT_CTL_R 86 VGA_BLEN 6
7
3
2
PANEL_BLEN 27
LBKLT_CTL 49
DY 8 1 Taipei Hsien 221, Taiwan, R.O.C.
R9407
DIS Title
Do Not Stuff
1 2
LVDS_Switch
86 VGA_LBKLT_CTL Size Document Number Rev
DIS A4
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Close to CRT Board CONN CRT DDCDATA & DDCCLK

RN9501
Do Not Stuff RN9503
1 8 SRN0J-6-GP
86 VGA_CRT_BLUE 2 7 CRT_BLUE_R 50 17 CRT_DDC_DATA 1 4

3 6 2 3 DDCDATA 50
86 VGA_CRT_GREEN CRT_GREEN_R 50 17 CRT_DDC_CLK DDCCLK 50
86 VGA_CRT_RED 4 5 CRT_RED_R 50
5V Tolerance UMA_Muxless
D
DIS Pull high CRT D
RN9502 RN9504
SRN0J-7-GP Do Not Stuff
1 8 1 4 DDCDATA
17 CRT_RED CRT_RED_R 50 86 VGA_CRT_DDCDATA
2 7 2 3 DDCCLK
17 CRT_GREEN CRT_GREEN_R 50 86 VGA_CRT_DDCCLK
17 CRT_BLUE 3 6 CRT_BLUE_R 50
4 5
DIS
UMA_Muxless
C C
SB to -1 modify 4 port Logic

3D3V_S0 3D3V_S0
RN9505 RN9506
SRN0J-6-GP Do Not Stuff
dGPU_SELECT_A 1 4 dGPU_SELECT_B 1 4
dGPU_SELECT_B 2 3 dGPU_SELECT_A 2 3
UMA_Muxless DIS
B B
L=>B0 -DIS
CRT Hsync & Vsync level shift H=>B1 -UMA
dGPU_SELECT_A
5V_S0
5V_S0
U9506B
TC74VHCT125AFTQK2M-GP For DIS CRT U9506A
TC74VHCT125AFTQK2M-GP
SB to -1 modify R9503,R9504 to 10 ohm
For DIS CRT 73.74125.F0B 73.74125.F0B
14
14
4
2nd = 73.74125.L13 2nd = 73.74125.L13

86 VGA_CRT_VSYNC 5 6 86 VGA_CRT_HSYNC 2 3
CRT_HSYNC1_1 1 R9504 2
10R2J-2-GP CRT_HSYNC_CON 50
7
CRT_VSYNC1_1 1 R9503 2
CRT_VSYNC1_1 CRT_HSYNC1_1 10R2J-2-GP CRT_VSYNC_CON 50
5V_S0 5V_S0
dGPU_SELECT_B dGPU_SELECT_B
U9506C U9506D
For UMA CRT TC74VHCT125AFTQK2M-GP For UMA CRT TC74VHCT125AFTQK2M-GP
14
10
14
13
A HR UMA A
73.74125.F0B 73.74125.F0B
2nd = 73.74125.L13 2nd = 73.74125.L13
17 CRT_VSYNC 9 8 17 CRT_HSYNC 12 11
Wistron Corporation
7
Title
CRT_Switch
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
SSID = SDIO
D D
C C
B B
A A
HR UMA
Wistron Corporation
Title
TOUCH PANEL
A2
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
CPU Check test point

HS3 HS2 HS1
STF237R128H42-1-GP
STF237R128H42-1-GP
STF237R128H42-1-GP
3D3V_S0 1 AFTP1
3D3V_AUX_S5 1 AFTP7
3D3V_S5 1 AFTP8
1
H1 5V_S5 1 AFTP9
D H9 D
H8 H7 H6 H5 H4 H3 H2 H11
Do Not Stuff
H10 1 AFTP10
19,27 PM_PWRBTN#
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1 AFTP11
VGA 5,22,36 H_CPUPWRGD
Do Not Stuff
1 AFTP12
1
1
HS4 HS5 27,36 S5_ENABLE
1
1
5,18,27,31,36,65,66,71,82 PLT_RST# 1 AFTP13
Do Not Stuff
Do Not Stuff
Test PointDimm Door
1
SB to -1 BOM add SPR2
SPR2 SPR3 HS7 HS6
-2 delete SPR5
STF256R89H178-GP
STF256R89H178-GP
SPRING-63-GP
Do Not Stuff
DY
1
1
C C
Change:34.40V16.001
3G Sku
3D3V_S5 5V_S0 3D3V_S0 5V_S0
AD_JK 1D5V_S3 1D05V_VTT

Do Not Stuff
RFC9717 RFC9714 RFC9716 RFC9715 RFC9713

1
1
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9701 EC9704
DY
1
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9715
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U50V3KX-GP
3G_RF 3G_RF 3G_RF 3G_RF EC9703 EC9702 EC9706 EC9705
2
DY DY 3G_RF 3G_RF 3G_RF
B DCBATOUT B
INT_MIC_L_R 29,49
5V_S0
1
ECL9701
DY Do Not Stuff
1
1
RFC9712 EC9717
Do Not Stuff
SCD1U50V3KX-GP
Do Not Stuff
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD01U25V2KX-3GP
EC9714 DY EC9713 EC9719 EC9718 EC9716
DY
2
2
3G_RF 3G_RF 3G_RF 3G_RF
3D3V_S5 DCBATOUT
1D5V_S3 1D05V_VGA_S0 1D05V_VGA_S0

DCBATOUT
RFC9702 RFC9701 RFC9707 RFC9711 RFC9708 RFC9706 RFC9703 RFC9710

1
1
SCD1U50V3KX-GP
RFC9705 RFC9709 RFC9704

A HR UMA A
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
SC56P50V2JN-2GP
SCD1U50V3KX-GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9711 EC9708 EC9707 EC9712 EC9709 EC9710
DY
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC56P50V2JN-2GP
SC56P50V2JN-2GP
3G_RF 3G_RF 3G_RF 3G_RF 3G_RF 3G_RF

2
2
SC56P50V2JN-2GP
3G_RF 3G_RF3G_RF 3G_RF Wistron Corporation

Do Not Stuff

Title
UNUSED PARTS/EMI Capacitors

A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Power Sequence
PU4601 PU4501 U4801
PM_SLP_S4# 1D5V_S3 RUNPWROK 1D05V_S0 1.05VTT_PWRGD 0D85V_S0 0D85V_S0
D 1D5V_S3 D
1D05V_VTT ALL_POWER_OK
0D75V_EN
0D75V_S0
PLT_RST#
U? U? U?
U?
ALL_POWER_OK EC S0_PWR_GOOD PCH PM_DRAM_PWRGD AND GATE VDDPWRGOOD CPU H_CPU_SVIDCLK
C C
ALL_POWER_OK
H_CPUPWRGD
U?
VCC_GFXCORE
CPU_CORE
SYS_PWROK
VCC_CORE
H_CPU_SVIDCLK U?
B IMVP_PWRGD AND GATE B
S0_PWR_GOOD
A HR UMA A
Wistron Corporation
Title
Change History
A3
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D
S5_ENABLE KBC_PWRBTN_EC#
Press Power button D
T4 KBC_PWRBTN_EC# GPIO3
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
T6
S5_ENABLE
+5VALW_PCH_VCC5REFSUS T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T7
T8 TPS51125 to KBC GPIO46 +3.3V_ALW
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
SUS_PWR_DN_ACK T9
KBC GPIO43 to PCH +15V_ALW T8
T10 T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T11 PCH to KBC GPIO00 3V_5V_POK
T10 KBC GPO84 to PCH
PCH_SUSCLK_KBC
PM_PWRBTN#
AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
SUS_PWR_DN_ACK T11
KBC GPIO43 to PCH
PCH_RSMRST# T12 >10ms
T13 PCH to KBC GPIO01
Press Power button PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
3V_5V_POK
T13 KBC GPO84 to PCH DC PCH_RSMRST#
AC PM_PWRBTN# T14
PM_SLP_S4#
AC PM_PWRBTN# T15
T14 PM_SLP_S3# >30us
T16 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T17
T15
+3.3V_LAN
PM_SLP_S3# >30us
C
T16 KBC GPO16 to LAN C
+1.5V_SUS T18
PM_LAN_ENABLE
T17
+V_DDR_REF(0.9V) T19
+3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T20
+1.5V_SUS T18
+3.3V_RUN T21
+V_DDR_REF(0.9V) T19 T22
+5V_RUN & +3.3V_RUN need meet 0.7V difference
+5VS_PCH_VCC5REF
+5V_RUN T20
+1.5V_RUN T23 H_PWRGD
+3.3V_RUN T21 T25 >1ms
T22
+1.8V_RUN T24
+5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
GFX_CORE_EN(Discrete only) T26
+1.5V_RUN T23 H_PWRGD
T25 >1ms T27
+VGA_CORE(Discrete only)
+1.8V_RUN T24 T28 KBC GPIO30 to APL5930
KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
GFX_CORE_EN(Discrete only)------Delay 5ms T26
T29
T27 +1.0V_RUN_VGA(Discrete only)
+VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
T31
T29 +1.8V_RUN_VGA(Discrete only)
+1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
+1.8V_RUN_VGA(Discrete only)
T32 KBC GPI95
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
T33
T35
+3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
T36 TPS51218 to KBC GPI34
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
RUNPWROK T34
T37
T35 +0.75V_DDR_VTT
+1.05V_VTT
B
T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38 B
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)

T37
+0.75V_DDR_VTT
H_VTTPWRGD T38
+1.05V_VTT
T39
CPU to TPS51611
GFX_VR_EN(UMA only)
+1.05V_VTT UMA GFX CORE Power
T39 +CPU_GFX_CORE(UMA only)
T40
CPU to TPS51611
GFX_VR_EN(UMA only)
T40 UMA GFX CORE Power
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
T41 ( >99ms )
KBC GPO53 to ISL62883
IMVP_VR_ON
1.5CPU_1.05VTT_PWRGD T42
T41 ( >99ms )
+VCC_CORE CPU CORE Power
KBC GPO53 to ISL62883 <3ms
IMVP_VR_ON
T42 CLK_CPU_BCLK
CPU CORE Power CLKIN_BCLK(from CK505) stable
+VCC_CORE <3ms
CLK_CPU_BCLK
43 >1ms ISL62883 to CLOCKGEN
CLKIN_BCLK(from CK505) stable CK_PWRGD
T44 >1ms ISL62884 to KBC GPO14
43 >1ms ISL62883 to CLOCKGEN IMVP_PWRGD T45
CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
ISL62884 to KBC GPO14 T46 >5ms
IMVP_PWRGD
T44 >1ms
T45 KBC GPIO47 to PCH
1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
T46 >5ms
+1.5V_RUN_CPU
T48 >1ms
KBC GPIO47 to PCH T49 >100ns
PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
+1.5V_RUN_CPU
T48 >1ms
T49 >100ns H_VTTPWRGD
A
PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms A
PM_PWROK
H_VTTPWRGD T51 >1ms
T50 >1ms
+VCC_CORE
PM_PWROK 0.05ms< T52 <650ms
T51 >1ms H_PWRGD
+VCC_CORE
T53 KBC LRESET#
0.05ms< T52 <650ms PLT_RST# >1ms
H_PWRGD
T54 KBC GPIO45
HR UMA
T53 KBC LRESET# PLTRST_DELAY#
PLT_RST#
T55
>1ms Wistron Corporation
T54 KBC GPIO45 H_CPURST#
PLTRST_DELAY# Taipei Hsien 221, Taiwan, R.O.C.
T55 Title
H_CPURST#
Power Sequence
A1
JE40-HR -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 AO4468
1V_VGA_S0 RT9025
RT8208B VGA_CORE For Discrete
D D
DCBATOUT UP6165BQKF-1
Adapter
NCP6131S52MNR2G UP6128PQDD APL5916KAI

AO4407A DDR_VREF_S3 0D75V_S0 1D5V_S3
Charger
BQ24745 VCC_CORE VCC_GFXCORE 1D05V_VTT 0D85V_S0
+AD For UMA
AO4468
Battery
UP6183PQAG 1D5V_S0
For Discrete
1D5V_DDR_S0
C 3D3V_AUX_S5
3D3V_S5 C
5V_AUX_S5 5V_S5
UP7534BRA8 UP7534BRA8 UP7534BRA8 AO4468

SI2301CDS AO4468 RT9025
5V_USB1_S3 5V_USB2_S3 5V_USB0_S5 5V_S0

+KBC_PWR 3D3V_S0 3D3V_VGA_S0 1D8V_VGA_S0
USB Power USB Power USB Charge Power For Discrete

For Discrete
G9091
RT9025 G5285T11U-GP 3D3V_CARD_S0
B
3D3V_DAC_S0 B
1D8V_S0 LCDVDD
Power Shape
Regulator LDO Switch
HR UMA
A A
Wistron Corporation
Title
Power Block Diagram

A3
JE40-HR -1
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
5V_S0

3D3V_S0
SRN2K2J-1-GP SRN2K2J-1-GP

DIMM 1 SRN10KJ-5-GP
1 SMBCLK SMB_CLK
PCH_SMBCLK 1
SMBDATA SMB_DATA
PCH_SMBDATA
SCL
SDA
TouchPad Conn.
3D3V_S5
PSDAT1 TPDATA
TPDATA TPDATA
SMBus Address:A0 PSCLK1 TPCLK

TPCLK TPCLK
2N7002SPT
3D3V_AUX_KBC
SRN2K2J-8-GP

SML1CLK SML1_CLK
SRN4K7J-8-GP
SML1DATA SML1_DATA To KBC & eDP DIMM 2
3D3V_S5 PCH_SMBCLK SCL SRN100J-3-GP Battery Conn.
SML0CLK SML0_CLK
PCH_SMBDATA SDA
GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB
SML0DATA SML0_DATA GPIO22/SDA1 BAT_SDA BATA_SDA_1 DAT_SMB SMBus address:16

SMBus Address:A4
SRN2K2J-1-GP
3D3V_S0 G-Sensor BQ24745
XDP PCH_SMBCLK SCLK
KBC SCL
SDA SMBus address:12

PCH PCH_SMBDATA SDATA
NPCE795
SRN2K2J-1-GP
UMA SMBus address:xx LCDVDD_eDP
2 SCL 2
SDA PCH
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI

SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI Minicard LCDVDD_eDP
UMA
PCH_SMBCLK
WLAN
SRN2K2J-1-GP
3D3V_S0
PCH_SMBDATA
SMB_CLK
SMB_DATA
eDP
LCD_SMBCLK SCL
SMBus address:XX
LCD_SMBDATA SDA
SRN2K2J-1-GP Minicard GPIO73/SCL2 SML1_CLK

2N7002DW-1-GP
UMA SRN0J-6-GP
PCH_SMBCLK W-WAN
SMB_CLK
GPIO74/SDA2 SML1_DATA

L_DDC_CLK LVDS_DDC_CLK_R
PCH_SMBDATA
SMB_DATA
L_DDC_DATA LVDS_DDC_DATA_R
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA

SRN2K2J-1-GP
3 DIS
SRN0J-6-GP 3
DDC1CLK GPU_LVDS_CLK LVDS_DDC_CLK CLK
DDC1DATA GPU_LVDS_DATA LVDS_DDC_DATA DATA LCD CONN

DIS SRN0J-6-GP
DDC2CLK VGA_CRT_DDCCLK
DDC2DATA VGA_CRT_DDCDATA
3D3V_S0 DIS 5V_S0
VGA
3D3V_S0
SRN2K2J-1-GP SRN10KJ-6-GP
UMA

SRN0J-6-GP UMA
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
3D3V_VGA_S0 UMA
2N7002DW-1-GP

4
5V_S0 4
SRN1K5J-GP
SRN2K2J-1-GP
DIS
DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
HR UMA
TSCBTD3305CPWR
DDC2DATA GPU_HDMI_DATA DDC_DATA_HDMI
HDMI CONN Wistron Corporation
SRN0J-6-GP
Title
SMBUS Block Diagram

A2
JE40-HR -1
DIS Date: Thursday, December 02, 2010 Sheet 101 of 102
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
SPKR_PORT_D_L-
PAGE28 DXP P2800_DXP SPKR_PORT_D_R+ SPEAKER

MMBT3904-3-GP
SC2200P50V2KX-2GP
DXN P2800_DXN
UMA Place near CPU
Codec
Thermal PWM CORE
92HD79B1
P2800 HP1_PORT_B_L HP
MMBT3904-3-GP HP1_PORT_B_R
PAGE27 GPIO5 SYS_THRM TDR T8

OUT
2
KBC GPIO92 CPU_THRM TDL
OTZ THERM_SYS_SHDN#
2N7002
D
PURE_HW_SHUTDOWN#
EN 3V/5V 2
NPCE795P S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)
GPIO94 GPIO56
GPIO4 VGA_THRM TDR
PAGE28
HP0_PORT_A_L MIC
P2800_VGA_DXP HP0_PORT_A_R
DXP THRMDA
VREFOUT_A_OR_F IN
FAN_TACH1
SC2200P50V2KX-2GP SC2200P50V2KX-2GP
VGA DXN
P2800_VGA_DXN
THRMDC
VGA
Thermal
FAN1_DAC
TACH Place near GPU(DISCRETE only).

P2800
FAN
5V VIN
MMBT3904-3-GP DMIC_CLK/GPIO1 Digital
DMIC0/GPIO2
3 MIC 3
PH
OTZ
VSET VOUT
VIN
FAN CONTROL
P2793 PORTC_L
PAGE28 PORTC_R
Analog
VREFOUT_C MIC
4 HR UMA 4
Wistron Corporation
Title
Thermal/Audio Block Diagram

Custom
JE40-HR -1
A B C D E

Acer Aspire 4750 - 4750G - Wistron - JE40-HR - Discrete - UMA - Rev-1 PDF

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Acer Aspire 4750 - 4750G - Wistron - JE40-HR - Discrete - UMA - Rev-1 PDF

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Available Formats

5 4 3 2 1

DY :None Installed ANNIE: ONLY FOR ANNIE solution.

JE40 HR Block Diagram SYSTEM DC/DC

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JTAG & BPM

DDR SYSTEM MEMORY B

M_A_DQ33 SA_DQ32 SA_ODT3 M_B_DQ33 SB_DQ32 SB_ODT3

PEG AND DDR

AA33 VCC VCCIO J23

VAXG Output Decoupling Recommendation: R906,R907 close to CPU

PROCESSOR VAXG: 24A

DDR3 -1.5V RAILS

AK24 VAXG VDDQ P7 1 x 330 uF

A6 TP901 Do Not Stuff

AT35 VSS VSS AJ22

JE40 delete XDP function

SSID = MEMORY M_A_A0 98 A0 NP1 NP1

DDR_VREF_S3 126 VREF_CA VSS 184

VSS Taipei Hsien 221, Taiwan, R.O.C.

C1515 C1517 M_B_DQ62 192 65

1 VREF_DQ VSS 185 62.10024.D41 Wistron Corporation

Digital Display Interface

CRT_BLUE 95 CRT_BLUE N48 M43

PCI_GNT#3 Low = A16 swap RN1803 BE28 AY5

EC1803 EC1802 EC1801

OC[3:0]# for Device 29 (Ports 0-7)

SSID = PCH 4 DMI_RXN[3:0]

4 DMI_RXN0 BC24 DMI0RXN Cougar FDI_RXN0 BJ14 FDI_TXN0 4

System Power Management

27,42 S0_PWR_GOOD 2 1 PWROK L22 G8

27 SUS_PWR_ACK K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 PM_SLP_S3# 27,36,37,47,92 RTC_AUX_S5

PM_RI# A10 K14

PWRBTN# Wistron Corporation

AB42 V47 XTAL25_IN RN2009

SSID = PCH RTC_AUX_S5

RTC_X1 2 3 INTVRMEN- Integrated SUS

2 3 C2102 RTC_RST# D20

AB13 SATA3_COMP R2113 1 2 49D9R2F-GP

ICC_EN# C10 GPIO8

Do Not Stuff TP2203 1 PCH_GPIO27 E16 GPIO27 PCH_THERMTRIP_R

R2206 GFX_CRB_DET M3 TS Signal Disable Guideline:

NCTF TEST PIN:

BE1 NCTF_VSS#BE1 NCTF_VSS#E1 E1 Integrated Clock Enable functionality is achieved

R2218 R2214 R2216 via soft-strap. The default is integrated clock

ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT DY Do Not Stuff

VRAM900MHZ PCH (GPIO/CPU)

VCCVRM_S0 AP16 VCCVRM 0.19A JE40 modify

1D05V_VTT AU20 VCCDMI 0.02A

JE40 modify 07/16

JE40 modify AD49

Clock and Miscellaneous

C2411 -1M 1 DY VOUT 5

C2414 C2413 0.095A

BJ8 V_PROC_IO 1 DY 2 1D5V_S5

(4.7uFx1_0603) C2417 C2418 C2419