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8-, 16- and 32-bit devices

Automotive MCUs and MPUs


S32 MCUs Built on ARM Technology
SD/
Core Core Video Graphics Camera DRAM Flash 3.3 V Operating Temp. Package In
Device Cache SRAM DMA Image Processor Display Interface CAN MMC I2C SPI UART Ethernet PIT
Platform Frequency Accelerator Accelerator Input Support Support GPIO Voltage Range Options Production
SDIO
Image signal x 64
L1: 32 KB/ 32 KB I/D H.264 and TFT, up to 150 M Quad serial 1 GB
Quad ARM OpenGL processor (ISP) + Dual MIPI-CSI, LPDDR2, 2x P 1.0 V 5% for digital core 621 flip chip BGA,
S32V234 1 GHz per core L2: 256 KB 4 MB 32-ch. MJPEG encode (e.g., 1920 x 1080 Flash controller 1 3 4 2 with IEEE 2 V x
Cortex-A53 ES3.0 3D APEX2-CL image VIU-Lite DDR3 and CAN-FD input supply voltage 17 x 17 mm
unified per cluster and decode 60Hz) (QuadSPI) 1588
cognition processor DDR3L

8-bit S08 MCUs


Bus Operating Temp. Package
Device Flash RAM EEPROM CAN UART SPI I2C SLIC Analog (ADC) Timer Clock Additional Features
Frequency Voltage Range Options
C S08DZ 20 MHz Up to 128 KB Up to 8 KB Up to 2 KB 1 2 x SCI Up to 2 Up to 2 Up to 24-ch., 12-bit, 2 com Up to 12-ch. MCG Watchdog OSC/timer, COP, BDM, temp. sensor 2.7 to 5.5 V C, V, M 32 LQFP, 48 LQFP, 64 LQFP, 100 LQFP
C S08DV 20 MHz Up to 128 KB Up to 6 KB 1 2 x SCI Up to 2 Up to 2 Up to 24-ch., 12-bit, 2 com Up to 12-ch. MCG Watchdog OSC/timer, COP, BDM, temp. sensor 2.7 to 5.5 V C, V, M 32 LQFP, 48 LQFP, 64 LQFP, 100 LQFP
C S08DN 20 MHz Up to 60 KB Up to 2 KB Up to 2 KB 1 x SCI 1 1 Up to 16-ch., 12-bit, 2 com Up to 6-ch. + 2-ch. MCG Watchdog OSC/timer, COP, BDM, temp. sensor 2.7 to 5.5 V C, V, M 32 LQFP, 48 LQFP, 64 LQFP
C S08AW 20 MHz Up to 60 KB Up to 2 KB 2 x SCI 1 1 Up to 16-ch., 10-bit Up to 8-ch. ICG KBI, ICE, BDM, temp. sensor 2.7 to 5.5 V C, V, M 48 QFN, 44 QFP, 32 LQFP, 64 QFP, 64 LQFP, 44 LQFP
C S08EL 20 MHz Up to 32 KB 1 KB Up to 512 B 1 x SCI 1 1 1 Up to 16-ch., 10-bit, 2 com 4-ch. + 2-ch. ICS LIN auto-baud/synch, watchdog OSC/timer, BDMl, temp. sensor 2.7 to 5.5 V C, V, M 28 TSSOP, 20 TSSOP
C S08SL 20 MHz Up to 16 KB 512 B Up to 256 B 1 x SCI 1 1 1 Up to 16-ch., 10-bit, 1 com 2-ch. + 2-ch. ICS LIN auto-baud/synch, watchdog OSC/timer, BDMl, temp. sensor 2.7 to 5.5 V C, V, M 28 TSSOP, 20 TSSOP
C S08SG 20 MHz Up to 32 KB Up to 1 KB 1 x SCI 1 1 Up to 16-ch., 10-bit, 1 com Up to 2-ch. + 2-ch. ICS Watchdog OSC/timer, COP, BDM, POR, KBI, temp. sensor 2.7 to 5.5 V C, V, M, W 28 TSSOP, 20 TSSOP, 16 TSSOP, 8 SOIC
C S08SC4 20 MHz 4 KB 256 B 1 x SCI Up to 8-ch., 10-bit Up to 2-ch. + 2-ch. ICS Watchdog OSC/timer, COP, BDM, temp. sensor 4.5 to 5.5 V C, V, M 16 TSSOP
Up to 37 x 8/41 x 4 LCD driver, watchdog OSC/timer, RTC,
C S08LG 20 MHz Up to 32 KB 2 KB 2 x SCI 1 1 Up to 16-ch., 12-bit Up to 2-ch. + 6-ch. ICS 2.7 to 5.5 V C, V 80 LQFP, 64 LQFP, 48 LQFP
BDM, temp. sensor
6-ch. + 2-ch., 16-bit Flex
C S08MP 20 MHz 16 KB 1 KB 1 x SCI 1 1 13-ch., 12-bit, 3 com ICS MTIM, RTC, COP, CRC, BDM, 5-bit DAC (3x), temp. sensor 2.7 to 5.5 V C, V, M 48 LQFP
Timer w/PWM functions
S08RN 20 MHz Up to 60 KB Up to 4 KB Up to 256 B Up to 3 Up to 2 Up to 1 Up to 16-ch., 12-bit Up to 6-ch. + 2-ch. + 2-ch. ICS TSI, watchdog, BDM, TC analog comparator 2.7 to 5.5 V C, V, M 64, 48, 32 LQFP; 20, 16 TSSOP
C S08QD 8 MHz Up to 4 KB Up to 256 B 4-ch., 10-bit 2-ch. + 1-ch. ICS Watchdog OSC/timer, BDM, temp. sensor 2.7 to 5.5 V C, V, M 8 SOIC

16-bit S12(X) MCUs


Bus Data Operating Temp. Package
Device Flash RAM EEPROM XGATE MPU ECC FlexRay CAN SCI SPI I2C Analog (ADC) PWM Motor SSD ECT Timer PIT LCD KWU EBI
Frequency Flash Voltage Range Options
Up to Up to P P P Up to 2 x 32-ch., 8-ch., Up to 8-ch., P 80 QFP, 112 LQFP, 144 LQFP,
C S12XE 256 KB1 MB 1664 KB 25 Up to 6 Up to 3 Up to 2 8-ch., 8-bit Up to 4-ch. 25 3.13 to 5.5 V C, V, M
55 MHz 4 KB 12-bit 16-bit 16-bit 208 MAPBGA
Up to Up to P P P
S12XF 50 MHz Up to 512 KB 1 2 2 16-ch., 12-bit 6-ch., 15-bit 8-ch., 16-bit 4-ch. 11 3.13 to 5.5 V C, V, M 112 LQFP, 144 LQFP
32 KB 4 KB
Up to Up to P Up to 16-ch, Up to 8-ch, Up to 8-ch, Up to Up to Up to
C S12XH 40 MHz 256512 KB available 2 2 1 Up to 2 Up to 24/6 Up to 6 available 4.5 to 5.5 V C, V, M 100/112 LQFP, 144 LQFP
32 KB 4 KB 10-bit 8-bit/4-ch, 16-bit 16-bit 16-ch, 16-bit 40 x 4 25

P Up to 16-ch., Up to
C S12XS 40 MHz 64256 KB 412 KB 4 8 KB 1 2 1 8-ch., 8-bit 8-ch., 16-bit Up to 4-ch. 3.13 to 5.5 V C, V, M 64 LQFP, 80 QFP, 112 LQFP
12-bit 18
C S12P 32 MHz 32128 KB 26 KB 4 KB P 1 1 1 10-ch., 12-bit 6-ch., 8-bit 8-ch., 16-bit 12 3.13 to 5.5 V C, V, M 80 QFP, 64 LQFP, 48 QFN

P Up to 12-ch, Up to 8-ch., 20 TSSOP, 32 LQFP, 48 LQFP,


C S12G 25 MHz 16240 KB 112 KB 512B4 KB Up to 1 13 13 Up to 8-ch, 8-bit 16 3.13 to 5.5 V C, V, M
12-bit 16-bit 64 LQFP, 100 LQFP
Up to Up to Up to 16-ch, Up to 8-ch. + Up to Up to 3.13/4/5 64 LQFP, 80 QFP, 100 LQFP,
C S12H 32128 KB 26 KB 12 KB Up to 2 Up to 2 1 Up to 1 Up to 8-ch, 8-bit 16/4 Up to 4 C, V, M
32 MHz 4 KB 10-bit 8-ch., 16-bit 40 x 4 22 to 5.5 V 112 LQFP

16-bit S12 MagniV MCUs


Bus CAN- LIN- Ext. Analog Int. Analog Operating Temp. Packaging
Device Flash RAM EEPROM ECC CAN SCI SPI I2C PWM Timer KWU Motor High-Voltage Input Other Analog VREG Ext. Supply
Frequency PHY PHY (ADC) (ADC) Voltage Range Options
2-ch. ACMP, DAC/OpAmp,
C S12ZVCA 32 MHz 64192 KB 412 KB 2 KB Y 1 1 2 - 2 1 16-ch., 12-bit 4+4-ch., 16-bit 8+4-ch., 16-bit 34 - 2-ch. HVI, VSUP Sense 2 5 V/20 mA 5.5 to 20 V C, M, V, W 64 LQFP-EP, 48 LQFP
4-ch. NGPIO (5 V/25 mA)
C S12ZVC 32 MHz 64192 KB 412 KB 2 KB Y 1 1 2 - 2 1 16-ch., 10-bit 4+4-ch., 16-bit 8+4-ch., 16-bit 34 - 2-ch. HVI, VSUP Sense 4-ch. NGPIO (5 V/25 mA) 2 5 V/20 mA 5.5 to 20 V C, M, V, W 64 LQFP-EP, 48 LQFP
3-ch. NGPIO (5 V/25 mA), 1-ch.
S12ZVLA 32 MHz 64128 KB 48 KB 12 KB Y 1 - 2 1 1 1 10-ch., 12 bit 8-ch. -16-bit 8+4-ch., 16-bit 23 - 1-ch. HVI, VSUP Sense 1 5 V/20 mA 5.5 to 20 V V, M 48 LQFP, 32 LQFP, 32 QFN
ACMP, DAC/OpAmp, PGA
C S12ZVL 32 MHz 8128 KB 18 KB 0.12 KB Y 1 - 2 1 1 1 10-ch., 10 bit 8-ch. -16-bit 8+4-ch., 16-bit 23 - 1-ch. HVI, Vsup Sense 3-ch. NGPIO (5 V/25 mA) 1 5 V/20 mA 5.5 to 20 V V, M 48 LQFP, 32 LQFP, 32 QFN
8-ch., 8-bit or
C S12ZVLS 32 MHz 1632 KB 1 KB 128 KB Y - - 2 1 1 1 16-ch., 10-bit 6+2-ch., 16-bit 23 - 1-ch. HVI, VSUP Sense 3-ch. NGPIO (5 V/25 mA) 1 5 V/20 mA 5.5 to 20 V C, V, M 32 QFN
4-ch., 16-bit
0.10.5 P PMSM/BLDC/
C S12ZVML 50 MHz 32128 KB 48 KB 1 - 2 1 1 - 4+5-ch.,12-bit 8-ch., 12-bit 6-ch., 15-bit 4-ch., 16-bit 18 VSUP Sense 6-ch. gate drive unit 1 5 V/20 mA 3.5 to 20 V V, M, W 64 LQFP-EP, 48 LQFP-EP
KB DC

P PMSM/BLDC/ 5 V/20 mA +
C S12ZVMC 50 MHz 64128 KB 48 KB 512 B 1 - 2 - 1 - 4+5-ch.,12-bit 8-ch., 12-bit 6-ch., 15-bit 4-ch., 16-bit 18 VSUP Sense 6-ch. gate drive unit 2 3.5 to 20 V V, M, W 64 LQFP-EP
DC CAN-supply

P PMSM/BLDC/ 6-ch. gate drive unit,


S12ZVM 50 MHz 1632 KB 24 KB 128 B - - 2 - 1 - 4+5-ch.,12-bit 8-ch., 12-bit 6-ch., 15-bit 4-ch., 16-bit 18 VSUP Sense 1 5 V/20 mA 3.5 to 20 V V, M, W 64 LQFP-EP, 48 LQFP-EP
DC HV-PHY (PWM)
0.10.5 P 2-ch. Relay, 4-ch. HVI, VBAT Sense,
C S12VR 25 MHz 1664 KB 2 KB - - 2 1 1 - 6-ch., 10 bit 4-ch., 10 bit 8-ch., 8-bit 4-ch., 16-bit 16 - 1 5 V/20 mA 5.5 to 20 V C, V, M 32 LQFP, 48 LQFP
kB LS Driver Vsup Sense

P 8-ch. (8-bit),
C S12ZVH 32 MHz 64128 KB 48 KB 4 KB 1 1 2 - 1 1 8-ch., 10 bit 8-ch., 10 bit Two 8-ch. x 16-bit 24 4 Stepper VBAT-Sense, VSUP-Sense 10 open-drain I/Os 2 - 5.5 to 20 V C, V 100 LQFP, 144 LQFP
4-ch. (16-bit)

P 8-ch. (8-bit),
C S12ZVHY 32 MHz 3264 KB 24 KB 2 KB 1 - 2 - 1 1 8-ch., 10 bit 8-ch., 10 bit Two 8-ch. x 16-bit 24 2 Stepper VBAT-Sense, VSUP-Sense 10 open-drain I/Os 1 - 5.5 to 20 V C, V 100 LQFP, 144 LQFP
4-ch. (16-bit)

P 8-ch. (8-bit),
C S12ZVHL 32 MHz 64 KB 4 KB 2 KB 1 - 2 1 1 1 8-ch., 10 bit 8-ch., 10 bit Two 8-ch. x 16-bit 24 2 Stepper VBAT-Sense, VSUP-Sense 10 open-drain I/Os 1 - 5.5 to 20 V C, V 100 LQFP, 144 LQFP
4-ch. (16-bit)

P 8-ch. (8-bit), 8 high-current I/Os,


C S12ZVFP 32 MHz 64 KB 4 KB 2 KB 1 - 2 1 1 1 8-ch., 10 bit 8-ch., 10 bit Two 8-ch. x 16-bit 24 - VBAT-Sense, VSUP-Sense 1 - 5.5 to 20 V C, V 100 LQFP, 144 LQFP
4-ch. (16-bit) 10 open-drain I/Os

32-bit ARM Cortex -M-Based Automotive MCUs


FlexIO External
UART/ CAN/ISO Ethernet Serial Audio Timer 16 ADC Trig- ADC Operating Temp. Package In
Device Core FPU Frequency Flash RAM ECC EEPROM MPU DMA Security CRC SPI I2C (configurable # of Memory Debug
LIN CAN-FD 100MBit Interface (SAI) bit (FTM) ger (PDB) 12 bit Voltage Range Options Production
UART, SPI, I2C, I2S) Interface
1 x IEEE-1588
4-ch. TDM, I2S, 2x JTAG, SWD, ITM, 176, 144 LQFP
S32K148 M4F IEEE-754 112 MHz 2 MB 256 KB Flash + RAM 4 KB 8 entry 16-ch. CSEc 1 4 3 3/3 1 1 MAC w/ 1 x QuadSPI 8 x 8-ch. 2 modules 2.75.5 V C, V, M
AC97 32-ch. ETM, SWO, SWV 100 MAPBGA
timestamping
176, 144, 100*
2x JTAG, SWD, ITM,
S32K146 M4F IEEE-754 112 MHz 1 MB 128 KB Flash + RAM 4 KB 8 entry 16-ch. CSEc 1 4 3 3/2 1 1 6 x 8-ch. 2 modules 2.75.5 V C, V, M LQFP
24-ch. SWO, SWV
100 MAPBGA
2x JTAG, SWD, ITM, 100, 64 LQFP
S32K144 M4F IEEE-754 112 MHz 512 KB 64 KB Flash + RAM 4 KB 8 entry 16-ch. CSEc 1 4 3 3/1 1 1 4 x 8-ch. 2 modules 2.75.5 V C, V, M Sampling
16-ch. SWO, SWV 100 MAPBGA
2x JTAG, SWD, ITM,
S32K142 M4F IEEE-754 80 MHz 256 KB 32 KB Flash + RAM 4 KB 8 entry 16-ch. CSEc 1 3 2 2/1 1 1 4 x 8-ch. 2 modules 2.75.5 V C, V, M 100, 64 LQFP
16-ch. SWO, SWV
16 TSSOP, 24
Emulate
8128 Up Up to 2 x 1x QFN, 32 LQFP, P
C KEAZ M0+ 4048 MHz 116 KB + up to 1 12 Up to 1 12 2.75.5 V C, V, M SWD
KB to 3 6-ch. 16-ch. 64 LQFP, 80
256 B
LQFP)
*optional

MAC57Dxxx 32-bit ARM -Based MCUs


Digital Stepper
Multi Core Core Program Graphics Display Display Segment Graphics I/O UART/ CAN Sound DRAM FLASH Operating Temp
Device SRAM eDMA EEPROM Video Motor MLB SPI IC Ethernet Debug Security
Platform Frequency Flash RAM Resolution Interfaces LCD Accelerator Processor LIN (FD) Generator Support Support Voltage Range
Input Driver
ARM Cortex -A5, (A5)320 MHz,

1.3 MB Emulated: 2 x dRGB, 16-bit SDR, 2 x Dual
Up to 10/100 JTAG,
MAC57D54H ARM Cortex-M4, (M4)160 MHz, 4 MB 2 x 512 KB (1 MB Flex 2 x 16-ch. 2 x (4x16kB 1 x RSDS, 4 x 40 OpenVG 1.1 Yes 6 Yes MLB50 3 5 3 2 Yes 16/32-bit DDR Quad 3.3, 5 V V CSE2
2 x WVGA +AVB Trace
ARM Cortex M0+ (M0+)80 MHz ECC option) + 64kB) 1 x LVDS DDR2 SPI
ARM Cortex-A5, (A5)320 MHz, 1.3 MB Emulated: 2 x dRGB, 16-bit SDR, 2 x Dual
Up to 10/100 JTAG,
MAC57D53M ARM Cortex-M4, (M4)160 MHz, 3 MB 2 x 512 KB 1 MB Flex 2 x 16-ch. 2 x (4 x 16kB 1 x RSDS, 4 x 40 OpenVG 1.1 Yes 6 Yes MLB50 3 5 3 2 Yes 16-/32-bit DDR Quad 3.3, 5 V V CSE2
2 x WVGA +AVB Trace
ARM Cortex M0+ (M0+)80 MHz ECC option) + 64 kbit) 1 x LVDS DDR2 SPI
ARM Cortex-A5, (A5)320 MHz, 1.3 MB Emulated: 2 x dRGB, 16-bit SDR, 2 x Dual
Up to 10/100 JTAG,
MAC57D52L ARM Cortex-M4, (M4)160 MHz, 2 MB 2 x 512 KB (1 MB Flex 2 x 16-ch. 2 x (4 x 16 kB 1 x RSDS, 4 x 40 OpenVG 1.1 Yes 6 Yes MLB50 3 5 3 2 Yes 16-/32-bit DDR Quad 3.3, 5 V V CSE2
2 x WVGA +AVB Trace
ARM Cortex M0+ (M0+)80 MHz ECC option) + 64 kB) 1 x LVDS DDR2 SPI

Image Cognition Processors


Primary Core Core Secondary Core Camera Flash Operating Package In
Device SRAM Display Interface USB (2.0) I2S I2C SPI UART 3.3 V GPIO Temp. Range
Platform Frequency Platform Input Support Voltage Options Production
APEX-SIMD Array,
SCP2201 ARM 926
350 MHz 16 MB DRAM PDI LCD and WVGA NAND, Serial NOR Flash HS OTG + HS Phy 1 2 1 4 P 1V C 236 MAP BGA P
Slave ARM926
APEX-SIMD Array,
SCP2207 ARM926 350 MHz 64 MB DRAM PDI LCD and WVGA NAND, Serial NOR Flash HS OTG + HS Phy 1 2 1 4 P 1V C 236 MAP BGA P
Slave ARM926

32-bit i.MX MPUs Built on ARM Technology


SD/ Sample
Core Core Video Graphics Image Camera Display DRAM Flash HDD SSI/ SPDIF 3.3 V Operating Temp. Package In
Device Cache SRAM DMA USB (2.0) CAN MLB MMC I2C SPI UART Ethernet Rate PIT
Platform Frequency Accelerator Accelerator Processor Input Interface Support Support Interface I2S I/O GPIO Voltage Range Options Production
SDIO Converter
L1: 32 KB/ Multi-Format OpenVG 1.1 x 64 x 16 NOR HS OTG+HS
852 1 GB Yes, 625 Flip
Quad ARM 32 KB I/D 1080p Encode (3D Core) P MIPI, Up to 4 x DDR3, x 8 SLC/ PHY 25/50/ 3+ P 1.275 P
i.MX 6Q MHz 256 KB 32-ch. 2 4 4 5 5 with IEEE SATA asynchro- Yes 3 C Chip
Cortex-A9 L2: 512 KB and Decode OpenGLES 2.0, 3.0 CCIR656 WXGA LV-DDR3 MLC HS Host+HS 150 ESAI to 1.50
1 GHz 1588 nous BGA
Unified (only on i.MX6Q6) Display Composition LP-DDR2 NAND PHY x2 HSIC
HS OTG+HS
L1: 32 KB/ Multi-Format OpenVG 1.1 x 64 x16 NOR
852 PHY 1 GB Yes, 625 Flip
Dual ARM 32 KB I/D 1080p Encode (3D Core) P MIPI, Up to 4 x DDR3, x 8 SLC/ 25 / 50 3+ P 1.275 to P
i.MX 6D MHz 256 KB 32-ch. HS Host+HS 2 4 4 5 5 with IEEE SATA asynchro- Yes 3 C Chip
Cortex-A9 L2: 512 KB and Decode OpenGLES 2.0, 3.0 CCIR656 WXGA LV-DDR3 MLC / 150 ESAI 1.50
1 GHz PHY 1588 nous BGA
Unified (only on i.MX6D6) Display Composition LP-DDR2 NAND
x 2 HSIC
HS OTG+HS
L1: 32 KB/ Multi-Format OpenVG 1.1 P MIPI, x 64 x 16 NOR
CCIR656 PHY 1 GB Yes, 625 Flip
Dual ARM 800 32 KB I/D 1080p Encode (3D Core) Up to 2 x DDR3, x 8 SLC/ 25 /50 3+ P 1.275 to P
i.MX 6U 128 KB 32-ch. (not in (not in HS Host+HS 2 4 4 4 5 with IEEE asynchro- Yes 3 C Chip
Cortex-A9 MHz L2: 512 KB and Decode OpenGLES 2.0, 3.0 WXGA LV-DDR3 MLC / 150 ESAI 1.50
i.MX 6U1) i.MX PHY 1588 nous BGA
Unified (only on i.MX6U6) Display Composition LP-DDR2 NAND
6 UI) x 2 HSIC
OpenVG 1.1 HS OTG+HS
L1: 32 KB/ Multi-Format P MIPI, Up to 2 x x 32 x 16 NOR
(3D Core) PHY 1 GB Yes, 625 Flip
ARM 800 32 KB I/D 1080p Encode CCIR656 WXGA DDR3, x 8 SLC/ 25 / 50 3+ P 1.275 to P
i.MX 6S 128 KB 32-ch. OpenGLES 2.0, 3.0 (not in HS Host+HS 2 4 4 4 5 with IEEE asynchro- Yes 3 C Chip
Cortex-A9 MHz L2: 512 KB and Decode (not in (not in LV-DDR3 MLC / 150 ESAI 1.50
Display Composition i.MX 6S1) PHY 1588 nous BGA
Unified (only on i.MX6S6) i.MX 6S1) i.MX 6S1) LP-DDR2 NAND
(not in i.MX 6S1) x 2 HSIC
L1: 32 KB/ HS OTG+HS
ARM HD720 Encode, NOR, SLC
32 KB I/D, OpenVG DDR2 PHY 10/100 Yes, 529
Cortex- 800 HD1080 P MIPI, UXGA, NAND SATA, 3+ P .95 to P
i.MX 53 L2: 128 KB 32-ch. 1.1, OpenGL DDR3 HS Host+FS 2 25 / 50 4 3 3 5 with IEEE asynchro- Yes 3 C MAP-
A8 with VPU MHz Decode CCIR656 Dual TFT MLC PATA ESAI 1.1
256 KB ES2.0 LP-DDR2 PHY 1588 nous BGA
and NEON (only in i.MX536) NAND
Unified and 2 x HS Host
HS OTG+HS
ARM1136 L1: 16 KB/ P MIPI, TFT up NOR, SLC
SDRAM, PHY Yes, 400
with Vector 532 16 KB I/D, OpenVG 1.1 CCIR656 to SVGA NAND 2+ P 1.22 to P
i.MX 35 128 KB 32-ch. (not in mDDR, HS Host+FS 2 25 / 50 3 3 2 3 10 / 100 ATA-6 asynchro- Yes 3 C MAP-
Floating MHz L2: 128 KB (only in i.MX356) (not in (not in MLC ESAI 1.47
i.MX351) DDR2 PHY or nous BGA
Point Unified i.MX351) i.MX351) NAND
Ext. HS PHY
SLC HS OTG+HS
TFT up to 10/100 x 1
NAND, PHY 289
454 L1: 16 KB/ WVGA mDDR, GMII or x 2 P Internally P
i.MX 28 ARM926 128 KB 32-ch. MLC HS Host+HS 2 x3 x2 x3 x6 x3 Tx 8 C MAP-
MHz 32 KB I/D (not in DDR2 RMII with generated
NAND, PHY BGA
i.MX281) IEEE 1588
QSPI Flash or Ext. HS PHY
Up to HS OTG+HS
MIPI, NOR, SLC
VGA (640 SDRAM, PHY 400
400 L1: 16 KB/ CCIR656 NAND 2+ P 1.38 P
I.MX25 ARM926 128 KB 32-ch. x 480) mDDR, HS Host+HS 2 2 3 3 5 10 / 100 ATA-6 4 C MAP-
MHz 16 KB I/D (not in MLC ESAI to 1.52
(not in DDR2 PHY or BGA
i.MX251) NAND
i.MX251) Ext. HS PHY

Acronym Legend Temperature Legend


ADC Analog-to-Digital Converter ECC Error Correction Coding I/O Input/Output OSC Oscillator On-Chip SPI Serial Peripheral Interface A = 55C to +125C
API Autonomous Periodic Interrupt ECT Enhanced Capture Timer KBI Keyboard Interrupt PBGA Plastic Ball Grid Array SRAM Static Random Access Memory C = 40C to +85C
BDM Background Debug Mode EEPROM Electrically Erasable Programmable KWU Key Wakup Port PDI Parallel Data Interface SSD Stepper Stall Detect
V = 40C to +105C
CAN Controller Area Network eMIOS Enhanced Multiple Input Output System LCD Liquid Crystal Display PIT Periodic Interrupt Timer UART  Universal Asynchronous Receiver and
Transmitter M = 40C to +125C
COP Computer Operating Properly ESAI Enhanced Serial Audio Interface LIN Local Interconnect Network POR Power On Reset
XGATE Coprocessor Available on S12X J = 40C to +140C
CSE Cryptographic Services Engine eTPU Enhanced Timer Processing Unit LQFP Low-Profile Quad Flat Package PWM Pulse Width Modulation
Platform W = 40C to +150C
CTU Cross Triggering Unit GPIO General-Purpose Input/Output MAPBGA Mold Array Process Ball Grid Array QFP Quad Flat Package
DCU Display Control Unit I2C Inter-Integrated Circuit MCG Multi-Purpose Clock Generator RAM Random Access Memory
DMA Direct Memory Access ICE In-Circuit Emulation MLB Media Local Bay RTC Real-Time Clock Symbol Legend
DSPI Deserial Serial Peripheral Interface ICG Internal Clock Generator MPU Memory Protection Unit SCI Serial Communication Interface
C Products available through the channel
EBI External Bus Interface ICS Internal Clock Source MSB Microsecond Bus SLIC Slave LIN Interface Controller
32-bit MPC56xx MCUs Built on Power Architecture Technology
Core Bus Program Emulated Stepper SCI Sound Memory Analog Operating Temp. In
Device SRAM eDMA TFT Drive DSPI CAN I2C LCD MPU eMIOS Timers Debug Package Options
Platform Frequency Flash EEPROM Drive (LINFlex) Generator Expansion (ADC) Voltage Range Production
Up to 2 Up 16 RTC, API, 8-ch., 32-bit PIT Up to 20-ch., 176 LQFP, 208 LQFP, P
C MPC5645S e200z4d 125 MHz 2 MB 64 KB 16-ch. 4 x 16 KB Up to 6 Up to 4 3 4 Yes Quad SPI 3.3, 5 V C, V Nexus 3
DCUs to 3 Entry and S/W Watchdog Timer 10-bit 416 TEPBGA
48 KB + 160 KB DCU 6 Gauges Yes 12 RTC, API, 4-ch., 32-bit PIT Nexus 144 LQFP,
MPC5606S e200z0h 64 MHz 1 MB 16-ch. 4 x 16 KB 2 3 2 4 40 x 4 Quad SPI 2-ch. 16-ch., 10-bit 3.3, 5 V C, V, M P
Graphics RAM with PDI with SSD (Using eMIOS) Entry and S/W Watchdog Timer 2+ 176 LQFP
6 Gauges P 12 RTC, API, 4-ch., 32-bit PIT P
MPC5604S e200z0h 64 MHz 512 KB 48 KB 16-ch. 4 x 16 KB No 2 2 2 2 64 x 6 2-ch. 16-ch., 10-bit 3.3, 5 V C, V, M Nexus 1 144 LQFP
with SSD Entry and S/W Watchdog Timer
6 Gauges P 12 RTC, API, 4-ch., 32-bit PIT P
MPC5602S e200z0h 64 MHz 256 KB 24 KB 16-ch. 4 x 16 KB No 2 3 1 2 64 x 6 2-ch. 16-ch., 10-bit 3.3, 5 V C, V, M Nexus 1 144 LQFP
with SSD Entry and S/W Watchdog Timer

32-bit MPC56xx and MPC57xx MCUs Built on Power Architecture Technology


Core Bus Program MPU/ CSE/ SCI Ethernet Other eTPU/ Motor Control Analog Operating Temp. Package In
Device SRAM DMA EEPROM CTU DSPI CAN I2C FlexRay MLB eMIOS PIT Debug
Platform Frequency Flash MMU HSM (LINFlex) (100Base-T) Peripherals GTM Timers (ADC, DAC) Voltage Range Options Prod.

Dual 2x 64 KB P, Dual Up to 32-ch., Up to 64-ch., 12-bit 416 BGA,


MPC5676R 6 MB 384 KB 96-ch. 32 Entry 3 5 4 96-ch. 3.3, 5 V M Nexus 3+
e200z7 180 MHz data Flash Channel 16-bit 12 x Dec. Filters 516 BGA

MPU + P, Dual Nexus 3+ 324 BGA,


150, 200, 64-ch. + Emulated in 4 2x Quad 64-ch. + P
C MPC5674F e200z7 4 MB 256 KB 64 Entry 3 4 32-ch. 3.3, 5 V M VertiCal Calibration 416 BGA,
264 MHz 32-ch. program Flash (MSB) Channel 32-ch. 8 Dec. Filters
MMU System 516 BGA
MPU + P, Dual Nexus 3+ 324 BGA,
150, 200, 64-ch. + Emulated in 4 2x Quad 64-ch. + P
C MPC5673F e200z7 3 MB 192 KB 64 Entry 3 4 32-ch. 3.3, 5 V M VertiCal Calibration 416 BGA,
264 MHz 32-ch. program Flash (MSB) Channel 32-ch. 8 Dec. Filters
MMU System 516 BGA
Nexus 3+ 176 LQFP,
80, 120, Emulated in 24 Entry 3 P Dual 40-ch. + P
C MPC5644A e200z4 4 MB 192 KB 64-ch. 3 3 32-ch. 24-ch. 5-ch. 3.3, 5 V M VertiCal Calibration 208 MAPBGA,
150 MHz program Flash MMU (MSB) 2 Dec. Filters
System 324 MAPBGA
Nexus 3+ 176 LQFP,
80, 120, Emulated in 24 Entry 3 P Dual 40-ch. + P
C MPC5643A e200z4 3 MB 192 KB 64-ch. 3 3 32-ch. 24-ch. 5-ch. 3.3, 5 V M VertiCal Calibration 208 MAPBGA,
150 MHz program Flash MMU (MSB) 2 Dec. Filters
System 324 MAPBGA
Nexus 3+
80, 120, Emulated in 24 Entry 3 P Dual 40-ch. + 176 LQFP, P
C MPC5642A e200z4 2 MB 128 KB 64-ch. 3 3 32-ch. 24-ch. 5-ch. 3.3, 5 V M VertiCal Calibration
150 MHz program Flash MMU (MSB) 2 Dec. Filters 324 MAPBGA
System
5V Nexus 2+ Wide
144 LQFP,
60, Emulated in (Internal Trace Port in Vertical P
C MPC5634M e200z3 1.5 MB 94 KB 32-ch. 16 Entry 2 2 2 32-ch. 16-ch., 24-bit 5-ch. Dual 34-ch., 12-bit M 176 LQFP,
80 MHz program Flash 3.3 V and Calibration System
208 MAPBGA
1.2 V) and JTAGC
5V Nexus 2+ Wide
144 LQFP,
40, 60, Emulated in (Internal Trace Port in Vertical P
C MPC5633M e200z3 1 MB 64 KB 32-ch. 16 Entry 2 2 2 32-ch. 16-ch., 24-bit 5-ch. Dual 34-ch., 12-bit M 176 LQFP,
80 MHz program Flash 3.3 V and Calibration System
208 MAPBGA
1.2 V) and JTAGC
5V
Nexus 2+ (Calibration
40, Emulated in (Internal P
C MPC5632M e200z3 768 KB 48 KB 32-ch. 16 Entry 2 2 2 32-ch. 8-ch., 24-bit 5-ch. Dual 32-ch., 12-bit M N/A on MPC5632M) 144 LQFP
60 MHz program Flash 3.3 V and
and JTAGC
1.2 V)
3 x 6-ch. 100 LQFP,
Dual 64 KB P P P
C MPC5643L 80/120 MHz 1 MB 128 KB 16-ch. 16 Entry 2 3 2 E-Timer/2 x 4-ch. Dual 16-ch., 12-bit 3.3 V M Nexus 3+ 144 LQFP,
e200z4 data Flash
12-ch. PWM 257 MAPBGA

64 KB P P 20-ch. 100 LQFP, P


C MPC5604P e200z0 40/64 MHz 512 KB 40 KB 16-ch. 2 4 2 4-ch. Dual 13-ch., 10-bit 3.3, 5 V C, V, M Nexus 2+
data Flash E-Timer/PWM 144 LQFP

64 KB P P 20-ch. 100 LQFP, P


C MPC5603P e200z0 40/64 MHz 384 KB 36 KB 16-ch. 2 4 2 4-ch. Dual 13-ch., 10-bit 3.3, 5 V C, V, M Nexus 2+
data Flash E-Timer/PWM 144 LQFP

64 KB P 14-ch. Nexus 1 (Emulation 64 LQFP, P


C MPC5602P e200z0 40/64 MHz 256 KB 20 KB 16-ch. 2 3 2 4-ch. 16-ch., 10-bit 3.3, 5 V C, V, M
data Flash E-Timer/PWM with MPC5604P) 100 LQFP

64 KB 6-ch. Nexus 1 (Emulation 64 LQFP, P


C MPC5601P e200z0 40/64 MHz 192 KB 12 KB 16-ch. 1 1 1 4-ch. 11-ch., 10-bit 3.3, 5 V C, V, M
data Flash E-Tiimer with MPC5604P) 100 LQFP

e200z6 + Emulated in P P P Nexus3 on z6 and P


C MPC5668G/E 116 MHz 2 MB 592 KB 16-ch. 6 4 6 4 16-ch., 24-bit 8-ch. 36-ch., 10-bit 3.3, 5 V V 208 MAPBGA
e200z0 program Flash Nexus 2+

256 BGA,
e200z4 + 120 MHz, 64 KB 16 P CSE P P Up to Up to 29-ch., 12-bit, P
C MPC5646C 3 MB 256 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG 208 LQFP,
e200z0 60 MHz data Flash Entry Option 8-ch. up to 33-ch., 10-bit
176 LQFP

64 KB 16 P CSE P Up to Up to 29-ch., 12-bit, 208 LQFP, P


C MPC5646B e200z4 120 MHz 3 MB 192 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG
data Flash Entry Option 8-ch. up to 33-ch., 10-bit 176 LQFP

256 BGA,
e200z4 + 120 MHz, 64 KB 16 P CSE P P Up to Up to 29-ch., 12-bit, P
C MPC5645C 2 MB 256 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG 208 LQFP,
e200z0 60 MHz data Flash Entry Option 8-ch. up to 33-ch., 10-bit
176 LQFP

64 KB 16 P CSE P Up to Up to 29-ch., 12-bit, 208 LQFP, P


C MPC5645B e200z4 120 MHz 2 MB 160 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG
data Flash Entry Option 8-ch. up to 33-ch., 10-bit 176 LQFP

256 BGA,
e200z4 + 120 MHz, 64 KB 16 P CSE P P Up to Up to 29-ch., 12-bit, P
C MPC5644C 1.5 MB 192 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG 208 LQFP,
e200z0 60 MHz data Flash Entry Option 8-ch. up to 33-ch., 10-bit
176 LQFP

64 KB 16 P CSE P Up to Up to 29-ch., 12-bit, 208 LQFP, P


C MPC5644B e200z4 120 MHz 1.5 MB 128 KB 16-ch. 10 8 6 1 64-ch., 16-bit 3.3, 5 V C, V, M Nexus 3+, JTAG
data Flash Entry Option 8-ch. Up to 33-ch., 10-bit 176 LQFP

Dual 2x 2x 3 x PWM, 257 MAP,


C MPC5675K 2 MB 512 KB 64 KB Yes 2 4 3 4 3 P P 1 4 x 12-bit, 34-ch. 3.3, 1.2 V C, V, M Nexus 3+ P
e200z7 180 MHz 32-ch. 3 x E-Timer 473 MAP

Dual 2x 2x 3 x PWM, 257 MAP,


C MPC5674K 1.5 MB 384 KB 64 KB Yes 2 4 3 4 3 P P 1 4 x 12-bit, 34-ch. 3.3, 1.2 V C, V, M Nexus 3+ P
e200z7 180 MHz 32-ch. 3 x E-Timer 473 MAP

Dual 2x 2x 3 x PWM, 257 MAP,


C MPC5673K 1 MB 256 KB 64 KB Yes 2 3 2 4 2 P P 1 4 x 12-bit, 34-ch. 3.3, 1.2 V C, V, M Nexus 3+ P
e200z7 180 MHz 32-ch. 3 x E-Timer 473 MAP

C MPC5604E e200z0 64 MHz 512 KB 96 KB 16-ch. 64 KB Yes 2 3 1 3 P 1 x E-Timer 1 1 x 10-bit, 8-ch. 3.3, 1.2 V C, V, M Nexus 2+ 64 LQFP P

BCM89810
MPC5606E e200z0 64 MHz 512 KB 96 KB 16-ch. 64 KB Yes 2 3 1 3 P BroadR-Reach 1 x E-Timer 1 1 x 10-bit, 8-ch. 3.3, 1.2 V C, V, M Nexus 2+ 121 MAPBGA P
compatible phy
Up to 24-ch., Nexus 2+ (208 100 LQFP,
64 KB P Up to
C MPC5607B e200z0 64 MHz 1.5 MB 96 KB 16-ch. 8 Entry 10 6 6 1 64-ch., 16-bit 10/12-bit + 29-ch., 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 8-ch.
10-bit Only Package) JTAG 176 LQFP
Up to 24-ch., Nexus 2+ (208 100 LQFP,
64 KB P Up to
C MPC5606B e200z0 64 MHz 1 MB 80 KB 16-ch. 8 Entry Up to 8 Up to 6 6 1 64-ch., 16-bit 10/12-bit + 29-ch., 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 8-ch.
10-bit Only Package) JTAG 176 LQFP
Nexus 2+ (208 100 LQFP,
64 KB P Up to 64-ch., Up to Up to 24-ch., 10/12-
C MPC5605B e200z0 64 MHz 768 KB 64 KB 16-ch. 8 Entry Up to 8 Up to 6 6 1 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 16-bit 8-ch. bit + 29-ch., 10-bit
Only Package) JTAG 176 LQFP
Nexus 2+ (208 100 LQFP,
64 KB P Up to 56-ch., Up to
C MPC5604B e200z0 64 MHz 512 KB 32 KB 8 Entry 4 Up to 3 3 1 Up to 36-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 16-bit 6-ch.
Only Package) JTAG 64 LQFP
Nexus 2+ (208 100 LQFP,
64 KB P Up to 56-ch., Up to
C MPC5603B e200z0 64 MHz 384 KB 28 KB 8 Entry 4 Up to 3 3 1 Up to 36-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 16-bit 6-ch.
Only Package) JTAG 64 LQFP
Nexus 2+ (208 100 LQFP,
64 KB P Up to 56-ch., Up to
C MPC5602B e200z0 64 MHz 256 KB 24 KB 8 Entry 3 Up to 3 2 1 Up to 36-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation 144 LQFP, P
data Flash 16-bit 6-ch.
Only Package) JTAG 64 LQFP
Nexus 2+ (208
64 KB P Up Up to 28-ch., Up to 100 LQFP,
C MPC5604C e200z0 64 MHz 512 KB 48 KB 8 Entry 4 Up to 3 1 Up to 28-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation P
data Flash to 6 16-bit 3-ch. 64 LQFP
Only Package) JTAG
Nexus 2+ (208
64 KB P Up Up to 28-ch., Up to 100 LQFP,
C MPC5603C e200z0 64 MHz 384 KB 40 KB 8 Entry 4 Up to 3 1 Up to 28-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation P
data Flash to 6 16-bit 3-ch. 64 LQFP
Only Package) JTAG
Nexus 2+ (208
64 KB P Up Up to 28-ch., Up to 100 LQFP,
C MPC5602C e200z0 64 MHz 256 KB 32 KB 8 Entry 4 Up to 3 1 Up to 28-ch., 10-bit 3.3, 5 V C, V, M MAPBGA Emulation P
data Flash to 6 16-bit 3-ch. 64 LQFP
Only Package) JTAG

64 KB P Up to 28-ch., Up to 100 LQFP,


C MPC5602D e200z0 48 MHz 256 KB 16 KB 16-ch. 3 2 1 Up to 33-ch., 12-bit 3.3, 5 V C, V, M JTAG P
data Flash 16-bit 4-ch. 64 LQFP

64 KB P Up to 28-ch., Up to 100 LQFP,


C MPC5601D e200z0 48 MHz 128 KB 12 KB 16-ch. 3 2 1 Up to 33-ch., 12-bit 3.3, 5 V C, V, M JTAG P
data Flash 16-bit 4-ch. 64 LQFP

(3 x 6-ch.,
Emulated in P P Quad, 25-ch. Nexus 3+, MDO and 144 LQFP,
MPC5744P Dual e200z4 200 MHz 2.5 MB 384 KB 32-ch. 24 Entry 2 2 4 3 E-Timer), (2 x 4-ch. 3.3 V M, K P
program Flash External, 12-bit Aurora interface 257 MAPBGA
12-ch., PWM)
(3 x 6-ch.,
Dual Emulated in 2 P P Quad, 25-ch. Nexus 3+, MDO and 144 LQFP, P
MPC5743P 200MHz 2 MB 256 KB 32-ch. 24 Entry 2 4 3 E-Timer), (2 x 4-ch. 3.3 V M, K
e200z4 program Flash External, 12-bit Aurora interface 257 MAPBGA
12-ch., PWM)
(3 x 6-ch.,
Dual Emulated in 2 P P Quad, 25-ch. Nexus 3+, MDO and 144 LQFP, P
MPC5742P 200MHz 1.5 MB 192 KB 32-ch. 24 Entry 2 4 3 E-Timer), (2 x 4-ch. 3.3 V M, K
e200z4 program Flash External, 12-bit Aurora interface 257 MAPBGA
12-ch., PWM)
(3 x 6-ch.,
Dual Emulated in 2 P P Quad, 25-ch. Nexus 3+, MDO and 144 LQFP, P
MPC5741P 200MHz 1 MB 128 KB 32-ch. 24 Entry 2 4 3 E-Timer), (2 x 4-ch. 3.3 V M, K
e200z4 program Flash External, 12-bit Aurora interface 257 MAPBGA
12-ch., PWM)

MPC5746R e200z4 x 3 3 x 200MHz 4 MB 320 KB 64-ch. 256 KB 24 Entry P 6 7 4 P Zipwire, SENT 64-ch. 32-ch. 8 4 x SAR, 3 x SD 3.3, 5 V M Nexus 3+, JTAG 252 MAPBGA

P P 176 LQFP,
MPC5745R e200z4 x 3 3 x 200MHz 3 MB 256 KB 64-ch. 256 KB 24 Entry 6 7 4 Zipwire, SENT 64-ch. 32-ch. 8 4 x SAR, 3 x SD 3.3, 5 V M Nexus 3+, JTAG
252 MAPBGA

P P 144 LQFP,
MPC5743R e200z4 x 2 2 x 200MHz 2 MB 160 KB 64-ch. 256 KB 24 Entry 5 5 4 Zipwire, SENT 64-ch. 32-ch. 8 4 x SAR, 3 x SD 3.3, 5 V M Nexus 3+, JTAG
176 LQFP

2 x USB, SDHC,
Dual 176 LQFP,
160 MHz, Emulated 32-ch. P HSM P P 3 x I2S Up to 96-ch., Up to 64-ch., 12-bit,
MPC5746G e200z4, 3 MB 768 KB 32-ch. Up to 18 10 8 4 Up to 2 16 3.3, 5 V C, V, M Nexus 3+ 256 MAPBGA,
80 MHz 192 kbit MPU Option Ethernet switch 16-bit Up to 80-ch., 10-bit
e200z2 324 MAPBGA
option
3 x I2S, 176 LQFP,
e200z4, 160 MHz, Emulated 24-ch. P HSM P Up to 2 Up to 96-ch., Up to 32-ch., 12-bit,
MPC5747C 4 MB 512 KB 32-ch. Up to 18 10 8 4 Ethernet switch 16 3.3, 5 V C, V, M Nexus 3+ 256 MAPBGA,
e200z2 80 MHz 128 kbit MPU Option 16-bit 48-ch., 10-bit
option 324 MAPBGA
2 x USB, SDHC,
Dual 176 LQFP,
160 MHz, Emulated 32-ch. P HSM P Up to 2 P 3x I2S Up to 96-ch., Up to 32-ch., 12-bit,
MPC5747G e200z4, 4 MB 768 KB 32-ch. Up to 18 10 8 4 16 3.3, 5 V C, V, M Nexus 3+ 256 MAPBGA,
80 MHz 192k MPU Option Ethernet switch 16-bit 48-ch., 10-bit
e200z2 324 MAPBGA
option
3 x I2S, 176 LQFP,
e200z4, 160 MHz, Emulated 24-ch. P HSM P Up to 2 Up to 96-ch., Up to 32-ch., 12-bit,
MPC5748C 6 MB 768 KB 32-ch. Up to 16 10 8 4 Ethernet switch 16 3.3, 5 V C, V, M Nexus 3+ 256 MAPBGA,
e200z2 80 MHz 128 kbit MPU Option 16-bit 48-ch., 10-bit
option 324 MAPBGA
2 x USB, SDHC,
Dual 176 LQFP,
160 MHz, Emulated 32-ch. P HSM P Up to 2 P 3x I2S Up to 96-ch., Up to 32-ch., 12-bit,
MPC5748G e200z4, 6 MB 768 KB 32-ch. Up to 18 10 8 4 16 3.3, 5 V C, V, M Nexus 3+ 256 MAPBGA,
80 MHz 192 kbit MPU Option Ethernet switch 16-bit 48-ch., 10-bit
e200z2 324 MAPBGA
option
3 x e200z7 3 x 300 MHz
P Up to 2 248- Nexus 3+, Zipwire, 416 PBGA,
MPC5777M +1 x +1 x 8 MB 596 KB 128-ch. 8 x 64 KB Yes, No HSM 6 8 4/1 2 8 12 x SAR, 10 x SD 3.3, 5 V M
ch. Aurora, JTAG 512 PBGA
e200z4 200 MHz
Dual e200z7: SPT (Signal AFE with 4 x 37-ch.
4 MB 1.5 MB 4 inc. P, Dual 3.3 V
e200z7, + 266 MHz Safe 2 P Processing Tool- 12 b SAR ADC -40 to Nexus 3+/ 17 x 17 356 P
MPC5775K with with No No No 4 4 1X 3 Channel No No No 2 x FlexPWM No I/O, 1.2 V
Lockstep e200z4: eDMA kit) with Radar 2 MSample/sec. 150 Tj Aurora MAPBGA
ECC ECC FD core
dual e200z4 166 MHz Acceleration 12 b DAC
Dual e200z7: SPT (Signal AFE with 4 x 37-ch.
3 MB 1 MB 4 inc. P, Dual 3.3 V
e200z7, + 266 MHz Safe 2 P Processing Tool- 12 b SAR ADC -40 to Nexus 3+/ 17 x 17 356 P
MPC5774K with with No No No 4 4 1X 3 Channel No No No 2 x FlexPWM No I/O, 1.2 V
Lockstep e200z4: eDMA kit) with Radar 2 MSample/sec. 150 Tj Aurora MAPBGA
ECC ECC FD core
dual e200z4 166 MHz Acceleration 12 b DAC

2x Emulated in P 416 PBGA,


MPC5777C e200z7 x 3 3 X 264 MHz 8 MB 512 KB 32 Entry CSE 5 5 6 Zipwire, SENT 96-ch. 32-ch. 4 2 x eQADC, 3 x SD 3.3, 5 V M Nexus 3+, JTAG
64-ch. program Flash 516 PBGA

32-bit VFxxx Controller Solutions


SD/ Sample
Core Core Graphics Display DRAM Flash SPDIF 3.3 V Operating Temp. Package In
Device Cache SRAM DMA Camera Input USB (2.0) CAN MLB MMC I2C SPI UART Ethernet I2S Rate PIT
Platform Frequency Accelerator Interface Support Support I/O GPIO Voltage Range Options Production
SDIO Converter
18-bit
L1: 32 KB/ 2 (Up to WVGA) + Dual Quad-
ARM Up to P Composite DDR3 2 x USB OTG P 2 x 10/100 4 x SAI 176 LQFP P
SVFxxxR 400 MHz 32 KB I/D OpenVG 1.1 Segment Display SPI, NAND, 50 2 4 4 6 Yes Yes 3.0 to 3.6 C
Cortex-A5/M4 1.5 MB (4 to 1) + LP-DDR2 HS + Phy 1 x ESAI 364 BGA
L2: 512 KB (40 x 4) FlexBus
VADC

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