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A B C D E

Model Name : ZIWB0/ZIWB1/ZIWE0


File Name :

1 1

Compal Confidential
2 2

ZIWB0/ZIWB1/ZIWE0 UMA M/B Schematics Document

Intel Bay Trail M

2014-02-10
3 3

REV:1.0

14PCB@
DA1 PCB
Part Number Description
4 DA60013Z010 REV1.0 M/B 4

15PCB@
DA2 PCB
Part Number
Security Classification Compal Secret Data Compal Electronics, Inc.
Description
2013/04/12 2014/04/12 Title
DA60013Z110 REV1.0 M/B
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B102P
Date: Tuesday, February 18, 2014 Sheet 1 of 47
A B C D E
A B C D E

Memory Bus
A-ch DDR3L-SO-DIMM X1
DDR3L 1333MHz (1.35V)
1 1

Memory Bus
B-ch DDR3L-SO-DIMM X1
DDR3L 1333MHz (1.35V)

eDP X1
(2 Lanes) USB3.0 x1 Left USB3.0 x1
eDP Panel
USB2.0 x1 USB30 Port 0

CRT
CRT Conn. Left USB2.0 x1
Intel Valleyview USB2.0 x1
DDI X1 USB20 Port 1
(4 Lanes) SOC
HDMI Conn.
2
25mm X 27mm USB2.0 x1 Right USB2.0 x1 2

USB20 Port 2
PCIe X1
LAN (1 Lanes) Right USB2.0 x1 Touch Screen
RJ45 Conn. RTL8106E/RTL8111G Finger Printer
USB HUB Port 1 USB HUB Port 1
10/100/GIGA USB2.0 x1 USB Hub * 1 For E14 For B14/B15 USB HUB Port 2
PCIe Port 0
USB20 Port 3

Int. Camera Bluetooth


PCIe X1 USB HUB Port 3 USB HUB Port 4

NGFF (1 Lanes)
WLAN / BT SATA X1 HDD Conn.
USB2.0 X1 SATA Port 4
(1 Lanes)
PCIe Port 1
SATA X1 ODD Conn.
SATA Port 5
3 3

Card Reader PCIe X1


Realtek (1 Lanes) Audio Codec
RTS 5229-GR HDA Realtek
ALC233
PCIe Port 2

SPI ROM EC
Sub-borad 8MB Nuvoton 288N Int. MIC Conn. Int. Speaker Conn. Audio Combo Jacks
HP & MIC
15"
14"
DC IN/B BATT/B Thermal Sensor Touch Pad Int. KBD

Power/B
4
ODD/B 4

IO/B

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 2 of 47
A B C D E
A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S4/S5 Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON Ra/Rc/Re 100K +/- 5%
BATT+ 12V Battery power supply ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 0 0 V 0 V 0 V
1
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1
+RTCVCC RTC Battery Power ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.0VALW +1.0v Always power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.8VALW +1.8v Always power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3VALW +3.3v Always power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5.0v Always power rail ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF BOARD ID Table
+SOC_VNN GFX voltage for SOC ON OFF OFF
Board ID PCB Revision BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.0VS +1.0v system power rail ON OFF OFF
0 Item BOM Structure
+1.05VS +1.05v system power rail ON OFF OFF
1 Unpop @
+1.35VS +1.35v system power rail ON OFF OFF
2 Connector ME@
2
+1.5VS +1.5v system power rail ON OFF OFF
3 XDP (Debug Port) XDP@ 2

+1.8VS +1.8v system power rail ON OFF OFF


4 EMC requirement EMC@
+3VS +3.3v system power rail ON OFF OFF
5 EMC requirement unpop @EMC@
+5VS
6 ESD requirement ESD@
+5.0v system power rail ON OFF OFF
ESD requirement unpop @ESD@
Touch Screen TS@
B/E series sku B14@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. B/E series sku B15@
B/E series sku E14@

EC SM Bus1 address EC SM Bus2 address 43 level BOM table


Device Address Device Address
43 Level Description BOM Structure
3 3

Smart Battery 0001 011X b GPU 0x9E


Charger 0b00010010 (0x12H) Thermal 1001_101xb

SOC SM Bus address


Device Address
SO-DIMM A (JDIMM1) A0h
SO-DIMM B (JDIMM2) A2h
USOC1 USOC1 USOC1
N2920@ N3520@ N2815@

S IC FH8065301616203 SR1SF B3 1.86G C38! S IC FH8065301616103 SR1SE B3 2.17G C38! S IC FH8065301619509 SR1SJ B3 1.86G C38!
Part Number = SA00007E860 Part Number = SA00007E990 Part Number = SA00007EO50

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 3 of 47
A B C D E
5 4 3 2 1

EVT Power Sequence


2013-06-25_ AC Power On S3 S3 Resume Power Off
Plug in
+3VLP
D +3VLP D
EC_ON
EC_ON
+5VALW
+5VALW 497.8us
+3VALW
+3VALW 394.5us
+1.0VALW
+1.0VALW 5.540ms
+1.8VALW
+1.8VALW 6.160ms

ON/OFF ON/OFF
EC_RSMRST#
EC_RSMRST# 100.1ms

104.9ms
PBTN_OUT#
205.0ms PBTN_OUT#

PMC_SLP_S4# 22.92ms
PMC_SLP_S4#
PMC_SLP_S3# 22.96ms
C PMC_SLP_S3# C

SYSON 207.8ms 215.2ms


SYSON
+1.35V 596.2us 2.48ms
+1.35V

5.555ms 2.078ms
DDR_PWROK DDR_PWROK

228.4ms 29.52ms 15.9ms 30.94ms


VR_ON VR_ON
2.428ms 6.340ms 2.446ms 7.760ms
+CORE_VNN +CORE_VNN
2.441ms 9.330ms 2.440ms 12.02ms
+CORE_VCC +CORE_VCC

2.642ms -250ns 2.642ms -6.098ns


VGATE VGATE

B
249.3ms 6.702ms 36.81ms 5.241ms B
SUSP# SUSP#
22.58us 1.213ms 23.14us 1.286ms
+1.0VS +1.0VS
1.406ms 1.329ms 1.383ms 1.361ms
+1.05VS +1.05VS
1.893ms 8.813ms 1.918ms 8.902ms
+1.35VS +1.35VS
2.156ms 18.73ms 2.160ms 18.71ms
+1.5VS +1.5VS
3.042ms 12.40ms 3.056ms 12.46ms
+1.8VS +1.8VS
13.65ms 13.79ms
3.538ms 156.8ms 3.546ms 156.8ms
+3VS +3VS
4.272ms 18.32ms 4.284ms 18.33ms
+5VS +5VS
8.081ms 25.48ms 8.076ms 25.56ms
+0.675VS +0.675VS

43.26ms 148.5ms 43.24ms 148.3ms


KBRST# KBRST#
62.96ms 12.40ms 62.98ms 7.479ms
PMC_CORE_PWROK PMC_CORE_PWROK

A
62.96ms 12.40ms 62.98ms 7.479ms A
DDR_CORE_PWROK DDR_CORE_PWROK
6.040ms 5.690ms
PMC_PLTRST# PMC_PLTRST#

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 4 of 47
5 4 3 2 1
5 4 3 2 1

D D

USOC1A USOC1B
[13] DDR_A_MA[0..15] K45 M36 DDR_A_D[0..63] [13] [14] DDR_B_MA[0..15] AY45 BG38 DDR_B_D[0..63] [14]
DDR_A_MA0 DDR_A_D0 DDR_B_MA0 DDR_B_D0
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 DDR_B_MA1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40 DDR_B_D1
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 DDR_B_MA2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42 DDR_B_D2
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 DDR_B_MA3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42 DDR_B_D3
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 DDR_B_MA4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 DDR_B_D4
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 DDR_B_MA5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36 DDR_B_D5
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 DDR_B_MA6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42 DDR_B_D6
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 DDR_B_MA7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44 DDR_B_D7
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 DDR_B_MA8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32 DDR_B_D8
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 DDR_B_MA9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32 DDR_B_D9
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 DDR_B_MA10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36 DDR_B_D10
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 DDR_B_MA11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37 DDR_B_D11
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 DDR_B_MA12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33 DDR_B_D12
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 DDR_B_MA13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33 DDR_B_D13
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 DDR_B_MA14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37 DDR_B_D14
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 DDR_B_MA15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38 DDR_B_D15
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36 DDR_B_D16
[13] DDR_A_DM[0..7] G36 DRAM0_DQ_16 G38 [14] DDR_B_DM[0..7] BD38 DRAM1_DQ_16 AT36
DDR_A_DM0 DDR_A_D17 DDR_B_DM0 DDR_B_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 DDR_B_DM1 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40 DDR_B_D18
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 DDR_B_DM2 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40 DDR_B_D19
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 DDR_B_DM3 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36 DDR_B_D20
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 DDR_B_DM4 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36 DDR_B_D21
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 DDR_B_DM5 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42 DDR_B_D22
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 DDR_B_DM6 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40 DDR_B_D23
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 DDR_B_DM7 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41 DDR_B_D24
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41 DDR_B_D25
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45 DDR_B_D26
[13] DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 [14] DDR_B_RAS# AV44 DRAM1_RAS# DRAM1_DQ_26 BH46
DDR_A_D27 DDR_B_D27
[13] DDR_A_CAS# H51 DRAM0_CAS# DRAM0_DQ_27 C40 [14] DDR_B_CAS# BB51 DRAM1_CAS# DRAM1_DQ_27 BG40
DDR_A_D28 DDR_B_D28
[13] DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 [14] DDR_B_WE# DRAM1_WE# DRAM1_DQ_28 BH40
C DDR_A_D29 DDR_B_D29 C
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48 DDR_B_D30
[13] DDR_A_BS0 K44 DRAM0_BS_0 DRAM0_DQ_30 B47 [14] DDR_B_BS0 AY44 DRAM1_BS_0 DRAM1_DQ_30 BH47
DDR_A_D31 DDR_B_D31
[13] DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 [14] DDR_B_BS1 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32 DDR_B_D32
[13] DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 K51 [14] DDR_B_BS2 DRAM1_BS_2 DRAM1_DQ_32 AY51
DDR_A_D33 DDR_B_D33
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52 DDR_B_D34
[13] DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 T51 [14] DDR_B_CS0# DRAM1_CS_0# DRAM1_DQ_34 AP51
DDR_A_D35 DDR_B_D35
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51 DDR_B_D36
[13] DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 [14] DDR_B_CS2# DRAM1_CS_2# DRAM1_DQ_36 AW53
DDR_A_D37 DDR_B_D37
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51 DDR_B_D38
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53 DDR_B_D39
[13] DDR_A_CKE0 D48 DRAM0_CKE_0 DRAM0_DQ_39 T47 [14] DDR_B_CKE0 BE46 DRAM1_CKE_0 DRAM1_DQ_39 AP47
DDR_A_D40 DDR_B_D40
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45 DDR_B_D41
[13] DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 [14] DDR_B_CKE2 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40
DDR_A_D42 DDR_B_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41 DDR_B_D43
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48 DDR_B_D44
[13] DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 T50 [14] DDR_B_ODT0 DRAM1_ODT_0 DRAM1_DQ_44 AP50
DDR_A_D45 DDR_B_D45
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42 DDR_B_D46
[13] DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 [14] DDR_B_ODT2 DRAM1_ODT_2 DRAM1_DQ_46 AH40
DDR_A_D47 DDR_B_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45 DDR_B_D48
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47 DDR_B_D49
[13] DDR_A_CLK0 M48 DRAM0_CKP_0 DRAM0_DQ_49 AD48 [14] DDR_B_CLK0 AV48 DRAM1_CKP_0 DRAM1_DQ_49 AF48
DDR_A_D50 DDR_B_D50
[13] DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 AD50 [14] DDR_B_CLK0# DRAM1_CKN_0 DRAM1_DQ_50 AF50
DDR_A_D51 DDR_B_D51
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48 DDR_B_D52
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50 DDR_B_D53
[13] DDR_A_CLK2 P48 DRAM0_CKP_2 DRAM0_DQ_53 AB44 AT50 DRAM1_DQ_53 AH44
DDR_A_D54 DDR_B_D54
[13] DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 Y45 [14] DDR_B_CLK2 AT48 DRAM1_CKP_2 DRAM1_DQ_54 AK45
DDR_A_D55 DDR_B_D55
DRAM0_DQ_55 V52 [14] DDR_B_CLK2# DRAM1_CKN_2 DRAM1_DQ_55 AM52
DDR_A_D56 DDR_B_D56
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51 DDR_B_D57
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53 DDR_B_D58
[13] DDR_A_RST# DRAM0_DRAMRST# DRAM0_DQ_58 AC51 AT41 DRAM1_DQ_58 AG51
DDR_A_D59 DDR_B_D59
DRAM0_DQ_59 W53 [14] DDR_B_RST# DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DDR_A_D60 DDR_B_D60
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51 DDR_B_D61
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52 DDR_B_D62
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51 DDR_B_D63
DRAM0_DQ_63 DRAM1_DQ_63
B B
100K_0402_1% 1 2 R960 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40 DDR_B_DQS0
100K_0402_1% 1 2 R961 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40 DDR_B_DQS#0
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35 DDR_B_DQS1
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34 DDR_B_DQS#1
DRAM0_DQSN_1 D40 DDR_A_DQS2 DRAM1_DQSN_1 BA38 DDR_B_DQS2
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38 DDR_B_DQS#2
[41] DDR_PWROK AB42 DRAM_VDD_S4_PWROK DRAM0_DQSN_2 B44 DRAM1_DQSN_2 BH44
DDR_A_DQS3 DDR_B_DQS3
[8] DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 C43 DRAM1_DQSP_3 BG43
DDR_A_DQS#3 DDR_B_DQS#3
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53 DDR_B_DQS4
23.2_0402_1% 1 2 R962 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52 DDR_B_DQS#4
29.4_0402_1% 1 2 R963 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42 DDR_B_DQS5
162_0402_1% 1 2 R964 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44 DDR_B_DQS#5
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47 DDR_B_DQS6
DRAM0_DQSP_6 Y48 DDR_A_DQS#6 DRAM1_DQSP_6 AK48 DDR_B_DQS#6
Follow CRB v1.15 DRAM0_DQSN_6 DRAM1_DQSN_6
AF40 AB52 DDR_A_DQS7 AH52 DDR_B_DQS7
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51 DDR_B_DQS#7
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] [13] DDR_B_DQS[0..7] [14]
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] [13] DDR_B_DQS#[0..7] [14]
FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170

Close To SOC Pin

+1.35V +DDR_SOC_VREF
A A
1 2
R965 1
4.7K_0402_1%
C1132
1 2 .1U_0402_16V7K
R966 2
4.7K_0402_1%

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1

RP43
USOC1C 150_0804_8P4R_1%
CRT_R 8 1
AV3 AG3 CRT_G 7 2
[24] HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_TXP0 [23]
AV2 1.0V 1.0V AG1 CRT_B 6 3
[24] HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 EDP_TXN0 [23]
AT2 AF3 5 4
[24] HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 EDP_TXP1 [23]
AT3 AF2
[24] HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 EDP_TXN1 [23]
AR3 AD3
[24] HDMI_TX0+ DDI0_TXP_2 DDI1_TXP_2
AR1 AD2
[24] HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2
AP3 AC3
[24] HDMI_CLK+
AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP Panel +1.8VS
D
HDMI [24] HDMI_CLK- DDI0_TXN_3 DDI1_TXN_3 D

AL3 1.0V AK3 EDP_AUXP [23]


DDI0_AUXP DDI1_AUXP

5
AL1 1.0V AK2 EDP_AUXN [23] @ U61
DDI0_AUXN DDI1_AUXN 1

P
D27 K30 NC 4 R1081 1 @ 2 0_0402_5%
[24] HDMI_HPD# DDI0_HPD 1.8V 1.8V DDI1_HPD EDP_HPD# [23] Y BKOFF# [23]
DDI1_ENBKL 2
A

G
C26 1.8V 1.8V P30 DDI1_ENABLE R967 1 2 2.2K_0402_5% +1.8VS
[24] HDMI_DDCDATA DDI0_DDCDATA DDI1_DDCDATA
C28 1.8V 1.8V G30 NL17SZ07DFT2G_SC70-5
[24] HDMI_DDCCLK

3
DDI0_DDCCLK DDI1_DDCCLK SA00004BV00
B28 1.8V N30 DDI1_ENVDD
C27 DDI0_VDDEN DDI1_VDDEN J30 DDI1_ENBKL
DDI0_BKLTEN 1.8V DDI1_BKLTEN
B26 1.8V M30 DDI1_PWM R1060 1 RS@ 2 0_0402_5%
DDI0_BKLTCTL DDI1_BKLTCTL SOC_ENBKL [33]
AH3
1 R968 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
AM2 VSS_AM3 RESERVED_AF14 AF13 +1.8VS
Follow CRB v1.15 0ohm till to GND VSS_AM2 RESERVED_AF13
BA3 CRT_R
VGA_RED CRT_R [25]

5
AY2 CRT_B @ U62
VGA_BLUE CRT_B [25]
BA1 CRT_G 1

P
VGA_GREEN CRT_G [25] NC
AW1 CRT_IREF R969 1 2 357_0402_1% 4 R1086 1 @ 2 0_0402_5%
VGA_IREF Y ENVDD [23]
AY3 DDI1_ENVDD 2
VGA_IRTN A

G
C C
3.3V BD2 CRT_HSYNC
CRT_HSYNC [25]
CRT NL17SZ07DFT2G_SC70-5

3
VGA_HSYNC BF2 CRT_VSYNC SA00004BV00
3.3V VGA_VSYNC CRT_VSYNC [25]

3.3V BC1 CRT_DDC_CLK


VGA_DDCCLK CRT_DDC_CLK [25]
3.3V BC2 CRT_DDC_DATA R1088 1 RS@ 2 0_0402_5%
VGA_DDCDATA CRT_DDC_DATA [25] SOC_ENVDD [33]
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13 +1.8VS
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
RESERVED_Y3 RESERVED_Y12

5
Y2 Y13 U64
W3 RESERVED_Y2 RESERVED_Y13 V10 1

P
W1 RESERVED_W3 RESERVED_V10 V9 NC 4
RESERVED_W1 RESERVED_V9 Y INVT_PWM_SOC [23]
V2 T12 DDI1_PWM 2
RESERVED_V2 RESERVED_T12 A

G
V3 T10
R3 RESERVED_V3 RESERVED_T10 V14 NL17SZ07DFT2G_SC70-5

3
R1 RESERVED_R3 RESERVED_V14 V13 SA00004BV00
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1

AB7 T4 +3VS
@ Y4 RESERVED_AB7 RESERVED_T4 P14 RP44
R970 Y6 RESERVED_Y4 RESERVED_P14 BKOFF# 5 4
10K_0402_5% V4 RESERVED_Y6 F34 ENVDD 6 3
V6 RESERVED_V4 GPIO_S0_NC_15 M32 INVT_PWM_SOC 7 2
2

B GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28 8 1 B


GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28
T186 GPIO_S0_NC14 GPIO_S0_NC_18
1

AB14 K34 4.7K_0804_8P4R_5%


GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34
T187 GPIO_S0_NC_12 GPIO_S0_NC_20
R971 C30 F32 RP45
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28 DDI1_ENBKL 8 1
GPIO_S0_NC_22 K28 DDI1_ENVDD 7 2
2

GPIO_S0_NC_23 J34 DDI1_PWM 6 3 0504


GPIO_S0_NC_24 N32 5 4
GPIO_S0_NC_25 D32
Follow CRB v1.15 3 OF 10 GPIO_S0_NC_26 100K_0804_8P4R_5%

FH8065301546401_FCBGA131170 C514
100P_0402_50V8J
GPIO_S0_NC[13]: DDI1_ENBKL 2 1
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA ESD@
C516
100P_0402_50V8J
DDI1_ENVDD 2 1
ESD@
C518
100P_0402_50V8J
DDI1_PWM 2 1
ESD@
C519
100P_0402_50V8J
EDP_HPD# 2 1
A A
ESD@

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Display
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1

USOC1D

BF6 AY7
[31] SATA_PTX_DRX_P0 BG7 SATA_TXP_0 PCIE_TXP_0 AY6
[31] SATA_PTX_DRX_N0 SATA_TXN_0 PCIE_TXN_0
HDD
AU16 AT14
[31] SATA_PRX_DTX_P0 SATA_RXP_0 PCIE_RXP_0
AV16 AT13
[31] SATA_PRX_DTX_N0 SATA_RXN_0 PCIE_RXN_0
D D
BD10 AV6 PCIE_PTX_DRX_P1 .1U_0402_16V7K 1 2 C1135
[31] SATA_PTX_DRX_P1 SATA_TXP_1 PCIE_TXP_1 PCIE_PTX_C_DRX_P1 [29]
BF10 AV4 PCIE_PTX_DRX_N1 .1U_0402_16V7K 1 2 C1000
[31] SATA_PTX_DRX_N1 SATA_TXN_1 PCIE_TXN_1 PCIE_PTX_C_DRX_N1 [29]
ODD Card reader
AY16 AT10 PCIE_PRX_DTX_P1
[31] SATA_PRX_DTX_P1 BA16 SATA_RXP_1 PCIE_RXP_1 AT9 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 [29]
[31] SATA_PRX_DTX_N1 SATA_RXN_1 PCIE_RXN_1 PCIE_PRX_DTX_N1 [29]
BB10 AT7 PCIE_PTX_DRX_P2 .1U_0402_16V7K 1 2 C1136
BC10 VSS_BB10 PCIE_TXP_2 AT6 PCIE_ATX_C_GRX_P0 [26]
Follow CRB V1.15 0ohm till to GND PCIE_PTX_DRX_N2 .1U_0402_16V7K 1 2 C1137
VSS_BC10 PCIE_TXN_2 PCIE_ATX_C_GRX_N0 [26]
PCIE LAN
SOC_SCI# BA12 AP12 PCIE_GTX_C_ARX_P0
[8] SOC_SCI# AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10 PCIE_GTX_C_ARX_P0 [26]
DEVSLP_SOC PCIE_GTX_C_ARX_N0
T188 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2 PCIE_GTX_C_ARX_N0 [26] +1.8VS
Follow CRB v1.15 SATA_LED#_SOC AY12
SATA_LED# / GPIO_S0_SC_2 AP6 PCIE_PTX_DRX_P3 .1U_0402_16V7K 1 2 C1140 RP51
PCIE_TXP_3 PCIE_PTX_C_DRX_P3 [27]
1 R972 2 SATA_RCOMPP AU18 AP4 PCIE_PTX_DRX_N3 .1U_0402_16V7K 1 2 C1079 LAN_CLKREQ# 1 8
AT18 SATA_RCOMP_P PCIE_TXN_3 PCIE_PTX_C_DRX_N3 [27] 2 7
402_0402_1% SATA_RCOMPN WLAN WLAN_CLKREQ#
SATA_RCOMP_N AP9 PCIE_PRX_DTX_P3 VGA_CLKREQ# 3 6
PCIE_RXP_3 PCIE_PRX_DTX_P3 [27]
AP7 PCIE_PRX_DTX_N3 Card_CLKREQ# 4 5
AT22 PCIE_RXN_3 PCIE_PRX_DTX_N3 [27]
MMC1_CLK / GPIO_S0_SC_16 BB7 10K_0804_8P4R_5%
AV20 VSS_BB7 BB5
MMC1_D0 / GPIO_S0_SC_17 VSS_BB5
Follow CRB V1.15 0ohm till to GND
AU22
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 VGA_CLKREQ#
AT20 MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 BD7 Card_CLKREQ#
MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 Card_CLKREQ# [29]
AY24 BG5 LAN_CLKREQ# Check OD pin or not in Device side
AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 LAN_CLKREQ# [26]
WLAN_CLKREQ#
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5 WLAN_CLKREQ# [27]
C
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7 C
MMC1_D7 / GPIO_S0_SC_24 AP14 PCIE_RCOMPP 1 R975 2
AV26 PCIE_RCOMP_P AP13 PCIE_RCOMPN 402_0402_1%
BA24 MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 BB4
AY18 RESERVED_BB4 BB3
MMC1_RCOMP RESERVED_BB3 RP46
AV10 HDA_SYNC 8 1 HDA_SYNC_AUDIO [28]
BA18 RESERVED_AV10 AV9 HDA_SDOUT 7 2
SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 HDA_SDOUT_AUDIO [28]
AY20 6 3
BD20 SD2_D0 / GPIO_S0_SC_28 BF20 HDA_RCOMP 49.9_0402_1% 1 2 R976 HDA_RST# 5 4
SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP HDA_RST_AUDIO# [28]
BA20 BG22 HDA_RST#
BD18 SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 BH20 HDA_SYNC 33_0804_8P4R_5%
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 BG20 HDA_SDOUT
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19 HDA_SDIN0 HDA_BIT_CLKR1032 1 2 33_0402_5%
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12 HDA_SDIN0 [28] HDA_BITCLK_AUDIO [28]
BG21
HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 T189
AY26 BH18
AT28 SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T190
BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T191
GPIO_S0_SC_63: GPIO_S0_SC_65:
AU28 SD3_D1 / GPIO_S0_SC_35 BF28
SD3_D2 / GPIO_S0_SC_36 LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62 BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
BA26 BA30 GPIO_S0_SC_63 BIOS Boot Selection 0 = Override
BC24 SD3_D3 / GPIO_S0_SC_37 LPE_I2S2_FRM / GPIO_S0_SC_63 BD28
AV28 SD3_CD# / GPIO_S0_SC_38 LPE_I2S2_DATAIN / GPIO_S0_SC_64 BC30 GPIO_S0_SC_65
0 = LPC 1 = Normal Operation
BF22 SD3_CMD / GPIO_S0_SC_39 LPE_I2S2_DATAOUT / GPIO_S0_SC_65 1 = SPI (Internal PU)
BD22 SD3_1P8EN / GPIO_S0_SC_40 P34 +1.8VS +1.8VS
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 R979 EC programing :
B B
BF26 RESERVED_N34 69.8_0402_1%
SD3_RCOMP "High"for Flash BIOS

1
AK9 1 2
RESERVED_AK9 +1.0VS
AK7
RESERVED_AK7 R977 R978 RS@
C24 10K_0402_5% 10K_0402_5% R1091
PROCHOT# H_PROCHOT# [33]
4 OF 10 Internal PD 2K 0_0402_5%

2
GPIO_S0_SC_63 GPIO_S0_SC_65 2 1
Check power rail FH8065301546401_FCBGA131170

1
+3VS D
2
+1.8VS ME_EN [33]
G
2

@ S Q62

3
R10 R980 BSS138W-7-F_SOT323-3
10K_0402_5% 10K_0402_5%
1 2
@
1

2
G

@
1 3 SATA_LED#_SOC
[32] SOC_SATALED#
D

Q63
BSS138W-7-F_SOT323-3

R200 2 RS@ 1 0_0402_5%


A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1

R151 2 GCLK@ 1 33_0402_5% +1.8VALW +1.8VS


GCLK_PCH_25MHZ [35]
XTAL_25M_IN +1.8VS +3VS
+1.8VALW
Place close to Y7 Check power rail

1
RS@

1
R981 NOGCLK@ +1.8VALW @
0_0402_5%

1
Y7 NOGCLK@ 1M_0402_5% +3VALW 0_0402_5%
25MHZ_10PF_7V25000014 @ R982 R1106 R1107

5
U53 4.7K_0402_5% R983

2
2
1 3 XTAL_25M_OUT 2 1.8V 1 3.3V 2.2K_0402_5%

2
1 3 R11 @ NC 4
1 1 PLT_RST_BUF# [26,27,29,33]

2
GND GND 10K_0402_5% C1085 PMC_PLTRST# 2 Y D40

.1U_0402_16V7K
A

C60
C1003 C1004 .1U_0402_16V7K 1 PMC_ACIN 2 1
2 4 1 VCIN1_AC_IN [32,33,39]
10P_0402_25V8K 10P_0402_25V8K ESD@ NL17SZ07DFT2G_SC70-5

3
2 2 SA00004BV00 RB751V40_SC76-2

ESD@
Change To 10pF for Vendor Suggest.

G
D 1 @ D
NOGCLK@ NOGCLK@ @ 2
0701
1 3 PMC_PCIE_WAKE# C520
[27] SOC_PCIE_WAKE# PLT_RST Buffer

S
100P_0402_50V8J
Q66 2 +1.8VALW
ESD@

2
G
BSS138W-7-F_SOT323-3
+1.8VALW +1.8VS
PMC_PLTRST# 3 1 PLT_RST_BUF#
SOC_KBRST# 10K_0402_5% 2 1 R992

D
USOC1E Q74 SOC_LID_OUT# 10K_0402_5% 2 1 R1033
BSS138W-7-F_SOT323-3 PMC_PWRBTN#10K_0402_5% 2 1 R1034

2
XTAL_25M_IN AH12 AU34 SOC_SMI# 10K_0402_5% 2 @1 R1097
XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34 SKU_Strap1 R1104 R1102 R1100
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 SKU_Strap2 SOC_SCI# 10K_0402_5% 2 1 R1036
SIO_UART1_RTS# / GPIO_S0_SC_72 10K_0402_5% 10K_0402_5% 10K_0402_5%
AD9 AY34 SKU_Strap3 E14@ B15@ DIS@ +1.8VALW
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 RP47 SOC_SCI# 10K_0402_5% 2 1 R1082

1
R984 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34 PMC_PCIE_WAKE# 1 8 @
R985 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34 PMC_BATLOW# 2 7
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 GPIO_S5_14 3 6 +1.8VALW +3VALW_EC
AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 LS_OE 4 5 U54
RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77

2
AD12 2 19
RESERVED_AD12 R1105 R1103 R1101 10K_0804_8P4R_5% VCCA VCCB
AF6 10K_0402_5% 10K_0402_5% 10K_0402_5% PMC_SLP_S3# 1 20
AF4 PCIE_CLKN_0 D26 3 A1 B1 18 EC_SLP_S3# [33,8]
B14@ B14@ UMA@ PMC_SLP_S4#
PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 4 A2 B2 17 EC_SLP_S4# [33,8]
PMC_SUSCLK T192 32.768k output SOC_KBRST#
EC_KBRST# [33,8]

1
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 SOC_LID_OUT# 5 A3 B3 16
[29] CLK_PCIE_Card# AF7 PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 F22 PMC_SUSCLK [27] 6 A4 B4 15 EC_LID_OUT# [33,8]
PMC_SLP_S4# SOC_SERIRQ
[29] CLK_PCIE_Card PCIE_CLKP_1 PMC_SLP_S4# D22 [9] SOC_SERIRQ 7 A5 B5 14 EC_SERIRQ [33,8]
Card PMC_SLP_S3# SOC_SMI#
PMC_SLP_S3# J20 GPIO_S5_14 SOC_SCI# 8 A6 B6 13
AK4 GPIO_S5_14 D20 [7] SOC_SCI# 9 A7 B7 12 EC_SCI# [33,8]
PMC_ACIN R1105 R1103 PMC_PWRBTN#
[26] CLK_PCIE_LAN# AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 A8 B8 PBTN_OUT# [33,8]
LAN PMC_PCIE_WAKE# 10K_0402_5% 10K_0402_5%
[26] CLK_PCIE_LAN PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 10 11
PMC_BATLOW# SD028100280 SD028100280 LS_OE
AM4 PMC_BATLOW# J26 PMC_PWRBTN# B15@ E14@ OE GND
[27] CLK_PCIE_WLAN# AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9
WLAN XDP_RSTBTN# T217 TXB0108PWR_TSSOP20
[27] CLK_PCIE_WLAN PCIE_CLKP_3 PMC_RSTBTN# F20 PMC_PLTRST# @
AM9 PMC_PLTRST# J24 GPIO_S5_17 T205
C RESERVED_AM9 GPIO_S5_17 C
AM10 G18
RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18
0901:for ESD change to 100pF
PDG v1.2 update PMC_SLP_S3# R1040 1 RS@ 2 0_0402_5%
C11 RTC_TEST# EC_SLP_S3# [33,8]
EC_RSMRST# 1 2 PMC_SLP_S4# R1041 1 RS@ 2 0_0402_5%
BH7 ILB_RTC_TEST# C12 RTC_RST# 1 2 EC_SLP_S4# [33,8]
R990 100K_0402_5% SOC_KBRST# R1042 RS@ 0_0402_5%
BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST# 1 2 EC_KBRST# [33,8]
SOC_LID_OUT# R1043 RS@ 0_0402_5%
BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 C513 EC_LID_OUT# [33,8]
BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# 1 2
BH6 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# B7 EC_RSMRST# [33] 1 RS@ 2 0_0402_5%
PMC_CORE_PWROK SOC_SCI# R1054
BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK 1 RS@ 2 0_0402_5% EC_SCI# [33,8]
PMC_PWRBTN# R1058
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS 100P_0402_50V8J PBTN_OUT# [33,8]
RTC domain
C9 ILB_RTC_X1 @ESD@ +3VALW_EC
XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2
TAP_TCK ILB_RTC_X2

1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2 Check power rail? +1.8VALW +1.8VALW
XDP_H_TMS F14 TAP_TRST# ILB_RTC_EXTPAD P22 C1008 R1064
TAP_TMS RTC_VCC_P22

1
XDP_H_TDI F12 .1U_0402_16V7K 73.2_0402_1%
TAP_TDI +RTCVCC RS@

1
XDP_H_TDO G16 R1031 @
TAP_TDO 0_0402_5%

1
XDP_H_PRDY# D18 1 @ R1093 2.2K_0402_5%

2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC R1065 1 2 20_0402_1% R1096 R1095 R1094
TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# [45] 2.2K_0402_5%
AT34 A25 VR_SVID_DATA_SOC R1066 1 2 16.9_0402_1% C153 U63 @ 0_0402_5% 10K_0402_5%
VR_SVID_DATA [45]

2
RESERVED_AT34 SVID_DATA C25 .1U_0402_16V7K 1 6 1 2
VR_SVID_CLK [45]

2
RP48 SOC_SPI_CS0# C23 SVID_CLK 2 VCCA VCCB

2
SPI_CS0# 1 8 SOC_SPI_CS0# T193 C21 PCU_SPI_CS_0# 2 5
SPI_MISO 2 7 SOC_SPI_MISO SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 GCLK@ GND EO
SPI_MOSI 3 6 SOC_SPI_MOSI SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 R148 2 1 0_0402_5% SOC_SERIRQ 3 4
4 5 C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 GCLK_32K [35] A B EC_SERIRQ [33,8]
SPI_CLK SOC_SPI_CLK SOC_SPI_CLK
PCU_SPI_CLK G2129TL1U_SC70-6
22_0804_8P4R_5%
EMI@ SOC_KBRST# B18 ILB_RTC_X1
Place close to Y8
B16 GPIO_S5_0 K24 ILB_RTC_X2
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 XDP_OBSDATA_A0 1 2
Close To SOC <1000mil GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23
T213
+1.8VALW A17 M20 XDP_OBSDATA_A1 T214 R994 NOGCLK@
SOC_LID_OUT# C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 XDP_OBSDATA_A2
GPIO_S5_4 GPIO_S5_25
T215 10M_0402_5% 0529 update
B R989 1 XDP@ 2 51_0402_5% XDP_H_PRDY# C16 M18 XDP_OBSDATA_A3 T216 B
B14 GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 K18 32.768KHZ_12.5PF_Q13FC135000040
C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 Y8 1 2
ESD@ C1086

RP52 SOC_SMI#
.1U_0402_16V7K

2 GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28


4 5 XDP_H_TDI M22 NOGCLK@
3 6 XDP_H_TMS GPIO_S5_29 M24 +3VALW +1.35VS
GPIO_S5_30 1 1
2 7 XDP_H_TCK
1 1 8 XDP_H_TRST# C13 C1009 C1010
GPIO_S5_8

1
A13 15P_0402_50V8J 15P_0402_50V8J
51_0804_8P4R_5% C19 GPIO_S5_9 AV32 2 2 R993
XDP@ GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28 10K_0402_5%
SIO_SPI_MISO / GPIO_S0_SC_67

5
AY28 NOGCLK@ NOGCLK@ U55
1 R995 2 GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30 1
Change To 15pF for Vendor Suggest. 3.3V 1.35V

2
49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69 NC 4
0701 Y DDR_CORE_PWROK [5]
2

@ESD@ C1083

@ESD@ C1084
100P_0402_50V8J

100P_0402_50V8J
[33] PMC_CORE_PWROK A 1 1

G
+1.8VALW FH8065301546401_FCBGA131170
NL17SZ07DFT2G_SC70-5

3
SA00004BV00
1

XDP_RSTBTN# 2 2
XDP@
R1024 1 @ 2 1 2
+1.8VALW
200_0402_5% R1025 C1075 XDP@
1K_0402_5% .1U_0402_16V7K +3VALW
2

XDP_H_PREQ_BUF# W=20mils trace width 10mil W=20mils


@ R986
0625 update +1.8VALW +RTCBATT +RTCVCC 10K_0402_5%
XDP@ 2 1
R1026 1 2 51_0402_5% XDP_H_TDO 1
+RTCVCC

2
G
C1011 R711 RS@
+BIOS_SPI +1.8VALW R996 1U_0402_6.3V6K 0_0402_5%
R998 20K_0402_1% 2 1 2 PMC_CORE_PWROK 3 1 DDR_CORE_PWROK

SPI ROM ( 8MByte ) 1.8V


RS@ 1 2 0_0402_5% 1 2 RTC_TEST#

D
+BIOS_SPI 1 2 RTC_RST# Q67
C1013 1 2 .1U_0402_16V7K R997 1 BSS138W-7-F_SOT323-3 @
20K_0402_1% 1 Check Intel
1

A U56 C151 @ A
1

R999 1 2 3.3K_0402_5% SPI_CS0# 1 8 R1000 1 2 3.3K_0402_5% C1012 SP@ SP@ .1U_0402_16V7K R1080 1 2 0_0402_5%
SPI_MISO 2 CS# VCC 7 SPI_HOLD# 1U_0402_6.3V6K CLRP1 CLRP2 2
2

R1001 1 2 3.3K_0402_5% SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK 2 SHORT PADS SHORT PADS
2

4 WP#(IO2) CLK 5 SPI_MOSI


GND DI(IO0)
Clear CMOS
RTC_RST
W25Q64DWSSIG_SO8 Reserve for EMI(Near SPI ROM) close to KB door

1 2 2 1 SPI_CLK @ Security Classification Compal Secret Data Compal Electronics, Inc.


C1014 @EMI@ R1002 @EMI@ RTC_TEST# R712 1 2 0_0402_5% RTC_RST# 2013/04/12 2014/04/12 Title
10P_0402_50V8J 33_0402_5%
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 8 of 47
5 4 3 2 1
5 4 3 2 1

+1.8VS +3VS +1.8VS +1.8VALW R991 Check power rail +1.8VS +1.8VS
10K_0402_5%
1 2

1
R16

1U_0402_6.3V6K
10K_0402_5% 2 R15 @ @

@ESD@
C1088
@ 10K_0402_5% R1110 R1090
0_0402_5% 0_0402_5% 1 2
1

1 2

2 2

2
1 10K_0402_5%

.1U_0402_16V7K
R987 10K_0402_5%

C62
G
1
ODD_EN_R R988
BT_OFF# 1 3 BT_OFF#_R DGPU_PWR_EN_R DGPU_HOLD_RST#_R

ESD@
D

S
Q75 2
DGPU_HOLD_RST#_R DGPU_PWR_EN_R BSS138W-7-F_SOT323-3
D D
1

@ @ USOC1F
R1035 R1044
10K_0402_5% 10K_0402_5% G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
2

DGPU_PWR_EN_R M3 P6
DGPU_HOLD_RST#_R L1 GPIO_S5_32 RESERVED_P6 P7
0_0402_5% 1 @ 2 R1051 BT_OFF#_R K2 GPIO_S5_33 RESERVED_P7
[27] BT_OFF# 1 2 K3 GPIO_S5_34
0_0402_5% R1079 ODD_EN_R
[31] ODD_EN M2 GPIO_S5_35 M7
@
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0 R1003
L3 GPIO_S5_38 P10 1.24K_0402_1%
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P [30]
B12 E3 PCH_USB3_RX0_N [30]
GPIO_S5_43 USB3_RXN0
K6
USB3 Port 0
M16 USB3_TXP0 K7 PCH_USB3_TX0_P [30]
[30] USB20_P0 K16 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N [30]
USB2 Port 0 (USB3.0 P0) [30] USB20_N0 USB_DN0
J14
[30] USB20_P1 G14 USB_DP1
Left USB Port [30] USB20_N1 USB_DN1
K12
[32] USB20_P2 J12 USB_DP2
Right USB Port [32] USB20_N2 USB_DN2
K10
[30] USB20_P3 H10 USB_DP3 H8
USB HUB [30] USB20_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
C C
1K_0402_1% 1 2 R1004 ICLK_USB_TERMP D10
1K_0402_1% 1 2 R1005 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS
RESERVED_H5
USB_OC0# C20
[30] USB_OC0# USB_OC_0# / GPIO_S5_19

1
USB_OC1# B20 @
[32] USB_OC1# USB_OC_1# / GPIO_S5_20 R1006
+1.8VALW 10K_0402_5%

R1007 1 2 10K_0402_5% USB_OC0# R1008 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:

2
R1009 1 2 10K_0402_5% USB_OC1# 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
BD14 DBG_UART_TXD T203
GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable

1
BC14 @
R1010 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 R1011 1 = Disable
USB_PLL_MON GPIO_S0_SC_59 BD16
0_0402_5% 10K_0402_5% Reference EDS Page 216
GPIO_S0_SC_60 BC16 DBG_UART_RXD T204
GPIO_S0_SC_61 / PCU_UART_RXD

2
B4
B5 USB_HSIC0_DATA BH12 HDA_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 HDA_SPKR [28]

E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
R1012 45.3_0402_1% USB_HSIC_RCOMP
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1%1 2 R1013 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
[33] LPC_AD0 BJ17 ILB_LPC_AD_0 / GPIO_S0_SC_42 BG25
[33] LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25
ILB_LPC_CLK_0 : Output of 25MHz, [33] LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
[33] LPC_AD3 BG17 ILB_LPC_AD_3 / GPIO_S0_SC_45
B [33] LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46 B
22_0402_5% 1 EMI@ 2 R1014 LPC_CLK_0 BG15 BG26
[33] LPC_CLK_EC BH14 ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84 BH26
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage LPC_CLKRUN# BG16
BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
[8] SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
SIO_I2C4_CLK / GPIO_S0_SC_87
+3VS
BH28 SOC_I2C0_DATA T207
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C0_CLK T208
PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89
2

PCU_SMB_CLK BH10
PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
R1016 Check Intel for PU PCU_SMB_ALERT# / GPIO_S0_SC_53
8.2K_0402_5% 2 1 LPC_CLK_0 BJ29
SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
C1015 @EMI@
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
0705 : Reserved
10P_0402_50V8J
1

LPC_CLKRUN#
BH30 GPIO_S0_SC_92 T201
GPIO_S0_SC_092 BG30 GPIO_S0_SC_93
GPIO_S0_SC_093
T202 PDA (Platform Debug Assistant) Test Points
6 OF 13

FH8065301546401_FCBGA131170

+1.8VS +1.8VS
RP49
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
8 1
A Pull High at EC side A
4.7K_0804_8P4R_5%
2
G

1 3 PCU_SMB_CLK
[13,14,31,33] EC_SMB_CK2
DDR(15,16) Q64
D

S
2
G

BSS138W-7-F_SOT323-3
Minicard(21)
1 3 PCU_SMB_DATA
EC(24) [13,14,31,33] EC_SMB_DA2
Q65
Compal Electronics, Inc.
D

BSS138W-7-F_SOT323-3 Security Classification Compal Secret Data


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Thursday, February 20, 2014 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1

For EVT measurement +1.35V


12A +SOC_VCC USOC1G 20mil JP3 JP@
AA27 AD38 DRAM_VDD_S4_CLK R1017 1 EMI@ 2 BLM15AX601SN1D
AA29 CORE_VCC_S0iX_AA27 DRAM_VDD_S4_AD38 AF38
AA30 CORE_VCC_S0iX_AA29 DRAM_VDD_S4_AF38 JUMP_43X118
AC27 CORE_VCC_S0iX_AA30 A48 C1017 1 2 1U_0402_6.3V6K JP4 JP@
CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48

MPZ2012S101AT000_2P 1U_0402_6.3V6K

MPZ2012S101AT000_2P 1U_0402_6.3V6K
D AC29 AK38 C1018 1 2 .1U_0402_16V7K 2 2 D
CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38

@EMI@

@EMI@
AC30 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42
1250mA
1 1

C1089

C1090
AD29 BB46
AD30 CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 BD49 +1.35V_SOC
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53

1
AG27 BF44 +1.35V_SOC
CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44

@EMI@

@EMI@
AG29 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 C1019 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 C1020 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 C1021 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 C1022 2 1 2.2U_0402_6.3V6M

2
CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49

L50
U29 F52
CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52

L51
V27 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 C1147 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 V38 C1148 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38

T194 TP2_CORE_VCC_S0iX AA22


TP2_CORE_VCC_S0iX
14A +SOC_VNN +1.35VS
C
420mA C
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30
UNCORE_VNN_S3_AK29
0708:Change Size
AK27 BD1 VGA_V1P35_S3_F1 1 2 1226:Change to 1 ohm
AK25 UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1 L49 BLM15AG601SN1D_2P
AK24 UNCORE_VNN_S3_AK25
AK22 UNCORE_VNN_S3_AK24 C1023 1 2 10U_0603_6.3V6M
UNCORE_VNN_S3_AK22
0705 : For CRT Flicker
AJ24 AD36 C1182 1 2 10U_0603_6.3V6M
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0iX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0iX_F2_AG32 V36
AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0iX_F3_V36 U36
UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0iX_F4_U36
0715 Add for CRT fliker
AF22 +3VALW
UNCORE_VNN_S3_AF22
1

AD22 AA25 U65 @


AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0iX_F5_AA25 VGA_V1P35_S3_F1 5 1
R1018 R1019 AC22 UNCORE_VNN_S3_AC24 OUT IN
UNCORE_VNN_S3_AC22

1
100_0402_1% 100_0402_1% AA24 2 1
AD24 UNCORE_VNN_S3_AA24 @ GND @
2

UNCORE_VNN_S3_AD24 R1084 4 3 C1179


AF19 C1024 1 2 10U_0603_6.3V6M 8.06K_0402_1% BYP SHDN
UNCORE_V1P35_S0iX_F6_AF19 1U_0402_6.3V6K
BB8 AG19 C1025 1 2 1U_0402_6.3V6K G916T1UF_SOT23-5 2
[45] VGFX_VSNS

2
P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19 C1026 1 2 1U_0402_6.3V6K
[45] VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 C1027 1 2 1U_0402_6.3V6K
[45] VCORE_GSNS CORE_VSS_SENSE_N28

1
C1028 1 2 1U_0402_6.3V6K @
1

C1029 1 2 1U_0402_6.3V6K
B FH8065301546401_FCBGA131170 C1030 1 2 1U_0402_6.3V6K R1085 B
R1020 C1031 1 2 1U_0402_6.3V6K 100K_0402_1%
100_0402_1% C1032 1 2 1U_0402_6.3V6K

2
C1033 1 2 1U_0402_6.3V6K
2

@
2 1
[33,34,41,43] SUSP#
R1087 1
36K_0402_5%
C1181 @
.1U_0402_16V7K
VOUT = 1.25 (1 + R1/R2). 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 10 of 47
5 4 3 2 1
5 4 3 2 1

D D

Follow CRBv1.15
USOC1H +1.05VS
325mA 1000mA
U22 AC32 +1.05VS_SOC R1021 1 RS@ 2 0_0402_5%
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C1040 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C1042 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 1 2 AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
C1046 1U_0402_6.3V6K
DRAM_V1P0_S0iX_AJ36
65mA PMU_V1P8_G3_U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
AK36 DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
1 2 Y36 DRAM_V1P0_S0iX_Y35
C1048 1U_0402_6.3V6K
DRAM_V1P0_S0iX_Y36
10mA
C1049 1 2 1U_0402_6.3V6K AK19 AM30
C DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4 C

C1052 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0iX_AK21 UNCORE_V1P8_S3_AN32 U38 C1053 1 2 1U_0402_6.3V6K


AM16 DDI_V1P0_S0iX_AJ18 UNCORE_V1P8_S3_U38 C1054 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0iX_AM16 C1055 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
58mA
C1056 1 2 10U_0603_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 10uF*3 C1057 1 2 10U_0603_6.3V6M Y22 VIS_V1P0_S0iX_V24 HDA_V1P5_S3_AM32 C1058 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C1059 1 2 10U_0603_6.3V6M Y24 VIS_V1P0_S0iX_Y22 +3VALW
C1060 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0iX_Y24
C1061 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 1 2 For EVT measurement
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R1022 RS@ 0_0603_5%
PCIE_SATA_V1P0_S3 1uF*1 C1062 1 2 1U_0402_6.3V6K G1 N18 C1063 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C1064 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C1065 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C1066 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C1067 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C1068 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 C1069 1 2 AN21 PCIE_V1P0_S3_AM21
.1U_0402_16V7K 33mA
USB3DEV_V1P0_S3 0.01uF*1
GPIO_V1P0_S3 1uF*1
SVID_V1P0_S3 1uF*1
C1070 1
C1071 1
C1072 1
2
2
2
0.01U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
AN18
AN19
AF21
PCIE_V1P0_S3_AN21
PCIE_SATA_V1P0_S3_AN18
SATA_V1P0_S3_AN19
VGA_V3P3_S3_AN24
AN24 +3VS_SOC

AN27
R1023
1
RS@
2 For EVT measurement
0_0603_5% 1
.1U_0402_16V7K
ESD
@ESD@ C1081 1 2 .1U_0402_16V7K AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27 C1093
@ESD@ C1082 1 2 .1U_0402_16V7K M14 UNCORE_V1P0_S0iX_AG21 AM27 1 2 VGA_V3P3_S3 1uF*1
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 C1073 1U_0402_6.3V6K 2
U19 USB_V1P0_S3_U18
AN25 USB_V1P0_S3_U19 +1.0VALW
GPIO_V1P0_S3_AN25
35mA
V18 USB_HSIC_V1P2_G3 1uF*1
USB_HSIC_V1P2_G3_V18 C1074 1 2 1U_0402_6.3V6K Disable HSIC
B @ If the USB HSIC is not used, pin V18 can be connected B
F1 AD16 Pop when use +1.2VALW
RESERVED_F1 VSS_AD16 AD18 to either +V1P2A or +V1P0A.
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Thursday, February 20, 2014 Sheet 11 of 47
5 4 3 2 1
5 4 3 2 1

D D

USOC1I USOC1J USOC1K USOC1L USOC1M

A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3


A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
AA16 VSS_AA1 VSS_AE11 AE12 AJ29 VSS_AJ27 VSS_AN12 AN14 AU30 VSS_AU3 VSS_BA40 BA53 BJ19 VSS_BJ15 VSS_G20 G22 M47 VSS_M38 VSS_U5 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
C
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9 C
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
AB51 VSS_AB50 VSS_AE8 AE9 AM19 VSS_AM12 VSS_AN5 AN51 AV7 VSS_AV51 VSS_BD30 BD35 C49 VSS_C45 VSS_J32 J35 P47 VSS_P4 VSS_Y10 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B2 VSS_AC35 9 OF 13VSS_AG36 B52 VSS_M28 10 OF 13 VSS_AT19 VSS_AY32 11 OF 13
VSS_BF38 VSS_E35 12 OF 13 VSS_K50 VSS_U21 13 OF 13 VSS_Y9
A6 VSS_B2 VSS_B52 B53
A52 VSS_A6 VSS_B53 BE1 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
A51 VSS_A52 VSS_BE1 BE53
A5 VSS_A51 VSS_BE53 BG1
A49 VSS_A5 VSS_BG1 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
B B
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BH2 VSS_BH52 VSS_BJ49 BJ51
BH1 VSS_BH2 VSS_BJ51 BJ52
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16

FH8065301546401_FCBGA131170

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date VLV-M SOC GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 12 of 47
5 4 3 2 1
A B C D E

+DDR_A_VREF_DQ +1.35V ME@ +1.35V Signal voltage level = 0.675 V


JDIMM1 PLACE TWO 4.7K RESISTORS CLOSE TO
1 2
3 VREF_DQ VSS 4 DDR_A_D4 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
5 VSS DQ4 6 DDR_A_DQS#[0..7] [5] Decoupling caps are needed; one 0.1 F placed close to VREF pins of each DDR3 SODIMM.
DDR_A_D0 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS[0..7] [5]
DDR_A_DQS#0
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14 DDR_A_D[0..63] [5]
DDR_A_D2 15 VSS VSS 16 DDR_A_D6 +1.35V +DDR_A_VREF_DQ
17 DQ2 DQ6 18 DDR_A_MA[0..15] [5]
DDR_A_D3 DDR_A_D7
19 DQ3 DQ7 20 1 2
21 VSS VSS 22 DDR_A_DM[0..7] [5]
DDR_A_D8 DDR_A_D12 R1027
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 4.7K_0402_1%
DQ9 DQ13 1
25 26 1 2
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1 R1028 C1076
1 DQS1# DM1 1
DDR_A_DQS1 29 30 DDR_A_RST# [5] 4.7K_0402_1% .1U_0402_16V7K
31 DQS1 RESET# 32 2
DDR_A_D10 33 VSS VSS 34 DDR_A_D14 @ESD@
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15 DDR_A_RST# 1 2
37 DQ11 DQ15 38 C1077
DDR_A_D16 39 VSS VSS 40 DDR_A_D20 .1U_0402_16V7K
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 +1.35V +DDR_A_VREF_CA
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2 1 2
DDR_A_DQS2 47 DQS2# DM2 48 R1029
49 DQS2 VSS 50 DDR_A_D22 4.7K_0402_1%
VSS DQ22 1
DDR_A_D18 51 52 DDR_A_D23 FOR EMI/ESD Require 01/15 1 2
DDR_A_D19 53 DQ18 DQ23 54 R1030 C1078
55 DQ19 VSS 56 DDR_A_D28 4.7K_0402_1%
All VREF traces should DDR_A_D24 57 VSS DQ28 58 DDR_A_D29 2
.1U_0402_16V7K
Layout Note: have 10 mil trace width DDR_A_D25 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS 62 DDR_A_DQS#3
DDR_A_DM3 63 VSS DQS3# 64 DDR_A_DQS3
65 DM3 DQS3 66
DDR_A_D26 67 VSS VSS 68 DDR_A_D30
+1.35V DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
C111 1 2 10U_0603_6.3V6M VSS VSS
C112 1 2 10U_0603_6.3V6M
C113 1 2 10U_0603_6.3V6M 73 74
[5] DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 [5]
C114 1 2 10U_0603_6.3V6M 75 76
77 VDD VDD 78 DDR_A_MA15
79 NC A15 80 DDR_A_MA14
[5] DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
C110 1 2 .1U_0402_16V7K 87 A9 A7 88
C109@1 2 .1U_0402_16V7K DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
C108 1 2 .1U_0402_16V7K DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
C107 1 2 .1U_0402_16V7K 93 A5 A4 94
2 VDD VDD 2
C115 1 2 .1U_0402_16V7K DDR_A_MA3 95 96 DDR_A_MA2
C116 1 2 .1U_0402_16V7K DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
C117@1 2 .1U_0402_16V7K 99 A1 A0 100
C164 1 2 .1U_0402_16V7K 101 VDD VDD 102
[5] DDR_A_CLK0 CK0 CK1 DDR_A_CLK2 [5]
103 104
[5] DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# [5]
105 106
DDR_A_MA10 107 VDD VDD 108
A10/AP BA1 DDR_A_BS1 [5]
109 110
[5] DDR_A_BS0 BA0 RAS# DDR_A_RAS# [5]
111 112
113 VDD VDD 114
0604 Change for layout space limit [5] DDR_A_WE# WE# S0# DDR_A_CS0# [5]
115 116
[5] DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 [5]
117 118
DDR_A_MA13 119 VDD VDD 120
121 A13 ODT1 122 DDR_A_ODT2 [5]
[5] DDR_A_CS2# S1# NC
123 124
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
DDR_A_D32 129 VSS VSS 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
133 DQ33 DQ37 134
DDR_A_DQS#4 135 VSS VSS 136 DDR_A_DM4
DDR_A_DQS4 137 DQS4# DM4 138
139 DQS4 VSS 140 DDR_A_D38
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_A_D44
DDR_A_D40 147 VSS DQ44 148 DDR_A_D45
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS 152 DDR_A_DQS#5
DDR_A_DM5 153 VSS DQS5# 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS VSS 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
+0.675VS DDR_A_D48 163 VSS VSS 164 DDR_A_D52
3 DQ48 DQ52 3
DDR_A_D49 165 166 DDR_A_D53
C123 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6
DDR_A_DQS6 171 DQS6# DM6 172
C124 1 2 1U_0402_6.3V6K 173 DQS6 VSS 174 DDR_A_D54
C122@1 2 1U_0402_6.3V6K DDR_A_D50 175 VSS DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_A_D60
DDR_A_D56 181 VSS DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
DDR_A_DM7 187 VSS DQS7# 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D58 191 VSS VSS 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
Layout Note: 197 VSS VSS 198
Place near JDIMM1.203,204 +3VS
199 SA0 EVENT# 200
201 VDDSPD SDA 202 EC_SMB_DA2 [14,31,33,9]
203 SA1 SCL 204 EC_SMB_CK2 [14,31,33,9]
+0.675VS VTT VTT +0.675VS
205 206
207 GND1 GND2 208
1 BOSS1 BOSS2
Channel A
2

C125
.1U_0402_16V7K R211 R212 TYCO_2-2013022-1
2 0_0402_5% 0_0402_5% Part Number = SP07000JN10
RS@ RS@ PCB Footprint = TYCO_2-2013022-1_204P
1

<Address: SA1:SA0=00 (A0H)>


4
DIMM_1 STD H:4mm 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 13 of 47
A B C D E
A B C D E

+DDR_B_VREF_DQ +1.35V ME@ +1.35V


JDIMM2
1 2
3 VREF_DQ VSS1 4 DDR_B_D4
5 VSS2 DQ4 6 DDR_B_DQS#[0..7] [5]
DDR_B_D0 DDR_B_D5
DDR_B_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_B_DQS[0..7] [5] +1.35V +DDR_B_VREF_DQ
DDR_B_DQS#0
DDR_B_DM0 11 VSS4 DQS#0 12 DDR_B_DQS0
13 DM0 DQS0 14 DDR_B_D[0..63] [5] 1 2
DDR_B_D2 15 VSS5 VSS6 16 DDR_B_D6 R1069
17 DQ2 DQ6 18 DDR_B_MA[0..15] [5]
DDR_B_D3 DDR_B_D7 4.7K_0402_1% 1
19 DQ3 DQ7 20 1 2
21 VSS7 VSS8 22 DDR_B_DM[0..7] [5]
DDR_B_D8 DDR_B_D12 R1067 C128
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13 4.7K_0402_1%
DQ9 DQ13 .1U_0402_16V7K
25 26 2
DDR_B_DQS#1 27 VSS9 VSS10 28 DDR_B_DM1
1 DQS#1 DM1 1
DDR_B_DQS1 29 30 DDR_B_RST# [5]
31 DQS1 RESET# 32
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15 @ESD@ +1.35V +DDR_B_VREF_CA
37 DQ11 DQ15 38 DDR_B_RST# 1 2
DDR_B_D16 39 VSS13 VSS14 40 DDR_B_D20 C84 1 2
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21 .1U_0402_16V7K R1070
43 DQ17 DQ21 44 4.7K_0402_1%
VSS15 VSS16 1
DDR_B_DQS#2 45 46 DDR_B_DM2 FOR EMI/ESD Require 01/15 1 2
DDR_B_DQS2 47 DQS#2 DM2 48 R1068 C142
49 DQS2 VSS17 50 DDR_B_D22 4.7K_0402_1%
VSS18 DQ22 .1U_0402_16V7K
DDR_B_D18 51 52 DDR_B_D23 2
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
All VREF traces should DDR_B_D24 57 VSS20 DQ28 58 DDR_B_D29
Layout Note: have 10 mil trace width DDR_B_D25 59 DQ24 DQ29 60
Place near JDIMM2 61 DQ25 VSS21 62 DDR_B_DQS#3
DDR_B_DM3 63 VSS22 DQS#3 64 DDR_B_DQS3
65 DM3 DQS3 66
DDR_B_D26 67 VSS23 VSS24 68 DDR_B_D30
+1.35V DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
71 DQ27 DQ31 72
C133 1 2 10U_0603_6.3V6M VSS25 VSS26
C134 1 2 10U_0603_6.3V6M
C135 1 2 10U_0603_6.3V6M
C136 1 2 10U_0603_6.3V6M 73 74
[5] DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE2 [5]
75 76
77 VDD1 VDD2 78 DDR_B_MA15
79 NC1 A15 80 DDR_B_MA14
[5] DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
C129 1 2 .1U_0402_16V7K DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
C130 1 2 .1U_0402_16V7K 87 A9 A7 88
C131 1 2 .1U_0402_16V7K DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
C132 1 2 .1U_0402_16V7K DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
2 A5 A4 2
C137@1 2 .1U_0402_16V7K 93 94
C138 1 2 .1U_0402_16V7K DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
C139@1 2 .1U_0402_16V7K DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
101 VDD9 VDD10 102
[5] DDR_B_CLK0 CK0 CK1 DDR_B_CLK2 [5]
103 104
[5] DDR_B_CLK0# CK0# CK1# DDR_B_CLK2# [5]
105 106
DDR_B_MA10 107 VDD11 VDD12 108
A10/AP BA1 DDR_B_BS1 [5]
109 110
[5] DDR_B_BS0 BA0 RAS# DDR_B_RAS# [5]
111 112
113 VDD13 VDD14 114
[5] DDR_B_WE# WE# S0# DDR_B_CS0# [5]
115 116
[5] DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 [5]
117 118
DDR_B_MA13 119 VDD15 VDD16 120
A13 ODT1 DDR_B_ODT2 [5]
121 122
[5] DDR_B_CS2# S1# NC2
123 124
125 VDD17 VDD18 126
NCTEST VREF_CA +DDR_B_VREF_CA
127 128
DDR_B_D32 129 VSS27 VSS28 130 DDR_B_D36
DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37
133 DQ33 DQ37 134
DDR_B_DQS#4 135 VSS29 VSS30 136 DDR_B_DM4
DDR_B_DQS4 137 DQS#4 DM4 138
139 DQS4 VSS31 140 DDR_B_D38
DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39
DDR_B_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D40 147 VSS34 DQ44 148 DDR_B_D45
DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#5
DDR_B_DM5 153 VSS36 DQS#5 154 DDR_B_DQS5
155 DM5 DQS5 156
DDR_B_D42 157 VSS37 VSS38 158 DDR_B_D46
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
+0.675VS 161 DQ43 DQ47 162
3 VSS39 VSS40 3
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
C143 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
DDR_B_DQS#6 169 VSS41 VSS42 170 DDR_B_DM6
DDR_B_DQS6 171 DQS#6 DM6 172
173 DQS6 VSS43 174 DDR_B_D54
C145 1 2 1U_0402_6.3V6K DDR_B_D50 175 VSS44 DQ54 176 DDR_B_D55
C146@1 2 1U_0402_6.3V6K DDR_B_D51 177 DQ50 DQ55 178
+3VS 179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D56 181 VSS46 DQ60 182 DDR_B_D61
DDR_B_D57 183 DQ56 DQ61 184
DQ57 VSS47
2

185 186 DDR_B_DQS#7


R229 DDR_B_DM7 187 VSS48 DQS#7 188 DDR_B_DQS7
10K_0402_5% 189 DM7 DQS7 190
DDR_B_D58 191 VSS49 VSS50 192 DDR_B_D62
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
Layout Note:
1

195 DQ59 DQ63 196


Place near JDIMM2.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 [13,31,33,9]
201 202
203 SA1 SCL 204 EC_SMB_CK2 [13,31,33,9]
+0.675VS VTT1 VTT2 +0.675VS
205 206
G1 G2
2

1
C147
.1U_0402_16V7K
R231
0_0402_5%
TYCO_2-2013287-1
Part Number = SP07000KW00
Channel B
2 RS@ PCB Footprint = TYCO_2-2013287-1_204P
1

SA0/SA1 Follow INTEL demo board <Address: SA0:SA1=10 (A2H)>


4 4

DIMM_2 REV H:4mm

Security Classification Compal Secret Data Compal Electronics, Inc.


2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 14 of 47
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(1/5)-PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A721P
Date: Tuesday, February 18, 2014 Sheet 15 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification
2011/07/15
Compal Secret Data
2012/07/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(2/5)-IFP_ABCDEF_DAC_XTAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 16 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(3/5)-POWER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A721P
Date: Tuesday, February 18, 2014 Sheet 17 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(4/5)-GPIO/Strap
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-A721P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 18 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification
2011/07/15
Compal Secret Data
2012/07/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(2/5)-MEMORY FBA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 19 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification
2011/07/15
Compal Secret Data
2012/07/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DGPU_DC/DC Interface
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 20 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification
2011/07/15
Compal Secret Data
2012/07/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM_DDR3_A Lower
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 21 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification
2011/07/15
Compal Secret Data
2012/07/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM_DDR3_A Upper
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 22 of 47
5 4 3 2 1
A B C D E

LCD POWER CIRCUIT


+3VS
+LCDVDD
U8
W=60mils
W=60mils 5 1
IN OUT
2 1
GND
1 4 3 C367
EN OC 4.7U_0603_6.3V6K
C140 SY6288C20AAC_SOT23-5 2
1 1U_0402_6.3V6K 1
2

[6] ENVDD

R1089 1 RS@ 2 0_0402_5%


[33] EC_ENVDD

[6] BKOFF#
R118 1 @ 2 0_0402_5% DISPOFF# LCD/ LED PANEL Conn.

2
R120 1 2 0_0402_5%
[33] EC_BKOFF#
RS@ R119
+LCDVDD 100K_0402_1%
+INVPWR_B+ B+

1
1
+1.8VS @ W=60mils W=60mils
R1063
100K_0402_5% R122 1 RS@ 2 0_0805_5%
1

EDP_AUXN_C 2
R383 EDP_AUXP_C 1 SM010014520 3000ma
10K_0402_5% @
2 220ohm@100mhz 2
1

C149
2

@ DCR 0.04
4.7U_0805_25V6-K
[6] EDP_HPD# 2
R1062
1

100K_0402_5%
D
2

Q13 2 EDP_HPD_CONN
2N7002K_SOT23-3 G
1

S
3

R364 Intel recommends having a pull-up JLVDS1


100K_0402_5% resistor of 100 k for AUXN and a 1
2 1 41
pull-down resistor of 100 k for AUXP
2

3 2 G1 42
between the AC capacitor and the 4 3 G2 43
5 4 G3 44
connector, to assist source detection
6 5 G4 45
by the sink device. 6 G5
7 46
[6] INVT_PWM_SOC 8 7 G6
DISPOFF#
EDP_HPD_CONN 9 8
10 9
W=60mils 11 10
+LCDVDD 11
12
13 12
14 13
eDP C377 1 2 .1U_0402_16V7K EDP_AUXN_C 15 14

+3VS
Camera +3VS_CMOS
[6]
[6]
EDP_AUXN
EDP_AUXP C376 1 2 .1U_0402_16V7K EDP_AUXP_C 16
17
15
16
C371 1 2 .1U_0402_16V7K EDP_TXP0_C 18 17
[6] EDP_TXP0 18
C372 1 2 .1U_0402_16V7K EDP_TXN0_C 19
[6] EDP_TXN0 20 19
CMOS@
Q4 FHD@ C373 1 2 .1U_0402_16V7K EDP_TXP1_C 21 20
1U_0402_6.3V6K

DMG2301U-7 1P SOT23-3 [6] EDP_TXP1 21


2 W=20mils FHD@ C374 1 2 .1U_0402_16V7K EDP_TXN1_C 22
[6] EDP_TXN1 22
@ESD@

23
C1087

W=20mils 3 1 R1015 1 2 0_0603_5% 24 23


S

TS_DETECT
RS@ 25 24
3 1 1 25 3
1 CMOS@ 26
C148 C144 @ 27 26
G
2

.1U_0402_16V7K 10U_0603_6.3V6M 28 27
R114CMOS@ 2 2 USB20_TS_P0_R 29 28
150K_0402_5% USB20_TS_N0_R 30 29
4.7V 31 30
[33] CMOS_ON# Touch Screen R1039 1 B14@ 2 0_0402_5% 32 31
[33] TS_DISABLE# R270 1 B14@ 2 0_0603_5% +3VS_TS 33 32
1 +3VS 33
+3VS_CMOS
34
C141 CMOS@ USB20_CAM_N2_R 35 34
.1U_0402_16V7K USB20_CAM_P2_R 36 35
2 37 36
Camera 38 37
DMIC [28] DMIC_CLK 39 38
[28] DMIC_DAT 40 39
+3VS 40
E-T_0871K-F40N-00L
ME@
SP010011Z00
+3VS R1039 R270
0_0402_5% 0_0603_5%
R125 2 RS@ 1 0_0402_5% B15@ B15@

1
@ @
4 L6 3 USB20_TS_N0_R R384 R385 @
[30] USB20_TS_N0 4 3 10K_0402_5% 10K_0402_5%
Camera

2
1 2 USB20_TS_P0_R TS_DISABLE# TS_DETECT
[30] USB20_TS_P0 1 2
WCM-2012HS-900T

R127 2 RS@ 1 0_0402_5%


4 4

R134 2 RS@ 1 0_0402_5%

@
4 L7 3 USB20_CAM_P2_R
[30] USB20_CAM_P2 4 3
Touch Screen
Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 USB20_CAM_N2_R 2013/04/12 2014/04/12 Title
[30] USB20_CAM_N2 1 2 Issued Date Deciphered Date
WCM-2012HS-900T
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R135 2 RS@ 1 0_0402_5% Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 23 of 47
A B C D E
A B C D E

Near HDMI CONN

+1.8VS
[6] HDMI_TX1- C381 2 1 .1U_0402_16V7K HDMI_C_TX1- R1071 1 2 619_0402_1%
[6] HDMI_TX1+ C382 2 1 .1U_0402_16V7K HDMI_C_TX1+ R1072 1 2 619_0402_1%

1
C379 2 1 .1U_0402_16V7K HDMI_C_TX2- R1073 1 2 619_0402_1% +5VS +HDMI_5V_OUT
[6] HDMI_TX2-
[6] HDMI_TX2+ C380 2 1 .1U_0402_16V7K HDMI_C_TX2+ R1074 1 2 619_0402_1% W=40mils R376

HDMI_GND
10K_0402_5%
C383 2 1 .1U_0402_16V7K HDMI_C_TX0- R1075 1 2 619_0402_1%
[6] HDMI_TX0-
C384 2 1 .1U_0402_16V7K HDMI_C_TX0+ R1076 1 2 619_0402_1%
[6] HDMI_TX0+ U52

2
[6] HDMI_CLK- C385 2 1 .1U_0402_16V7K HDMI_C_CLK- R1077 1 2 619_0402_1% [6] HDMI_HPD#
[6] HDMI_CLK+ C386 2 1 .1U_0402_16V7K HDMI_C_CLK+ R1078 1 2 619_0402_1%

6
1
3 1
OUT Q14B
D
2 HDMI_HPD
1
G

1 DMN66D0LDW-7_SOT363-6 S
IN

1
C378

1
5 2
D

+3VS
G Q14A .1U_0402_16V7K R121
DMN66D0LDW-7_SOT363-6 GND 2
S
100K_0402_5%

4
AP2330W-7_SC59-3

2
R136 @ 0_0402_5%
For EMI
1 2

SM070001S10
L8 HDMI@
HDMI_C_CLK+ 1 2 HDMI_R_CK+
1 2

HDMI_C_CLK- 4 3 HDMI_R_CK-
4 3
WCM-2012HS-900T 2 2
R137 0_0402_5% C1002 C1001
1 2 33P_0402_50V8J 33P_0402_50V8J
@ 1 1
@EMI@ @EMI@

+1.8VS 0822 Changed


RP15
2 R138 0_0402_5% 2
HDMI_DDCDATA 5 4 +HDMI_5V_OUT 1 2
HDMI_DDCCLK 6 3 @ HDMI connector
HDMI_SDATA 7 2 SM070001S10 JHDMI1
HDMI_SCLK 8 1 L9 HDMI@ HDMI_HPD 19
HDMI_C_TX0+ 1 2 HDMI_R_D0+ 18 HP_DET
1 2 +HDMI_5V_OUT +5V
2.2K_0804_8P4R_5% 17
16 DDC/CEC_GND

C1106

C1107
HDMI_SDATA
HDMI_C_TX0- 4 3 HDMI_R_D0- HDMI_SCLK 15 SDA
4 3 2 2 SCL

@EMI@

@EMI@
14
WCM-2012HS-900T 13 Reserved
2 2 CEC
R139 0_0402_5% HDMI_R_CK- 12 20

.1U_0402_16V7K

.1U_0402_16V7K
+1.8VS 1 2 C1006 C1005 1 1 11 CK- GND 21
@ HDMI_R_CK+ 10 CK_shield GND 22
33P_0402_50V8J 33P_0402_50V8J CK+ GND
1 1 HDMI_R_D0- 9 23
@EMI@ @EMI@ D0- GND
8
.1U_0402_16V7K

D0_shield
C61

1 HDMI_R_D0+ 7
HDMI_R_D1- 6 D0+
R140 0_0402_5% 5 D1-
D1_shield
ESD@

1 2 HDMI_R_D1+ 4
2 @ HDMI_R_D2- 3 D1+
D2-
2
G

2
SM070001S10 HDMI_R_D2+ 1 D2_shield
3 1 HDMI_SCLK L10 HDMI@ D2+
[6] HDMI_DDCCLK 1 2
Q57 HDMI_C_TX1+ HDMI_R_D1+ CONCR_099ATAC19NBLCNF
S

1 2
2
G

BSS138W-7-F_SOT323-3
DC232001K00
3 1 HDMI_SDATA HDMI_C_TX1- 4 3 HDMI_R_D1-
[6] HDMI_DDCDATA 4 3
Q58
S

BSS138W-7-F_SOT323-3 WCM-2012HS-900T ME@


2 2
R141 0_0402_5% C1016 C1007
1 2 33P_0402_50V8J 33P_0402_50V8J
@ 1 1
@EMI@ @EMI@

3 R142 0_0402_5% 3
1 2
@

SM070001S10
L12 HDMI@
HDMI_C_TX2+ 1 2 HDMI_R_D2+
1 2

HDMI_C_TX2- 4 3 HDMI_R_D2-
4 3
WCM-2012HS-900T 2 2
R143 0_0402_5% C1092 C1091
1 2 33P_0402_50V8J 33P_0402_50V8J
@ 1 1
@EMI@ @EMI@

ESD
E14@ D1 E14@ D5 E14@ D3
HDMI_SDATA 9 10 1 1 HDMI_SDATA HDMI_R_CK- 9 10 1 1 HDMI_R_CK- HDMI_R_D0- 9 10 1 1 HDMI_R_D0-

HDMI_SCLK 8 9 2 2 HDMI_SCLK HDMI_R_CK+ 8 9 2 2 HDMI_R_CK+ HDMI_R_D0+ 8 9 2 2 HDMI_R_D0+

HDMI_HPD 7 7 4 4 HDMI_HPD HDMI_R_D1- 7 7 4 4 HDMI_R_D1- HDMI_R_D2- 7 7 4 4 HDMI_R_D2-

6 6 5 5 HDMI_R_D1+ 6 6 5 5 HDMI_R_D1+ HDMI_R_D2+ 6 6 5 5 HDMI_R_D2+

3 3 3 3 3 3

8 8 8

4 YSCLAMP0524P_SLP2510P8-10-9 YSCLAMP0524P_SLP2510P8-10-9 YSCLAMP0524P_SLP2510P8-10-9 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 24 of 47
A B C D E
A B C D E

+HDMI_5V_OUT

W=40mils
1
0822 Changed
07/05 : HSYNC ripple C450
.1U_0402_16V7K
2
Video Filter
JCRT1
L42 EMI@ 6
1 77MHz@1920x1200x60Hz SM01000FH00 BLM15BB470SN1D_2P 11 1
1 2 RED 1
[6] CRT_R 7
L45 EMI@
SM01000FH00 BLM15BB470SN1D_2P CRT_DDC_DAT_CONN 12
1 2 GREEN 2
[6] CRT_G 8 16
L46 EMI@ G
SM01000FH00 BLM15BB470SN1D_2P 13 17
1 2 3 G
BLUE
[6] CRT_B 9
14

10P_0402_50V8J
C648 EMI@

10P_0402_50V8J
C615 EMI@

10P_0402_50V8J
C611 EMI@

10P_0402_50V8J
C647 EMI@

10P_0402_50V8J
C618 EMI@

10P_0402_50V8J
C616 EMI@
RP50 1 1 1 1 1 1 4
CRT_B 8 1 10
CRT_G 7 2 CRT_DDC_CLK_CONN 15
CRT_R 6 3 5
5 4 2 2 2 2 2 2
C-K_80443-5K1-152
150_0804_8P4R_1%
DC060006H00

ME@

CRT Connector
JVGA_HS_R

JVGA_VS_R
2 2
1
C449
.1U_0402_16V7K For CRT Flicker
2

+3VS

1 1
@
C529 C531
U10 +HDMI_5V_OUT
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 1 8 1 2

2
VCC_SYNC BYP

3 RED
C6 0.22U_0402_10V6K
ESD
+3VS +3VS VCC_VIDEO VIDEO1
3 3

1
+HDMI_5V_OUT
7 4 GREEN R31 R33
VCC_DDC VIDEO2 4.7K_0402_5% 4.7K_0402_5% SC300001G00
1 DT1 E14@
[6] CRT_DDC_DATA 10 5 BLUE JVGA_HS_R 6 3 CRT_DDC_DAT_CONN

2
C537 DDC_IN1 VIDEO3 I/O4 I/O2
1 R1083 2 CRT_DDC_DATA 0.1U_0402_16V4Z
2.2K_0402_5% 2 11 9 CRT_DDC_DAT_CONN
[6] CRT_DDC_CLK DDC_IN2 DDC_OUT1 5 2
1 R1092 2 CRT_DDC_CLK VDD GND
2.2K_0402_5% 60Hz@1920x1200x60Hz 13 12 CRT_DDC_CLK_CONN
[6] CRT_VSYNC SYNC_IN1 DDC_OUT2
JVGA_VS_R 4 1 CRT_DDC_CLK_CONN
15 14 JVGA_VS R872 1 2 22_0402_5% JVGA_VS_R I/O3 I/O1
[6] CRT_HSYNC SYNC_IN2 SYNC_OUT1
74kHz@1920x1200x60Hz AZC099-04S.R7G_SOT23-6
SC300001G00
6 16 JVGA_HS R873 1 2 22_0402_5% JVGA_HS_R +HDMI_5V_OUT DT2 E14@
GND SYNC_OUT2 RED 6 3 BLUE
I/O4 I/O2
C851

C852

TPD7S019-15DBQR_SSOP16
1 1
5 2
VDD GND
10P_0402_50V8J

10P_0402_50V8J

2 2
@EMI@

@EMI@

GREEN 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 25 of 47
A B C D E
5 4 3 2 1

+3VALW +3V_LAN
RL11
RL18 1 RS@ 2 0_0603_5% 1 2
0_0603_5%
60mil W=60mil 8111G_LDO@
+LAN_VDD
LL1
W=60mils
+LAN_SROUT1.05 1 2

0.1U_0402_16V7K
2
2.2UH +-5% NLC252018T-2R2J-N

0.1U_0402_16V7K
CL1 SWH@

4.7U_0603_6.3V6K
1
1U_0402_6.3V6K 1 1
1 CL15 CL16
CL17
2 SWH@ SWH@
2 2
D D

8111G_LDO@
LL1, CL16, and CL17 close to Pin24
( Should be place within 200 mils )

RJ-45 CONN.
+3V_LAN

>1mS and <100mS


JLAN1 ME@
+LAN_VDD LED0 1 2 12
Yellow LED-
Rising time (10%~90%) W=40mils RL15 510_0402_5%
+3V_LAN 11

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
RL1 1 RS@ 2 +LAN_VDDREG Yellow LED+
+3V_LAN RJ45_TX3- 8

0.1U_0402_16V7K

1U_0402_6.3V6K
4.7U_0603_6.3V6K
1 1 1 1 1 PR4-
0_0603_5% 1 1

CL8
CL9 CL10 CL4 CL5 CL6 CL7 RJ45_TX3+ 7
0.1U_0402_16V7K

PR4+

SWH@

SWH@
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2 2 2 2 2 RJ45_RX1- 6
0.1U_0402_16V7K

1 1 1 1 2 2 PR2-
@ @
CL2 CL3 CL20 CL21 RJ45_TX2- 5
PR3-
2 2 2 2 RJ45_TX2+ 4
PR3+
C C
Close to Pin3, Pin8, Pin22, Pin30, Pin22 RJ45_RX1+ 3
PR2+
RJ45_TX0- 2
PR1- 13
Close to Pin23 Close to Pin23 RJ45_TX0+ 1 SHLD2 14
W=60mils +3V_LAN PR1+ SHLD1
LED2 1 2 10
RL16 510_0402_5% Green LED-
CL2 close to Pin 11 9
Green LED+
CL3 close to Pin 32 SANTA_130452-0P
DC234007O00 LANGAN1 LANGAN

EMI@ RL4 1 2 0_0402_5% LANGAN


+LAN_VDD +LAN_VDD
EMI@ RL5 1 2 0_0402_5% These components close to Pin 17, 18 +3VS
1 2PCIE_GTX_C_ARX_P0
PCIE_GTX_C_ARX_P0 [7]
LAN_MDIP0 1 17 PCIE_PRX_DTX_P0_C CL11 0.1U_0402_16V7K
MDIP0 HSOP

1
LANGAN LAN_MDIN0 2 18 PCIE_PRX_DTX_N0_C 1 2PCIE_GTX_C_ARX_N0
MDIN0 HSON PCIE_GTX_C_ARX_N0 [7]
3 19 PLT_RST_BUF# CL12 0.1U_0402_16V7K RL8
LAN_MDIP1 4 AVDD10 PERSTB 20 ISOLATE# PLT_RST_BUF# [27,29,33,8] 1K_0402_5%
LAN_MDIN1 5 MDIP1 ISOLATEB 21 PCIE_LAN_WAKE#
@EMI@ RL6 1 2 0_0402_5% LAN_MDIP2 6 MDIN1 LANWAKEB 22 PCIE_LAN_WAKE# [27,33]

2
LAN_MDIN2 7 MDIP2 DVDD10 23 +LAN_VDDREG ISOLATE#
@EMI@ RL7 1 2 0_0402_5% 8 MDIN2 VDDREG 24 +LAN_SROUT1.05 +3V_LAN
LAN_MDIP3 9 AVDD10 REGOUT 25 LED2 TPL1
LAN_MDIN3 10 MDIP3 LED2 26 LED1_GPIO 1 @ 2
11 MDIN3 LED1/GPIO 27 LED0 RL17 10K_0402_5% RL10
+3V_LAN AVDD33 LED0
LANGAN1 LAN_CLKREQ# 12 28 XTLO TPL2 15K_0402_5%
[7] LAN_CLKREQ# PCIE_ATX_C_GRX_P0 13 CLKREQB CKXTAL1 29 XTLI
[7] PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0 14 HSIP CKXTAL2 30
[7] PCIE_ATX_C_GRX_N0 CLK_PCIE_LAN 15 HSIN AVDD10 31 2.49K_0402_1% 2 1 RL9
B Green CLK option GCLK@ [8] CLK_PCIE_LAN CLK_PCIE_LAN# 16 REFCLK_P RSET 32
B

[8] CLK_PCIE_LAN# REFCLK_N AVDD33 +3V_LAN


RL20 1 2 0_0402_5% XTLI 33
[35] GCLK_LAN_25MHZ GND reserved GPIO pin

NOGCLK@
CL13
TL1
1 2 XTLO +V_DAC 1 24 MCT
UL2 UL2 TCT1 MCT1 RL19 CL19
10P_0402_50V8J RTL8106EUL-CG QFN 32P E-LAN CTRL RTL8111GUL-CG QFN 32P E-LAN CTRL LAN_MDIP3 2 23 RJ45_TX3+ 1 2 1 2
8106E_SWH@ TD1+ MX1+
SA00006ML10
1

SA00006N910 LAN_MDIN3 3 22 RJ45_TX3- 75_0805_5% 10P_0603_50V


YL1 NOGCLK@ 8111G_SWH@ CL18 TD1- MX1-
OSC

NC

25MHZ_10PF _X1E000311000900 1 2 +V_DAC 4 21


TCT2 MCT2 LANGAN
EMI 0.01U_0402_16V7K LAN_MDIP2 5 20 RJ45_TX2+
OSC

TD2 MX2+
NC

LAN_MDIN2 6 19 RJ45_TX2-
E14@ TD2- MX2-
2

DL1 +V_DAC 7 18 2 1
CL14 1 4 TCT3 MCT3
LAN_MDIN2 LAN_MDIP3
1 2 XTLI I/O1 I/O3 LAN_MDIP1 8 17 RJ45_RX1+ DL3
TD3+ MX3+ BS4200N-C-LV_SMB-F2
10P_0402_50V8J LAN_MDIN1 9 16 RJ45_RX1- EMI@
NOGCLK@ 2 5 TD3- MX3-
GND VDD +V_DAC 10 15
TCT4 MCT4
LAN_MDIP0 11 14 RJ45_TX0+
LAN_MDIP2 3 6 LAN_MDIN3 TD4+ MX4+
I/O2 I/O4 LAN_MDIN0 12 13 RJ45_TX0-
AZC099-04S.R7G_SOT23-6 TD4- MX4-
SC300001G00
TL1 350UH_IH-160
S0 X'FORM_ HH-065 10/100 8111G_SWH@
A E14@ 8106E_SWH@ A
DL2
LAN_MDIN0 1 4 LAN_MDIP1
I/O1 I/O3 FOR 10/100 data transferring 2013/08/27

2 5
GND VDD

LAN_MDIP0 3
I/O2 I/O4
6 LAN_MDIN1 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
AZC099-04S.R7G_SOT23-6
SC300001G00
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111G/8106E
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 26 of 47
5 4 3 2 1
A B C D E

1 1

+3VS +3VS_WLAN

NGFF for WLAN / BT(Key E) +3VALW R153 1 RS@ 2 0_0805_5%

C1152 1 2 0.1U_0603_6.3V6M

+3VS_WLAN ESD@ Q10 DMG2301U-7 1P SOT23-3

D
JWLAN1 1
2 1 2 2
GND 3.3VAUX 1 1
3 4 @ C155 C156
[30] USB20_BT_P4 USB_D+ 3.3VAUX
BT 5 6 @ @

G
[30] USB20_BT_N4

2
7 USB_D- LED1# 8 @ 4.7U_0603_6.3V6K 0.1U_0402_16VK7
9 GND PCM_CLK 10 [33] WLAN_PWR_ON# 2 2
SIDO_CLK PCM_SYNC 1
11 12 R157
13 SDIO_CMD PCM_IN 14 150K_0402_5% @ C157
15 SDO_DAT0 PCM_OUT 16 0.1U_0402_16VK7
17 SDO_DAT1 LED2# 18 2
19 SDO_DAT2 GND 20
21 SDO_DAT3 UART_W AKE# 22
23 SDIO_W AKE# UART_RX
SDIO_RESET#

24
25 UART_TX 26
27 GND UART_CTS 28
[7] PCIE_PTX_C_DRX_P3 29 PETP0 UART_RTS 30 R161 1 RS@ 2 0_0402_5%
[7] PCIE_PTX_C_DRX_N3 PETN0 RESERVED E51TXD_P80DATA [32,33]
31 32 R165 1 RS@ 2 0_0402_5%
33 GND RESERVED 34 E51RXD_P80CLK [32,33]
[7] PCIE_PRX_DTX_P3 35 PERP0 RESERVED 36
WLAN [7] PCIE_PRX_DTX_N3
37 PERN0 COEX3 38
39 GND COEX2 40
[8] CLK_PCIE_WLAN 41 REFCLKP0 COEX1 42 SUSCLK_R R158 1 RS@ 2 0_0402_5%
[8] CLK_PCIE_WLAN# 43 REFCLKN0 SUSCLK 44 PMC_SUSCLK [8]
WL_RST#
GND PERST0# BT_OFF# [9]
[7] WLAN_CLKREQ# R167 1 RS@ 2 0_0402_5% WLAN_CLKREQ#_R 45 46 BT_OFF# R159 1 @ 2 0_0402_5%
CLKEQ0# W _DISABLE2# EC_BT_OFF# [33]
[8] SOC_PCIE_WAKE# R160 1 @ 2 0_0402_5% WAKE#_R 47 48 R166 1 RS@ 2 0_0402_5%
PEW AKE0# W _DISABLE1# EC_WL_OFF# [33]
[26,33] PCIE_LAN_WAKE# R162 1 2 0_0402_5% 49 50
@ 51 GND I2C_DATA 52
53 RSRVD/PETP1 I2C_CLK 54
3 55 RSRVD/PETN1 ALERT 56
Note: The real behavior of BT_DISABLE are 3
57 GND RESERVED 58 BT_DISABLE=LOW, BT=OFF
59 RSRVD/PERP1 RESERVED 60
61 RSRVD/PERN1 RESERVED 62 BT_DISABLE=HIGH, BT=ON
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND
+3VS_WLAN
69 68
MTG77 MTG76

1
+3VS
LCN_DAN05-67306-0102 R163
ME@ @ 100K_0402_5%

2
SP070013F00 Q11
2N7002K_SOT23-3

G
2
@
WL_RST# 1 3
PLT_RST_BUF# [26,29,33,8]

S
R164 1 RS@ 2 0_0402_5%

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCIE(WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 27 of 47
A B C D E
A B C D E

+3VS +3VDD_CODEC +IOVDD_CODEC +1.5VS

600ohms @100MHz 2A
RA2 1 RS@ 2 RA3 1 RS@ 2
P/N: SM01000EE00

0.1U_0402_16VK7

0.1U_0402_16VK7
1U_0402_6.3V6K
0_0603_5% 1 1 0_0603_5%

1
CA4

CA5

CA6
+5VS Place near Pin25

2
2 2
RA1 1 RS@ 2 0_0805_5% +5VS_PVDD
Place RA41 on AGND/DGND moat

0.1U_0402_16VK7

0.1U_0402_16VK7
4.7U_0603_6.3V6K
2 1 1
+5VDDA_CODEC +5VS
Place near Pin1 Place near Pin9

CA2

CA3
CA1
1
1 2 2
Place near Pin26 1

+IOVDD_CODEC RA4 1 RS@ 2 Change power rail from +CHGRTC to +3VLP


+1.5VS 0_0603_5%

0.1U_0402_16VK7

1U_0402_6.3V6K
+3VDD_CODEC
1 1

CA7

CA11
RA5 1 RS@ 20_0402_5%

For ALC233 only +3VLP


CA8 1 2 1U_0402_6.3V6K 2 2

Place near Pin40 EXT_MIC_SLEEVE

1
41

46

26

40
1

9
233@ UA2 233@ RA9
100K_0402_5%

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

DVDD-IO

3
2
LINE1-L 22 5 L2N7002DW1T1G 2N SOT-363
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPK_L1- QA1B
LINE1-R(PORT-C-R) SPK-OUT-L-

6
42 SPK_L2+ 233@

4
24 SPK-OUT-L+

wide 40MIL RA6


23 LINE2-L(PORT-E-L)
LINE2-R(PORT-E-R) SPK-OUT-R+
SPK-OUT-R-
45
44
SPK_R2+
SPK_R1-
233@
HDA_RST_AUDIO# RA14 1 2 2 233@
+MIC2-VREFO
1 2 2.2K_0402_5% EXT_MIC_RING2 17 10K_0402_5% QA1A
1 2 2.2K_0402_5% EXT_MIC_SLEEVE 18 MIC2-L(PORT-F-L) /RING2 L2N7002DW1T1G 2N SOT-363

1
RA7 MIC2-R(PORT-F-R) /SLEEVE 32 HP_OUTL
31 HPOUT-L(PORT-I-L) 33 HP_OUTR
+LINE1-VREFO-R
30 LINE1-VREFO-L HPOUT-R(PORT-I-R) Headphone
LINE1-VREFO-R 10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO [7]
DMIC_DAT 2 6 HDA_BITCLK_AUDIO
[23] DMIC_DAT GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO [7]
DMIC_CLK RA37 EMI@ 1 2 SBY100505T-301Y-N 0402 DMIC_CLK_R 3
External DMIC [23] DMIC_CLK RA8 1 @ 2 10K_0402_5% GPIO1/DMIC-CLK RA10 1 @EMI@ 2 33_0402_5% @EMI@ CA12 22P_0402_50V8J
RS@
RA11 1 2 0_0402_5% 47 5 HDA_SDOUT_AUDIO
2 [7]
[33] EC_MUTE#
HDA_RST_AUDIO#
11 PDB
RESETB
ALC233-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO RA12 1 2 33_0402_5%
HDA_SDOUT_AUDIO
HDA_SDIN0 [7]
[7]
For ALC233VB only
+3VS
2

48 +MIC2-VREFO
PC_BEEP 12 SPDIF-OUT/GPIO2
PCBEEP

2
16
PLUG_IN_R 13 MONO-OUT CA13 2 1 2.2U_0402_6.3V6M RA38
14 SENSE A
SENSE B 29
100K_0402_5% Combo Jack
CA14 2 1 2.2U_0402_6.3V6M
233VB@
37 MIC2-VREFO
(Normal Open)

1
CA15 2 1 1U_0402_6.3V6K 35 CBP 7 LDO3 CA16 2 1 2.2U_0402_6.3V6M
CBN LDO3-CAP 39 LDO2
LDO2-CAP 27 LDO1 2 1 233VB@
36 LDO1-CAP RA15 100K_0402_5% PLUG_IN_R RA13 1 2 200K_0402_1% PLUG_IN
+3VDD_CODEC CPVDD PLUG_IN [32]
CA17 2 1 4.7U_0603_6.3V6K
@ 28 CA18 1 2 1U_0402_6.3V6K
233VB@ RA161 2 100K_0402_5% 20 VREF
+3VLP CPVREF 15 JDREF RA17 1 2 20K_0402_1% W=40mils EXT_MIC_SLEEVE RA19 1 2 TAI-TECH FCM1608CF-121T03 0603 HGNDB
JDREF HGNDB [32]
CA19 2 1 2.2U_0402_6.3V6M 19 34 CPVEE 233@ W=40mils EXT_MIC_RING2 RA20 1 2 TAI-TECH FCM1608CF-121T03 0603 HGNDA
MIC-CAP CPVEE HGNDA [32]
HP_OUTL RA22 1 2 47_0402_5% HPOUT_L
HPOUT_L [32]
2 HP_OUTR RA23 1 2 47_0402_5% HPOUT_R
HPOUT_R [32]
RA18 1 @ 2 0_0402_5% 4
49 DVSS 25 CA20
Thermal PAD AVSS1 38
AVSS2 1
RA18 pop on ALC283, NC on ALC233 1U_0402_6.3V6K

2
ALC233-CG_MQFN48_6X6 LINE1-L CA21 2 1 1U_0402_6.3V6K

RA26

RA27
10K_0402_5%

10K_0402_5%
LINE1-R CA22 2 1 1U_0402_6.3V6K @ @

1
RA29 1 2 4.7K_0402_5%
For EMI UA2
ALC233-VB2-CG MQFN 48P
233VB@
RA21 RS@ SA00007BF10 +LINE1-VREFO-R
1 2
3 0_0402_5% RA32 1 2 3
RA24 RS@ 4.7K_0402_5% For Universal Audio Jack
1 2
0_0402_5%
RA25 RS@
1 2
0_0402_5%
RA28
@ 1 2
0_0402_5%

GND GNDA
11/20 Change symbol of JSPK1 to SP02000H700

follow vendor suggest


& reserver default design wide 40MIL SP020008X00
ACES_85205-04001
SPK_R1- @EMI@ LA5 1 2 FCM1608CF-121T03 0603 SPK_R1-_CONN 1
SPK_R2+@EMI@ LA6 1 2 FCM1608CF-121T03 0603 SPK_R2+_CONN 2 1
SPK_L1- @EMI@ LA7 1 2 FCM1608CF-121T03 0603 SPK_L1-_CONN 3 2
SPK_L2+ @EMI@ LA8 1 2 FCM1608CF-121T03 0603 SPK_L2+_CONN 4 3
5 4
LA5 LA6 6 G5

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
PC Beep 0_0603_5% 0_0603_5%
1 1 1 1 +5VS
G6
JSPK1
EMI@ EMI@ ME@

EMI@ CA28

EMI@ CA29

EMI@ CA30

EMI@ CA31
EC Beep CA23 1 2 0.1U_0402_16V4Z CA25
ESD
[33] BEEP#
4
1 RA34 2 1 2 PC_BEEP LA7 LA8 @ DA3 4
CA24 1 2 0.1U_0402_16V4Z 0_0603_5% 0_0603_5% 2 2 2 2 SPK_R1-_CONN 6 3 SPK_L2+_CONN
[9] HDA_SPKR I/O4 I/O2
1K_0402_5% 0.1U_0402_16V7K
PCH Beep EMI@ EMI@
1

DVT, NO.31 5 2
@ VDD GND
RA36
10K_0402_5%
SPK_R2+_CONN 4 1 SPK_L1-_CONN
2

I/O3 I/O1
AZC099-04S.R7G_SOT23-6

For EMI
A B C D E
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec_ALC3225
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 28 of 47
5 4 3 2 1

D D

+AV12 +DV12S

+3VS
1 1 1 1
CC1 CC2 CC3 CC4 @
CC5 1 2 4.7U_0603_6.3V6K
2 2 2 2

0.1U_0402_16V7K

0.1U_0402_16V7K
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
CC6 1 2 0.1U_0402_16V7K UCR1
9
+DV33_18 15 3V3_IN
+AV12 7 DV33_18
+Card_3V3 +DV12S 11 AV12
LC1 DV12_S
+Card_3V3 1 2 +Card_3V3_R 10
PBY160808T-301Y-N_0603 Card_3V3 25
1 2 8 GND
RC1 6.2K_0402_1% RREF Close to UCR1
PCIE_PTX_C_DRX_P1 1 12 SD_D1_R RC2 RS@ 1 2 0_0402_5% SD_D1
[7] PCIE_PTX_C_DRX_P1 HSIP SP1
PCIE_PTX_C_DRX_N1 2 13 SD_D0_R RC3 RS@ 1 2 0_0402_5% SD_D0
[7] PCIE_PTX_C_DRX_N1 HSIN SP2
PCIE_PRX_DTX_P1 CC7 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P1_C 5 14 SD_CLK_R RC9 2 EMI@ 1 33_0402_5% SD_CLK
[7] PCIE_PRX_DTX_P1 1 2 0.1U_0402_16V7K 6 HSOP SP3 16 1 2
PCIE_PRX_DTX_N1 CC8 PCIE_PRX_DTX_N1_C SD_CMD_RRC5 RS@ 0_0402_5% SD_CMD
[7] PCIE_PRX_DTX_N1 HSON SP4 17 1 2
SD_D3_R RC6 RS@ 0_0402_5% SD_D3
SP5 18 SD_D2_R RC7 RS@ 1 2 0_0402_5% SD_D2
C SP6 1 C
[8] CLK_PCIE_Card CLK_PCIE_Card 3 @EMI@
CLK_PCIE_Card# 4 REFCLKP CC13
[8] CLK_PCIE_Card# REFCLKN
+DV33_18 5.6P 50V D NPO 0402
PLT_RST_BUF# 23 20 SD_WP 2
[26,27,33,8] PLT_RST_BUF# PERST# SD_WP
Card_CLKREQ# 24 21 SD_CD#

1U_0402_6.3V6K
2 [7] Card_CLKREQ# CLK_REQ# SD_CD#
CC10
2 1 SD_GPIO1 19 22
+3VS GPIO MS_INS#
RC8 10K_0402_5%
1 RTS5229-GR_QFN24_4X4

SA00004Z900

SD/SDXC
+Card_3V3
JSD1
B SD_D0 7 4 B
D0 VDD
SD_D1 8
D1
SD_D2 9 10 SD_WP CC11

0.1U_0402_16V7K
D2 WP 1 1
CC12

4.7U_0603_6.3V6K
SD_D3 1 11 SD_CD#
D3 CD
3 2 2
SD_CLK 5 VSS1 6
CLK VSS2 12
SD_CMD 2 Shading 13
CMD Shading
TAITW_PSDBTC-09GLBS1N14H0
ME@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/10/11 Deciphered Date 2014/10/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P29-CardRead/RTS5229
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 29 of 47
5 4 3 2 1
A B C D E

SM070000S80 WCM2012F2SF-670T04 67ohm EMI@ L24


For ESD request
D15
+USB3_VCCA USB3.0_Port
2 1 PCH_USB3_TX0_P_C 2 1 U3TXDP0 U3RXDN0 1 1 10 9 U3RXDN0 W=100mils
[9] PCH_USB3_TX0_P
C484 .1U_0402_16V7K 2 1 SF000002Y00
W=80mils U3RXDP0 2 2 9 8 U3RXDP0 220U 6.3V OSCON
W=80mils 2 1 PCH_USB3_TX0_N_C 3 4 U3TXDN0
+5VALW [9] PCH_USB3_TX0_N
C482 .1U_0402_16V7K 3 4 U3TXDN0 4 4 7 7 U3TXDN0
ESR 17mohm@100Khz
+USB3_VCCA DLW21SN900HQ2L-0805_4P
SM070001S10 U3TXDP0 5 5 6 6 U3TXDP0

C483
1 2
@ESD@
U13
1 3 3
USB3.0 Conn. 0909

.1U_0402_16V7K 5 OUT EMI@ L25


IN 2 R454 PCH_USB3_RX0_P 2 1 U3RXDP0 8 JUSB1
GND [9] PCH_USB3_RX0_P 2 1
USB_EN# 4 0_0402_5% E14@ U3TXDP0 9
[32,33] USB_EN# EN 3 1 @ 2 YSCLAMP0524P SLP2510P8 1 SSTX+
OCB USB_OC0# [9] VBUS
1 PCH_USB3_RX0_N 3 4 U3RXDN0 U3TXDN0 8 1
[9] PCH_USB3_RX0_N 3 4 SSTX-
SY6288D20AAC_SOT23-5 USB20_P0_L 3
D+

220U_6.3V_M
C486
DLW21SN900HQ2L-0805_4P 7
SM070001S10 USB20_N0_L 2 GND 10
1
+
1
@
C172
R192 2 @ 1 0_0402_5% ESD U3RXDP0

U3RXDN0
6
4
5
D-
SSRX+
GND
GND 11
GND 12
GND 13
470P_0402_50V7K SC300001G00 SSRX- GND
2 2 L26 EMI@ DT4 E14@ J-L_TNBNRAC70010009
3 4 USB20_P0_L +USB3_VCCA USB20_N0_L 6 3 ME@
[9] USB20_P0 3 4 I/O4 I/O2 DC23300ET10

2 1 USB20_N0_L
[9] USB20_N0 2 1 5 2
WCM2012F2SF-670T04-0805_4P PCB Footprint = SW_WCM2012F2S_4P VDD GND
SM070002Z00
@
R193 2 1 0_0402_5% USB20_P0_L 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6

USB2.0_Port
+USB3_VCCA
@
R190 2 1 0_0402_5%
W=80mils
JUSB2
L27 EMI@ 1 5
3 4 USB20_P1_L VCC GND
[9] USB20_P1 3 4 USB20_N1_L 2 6
D- GND
2 1 USB20_N1_L USB20_P1_L 3 7
[9] USB20_N1 2 1 D+ GND
WCM2012F2SF-670T04-0805_4P PCB Footprint = SW_WCM2012F2S_4P 4 8
SM070002Z00 GND GND

2 R191 2 1 0_0402_5% C-H_13-17200430CP 2


DC23300EN00
@
ESD
SC300001G00
DT3 E14@
+USB3_VCCA USB20_N1_L 6 3
I/O4 I/O2

5 2
VDD GND

USB20_P1_L 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6

USB2.0 HUB
3 +5VALW +5V_HUB +3V_HUB 3
RS@
1 R1045 2 +5V_HUB
1 1 1
1 0_0603_5%
C1117 C1118 C1119
C1120 .1U_0402_16V7K .1U_0402_16V7K 10U_0603_6.3V6M +5V_HUB
4.7U_0603_6.3V6M 2 2 2
2

1
19
20
25
0708:for USB debug Port U58 R1046
10K_0402_5%

VDD5

VSS
VD33F
USB20_TS_P0_HUB 12

2
USB20_TS_N0_HUB 11 DP1 1 HUB_OVCJ
USB20_FP_P1 10 DM1 OVCJ 2
[32] USB20_FP_P1 DP2 TESTJ 1
USB20_FP_N1 9 3 HUB_XOUT
[32] USB20_FP_N1 DM2 XOUT
USB20_CAM_P2 8 4 HUB_XIN C1121
[23] USB20_CAM_P2 DP3 XIN
USB20_CAM_N2 7 5 0.01U_0402_16V7K
[23] USB20_CAM_N2 DM3 DM4 USB20_BT_N4 [27] 2
HUB_BUSJ 18 6
HUB_VBUSM 17 BUSJ DP4 21 USB20_BT_P4 [27]
HUB_XRSTJ 16 VBUSM DRV 22 Y9
15 XRSTJ LED1 23 4 1 HUB_XIN
[9] USB20_P3 DPU LED2
14 24
[9] USB20_N3 DMU PWRJ
13
REXT
1

+3V_HUB FE1.1S-BQFN24B_WQFN24_4X4 HUB_XOUT3 2


SA00005E810
R1047 1 2 100K_0402_5% HUB_XRSTJ 2.7K_0402_1% 12MHZ_18PF_7V12000001
R1048
Part Number = SJ10000C210
R1049 1 2 100K_0402_5% HUB_BUSJ need apply footprint
2

PCB Footprint = Y_CRG3201212_4P


R1050 1 2 10K_0402_5% HUB_VBUSM R196 R197
0_0402_5% 0_0402_5%
C1122 1 2 0.01U_0402_16V7K B15@ B15@

R196 1 B14@ 2 0_0402_5% USB20_TS_P0_HUB


[23] USB20_TS_P0

4 4
R197 1 B14@ 2 0_0402_5% USB20_TS_N0_HUB
[23] USB20_TS_N0

R198 1 E14@ 2 0_0402_5% USB20_TS_P0_HUB


[32] USB20_E14_P0

R199 1 E14@ 2 0_0402_5% USB20_TS_N0_HUB


[32] USB20_E14_N0

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn & Hub FE1.1S
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 30 of 47
A B C D E
A B C D E

ODD
HDD SATA HDD1 Conn. 1023 Changed symbal
Near Connector
JHDD1
1
C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
[7] SATA_PTX_DRX_P0 RX+
[7] SATA_PTX_DRX_N0 C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
+5VALW +5VS +5V_ODD 4 RX-
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND
R147 1 RS@ 2 0_0805_5% [7] SATA_PRX_DTX_N0 C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 TX-
[7] SATA_PRX_DTX_P0 7 TX+
GND

1
0_0805_5%
@ R128 8
3 1 1 RS@ 2 9 3.3V

D
R149 @ +3V_HDD
1 +3VS 3.3V 1
10K_0402_5% 10
@ Q8 11 3.3V

2
R150 DMG2301U-7 1P SOT23-3 R280 1 RS@ 2 0_0402_5% HDD_DETECT#_R 12 GND

G
[33] HDD_DETECT#

2
100K_0402_5% 13 GND
1 2 1 RS@ 2 +5VS_HDD 14 GND
+5VS 5V
1 1 15
R129 16 5V
5V

1
D C152 C150 0_0805_5% 17
2 Q9 10U_0603_6.3V6M 18 GND 23
[9] ODD_EN 0.01U_0402_16V7K
G 2 @ 2 19 Reserved GND1 24
BSS138W-7-F_SOT323-3
@ 20 GND GND2
S

3
1
+5VS 21 12V
R170 22 12V
12V
100K_0402_5% 100mils
@ ALLTO_C166KH-122H9-L
Place CAP close to JODD2

10U_0603_6.3V6M
C420

1U_0402_6.3V6K
C161

.1U_0402_16V7K
C397
1 1 1
ME@

@ +3V_HDD C1154 1 2 0.1U_0603_6.3V6M


2 2 2
ESD@
C401 C402 FOR 14" +5VS_HDD C1153 1 2 0.1U_0603_6.3V6M
E14@ E14@
0.01U_0402_16V7K 0.01U_0402_16V7K ESD@
C403 C405
E14@ E14@
0.01U_0402_16V7K 0.01U_0402_16V7K SATA ODD Conn.
JODD2

B14@ 1
GND
FOR 15" 0822 changed
C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2
[7]
[7]
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1 C402 1 2
B14@
0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
4
A+
A-
SATA ODD FFC Conn.
C403 1 B14@
2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
[7] SATA_PRX_DTX_N1 B-
C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6 JODD1
[7] SATA_PRX_DTX_P1 B+
7 1
B14@ GND SATA_PTX_DRX_P1 2 1
+5V_ODD @ SATA_PTX_DRX_N1 3 2
R710 1 2 0_0402_5% ODD_DETECT#_R 8 4 3
2 80mils 9 DP SATA_PRX_DTX_N1 5 4 2
10 +5V SATA_PRX_DTX_P1 6 5
ODD_MD 11 +5V ODD_DETECT#_R 7 6
12 MD 15 +5V_ODD 8 7
13 GND GND 14 9 8
GND GND ODD_MD 10 9
10 11
ALLTO_C185S1-113H9-L GND 12
ME@ GND
ODD_DA# 1 2 SP011312061 ACES_88058-100N
[33] ODD_DA# R554 @ 0_0402_5% ME@
R555 SP010016C00
+3VS
1 2
@ 10K_0402_5%

+3VS

+3VS_VGA Check power rail


FAN Conn @ @ @ @
FD1 FD2 FD3 FD4

+3V_Thermal +5VS
2

RS@
20mil

1
0_0402_5% R168
SMSC thermal sensor
1

R169 0_0402_5%
R2448 JFAN1
DIS@ placed close to NGFF 10K_0402_5% R152 2 1 0_0603_5% +5VS_FAN 1
1

@ RS@ 2 1
[33] FAN_SPEED1 2
U2407 3
[33] EC_FAN_PWM
2

4 3
5 4 H5 @ @
2 G5
+3V_Thermal 1 10 EC_SMB_CK2 6 HOLEA H16
VDD SMCLK EC_SMB_CK2 [13,14,33,9] G6
C167 HOLEA
3 REMOTE1+ 2 9 EC_SMB_DA2 10U_0603_6.3V6M ACES_85205-04001 3
DP1 SMDATA EC_SMB_DA2 [13,14,33,9] 1
1 ME@

1
REMOTE1- 3 8 SP020008X00 @ @
GPU

1
DN1 ALERT# H22 H23
C2498 REMOTE2+ 4 7 HOLEA HOLEA
2 DP2 THERM#
0.1U_0402_16V7K REMOTE2- 5 6 H_3P2 H_3P3
DN2 GND

1
EMC1403-2-AIZL-TR_MSOP10 H_2P6X4P0N H_2P6X4P0N
Address 1001_101xb @ @
H34 H32
HOLEA HOLEA

1
2 Channel H_2P5 H_2P5

REMOTE1+ +3V_Thermal
Close to U2407 @ @ @ @ @ @
1

REMOTE1+ C H10 H36 H1 H2 H3 H17


@ C2500 2 Q2407 @ HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
2200P_0402_25V7K B MMST3904-7-F_SOT323-3 C329
2 SMSC thermal sensor
2

C2502 E .1U_0402_16V7K
placed near JWLAN1
3

2200P_0402_25V7K REMOTE1-

1
2 REMOTE1- 1 @
U17 H_2P6N
Q2407 Close to VGA 1
VDD SCLK
8 EC_SMB_CK2
H_2P8X4P8 H_4P0 H_4P0 H_4P0 H_4P0
REMOTE2+
1
Q2408 Close to DIMM @
1
REMOTE1+ 2
D+ SDATA
7 EC_SMB_DA2
REMOTE2+ C251
C2504 2200P_0402_50V7K REMOTE1- 3 6 THM_ALERT#
D- ALERT# NPTH 11/14 Add
1

2200P_0402_25V7K C 2
2 REMOTE2- @ C2505 2 Q2408 REMOTE1,2 (+/-) : THERM# 4 5 @ @ @ @ @ @
2200P_0402_25V7K B MMST3904-7-F_SOT323-3 THERM# GND H18 H_2P8X4P6 H7 H8 H9 H11 H28
Trace width/space:10/10 mil
2

E HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA H24


3

REMOTE2- EMC1402-2-ACZL-TR MSOP 8P HOLEA


4
Trace length:<8" 4
Address is 1001100xb

1
H_2P0N
LANGAN H_2P8 H_3P3 H_3P3 H_2P8X5P1 H_2P8

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN/Screw Hole
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 31 of 47
A B C D E
A B C D E

+3VS R258 1 RS@ 2 0_0402_5%

R259 1 2 0_0402_5%
RP33
0_0804_8P4R_5%
For B15/E14
+5VS
@ E14@
@
C163 RP34
.1U_0402_16V7K 0_0804_8P4R_5%
+3VALW
E14@

+3VLP C1149 1 2 0.1U_0603_6.3V6M RP33 JTP1


TP_VCC 1 8 B15_VCC_B14_R 1
TP_CLK 2 7 B15_CLK_B14_L 2 1
PWR/B conn. ESD@ [33]
[33]
TP_CLK
TP_DATA
TP_DATA 3 6 B15_DATA_B14_GND 3 2
3

2
1 1 4 5 B15_GND_B14_DATA 4

KB For B14/E14 KB For B15 R154


100K_0402_5% JPWRB1
@
C166
100P_0402_50V8J
@
C165
100P_0402_50V8J
0_0804_8P4R_5%
B15@
B15_L_B14_CLK
B15_R_B14_VCC
5
6
4
5
6
JKB2 1 2 2 RP34 7
1 1

1
1 GND

2
JKB1 KSI1 1 2 1 8 8
KSI1 1 KSI7 2 1 PWR_LED# 3 2 TP_L 2 7 GND
KSI7 2 1 KSI6 3 2 ON/OFF# 4 3 @ESD@ TP_R 3 6 ACES_88058-060N
2 3 [33] ON/OFF# 4
KSI6 3 KSO9 4 5 D6 4 5 ME@
KSO9 4 3 KSI4 5 4 LID_SW# 6 5 PSOT24C_SOT23-3 SP010010T00
4 5 [33] LID_SW# 6
KSI4 5 KSI5 6 0_0804_8P4R_5%

C169

C168
.1U_0402_16V7K

.1U_0402_16V7K
1
KSI5 6 5 KSO0 7 6 7 B15@
6 7 GND 1 1
KSO0 7 KSI2 8 8
KSI2 8 7 KSI3 9 8 GND RP35
8 9

2
KSI3 9 KSO5 10 ACES_88058-060N @ @ TP_VCC 1 8 B15_R_B14_VCC
KSO5 10 9 KSO1 11 10 ME@ 2 2 TP_CLK 2 7 B15_L_B14_CLK
KSO1
KSI0
11
12
10
11
KSI[0..7]
KSI[0..7] [33]
KSI0
KSO2
12
13
11
12 SCA00002M00
ESD@
D24
SP010010T00
ESD TP_DATA 3
4
6
5
B15_GND_B14_DATA
12 13
L

2
KSO2 13 KSO[0..17] KSO4 14 L30ESD24VC3-2 3P C/A SOT23 ESD
KSO4 14 13 KSO[0..17] [33]
KSO7 15 14
R 0_0804_8P4R_5%

1
KSO7 15 14 KSO8 16 15 L30ESD24VC3-2 3P C/A SOT23 ESD B14@
KSO8 16 15 KSO6 17 16 SCA00002M00 RP36
KSO6 17 16 KSO3 18 17 ESD@ B15@ 1 8 B15_DATA_B14_GND
KSO3 18 17 KSO12 19 18 D27 SW1 E14@ TP_L 2 7 B15_CLK_B14_L

1
KSO12 19 18 R94 KSO13 20 19 SMT1-05_4P SW4 TP_R 3 6 B15_VCC_B14_R
19 20

5
6
KSO13 20 +3VS 470_0402_5% KSO14 21 SMT1-05_4P 4 5
20 21
ESD

5
6
KSO14 21 KSO11 22 4 2
KSO11
KSO10
22
23
21
22
B14@
KSO10
KSO15
23
24
22
23 3 1
TP_L 4 2
TP_R
0_0804_8P4R_5%
B14@
For B14
KSO15 24 23 KSO16 25 24 3 1
CAPS_LED#_R 25 24 [32,33] KSO16
KSO17 26 25 For B14 TP module(84*42)
CAPS_LED# 26 25 [32,33] KSO17
R94 2 B15@ 1 470_0402_5% CAPS_LED#_R 27 26 For B15/E14 TP module(100*50)
26 27 28 27
GND2 [33] CAPS_LED# 28
28 R95 2 B15@ 1 470_0402_5% NUM_LED#_R 29 31 PWR_LED# C1101 1 2 .1U_0402_16V7K
GND1 30 29 GND 32 1 1 VCC 1 VCC 6 1 VCC 1 VCC
[33] NUM_LED#
1 1
30 GND
@EMI@
L R
0.1U_0402_16V7K

0.1U_0402_16V7K
ACES_88514-02601-071 ACES_88514-3001
2 2 CLK 2 CLK 5 2 CLK 2 CLK
C250

C252
ME@ ME@ ON/OFF# C1103 1 2 .1U_0402_16V7K
SP01000R500 B15@ SP010011A00
2 2 E14@ SW3 B15@ SW2
@EMI@
SW3 SMT1-05_4P SW2 SMT1-05_4P 3 3 DAT 3 DAT 4 3 DAT 3 DAT
LID_SW# C1102 1 2 .1U_0402_16V7K SMT1-05_4P B14@ SMT1-05_4P B14@

5
6

5
6
4 4 GND 4 L 3 4 GND 4 L
ESD @EMI@ 4

3
2

1
TP_L
4

3
2

1
TP_R
5 5 L 5 R 2 5 L 5 R

2
6 6 R 6 GND 1 6 R 6 GND 2

Finger Printer conn. LED1 E14@


R171E14@ R289 1 @ 2 0_0402_5% DC_LED
[39] ACPRN#
PWR_LED# 1 2 1 2
Power (Green) [33] PWR_LED#
200_0402_5%
+3VALW +3VALW
(B14/B15/E14) DC-In LED (Green) For EC debug. Place to anywhere.

1
+3VS LTST-C190KGKT 0603 GRN (B14/B15/E14) D
SC590KGK020 2 Q20
[33,39,8] VCIN1_AC_IN
G 2N7002K_SOT23-3 C1151 1 2 0.1U_0603_6.3V6M
R172 R172 S

3
620_0402_5% 200_0402_5% ESD@
JFP1 LED2 SD028620080 SD028200080 +3VLP +3VALW
R291 1 RS@ 2 0_0402_5% +3VS_FP 1 R172B14@ B15@ E14@ R278 B15@ JP5
2 1 BATT_LOW_LED# 1 2 1 2 RS@ 1 2 0_0402_5% +VCC_LID 1 R279 2 1
[30] USB20_FP_P1 2 Battery (Amber) [33] BATT_LOW_LED# +3VLP +3VALW 1

1
3 620_0402_5% 100K_0402_5% 2
Finger Print [30] USB20_FP_N1
4 3 (B14/B15/E14) @ RS@ [27,33] E51TXD_P80DATA
3 2
4 0_0402_5% 0_0402_5% [27,33] E51RXD_P80CLK 3
(For B14/E14/B15) 5
5
19-217/S2C-FM2P1VY/3T 0603 ORANGE 4
4
6 SC500005T00 R292 R290 JLED1
6

2
R294 1 @ 2 0_0402_5% 1 ACES_85205-0400

2
2 1
3

7 R173 R173
1 DC-In LED (Green) 1 ME@

VDD
GND 3 2
0.1U_0402_16V7K

8 330_0402_5% 200_0402_5% DC_LED 5 B15@


GND (B14/B15/E14) 4 3 G1
C247

LED3 SD028330080 SD028200080 6 C248


FP@ ACES_88058-060N
Battery (Green) R173 B15@ E14@ 4 G2 .1U_0402_16V7K 3 LID_SW#
J2: TOP
2 2 2 2 OUTPUT
ME@ (E14) [33] BATT_CHG_LED# R295 1 RS@ 2 0_0402_5% 1 2 1 2 +3VLP ACES_51512-0040N-P01 J3: BOT J2
SP010010T00 330_0402_5% C1104 C1105 ME@

GND
B14@ .1U_0402_16V7K .1U_0402_16V7K SP01001J100 2 1 2

FP@ D25 ESD LTST-C190KGKT 0603 GRN


SC590KGK020
@EMI@
1
@EMI@
1 B15@
C249 SHORT PADS
1

1
B15@ 10P_0402_50V8J
1 J3
R174 R174 U16
SCA00001L00 330_0402_5% 200_0402_5% 1 2 ON/OFF#
LED4 SD028330080 SD028200080
R174 B15@ E14@ TCS20DLR SOT-23F 3P SHORT PADS
SOC_SATALED# 1 2 1 2
HDD (Green) [7] SOC_SATALED#
330_0402_5%
+3VS Check power rail, +3VS OK?
Close to JFP1 (B14/B15/E14) B14@
LTST-C190KGKT 0603 GRN
SC590KGK020

3 3

For E14
+3VLP For B14/B15
IO/B
2

ME@ SP010010X00
R155 SP010015H00
100K_0402_5% ACES_88058-120N ACES_50505-0184N-001
14 HGNDB 18 20
[28,32] HGNDB
1

13 GND HGNDA 17 18 G2 19
[28,32] HGNDA
HGNDB 12 GND HPOUT_L 16 17 G1
[28,32] HGNDB [28,32] HPOUT_L
HGNDA 11 12 15 16
[28,32] HGNDA
HPOUT_L 10 11 HPOUT_R 14 15
[28,32] HPOUT_L [28,32] HPOUT_R
9 10 PLUG_IN 13 14
[28,32] PLUG_IN
HPOUT_R 8 9 12 13
[28,32] HPOUT_R
PLUG_IN 7 8 11 12
[28,32] PLUG_IN
6 7 USB20_N2_R 10 11
USB20_N2_R 5 6 +USB_VCCB USB20_P2_R 9 10
USB20_P2_R 4 5 +USB_VCCB 8 9
+USB_VCCB
W=80mils 3 4 7 8 +USB_VCCB
+USB_VCCB 2 3 6 7
NOVO# 1 2 5 6 +5VALW
W=80mils
[32,33] NOVO# 1 5
USB20_E14_N0_L 4 2A/Active Low
JIO1 USB20_E14_P0_L 3 4
3 W=80mils
2 U12
NOVO# 1 2 1
[32,33] NOVO# 1 OUT
5
JIO2 IN 2
W=80mils ME@ 4 GND @ R179
[30,33] USB_EN# EN 3 USB_OC1#_R 1 2
OCB USB_OC1# [9]
3

0_0402_5%
SY6288D20AAC_SOT23-5
@ESD@
SCA00001L00 D26 1
L30ESD24VC3-2 3P C/A SOT23 ESD R188 2 @ 1 0_0402_5% 1
C170 + @
1

220U_6.3V_M C171
E14@ SM070002Z00 470P_0402_50V7K
4 L19 3 USB20_E14_N0_L 2 2
[30] USB20_E14_N0 4 3

1 2 USB20_E14_P0_L
4
ESD [30] USB20_E14_P0 1 2
WCM-2012HS-900T
4

For EMI R189 2


@
1 0_0402_5%

R177 2 @ 1 0_0402_5%

4
SM070002Z00
L14 3 USB20_P2_R
For EMI
[9] USB20_P2 4 3

1 2 USB20_N2_R
[9] USB20_N2 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
WCM-2012HS-900T 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date
R178 2 1 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/LED/TPM
@ Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Thursday, February 20, 2014 Sheet 32 of 47
A B C D E
A B C D E

+3VALW

+3VALW_EC
C1150 1 2 0.1U_0603_6.3V6M +3VLP L20
FBM-11-160808-601-T_0603 LID_SW# R476 1 2 47K_0402_5%
ESD@ 1 2
+3VALW_EC +EC_VCCA
1 1
+3VLP C185 @
R194 1 @ 2 0_0603_5% +3VALW_EC C184
1@ .1U_0402_16V7K 1000P_0402_50V7K
+3VALW_EC 2 ECAGND 2
R480 2 1 47K_0402_5% EC_RST# C179 1 2
R195 1 2 0_0603_5% 100P_0402_50V8J L21 TP_CLK R478 1 2@ 4.7K_0402_5% +5VS
C509 2 1 .1U_0402_16V7K RS@ FBM-11-160808-601-T_0603 TP_DATA R479 1 2@ 4.7K_0402_5%
2
1 1
1 1 1 1 ECAGND EC_MUTE# R481 1 @ 2 10K_0402_5%
+EC_VCCA

.1U_0402_16V7K
C180

.1U_0402_16V7K
C181

1000P_0402_50V7K
C182

1000P_0402_50V7K
C183
TP_CLK R482 1 2 4.7K_0402_5% +3VS
TP_DATA R483 1 2 4.7K_0402_5%
2 2 @ 2 @ 2

111
125
22
33
96

67
9
U28

EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
+3VALW_EC 1 21 +3VALW_EC
[6] SOC_ENVDD 2 GATEA20/GPIO00 GPIO0F 23
RP12 BEEP#
1 8 EC_SMB_CK1
[8] EC_KBRST#
3 KBRST#/GPIO01
SERIRQ
BEEP#/GPIO10
GPIO12
26 EC_FAN_PWM
BEEP# [28] Board ID
[8] EC_SERIRQ EC_FAN_PWM [31]

2
2 7 EC_SMB_DA1 4 27 Analog Board ID definition,
3 6 [9] LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13 AC_OFF [39]
EC_SMB_CK2 @
4 5 [9] LPC_AD3 7 LPC_AD3 Please see page 3.
EC_SMB_DA2 PWM Output Ra R503
+3VS [9] LPC_AD2 LPC_AD2
8 63 100K_0402_5%
[9] LPC_AD1 10 LPC_AD1 BATT_TEMP/AD0/GPIO38 64 VCIN1_BATT_TEMP [38]
2.2K_0804_8P4R_5% LPC & MISC
[9] LPC_AD0

1
+3VALW_EC LPC_AD0 AD1/GPIO39 65 ADP_I BRDID
12 ADP_I/AD2/GPIO3A 66 ADP_I [38,39]
AD Input BRDID
[9] LPC_CLK_EC CLK_PCI_EC AD3/GPIO3B

2
13 75 ADP_ID 1
[26,27,29,8] PLT_RST_BUF# 37 PCIRST#/GPIO05 AD4/GPIO42 76 ADP_ID [37]
EC_RST# @
EC_RST# IMON/AD5/GPIO43 EC_ENVDD [23] R506
R492 1 @ 2 10K_0402_5% EC_SCI# 20 Rb C517
[8] EC_SCI# 38 EC_SCII#/GPIO0E 8.2K_0402_5% .1U_0402_16V7K
[37] ADP_ID_CLOSE GPIO1D 2

1
C511 1 2 PLT_RST_BUF# 68
DAC_BRIG/GPIO3C 70
DA Output EN_DFAN1/GPIO3D
@ESD@ 100P_0402_50V8J KSI0 55 71
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72
ESD request KSI1/GPIO31 CHGVADJ/GPIO3F EC_WL_OFF# [27]
KSI2 57
2 KSI3 58 KSI2/GPIO32 83 EC_MUTE# 2
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_EN# EC_MUTE# [28]
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 EC_SLP_S4#_R1 1 R1098 2 USB_EN# [30,32]
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_SLP_S4# [33,8]
KSI6 PS2 Interface 0_0402_5% @
62 KSI6/GPIO36 EAPD/GPIO4D 87 CMOS_ON# [23]
KSI7 TP_CLK
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK [32]
KSO0 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA [32]
KSO1 40
KSO2 41 KSO1/GPIO21 +3VALW_EC
KSI[0..7] KSO3 42 KSO2/GPIO22 97 EC_SLP_S3#
[32] KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 EC_SLP_S3# [8]
KSO4 43 98
KSO[0..17] 44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 HDD_DETECT# [31]
KSO5 ME_EN
[32] KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH1
ME_EN [7]
KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH1 [38]

2
KSO7 46 SPI Device Interface
KSO8 47 KSO7/GPIO27 @ @
KSO9 48 KSO8/GPIO28 119 R696 R697
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 10K_0402_5% 10K_0402_5%
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126
SPI Flash ROM

1
KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 VCIN0_PH1
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A VCIN1_ADP_PROCHOT
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 EC_BT_OFF# [27]
KSO16
KSO17 82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_CHG_LED# WLAN_PWR_ON# [27]
BATT_CHG_LED#/GPIO52 91 BATT_CHG_LED# [32]
CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# [32]
77 GPIO 92 PWR_LED#
[38,39] EC_SMB_CK1 EC_SMB_CK1/GPIO44 PW R_LED#/GPIO54 PWR_LED# [32]
Charger and BATT 78 93 BATT_LOW_LED#
[38,39] EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW _LED#/GPIO55 95 BATT_LOW_LED# [32]
SM Bus SYSON
[13,14,31,9] EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON [41]
VR_ON
[13,14,31,9] EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON [45]
127
PM_SLP_S4#/GPIO59

3 3
6 100 EC_RSMRST#
[23] TS_DISABLE# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# [8]
EC_LID_OUT#
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# [8]
15 102 VCIN1_ADP_PROCHOT +1.05VS
[40,42] 3V/5VALW_PG 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCIN1_ADP_PROCHOT [38]
VCOUT1_PROCHOT#
[45] VGATE GPIO0A H_PROCHOT#_EC/GPXIOA06 VCOUT1_PROCHOT# [38]
17 104
[38] PTC_PROTECT GPIO0B VCOUT0_PH/GPXIOA07 VCOUT0_MAIN_PWR_ON [40]
18 GPO 105
[6] SOC_ENBKL GPIO0C BKOFF#/GPXIOA08 EC_BKOFF# [23]
R1099 1 2 EC_SLP_S4#_R2 19 GPIO 106
[33,8] EC_SLP_S4# 25 GPIO0D PBTN_OUT#/GPXIOA09 107 BATT_LEN# [38]
0_0402_5% RS@ ODD_DA# [31] NUVOTON_VTT R187 1 @ 2 0_0402_5%
28 EC_INVT_PW M/GPIO11 PCH_APW ROK/GPXIOA10 108
[31] FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
[38] ADP_65 30 EC_PME#/GPIO15
[27,32] E51TXD_P80DATA 31 EC_TX/GPIO16 110 VCIN1_AC_IN
[27,32] E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01 VCIN1_AC_IN [32,39,8]
32 112 EC_ON
[8] PMC_CORE_PWROK 34 PCH_PW ROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON [40]
ON/OFF# VCOUT1_PROCHOT# R181 1 RS@ 2 0_0402_5%
[32] NOVO# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFF# [32]
GPI LID_SW#
[32] NUM_LED# NUM_LED#/GPIO1A LID_SW #/GPXIOD04 LID_SW# [32]
116 SUSP#
SUSP#/GPXIOD05 117 SUSP# [10,34,41,43]
NUVOTON_VTT R182 1 RS@ 2 0_0402_5% H_PROCHOT# [7]
GPXIOD06 118 2 R12 1 [45] VR_HOT#
@
122 PECI_KB9012/GPXIOD07
AGND/AGND

0_0402_5%
[8] PBTN_OUT# XCLKI/GPIO5D

1
123 124 +V18R D
+3VALW
GND/GND
GND/GND
GND/GND
GND/GND

[26,27] PCIE_LAN_WAKE# XCLKO/GPIO5E V18R 2


1 VCOUT1_PROCHOT# 1
GND0

G @
C515 Q12 S C193

3
4.7U_0603_6.3V6K 2N7002H_SOT23-3 47P_0402_50V8J
1 2 PCIE_LAN_WAKE# KB9012QF-A4_LQFP128_14X14 2 9012@ 2
11
24
35
94
113

69

R213 10K_0402_5% Part Number = SA000079Y00


288N P2P KB9012 ECAGND
1 2 HDD_DETECT# Latest design guide suggest change to
R488 100K_0402_5%
74LVC1G06.
4 4

+3VS

1 2 FAN_SPEED1
R214 10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 33 of 47
A B C D E
A B C D E

+3VALW
VIH=1.2~5.5V Rise Time:
3.3V@100k/0.1uF=3.538ms 1 2 3.3V@330pF = 889.68us
C1143 @ U11 JP36JP@
3.3V@120k/0.1uF=4.272ms 1U_0402_6.3V6K 1 14 +3VS_OUT
5.0V@330pF = 1348us
VIN1 VOUT1 +3VS
R927 2 13
100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118
1 SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K 1
ON1 CT1 C1138 2 1@ .1U_0402_16V7K
C980 2 1 +5VALW 4 11
.1U_0402_16V7K VBIAS GND C1139 2 1@ .1U_0402_16V7K
1 2 5VS_ON 5 10 2 1
R926 ON2 CT2 330P_0402_50V7K
0701 update 120K_0402_5% 6 9 C967 JP37JP@
+5VALW VIN2 VOUT2
1 2 7 8 +5VS_OUT +5VS
C979 VIN2 VOUT2
.1U_0402_16V7K 1 2 15 JUMP_43X118
C1144 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

+1.8VALW
VIH=1.2~5.5V Rise Time:
3.3V@82k/0.1uF=3.042ms 1 2 1.8V@330pF = 485.28us
C1145 @ U59 JP38JP@
3.3V@47k/0.1uF=1.893ms 1U_0402_6.3V6K 1 14 +1.8VS_OUT 1.35V@330pF = 363.96us
VIN1 VOUT1 +1.8VS
R1055 2 13
82K_0402_5% VIN1 VOUT1 C1123 JUMP_43X79
SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1 C1124 2 1@ .1U_0402_16V7K
C1125 1 2 4 11
2 +5VALW VBIAS GND 2
0701 update .1U_0402_16V7K C1126 2 1@ .1U_0402_16V7K
2 1 1.35VS_ON 5 10 2 1
R1056 ON2 CT2 330P_0402_50V7K
47K_0402_5% 6 9 C1127 JP39JP@
+1.35V VIN2 VOUT2
1 2 7 8 +1.35VS_OUT
VIN2 VOUT2 +1.35VS
C1128
.1U_0402_16V7K 1 2 15 JUMP_43X79
C1146 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

+1.0VALW TO +1.0VS +5VALW


+0.675VS
0708:Change to SB00000PZ00 / need apply footprint

1
+1.0VALW U60 +1.0VS R1057
ME4856_SO8 100K_0402_5% @
8 1 R1053
2 7 2 2 22_0603_5%

1
C1129 6 3 C1130 2 SUSP

2
3 4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K 3
C1080 +0.675VS_R

1
1 1
.1U_0402_16V7K
4

1
1 D
@ESD@
@ 2 D
[10,33,41,43] SUSP# 2
R1052 G Q69 SUSP

1
470_0603_5% S 2N7002K_SOT23-3 G
+5VALW R1059 @ Q72 S
1

3
10K_0402_5% 2N7002K_SOT23-3

3
2 1 1.0VS_GATE +1.0VS_R
1

0618 update R1061

2
10K_0402_5% 1@ D
1

C1131 2 SUSP
D .1U_0402_16V7K G
SUSP 2 S Q71 @
G 2 2N7002K_SOT23-3
3

Q70 S
2N7002K_SOT23-3
3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 34 of 47
A B C D E
5 4 3 2 1

For UMA Every power trace need:


UG1 UMA@
W=20mils

D SLG3NB244VTR_TQFN16_2X3 D

SA000057I00 +RTCBATT

+CHGRTC_R

ESD Request

1
1
+3VLP RG12 CG20

2
390_0402_5% 0.1U_0402_16V7K
DVT, NO.10 +3VALW GCLK@ GCLK@ RG10 @
2
0_0402_5%

2
+1.05VS +3VALW +3VS_VGA

1 RS@
1

1
CG3 GCLK@

1
22U_0603_6.3V6M

+GCLK_VBAT
0_0402_5%
GCLK@1 1
2

GCLK304@
CG2
For DIS
1

RG9

0_0402_5%2 RG8

0.1U_0402_16V7K
RS@ CG4
2.2U_0402_6.3V6M

2
0_0402_5% 2 UG1 2 GCLK@
RG11
GCLK@ 1 10 14
For EMI
2

CG6 VBAT VDD_RTC_OUT


GCLK@ 1 0.1U_0402_16V7K 15
CG5 GCLK@ +V3.3A
C 2 C
0.1U_0402_16V7K

2 1 +3VS_GCLK 2
GCLK@ 1 CG1 VDD 9 GCLK_32K_R RG1 1 2 0_0402_5% GCLK_32K
CG7 2 0.1U_0402_16V7K 32kHz GCLK@
GCLK_32K [8] SOC_32.768K
0.1U_0402_16V7K

VGA_GCLK 11 12
2 VDDIO_27M 27MHz
8
VDDIO_25M_A 25MHz_A
6 GCLK_LAN_25MHZ_R RG3 1
GCLK@
2 33_0402_5%GCLK_LAN_25MHZ
GCLK_LAN_25MHZ [26] LAN
PCH_GCLK 3
VDDIO_25M_B 25MHz_B
5 GCLK_PCH_25MHZ_R RG4 1
GCLK@
2 0_0402_5% GCLK_PCH_25MHZ
GCLK_PCH_25MHZ [8] SOC_25M
GREENCLK_XTALI 1
YG1 GREENCLK_XTALO 16 XTAL_IN
XTAL_OUT
Close to GCLK

GND1
GND2
GND3

GND4
4 3
NC OSC
1 2
OSC NC DVT, NO.8 SLG3NB304VTR_TQFN16_2X3

4
7
13

17
1 GCLK@ 1
GCLK@ CG8 25MHZ_10PF_7V25000014 GCLK@ CG9 GCLK304@
15P_0402_50V8J 12P_0402_50V8J SA000063300
2 2

B B

Reserved for Swing Level adjustment


( Close GCLK side )
EMI@
GCLK_27MHZ RG5 1 2 5P_0402_50V8J

EMI@
GCLK_LAN_25MHZ RG6 1 2 5P_0402_50V8J

EMI@
GCLK_PCH_25MHZ RG7 1 2 5P_0402_50V8J

For EMI
A A

Security Classification Compal Secret Data


Issued Date 2012/10/11 Deciphered Date 2014/10/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P35-GCLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 35 of 47
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW RIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 36 of 47
5 4 3 2 1
A B C D

PL101
VIN
HCB2012KF-121T50_0805
20131023
1 2 Change PL101 to SM01000C000*2 from SM010008E10
PF101 PL102
JDCIN1 7A_24VDC_429007.WRML HCB2012KF-121T50_0805
1 APDIN 1 2 APDIN1 1 2
1 1 2
1

2 3
3

1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J
4
4 5
5

1
PC101

PC102

PC103

PC104
ACES_88299-0510
@CONN@

2
PQ101A
PR101 2N7002KDW-2N_SOT363-6
2 1 6 1
+3VALW ADP_ID [33]

680P_0603_50VK
0.1U_0402_16V7K
750_0402_1%

1
PC105

PC106
100K_0402_1%

2
PR102

VIN 2 1
2N7002KDW-2N_SOT363-6
1

2 2
100K_0402_1%

PQ101B
PR103

5
ADP_ID_CLOSE [33]
2

+CHGRTC
PR104
1K_0603_5%
1 2
PD101 +3VLP
S SCH DIO BAS40CW SOT-323
3
2 +CHGRTC_R JBATT1 3

+RTCBATT 1
3 PR105
1K_0603_5%
1 2 1 2
+ -

LOTES_AAA-BAT-019-K01
@CONN@

RTC Battery

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-DCIN/PRECHARGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M
Date: Sheet 37 of 49
A B C D
5 4 3 2 1

PL201
20131023 Posestor +3VLP
HCB2012KF-121T50_0805
1 2
Change PL201 to SM01000C000*2 from SM010008E10

1
@ PR202
@PR202 @ PR203 @ PR204
@PR204 @ PR205 @ PR206 @ PR207 @ PR208

2
VMB2 VMB

100K_0402_1%
PR209
1 2 1 2 1 2 1 2 1 2 1 2 TMSNS21 2
VL
PF201 PL202 VL PR210 @
JBAT1 12A_65VDC HCB2012KF-121T50_0805 1K_0402_50% 1K_0402_50% 316K_0402_1% 100K_0402_1%
1 1 2 1 2 1K_0402_50% 1K_0402_50% 1K_0402_50% 1K_0402_50% @
BATT+

2
1 2

1
2

1
3 EC_SMCA @ PR212 @ PR213 @ PR214 @ PR215 @PR216
@ PR216
3 4 EC_SMDA @ PR211 1 2 1 2 1 2 1 2 1 2 MOS_OTP [40]
4 5
5 0_0402_5%
6 1K_0402_50% 1K_0402_50%
6 1K_0402_50% 1K_0402_50% 1K_0402_50%

1
7

2
7

1
100_0402_1%

100_0402_1%
D 8 D
GND 9 PC201 PC202 @ PU202 @ PQ202
GND 1000P_0402_50V7K 0.01U_0402_25V7K @ PC203 1 8 TMSNS1 2N7002KW_SOT323-3

2
VCC TMSNS1

1
D

PR201

PR217
2

2
@CONN@ 2 7 PTC_PROTECT2
0.1U_0603_25V7K GND RHYST1 G

1
OT1 3 6 TMSNS2 S

3
JBAT3 OT1 TMSNS2
1 2 [33] PTC_PROTECT 4 5
3 1 2 4 OT2 RHYST2
5 3 4 6 EC_SMB_CK1 [33,39]
G718TM1U_SOT23-8
MOS_OTP:
5 6
7
9 7 8
8
10 EC_SMB_DA1 [33,39] Default:High
11 9
11
10
12
12 1 2
+3VLP
Active :Low
13 14 PR218
15 13 14 16 16.49K_0402_1%
2
17 15 16 18 PR219
+3VALW PTC_PROTECT:
19 17 18 20 @ 6.49K_0402_1% PH201 under CPU botten side : Default:Low
21 19 20 22 1 2
23 21 22 24 PR220
VCIN1_BATT_TEMP [33,38] CPU thermal protection at 93 +-3 degree C Active :High
25 23 24 26 10K_0402_5%
27 25 26 28
A/D Recovery at 56 +-3 degree C 20120314
29 27 28 30
29 30 Change to +EC_VCCA from +3VLP
31 32
GND GND

@CONN@ VL +5VALW +EC_VCCA


[33,39] ADP_I

16.5K_0402_1%
1
[33] VCOUT1_PROCHOT#
2

10K_0402_1%

PR221
C C

2
30K_0402_1%
@ PR234 PR235
+3VALW

PR222
0_0402_5% 0_0402_5%

PR223

2
1

@ [33] VCIN0_PH1

1
2
VL PR224

1
PC204 PR225 100K_0402_1% [33] VCIN1_ADP_PROCHOT PH201
1

2
100K_0402_1%_TSM0B104F4251RZ

3 1
1

0.01U_0402_25V7K 100K_0402_1%
BATT_OUT [39]
PR228 PR226 PR227
2

2
2

75K_0402_1%
75K_0402_1% 47K_0402_1% 100K_0402_1%

1
PQ201B

1
PR229
5 2N7002KDW-2N_SOT363-6
2

PC205
1

4
8

0.068U_0402_16V7K

2
[33,38] VCIN1_BATT_TEMP 3 PQ201A
P

+ 1 1 2 2 2N7002KDW-2N_SOT363-6 ECAGND
2 O
1N4148WS-7-F_SOD323-2

- VCIN1 setting
G

2
PD201

PU201A
1
1

1
AS393MTR-E1 SO 8P OP D
Trigger point is 1.0V at 65W
4
2

2 PQ205
PR232 PR231 G 2N7002KW_SOT323-3
Recovery point is 0.692V at 45W
1

100K_0402_1% S
1

3
PC206 1.5M_0402_5%
2

100P_0402_50V8J
1

+3VLP
2

B B
PR233
[33] ADP_65
100K_0402_1% ECAGND
1

D
2 PQ204
[33] BATT_LEN#
G 2N7002KW_SOT323-3
S
3

A A

135W: 150W(Turbo_V=1.2) active 135W(Turbo_V=1.072) recovery


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/01/15 Deciphered Date 2015/01/15 Title
90W : 100W(Turbo_V=1.2) active 90W(Turbo_V=0.903) recovery PWR-BATTERY CONN/OTP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
65W : 70W(Turbo_V=1.2) active 65W(Turbo_V=0.918) recovery AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Bay Trail M 0.1
45W : 65W(Turbo_V=1.2) active 45W(Turbo_V=0.829) recovery MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 38 of 49
5 4 3 2 1
5 4 3 2 1
AO4407AL Vds=-30V AO4423L Vds=-30V
Rds_on=12.7~17mohm@Vgs=-6V Rds_on=9.4~12mohm@Vgs=-6V
P3
B+ Need EC write ChargeOption() bit[8]=0
ID = 10A (Ta=70C) P2 ID = 12.1A (Ta=70C) to disable iFault_Hi function.
PQ301 Power Rating = 1W Isat: 4A
PQ302
AO4407AL_SO8 VACP~VACN spec < 80.64mV DCR: 27mohm
AO4455_SO8 AO4407AL Vds=-30V
8 1 1 8 PR302
VIN 7 2 2 7 0.01_1206_1% EMI@ PL301 CHG_B+ Rds_on=12.7~17mohm@Vgs=-6V
6 3 3 6 1UH_NRS4018T1R0NDGJ_3.2A_30% ID = 10A (Ta=70C)
5 5 1 4 1 2 PQ303
AO4407AL_SO8
2 3 1 8
SH00000MW00

4
2 7

2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
3 6

PC305

PC304

@EMI@ PC306

EMI@ PC307
PQ304 5
D D
1 2
47K_0402_5%

@EMI@ PC303
1

1
10U_0805_25V6K

200K_0402_1%
0.1U_0603_25V7K

4
1
PR301

DTA144EUA_SC70-3 PC302 @RF@PC324


@RF@PC324 DISCHG_G

PC301

PR303
5600P_0402_25V7K 22P_0402_25V8K~N

2
PR304
ACDET 200K_0402_1%
2

2
2 1 2

2
3 CELL: PR313 = 64.9k ACN VIN

2ACOFF-1
Typ Worst

1
1

L => H 16.896V 17.065V ACP PR305

1DISCHG_G-1
H => L 16.509V 16.199V 47K_0402_1%

1SS355_UMD2-2
1

1
V1

PD302
P2-1 PR306

2
2 4 CELL: PR313 = 59.0k 200K_0402_1%
PQ305 Typ Worst PC308 PC309 PQ306

1
0.1U_0402_25V6 0.1U_0402_25V6 DTC115EUA_SC70-3
L => H 18.346V 18.529V

2
DTC115EUA_SC70-3 PR307 1 2 1 2
20K_0402_1% H => L 17.925V 17.589V PD303
3

1SS355_UMD2-2
2 2 1 2
6

2N7002KW_SOT323-3
1

[32,39] ACPRN# PQ309


150K_0402_1%

1
PR308

PQ307A D PQ308 2N7002KW _SOT323-3

0.1U_0603_25V7K

1
2 2N7002KDW -2N_SOT363-6 2 ACPRN# P2 D
BATT_OUT [38,39]

1
PC311
G PC310 Rds(on) = 30mohm max 2PACIN_2
1 2 G
Vgs = 20V
1

S VIN
3

2
Vds = 30V S

3
0.1U_0402_25V6
392K_0402_1%
1 ID = 7A (Ta=70C)
P2-2

PACIN_2

5
C C
PR309

10_1206_5%
2N7002KDW-2N_SOT363-6

PR310

AON7408L_DFN8-5
3
PQ307B

ACOK

CMPIN

CMPOUT

ACP

ACN
PR311 PR312 [33,38] ADP_I @
PR313
2

PQ310
47K_0402_1% 59K_0402_1% 21

2
PACIN 1 2 5 1 2 6 TP 1 2 4
ACDET PC314
4.7uH DCR = 35+/- 15% mohm
PC313 20 BQ24737VCC 1 2 Power Rating = 1W
20130905 Idc~Isat = 5.5~6 A
4

PC312 1 2 7 VCC 0_0402_5%


IOUT VACP~VACN spec < 81.28mV
Change to AC_OFF from ACOFF 1 2 PL302 PR314

3
2
1
1U_0603_25V6K
1

PQ311 2200P_0402_25V7K 100P_0603_50V8 19 4.7UH_ETQP3W4R7WFN_5.5A_20% 0.01_1206_1%


PHASE
DTC115EUA_SC70-3
[33,38] EC_SMB_DA1
8
SDA
PU301
1 2CHG 1 4
BATT+
Make sure BQ24727RGRR_VQFN20_3P5X3P5 LX_CHG
18 DH_CHG
there is pull HIDRV

5
1 PR315 2 ACOFF-1 2 9

@EMI@ PR318
2 3
SA000051W00

AON7408L_DFN8-5
[33] AC_OFF SCL

1
high for SMB[33,38]
on EC_SMB_CK1 PR316 PR317

4.7_1206_5%
10K_0402_1% HW side! 316K_0402_1% 2.2_0603_5% PC315
2

1 2 10 17 BST_CHG 1 2 1 2 SRP SRN

10U_0805_25V6K

10U_0805_25V6K
ILIM BTST
1

16251_SN
@ PR319 +3VLP 100K_0402_1%
PD301
3

PQ312
PR320

Make sure this pull high 0.047U_0603_16V7K 4

LODRV
0.01U_0402_25V7K

0_0402_5%
PC316

2
1

1
16 2 1

PC317

PC318
GND
Voltage is same with EC VCC

SRN

SRP
REGN

BM
1

680P_0603_50V7K
2

2
RB751V-40_SOD323-2

@EMI@ PC320
2N7002KW_SOT323-3

11

1 12

13

14

15

3
2
1
1

1
10_0603_5%
6.8_0603_5%

2
1

PR321
PQ313 D PC319
2
PR322
39] BATT_OUT
VILIM = 20 X (VSRP - VSRN) BM# 1U_0603_16V7 BQ24737VDD

2
G = 20 X ICHG X RSR
S 2
3

2
1

DL_CHG
PC321
B @ PR323 B
Battery out function just for C38/A39 only, 10K_0402_5% 1 2
other customers please remove
PQ313,PQ314,PR310,PR326
2

0.1U_0402_25V6
1

1
PC322
0.1U_0402_25V6 @ PC323
2

+3VALW 2 0.1U_0402_25V6
**Design Notes**
Maximum Charging current 2.0A BQ24737VDD
Battery discharge power 55W.
#Register Setting PR324
10K_0402_1% VCIN1_AC_IN [32,33,8]
1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke

1
1 2
2. 0X12 bit3 set 1 (default 0) to enable turbo boost function Module model information PR326
3. 0X12 bit[12:11] set 00 (default 11) to set BAT PR325 10K_0402_1%
47K_0402_1%
Depletion Comparator Threshold BQ24737_V1.mdd for dual layer PACIN
20130905

2
Falling Threshold = 59.19% of voltage regulation limit (~2.486V/cell)
4. Disable turbo when AC only Change to VCIN1_AC_IN from ACIN

1
#Circuit Design

1
D
1. Make sure there is pull high for SMB on HW side PR327
ACPRN# 2 PQ314 12K_0402_1%
2. Use 10X10 choke and 3X3 H/L side MOSFET [32,39] ACPRN#
G 2N7002KW _SOT323-3

2
Charge current 2.0A S

3
Power loss : 1.82W 20131028
Power density : 0.81 (15X15) 1.Change PQ314 to SB000009Q80 2N7002 from BJT SB301150200
A 3. If use 4S per cell 4.35V battery, need change PR313 to 59K for ACDET setting) A
4. For hybrid design, need double check PQ301,PQ302,PQ303,PQ309 component rating For disable pre-charge circuit
#Protect function
1. ACOVP : ACDET voltage > 3.15V
2. Charger timeout : No communication within 175s(default)
3. ACOC : 3.33 X Input current DAC setting(default) Security Classification Compal Secret Data Compal Electronics, Inc.
4. CHGOCP : 3/4.5/6A based on current current setting Issued Date 2012/07/24 Deciphered Date 2012/07/24 Title
5. BATOVP : 104%
6. BATLOWV : 2.5V THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger_BQ24727
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
7. TSHUT : 155C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS BE_BDW 0.1
8. IFAULT HI : 750mV (default) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 39 of 49
9. IFAULT LOW : 135mV (default)
5 4 3 2 1
A B C D E

Module model information


SY8208B_V2.mdd

1 EN1 and EN2 dont't floating 1


20130905
Change to 3V/5VALW_PG from SPOK
PR402
20131023 499K_0402_1%
Add PR413 to SD028100380 100K_0402_5% ENLDO_3V5V 1 2
B+

1
150K_0402_1%
PU401 PC402 PR404
B+

PR403
EMI@ PL401 7 1 3V5V_EN 0.01U_0402_25V7K 1K_0402_5%
HCB2012KF-121T50_0805 IN EN1 1 2 1 2

2200P_0402_50V7K
1 2 3V_VIN 8 3 3V_FB
IN EN2 PR401 PC403

2
10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
6 1
BST_3V 2 1 2
BS
1

1
PC406
C406
2.2_0603_5%
@EMI@ PC401

PC404

PC405
0.1U_0603_25V7K
@
@P PL402
2

2
+3VALWP
EMI@
10 LX_3V 1 2
LX +3VALWP
2

9 4 1.5UH_PCMB053T-1R5MS_6A_20%
GND OUT

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PR405
PR413

1
680P_0603_50V7K 4.7_1206_5%
100K_0402_5% 2 5
PG LDO +3VLP

@EMI@

PC407

PC408

PC409

PC410
1
SY8208BQNC_QFN10_3X3
1

2
PC411
[33,42] 3V/5VALW_PG

1 3V_SN
4.7U_0603_6.3V6M

2
Check pull up resistor of SPOK at HW side

@EMI@ PC412
3.3V LDO 150mA~300mA

2
2 PR406 2
2.2K_0402_5%
Vout is 3.234V~3.366V
1 2
[33] EC_ON @ PR407 TDC=6A
0_0402_5%
1 2
[33] VCOUT0_MAIN_PWR_ON @ PJ401
+3VALWP 1 2 +3VALW
1 2 1 2
[38] MOS_OTP 0_0402_5% JUMP_43X118
@PR408
@ PR408 3V5V_EN
1M_0402_1%

4.7U_0402_6.3V6M

20130905
1

EC VDD0 is +3VL, PC13 UNPOP


1

Change PC407,PC408,PC409,PC410,PC421,PC422,PC423,PC424
PR409

PC413

EC VDD0 is +3VALW, PC13 POP


to SE00000M000 S CER CAP 22U 6.3V M X5R 0603
2

from SE000000I10 S CER CAP 22UF 6.3V M X5R 0805 H1.25


2

B+ EMI@ PL403 EN1 and EN2 dont't floating


HCB2012KF-121T50_0805
1 2 5V_VIN

Vout is 4.998V~5.202V
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

PU402 PC414 PR410 TDC=6A


8 1 3V5V_EN 6800P_0402_25V7K 1K_0402_5%
IN EN1 1 2 1 2
1

1
PC415

PC417
C417

EMI@ PC418

@EMI@ PC416

3 5V_FB PR411 PC419


3 EN2 2.2_0603_5% 0.1U_0603_25V7K 3
@
@P 6 BST_5V 1 2 1 2
2

BS

PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
5V_VCC 5 4 1.5UH_PCMB053T-1R5MS_6A_20%
VCC OUT
1

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
@EMI@ PR412

680P_0603_50V7K 4.7_1206_5%

1
2 7
PG LDO VL
1

PC420

PC421

PC422

PC423

PC424

PC427
4.7U_0603_6.3V6M

SY8208CQNC_QFN10_3X3

2
1 5V_SN

@ PJ402
2

2
1

PC425
4.7U_0603_6.3V6M

<BOM Structure> +5VALWP 1 2 +5VALW


1 2
JUMP_43X118
2

@EMI@ PC426
2

Module model information 5V LDO 150mA~300mA

SY8208C_V2.mdd

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALW/+5VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 40 of 49
A B C D E
5 4 3 2 1

Module model information


RT8207M_V1.mdd For Single layer
RT8207M_V2.mdd For Dual layer

D D

Pin19 need pull separate from +1.35VP.


If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
EMI@ PL501 you can change from +1.35VP to +1.35VS. TDC 0.7A
HCB2012KF-121T50_0805
B+ 1 2 1.5V_B+ PR501 Peak Current 1A
2.2_0603_5%
BST_1.5V 1 2 BOOT_1.5V

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
+1.35VP
1

1
PC501

PC502

PC503

PC504
DH_1.5V +0.675VSP
2

2
EMI@
@EMI@

SW _1.5V

10U_0805_6.3V6K

10U_0805_6.3V6K
1

1
PC505

PC506

PC507
5
0.1U_0603_25V7K

16

17

18

19

20
2
C PU501 C

2
VLDOIN
PHASE

UGATE

BOOT

VTT
21
20131023 PQ501 PAD
Change PC509 to SF000006B00 from SF000002000 AON7408L_DFN8-5 4 DL_1.5V 15
LGATE VTTGND
1

for common part Change CS R to your estimation value


14 2
PL502 PR502 PGND VTTSNS

1
2
3
1UH_VMPI0703AR-1R0M-Z01_11A_20% 11K_0402_1%
1 2 1 2 CS_1.5V 13 3
+1.35VP PC508 CS RT8207MZQW _W QFN20_3X3 GND
1

1U_0603_10V6K

5
1 2 12 4 +VTTREFP
@EMI@ PR503 PR504 VDDP VTTREF
ESR=9m ohm

4.7_1206_5% 5.1_0603_5%
330U_6.3V_M

1 1
330U_D2_2V_Y

1 2 VDD_1.5V 11 5
+5VALW +1.35VP
1 2

VDD VDDQ

1
+ +

PGOOD
PQ502
PC509

PC510

ESR=15m ohm AON7506_DFN8-5 4 PC512

TON
1
@EMI@ PC511 0.033U_0402_16V7K

FB
S5

S3

2
2 2@ 680P_0402_50V7K PC513
+5VALW
2

1U_0603_10V6K

10

6
+1.35VP
1
2
3

1 2

FB_1.5V
EN_0.75VSP
TON_1.5V
PR505 100K_0402_5% PR506

EN_1.5V
20130906 8.2K_0402_1%
1. Change to DDR_PWROK from PGOOD_1.35V
[5] DDR_PW ROK PR507 1 2 +1.35VP
887K_0402_1%
B B
2..Change PR505 pull high to +1.35VS from 3VALW 1.5V_B+ 1 2 Change FB Rtop to 8.2K for 1.35V
MOSFET: 3x3 DFN

1
Co-Lay H/S Rds(on): 27mohm(Typ), 34mohm(Max)
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C @ PR509 PR508
0_0402_5% 10K_0402_1%
1 2
[33] SYSON

2
Mode Level +0.675VSP VTTREF_1.35V L/S Rds(on): 9.9mohm(Typ), 13mohm(Max)
S5 L off off Idsm: 13.5A@Ta=25C, 11A@Ta=70C

1
@ PC514
S3 L off on 0.1U_0402_10V7K
S0 H on on Choke: 7x7x3

2
Rdc=8.3mohm(Typ), 10mohm(Max)
Note: S3 - sleep ; S5 - power off PR510
200K_0402_5%
Switching Frequency: 285kHz 1 2 @ PJ501
Ipeak=10A [10,33,34,43] SUSP# +1.35VP 1 2 +1.35V
1 2
Iocp~13A

1
JUMP_43X118
OVP: 110%~120% PC515 @ PJ502
MOSFET footprint: SIS412DN 0.1U_0402_10V7K 1 2

2
1 2
JUMP_43X118

20130924 PJ503 @
1 2
1. Change PR510 to 200K SD028200380 +0.675VSP 1 2 +0.675VS
A Pop PC515 JUMP_43X39 A

Security Classification Compal Secret Data


Title
Compal Electronics, Inc.
Issued Date 2010/07/20 Deciphered Date 2012/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.35VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 41 of 49
5 4 3 2 1
A B C D

Module model information 20130913


Need to change PC702 to 0603 from 0805
SY8032_V1.mdd
Imax= 2A, Ipeak= 3A
PC601
22U_0603_6.3V6M
FB=0.6V
1 2
@ PL601
PJ601
JUMP_43X79 1UH_PH041H-1R0MS_3.8A_20%
+3VALW 1 2 4 3 LX_1.8V 1 2
1 2 @ PR601 100K_0402_5% IN LX +1.8VALWP
1 2 1.8V_PGOOD5 2

68P_0402_50V8J
1
+3VALW PG GND 1

1
6 1

PC602

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
1

PC603

PC604
2
PR604 @EMI@ PR602 PR603

2
20K_0402_5% 4.7_0603_5% 20K_0402_1%
1 2 +1.8VSP_ON
[33,40,42] 3V/5VALW_PG

2
Rup

2
PU601

0.1U_0402_16V7K
1

PC605
SY8032ABC_SOT23-6

1
PR605 FB_1.8V
20130905 1M_0402_1% @
PJ602
Change to 3V/5VALW_PG from SPOK

1
1 2
+1.8VALWP +1.8VALW

2
@EMI@ PC606 1 2
680P_0402_50V7K PR606

2
10K_0402_1% JUMP_43X79
20130924 Rdown
20130905

2
Change PR604 to 20K SD028200280
Pop PC605 to 0.1u Change PC603,PC604,PC617,PC618
Note: to SE00000M000 S CER CAP 22U 6.3V M X5R 0603
When design Vin=5V, please stuff snubber from SE000000I10 S CER CAP 22UF 6.3V M X5R 0805 H1.25
to prevent Vin damage
Vout=0.6V* (1+Rup/Rdown)

20130924
2
1.Change PR607 to 10K SD028100280 2

EN pin don't floating Pop PC607 to 0.1U_0402_16V7K SE076104K80


SY8206D_V1.mdd If have pull down resistor at HW side, pls delete PR2
PR607
10K_0402_5%
Module model information 1 2
20130905
3V/5VALW_PG [33,40,42]
Change to 3V/5VALW_PG from SPOK

1
PC607
1M_0402_1%
0.1U_0402_16V7K

2
PR608

2
@EMI@ PR609 @EMI@ PC612
4.7_1206_5% 680P_0603_50V7K
EMI@ PL602 1 2SNB_1.0V 1 2
HCB2012KF-121T50_0805 PU602
B+ 1 2 B+_1.0V 8
IN EN
1 PR610
2.2_0603_5%
PC609
0.1U_0603_25V7K
10U_0805_25V6K

10U_0805_25V6K

6 BST_1.0V1 2 1 2 PL603
2200P_0402_50V7K

0.1U_0402_25V6

BS
1

1
PC610

PC613

PC611

1UH_PCMB063T-1R0MS_12A_20%
LDO_3V_1.0V
+1.0VALWP
PC608

9 10 LX_1.0V 1 2
GND LX
@EMI@
2

2
EMI@

13.7K_0402_1%

47U_0805_6.3V6M

47U_0805_6.3V6M
1

330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
4

PR612
FB

PC614

PC615

PC616

PC617

PC618
@ PR611
3

0_0402_5% ILMT_1.0V 3 7
Rup 3

+3VALW

2
ILMT BYP
4.7U_0603_6.3V6K
2

2
ILMT_1.0V
+3VALW 1 2 +1.0V_PGOOD 2 5 LDO_3V_1.0V
4.7U_0603_6.3V6K

PG LDO
1

PC620

PR613
1

PC619

10K_0402_5% SY8206DQNC_QFN10_3X3
@ PR614 FB = 0.6V
2

1
0_0402_5%
2

PR615
Rdown
2

20K_0402_1%
+1.0VALW P PJ603

2
1 2
1 2 +1.0VALW
Pin 7 BYP is for CS.
The current limit is set to 6A, 8A or 12A when this pin Common NB can delete +3VALW and PC15 JUMP_43X118 @
is pull low, floating or pull high

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title
PWR-1.8VALW/1.0VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 42 of 49
A B C D
5 4 3 2 1

Module model information 20130913


Need to change PC702 to 0603 from 0805
PC702
Imax= 2A, Ipeak= 3A
22U_0603_6.3VAM FB=0.6V
1 2
PL701
+3VALW
PJ701
1
@
JUMP_43X79
2 4 3 LX_1.05V
1UH_PH041H-1R0MS_3.8A_20%
1 2
DIS:SY8003
1 2 @ PR704 100K_0402_5% IN LX +1.05VSP
D
1 2 5 2
UMA:SY8032 D

68P_0402_50V8J
+3VALW PG GND

1
PC701
6 1

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
1

PC704

PC705
2
PR701 @EMI@ PR703 PR702

2
2.55K_0402_1% 4.7_0603_5% 75K_0402_1%
1 2 +1.05VSP_ON
[10,33,34,41,43] SUSP#

2
Rup

2
PU701

0.1U_0402_16V7K
1

PC703
SY8032ABC_SOT23-6

1
@ PR710 FB_1.05V @
1M_0402_1% PJ702
1 2
+1.05VSP +1.05VS

2
1 2

1
2
@EMI@ PC624
680P_0402_50V7K PR705 JUMP_43X79

2
20130924 100K_0402_1% Rdown

2
Change PR701 to 2.55k 1% SD034255180 20130905
Pop PC703 to 0.1u Note: Change PR702 to 75K SD034750280
unpop PR710 When design Vin=5V, please stuff snubber PR705 to 100K SD034100380
to prevent Vin damage
Vout=0.6V* (1+Rup/Rdown)

C C
20130905
Change PC701,PC703,PC704,PC711
to SE00000M000 S CER CAP 22U 6.3V M X5R 0603
from SE000000I10 S CER CAP 22UF 6.3V M X5R 0805 H1.25

+1.8VS +5VALW

VFB=0.6V
1

2013/5/13
1

PC707
Change PR714 from 100kto 47k Vout=0.6V* (1+Rup/Rdown)
1

1U_0402_6.3V6K
Change PR720 from 47kto 100k JUMP_43X39
2
2

@ PJ703
Vout=1.011V
2

change input cap from 0805 to 0603


PC708 PU702
Ultra Low Dropout 0.23V(typical) at 3A Output Current
1

APL5930KAI-TRG_SO8
4.7U_0603_6.3V6K 6
5 VCNTL 3
2

PR706 9 VIN VOUT 4 @ PJ704


51K_0402_5% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS

1
1 2 8

17.8K_0402_1%
B [10,33,34,41,43] SUSP# EN B

1
7 2 JUMP_43X79
GND

POK FB

PR707
PC709
1

22U_0603_6.3V6M
0.01U_0402_25V7K
0.15U_0402_10V6K

Rup

1
PC710

PC711
@ PR708
2

100K_0402_1%

2
2

2013/5/13
Change PR716 from 47kto 100k PR709
20K_0402_1%
Rdown
2

20130924
Change PR706 to 51K SD028510280 Vout=0.8V* (1+Rup/Rdown)
Pop PC710 0.15U_0402_10V6K SE00000H300 Vout=1.512V
unpop PR708

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title
PWR-1.05VSP/1.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 43 of 49
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data


Title
Compal Electronics, Inc.
Issued Date 2012/04/19 Deciphered Date 2015/04/19
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 44 of 11
5 4 3 2 1
5 4 3 2 1

1
@ PC901
1000P_0402_50V7K SOC_VNN OCP is around 21A
[10] VGFX_VSNS
SOC_VCC OCP is around 19A

2
1
Power module of ISL95833 VR [10,45] VCORE_GSNS PC902
0.01UF_0402_25V7K

2
for 4.5W processor
CPU_B+

D PC903 PC904 D
180P_0402_50V8J
470P_0402_50V7K
PC905 1 2 1 2 1 2

10U_0805_25V6K

10U_0805_25V6K
6800P_0402_25V7K PR902

2200P_0402_50V7K
PC906 499_0402_1%
1 2

@EMI@ PC908
1000P_0402_50V8J

2
2K_0402_1%

PC909

PC907
1 2 1 2 1 2
PR903 PR904 @RF@ PC916

PR905

1
137K_0402_1% 2.05K_0402_1%
Close GFX choke 22P_0402_25V8K~N

1
@ PR901

21K_0402_1%
PH901 PR907 0_0603_5%
PR906

1
PR908
10K_0402_1%_B25/50 3370K 210_0402_1% 1 2UGATEG1-1
1 2 2K_0402_1%
VSUMG- UGATEG1

1 2
1
PR909 0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

1
PC911 2.2_0603_5%
PC910 1 2 1 2 BOOTG
+3VALW

D1

D1

D1

G1
2
470P_0402_50V7K PL902 +SOC_VNN

2
11K_0402_1%
0.1U_0402_25V4K 0.22UH_FDUE0640J-H-R2_25A_20%

0.033U_0402_25V7K
0.1U_0402_25V6K
1 2

1
10 9 1 4

2.61K_0402_1%

1.91K_0402_1%
PHASEG
D1 D2/S1

1
PC913
PR910

PC912
2 3
PR15 and PR27 PR911 BOOTG PQ901

G2
S2

S2

S2
2

1
AON7934_DFN3X3A-8-10

330U_D2_2V_Y

560U_D2_2V_Y
27.4K ohm for 100 degree 1 1

2
2 UGATEG1-1 PR913

1
+ +

PC914

PC915
@EMI@
61.9K ohm for 110 degree VSUMG+ PHASEG 4.7_1206_5% PR914

PR912
LGATEG 3.65K_0603_1%

1 2
2 2@
Close GFX L/S MOS LGATEG +5VALW PC917

2
PR915 PU901 @EMI@

33

32

31

30

29

28

27

26

25
Alert assert 27.4K_0402_1% 680P_0402_50V7K

VSUMG+

VSUMG-
threshold: 100C

ISUMPG

ISUMNG

RTNG

FBG

COMPG

PGOODG

BOOTG

UGATEG
PAD
C C
1 2 NTCG_1

1U_0402_6.3V6K
PH902 PR916

1
470K_0402_5%_B25/50 4700K 3.83K_0402_1%

1
1 2 1 2 NTCG 1 24 @ PR917 PR918
NTCG PHASEG

PC918
0_0402_5% 0_0402_5% 1_0402_5%
PR919 @1 2 2 23
20130905
[33] VR_ON

2
VR_ON LGATEG
1.Del PC940 33U_25V_M

2
2
1 PR920 2 VR_SVID_CLK_R 3 22
[8] VR_SVID_CLK
20_0402_1% SCLK VCCP 2.Change PC939 to 68U_25V_M_R0.36 SF000000W00
PR921 VR_SVID_ALERT# 4 ISL95833BHRTZ-T_TQFN32_4X4 21 CPU_B+
[8] VR_SVID_ALERT#
16.9_0402_1% ALERT# VDD from 33U_25V_M SF000005200 EMI@ PL901
1 2 VR_SVID_DATA_R 5 20 HCB2012KF-121T50_0805
[8] VR_SVID_DATA SDA PW M2 PC919 1 2
B+

1
6 19 LGATE1 1U_0402_6.3V6K
[33] VR_HOT# VR_HOT# LGATE1

33U_25V_M
0.1U_0402_25V6
10U_0805_25V6K

10U_0805_25V6K

68U_25V_M_R0.36
1 1

@EMI@ PC923
NTC 7 18 PHASE1

2
NTC PHASE1 + +
3.83K_0402_1%

For VR_HOT#, already


1

1
PC920

PC922

PC921

PC940
1 2 8 17

PGOOD
pull high at PWR side.

BOOT1
ISUMN
ISUMP
ISEN2 UGATE1

COMP
ISEN1

RTN
1

2 2
69.8_0402_1%

@ PC924 @ PR923 0_0402_5%


499_0402_1%

69.8_0402_1%

FB

2
1

PR922

47P_0402_50V8J
PR924

PR925

PR926

UGATE1-1
+5VALW
2

10

11

12

13

14

15

16
NTC_1
470K_0402_5%_B25/50 4700K

BOOT1 PR927
0_0603_5%
2

PR942 UGATE1 1 2 UGATE1-1


VGATE [33]
PH903

0_0402_5% PR928 0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A


1 2 27.4K_0402_1%
+1.0VS 1 2 +3VALW PR930

1
PC926 2.2_0603_5%
2

2
1

1 2 1.91K_0402_1% PR929 1 2 1 2 BOOT1


VR_Hot# assert

D1

D1

D1

G1
B B
+1.0VALW @ PC925 PL903 +SOC_VCC
@ PR943 0.1U_0402_16V7K 0.1U_0402_25V4K 0.22UH_FDUE0640J-H-R2_25A_20%
threshold: 100C
2

0_0402_5% 10 9 PHASE1 1 4
D1 D2/S1

1
2 3
Close CPU L/S MOS PQ902 PR931

G2
S2

S2

S2
AON7934_DFN3X3A-8-10 @EMI@

330U_D2_2V_Y

330U_D2_2V_Y
1 1
4.7_1206_5%

8
+ +

PC927

PC929
PC928 PR933 PR932

2
470P_0402_50V7K 2K_0402_1% 64.9K_0402_1% VSUM+

1
1 2 1 2 1 2

2.61K_0402_1%
LGATE1

1
PR935 2 2@

1
3.65K_0603_1%

PR934
PC930

11K_0402_1%
@EMI@
2K_0402_1%

PC931 PC932 680P_0402_50V7K


0.033U_0402_25V7K

2
1
PR937

470P_0402_50V7K 180P_0402_50V8J
0.1U_0402_25V6K

2
1

1
180_0402_1%

PC933

1 2 1 2 1 2
1

1
PR938

PR936
PC934

499_0402_1% 1
Close CPU choke
2

PR939

PH904 VSUM+
2

2
6800P_0402_25V7K

PR940 PC935 10K_0402_1%_B25/50 3370K


1
PC936

1.78K_0402_1% 1000P_0402_50V8J
1 2 1 2 1 2
2

PR941 VSUM-
2

137K_0402_1%
VSUM-
@ PC937
330P_0402_50V7K
1 2
A A

[10] VCORE_VSNS 1 2

PC938
0.01UF_0402_25V7K
[10,45] VCORE_GSNS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title
PWR-CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 45 of 49
5 4 3 2 1
5 4 3 2 1

22uF 0805 size change to 0603

D D

+SOC_VNN
+SOC_VCC
PC1002 1 2 22U_0603_6.3V6M
PC1001 1 2 22U_0603_6.3V6M PC1004 1 2 22U_0603_6.3V6M
PC1006 1 2 22U_0603_6.3V6M PC1007 1 2 22U_0603_6.3V6M
PC1009 1 2 22U_0603_6.3V6M PC1010 1 2 22U_0603_6.3V6M
PC1013 1 2 22U_0603_6.3V6M

PC1038 1 2 22U_0603_6.3V6M
PC1017 1 2 22U_0603_6.3V6M PC1039 1 2 22U_0603_6.3V6M
PC1018 1 2 22U_0603_6.3V6M PC1040 1 2 22U_0603_6.3V6M
PC1019 1 2 22U_0603_6.3V6M PC1041 1 2 22U_0603_6.3V6M
PC1020 1 2 22U_0603_6.3V6M PC1042 1 2 22U_0603_6.3V6M
PC1021 1 2 22U_0603_6.3V6M

+SOC_VCC +SOC_VNN
C C
PC1023 1 2 22U_0603_6.3V6M
PC1024 1 2 22U_0603_6.3V6M PC1025 1 2 22U_0603_6.3V6M
PC1026 1 2 10U_0603_6.3V6M
PC1027 1 2 10U_0603_6.3V6M
PC1028 1 2 1U_0402_6.3V6K
PC1029 1 2 22U_0603_6.3V6M PC1030 1 2 1U_0402_6.3V6K
PC1031 1 2 4.7U_0603_6.3V6K PC1032 1 2 1U_0402_6.3V6K

PC1033 1 2 2.2U_0402_6.3V6M @ PC1034 1 2 0.1U_0402_16V7K


PC1035 1 2 2.2U_0402_6.3V6M @ PC1036 1 2 0.1U_0402_16V7K
@ PC1037 1 2 0.1U_0402_16V7K

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE_CAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 46 of 49
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1of 2


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

1
D D

C
4 C

B B

A A
7

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/01 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 47 of 49
5 4 3 2 1

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