CONFERENCE SCHEDULE

DAY 1 - Friday (11.08.17)

Registration
08.30 AM 09.30 AM
(Venue : Ambedkar Auditorium, Technology Tower)
Conference Inauguration
09.30 AM 10.30 AM
(Ambedkar Auditorium)
10.30 AM 10.45 AM HI-TEA
Keynote 1: High Performance Ge pMOSFET with Interfacial Layer Keynote 2: Technology revolution - the small and smaller leading to the big and
Engineering Dr. K.S. Chang-Liao, Professor, National Tsing Hua bigger, Mr. Venkatraghavan Bringivijayaraghavan, Principal Member of Technical
10.45 AM 11.30 AM University, Taiwan Staff with the Product Development Engineering, GLOBALFOUNDRIES, Bangalore
(Ambedkar Auditorium) (Kamaraj Auditorium)
Technical presentation Session -1 Technical presentation Session 2 Technical presentation Session - 3
Nano-scale Device Modelling and process Technology Emerging Technologies in IOT Communication Technologies and Circuits 1
11.30 AM 1.00 PM Paper ID: 3, 47, 85, 95, 145, 146, 167, 168, 192, 229, 230 Paper ID : 76, 82, 87, 124, 154, 157, 162, 164, Paper ID : 43, 92, 104, 121,136, 158, 163, 169,
(Venue : Kamaraj Auditorium) 183, 191, 226, 261 176, 200
(Venue : TT725) (Venue : TT312)
1.00 PM 2.00 PM LUNCH
Keynote 3: Navigating the Perfect Storm Mr. Pradeep Salla, Applications Keynote 4: Multi-scale modeling of scaled CMOS devices Dr. Rajan Pandey,
2.00 PM 3.00 PM Engineering Manager FV Mentor, A Siemens Business Principal Member of Technical Staff GLOBALFOUNDRIES, Bangalore
(Kamaraj Auditorium) (Ambedkar Auditorium)
3.00 PM 3.15 PM HI-TEA
Technical presentation Session - 4 Technical presentation Session - 5 Technical presentation Session - 6
Analog and Mixed Signal Design - 2 Communication Technologies and Circuits 2 Technology and Modelling for Micro Electronic
Paper ID: 7, 38, 50, 52, 59, 93, 94, 98, 99, 102, 110, 111, Paper ID: 179, 193, 197, 198, 215, 218, 228, 242, Devices
3.15 PM 5.00 PM
135 275 Paper ID: 22, 60, 105, 112, 115, 155, 166, 212, 232
(Venue : Kamaraj Auditorium) (Venue : TT725) (Venue : TT312)

7.00 PM 9.00 PM Conference Dinner

*Each presentation may have 10 minutes, TT- Technology Tower Building
 CONFERENCE SCHEDULE
DAY 2 - SATURDAY (12.08.17)
Keynote 5: Spintronics-Perspectives and Challenges, Dr. Brajesh Kumar Kaushik, Associate Professor, Indian Institute of Technology, Roorkee
9.30 AM 10.10 AM
(Venue: Ambedkar Auditorium)
Keynote 6: 21st Century Computer Architectures: Challenges and Opportunities, Dr. Virendra Singh, Associate Professor, Indian Institute of Technology
10.10 AM 10.50 AM Bombay
(Venue : Ambedkar Auditorium)
Keynote 7: Career Opportunities in VLSI, Shivraj B Thakare, Director, Mixed Signal IP group, Intel technologies, Bangalore.
10.50 AM 11.30 AM
(Venue : Ambedkar Auditorium)
11.30 AM 11.45 AM HI-TEA
Technical presentation Session - 7 Technical presentation Session - 8 Technical presentation Session - 9
Analog and Mixed Signal Design 2 VLSI Testing and Verification Digital Design for Signal, Image and Video
11.45 AM 1.00 PM Paper ID: 137, 144, 149, 151, 171, 174, 175, 184, 195, Paper ID: 14, 21, 27, 32, 39, 55, 118, 147, 160, processing - 1
219, 257, 259 225 Paper ID: 9, 44, 46, 79, 80, 89, 108, 128,185
(Venue : Kamaraj Auditorium) (Venue : TT725) (Venue : TT312)
1.00 PM 2.00 PM LUNCH
Keynote 8 : Maxwell, Schrdinger, Shannon a perfect (wireless) storm, Dr.Madabusi Govindarajan , GLOBALFOUNDRIES, Bangalore
2.00 PM 2.45 PM
(Ambedkar Auditorium)
Keynote 9 : Semiconductor Device Trends Process Technology & Challenges, Dr. M K Radhakrishnan, Vice President IEEE-EDS Chapters
2.45 PM 3.30 PM IEEE-EDS, Region 10 Asia Pacific
(Ambedkar Auditorium)
3.30 PM - 3.45 PM HI-TEA
Technical presentation Session - 11
Technical presentation Session - 10
Electronics for Green Technology
Digital design for signal, Image and Video processing 2
3.45 PM - 4.30 PM Paper ID: 103, 120, 165, 243, 272, 274, 281
Paper ID: 129, 152, 170, 172, 177, 204, 216, 240
(Venue : TT725)
(Venue : TT312)
*Each presentation may have 10 minutes