PAD/JPAD/SSTPAD Series

Low-Leakage Pico-Amp Diodes

PAD1 JPAD5 SSTPAD5

PAD5 JPAD50 SSTPAD100
PAD50
Product Summary
Part Number IR Max (pA)
PAD1 1
PAD5/JPAD5/SSTPAD5 5
PAD50/JPAD50 50
SSTPAD100 100

Features Benefits Applications

Ultralow Leakage: PAD1 <1 pA
Negligible Circuit Leakage Contribution
Op Amp Input Protection

Ultralow Capacitance: PAD1 <0.8 pF
Circuit Transparent Except to Shunt
Multiplexer Overvoltage

Two-Leaded Package High-Frequency Spikes Protection

Simplicity of Operation

Description
The PAD/JPAD/SSTPAD series of extremely low-leakage
diodes provides a superior alternative to conventional diode
technology when reverse current (leakage) must be
minimized. They feature leakage currents ranging from
1 pA (PAD1) to 100 pA (SSTPAD100) to support a wide
range of applications. These devices are well suited for use
in applications such as input protection for operational
amplifiers.
The hermetically sealed TO-206AF (TO-72) package
allows full military processing per MIL-S-19500 (see
Military Information). The TO-226A (TO-92) plastic
package provides a low-cost option. The TO-236
(SOT-23) package provides surface-mount capability.
Both J and SST series are available in tape-and-reel for
automated assembly. (See Packaging Information.)

TO-206AF (TO-72) TO-206AA (TO-18) TO-226AA (TO-92)

Modified Modified Modified TO-236
(SOT-23)

C Case C
C 1
1 3 1 C 1
3 A
C 2

2 2 A
2
A A and Case
Top View

Top View Top View Top View SSTPAD5 (05)*

SSTPAD100 (01)
PAD1 PAD50 JPAD5
PAD5 JPAD50 *Marking Code for TO-236

Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70339.

Siliconix 1
S-52424Rev. G, 14-Apr-97
PAD/JPAD/SSTPAD Series
Absolute Maximum Ratingsa
Forward Current:
Total Device Dissipation:
Operation Junction Temp:
(PAD . . . . . . . . . . . . . . . . . . . . . . 50 mA
(JPAD/SSTPAD ) . . . . . . . . . . . . . 10 mA
(PAD)b . . . . . . . . . . . . . . . . . . . 300 mW
(JPAD/SSTPAD)b . . . . . . . . . . 350 mW
(PAD) . . . . . . . . . . . . . . . . 55 to 175_C
(JPAD/SSTPAD )c . . . . . . 55 to 150_C
Lead Temperature (1/16 from case for 10 sec.) . . . . . . . . . . . . . 300_C
Notes:
a. TA = 25_C unless otherwise noted.
b. Derate 2 mW/_C above 25_C.
c. Derate 2.8 mW/_C above 25_C.

Specificationsa
Limits

Parameter Symbol Test Conditions Min Typb Max Unit

Static

PAD1 0.3 1

PAD5/JPAD5/SSTPAD5 1 5
Reverse Current IR VR = 20
20 V pA
PAD50/JPAD50 5 50

SSTPAD100 10 100
PAD1/PAD5 45 60
Reverse Breakdown Voltage BVR IR = 1
A SSTPAD5/100 30 55
V
All Others 35 55
Forward Voltage Drop VF IF = 1 mA 0.8 1.5

Dynamic

PAD1/PAD5 0.5 0.8

Reverse Capacitance CR VR = 5V,
5V f = 1 MHz pF
All Others 1.5 2

Notes:
a. TA = 25_C unless otherwise noted. NT/NPA
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

Typical Characteristics
Reverse Current vs. Reverse Voltage Reverse Current vs. Temperature
1000 100
PAD/JPAD/SSTPAD5
VR = 20 V
IR @ 125_C
100 10
PAD1
I R (pA)

I R (pA)

10 1 All Others
PAD1/5
PAD/JPAD/SSTPAD5
1 0.1
IR @ 25_C
PAD1
0.1 0.01
0 6 12 18 24 30 55 35 15 5 25 45 65 85 105 125
VR (V) TA Temperature (_C)

2 Siliconix
S-52424Rev. G, 14-Apr-97
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