Part 1: Measurement of IDSS and Vp

It is necessary to obtain values of IDSS and Vp for both Q1 and Q2. Use a characteristic curve
tracer, if available, to determine the values of IDSS and Vp . Obtain readings at VDS = 10 V.

For Q1:

ID / (1 - VGS / vp ) ^ 2 IDSS = 6.2 mA

Vp = 4.2 V

For Q2:

IDSS = 5.7 mA

Vp = 2. 7 V

Go on to part 2.

Otherwise , use the following steps to obtain these values.

Construct the circuit with RD= 510 (but with Rs= 0). Measure and record.
 VD = 9.69 V

Calculate the values of drain current, ID

ID = (VDD - VD)/RD

(Calculated) ID = 0.49 mA

since this is the drain current at Vgs = 0V

 IDSS (Q1)= ID= 0.49 mA

(using the value of ID just calculated)

Replace Q1 and repeat measurement with Q2.

Q1 = 2N5458

Q2 = 2N3819

(measured) VD= 5.34 V

Calculate the value of drain current, ID

ID= (VDD - VD)/RD

(calculated) ID = 8.94 mA

since this is the drain current at VGS =0V

IDSS (Q2)= ID = 8.94 mA

(using the value of ID just calculated)

a. Now connect RS= 1K. Measure and record the values of

(measured) VGS = - 14.1 mV

(measured) VD = 5.48 V

Using the measured values just obtained, calculate Vp as follows.

 ID= (VDD - VD)

RD

(calculated)ID= 8.804 mA

VP= VGS/ [1- (ID- IDSS)]

(calculated) VP (Q2)= - 1.645 V

Replace transistor Q2 and repeat step b measurements.

(measured) VGS = 1.4 V

(measured) VD= 9.7 V

Using the values just obtained, calculate Vp as follows.

ID= (VDD - VD)

RD

(calculated) ID= 0.774 mA

VGS
VP= ID
(1( )
IDSS

(calculated) Vp (Q1) = - 5.24 V

Part 2. DC Bias of Common-Source Circuit

a. Calculate the DC bias expected in the circuit, using IDSS and VP obtained in part 1 for each
transistor.

Draw graphs of the equations

ID = IDSS [1- (VGS/VP)]2 and VGS = -IDRS

To graphically obtain the equation intersection or use a computer or programmable calculator to

solve the simultaneous equations.

The calculated DC bias values are:

(calculated) VGS1 = - 0.229 V

using

VD1 = VDD ID1RD1

 (calculated) VD2 = 18.69 V

(calculated) ID1 = 0.438 mA

b. Build the circuit using RG1= RG2 = 1M, RS1= RS2 = 510, and RD1= RD2 = 2.4K, Set VDD
= 20V.
c. Measure the DC bias voltages

(measured) VG1= 1.68 mV

(measured)VS1= 0.320 V

(measured)VD1= 18.64 V

(measured)VGS1= -1.661 V

Determine the value of ID under DC bias conditions (using nominal resistor values)

ID1 = VS2 / RS2

(Calculated)ID1= 0.447 mA

(measured)VG2= 0 V

(measured)VS2= 0.228 V

(measured)VD2= 11.213

(measured)VGS2= 1.66 V

Determine the value of ID2 under DC bias conditions

ID2 = VS1 / RS1

ID2= 0.627 mA
Compare the DC bias value calculated in step a with those measured in step c.

The calculated values from step A is very close to the measured values in step C.

Part 3. AC Voltage gain of amplifier.

a. Calculate the voltage gain of the common-source amplifier of Fig. 21-3.

For stage 2:

AV2 = -gm(RD2 || RL)

2IDSS VGS
With gm = (1 )
|Vp| Vp

Using VP (Q1), IDSS (Q1) from Part 1 and VGS1 calculated in part 2

(calculated) AV1 = 0.347

Calculate overall amplifier gain:

AV = AV1 AV2

(calculated) AV = 2.973
b. Connect input of Vsig = 10mV, rms at = 1KHz. Use the oscilloscope to obtain an undistorted
output voltage, adjusting Vsig if necessary. Measure and record.

(measured) Vsig = 10 mV

(measured) VL= 29 mV

Calculate the voltage gain of the overall amplifier

AV= VL / Vsig

AV = 2.9

Measure and record

(measure) VO1 = 3.69 mV

Calculate the gain of each stage:

AV1 = Vo1 / Vsig

(measured) AV1= 0.39

AV2 = VL / Vo1
 (measured) AV2 = 7.88

Part 4. Input and Output Impedance Measurements

a. The input impedance is

Zi = RG1

Zi = 1 M

b. The output impedance is

Zo = RD2

Zo = 2.7k

c. Connect a 10K resistor, RS in series with the input signal, Vsig= 10 mV, rms at = 100Hz.
Measure Vi1.

(measured) Vi1= 3.53 mV

Determine the input impedance using

Zi= [ Vi1/ (Vsig-Vi1)] RS

Zi = 546.051 k
Remove measurement resistor , RS

d. Measure VL

(measured) VL= 6.40 V

Disconnect load RL = 10 K. Measure output voltage, Vo

(measured) Vo= 16.65 V

Determine the AC output impedance using

Zo = Vo - Vi1( RL)

VL
Zo =2601.89
2.8 Activity Report

Section: E32 Date Performed:

Course Code: ELECS2L Date Submitted:

Course Title: Elecs 2 Laboratory

Instructor: Engr. Luigi De Jesus

Group No.: 8 Activity No.: 1

Group Members: Signature:

1. Almario, Jonathan David

2. Barrion, Bryan Carlo

3. Garcia, Lyle Amiel

4. Miramontes, Lyster

Observation

A capacitor is a coupling capacitor if it is connected to two transistors.

This coupling capacitor blocks DC signals from passing while allow AC to go on through.
This arrangement comes with a disadvantage; it degrades the low frequency performance of a
network
When a capacitor is connected to two transistors it is reffered to as coupling capacitor a
coupling capacitor only allows AC signals to pass
Coupling capacitors creates a path for ac signal while blocking dc signal simoultaneously

Conclusion

Coupling of this orientation and type would need to have the reactance of the capacitor to be
low enough at the lowest frequency.
This is to ensure that it would not drastically reduce the signal between stages.
The coupling also has the tendency to introduce unwanted high and low pass filter
consequences.
So as not to lower signal, resistance from the capacitor should be lowered.
When using a coupling capacitor we must maintain at a low frequency, by doing this we obtain a
steady signal that will block unwanted high or low signal