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Introduction
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Digital abstraction-discrete time, discrete amplitude
To take advantage of DSP we must be able to move from
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analog to digital and back as needed
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What is data Converter?
A device that converts a signal from analog to digital domain
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Any system that requires real inputs from outside world that
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Two types:
1. Analog to digital Converter(ADC)
2. Digital to analog Converter(DAC)
Analog to digital converter consists of two basic functions.
Sampling: convert a continuous time input signal to a discrete
time representation.
Quantization: convert a continuous amplitude input signal to a
discrete amplitude representation.
Input signal must be bandlimited to no more than FS to
prevent aliasing.
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Issues:
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Sampling theory
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Fig. shown below illustrates the sampled signal in time and frequency
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domain.
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Types of Sampling
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Down sampling
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Up sampling
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Over Sampling
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Operational Amplifiers,OTAs
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Comparators
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Filters
Current sources
Reference Circuits
Logic Circuits
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Throughput is the amount of digital data a converter uses in a
given amount of time.
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-12 bit Conveter running at 100KSPS has 1.2Mbps throughput.
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INL and DNL
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-deviation of the values on the actual transfer function from the ideal
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transfer function once the gain and offset errors are nullified.
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INL(Integral Nonlinearity error)
-INL is defined as the integral of DNL.
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-Point used as zero occurs of LSB before the first code transition.
-The full scale point is defined as level LSB beyond last code
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transition.
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- negative DNL implies that the code is Shorter than the ideal
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code width
- DNL is measured in the increasing code direction of the transfer
curve.
- The transition of code N is compared to that of code N+1.
- For DAC, DNL error of -1LSB implies that the output did not
increase for increasing input code.
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- For DAC, DNL error of greater than -1LSB implies that the
device is non-monotonic.
- For an ADC,DNL error of greater than -1LSB implies that at
least one code is missing, meaning that there is no analog
voltage which will generate a particular code.
- Manufactures includeNo missing Codesspec.
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rate.
- If the output codes increase at a different rate than the analog
input does, then it results in gain error.
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Gain error can be defined as the difference between the level that
produces the greatest code and the smallest code, versus the ideal
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levels that produce these codes
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Dynamic Characteristics
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- Contributes to the overall dynamic performance of the device at
higher frequencies and affects the linearity at those
frequencies.
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- In audio world, a low SNR means the device has lots of hiss
and static high rating. s
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- Key measure of Data converter.
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signal.
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Thermometer code
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Features
Low DNL errors
Guarnteed monotonocity
Reduced glitch area
Increased complexity(binary code needs only N digital inputs to
represent 2N different digital values.)
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shown in fig.
1 LSB corresponds to the height of a step between successive
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analog outputs,
A DAC can be thought of as a digitally controlled potentiometer
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and VLSB or the analog output for the largest digital word
(1111) and the analog output for the smallest digital
word(000..0).
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I LSB = Vref/2N
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For 3-bit DAC 1 LSB= 5/8 V = 0.625V
MSB causes the output to change by Vref.
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Ex- Find the resolution of DAC if the output voltage is desired to
change in 1mV, Vref is 5V. s
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Solution : DAC must resolve
1mV/5V = 0.0002 =.02%
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DAC-Nonlinearity
Differential Nonlinearity:
Ideal increments as per the ideal curve= 0.625V=1LSB
Nonideal components cause the analog increments to differ
from ideal values.The difference between actual and ideal-
differential nonlinearity is
DNLn = Actual increment height of transition n Ideal
increment height
N-number corresponding to digital input transition.
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Differential Nonlinearity:Example
n=3, Vref=5V
1LSB=1/8 of Vout/Vref
DNL 1=DNL 2=DNL 7=0
DNL 3=1.5 LSB-1 LSB =0.5 LSB=0.3125V
DNL 4=0.5 LSB-1 LSB =-0.5 LSB
DNL 5=0.25 LSB-1 LSB =-0.75 LSB
DNL 6=1.75 LSB-1 LSB =0.75 LSB
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Differential Nonlinearity:Example
Plot DNL in LSB versus input digital code.
DNL for the converter is 0.75LSB since the overall error of DAC is
defined by its worst-case DNL.
Generally, DAC will have 1/2 LSB of DNL ,if it is to be n-bit
accurate.
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Differential Nonlinearity:Example
5-bit DAC with .75LSBs of DNL has resolution of 4-bit DAC.
If the DNL for DAC is less than -1LSBs, then DAC is said to be
nonmonotonic.
DAC-should exhibit monotonicity if it is to function witout error.
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Integral Nonlinearity:
Another important Static characteristic of DAC.
Difference between the data converter output values and a
reference straight line drawn through the first and last output
values.
INL defines the linearity of overall transfer curve as
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INL-other errors(gain and offset are zero)
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Integral Nonlinearity:
Converter with N-bit resolution will have less than 1/2 LSB of DNL or
INL.
For ex- 13 bit DAC having greater than 1/2 LSB of DNL or INL
actually has the resolution of 12bit DAC.
0.5LSB = Vref/2 N+1
Integral Nonlinearity:Ex
3-bit DAC, Vref=5V
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Integral Nonlinearity:
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Offset ERROR:
Analog output should be 0V for D=0 s.
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However, an offset exists.-seen as shift in the transfer curve.
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Gain ERROR:
Gain error exists if the slope of the best-fit line through the transfer
curve is different from the slope of the best-fit line for the ideal case.
Gain error=Ideal slope-Actual slope.
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Latency:
Total time from the moment that the input digital word changes to the
analog output value has settled to within a specified tolerance.
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Dynamic Range:
Largest output signal over the smallest output signal.
Related to resolution
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DR = 20log(2N - 1)/1 DB
16 bit DR is 96.33db.
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Analog to Digital Converter
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S/H circuits operate in both static(hold mode) and
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dynamic(sample mode)
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Sample Mode
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.Acquisition time: Time required for the S/H to track the analog
signal to within a specified tolerance, once the sampling
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Sample Mode
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.Acquisition time:
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Hold Mode
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1.Pedestal error: occurs as result of charge injection and clock
feedthrough.
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Part of the charge built up in the channel of the switch is
distributed onto the capacitor,slightly changing its voltage.
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Droop error:
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Aperture Error
Transient effect that introduces error occurs between the sample and
hold modes.
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Aperture Error
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Related to the frequency of the signal and the worst case aperture
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Example:
Given Vin= A sin 2*pi*f*t A=2V f=100KHz
Aperture uncertainity is 0.5ns.
Find the sampling error
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Quantization Error:
Qe =Vin V staircase
V staicase =D. Vref/2N
= D. VLSB
VLSB is value of 1 LSB in volts.
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Qe-expressed in terms of LSBs.
Qe-generated by subtracting the value of the staircase from the
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dashed line.
Quantization Error: s.
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Sawtooth waveform is centered about LSB.
Ideally magnitude of Qe will be between 0 and 1 LSB.
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Quantization Error:
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DNL:
Similar to that of DAC.
DNL is the difference the actual code width of a nonideal converter
and the ideal case.
DNL=Actual step width-Ideal step width.
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Since the step widths can be converted to either volts for LSBs, DNL
can be defined in either units.
DNL:
Ideal step width=1/8
Videalstepwidth=1/8 Vref= 0.625V=1LSB
Example: 3-bit ADC, Vref=5V, find Qe in units of LSBs.
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DNL0=DNL4 =DNL5=0
DNL2 = 1.5 LSB-1LSB = 0.5LSB
DNL3= 0.5 LSB-1LSB = -0.5LSB
DNL5 = -0.5LSB
DNL6 = -0.5LSB
Overall DNL for the curve is 0.5LSB
As DNL increases in either direction, Qe worsens.
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DNL:
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INL6 =-0.5LSB
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Identical to DAC.
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Aliasing.
Dynamic aspects of converter.
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Qe,RMS = VLSB/121/2
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SNR=20N log (2) + 20 log (121/2) - 20 log (2*21/2)
= 6.02N+1.76
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Signal to Noise Ratio(SNR)
Example:
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Guard rings
Fully differential/Matching design
Power supply and Grounding Issues
Floorplanning
Types of DAC
Resistor String
R-2R ladder Network
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Current Steering
Charge scaling DAC
Cyclic DAC
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Pipeline DAC us
Resistor String DAC
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Most basic DAC.
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Drawbacks
Converter output is always connected to 2N -1 switches that
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Resistor String
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Problem
3bit resistor string DAC using binary switches, VrefV, PD=
5mW, Compute the analog output for each input digital data.
Imax= 5mW/5V =1mA
R= 1/8 * 5V/1mA = 625 ohms.
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Ri= R + Ri
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ideal + mismatch
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i i
k =1
Rk
k =1
R + Rk
Vi = N Vref = N
Vref
2 2 R
k =1
Rk
i
Vref i Vref
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Vi = N
+ N
Rk
2 2 R
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Vref Rk
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Vi = Vi, ideal + N
2 k =1 R
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INL= Vi-Vi,ideal
Worst case INL when i=2N and Rk mismatch.
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Vref
INL = N Rk / R
2 k =1
i
Vref
INL = N Rk /R
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N 1
Vref 2
INL = Rk /R
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INL max = Vref/2N * 2N-1 *.01R/R =.005Vref
=.025V s.
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INL max = LSB
1/2LSB = .025V = 5/2N+1
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(i )Vref Vref Rk
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Vi Vi 1 = N
+ N
2 2 k =1 R
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Vref Ri
Vactual = N
1 +
2 R
DNL=Vactual Videal
= Vref/2N* Ri/R
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Ex: let R = 2%
DNL max= .02R/R * Vref/2N = .02LSB
Vout= -itot*Rf
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N 1
Vref 1
itot = Dk N
2R
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k =0
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Dk kth bit of input word
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R = R + R/2
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R-2R Ladder Network
R-2R relationship to be maintained,
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Problem
3-bit DAC R=1k, Rf = 2k, Vref=5V
Switch resistances negligible.
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Integral Nonlinearity
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Current Steering
Uses current throughout conversion.
Requires precision current source.
Set of current sources
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