2 Transp EP 2017 DEVICES (Compatibility Mode)

POWER ELECTRONICS POWER ELECTRONICS DEVICES
POWER SEMICONDUCTOR DEVICES:

A K
1. diode
A K
2. thyristor - (SCR) silicon controlled rectifier.
G
3. gate turn off thyristor- (GTO). A K
E C G
B B
4. bipolar transistor- (BJT).
D D
C E
5. Metal oxide semiconductor field effect transistor (MOSFET). G

G
S
C S
6. IGBT - insulated gate bipolar transistor. G

E
A
7. MCT - MOS controlled thyristor. G

K
Prof Beatriz Vieira Borges

A K
DIODE 5000 V, 10000A
K
THYRISTOR A phase controlled: 5000V, 5000A, tq=100ms
G fast: 2000V, 200A, tq=20ms
A K
GTO 4500V, 1000A
G 9000V, 9000A (modules)
E C
BIPOLAR B B 2000V, 2 a 10A

TRANSISTOR 1000V, 100A
C E
D
D
MOSFET 100V, 30A
G 1000V, 6A G
S
S
C
IGBT G 3500V, 300A

E
IST-DEEC Prof Beatriz Vieira Borges

A K
Diode
Turns on if vAK becomes positive.
Equivalent Schematic of
Blocks if forward current IF becomes conducting diode
negative
Rj
Ideal Real Vj
Characteristic Characteristic Dissipated Power:
IF IF PF=VFIF=VjIFav + RjIFef2
heatsink thermic Resis

tance:
VAK VAK
Tjmax - Ta = Rth j-a PF

Operaing Limits:
VRRM - Maximum Repetitiv reverse voltage

IFRMS - Maximum RMS forward current
IFAV - Maximum Average forward current
IFRM - Maximum repetitive forward current
IFSM - Maximum non-repetitive forward current
t
I2t - Thermic characteristic 2 2
I t iD dt
0
1t
Average forward current value I F ( av ) iD dt
T0
t
1 2
RMS forward current value I F ( RMS )
T 0
iD dt

Dynamic Characteristic
trr inverse recover time;
Time interval between the current
inversion and the intersection of the
i mx tangent marked in the begining of the
current rise with the t axe.
t rr
Qrr inverse recover charge;
Removal of electric Charge in the
Q rr t junction during the ON-OFF transition
I RM
ta storage time;
ta Interval since the inversion of current
untilm it begans until to rise
exponentially

Turn-on
IF Charge of a capacitor
vAK t Dessipated Power

t
Cut-off
IF
Protection circuit to avoid
oscillations:
vAK t
Problems arrise when frequency
increases t
com RC

Diodes Classification
Schottky Fast recovery Rectifiers
Von = 0.3 trr low (<ms) trr high

Vmx < 150V Vmx < kV Vmx > kV
Imx < kA Imx > kA

Schottky
Mx. Reverse Voltage
Mx. Average forward current
Conduction voltage drop
Cuttoff current
leakage

Recuperao rpida
Mx. tenso
de bloqueio
no corte
Corrente fuga
no corte
Tempo de
recuperao

Rectifiers

Series Diodes ( to devide reverse voltages)
Paralell Diodes ( to devide forward currents )
Equalization by Equalization by magnetic Equalization by resistances

device coupling Only in low currents
Selection of diodes Only for kA; expensive; high weight,
with semilsr bulky.
chsrscteristics

Thyristor A K
Half-controlled
SCR G
Starts conduction if vAK is positive and if a Control only in the turn on the ON
low duration current pulse exists at the transition +V - AK
gate terminals. Blocks if current IF goes to A K
zero. IAK G
iG
Ideal Real Characteristic

Characteristic
I
IF Transition OFF-ON
IF vGK = VGKT > 0, iG = iGT > 0
iG1>iG2>iG3 during a minimum time interval
blocks trigger iG1 > iG2 > iG3
VRRM Transio ON-OFF
VAK VAK VDRM
V voltage reverse
DRM
IAK < IH (holding current)

Limites de VRRM - Repetitive Reverse Voltage maximum

operao: VDRM - Repetitive Direct Voltage Maximum with thyristor cut off
ITRMS - Direct Current RMS maximum value
ITAV - Direct Current Average maximum value

ITRM - Direct Current Repetitive Maximum maxim value
ITSM - Direct Current Non-Repetitive Maximum maxim value
I2t - Thermic Characteristic

(di/dt)max - maximum direct current rising ratio
(dvAK/dt)max - maximum vAK voltage rising ratio
IH - holding current (1% ITAV)
IL - latching current (> IH)
td - turn on time 0,1ms - 10ms
tq - turn off time1ms - 110ms

GATE Characteristics IG
VGM ------ mximum value of voltage gate- kathode

IGM
PGM ------ mximum value of power at the gate
PGM=vGKIGK
PGav ----- mximum value of average power at the
gate
IGM ------- mximum value of gate current vGM
vGK(MIN) vGK
td trigger time (decreases with the energy supplied to the gate)
Gate pulse
Leakage currents I Tav VRRM

If 4 Reqoff
10 If
Holding and latching currents:
IL 2%ITav at turn-on IT>IL
IH
Turn-off IT>IH
VAK

+ VAK -
Dynamic Characteristic A K
IAK G
iG
iA
tq turn of time
trr
t
vAK
It is necessary to assure a negative

voltage during a time interval higher then
t
tq to turn-off the thyristor; if not the
thyristor will conduct imediatly after being
tq directed biased, even without a pulse in
the gate.
Maximum ratio of current variation diA / dt

Other limitations
of thyristors Maximum ratio of voltage vAK variation dvAK / dt

turn-on td + tr turn on time

ATTENTION to:
iT
td Dissipated Power
di/dt mximum
vAK tr (depends from exterior
circuit)
tr
turn-off tq turn off time (depends of temperature)
iT ATTENTION to:
Dissipated power
tq dvAK/dt maximum
1ms<tq<110ms
protections
t
RC snuber"
vA
K
Direct voltage must not be applied to the thyristor while tq, has not elapsed
Otherwise the thyristor mantaines conduction.
Protections against high di/dt and dvAK/dt Protect the thyristor

against di/dt by using
di/dt an inductance in
series
Concentration of current in a very small
area high power dissipation that can produce the destruction of the
thyristor
(di/dt)mx - 200A/ms rectifier (di/dt)mx -2000A/ms fast
L
v v
2p 2p
iT iT
v R t t
v R
di
iT iT
dt
t t
iG iG
Rectifier circuit without a t Rectifier circuit with a t
Protection against di/dt Protection against di/dt

Design of the protection inductor:

di i t 0
(existncia da bobine)
v Ri L
dt
di
vL em t = a
dt
v
di v di L
di
dt L dt max
dt max
Exemple:
2220
di L . H
156
200 A / s 200
dt max
L=2mH (it does not afect the circuit
v(max) --- a = 90 v 2220 characterstics)
(wL=.6mW for f=50Hz and R=10W)
R=10W

the stored charges in the spacial region of a

dvAK/dt arrises
blocked thyristor can be represented by a
when the supply voltage is
connected to the circuit. capacitor C
at commutation of inductive loads
at the commutation of other if dvAK/dt is excessive the current i = CdvAK/dt
thyristor in the curcuit.
May be suficient to lach the device in
condution, (intempestivamente)
To protect the thyristor against dvAK/dt a capacitive RC circuit in

paralell with the thyristor is used (snubber)
Rectifier with protections RS CS L

against dvAK/dt and di/dt
iT
v R

Equivalent scheme with the thyristor cut-off , without protection against dvAK/dt.
RAK L di v
di
dt L
v R AKi L
v vAK dt VAK = RAKi
R=10W
dv AK di
RAK>>>R RAK=50KW
R AK
dt dt
dv AK Vmax
R AK
dt L
If dvAK/dt = 300V/ms 50 x 220 x 2 To high value

L x10 3 52mH wL=16W f=50Hz R=10W
and di/dt = 200A/ms 300

Snuber Design:
Equivalent scheme with the thyristor cut-off , with protection against dvAK/dt.
RS L
CS
A resistncia total medida aos terminais do tiristor
RAK fica diminuida quando se pe, em paralelo, a
v resistncia Rs. Assim para RS<<<RAK tem-se:
vAK R=10W
RS vmax
dv AK Vmax dv AK V L
RAK RS max dv AK
dt L dt L
dt max
50 x 220 x 2
L x106 52 H valor aceitvel
300
RS pode baixar mas ficar limitado pelo valor da corrente que percorre o circuito com o tiristor
bloqueado. CS=0,1mF valor tpico CS>>> Coff=1nF
A corrente que precorre o tiristor no corte aproximadamente 10mA ZC=32KW f=50Hz
ZC=1/wC

Supresso de transitrios
curva
I caracterstica
1KA de um varistor
-VS VS VDRM
Proteco contra sobre-intensidades
FUS
Fusveis rpidos ou ultra rpidos
i) Vmax FUS > Vmax
ii) I2t FUS < I2t tiristor

Circuitos de disparo de tiristores drives

1 - galvanic isolation by using a pulse transformer:
VCC 1:1
Triggering signal RC
1nF
BUFFER
RB
Autonomous Oscillator
enable
2 Optical galvanic isolation

Isollated
Supply and
logic
Foto thyristors
optocoupler

Classificao de Tiristores
Imx: 4 kA
Low speed rectifiers
Vmx: 5-7 kV
Thyristors (phase 1f, 3f, 50-60 Hz
Von: 1,5V (@1kV); 3V (@5-7kV)
Controlled)
low tq, 1-100 ms Freqs: 1 -2 kHz Forced

Fast Thyristors commutated
Vmx: 2,5 kV, Imx: 1,5 kA
(Inverters) Inverters
lower Von
Foto- Triggered by triggering power: mW HVDC

Thyristors LED or
Vmx: 8 kV, Imx: 3,5 kA
optical fiber
(HVDC) Von: 2-3 V @3,5 kA
LTT Ligth triggered T
LASCR Ligth Activated T

Other Thyristors (Electrnica Geral)
TRIAC, DIAC, QUADRAC

GATT
Gate-assisted turn-off Tiristor (1200V, 300A)
(T de corte assistido pela gate)
carga
A
4,7k
230V
470k
G 50Hz
47
68n
K 10m QUADRAC
GTO
Gate-turn-off Tiristor

GTO A
IA
I
G
Gate-Turn-Off Tiristor + VRWM
VGC
- K
VAK
Principal application fields:

High speed trains
HVDC*
Von Vmx Imx tq fc

2-3 V 9 kV 3 kA 10-25 ms < 10 kHz
* transporte de energia elctrica em cc a muito alta tenso

2003
OFF- ON Similar to the conventional SCR (1<VGT<2 V; IGT) but the gate current must be
mantained during all the conduction interval
ON-OFF
iG < 0A
Aplication of a negative VGC diG/dt ~ 30-100 A/ms
cerca de 30% de IA
-20V < VGC < -7V
Duration of a few ms higher than tq
A
iG = 200A High control
I
@ 1000 A, power!!!
10 ms
e G
+
VGC
IST-DEEC
- K
Prof Beatriz Vieira Borges

Complex and expenssive
Driving circuits!!!
mximo de 1-2 kV/ms
Problem of GTOs Too sensitiveto high dvAK/dt

specially when OFF-ON transition
Protection
circuit
Difficult when inductive
circuits
A
I
solution G
+
VGC
- K

Transistor
de juno IC
IB3
bipolar
IB2
TJB IB1
VCEsat
low hFE 5 < hFE < 10

considerable time delay inthe cut off transition
tens of ms < swtching times< some ms
1400 V, hundreds of A
negative temperature coefficient (embalamento trmico)

Solutions for higher hFE

Darlington C
C triplo
monolithic
Darlington
B
B
E
E
higher VCEsat
desadvantages
slower switching

Power Field Effect ID
Transistor Metal
Oxide VGS3
VGS2
Semiconductor VGS1
MOSFET VDS
When on dissipation dependson RON

competitive with TJB for < 300/400V e >100kHz
tens of ns < switching times< tens of ms
1000 V, < 100 A
simpler control
termal coefficient positive (auto protection)

Operating limites :
VDS - Mxima tenso Dreno Fonte
VDG - Mxima tenso Dreno Gate
ID - Mxima corrente de Dreno Pcond=rDS(on)IDef2
VGS - Mxima tenso gateFonte
PD - Potncia Mxima dissipada
rDS(on) - Resistncia em conduo (limita a escolha do FET)
Tempos de comutao da ordem dos 50 a 300ns

Protection circuits:
Sendo os tempos de comutao muito baixos h necessidade de proteger o MOSFET contra
sobretenses na comutao. Durante a comutao o dispositivo requer correntes elevadas na gate
(carga descarga de capacidade)
VDS
sem proteco
ID

proteco com zenner proteco com snubber
VDS VDS
ID ID
t t
O diodo de substracto (diodo parasita) pode ser utilizado como diodo de roda livre (diodo
lento)
circuitos de comando:
D
D
Acopulador ptico Transfomador de impulsos
G
Alimentao G
e Lgica S V S
V
Foto acopulador

Transistor de C IC
G
gate isolada VGS2
IGBT E
VGS1
VCE
Insulated Gate Bipolar Transistor
gate isolada como no MOSFET

Von baixos mesmo em dispositivos de HV (2-3V IGBT de 1000V)
tempos de comutao > ms
3 kV, 1200 A

Comparao dos
(Mitsubishi)
Dispositivos
semicondutores
Capacidade em Velocidade
semicondutor potncia comutao
TBJ / MD mdia mdia
MOSFET baixa alta
GTO alta baixa
IGBT mdia mdia
Tiristor alta baixa

Critrios de escolha de semicondutores de potncia
potncia do dispositivo (correntes e tenses mximas no circuito)
frequncia de comutao (tempos de comutao)
perdas de conduo (tenses de conduo ou resistncia de

conduo)
complexidade e potncia dos circuitos de drive
custo do semicondutor

Semicondutores em comutao
REAL
IDEAL
Perdas nulas na conduo (v=0 quando fechado)

corrente nula ao corte (i=0 quando aberto)
tempos de comutao nulos (abertura e corte instantneos)
potncia de controlo nula
I0
+ vT -
ideal iT
Vd

tc(on) = tri + tfv tc(off) = trv + tfi
Perdas na conduo Perdas na comutao
Pon = Von I0 ton / TC Pc = Vd I0 fc (tc(on) + tc(off))
Perdas totais
PT = Pon + Pc

2 Transp EP 2017 DEVICES (Compatibility Mode)

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2 Transp EP 2017 DEVICES (Compatibility Mode)

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POWER ELECTRONICS POWER ELECTRONICS DEVICES

POWER SEMICONDUCTOR DEVICES:

3. gate turn off thyristor- (GTO). A K

5. Metal oxide semiconductor field effect transistor (MOSFET). G

6. IGBT - insulated gate bipolar transistor. G

7. MCT - MOS controlled thyristor. G

Prof Beatriz Vieira Borges

BIPOLAR B B 2000V, 2 a 10A

IGBT G 3500V, 300A

IST-DEEC Prof Beatriz Vieira Borges

Characteristic Characteristic Dissipated Power:

heatsink thermic Resis

IST-DEEC Prof Beatriz Vieira Borges

VRRM - Maximum Repetitiv reverse voltage

IST-DEEC Prof Beatriz Vieira Borges

IST-DEEC Prof Beatriz Vieira Borges

vAK t Dessipated Power

IST-DEEC Prof Beatriz Vieira Borges

Schottky Fast recovery Rectifiers

Von = 0.3 trr low (<ms) trr high

IST-DEEC Prof Beatriz Vieira Borges

Mx. Average forward current

Conduction voltage drop

IST-DEEC Prof Beatriz Vieira Borges

IST-DEEC Prof Beatriz Vieira Borges

IST-DEEC Prof Beatriz Vieira Borges

Series Diodes ( to devide reverse voltages)

Paralell Diodes ( to devide forward currents )

Equalization by Equalization by magnetic Equalization by resistances

IST-DEEC Prof Beatriz Vieira Borges

gate terminals. Blocks if current IF goes to A K

Ideal Real Characteristic

IST-DEEC Prof Beatriz Vieira Borges

Limites de VRRM - Repetitive Reverse Voltage maximum

ITAV - Direct Current Average maximum value

ITSM - Direct Current Non-Repetitive Maximum maxim value

I2t - Thermic Characteristic

IH - holding current (1% ITAV)

IL - latching current (> IH)

td - turn on time 0,1ms - 10ms

tq - turn off time1ms - 110ms

IST-DEEC Prof Beatriz Vieira Borges

VGM ------ mximum value of voltage gate- kathode

Leakage currents I Tav VRRM

IL 2%ITav at turn-on IT>IL

IST-DEEC Prof Beatriz Vieira Borges

It is necessary to assure a negative

Maximum ratio of current variation diA / dt

IST-DEEC Prof Beatriz Vieira Borges

turn-on td + tr turn on time

Protections against high di/dt and dvAK/dt Protect the thyristor

(di/dt)mx - 200A/ms rectifier (di/dt)mx -2000A/ms fast

Rectifier circuit without a t Rectifier circuit with a t

Protection against di/dt Protection against di/dt

IST-DEEC Prof Beatriz Vieira Borges

Design of the protection inductor:

IST-DEEC Prof Beatriz Vieira Borges

the stored charges in the spacial region of a

To protect the thyristor against dvAK/dt a capacitive RC circuit in

Rectifier with protections RS CS L

IST-DEEC Prof Beatriz Vieira Borges

If dvAK/dt = 300V/ms 50 x 220 x 2 To high value

IST-DEEC Prof Beatriz Vieira Borges