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High Frequency
Transformer
50 Hz Rectifier Regulated DC
EMI Filter rectifier+ output
AC +
filter
Filter
VO
DC -
unregulated DC Gate drive PWM Error
bus circuir Controller amplifier
Signal VO ref
Transformer
feedback
FEEDBACK
Rectifier
DC (unregulated) +
Filter
DC (regulated) VO1
Rectifier
+
Filter
DC (un regulated) VO2
Rectificer
+
Filter DC (unregulated) VO3
Isolated Supplies
unidirecional excitation of
Forward Converter (step-down) the transformer core 1
Flyback Converter (step-down & step-up) quadrant
Push-Pull Converter
bidirecional excitation of
Half Bridge Converter the transformer core 1st and
Fullbridge Converter 3rd quadrants.
N2 D - - D
B
N1: N2
Lm magnetizing inductance
Ll1 Leckage indutance primary winding
Ll2 - Leckage Leckage primary winding
In the other hand the magnetizing inductance must be high so that the
magntizing current is small.
Exceptions: Flyback and Resonant converters.
D D
+ + + +
N1 N2 VO VO
- -
VI VI
S S
- -
N1 :N2 IO N1 :N2 iD IO
+ + - + + - +
+
Lm v1 v2 VO Lm v1 v2 D VO
- + +
VI im
- VI im -
-
iS
S
- -
Son Doff Soff Don
0< t < ton ton < t <TS
im=IO+(VI/Lm)t im=im(ton)-(Vo(N1/N2)/Lm)(t- ton)
f(t )= f(0) + (VI/N1)t f(t) = f(ton) - (Vo/N2) (t- ton)
f (ton) =f (0)+(VI/N1)ton f (T) =f (0)+(VI/N1)ton- (Vo/N2) (T- ton)
In Steady State the fluxes at the begining and ending of the period are equal:
N1 N2 D iLm
iS iD
+ + - +
v1 v2 VO t
+ - vLm VI
VI -
+
S vS
- -
ton -nVO t
T
iL
D1 S on, D1 on e D2 off S off, D1 off e D2 on
+
+ + vL - 0<t<ton ton<t<T
VO
D2
VI - N2
N1 :N2 vL VI VO v L VO
N1
-
VO N 2 D
vL 0 D
VI N1 n
iD1 iD2 iL
vL
t
VI -VO
ton -VO t
T
IST-DEEC 2017 Prof Beatriz Vieira Borges
POWER ELECTRONICS Galvanic Isolated DC-DC Converters - SMPS
S off, D2 on e D3 on i3 iL
D1
i2
+ + N3 +
ton<t<(ton+tm) i1 + + vL -
v1 i VO
m
vD D2
Lm
- N1 N2 - -
i1=-im VI i ideal
S
N1i1+N3i3=N2i2 D3
-
i2=0 D1 off
i3=N1/N3im v1
VI tm A
v1=-N1/N3VI
ton t
(-N1/N3)VI T B
tm/T=N3/N1D iS toff
A=B
i1 im
tm/T<1-D
1-Dmax=N3/N1Dmax i1=-im t
iL iD1 iD2
Dmax=1/(1+N3/N1)
t
T
converters in parallel:
- higher power
- equalization of current by using current
mode control
- redundance
+ - standardization
VI
- Increase of output frequency (if each
- converter operation is out of phase of the
other)
Push-Pull Converter
push-pull vD
iD1 iL
+ D1
N2 + + vL - + N2/N1VI
vD VO VO
N1 -
N2
-
VI
N1 ton D T
D2 iD2
T1 T2 iL iD1 IO
iD1=iD2=iL/2
T1 on D1 on T2 off D2 off T1 off D1 off T2 on D2 on
vD=0
vL=N2/N1VI - VO 0<t<ton vL= -VO ton<t<ton+ D
vSoff =2VI
VO N 2 D
D
VI N1 n
iD1=iD2=iL/2
T1 on D1 on T2 off D2 off T1 off D1 off T2 on D2 on
vD=0
vL=N2/N1VI - VO 0<t<ton vL= -VO ton<t<ton+ D
vSoff =2VI
VO N 2 D
D
VI N1 n
VI /2 D1 + + vL -
+ N2/N1VI/2
VO VO
N2 vD
-
VI C1 -
N1 ton D T
D2
N2
T2
VI /2 iD2 iL iD1 IO
- C2
C1=C2
VO N2 D vSoff =VI
D
VI / 2 N1 n
D1 + + vL - +
vD VO N2/N1VI VO
VI N2 -
-
N1
N2 iD2 ton D T
T4 T2 D2 iL iD1
- IO
VO N 2 D vSoff =VI
D
VI N1 n
Negleting the ripple of the inductor current and considering iLm=0, the currents in the switches
of the HB are the double of the switches in the FB converter
I S HB 2I S FB VS HB VS FB
DC-DC Converters current supplied
iI Boost converter D>0,5
iD1
+ D1
N2 + +
vD VO
N1 -
N2
-
VI VO N 2 1
N1
D2 iD2
VI N1 21 D
T1 T2
QUESTION n1
Forward Converter
D1 I2
iP i1 iS
+ + + +
im + vL - v2
vP Lm v
D2
VI - -
N :1 -
vC +
S
-_
-
1 The transformer must be designed in order to have an high or low value for Lm? Why?
2 Determine the conversion ratio Vo/VI.
3 What is the function of D3 in series with VC.
4 Considere Lm . Explain the operation of he circuit and trace the time diagram of the
magnetizing current.
5 Determine the minimum value of VC and the highest voltage value that the transistor must support.
6 Determine the energy absorbed by the circuit composed by diode D3 in series with the supply VC .
7 Indicate a more efficient circuit to execute the function of D3 in series with VC.
I2
Solution iP i1 iS D1
+
+ + im + + vL -
vP Lm v
v2
D2
VI - -
N :1 -
S
vC +
_
-
1. In this topology (and in most) the transformer shall be desined in order to have a
high Lm so that the magnetizing current be low. As the transformer is not supposed
to store any energy , so im shell be as low as possible. The magnetizing inductance
must therefore be high to minimize the stored energy in the transformer.
2. Considering the schmatic of the figure : For 0 <t<ton
v P V1 VC
V1 VC i P im
vS
n
iS 0
vD 0
v L V2
4. This question is related with the last one. To better understand the
circuit operation and determine the time diagrams of the currents, lets
consider that the magnetizing current is null when S iniciates its
conduction. As the voltage vP is positive and constant (vP=V1 for
0<t<ton), current im increases linearly:
V1
5. The conversion ratio is given by V2 D
n
The value of VC must be chosen accordingly volt-time balance of the primary:
V1 DT VC V1 1 DT
Substituting V2 V2
Dn nV2 VC V1 1 n
V1 V1
V12
And therefore VC
V1 nV2
50 2
V1 50V VC 250V
50 5 * 8
n5
nV2 40
Dmax 80%
0 V2 8V V1 50
V2 8V VDS 250V
6. The circuit (D3VC) absorbes energy each time it operates, representing therefore a loss.
To calculate this loss, the product VCiC will be integrated during the time that D3 is
conducting. Voltage VC is constant and the current iC decreases linearly from its pick value
(imp) untill zero at t=t1.
im p
V1 DT
im iCP imP
Lm
ton t1 T t1 ton
DT
im p
iC V1 VC
iC imP t ton
Lm
ton t1
T
2
V1 V C t
EC V C i m P t
Lm 2
0
T
V1 VC t 2
EC VC imP t
Lm 2
0
imP Lm
Being t (at t=t1 the current will be zero), and
VC V1
2 Lm 2 2
V V i mP Lm 1 2 VC
EC VC imP C 1
2 E C I mP Lm
VC V1 Lm VC V1 2 2 VC V1
QUESTION n2
Forward converter
I2
iP i1 iS + vx - D1
+ +
+ im + Lx + vL -
+ v2
vP Lm vS vD
D2 _
-
VI N :1 - -
+
D3
- _
vC
Consider the forward converter with galvanic isolation of the above figure.
Where the total leakage inductance of the transformer is presented by Lx.
VI - - -
N :1
D3
+
- _
vC
Being vD=0 instead of V1/N, during the time interval tm1, the output voltage V2
will be lower than DV1/N. This way, it will be necessary to decrease the turns
ratio or increase the duty cycle to mantain the voltage within a specified
range. For the same values of V2 and I2, to decrease N produces the
increase of the maximmum pick and RMS values of the transistor current and
of diodes reverse voltage.
The increase of the duty cycle, produces the increase of the transistor vDS
voltage.
When the transistor cuts off, the process is different because the energy
stored in lx is transferred to the circuit (D3VC): the primary voltage vP chages
from V1 to V1-VC, iniciating the commutation of I2 from D1 to D2.
Clculo de VC
V1 D VC V1 1 D
50 x 0,58 VC 501 0,58
VC 120V
If lx was zero, Vcminwas equal to 100V with Dmax=50%. With lx the transistor must
Support at least 120V.
QUESTION n3
FullBridge DC-DC converter
+ S1 S2 vD
V1/N
iP N1 N2 i2
+ D5 D6 VO
VI im iS + + vL - +
vP vD VO DT t
Lm TS
- -
- D7 D8 V1 vP
S3 S4
- t
Solution
V1
S1 and S4 on D5 and D8 on vL VO
N
S1 S2 S3 S4 off and D5D7 on or D6D8 on v L VO
1 t on V
Ts
vL VO dt VO dt
1
TS 0 N t on
1 V1
vL VO ton VO Ts t on 0
TS N
Circuit Analysis:
For 0<t<ton
Suppose that at t=0 the magnetizing is im(0)=-ImP. During the time
interval [0,ton] the swiches S1,S4, D5 and D8, are on.
+ S2
S1 iP I2/N
N1 N2 i2 iS/N
+ D5 D6 Imp
iS +
VI im + + vL - -Imp
vP VO im t
vD
Lm
- - I2/N+ Imp
- D7 D8
iP
S3 I2/N- Imp
S4 Imp
-
t
I2
And the primary current is given: iP im V1/N
vD
N
1 1 t
or i P I 2 I mP V1dt VO
N Lm 0 DT
t
on t=DT im I mP (in Steady State). T
S1 cutts off and S3 starts conduction (D3), mantaining a possible path for im.
The primary voltage mantains null value, vP=0, during (1-D)T, and the magnetizing
current the keeps constant until S4 starts conducting at t=T.
I2/N+ Imp
I2/N- Imp iP
t
-I2/N+ Imp
-I2/N- Imp
V1 vP
DT t
TS