2

SKEE 1063
PART A: ANSWER ALL (25) QUESTIONS (25 marks)

1. Two-dimensional model of an atom was developed by

A. Marie Curie. D. Jasper ONeil.
B. Sheldon Cooper. E. Niels Bohr.
C. William Shockley.

2. What types of impurity atoms are added to increase the number of conduction-band
electrons in intrinsic silicon?
A. bivalent D. trivalent
B. octavelent E. tetravalent
C. pentavalent

3. Although germanium diode has higher carrier mobility, silicon diode is preferred
because of the following reasons except
A. Its maximum operating temperature is higher.
B. Its forward voltage (VON) is higher.
C. It is widely encountered in nature and therefore cheaper.
D. Its PIV is higher.
E. Its reverse current is smaller.

4. Choose the wrong statement related to a semiconductor.

A. Electrons that exist in the conduction band at room temperature move through the
holes in the conduction band when a bias voltage is applied.
B. Semiconductors have a negative temperature coefficient of resistance; that is
current flow increases with an increase in temperature.
C. Conduction in pure semiconductor consists of electron flow in the conduction
band and hole flow in the valence band.
D. Semiconductor materials can either be in single-crystal and compound form.
E. The bonding of atoms in semiconductor is known as covalent bonding.
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SKEE 1063

5. The depletion region that exist in a p-n junction is caused by

A. ion implantation in a doping process.
B. the diffusion of electrons in the n-type to the holes in the p-type.
C. the barrier potential created by recombination process.
D. massive movement of carriers due to thermal generation.
E. the avalanche effect due to the reverse saturation current.

6. There is a small amount of current across the barrier of a reverse-biased diode. This
current is called
A. forward-bias current. D. reverse saturation current.
B. reverse breakdown current. E. avalanche current.
C. conventional current.

7. For the circuit in Figure 1(a), a silicon diode is used. Which voltage measurement will
produce the waveform in Figure 1(b).
V(V)

V1
V3 wt
VS V5 0
V2 -2
10 sin t V

2V V4

- 12

(a) (b)
Figure 1

A. V1 B. V2 C. V3 D. V4 E. V5
 4
SKEE 1063

8. Choose the wrong statement related to Figure 2. Assume ideal diodes.

10 : 1
D1
Vsec
V1 VO
230 V rms Vpri
50 Hz
V2

D2

Figure 2
A. The rms value of secondary winding voltage (Vsec) is 23 V.
B. PIV of D2 is 32.53 V.
C. The average output voltage Vo is 10.35 V.
D. V2 is 180 out of phase with Vpri.
E. At certain instance, both diodes can turn on at the same time.

9. In the operation of a half-wave rectifier with a capacitor-input filter, the ripple factor
can be lowered by ________ the value of the filter capacitor and ________ the load
resistor.
A. decreasing, decreasing D. increasing, increasing
B. decreasing, increasing E. maintaining, increasing
C. increasing, decreasing

10. Assuming that the output voltage of a half-wave rectifier and a full-wave rectifier has
the same positive peak value with the same input signal, the average output voltage of
the full-wave rectifier is higher than the half-wave rectifier because
A. full-wave rectifier uses more diodes.
B. there is a longer time interval between peaks in a half-wave rectifier.
C. the frequency of a full-wave rectifier is halved compared to the input frequency.
D. it utilises a centre-tap transformer.
E. its diodes PIV are higher.
 5
SKEE 1063

11. Which diode arrangement will supply a negative output voltage?

A. D.

vs vs
vo vo

B. E.

vs vs
vo vo

C.

vs
vo

12. The term bias in electronics usually means

A. the value of ac voltage in the signal.
B. the condition of current through a pn junction.
C. the value of dc voltages for the device to operate properly.
D. the status of the diode.
E. favourably dc voltage given to a particular node.
 6
SKEE 1063

13. For the circuit in Figure 3, assuming ideal diode, what is the minimum and maximum
value of RL to keep the diode in regulation?
IS RS IL

200 W IZ
VS RL V O
20 V VZ
10 V

Figure 3
A. minimum = 0, maximum = 200 W
B. minimum = 200 W, maximum =
C. minimum can't be calculated, maximum =
D. minimum = 200 W, maximum can't be calculated.
E. No answer.

14. Vacuum triode is an old voltage-controlled device. Which device resembles the
operation of this device?
A. FET D. Schottky diode
B. BJT E. NAND gate
C. Zener diode

15. The collector and emitter current of an npn transistor in the active-mode are 1.98 mA
and 2.0 mA respectively. The current gain DC is
A. 99 D. 100
B. 0.99 E. No answer
C. 9.9
 7
SKEE 1063

16. If the transistor in Figure 4 is in the active mode, the most positive voltage is the

- VCC

C
B

Figure 4

A. ground D. VBE
B. base E. VCE
C. collector

17. What is the order of doping, from heavily to lightly doped, for each region in a BJT?
A. base, collector, emitter D. collector, emitter, base
B. emitter, collector, base E. collector, base, emitter
C. emitter, base, collector

18. MOSFET has a very high input impedance due to the insulating layer of ________ in
its construction.
A. TiO2 D. SiO2
B. GaAs E. NaCl
C. C4
 8
SKEE 1063
19. The transfer characteristic of a transistor is given in Figure 5. From the graph, the
ID

5 mA

VGS
0 5V
Figure 5

A. transistor has the threshold voltage of 5 V.

B. curve can be represented by the equation ID = IDSS(1 VGS/VGSoff).
C. characteristic is for the pnp BJT.
D. characteristic may be that of p channel MOSFET.
E. characteristic is not possible as ID cant be more than 5 mA as VGS cant be less
than 0 V.

20. BJT is a ________-controlled device and MOSFET is a ________ - controlled device.

A. , VGS D. current, current
B. voltage, current E. current, voltage
C. voltage, voltage
21. The circuit in Figure 6 implements which two-input logical function?
5V

V1 Vo

V2

Figure 6

A. NAND D. NOR
B. AND E. Exclusive-OR
C. OR
 9
SKEE 1063
22. The circuit in Figure 7 is a/an
5V

Vi Vo

Figure 7
A. inverter. D. CMOS buffer.
B. one-input NAND gate. E. drain-coupled rectifier.
C. CMOS amplifier.

23. Which device is a very efficient thyristor to control the speed of an AC fan motor?

A. 4-layer diode
B. Programmable Uni-junction Transistor (PUT)
C. triac
D. BJT
E. schottky diode

24. Figure 8 is the symbol of which diode?

Figure 8
A. Zener D. Schottky
B. Photo E. Silicon
C. Light Emitting
 10
SKEE 1063

25. CMOS is the acronym for

A. charged metal on silicon.
B. collector monolithic oxide saturation.
C. complementary monolithic oscillating substrate.
D. capacitive magnetic oscillating semiconductor.
E. complementary metal oxide semiconductor.
 11
SKEE 1063
PART B: ANSWER THREE (3) QUESTIONS ONLY.

Q.1
(a) Refer to the circuit shown in Figure Q.1 (a). It is given that the Zener voltage (VZ) for
diode A is 3.3 V, while for diode B is 9.1 V. Forward voltage (VF) of both diodes is
similar with the value of 0.8 V. Sketch and label Vo(t).
(4 marks)
2 k

Vs(t) = 15 sin 1570.8t V Vo(t)

B

Figure Q.1 (a)

(b) Refer to the circuit shown in Figure Q.1 (b).

500 IS IL

IZ

VZ = 15V VL
50 V RL
PZM = 900mW

Figure Q.1 (b)

(i) Calculate the minimum load resistance, RLmin to ensure the Zener diode is in
ON state. (2 marks)
(ii) Determine IS, IL and IZ if RL=RLmin. (3 marks)
(ii) Calculate the maximum load resistance, RLmax to ensure the power absorbed by
the Zener diode will not exceed the maximum power rating, PZM. (3 marks)
 12
SKEE 1063
(c) Figure Q.1 (c) shows a rectifier circuit that uses four silicon diodes. The resulting
output voltage of the rectifier is shown in Figure Q.1 (d).

N1:N2
D1 D2

49.5 Vrms Vo
Vpri Vsec
50 Hz

C1 420
D3 D4

Figure Q.1 (c)

Vo Ripple factor, r = 0.1

VDC = 12 V
V1
V2

0.01 0.02 0.03 0.04 t

Figure Q.1(d)
(i) Referring to Figure Q.1(d), determine the peak-to-peak ripple voltage, Vr(pp),
V1, and V2. (3 marks)
(ii) Calculate the value of capacitor C1. (2 marks)
(iii) Calculate the peak value of secondary voltage of the transformer, Vsec.
(2 marks)
(iv) If diode D2 is disconnected from the circuit, determine the resulting ripple
factor, r. Sketch and label VO.
(6 marks)
 13
SKEE 1063
Q.2 Consider a BJT amplifier circuit shown in Figure Q.2. The transistors parameters are:
= 120, VBE = 0.7 V.

VCC = +15 V

R1 RC
40 k 2 k C2

C3
1.5 k
= 120

C1 50
R2
4 k
RE
vsig
150

Figure Q.2
(a) Draw and label the Thevenin equivalent circuit at the input of the amplifier circuit.
(6 marks)
(b) Calculate IBQ, ICQ and VCEQ. (7 marks)
(c) At temperature of 80 C, increases to 135. Determine the stability factor
I C
( S ( ) ) of the bias circuit. Assume that VBE remains unchanged.

(6 marks)
(d) If RE is removed, how does it affect the Q-point? State the new Q-point (VCEQ,
ICQ). (6 marks)
 14
SKEE 1063

Q.3 Figure Q.3 (a) is a MOSFET circuit configuration. Given that VT = 2 V and
k = 0.25 103 A/V2.
VDD + 20V

RD
R1
3.3 MW

22m F + 22 m F
VDS
-
R2 vo
vi 1.5 MW RS
47m F
680 W

Figure Q.3 (a)

(a) Draw the I-V characteristics curve on the graph provided in Figure Q.3 (b) on
page 17. Determine the operating point of the transistor (VGSQ, IDQ) from the
graph.
(10 marks)
(b) If the drain-source voltage is equal to 5 V, determine RD.
(4 marks)
(c) Based on your answer in (a), determine VDsat value. Then, sketch and label its
drain characteristic curve (ID versus VDS) at the operating point.
(4 marks)
(d) Determine source current, IS. Why IS is different/same from drain current, ID?
(3 marks)
(e) If you were to measure the drain current at VGS = +2 V, what would be the
reading of your multimeter for ID? Explain briefly.
(4 marks)
 15
SKEE 1063

Q.4 (a) One of the major applications of Bipolar Junction Transistor (BJT) is switching
circuit. BJT will be biased to operate alternately in cut- off and saturation regions.
It can be applied in digital circuits. Referring to the circuit in Figure Q.4 (a), given
VCC = 18V, = 120, VBE (ON) = 0.7 V, VLED = 1.5V, VCE(SAT) = 0.2 V, RC = 500
and RB = 6.6 k. Answer the following:
(i) Calculate the minimum value of the input voltage, VIN to ensure that the BJT
is ON to light up the LED.
(4 marks)
(ii) Explain what happen to the intensity of the LED if the value of is reduced?
Justify your answer.
(2 marks)

RC
RB

VIN VCC

Figure Q.4 (a)

(b) MOSFETs are unipolar devices and can be categorized into two families namely
N-channel MOSFET and P-channel MOSFET. It may operate in depletion or
enhancement mode depending on the applied gate bias. Figure Q.4 (b-i) and Figure
Q.4 (b-ii) displayed the implementation of MOSFETs in logic circuit Analyze by
obtaining the truth table for the circuits and determine its digital representations.
 16
SKEE 1063
5V 5V
5V A B

Y
B
A
Y

Figure Q.4 (b-i) Figure Q.4 (b-ii)

(6 marks)
(c) Given that VD(on) = 0.7 V, VBE(on) = 0.7 V, VBE(sat) = 0.8 V, VCE(sat) = 0.1V and
= 25. Determine the currents and voltages in the circuit in Figure Q.4 (c) by
completing Table Q.4 (d) at page 18. Identify the logic gate represented by this
circuit.

VCC= 5V

IRC RC=
I1 R1= 4k
4k
VO
DX D1 D2 VB IB
VX V1
Q1

VY RB=
I2 IRB
10k
DY

Figure Q.4 (c)

(13 marks)
 17
SKEE 1063
APPENDIX A
ANSWER SHEET FOR Q.3 (a)
(Please submit this page together with the answer booklet)

NAME :
MATRIC NO. :
SECTION : .
LECTURER :

Figure Q.3 (b)

 18
SKEE 1063
APPENDIX B
ANSWER SHEET FOR Q.4 (c)
(Please submit this page together with the answer booklet)

NAME :
MATRIC NO. :
SECTION : .
LECTURER :

Table Q.4 (d)

vX vY V1 I1 IB IC vO
(V) (V) (V) (mA) (A) (mA) (V)

0.1 0.1 1.05

0.1 5 0

5 0.1 0.8 5

5 5

Logic Gate Represented: ..

 19
SKEE 1063
APPENDIX C - LIST OF EQUATIONS

PIV 2V p ( out ) 0.7
1

Vp
Vrms I E I B IC
2

Vp
V AVG VDC I C I B I CBO

Vrms 1 Vrms 1
r r
VDC 2 3 fRL C VDC 4 3 fRL C

Vp Vp
Vr ( pp ) Vr ( pp )
fRL C 2 fRL C

Vr ( pp ) I D (ON )
Vr ( rms ) k
2 3 VGS ( ON ) VGS (TH )
2

VVD
I D I S e T 1


2

I D k VGS VGS (TH )
VGS
I D I DSS 1 2
V
GS ( OFF )
2
V I C
I D I DSS 1 GS S
Vp

I C I C
S VBE S I CO
VBE I CO
 CONFIDENTIAL

FINAL EXAMINATION SEMESTER II

SESSION 2015/2016

(ANSWER)
COURSE CODE : SKEE 1063

COURSE : ELECTRONIC DEVICES

LECTURER : DR ASRUL IZAM AZMI

MDM MITRA MOHD ADDI
DR MASTURA SHAFINAZ ZAINAL ABIDIN
DR ZAHARAH JOHARI
DR NURUL EZAILA ALIAS
MR MUHAMMAD ARIF ABDUL RAHIM
PM DR RUBITA SUDIRMAN
DR MOHD AZHAR ABDUL RAZAK
DR SHAHARIN FADZLI ABD RAHMAN
DR NASRUL HUMAIMI MAHMOOD

PROGRAMME : SKEE/SKEL/SKEM/SPACE

SECTION : 01/02/03/04/05/06/07/SPACE

TIME : 2 HOURS
DATE : 14th JUNE 2016

INSTRUCTION TO CANDIDATE :

PART A : ANSWER ALL QUESTIONS

PART B : ANSWER THREE QUESTION ONLY

THIS EXAMINATION BOOKLET CONSISTS OF X PAGES INCLUDING THE FRONT COVER

 2
SKEE 1063 (ANSWER)

PART A

1. E 2. C 3. B 4. A 5. B

6. D 7. C 8. E 9. D 10. B

11. C 12. C 13. B 14. A 15. A

16. A 17. B 18. D 19. D 20. E

21. B 22. A 23. C 24. D 25. E

 3
SKEE 1063 (ANSWER)
PART B

Q.1
(a) Refer to the circuit shown in Figure Q.1 (a). It is given that the Zener voltage (VZ) for
diode A is 3.3 V, while for diode B is 9.1 V. Forward voltage (VF) of both diodes is
similar with the value of 0.8 V. Sketch and label Vo(t).
(4 marks)
2 k

Vs(t) = 15 sin 1570.8t V Vo(t)

B

Figure Q.1 (a)

Positive limit = 0.8+9.1 = 9.9 V (1 mark)

Negative limit = -(0.8+3.3) = -4.1 V (1 mark)
f = 1570.8/(2) = 250 Hz
Period = 1/250 = 4ms (1 mark)

Drawing (1 mark)
vo(t)

9.9 V
0
-4.1V
2 4 6 8 t (ms)
 4
SKEE 1063 (ANSWER)
(b) Refer to the circuit shown in Figure Q.1 (b).
500 IS IL

IZ

VZ = 15V VL
50 V RL
PZM = 900mW

Figure Q.1 (b)

(i) Calculate the minimum load resistance, RLmin to ensure the Zener diode is ON
state. (2 marks)
RS VZ
RL min
VS VZ (1 mark)

500 * 15

50 15
(1 mark)
214.28

(ii) Determine IS, IL and IZ if RL=RLmin. (3 marks)

IS =(VS-VZ)/RS = (50-15)/500 = 70 mA (1 mark)
IL = IS = 70 mA (1 mark)
IZ = 0 A (1 mark)

(iii) Calculate the maximum load resistance, RLmax to ensure the power absorbed by
the Zener diode will not exceed the maximum power rating, PZM. (3 marks)
IZM = PZM/VZ = 900m/15 = 60mA (1 mark)

IS = 70 mA (from previous result)

ILmin = IS-IZM = 70m-60m = 10mA (1 mark)
RLmax = VZ/ILmin = 15/10m = 1500 (1 mark)
 5
SKEE 1063 (ANSWER)
(c) Figure Q.1 (c) shows a rectifier circuit that uses four silicon diodes. The resulting
output voltage of the rectifier is shown in Figure Q.1 (d).

N1:N2
D1 D2

49.5 Vrms Vo
Vpri Vsec
50 Hz

C1 420
D3 D4

Figure Q.1 (c)

Vo Ripple factor, r = 0.1

VDC = 12 V
V1
V2

0.01 0.02 0.03 0.04 t

Figure Q.1 (d)

(i) Referring to Figure Q.1 (d), determine the peak-to-peak ripple voltage, Vr(pp),
V1, and V2. (3 marks)

(1 mark)

(1 mark)

(1 mark)
 6
SKEE 1063 (ANSWER)
(ii) Calculate the value of capacitor C1. (2 marks)

(2 marks)

(iii) Calculate the peak value of secondary voltage of the transformer, Vsec.
(2 marks)
(2 marks)

(iv) If diode D2 is disconnected from the circuit, determine the resulting ripple
factor, r. Sketch and label VO. (6 marks)

(1 mark)

VDC = 12.6 1.2 = 11.4 V (1 marks)

r=2.4/11.4=0.21 (1 marks)

Vo

12.6 V
10.2 V

0.01 0.02 0.03 0.04 t

Marks for graph

Peaks and dips ripple voltage level (1 mark)
Waveform shape (1 mark)
Time/cycle (1 mark)
 7
SKEE 1063 (ANSWER)
Q.2 Consider a BJT amplifier circuit shown in Figure Q.2. Given the transistor parameters are:
= 120, VBE = 0.7 V.

VCC = +15 V

R1 RC
40 k 2 k C2

C3
1.5 k
= 120

C1 50
R2
4 k
RE
vsig
150

Figure Q2
(a) Draw and label the Thevenin equivalent circuit at the input of the amplifier circuit.
(6 marks)

15 V
2m

2 k

2m
2m
3.64 k

1.36 V
150
 8
SKEE 1063 (ANSWER)
(b) Calculate IBQ, ICQ and VCEQ. (7 marks)

2.5m

2m

2.5m

**Approximation: IC=IE VCEQ=7.20 V

(c) At temperature of 80 C, increases to 135. Determine the stability factor
I C
( S ( ) ) of the bias circuit. Assume that VBE remains unchanged.

(6 marks)
2m

2m

2m

(d) If RE is removed, how does it affect the Q-point? State the new Q-point (VCEQ, ICQ).
(6 marks)

1m

1m

1m

Q-point is not in active region. Q-point at saturation region 1m

VCE=0 V 1m

1m

new Q-point: ICQ=7.5 mA, VCEQ=0 V

 9
SKEE 1063 (ANSWER)
Q.3 Figure Q.3 (a) is a MOSFET circuit configuration. Given that VT = 2 V and k = 0.25
103 A/V2.
VDD + 20V

RD
R1
3.3 M

22m F + 22 m F
VDS
-
R2 vo
vi 1.5 M RS
47m F
680

Figure Q.3 (a)

(a) Draw the I-V characteristics curve on the graph provided in Figure Q.3 (b) on
page 17. Determine the operating point of the transistor (VGSQ, IDQ) from the
graph.
(10 marks)

ID k VGS VT 2 1

0.25mA/V 2 VGS 2V 2

VGS (V) 2 3 4 5 6 2
ID(mA) 0 0.25 1 2.25 4
 10
SKEE 1063 (ANSWER)

VDD R2 20 1.5 1
VG 6.25V
R1 R2 1.5 3.3

VDD To draw the DC load-line:

VG VGS I D R S 0
VGS VG I D R S 6.25 I D ( 680 )

2
VGS (V) 0 6.25
VGS ID ID(mA) 9.19 0

V
VGG== -3.25V
6.25V
680 From the graph, the Q-point is: 2
IDQ = 2 mA, VGSQ = 4.9 V
 11
SKEE 1063 (ANSWER)
(b) If the drain-source voltage is equal to 5 V, determine RD.
(4 marks)
Applying KVL at the output loop:
VDD IDRD VDS IDRS = 0 2

IDRD = VDD VDS IDRS

VDD - VDS - I D R S 20V - 5V - 2 mA(680 ) 2
RD = 6.82 k
ID 2mA

(c) Based on your answer in (a), determine VDsat value. Then, sketch and label its
drain characteristic curve (ID versus VDS) at the operating point.
(4 marks)
From (a), VGSQ = 4.9V, IDQ = 2 mA
2
VDSat VGS VT 4.9 2 2.9V
ID (mA)

2
2

VDS (V)
VDSat = 2.9V

(d) Determine source current, IS. Why IS is different/same from drain current, ID?
(3 marks)
3
Source current, IS = ID = 2 mA (because the gate is insulated, thus IG = 0)
(e) If you were to measure the drain current at VGS = +2 V, what would be the reading
of your multimeter for ID? Explain briefly.
(4 marks)
At VGS = +2 V, the drain current, ID = 0. 2
This is because the biasing voltage, VGS is not adequate to form a channel at the gate.
VGS has to be at least beyond the threshold voltage in order the current to flow through the
formed channel. 2
 12
SKEE 1063 (ANSWER)

Q.4 (a) One of the major applications of Bipolar Junction Transistor (BJT) is switching
circuit. BJT will be biased to operate alternately in cut- off and saturation regions.
It can be applied in digital circuits. Referring to the circuit in Figure Q.4 (a), given
VCC = 18V, = 120, VBE (ON) = 0.7 V, VLED = 1.5V, VCE(SAT) = 0.2 V, RC = 500
and RB = 6.6 k. Answer the following:
(i) Calculate the minimum value of the input voltage, VIN to ensure that the BJT
is ON to light up the LED.
(4 marks)
VCC VLED VCE(SAT)
18 1.5 0.2
IC(SAT) 32.6mA 1
RC 100
The minimum IB(min) to light up the LED:

IC(SAT)
32.6 m
I B(min) 326 A 1
100
Calculate the input voltage:

VIN VBE VIN 0.7

I B(min) 1
RB RB
VIN (326 6.6k) 0.7 2.15 V 1

(ii) Explain what happen to the intensity of the LED if the value of is reduced?
Justify your answer.
(2 marks)
if the value of is reduced , the value of IB(min) will increase but IC(SAT) still the 2
same. Thus, the intensity of the LED stay the same.

RC
RB

VIN VCC
 13
SKEE 1063 (ANSWER)
Figure Q.4 (a)
(b) MOSFETs are unipolar devices and can be categorized into two families namely
N-channel MOSFET and P-channel MOSFET. It may operate in depletion or
enhancement mode depending on the applied gate bias. Figure Q.4 (b-i) and Figure
Q.4 (b-ii) displayed the implementation of MOSFETs in logic circuit. Analyze
the circuits and determine its digital representations.
5V 5V
5V A B

Y
B
A
Y

Figure Q.4 (b-i) Figure Q.4 (b-ii)

(6 marks)
(i)
A B Y
0 0 1
0 1 0
1 0 0 2
1 1 0

Answer: 2 inputs NOR gate 1

(ii)
P Q R
0 0 0
0 1 1
1 0 1 2
1 1 1

Answer: 2 inputs NAND gate 1

 14
SKEE 1063 (ANSWER)
(c) Given that = 25, VD(on) = 0.7 V, VBE(on) = 0.7V, VBE(sat) = 0.8V and VCE(sat) = 0.1
V. Determine the currents and voltages in the circuit in Figure Q.4 (c) by
completing Table Q.4 (d) at page 18. Identify the logic gate represented by this
circuit?

VCC= 5V

IRC RC=
I1 R1= 4k
4k
VO
DX D1 D2 VB IB
VX V1
Q1

VY RB=
I2 IRB
10k
DY

Figure Q.4 (c)

(13 marks)

vX vY V1 I1 IB IC vO
(V) (V) (V) (mA) (A) (mA) (V)
0.1 0.1 0.8 1.05 0 0 5V

0.1 5 0.8 1.05 0 0 5V

5 0.1 0.8 1.05 0 0 5V

5 5 2.2 0.70 620 1.23 0.1

0.5 x 16
=8
 15
SKEE 1063 (ANSWER)

If vX = vY = 0.1 V, Thus,
v1 = vX + VDIOD = 0.1 V + 0.7 V = 0.8 V
I1 = (VCC v1) / R1 = (5 0.8) /4 = 1.05 mA 1

Since diodes D1 and D2 and output transistor Q1 are not conducting, thus, the currents
I2 = IB = IC = 0 and the output of vO = 5V = logic 1.
1
*********************************
If vX = 0.1 V and vY = 5V or vX = 5V and vY = 0.1 V, then the output transistor still
cut off and vO = 5V = logic 1
1
*******************************

If vX = vY = 5V, it is impossible for diodes DX and DY to be forward biased. In this

case, diodes D1 and D2 and the output transistor are biased on,

V1 = VBE(sat) + 2VDIOD = 0.8 +2(0.7) = 2.2V

Thus, DX and DY indeed reverse biased.

I1 = I2 = (VCC v1) / R1 = (5 2.2) /4 = 0.70 mA

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And IR = VBE(sat) / RB = 0.8 / 10 = 0.08 mA

Then IB = I2 IR = 0.70 0.08 = 0.62 mA

And IC = (VCC VCE (sat)) / RC = (5 0.1) / 4 = 1.23 mA

The logic gate represent NAND gate. 1