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Logic Gates
By Taweesak Reungpeerakul
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Contents
Inverter
AND Gate
OR Gate
NAND Gate
NOR Gate
XOR and XNOR Gates
Integrated Circuit Logic Gates
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3.1 Inverter (INV)
Symbols Timing Diagram
0 1
Truth Table
In Out
1 0
0 1
1 0 Logic Expression:
Out = In
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3.2 AND Gate
Symbols Timing Diagram
Truth Table
A B Out
0 0 0
Logic Expression:
0 1 0
1 0 0 Out = AB
1 1 1
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3.3 OR Gate
Symbols Timing Diagram
A
Out
B
Truth Table
A B Out
0 0 0
Logic Expression:
0 1 1
1 0 1 Out = A+B
1 1 1
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3.4 NAND Gate
Symbols Timing Diagram
A
Out
B
Truth Table
A B Out
0 0 1
Logic Expression:
0 1 1
1 0 1 Out = AB
1 1 0
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3.5 NOR Gate
Symbols Timing Diagram
A
Out
B
Truth Table
A B Out
0 0 1
Logic Expression:
0 1 0
1 0 0 Out = A+B
1 1 0
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3.6 XOR Gate
Symbols Timing Diagram
Truth Table
A B Out
0 0 0
Logic Expression:
0 1 1
1 0 1 Out = A B+AB; AB
1 1 0
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XNOR Gate
Symbols Timing Diagram
Truth Table
A B Out
0 0 1
Logic Expression:
0 1 0
1 0 0 Out = A B+AB; AB
1 1 1
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3.7 Integrated Circuit Logic Gates
CMOS: Complementary Metal- TTL: Transistor-Transistor Logic
Oxide Semiconductor Not Sensitive to Electrostatic Discharge
Low Power Dissipation Switching Speed
DC Power Supply: 5 V & 3.3 V DC Power Supply: 5 V
CMOS Series: 74 + letter(s) + numbers TTL Series: 74 + letter(s) + numbers
Letters: Letters:
HC, HCT = High-speed CMOS S = Schottky TTL
LV, LVC = Low-voltage CMOS LS = Low-power Schottky TTL
BCT = BiCMOS (combine CMOS&TTL) F = Fast TTL
Numbers: Numbers:
00= Quad 2-input NAND 08= Quad 2-input AND
02= Quad 2-input NOR 10= Triple 3-input NAND
04= Hex inverter 32= Quad 2-input OR
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3.7 IC Logic Gate (cont.)
Packages IC Gate Config.
DIP
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Performance Characteristics &
Parameters
Propagation Delay Time: Speed-power Product (SPP)
tP , tPHL , tPLH SPP = tP*PD
DC Power Supply: 3.3, 5V Fan-out and Loading