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(f) Simplify the given Boolean function using K-map : (a) Design the clocked sequential circuit with SR flip-
F(A, B, C, D) = m(4, 5, 6, 7, 8, 12) + d(1, 2, 3, 9, 11, 14). flop of which state diagram is given below :
3. Attempt any TWO parts of the following : (210=20) (c) What is meant by CMOS and BiCMOS ? Explain the
(a) Implement the following function using 8 1 multi- working of CMOS NAND and NOR gates.
plexer :
5. Attempt any TWO parts of the following : (210=20)
F(x, y, z) = m(0, 2, 3, 5, 7).
(b) Convert the following flip-flops : (a) Write down the procedure of determination of hazard
(ii) JK to D example.
(iii) SR to JK.
(a) Distinguish between static and dynamic hazard. (Following Paper ID and Roll No. to be filled in your Answer Book)
(b) For the network shown in following diagram, write the PAPER ID : 3072 Roll No.
transient disjunctive normal formula.
B.Tech.
A AB (SEM. III) ODD SEMESTER THEORY
B EXAMINATION 2013-14
Y SWITCHING THEORY
Implement the circuit with PLA having 3 input, 4 product 4. Attempt any two : (210=20)
term and two output.
(a) Enlist the basic components of bipolar and unipolar logic
3. Attempt any two : (210=20) family. Explain the various parameters of RTL logic.
(a) Differentiate between latches and flip flop. Design one (b) Explain why the temperature sensitivity of HTL is
input and one output D flip flop and draw the circuit for significantly better than DTL. Compare the two with the
converting it into SR flip flop. help of a 3 input NAND gate circuit.
(b) Distinguish between synchronous and Asynchronous digital (c) Draw the interfacing circuit of CMOS and TTL and explain
sequential circuit. Explain using example circuit of 3 bit a TTL driving CMOS and a CMOS TTL. Find the fan out
binary counter. when a CMOS driving TTL series gates.