Post Prac

Task 1:
The design circuit from the pre-practical was compiled and programmed into an
EPM7032LC44 complex programmable logic device (CPLD) .Firgure1 below shows the
design which was programmed during the practical. After programming the device the
socket on the test board were connected as configured from the programmer to ensure
that the orientation in the socket is correct. Two three bit numbers were added to give the
four bit result. This is achieved by using the two three bit ripple adders. The following
tests were performed to check whether the results were correct or not:

100 110
+001 +1 1 0
0010 1100
Without overflow with overflow

Figure1
Task2: Implementation of 4-bit binary to 7-segment display

The same procedure was used for this task but for the different circuit this time. The table
on the pre-practical part was used to design the logic circuit used in this practical. The
design for segment A show in figure 3 below. All the logic circuit design for other
segment were not copied because of space (they are many). The pre-practical could be
used as the reference to confirm the correctness of other segment. Table 1 on the pre-
practical was used to confirm the result and these is what happened during the test after
programming the device the socket on the test board was connected: when S0 was high;
S1 was low; S2 low and S3 high, only d and e were set which gives 9 from figure 2(7-
segment display) below as expected from the table in the pre-practical.

f b
g

e c
d

Figure2
Figure3
Task4: Implementation of a 3-bit adder with hexadecimal output display

This task task1 and task 2 were cascaded together as shown in figure4 below, which is
adds two 3-bit binary numbers and display the result in hexadecimal on the 7-segment
display. The result were as expected by using the result in task 1

Figure4

Conclusion

The entire three tasks were completed and the results were displayed using the 7-segment
display. The error finding is very difficult to find since one has to redraw the whole
circuit and rerun the whole process again. This is considered to be disadvantage of Max-
plus II. The practical helped to understand some of the computer based tool proved by
Altera Corporation for designing and implementing digital circuits design on their
programmable devices.